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-rw-r--r--arch/blackfin/mach-bf561/secondary.S26
1 files changed, 9 insertions, 17 deletions
diff --git a/arch/blackfin/mach-bf561/secondary.S b/arch/blackfin/mach-bf561/secondary.S
index ef9acf21eb8e..148e50764555 100644
--- a/arch/blackfin/mach-bf561/secondary.S
+++ b/arch/blackfin/mach-bf561/secondary.S
@@ -162,39 +162,31 @@ ENTRY(_coreb_trampoline_start)
162ENDPROC(_coreb_trampoline_start) 162ENDPROC(_coreb_trampoline_start)
163ENTRY(_coreb_trampoline_end) 163ENTRY(_coreb_trampoline_end)
164 164
165#ifdef CONFIG_HOTPLUG_CPU
165.section ".text" 166.section ".text"
166ENTRY(_set_sicb_iwr) 167ENTRY(_coreb_die)
167 P0.H = hi(SICB_IWR0);
168 P0.L = lo(SICB_IWR0);
169 P1.H = hi(SICB_IWR1);
170 P1.L = lo(SICB_IWR1);
171 [P0] = R0;
172 [P1] = R1;
173 SSYNC;
174 RTS;
175ENDPROC(_set_sicb_iwr)
176
177ENTRY(_coreb_sleep)
178 sp.l = lo(INITIAL_STACK); 168 sp.l = lo(INITIAL_STACK);
179 sp.h = hi(INITIAL_STACK); 169 sp.h = hi(INITIAL_STACK);
180 fp = sp; 170 fp = sp;
181 usp = sp; 171 usp = sp;
182 172
183 call _set_sicb_iwr;
184
185 CLI R2; 173 CLI R2;
186 SSYNC; 174 SSYNC;
187 IDLE; 175 IDLE;
188 STI R2; 176 STI R2;
189 177
190 R0 = IWR_DISABLE_ALL; 178 R0 = IWR_DISABLE_ALL;
191 R1 = IWR_DISABLE_ALL; 179 P0.H = hi(SYSMMR_BASE);
192 call _set_sicb_iwr; 180 P0.L = lo(SYSMMR_BASE);
181 [P0 + (SICB_IWR0 - SYSMMR_BASE)] = R0;
182 [P0 + (SICB_IWR1 - SYSMMR_BASE)] = R0;
183 SSYNC;
193 184
194 p0.h = hi(COREB_L1_CODE_START); 185 p0.h = hi(COREB_L1_CODE_START);
195 p0.l = lo(COREB_L1_CODE_START); 186 p0.l = lo(COREB_L1_CODE_START);
196 jump (p0); 187 jump (p0);
197ENDPROC(_coreb_sleep) 188ENDPROC(_coreb_die)
189#endif
198 190
199__INIT 191__INIT
200ENTRY(_coreb_start) 192ENTRY(_coreb_start)