diff options
Diffstat (limited to 'arch/blackfin/mach-bf561/include/mach/cdefBF561.h')
-rw-r--r-- | arch/blackfin/mach-bf561/include/mach/cdefBF561.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/blackfin/mach-bf561/include/mach/cdefBF561.h b/arch/blackfin/mach-bf561/include/mach/cdefBF561.h index b16875d735b3..95d609f11c97 100644 --- a/arch/blackfin/mach-bf561/include/mach/cdefBF561.h +++ b/arch/blackfin/mach-bf561/include/mach/cdefBF561.h | |||
@@ -1537,7 +1537,7 @@ static __inline__ void bfin_write_PLL_CTL(unsigned int val) | |||
1537 | if (val == bfin_read_PLL_CTL()) | 1537 | if (val == bfin_read_PLL_CTL()) |
1538 | return; | 1538 | return; |
1539 | 1539 | ||
1540 | local_irq_save(flags); | 1540 | local_irq_save_hw(flags); |
1541 | /* Enable the PLL Wakeup bit in SIC IWR */ | 1541 | /* Enable the PLL Wakeup bit in SIC IWR */ |
1542 | iwr0 = bfin_read32(SICA_IWR0); | 1542 | iwr0 = bfin_read32(SICA_IWR0); |
1543 | iwr1 = bfin_read32(SICA_IWR1); | 1543 | iwr1 = bfin_read32(SICA_IWR1); |
@@ -1551,7 +1551,7 @@ static __inline__ void bfin_write_PLL_CTL(unsigned int val) | |||
1551 | 1551 | ||
1552 | bfin_write32(SICA_IWR0, iwr0); | 1552 | bfin_write32(SICA_IWR0, iwr0); |
1553 | bfin_write32(SICA_IWR1, iwr1); | 1553 | bfin_write32(SICA_IWR1, iwr1); |
1554 | local_irq_restore(flags); | 1554 | local_irq_restore_hw(flags); |
1555 | } | 1555 | } |
1556 | 1556 | ||
1557 | /* Writing to VR_CTL initiates a PLL relock sequence. */ | 1557 | /* Writing to VR_CTL initiates a PLL relock sequence. */ |
@@ -1562,7 +1562,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val) | |||
1562 | if (val == bfin_read_VR_CTL()) | 1562 | if (val == bfin_read_VR_CTL()) |
1563 | return; | 1563 | return; |
1564 | 1564 | ||
1565 | local_irq_save(flags); | 1565 | local_irq_save_hw(flags); |
1566 | /* Enable the PLL Wakeup bit in SIC IWR */ | 1566 | /* Enable the PLL Wakeup bit in SIC IWR */ |
1567 | iwr0 = bfin_read32(SICA_IWR0); | 1567 | iwr0 = bfin_read32(SICA_IWR0); |
1568 | iwr1 = bfin_read32(SICA_IWR1); | 1568 | iwr1 = bfin_read32(SICA_IWR1); |
@@ -1576,7 +1576,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val) | |||
1576 | 1576 | ||
1577 | bfin_write32(SICA_IWR0, iwr0); | 1577 | bfin_write32(SICA_IWR0, iwr0); |
1578 | bfin_write32(SICA_IWR1, iwr1); | 1578 | bfin_write32(SICA_IWR1, iwr1); |
1579 | local_irq_restore(flags); | 1579 | local_irq_restore_hw(flags); |
1580 | } | 1580 | } |
1581 | 1581 | ||
1582 | #endif /* _CDEF_BF561_H */ | 1582 | #endif /* _CDEF_BF561_H */ |