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Diffstat (limited to 'arch/blackfin/mach-bf561/include/mach/blackfin.h')
-rw-r--r--arch/blackfin/mach-bf561/include/mach/blackfin.h33
1 files changed, 10 insertions, 23 deletions
diff --git a/arch/blackfin/mach-bf561/include/mach/blackfin.h b/arch/blackfin/mach-bf561/include/mach/blackfin.h
index 67d6bdcd3fa8..6c7dc58c018c 100644
--- a/arch/blackfin/mach-bf561/include/mach/blackfin.h
+++ b/arch/blackfin/mach-bf561/include/mach/blackfin.h
@@ -24,29 +24,16 @@
24#define bfin_read_FIO_INEN() bfin_read_FIO0_INEN() 24#define bfin_read_FIO_INEN() bfin_read_FIO0_INEN()
25#define bfin_write_FIO_INEN(val) bfin_write_FIO0_INEN(val) 25#define bfin_write_FIO_INEN(val) bfin_write_FIO0_INEN(val)
26 26
27#define SIC_IWR0 SICA_IWR0 27/* Weird muxer funcs which pick SIC regs from IMASK base */
28#define SIC_IWR1 SICA_IWR1 28#define __SIC_MUX(base, x) ((base) + ((x) << 2))
29#define SIC_IAR0 SICA_IAR0 29#define bfin_read_SIC_IMASK(x) bfin_read32(__SIC_MUX(SIC_IMASK0, x))
30#define bfin_write_SIC_IMASK0 bfin_write_SICA_IMASK0 30#define bfin_write_SIC_IMASK(x, val) bfin_write32(__SIC_MUX(SIC_IMASK0, x), val)
31#define bfin_write_SIC_IMASK1 bfin_write_SICA_IMASK1 31#define bfin_read_SICB_IMASK(x) bfin_read32(__SIC_MUX(SICB_IMASK0, x))
32#define bfin_write_SIC_IWR0 bfin_write_SICA_IWR0 32#define bfin_write_SICB_IMASK(x, val) bfin_write32(__SIC_MUX(SICB_IMASK0, x), val)
33#define bfin_write_SIC_IWR1 bfin_write_SICA_IWR1 33#define bfin_read_SIC_ISR(x) bfin_read32(__SIC_MUX(SIC_ISR0, x))
34 34#define bfin_write_SIC_ISR(x, val) bfin_write32(__SIC_MUX(SIC_ISR0, x), val)
35#define bfin_read_SIC_IMASK0 bfin_read_SICA_IMASK0 35#define bfin_read_SICB_ISR(x) bfin_read32(__SIC_MUX(SICB_ISR0, x))
36#define bfin_read_SIC_IMASK1 bfin_read_SICA_IMASK1 36#define bfin_write_SICB_ISR(x, val) bfin_write32(__SIC_MUX(SICB_ISR0, x), val)
37#define bfin_read_SIC_IWR0 bfin_read_SICA_IWR0
38#define bfin_read_SIC_IWR1 bfin_read_SICA_IWR1
39#define bfin_read_SIC_ISR0 bfin_read_SICA_ISR0
40#define bfin_read_SIC_ISR1 bfin_read_SICA_ISR1
41
42#define bfin_read_SIC_IMASK(x) bfin_read32(SICA_IMASK0 + (x << 2))
43#define bfin_write_SIC_IMASK(x, val) bfin_write32((SICA_IMASK0 + (x << 2)), val)
44#define bfin_read_SICB_IMASK(x) bfin_read32(SICB_IMASK0 + (x << 2))
45#define bfin_write_SICB_IMASK(x, val) bfin_write32((SICB_IMASK0 + (x << 2)), val)
46#define bfin_read_SIC_ISR(x) bfin_read32(SICA_ISR0 + (x << 2))
47#define bfin_write_SIC_ISR(x, val) bfin_write32((SICA_ISR0 + (x << 2)), val)
48#define bfin_read_SICB_ISR(x) bfin_read32(SICB_ISR0 + (x << 2))
49#define bfin_write_SICB_ISR(x, val) bfin_write32((SICB_ISR0 + (x << 2)), val)
50 37
51#define BFIN_UART_NR_PORTS 1 38#define BFIN_UART_NR_PORTS 1
52 39