diff options
Diffstat (limited to 'arch/blackfin/mach-bf561/include/mach/anomaly.h')
| -rw-r--r-- | arch/blackfin/mach-bf561/include/mach/anomaly.h | 25 |
1 files changed, 20 insertions, 5 deletions
diff --git a/arch/blackfin/mach-bf561/include/mach/anomaly.h b/arch/blackfin/mach-bf561/include/mach/anomaly.h index 70da495c9665..5ddc981e9937 100644 --- a/arch/blackfin/mach-bf561/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf561/include/mach/anomaly.h | |||
| @@ -1,9 +1,13 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * File: include/asm-blackfin/mach-bf561/anomaly.h | 2 | * DO NOT EDIT THIS FILE |
| 3 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | 3 | * This file is under version control at |
| 4 | * svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/ | ||
| 5 | * and can be replaced with that version at any time | ||
| 6 | * DO NOT EDIT THIS FILE | ||
| 4 | * | 7 | * |
| 5 | * Copyright (C) 2004-2009 Analog Devices Inc. | 8 | * Copyright 2004-2009 Analog Devices Inc. |
| 6 | * Licensed under the GPL-2 or later. | 9 | * Licensed under the ADI BSD license. |
| 10 | * https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd | ||
| 7 | */ | 11 | */ |
| 8 | 12 | ||
| 9 | /* This file should be up to date with: | 13 | /* This file should be up to date with: |
| @@ -213,7 +217,11 @@ | |||
| 213 | /* Disabling Peripherals with DMA Running May Cause DMA System Instability */ | 217 | /* Disabling Peripherals with DMA Running May Cause DMA System Instability */ |
| 214 | #define ANOMALY_05000278 (__SILICON_REVISION__ < 5) | 218 | #define ANOMALY_05000278 (__SILICON_REVISION__ < 5) |
| 215 | /* False Hardware Error Exception when ISR Context Is Not Restored */ | 219 | /* False Hardware Error Exception when ISR Context Is Not Restored */ |
| 216 | #define ANOMALY_05000281 (__SILICON_REVISION__ < 5) | 220 | /* Temporarily walk around for bug 5423 till this issue is confirmed by |
| 221 | * official anomaly document. It looks 05000281 still exists on bf561 | ||
| 222 | * v0.5. | ||
| 223 | */ | ||
| 224 | #define ANOMALY_05000281 (__SILICON_REVISION__ <= 5) | ||
| 217 | /* System MMR Write Is Stalled Indefinitely when Killed in a Particular Stage */ | 225 | /* System MMR Write Is Stalled Indefinitely when Killed in a Particular Stage */ |
| 218 | #define ANOMALY_05000283 (1) | 226 | #define ANOMALY_05000283 (1) |
| 219 | /* Reads Will Receive Incorrect Data under Certain Conditions */ | 227 | /* Reads Will Receive Incorrect Data under Certain Conditions */ |
| @@ -280,6 +288,12 @@ | |||
| 280 | #define ANOMALY_05000443 (1) | 288 | #define ANOMALY_05000443 (1) |
| 281 | /* False Hardware Error when RETI Points to Invalid Memory */ | 289 | /* False Hardware Error when RETI Points to Invalid Memory */ |
| 282 | #define ANOMALY_05000461 (1) | 290 | #define ANOMALY_05000461 (1) |
| 291 | /* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */ | ||
| 292 | #define ANOMALY_05000473 (1) | ||
| 293 | /* Core Hang With L2/L3 Configured in Writeback Cache Mode */ | ||
| 294 | #define ANOMALY_05000475 (__SILICON_REVISION__ < 4) | ||
| 295 | /* TESTSET Instruction Cannot Be Interrupted */ | ||
| 296 | #define ANOMALY_05000477 (1) | ||
| 283 | 297 | ||
| 284 | /* Anomalies that don't exist on this proc */ | 298 | /* Anomalies that don't exist on this proc */ |
| 285 | #define ANOMALY_05000119 (0) | 299 | #define ANOMALY_05000119 (0) |
| @@ -304,5 +318,6 @@ | |||
| 304 | #define ANOMALY_05000450 (0) | 318 | #define ANOMALY_05000450 (0) |
| 305 | #define ANOMALY_05000465 (0) | 319 | #define ANOMALY_05000465 (0) |
| 306 | #define ANOMALY_05000467 (0) | 320 | #define ANOMALY_05000467 (0) |
| 321 | #define ANOMALY_05000474 (0) | ||
| 307 | 322 | ||
| 308 | #endif | 323 | #endif |