diff options
Diffstat (limited to 'arch/blackfin/mach-bf548')
-rw-r--r-- | arch/blackfin/mach-bf548/boards/ezkit.c | 1 | ||||
-rw-r--r-- | arch/blackfin/mach-bf548/include/mach/anomaly.h | 20 | ||||
-rw-r--r-- | arch/blackfin/mach-bf548/include/mach/blackfin.h | 1 | ||||
-rw-r--r-- | arch/blackfin/mach-bf548/include/mach/mem_map.h | 51 |
4 files changed, 24 insertions, 49 deletions
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c index 805a57b5e650..81f5b95cc361 100644 --- a/arch/blackfin/mach-bf548/boards/ezkit.c +++ b/arch/blackfin/mach-bf548/boards/ezkit.c | |||
@@ -76,7 +76,6 @@ static struct resource bfin_isp1760_resources[] = { | |||
76 | 76 | ||
77 | static struct isp1760_platform_data isp1760_priv = { | 77 | static struct isp1760_platform_data isp1760_priv = { |
78 | .is_isp1761 = 0, | 78 | .is_isp1761 = 0, |
79 | .port1_disable = 0, | ||
80 | .bus_width_16 = 1, | 79 | .bus_width_16 = 1, |
81 | .port1_otg = 0, | 80 | .port1_otg = 0, |
82 | .analog_oc = 0, | 81 | .analog_oc = 0, |
diff --git a/arch/blackfin/mach-bf548/include/mach/anomaly.h b/arch/blackfin/mach-bf548/include/mach/anomaly.h index c510ae688e28..18a4cd24f673 100644 --- a/arch/blackfin/mach-bf548/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf548/include/mach/anomaly.h | |||
@@ -18,7 +18,7 @@ | |||
18 | # error will not work on BF548 silicon version 0.0, or 0.1 | 18 | # error will not work on BF548 silicon version 0.0, or 0.1 |
19 | #endif | 19 | #endif |
20 | 20 | ||
21 | /* Multi-issue instruction with dsp32shiftimm in slot1 and P-reg store in slot 2 not supported */ | 21 | /* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */ |
22 | #define ANOMALY_05000074 (1) | 22 | #define ANOMALY_05000074 (1) |
23 | /* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */ | 23 | /* DMA_RUN Bit Is Not Valid after a Peripheral Receive Channel DMA Stops */ |
24 | #define ANOMALY_05000119 (1) | 24 | #define ANOMALY_05000119 (1) |
@@ -30,17 +30,17 @@ | |||
30 | #define ANOMALY_05000265 (1) | 30 | #define ANOMALY_05000265 (1) |
31 | /* Certain Data Cache Writethrough Modes Fail for Vddint <= 0.9V */ | 31 | /* Certain Data Cache Writethrough Modes Fail for Vddint <= 0.9V */ |
32 | #define ANOMALY_05000272 (1) | 32 | #define ANOMALY_05000272 (1) |
33 | /* False Hardware Error Exception When ISR Context Is Not Restored */ | 33 | /* False Hardware Error Exception when ISR Context Is Not Restored */ |
34 | #define ANOMALY_05000281 (__SILICON_REVISION__ < 1) | 34 | #define ANOMALY_05000281 (__SILICON_REVISION__ < 1) |
35 | /* SSYNCs After Writes To CAN/DMA MMR Registers Are Not Always Handled Correctly */ | 35 | /* SSYNCs After Writes To CAN/DMA MMR Registers Are Not Always Handled Correctly */ |
36 | #define ANOMALY_05000304 (__SILICON_REVISION__ < 1) | 36 | #define ANOMALY_05000304 (__SILICON_REVISION__ < 1) |
37 | /* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */ | 37 | /* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */ |
38 | #define ANOMALY_05000310 (1) | 38 | #define ANOMALY_05000310 (1) |
39 | /* Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */ | 39 | /* Errors when SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */ |
40 | #define ANOMALY_05000312 (__SILICON_REVISION__ < 1) | 40 | #define ANOMALY_05000312 (__SILICON_REVISION__ < 1) |
41 | /* TWI Slave Boot Mode Is Not Functional */ | 41 | /* TWI Slave Boot Mode Is Not Functional */ |
42 | #define ANOMALY_05000324 (__SILICON_REVISION__ < 1) | 42 | #define ANOMALY_05000324 (__SILICON_REVISION__ < 1) |
43 | /* External FIFO Boot Mode Is Not Functional */ | 43 | /* FIFO Boot Mode Not Functional */ |
44 | #define ANOMALY_05000325 (__SILICON_REVISION__ < 2) | 44 | #define ANOMALY_05000325 (__SILICON_REVISION__ < 2) |
45 | /* Data Lost When Core and DMA Accesses Are Made to the USB FIFO Simultaneously */ | 45 | /* Data Lost When Core and DMA Accesses Are Made to the USB FIFO Simultaneously */ |
46 | #define ANOMALY_05000327 (__SILICON_REVISION__ < 1) | 46 | #define ANOMALY_05000327 (__SILICON_REVISION__ < 1) |
@@ -178,8 +178,12 @@ | |||
178 | #define ANOMALY_05000450 (1) | 178 | #define ANOMALY_05000450 (1) |
179 | /* USB Receive Interrupt Is Not Generated in DMA Mode 1 */ | 179 | /* USB Receive Interrupt Is Not Generated in DMA Mode 1 */ |
180 | #define ANOMALY_05000456 (__SILICON_REVISION__ < 3) | 180 | #define ANOMALY_05000456 (__SILICON_REVISION__ < 3) |
181 | /* False Hardware Error when RETI points to invalid memory */ | 181 | /* False Hardware Error when RETI Points to Invalid Memory */ |
182 | #define ANOMALY_05000461 (1) | 182 | #define ANOMALY_05000461 (1) |
183 | /* USB Rx DMA hang */ | ||
184 | #define ANOMALY_05000465 (1) | ||
185 | /* Possible RX data corruption when control & data EP FIFOs are accessed via the core */ | ||
186 | #define ANOMALY_05000467 (1) | ||
183 | 187 | ||
184 | /* Anomalies that don't exist on this proc */ | 188 | /* Anomalies that don't exist on this proc */ |
185 | #define ANOMALY_05000099 (0) | 189 | #define ANOMALY_05000099 (0) |
@@ -189,30 +193,36 @@ | |||
189 | #define ANOMALY_05000158 (0) | 193 | #define ANOMALY_05000158 (0) |
190 | #define ANOMALY_05000171 (0) | 194 | #define ANOMALY_05000171 (0) |
191 | #define ANOMALY_05000179 (0) | 195 | #define ANOMALY_05000179 (0) |
196 | #define ANOMALY_05000182 (0) | ||
192 | #define ANOMALY_05000183 (0) | 197 | #define ANOMALY_05000183 (0) |
193 | #define ANOMALY_05000198 (0) | 198 | #define ANOMALY_05000198 (0) |
199 | #define ANOMALY_05000202 (0) | ||
194 | #define ANOMALY_05000215 (0) | 200 | #define ANOMALY_05000215 (0) |
195 | #define ANOMALY_05000220 (0) | 201 | #define ANOMALY_05000220 (0) |
196 | #define ANOMALY_05000227 (0) | 202 | #define ANOMALY_05000227 (0) |
197 | #define ANOMALY_05000230 (0) | 203 | #define ANOMALY_05000230 (0) |
198 | #define ANOMALY_05000231 (0) | 204 | #define ANOMALY_05000231 (0) |
199 | #define ANOMALY_05000233 (0) | 205 | #define ANOMALY_05000233 (0) |
206 | #define ANOMALY_05000234 (0) | ||
200 | #define ANOMALY_05000242 (0) | 207 | #define ANOMALY_05000242 (0) |
201 | #define ANOMALY_05000244 (0) | 208 | #define ANOMALY_05000244 (0) |
202 | #define ANOMALY_05000248 (0) | 209 | #define ANOMALY_05000248 (0) |
203 | #define ANOMALY_05000250 (0) | 210 | #define ANOMALY_05000250 (0) |
204 | #define ANOMALY_05000254 (0) | 211 | #define ANOMALY_05000254 (0) |
212 | #define ANOMALY_05000257 (0) | ||
205 | #define ANOMALY_05000261 (0) | 213 | #define ANOMALY_05000261 (0) |
206 | #define ANOMALY_05000263 (0) | 214 | #define ANOMALY_05000263 (0) |
207 | #define ANOMALY_05000266 (0) | 215 | #define ANOMALY_05000266 (0) |
208 | #define ANOMALY_05000273 (0) | 216 | #define ANOMALY_05000273 (0) |
209 | #define ANOMALY_05000274 (0) | 217 | #define ANOMALY_05000274 (0) |
210 | #define ANOMALY_05000278 (0) | 218 | #define ANOMALY_05000278 (0) |
219 | #define ANOMALY_05000283 (0) | ||
211 | #define ANOMALY_05000287 (0) | 220 | #define ANOMALY_05000287 (0) |
212 | #define ANOMALY_05000301 (0) | 221 | #define ANOMALY_05000301 (0) |
213 | #define ANOMALY_05000305 (0) | 222 | #define ANOMALY_05000305 (0) |
214 | #define ANOMALY_05000307 (0) | 223 | #define ANOMALY_05000307 (0) |
215 | #define ANOMALY_05000311 (0) | 224 | #define ANOMALY_05000311 (0) |
225 | #define ANOMALY_05000315 (0) | ||
216 | #define ANOMALY_05000323 (0) | 226 | #define ANOMALY_05000323 (0) |
217 | #define ANOMALY_05000362 (1) | 227 | #define ANOMALY_05000362 (1) |
218 | #define ANOMALY_05000363 (0) | 228 | #define ANOMALY_05000363 (0) |
diff --git a/arch/blackfin/mach-bf548/include/mach/blackfin.h b/arch/blackfin/mach-bf548/include/mach/blackfin.h index cf6c1500222a..6b97396d817f 100644 --- a/arch/blackfin/mach-bf548/include/mach/blackfin.h +++ b/arch/blackfin/mach-bf548/include/mach/blackfin.h | |||
@@ -33,7 +33,6 @@ | |||
33 | #define _MACH_BLACKFIN_H_ | 33 | #define _MACH_BLACKFIN_H_ |
34 | 34 | ||
35 | #include "bf548.h" | 35 | #include "bf548.h" |
36 | #include "mem_map.h" | ||
37 | #include "anomaly.h" | 36 | #include "anomaly.h" |
38 | 37 | ||
39 | #ifdef CONFIG_BF542 | 38 | #ifdef CONFIG_BF542 |
diff --git a/arch/blackfin/mach-bf548/include/mach/mem_map.h b/arch/blackfin/mach-bf548/include/mach/mem_map.h index 70b9c1194024..caac2dfb41eb 100644 --- a/arch/blackfin/mach-bf548/include/mach/mem_map.h +++ b/arch/blackfin/mach-bf548/include/mach/mem_map.h | |||
@@ -1,38 +1,16 @@ | |||
1 | /* | 1 | /* |
2 | * file: include/asm-blackfin/mach-bf548/mem_map.h | 2 | * BF548 memory map |
3 | * based on: | ||
4 | * author: | ||
5 | * | 3 | * |
6 | * created: | 4 | * Copyright 2004-2009 Analog Devices Inc. |
7 | * description: | 5 | * Licensed under the GPL-2 or later. |
8 | * Memory MAP Common header file for blackfin BF537/6/4 of processors. | ||
9 | * rev: | ||
10 | * | ||
11 | * modified: | ||
12 | * | ||
13 | * bugs: enter bugs at http://blackfin.uclinux.org/ | ||
14 | * | ||
15 | * this program is free software; you can redistribute it and/or modify | ||
16 | * it under the terms of the gnu general public license as published by | ||
17 | * the free software foundation; either version 2, or (at your option) | ||
18 | * any later version. | ||
19 | * | ||
20 | * this program is distributed in the hope that it will be useful, | ||
21 | * but without any warranty; without even the implied warranty of | ||
22 | * merchantability or fitness for a particular purpose. see the | ||
23 | * gnu general public license for more details. | ||
24 | * | ||
25 | * you should have received a copy of the gnu general public license | ||
26 | * along with this program; see the file copying. | ||
27 | * if not, write to the free software foundation, | ||
28 | * 59 temple place - suite 330, boston, ma 02111-1307, usa. | ||
29 | */ | 6 | */ |
30 | 7 | ||
31 | #ifndef _MEM_MAP_548_H_ | 8 | #ifndef __BFIN_MACH_MEM_MAP_H__ |
32 | #define _MEM_MAP_548_H_ | 9 | #define __BFIN_MACH_MEM_MAP_H__ |
33 | 10 | ||
34 | #define COREMMR_BASE 0xFFE00000 /* Core MMRs */ | 11 | #ifndef __BFIN_MEM_MAP_H__ |
35 | #define SYSMMR_BASE 0xFFC00000 /* System MMRs */ | 12 | # error "do not include mach/mem_map.h directly -- use asm/mem_map.h" |
13 | #endif | ||
36 | 14 | ||
37 | /* Async Memory Banks */ | 15 | /* Async Memory Banks */ |
38 | #define ASYNC_BANK3_BASE 0x2C000000 /* Async Bank 3 */ | 16 | #define ASYNC_BANK3_BASE 0x2C000000 /* Async Bank 3 */ |
@@ -103,15 +81,4 @@ | |||
103 | # define L2_LENGTH 0x20000 | 81 | # define L2_LENGTH 0x20000 |
104 | #endif | 82 | #endif |
105 | 83 | ||
106 | /* Scratch Pad Memory */ | 84 | #endif |
107 | |||
108 | #define L1_SCRATCH_START 0xFFB00000 | ||
109 | #define L1_SCRATCH_LENGTH 0x1000 | ||
110 | |||
111 | #define GET_PDA_SAFE(preg) \ | ||
112 | preg.l = _cpu_pda; \ | ||
113 | preg.h = _cpu_pda; | ||
114 | |||
115 | #define GET_PDA(preg, dreg) GET_PDA_SAFE(preg) | ||
116 | |||
117 | #endif/* _MEM_MAP_548_H_ */ | ||