diff options
Diffstat (limited to 'arch/blackfin/mach-bf548/boards/ezkit.c')
-rw-r--r-- | arch/blackfin/mach-bf548/boards/ezkit.c | 447 |
1 files changed, 429 insertions, 18 deletions
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c index 60193f72777c..6fcfb9187c35 100644 --- a/arch/blackfin/mach-bf548/boards/ezkit.c +++ b/arch/blackfin/mach-bf548/boards/ezkit.c | |||
@@ -232,44 +232,211 @@ static struct platform_device rtc_device = { | |||
232 | #endif | 232 | #endif |
233 | 233 | ||
234 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | 234 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
235 | static struct resource bfin_uart_resources[] = { | ||
236 | #ifdef CONFIG_SERIAL_BFIN_UART0 | 235 | #ifdef CONFIG_SERIAL_BFIN_UART0 |
236 | static struct resource bfin_uart0_resources[] = { | ||
237 | { | 237 | { |
238 | .start = 0xFFC00400, | 238 | .start = UART0_DLL, |
239 | .end = 0xFFC004FF, | 239 | .end = UART0_RBR+2, |
240 | .flags = IORESOURCE_MEM, | 240 | .flags = IORESOURCE_MEM, |
241 | }, | 241 | }, |
242 | { | ||
243 | .start = IRQ_UART0_RX, | ||
244 | .end = IRQ_UART0_RX+1, | ||
245 | .flags = IORESOURCE_IRQ, | ||
246 | }, | ||
247 | { | ||
248 | .start = IRQ_UART0_ERROR, | ||
249 | .end = IRQ_UART0_ERROR, | ||
250 | .flags = IORESOURCE_IRQ, | ||
251 | }, | ||
252 | { | ||
253 | .start = CH_UART0_TX, | ||
254 | .end = CH_UART0_TX, | ||
255 | .flags = IORESOURCE_DMA, | ||
256 | }, | ||
257 | { | ||
258 | .start = CH_UART0_RX, | ||
259 | .end = CH_UART0_RX, | ||
260 | .flags = IORESOURCE_DMA, | ||
261 | }, | ||
262 | }; | ||
263 | |||
264 | unsigned short bfin_uart0_peripherals[] = { | ||
265 | P_UART0_TX, P_UART0_RX, 0 | ||
266 | }; | ||
267 | |||
268 | static struct platform_device bfin_uart0_device = { | ||
269 | .name = "bfin-uart", | ||
270 | .id = 0, | ||
271 | .num_resources = ARRAY_SIZE(bfin_uart0_resources), | ||
272 | .resource = bfin_uart0_resources, | ||
273 | .dev = { | ||
274 | .platform_data = &bfin_uart0_peripherals, /* Passed to driver */ | ||
275 | }, | ||
276 | }; | ||
242 | #endif | 277 | #endif |
243 | #ifdef CONFIG_SERIAL_BFIN_UART1 | 278 | #ifdef CONFIG_SERIAL_BFIN_UART1 |
279 | static struct resource bfin_uart1_resources[] = { | ||
244 | { | 280 | { |
245 | .start = 0xFFC02000, | 281 | .start = UART1_DLL, |
246 | .end = 0xFFC020FF, | 282 | .end = UART1_RBR+2, |
247 | .flags = IORESOURCE_MEM, | 283 | .flags = IORESOURCE_MEM, |
248 | }, | 284 | }, |
285 | { | ||
286 | .start = IRQ_UART1_RX, | ||
287 | .end = IRQ_UART1_RX+1, | ||
288 | .flags = IORESOURCE_IRQ, | ||
289 | }, | ||
290 | { | ||
291 | .start = IRQ_UART1_ERROR, | ||
292 | .end = IRQ_UART1_ERROR, | ||
293 | .flags = IORESOURCE_IRQ, | ||
294 | }, | ||
295 | { | ||
296 | .start = CH_UART1_TX, | ||
297 | .end = CH_UART1_TX, | ||
298 | .flags = IORESOURCE_DMA, | ||
299 | }, | ||
300 | { | ||
301 | .start = CH_UART1_RX, | ||
302 | .end = CH_UART1_RX, | ||
303 | .flags = IORESOURCE_DMA, | ||
304 | }, | ||
305 | #ifdef CONFIG_BFIN_UART1_CTSRTS | ||
306 | { /* CTS pin -- 0 means not supported */ | ||
307 | .start = GPIO_PE10, | ||
308 | .end = GPIO_PE10, | ||
309 | .flags = IORESOURCE_IO, | ||
310 | }, | ||
311 | { /* RTS pin -- 0 means not supported */ | ||
312 | .start = GPIO_PE9, | ||
313 | .end = GPIO_PE9, | ||
314 | .flags = IORESOURCE_IO, | ||
315 | }, | ||
316 | #endif | ||
317 | }; | ||
318 | |||
319 | unsigned short bfin_uart1_peripherals[] = { | ||
320 | P_UART1_TX, P_UART1_RX, | ||
321 | #ifdef CONFIG_BFIN_UART1_CTSRTS | ||
322 | P_UART1_RTS, P_UART1_CTS, | ||
323 | #endif | ||
324 | 0 | ||
325 | }; | ||
326 | |||
327 | static struct platform_device bfin_uart1_device = { | ||
328 | .name = "bfin-uart", | ||
329 | .id = 1, | ||
330 | .num_resources = ARRAY_SIZE(bfin_uart1_resources), | ||
331 | .resource = bfin_uart1_resources, | ||
332 | .dev = { | ||
333 | .platform_data = &bfin_uart1_peripherals, /* Passed to driver */ | ||
334 | }, | ||
335 | }; | ||
249 | #endif | 336 | #endif |
250 | #ifdef CONFIG_SERIAL_BFIN_UART2 | 337 | #ifdef CONFIG_SERIAL_BFIN_UART2 |
338 | static struct resource bfin_uart2_resources[] = { | ||
251 | { | 339 | { |
252 | .start = 0xFFC02100, | 340 | .start = UART2_DLL, |
253 | .end = 0xFFC021FF, | 341 | .end = UART2_RBR+2, |
254 | .flags = IORESOURCE_MEM, | 342 | .flags = IORESOURCE_MEM, |
255 | }, | 343 | }, |
344 | { | ||
345 | .start = IRQ_UART2_RX, | ||
346 | .end = IRQ_UART2_RX+1, | ||
347 | .flags = IORESOURCE_IRQ, | ||
348 | }, | ||
349 | { | ||
350 | .start = IRQ_UART2_ERROR, | ||
351 | .end = IRQ_UART2_ERROR, | ||
352 | .flags = IORESOURCE_IRQ, | ||
353 | }, | ||
354 | { | ||
355 | .start = CH_UART2_TX, | ||
356 | .end = CH_UART2_TX, | ||
357 | .flags = IORESOURCE_DMA, | ||
358 | }, | ||
359 | { | ||
360 | .start = CH_UART2_RX, | ||
361 | .end = CH_UART2_RX, | ||
362 | .flags = IORESOURCE_DMA, | ||
363 | }, | ||
364 | }; | ||
365 | |||
366 | unsigned short bfin_uart2_peripherals[] = { | ||
367 | P_UART2_TX, P_UART2_RX, 0 | ||
368 | }; | ||
369 | |||
370 | static struct platform_device bfin_uart2_device = { | ||
371 | .name = "bfin-uart", | ||
372 | .id = 2, | ||
373 | .num_resources = ARRAY_SIZE(bfin_uart2_resources), | ||
374 | .resource = bfin_uart2_resources, | ||
375 | .dev = { | ||
376 | .platform_data = &bfin_uart2_peripherals, /* Passed to driver */ | ||
377 | }, | ||
378 | }; | ||
256 | #endif | 379 | #endif |
257 | #ifdef CONFIG_SERIAL_BFIN_UART3 | 380 | #ifdef CONFIG_SERIAL_BFIN_UART3 |
381 | static struct resource bfin_uart3_resources[] = { | ||
258 | { | 382 | { |
259 | .start = 0xFFC03100, | 383 | .start = UART3_DLL, |
260 | .end = 0xFFC031FF, | 384 | .end = UART3_RBR+2, |
261 | .flags = IORESOURCE_MEM, | 385 | .flags = IORESOURCE_MEM, |
262 | }, | 386 | }, |
387 | { | ||
388 | .start = IRQ_UART3_RX, | ||
389 | .end = IRQ_UART3_RX+1, | ||
390 | .flags = IORESOURCE_IRQ, | ||
391 | }, | ||
392 | { | ||
393 | .start = IRQ_UART3_ERROR, | ||
394 | .end = IRQ_UART3_ERROR, | ||
395 | .flags = IORESOURCE_IRQ, | ||
396 | }, | ||
397 | { | ||
398 | .start = CH_UART3_TX, | ||
399 | .end = CH_UART3_TX, | ||
400 | .flags = IORESOURCE_DMA, | ||
401 | }, | ||
402 | { | ||
403 | .start = CH_UART3_RX, | ||
404 | .end = CH_UART3_RX, | ||
405 | .flags = IORESOURCE_DMA, | ||
406 | }, | ||
407 | #ifdef CONFIG_BFIN_UART3_CTSRTS | ||
408 | { /* CTS pin -- 0 means not supported */ | ||
409 | .start = GPIO_PB3, | ||
410 | .end = GPIO_PB3, | ||
411 | .flags = IORESOURCE_IO, | ||
412 | }, | ||
413 | { /* RTS pin -- 0 means not supported */ | ||
414 | .start = GPIO_PB2, | ||
415 | .end = GPIO_PB2, | ||
416 | .flags = IORESOURCE_IO, | ||
417 | }, | ||
263 | #endif | 418 | #endif |
264 | }; | 419 | }; |
265 | 420 | ||
266 | static struct platform_device bfin_uart_device = { | 421 | unsigned short bfin_uart3_peripherals[] = { |
422 | P_UART3_TX, P_UART3_RX, | ||
423 | #ifdef CONFIG_BFIN_UART3_CTSRTS | ||
424 | P_UART3_RTS, P_UART3_CTS, | ||
425 | #endif | ||
426 | 0 | ||
427 | }; | ||
428 | |||
429 | static struct platform_device bfin_uart3_device = { | ||
267 | .name = "bfin-uart", | 430 | .name = "bfin-uart", |
268 | .id = 1, | 431 | .id = 3, |
269 | .num_resources = ARRAY_SIZE(bfin_uart_resources), | 432 | .num_resources = ARRAY_SIZE(bfin_uart3_resources), |
270 | .resource = bfin_uart_resources, | 433 | .resource = bfin_uart3_resources, |
434 | .dev = { | ||
435 | .platform_data = &bfin_uart3_peripherals, /* Passed to driver */ | ||
436 | }, | ||
271 | }; | 437 | }; |
272 | #endif | 438 | #endif |
439 | #endif | ||
273 | 440 | ||
274 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) | 441 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
275 | #ifdef CONFIG_BFIN_SIR0 | 442 | #ifdef CONFIG_BFIN_SIR0 |
@@ -436,6 +603,10 @@ static struct musb_hdrc_config musb_config = { | |||
436 | .num_eps = 8, | 603 | .num_eps = 8, |
437 | .dma_channels = 8, | 604 | .dma_channels = 8, |
438 | .gpio_vrsel = GPIO_PE7, | 605 | .gpio_vrsel = GPIO_PE7, |
606 | /* Some custom boards need to be active low, just set it to "0" | ||
607 | * if it is the case. | ||
608 | */ | ||
609 | .gpio_vrsel_active = 1, | ||
439 | }; | 610 | }; |
440 | 611 | ||
441 | static struct musb_hdrc_platform_data musb_plat = { | 612 | static struct musb_hdrc_platform_data musb_plat = { |
@@ -464,6 +635,145 @@ static struct platform_device musb_device = { | |||
464 | }; | 635 | }; |
465 | #endif | 636 | #endif |
466 | 637 | ||
638 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | ||
639 | #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART | ||
640 | static struct resource bfin_sport0_uart_resources[] = { | ||
641 | { | ||
642 | .start = SPORT0_TCR1, | ||
643 | .end = SPORT0_MRCS3+4, | ||
644 | .flags = IORESOURCE_MEM, | ||
645 | }, | ||
646 | { | ||
647 | .start = IRQ_SPORT0_RX, | ||
648 | .end = IRQ_SPORT0_RX+1, | ||
649 | .flags = IORESOURCE_IRQ, | ||
650 | }, | ||
651 | { | ||
652 | .start = IRQ_SPORT0_ERROR, | ||
653 | .end = IRQ_SPORT0_ERROR, | ||
654 | .flags = IORESOURCE_IRQ, | ||
655 | }, | ||
656 | }; | ||
657 | |||
658 | unsigned short bfin_sport0_peripherals[] = { | ||
659 | P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, | ||
660 | P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0 | ||
661 | }; | ||
662 | |||
663 | static struct platform_device bfin_sport0_uart_device = { | ||
664 | .name = "bfin-sport-uart", | ||
665 | .id = 0, | ||
666 | .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources), | ||
667 | .resource = bfin_sport0_uart_resources, | ||
668 | .dev = { | ||
669 | .platform_data = &bfin_sport0_peripherals, /* Passed to driver */ | ||
670 | }, | ||
671 | }; | ||
672 | #endif | ||
673 | #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART | ||
674 | static struct resource bfin_sport1_uart_resources[] = { | ||
675 | { | ||
676 | .start = SPORT1_TCR1, | ||
677 | .end = SPORT1_MRCS3+4, | ||
678 | .flags = IORESOURCE_MEM, | ||
679 | }, | ||
680 | { | ||
681 | .start = IRQ_SPORT1_RX, | ||
682 | .end = IRQ_SPORT1_RX+1, | ||
683 | .flags = IORESOURCE_IRQ, | ||
684 | }, | ||
685 | { | ||
686 | .start = IRQ_SPORT1_ERROR, | ||
687 | .end = IRQ_SPORT1_ERROR, | ||
688 | .flags = IORESOURCE_IRQ, | ||
689 | }, | ||
690 | }; | ||
691 | |||
692 | unsigned short bfin_sport1_peripherals[] = { | ||
693 | P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, | ||
694 | P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0 | ||
695 | }; | ||
696 | |||
697 | static struct platform_device bfin_sport1_uart_device = { | ||
698 | .name = "bfin-sport-uart", | ||
699 | .id = 1, | ||
700 | .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources), | ||
701 | .resource = bfin_sport1_uart_resources, | ||
702 | .dev = { | ||
703 | .platform_data = &bfin_sport1_peripherals, /* Passed to driver */ | ||
704 | }, | ||
705 | }; | ||
706 | #endif | ||
707 | #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART | ||
708 | static struct resource bfin_sport2_uart_resources[] = { | ||
709 | { | ||
710 | .start = SPORT2_TCR1, | ||
711 | .end = SPORT2_MRCS3+4, | ||
712 | .flags = IORESOURCE_MEM, | ||
713 | }, | ||
714 | { | ||
715 | .start = IRQ_SPORT2_RX, | ||
716 | .end = IRQ_SPORT2_RX+1, | ||
717 | .flags = IORESOURCE_IRQ, | ||
718 | }, | ||
719 | { | ||
720 | .start = IRQ_SPORT2_ERROR, | ||
721 | .end = IRQ_SPORT2_ERROR, | ||
722 | .flags = IORESOURCE_IRQ, | ||
723 | }, | ||
724 | }; | ||
725 | |||
726 | unsigned short bfin_sport2_peripherals[] = { | ||
727 | P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS, | ||
728 | P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0 | ||
729 | }; | ||
730 | |||
731 | static struct platform_device bfin_sport2_uart_device = { | ||
732 | .name = "bfin-sport-uart", | ||
733 | .id = 2, | ||
734 | .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources), | ||
735 | .resource = bfin_sport2_uart_resources, | ||
736 | .dev = { | ||
737 | .platform_data = &bfin_sport2_peripherals, /* Passed to driver */ | ||
738 | }, | ||
739 | }; | ||
740 | #endif | ||
741 | #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART | ||
742 | static struct resource bfin_sport3_uart_resources[] = { | ||
743 | { | ||
744 | .start = SPORT3_TCR1, | ||
745 | .end = SPORT3_MRCS3+4, | ||
746 | .flags = IORESOURCE_MEM, | ||
747 | }, | ||
748 | { | ||
749 | .start = IRQ_SPORT3_RX, | ||
750 | .end = IRQ_SPORT3_RX+1, | ||
751 | .flags = IORESOURCE_IRQ, | ||
752 | }, | ||
753 | { | ||
754 | .start = IRQ_SPORT3_ERROR, | ||
755 | .end = IRQ_SPORT3_ERROR, | ||
756 | .flags = IORESOURCE_IRQ, | ||
757 | }, | ||
758 | }; | ||
759 | |||
760 | unsigned short bfin_sport3_peripherals[] = { | ||
761 | P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS, | ||
762 | P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0 | ||
763 | }; | ||
764 | |||
765 | static struct platform_device bfin_sport3_uart_device = { | ||
766 | .name = "bfin-sport-uart", | ||
767 | .id = 3, | ||
768 | .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources), | ||
769 | .resource = bfin_sport3_uart_resources, | ||
770 | .dev = { | ||
771 | .platform_data = &bfin_sport3_peripherals, /* Passed to driver */ | ||
772 | }, | ||
773 | }; | ||
774 | #endif | ||
775 | #endif | ||
776 | |||
467 | #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE) | 777 | #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE) |
468 | unsigned short bfin_can_peripherals[] = { | 778 | unsigned short bfin_can_peripherals[] = { |
469 | P_CAN0_RX, P_CAN0_TX, 0 | 779 | P_CAN0_RX, P_CAN0_TX, 0 |
@@ -657,8 +967,8 @@ static struct bfin5xx_spi_chip spi_flash_chip_info = { | |||
657 | }; | 967 | }; |
658 | #endif | 968 | #endif |
659 | 969 | ||
660 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | 970 | #if defined(CONFIG_SND_BLACKFIN_AD183X) \ |
661 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | 971 | || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE) |
662 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | 972 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { |
663 | .enable_dma = 0, | 973 | .enable_dma = 0, |
664 | .bits_per_word = 16, | 974 | .bits_per_word = 16, |
@@ -714,8 +1024,8 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { | |||
714 | .mode = SPI_MODE_3, | 1024 | .mode = SPI_MODE_3, |
715 | }, | 1025 | }, |
716 | #endif | 1026 | #endif |
717 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ | 1027 | #if defined(CONFIG_SND_BLACKFIN_AD183X) \ |
718 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | 1028 | || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE) |
719 | { | 1029 | { |
720 | .modalias = "ad1836", | 1030 | .modalias = "ad1836", |
721 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | 1031 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ |
@@ -951,6 +1261,30 @@ static struct platform_device bfin_dpmc = { | |||
951 | }, | 1261 | }, |
952 | }; | 1262 | }; |
953 | 1263 | ||
1264 | #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) | ||
1265 | static struct platform_device bfin_i2s = { | ||
1266 | .name = "bfin-i2s", | ||
1267 | .id = CONFIG_SND_BF5XX_SPORT_NUM, | ||
1268 | /* TODO: add platform data here */ | ||
1269 | }; | ||
1270 | #endif | ||
1271 | |||
1272 | #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) | ||
1273 | static struct platform_device bfin_tdm = { | ||
1274 | .name = "bfin-tdm", | ||
1275 | .id = CONFIG_SND_BF5XX_SPORT_NUM, | ||
1276 | /* TODO: add platform data here */ | ||
1277 | }; | ||
1278 | #endif | ||
1279 | |||
1280 | #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE) | ||
1281 | static struct platform_device bfin_ac97 = { | ||
1282 | .name = "bfin-ac97", | ||
1283 | .id = CONFIG_SND_BF5XX_SPORT_NUM, | ||
1284 | /* TODO: add platform data here */ | ||
1285 | }; | ||
1286 | #endif | ||
1287 | |||
954 | static struct platform_device *ezkit_devices[] __initdata = { | 1288 | static struct platform_device *ezkit_devices[] __initdata = { |
955 | 1289 | ||
956 | &bfin_dpmc, | 1290 | &bfin_dpmc, |
@@ -960,7 +1294,18 @@ static struct platform_device *ezkit_devices[] __initdata = { | |||
960 | #endif | 1294 | #endif |
961 | 1295 | ||
962 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | 1296 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) |
963 | &bfin_uart_device, | 1297 | #ifdef CONFIG_SERIAL_BFIN_UART0 |
1298 | &bfin_uart0_device, | ||
1299 | #endif | ||
1300 | #ifdef CONFIG_SERIAL_BFIN_UART1 | ||
1301 | &bfin_uart1_device, | ||
1302 | #endif | ||
1303 | #ifdef CONFIG_SERIAL_BFIN_UART2 | ||
1304 | &bfin_uart2_device, | ||
1305 | #endif | ||
1306 | #ifdef CONFIG_SERIAL_BFIN_UART3 | ||
1307 | &bfin_uart3_device, | ||
1308 | #endif | ||
964 | #endif | 1309 | #endif |
965 | 1310 | ||
966 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) | 1311 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
@@ -994,6 +1339,21 @@ static struct platform_device *ezkit_devices[] __initdata = { | |||
994 | &bfin_isp1760_device, | 1339 | &bfin_isp1760_device, |
995 | #endif | 1340 | #endif |
996 | 1341 | ||
1342 | #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) | ||
1343 | #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART | ||
1344 | &bfin_sport0_uart_device, | ||
1345 | #endif | ||
1346 | #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART | ||
1347 | &bfin_sport1_uart_device, | ||
1348 | #endif | ||
1349 | #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART | ||
1350 | &bfin_sport2_uart_device, | ||
1351 | #endif | ||
1352 | #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART | ||
1353 | &bfin_sport3_uart_device, | ||
1354 | #endif | ||
1355 | #endif | ||
1356 | |||
997 | #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE) | 1357 | #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE) |
998 | &bfin_can_device, | 1358 | &bfin_can_device, |
999 | #endif | 1359 | #endif |
@@ -1037,6 +1397,18 @@ static struct platform_device *ezkit_devices[] __initdata = { | |||
1037 | #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) | 1397 | #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) |
1038 | &ezkit_flash_device, | 1398 | &ezkit_flash_device, |
1039 | #endif | 1399 | #endif |
1400 | |||
1401 | #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) | ||
1402 | &bfin_i2s, | ||
1403 | #endif | ||
1404 | |||
1405 | #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) | ||
1406 | &bfin_tdm, | ||
1407 | #endif | ||
1408 | |||
1409 | #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE) | ||
1410 | &bfin_ac97, | ||
1411 | #endif | ||
1040 | }; | 1412 | }; |
1041 | 1413 | ||
1042 | static int __init ezkit_init(void) | 1414 | static int __init ezkit_init(void) |
@@ -1058,3 +1430,42 @@ static int __init ezkit_init(void) | |||
1058 | } | 1430 | } |
1059 | 1431 | ||
1060 | arch_initcall(ezkit_init); | 1432 | arch_initcall(ezkit_init); |
1433 | |||
1434 | static struct platform_device *ezkit_early_devices[] __initdata = { | ||
1435 | #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK) | ||
1436 | #ifdef CONFIG_SERIAL_BFIN_UART0 | ||
1437 | &bfin_uart0_device, | ||
1438 | #endif | ||
1439 | #ifdef CONFIG_SERIAL_BFIN_UART1 | ||
1440 | &bfin_uart1_device, | ||
1441 | #endif | ||
1442 | #ifdef CONFIG_SERIAL_BFIN_UART2 | ||
1443 | &bfin_uart2_device, | ||
1444 | #endif | ||
1445 | #ifdef CONFIG_SERIAL_BFIN_UART3 | ||
1446 | &bfin_uart3_device, | ||
1447 | #endif | ||
1448 | #endif | ||
1449 | |||
1450 | #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE) | ||
1451 | #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART | ||
1452 | &bfin_sport0_uart_device, | ||
1453 | #endif | ||
1454 | #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART | ||
1455 | &bfin_sport1_uart_device, | ||
1456 | #endif | ||
1457 | #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART | ||
1458 | &bfin_sport2_uart_device, | ||
1459 | #endif | ||
1460 | #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART | ||
1461 | &bfin_sport3_uart_device, | ||
1462 | #endif | ||
1463 | #endif | ||
1464 | }; | ||
1465 | |||
1466 | void __init native_machine_early_platform_add_devices(void) | ||
1467 | { | ||
1468 | printk(KERN_INFO "register early platform devices\n"); | ||
1469 | early_platform_add_devices(ezkit_early_devices, | ||
1470 | ARRAY_SIZE(ezkit_early_devices)); | ||
1471 | } | ||