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Diffstat (limited to 'arch/blackfin/mach-bf538/include/mach/irq.h')
-rw-r--r--arch/blackfin/mach-bf538/include/mach/irq.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/blackfin/mach-bf538/include/mach/irq.h b/arch/blackfin/mach-bf538/include/mach/irq.h
index 60bdac4cb6a4..fdc87fe2c174 100644
--- a/arch/blackfin/mach-bf538/include/mach/irq.h
+++ b/arch/blackfin/mach-bf538/include/mach/irq.h
@@ -81,9 +81,9 @@
81#define IRQ_SPI0 BFIN_IRQ(13) /* DMA 5 Channel (SPI0) */ 81#define IRQ_SPI0 BFIN_IRQ(13) /* DMA 5 Channel (SPI0) */
82#define IRQ_UART0_RX BFIN_IRQ(14) /* DMA 6 Channel (UART0 RX) */ 82#define IRQ_UART0_RX BFIN_IRQ(14) /* DMA 6 Channel (UART0 RX) */
83#define IRQ_UART0_TX BFIN_IRQ(15) /* DMA 7 Channel (UART0 TX) */ 83#define IRQ_UART0_TX BFIN_IRQ(15) /* DMA 7 Channel (UART0 TX) */
84#define IRQ_TMR0 BFIN_IRQ(16) /* Timer 0 */ 84#define IRQ_TIMER0 BFIN_IRQ(16) /* Timer 0 */
85#define IRQ_TMR1 BFIN_IRQ(17) /* Timer 1 */ 85#define IRQ_TIMER1 BFIN_IRQ(17) /* Timer 1 */
86#define IRQ_TMR2 BFIN_IRQ(18) /* Timer 2 */ 86#define IRQ_TIMER2 BFIN_IRQ(18) /* Timer 2 */
87#define IRQ_PORTF_INTA BFIN_IRQ(19) /* Port F Interrupt A */ 87#define IRQ_PORTF_INTA BFIN_IRQ(19) /* Port F Interrupt A */
88#define IRQ_PORTF_INTB BFIN_IRQ(20) /* Port F Interrupt B */ 88#define IRQ_PORTF_INTB BFIN_IRQ(20) /* Port F Interrupt B */
89#define IRQ_MEM0_DMA0 BFIN_IRQ(21) /* MDMA0 Stream 0 */ 89#define IRQ_MEM0_DMA0 BFIN_IRQ(21) /* MDMA0 Stream 0 */
@@ -168,9 +168,9 @@
168#define IRQ_UART0_TX_POS 28 168#define IRQ_UART0_TX_POS 28
169 169
170/* IAR2 BIT FIELDS */ 170/* IAR2 BIT FIELDS */
171#define IRQ_TMR0_POS 0 171#define IRQ_TIMER0_POS 0
172#define IRQ_TMR1_POS 4 172#define IRQ_TIMER1_POS 4
173#define IRQ_TMR2_POS 8 173#define IRQ_TIMER2_POS 8
174#define IRQ_PORTF_INTA_POS 12 174#define IRQ_PORTF_INTA_POS 12
175#define IRQ_PORTF_INTB_POS 16 175#define IRQ_PORTF_INTB_POS 16
176#define IRQ_MEM0_DMA0_POS 20 176#define IRQ_MEM0_DMA0_POS 20