diff options
Diffstat (limited to 'arch/blackfin/mach-bf538/include/mach/cdefBF538.h')
-rw-r--r-- | arch/blackfin/mach-bf538/include/mach/cdefBF538.h | 65 |
1 files changed, 62 insertions, 3 deletions
diff --git a/arch/blackfin/mach-bf538/include/mach/cdefBF538.h b/arch/blackfin/mach-bf538/include/mach/cdefBF538.h index 241725bc6988..99ca3f4305e2 100644 --- a/arch/blackfin/mach-bf538/include/mach/cdefBF538.h +++ b/arch/blackfin/mach-bf538/include/mach/cdefBF538.h | |||
@@ -67,14 +67,14 @@ | |||
67 | #define bfin_write_SIC_ISR0(val) bfin_write32(SIC_ISR0, val) | 67 | #define bfin_write_SIC_ISR0(val) bfin_write32(SIC_ISR0, val) |
68 | #define bfin_read_SIC_ISR1() bfin_read32(SIC_ISR1) | 68 | #define bfin_read_SIC_ISR1() bfin_read32(SIC_ISR1) |
69 | #define bfin_write_SIC_ISR1(val) bfin_write32(SIC_ISR1, val) | 69 | #define bfin_write_SIC_ISR1(val) bfin_write32(SIC_ISR1, val) |
70 | #define bfin_read_SIC_ISR(x) bfin_read32(SIC_ISR0 + x * (SIC_ISR1 - SIC_ISR0)) | 70 | #define bfin_read_SIC_ISR(x) bfin_read32(SIC_ISR0 + x * (SIC_ISR1 - SIC_ISR0)) |
71 | #define bfin_write_SIC_ISR(x, val) bfin_write32(SIC_ISR0 + x * (SIC_ISR1 - SIC_ISR0), val) | 71 | #define bfin_write_SIC_ISR(x, val) bfin_write32(SIC_ISR0 + x * (SIC_ISR1 - SIC_ISR0), val) |
72 | #define bfin_read_SIC_IWR0() bfin_read32(SIC_IWR0) | 72 | #define bfin_read_SIC_IWR0() bfin_read32(SIC_IWR0) |
73 | #define bfin_write_SIC_IWR0(val) bfin_write32(SIC_IWR0, val) | 73 | #define bfin_write_SIC_IWR0(val) bfin_write32(SIC_IWR0, val) |
74 | #define bfin_read_SIC_IWR1() bfin_read32(SIC_IWR1) | 74 | #define bfin_read_SIC_IWR1() bfin_read32(SIC_IWR1) |
75 | #define bfin_write_SIC_IWR1(val) bfin_write32(SIC_IWR1, val) | 75 | #define bfin_write_SIC_IWR1(val) bfin_write32(SIC_IWR1, val) |
76 | #define bfin_read_SIC_IWR(x) bfin_read32(SIC_IWR0 + x * (SIC_IWR1 - SIC_IWR0)) | 76 | #define bfin_read_SIC_IWR(x) bfin_read32(SIC_IWR0 + x * (SIC_IWR1 - SIC_IWR0)) |
77 | #define bfin_write_SIC_IWR(x, val) bfin_write32((SIC_IWR0 + x * (SIC_IWR1 - SIC_IWR0), val) | 77 | #define bfin_write_SIC_IWR(x, val) bfin_write32(SIC_IWR0 + x * (SIC_IWR1 - SIC_IWR0), val) |
78 | #define bfin_read_SIC_IAR0() bfin_read32(SIC_IAR0) | 78 | #define bfin_read_SIC_IAR0() bfin_read32(SIC_IAR0) |
79 | #define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0, val) | 79 | #define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0, val) |
80 | #define bfin_read_SIC_IAR1() bfin_read32(SIC_IAR1) | 80 | #define bfin_read_SIC_IAR1() bfin_read32(SIC_IAR1) |
@@ -1247,6 +1247,65 @@ | |||
1247 | #define bfin_write_MDMA1_S1_CURR_X_COUNT(val) bfin_write16(MDMA1_S1_CURR_X_COUNT, val) | 1247 | #define bfin_write_MDMA1_S1_CURR_X_COUNT(val) bfin_write16(MDMA1_S1_CURR_X_COUNT, val) |
1248 | #define bfin_read_MDMA1_S1_CURR_Y_COUNT() bfin_read16(MDMA1_S1_CURR_Y_COUNT) | 1248 | #define bfin_read_MDMA1_S1_CURR_Y_COUNT() bfin_read16(MDMA1_S1_CURR_Y_COUNT) |
1249 | #define bfin_write_MDMA1_S1_CURR_Y_COUNT(val) bfin_write16(MDMA1_S1_CURR_Y_COUNT, val) | 1249 | #define bfin_write_MDMA1_S1_CURR_Y_COUNT(val) bfin_write16(MDMA1_S1_CURR_Y_COUNT, val) |
1250 | |||
1251 | #define bfin_read_MDMA_S0_CONFIG() bfin_read_MDMA0_S0_CONFIG() | ||
1252 | #define bfin_write_MDMA_S0_CONFIG(val) bfin_write_MDMA0_S0_CONFIG(val) | ||
1253 | #define bfin_read_MDMA_S0_IRQ_STATUS() bfin_read_MDMA0_S0_IRQ_STATUS() | ||
1254 | #define bfin_write_MDMA_S0_IRQ_STATUS(val) bfin_write_MDMA0_S0_IRQ_STATUS(val) | ||
1255 | #define bfin_read_MDMA_S0_X_MODIFY() bfin_read_MDMA0_S0_X_MODIFY() | ||
1256 | #define bfin_write_MDMA_S0_X_MODIFY(val) bfin_write_MDMA0_S0_X_MODIFY(val) | ||
1257 | #define bfin_read_MDMA_S0_Y_MODIFY() bfin_read_MDMA0_S0_Y_MODIFY() | ||
1258 | #define bfin_write_MDMA_S0_Y_MODIFY(val) bfin_write_MDMA0_S0_Y_MODIFY(val) | ||
1259 | #define bfin_read_MDMA_S0_X_COUNT() bfin_read_MDMA0_S0_X_COUNT() | ||
1260 | #define bfin_write_MDMA_S0_X_COUNT(val) bfin_write_MDMA0_S0_X_COUNT(val) | ||
1261 | #define bfin_read_MDMA_S0_Y_COUNT() bfin_read_MDMA0_S0_Y_COUNT() | ||
1262 | #define bfin_write_MDMA_S0_Y_COUNT(val) bfin_write_MDMA0_S0_Y_COUNT(val) | ||
1263 | #define bfin_read_MDMA_S0_START_ADDR() bfin_read_MDMA0_S0_START_ADDR() | ||
1264 | #define bfin_write_MDMA_S0_START_ADDR(val) bfin_write_MDMA0_S0_START_ADDR(val) | ||
1265 | #define bfin_read_MDMA_D0_CONFIG() bfin_read_MDMA0_D0_CONFIG() | ||
1266 | #define bfin_write_MDMA_D0_CONFIG(val) bfin_write_MDMA0_D0_CONFIG(val) | ||
1267 | #define bfin_read_MDMA_D0_IRQ_STATUS() bfin_read_MDMA0_D0_IRQ_STATUS() | ||
1268 | #define bfin_write_MDMA_D0_IRQ_STATUS(val) bfin_write_MDMA0_D0_IRQ_STATUS(val) | ||
1269 | #define bfin_read_MDMA_D0_X_MODIFY() bfin_read_MDMA0_D0_X_MODIFY() | ||
1270 | #define bfin_write_MDMA_D0_X_MODIFY(val) bfin_write_MDMA0_D0_X_MODIFY(val) | ||
1271 | #define bfin_read_MDMA_D0_Y_MODIFY() bfin_read_MDMA0_D0_Y_MODIFY() | ||
1272 | #define bfin_write_MDMA_D0_Y_MODIFY(val) bfin_write_MDMA0_D0_Y_MODIFY(val) | ||
1273 | #define bfin_read_MDMA_D0_X_COUNT() bfin_read_MDMA0_D0_X_COUNT() | ||
1274 | #define bfin_write_MDMA_D0_X_COUNT(val) bfin_write_MDMA0_D0_X_COUNT(val) | ||
1275 | #define bfin_read_MDMA_D0_Y_COUNT() bfin_read_MDMA0_D0_Y_COUNT() | ||
1276 | #define bfin_write_MDMA_D0_Y_COUNT(val) bfin_write_MDMA0_D0_Y_COUNT(val) | ||
1277 | #define bfin_read_MDMA_D0_START_ADDR() bfin_read_MDMA0_D0_START_ADDR() | ||
1278 | #define bfin_write_MDMA_D0_START_ADDR(val) bfin_write_MDMA0_D0_START_ADDR(val) | ||
1279 | |||
1280 | #define bfin_read_MDMA_S1_CONFIG() bfin_read_MDMA0_S1_CONFIG() | ||
1281 | #define bfin_write_MDMA_S1_CONFIG(val) bfin_write_MDMA0_S1_CONFIG(val) | ||
1282 | #define bfin_read_MDMA_S1_IRQ_STATUS() bfin_read_MDMA0_S1_IRQ_STATUS() | ||
1283 | #define bfin_write_MDMA_S1_IRQ_STATUS(val) bfin_write_MDMA0_S1_IRQ_STATUS(val) | ||
1284 | #define bfin_read_MDMA_S1_X_MODIFY() bfin_read_MDMA0_S1_X_MODIFY() | ||
1285 | #define bfin_write_MDMA_S1_X_MODIFY(val) bfin_write_MDMA0_S1_X_MODIFY(val) | ||
1286 | #define bfin_read_MDMA_S1_Y_MODIFY() bfin_read_MDMA0_S1_Y_MODIFY() | ||
1287 | #define bfin_write_MDMA_S1_Y_MODIFY(val) bfin_write_MDMA0_S1_Y_MODIFY(val) | ||
1288 | #define bfin_read_MDMA_S1_X_COUNT() bfin_read_MDMA0_S1_X_COUNT() | ||
1289 | #define bfin_write_MDMA_S1_X_COUNT(val) bfin_write_MDMA0_S1_X_COUNT(val) | ||
1290 | #define bfin_read_MDMA_S1_Y_COUNT() bfin_read_MDMA0_S1_Y_COUNT() | ||
1291 | #define bfin_write_MDMA_S1_Y_COUNT(val) bfin_write_MDMA0_S1_Y_COUNT(val) | ||
1292 | #define bfin_read_MDMA_S1_START_ADDR() bfin_read_MDMA0_S1_START_ADDR() | ||
1293 | #define bfin_write_MDMA_S1_START_ADDR(val) bfin_write_MDMA0_S1_START_ADDR(val) | ||
1294 | #define bfin_read_MDMA_D1_CONFIG() bfin_read_MDMA0_D1_CONFIG() | ||
1295 | #define bfin_write_MDMA_D1_CONFIG(val) bfin_write_MDMA0_D1_CONFIG(val) | ||
1296 | #define bfin_read_MDMA_D1_IRQ_STATUS() bfin_read_MDMA0_D1_IRQ_STATUS() | ||
1297 | #define bfin_write_MDMA_D1_IRQ_STATUS(val) bfin_write_MDMA0_D1_IRQ_STATUS(val) | ||
1298 | #define bfin_read_MDMA_D1_X_MODIFY() bfin_read_MDMA0_D1_X_MODIFY() | ||
1299 | #define bfin_write_MDMA_D1_X_MODIFY(val) bfin_write_MDMA0_D1_X_MODIFY(val) | ||
1300 | #define bfin_read_MDMA_D1_Y_MODIFY() bfin_read_MDMA0_D1_Y_MODIFY() | ||
1301 | #define bfin_write_MDMA_D1_Y_MODIFY(val) bfin_write_MDMA0_D1_Y_MODIFY(val) | ||
1302 | #define bfin_read_MDMA_D1_X_COUNT() bfin_read_MDMA0_D1_X_COUNT() | ||
1303 | #define bfin_write_MDMA_D1_X_COUNT(val) bfin_write_MDMA0_D1_X_COUNT(val) | ||
1304 | #define bfin_read_MDMA_D1_Y_COUNT() bfin_read_MDMA0_D1_Y_COUNT() | ||
1305 | #define bfin_write_MDMA_D1_Y_COUNT(val) bfin_write_MDMA0_D1_Y_COUNT(val) | ||
1306 | #define bfin_read_MDMA_D1_START_ADDR() bfin_read_MDMA0_D1_START_ADDR() | ||
1307 | #define bfin_write_MDMA_D1_START_ADDR(val) bfin_write_MDMA0_D1_START_ADDR(val) | ||
1308 | |||
1250 | #define bfin_read_PPI_CONTROL() bfin_read16(PPI_CONTROL) | 1309 | #define bfin_read_PPI_CONTROL() bfin_read16(PPI_CONTROL) |
1251 | #define bfin_write_PPI_CONTROL(val) bfin_write16(PPI_CONTROL, val) | 1310 | #define bfin_write_PPI_CONTROL(val) bfin_write16(PPI_CONTROL, val) |
1252 | #define bfin_read_PPI_STATUS() bfin_read16(PPI_STATUS) | 1311 | #define bfin_read_PPI_STATUS() bfin_read16(PPI_STATUS) |