aboutsummaryrefslogtreecommitdiffstats
path: root/arch/blackfin/mach-bf538/boards/ezkit.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/blackfin/mach-bf538/boards/ezkit.c')
-rw-r--r--arch/blackfin/mach-bf538/boards/ezkit.c606
1 files changed, 606 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf538/boards/ezkit.c b/arch/blackfin/mach-bf538/boards/ezkit.c
new file mode 100644
index 000000000000..e37cb9378884
--- /dev/null
+++ b/arch/blackfin/mach-bf538/boards/ezkit.c
@@ -0,0 +1,606 @@
1/*
2 * File: arch/blackfin/mach-bf538/boards/ezkit.c
3 * Based on: arch/blackfin/mach-bf537/boards/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2008 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h>
34#include <linux/mtd/partitions.h>
35#include <linux/spi/spi.h>
36#include <linux/spi/flash.h>
37#include <linux/irq.h>
38#include <linux/interrupt.h>
39#include <asm/bfin5xx_spi.h>
40#include <asm/dma.h>
41#include <asm/gpio.h>
42#include <asm/nand.h>
43#include <asm/portmux.h>
44#include <asm/dpmc.h>
45#include <linux/input.h>
46
47/*
48 * Name the Board for the /proc/cpuinfo
49 */
50const char bfin_board_name[] = "ADI BF538-EZKIT";
51
52/*
53 * Driver needs to know address, irq and flag pin.
54 */
55
56
57#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
58static struct platform_device rtc_device = {
59 .name = "rtc-bfin",
60 .id = -1,
61};
62#endif
63
64#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
65static struct resource bfin_uart_resources[] = {
66#ifdef CONFIG_SERIAL_BFIN_UART0
67 {
68 .start = 0xFFC00400,
69 .end = 0xFFC004FF,
70 .flags = IORESOURCE_MEM,
71 },
72#endif
73#ifdef CONFIG_SERIAL_BFIN_UART1
74 {
75 .start = 0xFFC02000,
76 .end = 0xFFC020FF,
77 .flags = IORESOURCE_MEM,
78 },
79#endif
80#ifdef CONFIG_SERIAL_BFIN_UART2
81 {
82 .start = 0xFFC02100,
83 .end = 0xFFC021FF,
84 .flags = IORESOURCE_MEM,
85 },
86#endif
87};
88
89static struct platform_device bfin_uart_device = {
90 .name = "bfin-uart",
91 .id = 1,
92 .num_resources = ARRAY_SIZE(bfin_uart_resources),
93 .resource = bfin_uart_resources,
94};
95#endif
96
97#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
98#ifdef CONFIG_BFIN_SIR0
99static struct resource bfin_sir0_resources[] = {
100 {
101 .start = 0xFFC00400,
102 .end = 0xFFC004FF,
103 .flags = IORESOURCE_MEM,
104 },
105 {
106 .start = IRQ_UART0_RX,
107 .end = IRQ_UART0_RX+1,
108 .flags = IORESOURCE_IRQ,
109 },
110 {
111 .start = CH_UART0_RX,
112 .end = CH_UART0_RX+1,
113 .flags = IORESOURCE_DMA,
114 },
115};
116static struct platform_device bfin_sir0_device = {
117 .name = "bfin_sir",
118 .id = 0,
119 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
120 .resource = bfin_sir0_resources,
121};
122#endif
123#ifdef CONFIG_BFIN_SIR1
124static struct resource bfin_sir1_resources[] = {
125 {
126 .start = 0xFFC02000,
127 .end = 0xFFC020FF,
128 .flags = IORESOURCE_MEM,
129 },
130 {
131 .start = IRQ_UART1_RX,
132 .end = IRQ_UART1_RX+1,
133 .flags = IORESOURCE_IRQ,
134 },
135 {
136 .start = CH_UART1_RX,
137 .end = CH_UART1_RX+1,
138 .flags = IORESOURCE_DMA,
139 },
140};
141static struct platform_device bfin_sir1_device = {
142 .name = "bfin_sir",
143 .id = 1,
144 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
145 .resource = bfin_sir1_resources,
146};
147#endif
148#ifdef CONFIG_BFIN_SIR2
149static struct resource bfin_sir2_resources[] = {
150 {
151 .start = 0xFFC02100,
152 .end = 0xFFC021FF,
153 .flags = IORESOURCE_MEM,
154 },
155 {
156 .start = IRQ_UART2_RX,
157 .end = IRQ_UART2_RX+1,
158 .flags = IORESOURCE_IRQ,
159 },
160 {
161 .start = CH_UART2_RX,
162 .end = CH_UART2_RX+1,
163 .flags = IORESOURCE_DMA,
164 },
165};
166static struct platform_device bfin_sir2_device = {
167 .name = "bfin_sir",
168 .id = 2,
169 .num_resources = ARRAY_SIZE(bfin_sir2_resources),
170 .resource = bfin_sir2_resources,
171};
172#endif
173#endif
174
175/*
176 * USB-LAN EzExtender board
177 * Driver needs to know address, irq and flag pin.
178 */
179#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
180static struct resource smc91x_resources[] = {
181 {
182 .name = "smc91x-regs",
183 .start = 0x20310300,
184 .end = 0x20310300 + 16,
185 .flags = IORESOURCE_MEM,
186 }, {
187 .start = IRQ_PF0,
188 .end = IRQ_PF0,
189 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
190 },
191};
192static struct platform_device smc91x_device = {
193 .name = "smc91x",
194 .id = 0,
195 .num_resources = ARRAY_SIZE(smc91x_resources),
196 .resource = smc91x_resources,
197};
198#endif
199
200#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
201/* all SPI peripherals info goes here */
202#if defined(CONFIG_MTD_M25P80) \
203 || defined(CONFIG_MTD_M25P80_MODULE)
204/* SPI flash chip (m25p16) */
205static struct mtd_partition bfin_spi_flash_partitions[] = {
206 {
207 .name = "bootloader(spi)",
208 .size = 0x00040000,
209 .offset = 0,
210 .mask_flags = MTD_CAP_ROM
211 }, {
212 .name = "linux kernel(spi)",
213 .size = 0x1c0000,
214 .offset = 0x40000
215 }
216};
217
218static struct flash_platform_data bfin_spi_flash_data = {
219 .name = "m25p80",
220 .parts = bfin_spi_flash_partitions,
221 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
222 .type = "m25p16",
223};
224
225static struct bfin5xx_spi_chip spi_flash_chip_info = {
226 .enable_dma = 0, /* use dma transfer with this chip*/
227 .bits_per_word = 8,
228 .cs_change_per_word = 0,
229};
230#endif
231
232#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
233#include <linux/spi/ad7879.h>
234static const struct ad7879_platform_data bfin_ad7879_ts_info = {
235 .model = 7879, /* Model = AD7879 */
236 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
237 .pressure_max = 10000,
238 .pressure_min = 0,
239 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
240 .acquisition_time = 1, /* 4us acquisition time per sample */
241 .median = 2, /* do 8 measurements */
242 .averaging = 1, /* take the average of 4 middle samples */
243 .pen_down_acc_interval = 255, /* 9.4 ms */
244 .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
245 .gpio_default = 1, /* During initialization set GPIO = HIGH */
246};
247#endif
248
249#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
250static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
251 .enable_dma = 0,
252 .bits_per_word = 16,
253};
254#endif
255
256#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
257#include <asm/bfin-lq035q1.h>
258
259static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
260 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
261 .use_bl = 0, /* let something else control the LCD Blacklight */
262 .gpio_bl = GPIO_PF7,
263};
264
265static struct resource bfin_lq035q1_resources[] = {
266 {
267 .start = IRQ_PPI_ERROR,
268 .end = IRQ_PPI_ERROR,
269 .flags = IORESOURCE_IRQ,
270 },
271};
272
273static struct platform_device bfin_lq035q1_device = {
274 .name = "bfin-lq035q1",
275 .id = -1,
276 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
277 .resource = bfin_lq035q1_resources,
278 .dev = {
279 .platform_data = &bfin_lq035q1_data,
280 },
281};
282#endif
283
284#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
285static struct bfin5xx_spi_chip spidev_chip_info = {
286 .enable_dma = 0,
287 .bits_per_word = 8,
288};
289#endif
290
291#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
292static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
293 .enable_dma = 0,
294 .bits_per_word = 8,
295};
296#endif
297
298static struct spi_board_info bf538_spi_board_info[] __initdata = {
299#if defined(CONFIG_MTD_M25P80) \
300 || defined(CONFIG_MTD_M25P80_MODULE)
301 {
302 /* the modalias must be the same as spi device driver name */
303 .modalias = "m25p80", /* Name of spi_driver for this device */
304 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
305 .bus_num = 0, /* Framework bus number */
306 .chip_select = 1, /* SPI_SSEL1*/
307 .platform_data = &bfin_spi_flash_data,
308 .controller_data = &spi_flash_chip_info,
309 .mode = SPI_MODE_3,
310 },
311#endif
312#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
313 {
314 .modalias = "ad7879",
315 .platform_data = &bfin_ad7879_ts_info,
316 .irq = IRQ_PF3,
317 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
318 .bus_num = 0,
319 .chip_select = 1,
320 .controller_data = &spi_ad7879_chip_info,
321 .mode = SPI_CPHA | SPI_CPOL,
322 },
323#endif
324#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
325 {
326 .modalias = "bfin-lq035q1-spi",
327 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
328 .bus_num = 0,
329 .chip_select = 2,
330 .controller_data = &lq035q1_spi_chip_info,
331 .mode = SPI_CPHA | SPI_CPOL,
332 },
333#endif
334#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
335 {
336 .modalias = "spidev",
337 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
338 .bus_num = 0,
339 .chip_select = 1,
340 .controller_data = &spidev_chip_info,
341 },
342#endif
343};
344
345/* SPI (0) */
346static struct resource bfin_spi0_resource[] = {
347 [0] = {
348 .start = SPI0_REGBASE,
349 .end = SPI0_REGBASE + 0xFF,
350 .flags = IORESOURCE_MEM,
351 },
352 [1] = {
353 .start = CH_SPI0,
354 .end = CH_SPI0,
355 .flags = IORESOURCE_IRQ,
356 }
357};
358
359/* SPI (1) */
360static struct resource bfin_spi1_resource[] = {
361 [0] = {
362 .start = SPI1_REGBASE,
363 .end = SPI1_REGBASE + 0xFF,
364 .flags = IORESOURCE_MEM,
365 },
366 [1] = {
367 .start = CH_SPI1,
368 .end = CH_SPI1,
369 .flags = IORESOURCE_IRQ,
370 }
371};
372
373/* SPI (2) */
374static struct resource bfin_spi2_resource[] = {
375 [0] = {
376 .start = SPI2_REGBASE,
377 .end = SPI2_REGBASE + 0xFF,
378 .flags = IORESOURCE_MEM,
379 },
380 [1] = {
381 .start = CH_SPI2,
382 .end = CH_SPI2,
383 .flags = IORESOURCE_IRQ,
384 }
385};
386
387/* SPI controller data */
388static struct bfin5xx_spi_master bf538_spi_master_info0 = {
389 .num_chipselect = 8,
390 .enable_dma = 1, /* master has the ability to do dma transfer */
391 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
392};
393
394static struct platform_device bf538_spi_master0 = {
395 .name = "bfin-spi",
396 .id = 0, /* Bus number */
397 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
398 .resource = bfin_spi0_resource,
399 .dev = {
400 .platform_data = &bf538_spi_master_info0, /* Passed to driver */
401 },
402};
403
404static struct bfin5xx_spi_master bf538_spi_master_info1 = {
405 .num_chipselect = 8,
406 .enable_dma = 1, /* master has the ability to do dma transfer */
407 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
408};
409
410static struct platform_device bf538_spi_master1 = {
411 .name = "bfin-spi",
412 .id = 1, /* Bus number */
413 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
414 .resource = bfin_spi1_resource,
415 .dev = {
416 .platform_data = &bf538_spi_master_info1, /* Passed to driver */
417 },
418};
419
420static struct bfin5xx_spi_master bf538_spi_master_info2 = {
421 .num_chipselect = 8,
422 .enable_dma = 1, /* master has the ability to do dma transfer */
423 .pin_req = {P_SPI2_SCK, P_SPI2_MISO, P_SPI2_MOSI, 0},
424};
425
426static struct platform_device bf538_spi_master2 = {
427 .name = "bfin-spi",
428 .id = 2, /* Bus number */
429 .num_resources = ARRAY_SIZE(bfin_spi2_resource),
430 .resource = bfin_spi2_resource,
431 .dev = {
432 .platform_data = &bf538_spi_master_info2, /* Passed to driver */
433 },
434};
435
436#endif /* spi master and devices */
437
438#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
439static struct resource bfin_twi0_resource[] = {
440 [0] = {
441 .start = TWI0_REGBASE,
442 .end = TWI0_REGBASE + 0xFF,
443 .flags = IORESOURCE_MEM,
444 },
445 [1] = {
446 .start = IRQ_TWI0,
447 .end = IRQ_TWI0,
448 .flags = IORESOURCE_IRQ,
449 },
450};
451
452static struct platform_device i2c_bfin_twi0_device = {
453 .name = "i2c-bfin-twi",
454 .id = 0,
455 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
456 .resource = bfin_twi0_resource,
457};
458
459#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
460static struct resource bfin_twi1_resource[] = {
461 [0] = {
462 .start = TWI1_REGBASE,
463 .end = TWI1_REGBASE + 0xFF,
464 .flags = IORESOURCE_MEM,
465 },
466 [1] = {
467 .start = IRQ_TWI1,
468 .end = IRQ_TWI1,
469 .flags = IORESOURCE_IRQ,
470 },
471};
472
473static struct platform_device i2c_bfin_twi1_device = {
474 .name = "i2c-bfin-twi",
475 .id = 1,
476 .num_resources = ARRAY_SIZE(bfin_twi1_resource),
477 .resource = bfin_twi1_resource,
478};
479#endif
480#endif
481
482static struct resource bfin_gpios_resources = {
483 .start = 0,
484 .end = MAX_BLACKFIN_GPIOS - 1,
485 .flags = IORESOURCE_IRQ,
486};
487
488static struct platform_device bfin_gpios_device = {
489 .name = "simple-gpio",
490 .id = -1,
491 .num_resources = 1,
492 .resource = &bfin_gpios_resources,
493};
494
495#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
496#include <linux/gpio_keys.h>
497
498static struct gpio_keys_button bfin_gpio_keys_table[] = {
499 {BTN_0, GPIO_PC7, 1, "gpio-keys: BTN0"},
500};
501
502static struct gpio_keys_platform_data bfin_gpio_keys_data = {
503 .buttons = bfin_gpio_keys_table,
504 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
505};
506
507static struct platform_device bfin_device_gpiokeys = {
508 .name = "gpio-keys",
509 .dev = {
510 .platform_data = &bfin_gpio_keys_data,
511 },
512};
513#endif
514
515static const unsigned int cclk_vlev_datasheet[] =
516{
517/*
518 * Internal VLEV BF538SBBC1533
519 ****temporarily using these values until data sheet is updated
520 */
521 VRPAIR(VLEV_100, 150000000),
522 VRPAIR(VLEV_100, 250000000),
523 VRPAIR(VLEV_110, 276000000),
524 VRPAIR(VLEV_115, 301000000),
525 VRPAIR(VLEV_120, 525000000),
526 VRPAIR(VLEV_125, 550000000),
527 VRPAIR(VLEV_130, 600000000),
528};
529
530static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
531 .tuple_tab = cclk_vlev_datasheet,
532 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
533 .vr_settling_time = 25 /* us */,
534};
535
536static struct platform_device bfin_dpmc = {
537 .name = "bfin dpmc",
538 .dev = {
539 .platform_data = &bfin_dmpc_vreg_data,
540 },
541};
542
543static struct platform_device *cm_bf538_devices[] __initdata = {
544
545 &bfin_dpmc,
546
547#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
548 &rtc_device,
549#endif
550
551#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
552 &bfin_uart_device,
553#endif
554
555#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
556 &bf538_spi_master0,
557 &bf538_spi_master1,
558 &bf538_spi_master2,
559#endif
560
561#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
562 &i2c_bfin_twi0_device,
563 &i2c_bfin_twi1_device,
564#endif
565
566#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
567#ifdef CONFIG_BFIN_SIR0
568 &bfin_sir0_device,
569#endif
570#ifdef CONFIG_BFIN_SIR1
571 &bfin_sir1_device,
572#endif
573#ifdef CONFIG_BFIN_SIR2
574 &bfin_sir2_device,
575#endif
576#endif
577
578#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
579 &smc91x_device,
580#endif
581
582#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
583 &bfin_lq035q1_device,
584#endif
585
586#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
587 &bfin_device_gpiokeys,
588#endif
589
590 &bfin_gpios_device,
591};
592
593static int __init ezkit_init(void)
594{
595 printk(KERN_INFO "%s(): registering device resources\n", __func__);
596 platform_add_devices(cm_bf538_devices, ARRAY_SIZE(cm_bf538_devices));
597
598#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
599 spi_register_board_info(bf538_spi_board_info,
600 ARRAY_SIZE(bf538_spi_board_info));
601#endif
602
603 return 0;
604}
605
606arch_initcall(ezkit_init);
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-30 00:11:27 -0500