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-rw-r--r--arch/blackfin/mach-bf537/boards/Kconfig6
-rw-r--r--arch/blackfin/mach-bf537/boards/Makefile1
-rw-r--r--arch/blackfin/mach-bf537/boards/cm_bf537.c62
-rw-r--r--arch/blackfin/mach-bf537/boards/generic_board.c51
-rw-r--r--arch/blackfin/mach-bf537/boards/minotaur.c6
-rw-r--r--arch/blackfin/mach-bf537/boards/pnav10.c6
-rw-r--r--arch/blackfin/mach-bf537/boards/stamp.c18
-rw-r--r--arch/blackfin/mach-bf537/boards/tcm_bf537.c590
-rw-r--r--arch/blackfin/mach-bf537/head.S321
-rw-r--r--arch/blackfin/mach-bf537/ints-priority.c2
10 files changed, 674 insertions, 389 deletions
diff --git a/arch/blackfin/mach-bf537/boards/Kconfig b/arch/blackfin/mach-bf537/boards/Kconfig
index 7e789dbef036..42a57b0acb29 100644
--- a/arch/blackfin/mach-bf537/boards/Kconfig
+++ b/arch/blackfin/mach-bf537/boards/Kconfig
@@ -15,6 +15,12 @@ config BFIN537_BLUETECHNIX_CM
15 help 15 help
16 CM-BF537 support for EVAL- and DEV-Board. 16 CM-BF537 support for EVAL- and DEV-Board.
17 17
18config BFIN537_BLUETECHNIX_TCM
19 bool "Bluetechnix TCM-BF537"
20 depends on (BF537)
21 help
22 TCM-BF537 support for EVAL- and DEV-Board.
23
18config PNAV10 24config PNAV10
19 bool "PNAV board" 25 bool "PNAV board"
20 depends on (BF537) 26 depends on (BF537)
diff --git a/arch/blackfin/mach-bf537/boards/Makefile b/arch/blackfin/mach-bf537/boards/Makefile
index c94f7a5b8211..7168cc14afd8 100644
--- a/arch/blackfin/mach-bf537/boards/Makefile
+++ b/arch/blackfin/mach-bf537/boards/Makefile
@@ -5,5 +5,6 @@
5obj-$(CONFIG_GENERIC_BF537_BOARD) += generic_board.o 5obj-$(CONFIG_GENERIC_BF537_BOARD) += generic_board.o
6obj-$(CONFIG_BFIN537_STAMP) += stamp.o 6obj-$(CONFIG_BFIN537_STAMP) += stamp.o
7obj-$(CONFIG_BFIN537_BLUETECHNIX_CM) += cm_bf537.o 7obj-$(CONFIG_BFIN537_BLUETECHNIX_CM) += cm_bf537.o
8obj-$(CONFIG_BFIN537_BLUETECHNIX_TCM) += tcm_bf537.o
8obj-$(CONFIG_PNAV10) += pnav10.o 9obj-$(CONFIG_PNAV10) += pnav10.o
9obj-$(CONFIG_CAMSIG_MINOTAUR) += minotaur.o 10obj-$(CONFIG_CAMSIG_MINOTAUR) += minotaur.o
diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537.c b/arch/blackfin/mach-bf537/boards/cm_bf537.c
index 73f2142875e2..dde14720b0ea 100644
--- a/arch/blackfin/mach-bf537/boards/cm_bf537.c
+++ b/arch/blackfin/mach-bf537/boards/cm_bf537.c
@@ -33,6 +33,7 @@
33#include <linux/platform_device.h> 33#include <linux/platform_device.h>
34#include <linux/mtd/mtd.h> 34#include <linux/mtd/mtd.h>
35#include <linux/mtd/partitions.h> 35#include <linux/mtd/partitions.h>
36#include <linux/mtd/physmap.h>
36#include <linux/spi/spi.h> 37#include <linux/spi/spi.h>
37#include <linux/spi/flash.h> 38#include <linux/spi/flash.h>
38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 39#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
@@ -56,16 +57,16 @@ const char bfin_board_name[] = "Bluetechnix CM BF537";
56#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE) 57#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
57static struct mtd_partition bfin_spi_flash_partitions[] = { 58static struct mtd_partition bfin_spi_flash_partitions[] = {
58 { 59 {
59 .name = "bootloader", 60 .name = "bootloader(spi)",
60 .size = 0x00020000, 61 .size = 0x00020000,
61 .offset = 0, 62 .offset = 0,
62 .mask_flags = MTD_CAP_ROM 63 .mask_flags = MTD_CAP_ROM
63 }, { 64 }, {
64 .name = "kernel", 65 .name = "linux kernel(spi)",
65 .size = 0xe0000, 66 .size = 0xe0000,
66 .offset = 0x20000 67 .offset = 0x20000
67 }, { 68 }, {
68 .name = "file system", 69 .name = "file system(spi)",
69 .size = 0x700000, 70 .size = 0x700000,
70 .offset = 0x00100000, 71 .offset = 0x00100000,
71 } 72 }
@@ -307,6 +308,55 @@ static struct platform_device net2272_bfin_device = {
307}; 308};
308#endif 309#endif
309 310
311#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
312static struct mtd_partition cm_partitions[] = {
313 {
314 .name = "bootloader(nor)",
315 .size = 0x40000,
316 .offset = 0,
317 }, {
318 .name = "linux kernel(nor)",
319 .size = 0xE0000,
320 .offset = MTDPART_OFS_APPEND,
321 }, {
322 .name = "file system(nor)",
323 .size = MTDPART_SIZ_FULL,
324 .offset = MTDPART_OFS_APPEND,
325 }
326};
327
328static struct physmap_flash_data cm_flash_data = {
329 .width = 2,
330 .parts = cm_partitions,
331 .nr_parts = ARRAY_SIZE(cm_partitions),
332};
333
334static unsigned cm_flash_gpios[] = { GPIO_PF4 };
335
336static struct resource cm_flash_resource[] = {
337 {
338 .name = "cfi_probe",
339 .start = 0x20000000,
340 .end = 0x201fffff,
341 .flags = IORESOURCE_MEM,
342 }, {
343 .start = (unsigned long)cm_flash_gpios,
344 .end = ARRAY_SIZE(cm_flash_gpios),
345 .flags = IORESOURCE_IRQ,
346 }
347};
348
349static struct platform_device cm_flash_device = {
350 .name = "gpio-addr-flash",
351 .id = 0,
352 .dev = {
353 .platform_data = &cm_flash_data,
354 },
355 .num_resources = ARRAY_SIZE(cm_flash_resource),
356 .resource = cm_flash_resource,
357};
358#endif
359
310#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) 360#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
311static struct resource bfin_uart_resources[] = { 361static struct resource bfin_uart_resources[] = {
312 { 362 {
@@ -395,7 +445,7 @@ static struct platform_device bfin_mac_device = {
395#endif 445#endif
396 446
397#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) 447#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
398#define PATA_INT 64 448#define PATA_INT IRQ_PF14
399 449
400static struct pata_platform_info bfin_pata_platform_data = { 450static struct pata_platform_info bfin_pata_platform_data = {
401 .ioport_shift = 2, 451 .ioport_shift = 2,
@@ -510,6 +560,10 @@ static struct platform_device *cm_bf537_devices[] __initdata = {
510#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) 560#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
511 &bfin_pata_device, 561 &bfin_pata_device,
512#endif 562#endif
563
564#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
565 &cm_flash_device,
566#endif
513}; 567};
514 568
515static int __init cm_bf537_init(void) 569static int __init cm_bf537_init(void)
diff --git a/arch/blackfin/mach-bf537/boards/generic_board.c b/arch/blackfin/mach-bf537/boards/generic_board.c
index 01b63e2ec18f..78a13d5bfd55 100644
--- a/arch/blackfin/mach-bf537/boards/generic_board.c
+++ b/arch/blackfin/mach-bf537/boards/generic_board.c
@@ -38,7 +38,6 @@
38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) 38#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
39#include <linux/usb/isp1362.h> 39#include <linux/usb/isp1362.h>
40#endif 40#endif
41#include <linux/ata_platform.h>
42#include <linux/irq.h> 41#include <linux/irq.h>
43#include <linux/interrupt.h> 42#include <linux/interrupt.h>
44#include <linux/usb/sl811.h> 43#include <linux/usb/sl811.h>
@@ -307,16 +306,16 @@ static struct platform_device net2272_bfin_device = {
307 || defined(CONFIG_MTD_M25P80_MODULE) 306 || defined(CONFIG_MTD_M25P80_MODULE)
308static struct mtd_partition bfin_spi_flash_partitions[] = { 307static struct mtd_partition bfin_spi_flash_partitions[] = {
309 { 308 {
310 .name = "bootloader", 309 .name = "bootloader(spi)",
311 .size = 0x00020000, 310 .size = 0x00020000,
312 .offset = 0, 311 .offset = 0,
313 .mask_flags = MTD_CAP_ROM 312 .mask_flags = MTD_CAP_ROM
314 }, { 313 }, {
315 .name = "kernel", 314 .name = "linux kernel(spi)",
316 .size = 0xe0000, 315 .size = 0xe0000,
317 .offset = 0x20000 316 .offset = 0x20000
318 }, { 317 }, {
319 .name = "file system", 318 .name = "file system(spi)",
320 .size = 0x700000, 319 .size = 0x700000,
321 .offset = 0x00100000, 320 .offset = 0x00100000,
322 } 321 }
@@ -619,43 +618,6 @@ static struct platform_device bfin_sport1_uart_device = {
619}; 618};
620#endif 619#endif
621 620
622#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
623#define PATA_INT 55
624
625static struct pata_platform_info bfin_pata_platform_data = {
626 .ioport_shift = 1,
627 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
628};
629
630static struct resource bfin_pata_resources[] = {
631 {
632 .start = 0x20314020,
633 .end = 0x2031403F,
634 .flags = IORESOURCE_MEM,
635 },
636 {
637 .start = 0x2031401C,
638 .end = 0x2031401F,
639 .flags = IORESOURCE_MEM,
640 },
641 {
642 .start = PATA_INT,
643 .end = PATA_INT,
644 .flags = IORESOURCE_IRQ,
645 },
646};
647
648static struct platform_device bfin_pata_device = {
649 .name = "pata_platform",
650 .id = -1,
651 .num_resources = ARRAY_SIZE(bfin_pata_resources),
652 .resource = bfin_pata_resources,
653 .dev = {
654 .platform_data = &bfin_pata_platform_data,
655 }
656};
657#endif
658
659static struct platform_device *stamp_devices[] __initdata = { 621static struct platform_device *stamp_devices[] __initdata = {
660#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE) 622#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
661 &bfin_pcmcia_cf_device, 623 &bfin_pcmcia_cf_device,
@@ -717,10 +679,6 @@ static struct platform_device *stamp_devices[] __initdata = {
717 &bfin_sport0_uart_device, 679 &bfin_sport0_uart_device,
718 &bfin_sport1_uart_device, 680 &bfin_sport1_uart_device,
719#endif 681#endif
720
721#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
722 &bfin_pata_device,
723#endif
724}; 682};
725 683
726static int __init stamp_init(void) 684static int __init stamp_init(void)
@@ -732,9 +690,6 @@ static int __init stamp_init(void)
732 ARRAY_SIZE(bfin_spi_board_info)); 690 ARRAY_SIZE(bfin_spi_board_info));
733#endif 691#endif
734 692
735#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
736 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
737#endif
738 return 0; 693 return 0;
739} 694}
740 695
diff --git a/arch/blackfin/mach-bf537/boards/minotaur.c b/arch/blackfin/mach-bf537/boards/minotaur.c
index 18ddf7a52005..48c4cd2d1be6 100644
--- a/arch/blackfin/mach-bf537/boards/minotaur.c
+++ b/arch/blackfin/mach-bf537/boards/minotaur.c
@@ -100,16 +100,16 @@ static struct platform_device net2272_bfin_device = {
100 100
101static struct mtd_partition bfin_spi_flash_partitions[] = { 101static struct mtd_partition bfin_spi_flash_partitions[] = {
102 { 102 {
103 .name = "uboot", 103 .name = "bootloader(spi)",
104 .size = PSIZE_UBOOT, 104 .size = PSIZE_UBOOT,
105 .offset = 0x000000, 105 .offset = 0x000000,
106 .mask_flags = MTD_CAP_ROM 106 .mask_flags = MTD_CAP_ROM
107 }, { 107 }, {
108 .name = "initramfs", 108 .name = "initramfs(spi)",
109 .size = PSIZE_INITRAMFS, 109 .size = PSIZE_INITRAMFS,
110 .offset = PSIZE_UBOOT 110 .offset = PSIZE_UBOOT
111 }, { 111 }, {
112 .name = "opt", 112 .name = "opt(spi)",
113 .size = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS), 113 .size = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS),
114 .offset = PSIZE_UBOOT + PSIZE_INITRAMFS, 114 .offset = PSIZE_UBOOT + PSIZE_INITRAMFS,
115 } 115 }
diff --git a/arch/blackfin/mach-bf537/boards/pnav10.c b/arch/blackfin/mach-bf537/boards/pnav10.c
index 51c3bab14a69..f9174c11cbd4 100644
--- a/arch/blackfin/mach-bf537/boards/pnav10.c
+++ b/arch/blackfin/mach-bf537/boards/pnav10.c
@@ -231,16 +231,16 @@ static struct platform_device net2272_bfin_device = {
231 || defined(CONFIG_MTD_M25P80_MODULE) 231 || defined(CONFIG_MTD_M25P80_MODULE)
232static struct mtd_partition bfin_spi_flash_partitions[] = { 232static struct mtd_partition bfin_spi_flash_partitions[] = {
233 { 233 {
234 .name = "bootloader", 234 .name = "bootloader(spi)",
235 .size = 0x00020000, 235 .size = 0x00020000,
236 .offset = 0, 236 .offset = 0,
237 .mask_flags = MTD_CAP_ROM 237 .mask_flags = MTD_CAP_ROM
238 }, { 238 }, {
239 .name = "kernel", 239 .name = "linux kernel(spi)",
240 .size = 0xe0000, 240 .size = 0xe0000,
241 .offset = 0x20000 241 .offset = 0x20000
242 }, { 242 }, {
243 .name = "file system", 243 .name = "file system(spi)",
244 .size = 0x700000, 244 .size = 0x700000,
245 .offset = 0x00100000, 245 .offset = 0x00100000,
246 } 246 }
diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
index 6dbc76fb080b..e93964fdb432 100644
--- a/arch/blackfin/mach-bf537/boards/stamp.c
+++ b/arch/blackfin/mach-bf537/boards/stamp.c
@@ -364,11 +364,11 @@ const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
364 364
365static struct mtd_partition bfin_plat_nand_partitions[] = { 365static struct mtd_partition bfin_plat_nand_partitions[] = {
366 { 366 {
367 .name = "linux kernel", 367 .name = "linux kernel(nand)",
368 .size = 0x400000, 368 .size = 0x400000,
369 .offset = 0, 369 .offset = 0,
370 }, { 370 }, {
371 .name = "file system", 371 .name = "file system(nand)",
372 .size = MTDPART_SIZ_FULL, 372 .size = MTDPART_SIZ_FULL,
373 .offset = MTDPART_OFS_APPEND, 373 .offset = MTDPART_OFS_APPEND,
374 }, 374 },
@@ -439,19 +439,19 @@ static void bfin_plat_nand_init(void) {}
439#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) 439#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
440static struct mtd_partition stamp_partitions[] = { 440static struct mtd_partition stamp_partitions[] = {
441 { 441 {
442 .name = "Bootloader", 442 .name = "bootloader(nor)",
443 .size = 0x40000, 443 .size = 0x40000,
444 .offset = 0, 444 .offset = 0,
445 }, { 445 }, {
446 .name = "Kernel", 446 .name = "linux kernel(nor)",
447 .size = 0xE0000, 447 .size = 0xE0000,
448 .offset = MTDPART_OFS_APPEND, 448 .offset = MTDPART_OFS_APPEND,
449 }, { 449 }, {
450 .name = "RootFS", 450 .name = "file system(nor)",
451 .size = 0x400000 - 0x40000 - 0xE0000 - 0x10000, 451 .size = 0x400000 - 0x40000 - 0xE0000 - 0x10000,
452 .offset = MTDPART_OFS_APPEND, 452 .offset = MTDPART_OFS_APPEND,
453 }, { 453 }, {
454 .name = "MAC Address", 454 .name = "MAC Address(nor)",
455 .size = MTDPART_SIZ_FULL, 455 .size = MTDPART_SIZ_FULL,
456 .offset = 0x3F0000, 456 .offset = 0x3F0000,
457 .mask_flags = MTD_WRITEABLE, 457 .mask_flags = MTD_WRITEABLE,
@@ -485,16 +485,16 @@ static struct platform_device stamp_flash_device = {
485 || defined(CONFIG_MTD_M25P80_MODULE) 485 || defined(CONFIG_MTD_M25P80_MODULE)
486static struct mtd_partition bfin_spi_flash_partitions[] = { 486static struct mtd_partition bfin_spi_flash_partitions[] = {
487 { 487 {
488 .name = "bootloader", 488 .name = "bootloader(spi)",
489 .size = 0x00040000, 489 .size = 0x00040000,
490 .offset = 0, 490 .offset = 0,
491 .mask_flags = MTD_CAP_ROM 491 .mask_flags = MTD_CAP_ROM
492 }, { 492 }, {
493 .name = "kernel", 493 .name = "linux kernel(spi)",
494 .size = 0xe0000, 494 .size = 0xe0000,
495 .offset = MTDPART_OFS_APPEND, 495 .offset = MTDPART_OFS_APPEND,
496 }, { 496 }, {
497 .name = "file system", 497 .name = "file system(spi)",
498 .size = MTDPART_SIZ_FULL, 498 .size = MTDPART_SIZ_FULL,
499 .offset = MTDPART_OFS_APPEND, 499 .offset = MTDPART_OFS_APPEND,
500 } 500 }
diff --git a/arch/blackfin/mach-bf537/boards/tcm_bf537.c b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
new file mode 100644
index 000000000000..d5ff705a5129
--- /dev/null
+++ b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
@@ -0,0 +1,590 @@
1/*
2 * File: arch/blackfin/mach-bf537/boards/tcm_bf537.c
3 * Based on: arch/blackfin/mach-bf533/boards/cm_bf537.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created: 2005
7 * Description: Board description file
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2006 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/etherdevice.h>
33#include <linux/platform_device.h>
34#include <linux/mtd/mtd.h>
35#include <linux/mtd/partitions.h>
36#include <linux/mtd/physmap.h>
37#include <linux/spi/spi.h>
38#include <linux/spi/flash.h>
39#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
40#include <linux/usb/isp1362.h>
41#endif
42#include <linux/ata_platform.h>
43#include <linux/irq.h>
44#include <asm/dma.h>
45#include <asm/bfin5xx_spi.h>
46#include <asm/portmux.h>
47#include <asm/dpmc.h>
48
49/*
50 * Name the Board for the /proc/cpuinfo
51 */
52const char bfin_board_name[] = "Bluetechnix TCM BF537";
53
54#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
55/* all SPI peripherals info goes here */
56
57#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
58static struct mtd_partition bfin_spi_flash_partitions[] = {
59 {
60 .name = "bootloader(spi)",
61 .size = 0x00020000,
62 .offset = 0,
63 .mask_flags = MTD_CAP_ROM
64 }, {
65 .name = "linux kernel(spi)",
66 .size = 0xe0000,
67 .offset = 0x20000
68 }, {
69 .name = "file system(spi)",
70 .size = 0x700000,
71 .offset = 0x00100000,
72 }
73};
74
75static struct flash_platform_data bfin_spi_flash_data = {
76 .name = "m25p80",
77 .parts = bfin_spi_flash_partitions,
78 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
79 .type = "m25p64",
80};
81
82/* SPI flash chip (m25p64) */
83static struct bfin5xx_spi_chip spi_flash_chip_info = {
84 .enable_dma = 0, /* use dma transfer with this chip*/
85 .bits_per_word = 8,
86};
87#endif
88
89#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
90/* SPI ADC chip */
91static struct bfin5xx_spi_chip spi_adc_chip_info = {
92 .enable_dma = 1, /* use dma transfer with this chip*/
93 .bits_per_word = 16,
94};
95#endif
96
97#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
98static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
99 .enable_dma = 0,
100 .bits_per_word = 16,
101};
102#endif
103
104#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
105static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
106 .enable_dma = 0,
107 .bits_per_word = 16,
108};
109#endif
110
111#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
112static struct bfin5xx_spi_chip spi_mmc_chip_info = {
113 .enable_dma = 1,
114 .bits_per_word = 8,
115};
116#endif
117
118static struct spi_board_info bfin_spi_board_info[] __initdata = {
119#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
120 {
121 /* the modalias must be the same as spi device driver name */
122 .modalias = "m25p80", /* Name of spi_driver for this device */
123 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
124 .bus_num = 0, /* Framework bus number */
125 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
126 .platform_data = &bfin_spi_flash_data,
127 .controller_data = &spi_flash_chip_info,
128 .mode = SPI_MODE_3,
129 },
130#endif
131
132#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
133 {
134 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
135 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
136 .bus_num = 0, /* Framework bus number */
137 .chip_select = 1, /* Framework chip select. */
138 .platform_data = NULL, /* No spi_driver specific config */
139 .controller_data = &spi_adc_chip_info,
140 },
141#endif
142
143#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
144 {
145 .modalias = "ad1836-spi",
146 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
147 .bus_num = 0,
148 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
149 .controller_data = &ad1836_spi_chip_info,
150 },
151#endif
152
153#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
154 {
155 .modalias = "ad9960-spi",
156 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
157 .bus_num = 0,
158 .chip_select = 1,
159 .controller_data = &ad9960_spi_chip_info,
160 },
161#endif
162
163#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
164 {
165 .modalias = "spi_mmc_dummy",
166 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
167 .bus_num = 0,
168 .chip_select = 7,
169 .platform_data = NULL,
170 .controller_data = &spi_mmc_chip_info,
171 .mode = SPI_MODE_3,
172 },
173 {
174 .modalias = "spi_mmc",
175 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
176 .bus_num = 0,
177 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
178 .platform_data = NULL,
179 .controller_data = &spi_mmc_chip_info,
180 .mode = SPI_MODE_3,
181 },
182#endif
183};
184
185/* SPI (0) */
186static struct resource bfin_spi0_resource[] = {
187 [0] = {
188 .start = SPI0_REGBASE,
189 .end = SPI0_REGBASE + 0xFF,
190 .flags = IORESOURCE_MEM,
191 },
192 [1] = {
193 .start = CH_SPI,
194 .end = CH_SPI,
195 .flags = IORESOURCE_IRQ,
196 }
197};
198
199/* SPI controller data */
200static struct bfin5xx_spi_master bfin_spi0_info = {
201 .num_chipselect = 8,
202 .enable_dma = 1, /* master has the ability to do dma transfer */
203 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
204};
205
206static struct platform_device bfin_spi0_device = {
207 .name = "bfin-spi",
208 .id = 0, /* Bus number */
209 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
210 .resource = bfin_spi0_resource,
211 .dev = {
212 .platform_data = &bfin_spi0_info, /* Passed to driver */
213 },
214};
215#endif /* spi master and devices */
216
217#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
218static struct platform_device rtc_device = {
219 .name = "rtc-bfin",
220 .id = -1,
221};
222#endif
223
224#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
225static struct platform_device hitachi_fb_device = {
226 .name = "hitachi-tx09",
227};
228#endif
229
230#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
231static struct resource smc91x_resources[] = {
232 {
233 .start = 0x20200300,
234 .end = 0x20200300 + 16,
235 .flags = IORESOURCE_MEM,
236 }, {
237 .start = IRQ_PF14,
238 .end = IRQ_PF14,
239 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
240 },
241};
242
243static struct platform_device smc91x_device = {
244 .name = "smc91x",
245 .id = 0,
246 .num_resources = ARRAY_SIZE(smc91x_resources),
247 .resource = smc91x_resources,
248};
249#endif
250
251#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
252static struct resource isp1362_hcd_resources[] = {
253 {
254 .start = 0x20308000,
255 .end = 0x20308000,
256 .flags = IORESOURCE_MEM,
257 }, {
258 .start = 0x20308004,
259 .end = 0x20308004,
260 .flags = IORESOURCE_MEM,
261 }, {
262 .start = IRQ_PG15,
263 .end = IRQ_PG15,
264 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
265 },
266};
267
268static struct isp1362_platform_data isp1362_priv = {
269 .sel15Kres = 1,
270 .clknotstop = 0,
271 .oc_enable = 0,
272 .int_act_high = 0,
273 .int_edge_triggered = 0,
274 .remote_wakeup_connected = 0,
275 .no_power_switching = 1,
276 .power_switching_mode = 0,
277};
278
279static struct platform_device isp1362_hcd_device = {
280 .name = "isp1362-hcd",
281 .id = 0,
282 .dev = {
283 .platform_data = &isp1362_priv,
284 },
285 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
286 .resource = isp1362_hcd_resources,
287};
288#endif
289
290#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
291static struct resource net2272_bfin_resources[] = {
292 {
293 .start = 0x20200000,
294 .end = 0x20200000 + 0x100,
295 .flags = IORESOURCE_MEM,
296 }, {
297 .start = IRQ_PH14,
298 .end = IRQ_PH14,
299 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
300 },
301};
302
303static struct platform_device net2272_bfin_device = {
304 .name = "net2272",
305 .id = -1,
306 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
307 .resource = net2272_bfin_resources,
308};
309#endif
310
311#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
312static struct mtd_partition cm_partitions[] = {
313 {
314 .name = "bootloader(nor)",
315 .size = 0x40000,
316 .offset = 0,
317 }, {
318 .name = "linux kernel(nor)",
319 .size = 0xE0000,
320 .offset = MTDPART_OFS_APPEND,
321 }, {
322 .name = "file system(nor)",
323 .size = MTDPART_SIZ_FULL,
324 .offset = MTDPART_OFS_APPEND,
325 }
326};
327
328static struct physmap_flash_data cm_flash_data = {
329 .width = 2,
330 .parts = cm_partitions,
331 .nr_parts = ARRAY_SIZE(cm_partitions),
332};
333
334static unsigned cm_flash_gpios[] = { GPIO_PF4, GPIO_PF5 };
335
336static struct resource cm_flash_resource[] = {
337 {
338 .name = "cfi_probe",
339 .start = 0x20000000,
340 .end = 0x201fffff,
341 .flags = IORESOURCE_MEM,
342 }, {
343 .start = (unsigned long)cm_flash_gpios,
344 .end = ARRAY_SIZE(cm_flash_gpios),
345 .flags = IORESOURCE_IRQ,
346 }
347};
348
349static struct platform_device cm_flash_device = {
350 .name = "gpio-addr-flash",
351 .id = 0,
352 .dev = {
353 .platform_data = &cm_flash_data,
354 },
355 .num_resources = ARRAY_SIZE(cm_flash_resource),
356 .resource = cm_flash_resource,
357};
358#endif
359
360#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
361static struct resource bfin_uart_resources[] = {
362 {
363 .start = 0xFFC00400,
364 .end = 0xFFC004FF,
365 .flags = IORESOURCE_MEM,
366 }, {
367 .start = 0xFFC02000,
368 .end = 0xFFC020FF,
369 .flags = IORESOURCE_MEM,
370 },
371};
372
373static struct platform_device bfin_uart_device = {
374 .name = "bfin-uart",
375 .id = 1,
376 .num_resources = ARRAY_SIZE(bfin_uart_resources),
377 .resource = bfin_uart_resources,
378};
379#endif
380
381#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
382static struct resource bfin_sir_resources[] = {
383#ifdef CONFIG_BFIN_SIR0
384 {
385 .start = 0xFFC00400,
386 .end = 0xFFC004FF,
387 .flags = IORESOURCE_MEM,
388 },
389#endif
390#ifdef CONFIG_BFIN_SIR1
391 {
392 .start = 0xFFC02000,
393 .end = 0xFFC020FF,
394 .flags = IORESOURCE_MEM,
395 },
396#endif
397};
398
399static struct platform_device bfin_sir_device = {
400 .name = "bfin_sir",
401 .id = 0,
402 .num_resources = ARRAY_SIZE(bfin_sir_resources),
403 .resource = bfin_sir_resources,
404};
405#endif
406
407#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
408static struct resource bfin_twi0_resource[] = {
409 [0] = {
410 .start = TWI0_REGBASE,
411 .end = TWI0_REGBASE,
412 .flags = IORESOURCE_MEM,
413 },
414 [1] = {
415 .start = IRQ_TWI,
416 .end = IRQ_TWI,
417 .flags = IORESOURCE_IRQ,
418 },
419};
420
421static struct platform_device i2c_bfin_twi_device = {
422 .name = "i2c-bfin-twi",
423 .id = 0,
424 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
425 .resource = bfin_twi0_resource,
426};
427#endif
428
429#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
430static struct platform_device bfin_sport0_uart_device = {
431 .name = "bfin-sport-uart",
432 .id = 0,
433};
434
435static struct platform_device bfin_sport1_uart_device = {
436 .name = "bfin-sport-uart",
437 .id = 1,
438};
439#endif
440
441#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
442static struct platform_device bfin_mac_device = {
443 .name = "bfin_mac",
444};
445#endif
446
447#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
448#define PATA_INT IRQ_PF14
449
450static struct pata_platform_info bfin_pata_platform_data = {
451 .ioport_shift = 2,
452 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
453};
454
455static struct resource bfin_pata_resources[] = {
456 {
457 .start = 0x2030C000,
458 .end = 0x2030C01F,
459 .flags = IORESOURCE_MEM,
460 },
461 {
462 .start = 0x2030D018,
463 .end = 0x2030D01B,
464 .flags = IORESOURCE_MEM,
465 },
466 {
467 .start = PATA_INT,
468 .end = PATA_INT,
469 .flags = IORESOURCE_IRQ,
470 },
471};
472
473static struct platform_device bfin_pata_device = {
474 .name = "pata_platform",
475 .id = -1,
476 .num_resources = ARRAY_SIZE(bfin_pata_resources),
477 .resource = bfin_pata_resources,
478 .dev = {
479 .platform_data = &bfin_pata_platform_data,
480 }
481};
482#endif
483
484static const unsigned int cclk_vlev_datasheet[] =
485{
486 VRPAIR(VLEV_085, 250000000),
487 VRPAIR(VLEV_090, 376000000),
488 VRPAIR(VLEV_095, 426000000),
489 VRPAIR(VLEV_100, 426000000),
490 VRPAIR(VLEV_105, 476000000),
491 VRPAIR(VLEV_110, 476000000),
492 VRPAIR(VLEV_115, 476000000),
493 VRPAIR(VLEV_120, 500000000),
494 VRPAIR(VLEV_125, 533000000),
495 VRPAIR(VLEV_130, 600000000),
496};
497
498static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
499 .tuple_tab = cclk_vlev_datasheet,
500 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
501 .vr_settling_time = 25 /* us */,
502};
503
504static struct platform_device bfin_dpmc = {
505 .name = "bfin dpmc",
506 .dev = {
507 .platform_data = &bfin_dmpc_vreg_data,
508 },
509};
510
511static struct platform_device *cm_bf537_devices[] __initdata = {
512
513 &bfin_dpmc,
514
515#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
516 &hitachi_fb_device,
517#endif
518
519#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
520 &rtc_device,
521#endif
522
523#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
524 &bfin_uart_device,
525#endif
526
527#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
528 &bfin_sir_device,
529#endif
530
531#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
532 &i2c_bfin_twi_device,
533#endif
534
535#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
536 &bfin_sport0_uart_device,
537 &bfin_sport1_uart_device,
538#endif
539
540#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
541 &isp1362_hcd_device,
542#endif
543
544#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
545 &smc91x_device,
546#endif
547
548#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
549 &bfin_mac_device,
550#endif
551
552#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
553 &net2272_bfin_device,
554#endif
555
556#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
557 &bfin_spi0_device,
558#endif
559
560#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
561 &bfin_pata_device,
562#endif
563
564#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
565 &cm_flash_device,
566#endif
567};
568
569static int __init cm_bf537_init(void)
570{
571 printk(KERN_INFO "%s(): registering device resources\n", __func__);
572 platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
573#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
574 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
575#endif
576
577#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
578 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
579#endif
580 return 0;
581}
582
583arch_initcall(cm_bf537_init);
584
585void bfin_get_ether_addr(char *addr)
586{
587 random_ether_addr(addr);
588 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
589}
590EXPORT_SYMBOL(bfin_get_ether_addr);
diff --git a/arch/blackfin/mach-bf537/head.S b/arch/blackfin/mach-bf537/head.S
index 6b019eaee0b6..64e0287ab266 100644
--- a/arch/blackfin/mach-bf537/head.S
+++ b/arch/blackfin/mach-bf537/head.S
@@ -30,325 +30,11 @@
30#include <linux/linkage.h> 30#include <linux/linkage.h>
31#include <linux/init.h> 31#include <linux/init.h>
32#include <asm/blackfin.h> 32#include <asm/blackfin.h>
33#include <asm/trace.h>
34
35#ifdef CONFIG_BFIN_KERNEL_CLOCK 33#ifdef CONFIG_BFIN_KERNEL_CLOCK
36#include <asm/mach-common/clocks.h> 34#include <asm/mach-common/clocks.h>
37#include <asm/mach/mem_init.h> 35#include <asm/mach/mem_init.h>
38#endif 36#endif
39 37
40.extern ___bss_stop
41.extern ___bss_start
42.extern _bf53x_relocate_l1_mem
43
44#define INITIAL_STACK 0xFFB01000
45
46__INIT
47
48ENTRY(__start)
49 /* R0: argument of command line string, passed from uboot, save it */
50 R7 = R0;
51 /* Enable Cycle Counter and Nesting Of Interrupts */
52#ifdef CONFIG_BFIN_SCRATCH_REG_CYCLES
53 R0 = SYSCFG_SNEN;
54#else
55 R0 = SYSCFG_SNEN | SYSCFG_CCEN;
56#endif
57 SYSCFG = R0;
58 R0 = 0;
59
60 /* Clear Out All the data and pointer Registers */
61 R1 = R0;
62 R2 = R0;
63 R3 = R0;
64 R4 = R0;
65 R5 = R0;
66 R6 = R0;
67
68 P0 = R0;
69 P1 = R0;
70 P2 = R0;
71 P3 = R0;
72 P4 = R0;
73 P5 = R0;
74
75 LC0 = r0;
76 LC1 = r0;
77 L0 = r0;
78 L1 = r0;
79 L2 = r0;
80 L3 = r0;
81
82 /* Clear Out All the DAG Registers */
83 B0 = r0;
84 B1 = r0;
85 B2 = r0;
86 B3 = r0;
87
88 I0 = r0;
89 I1 = r0;
90 I2 = r0;
91 I3 = r0;
92
93 M0 = r0;
94 M1 = r0;
95 M2 = r0;
96 M3 = r0;
97
98 trace_buffer_init(p0,r0);
99 P0 = R1;
100 R0 = R1;
101
102 /* Turn off the icache */
103 p0.l = LO(IMEM_CONTROL);
104 p0.h = HI(IMEM_CONTROL);
105 R1 = [p0];
106 R0 = ~ENICPLB;
107 R0 = R0 & R1;
108
109 /* Anomaly 05000125 */
110#if ANOMALY_05000125
111 CLI R2;
112 SSYNC;
113#endif
114 [p0] = R0;
115 SSYNC;
116#if ANOMALY_05000125
117 STI R2;
118#endif
119
120 /* Turn off the dcache */
121 p0.l = LO(DMEM_CONTROL);
122 p0.h = HI(DMEM_CONTROL);
123 R1 = [p0];
124 R0 = ~ENDCPLB;
125 R0 = R0 & R1;
126
127 /* Anomaly 05000125 */
128#if ANOMALY_05000125
129 CLI R2;
130 SSYNC;
131#endif
132 [p0] = R0;
133 SSYNC;
134#if ANOMALY_05000125
135 STI R2;
136#endif
137
138 /* Initialise General-Purpose I/O Modules on BF537 */
139 /* Rev 0.0 Anomaly 05000212 - PORTx_FER,
140 * PORT_MUX Registers Do Not accept "writes" correctly:
141 */
142 p0.h = hi(BFIN_PORT_MUX);
143 p0.l = lo(BFIN_PORT_MUX);
144#if ANOMALY_05000212
145 R0.L = W[P0]; /* Read */
146 SSYNC;
147#endif
148 R0 = (PGDE_UART | PFTE_UART)(Z);
149#if ANOMALY_05000212
150 W[P0] = R0.L; /* Write */
151 SSYNC;
152#endif
153 W[P0] = R0.L; /* Enable both UARTS */
154 SSYNC;
155
156 p0.h = hi(PORTF_FER);
157 p0.l = lo(PORTF_FER);
158#if ANOMALY_05000212
159 R0.L = W[P0]; /* Read */
160 SSYNC;
161#endif
162 R0 = 0x000F(Z);
163#if ANOMALY_05000212
164 W[P0] = R0.L; /* Write */
165 SSYNC;
166#endif
167 /* Enable peripheral function of PORTF for UART0 and UART1 */
168 W[P0] = R0.L;
169 SSYNC;
170
171#if !defined(CONFIG_BF534)
172 p0.h = hi(EMAC_SYSTAT);
173 p0.l = lo(EMAC_SYSTAT);
174 R0.h = 0xFFFF; /* Clear EMAC Interrupt Status bits */
175 R0.l = 0xFFFF;
176 [P0] = R0;
177 SSYNC;
178#endif
179
180 /* Initialise UART - when booting from u-boot, the UART is not disabled
181 * so if we dont initalize here, our serial console gets hosed */
182 p0.h = hi(BFIN_UART_LCR);
183 p0.l = lo(BFIN_UART_LCR);
184 r0 = 0x0(Z);
185 w[p0] = r0.L; /* To enable DLL writes */
186 ssync;
187
188 p0.h = hi(BFIN_UART_DLL);
189 p0.l = lo(BFIN_UART_DLL);
190 r0 = 0x0(Z);
191 w[p0] = r0.L;
192 ssync;
193
194 p0.h = hi(BFIN_UART_DLH);
195 p0.l = lo(BFIN_UART_DLH);
196 r0 = 0x00(Z);
197 w[p0] = r0.L;
198 ssync;
199
200 p0.h = hi(BFIN_UART_GCTL);
201 p0.l = lo(BFIN_UART_GCTL);
202 r0 = 0x0(Z);
203 w[p0] = r0.L; /* To enable UART clock */
204 ssync;
205
206 /* Initialize stack pointer */
207 sp.l = lo(INITIAL_STACK);
208 sp.h = hi(INITIAL_STACK);
209 fp = sp;
210 usp = sp;
211
212#ifdef CONFIG_EARLY_PRINTK
213 SP += -12;
214 call _init_early_exception_vectors;
215 SP += 12;
216#endif
217
218 /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
219 call _bf53x_relocate_l1_mem;
220#ifdef CONFIG_BFIN_KERNEL_CLOCK
221 call _start_dma_code;
222#endif
223
224 /* Code for initializing Async memory banks */
225
226 p2.h = hi(EBIU_AMBCTL1);
227 p2.l = lo(EBIU_AMBCTL1);
228 r0.h = hi(AMBCTL1VAL);
229 r0.l = lo(AMBCTL1VAL);
230 [p2] = r0;
231 ssync;
232
233 p2.h = hi(EBIU_AMBCTL0);
234 p2.l = lo(EBIU_AMBCTL0);
235 r0.h = hi(AMBCTL0VAL);
236 r0.l = lo(AMBCTL0VAL);
237 [p2] = r0;
238 ssync;
239
240 p2.h = hi(EBIU_AMGCTL);
241 p2.l = lo(EBIU_AMGCTL);
242 r0 = AMGCTLVAL;
243 w[p2] = r0;
244 ssync;
245
246 /* This section keeps the processor in supervisor mode
247 * during kernel boot. Switches to user mode at end of boot.
248 * See page 3-9 of Hardware Reference manual for documentation.
249 */
250
251 /* EVT15 = _real_start */
252
253 p0.l = lo(EVT15);
254 p0.h = hi(EVT15);
255 p1.l = _real_start;
256 p1.h = _real_start;
257 [p0] = p1;
258 csync;
259
260 p0.l = lo(IMASK);
261 p0.h = hi(IMASK);
262 p1.l = IMASK_IVG15;
263 p1.h = 0x0;
264 [p0] = p1;
265 csync;
266
267 raise 15;
268 p0.l = .LWAIT_HERE;
269 p0.h = .LWAIT_HERE;
270 reti = p0;
271#if ANOMALY_05000281
272 nop; nop; nop;
273#endif
274 rti;
275
276.LWAIT_HERE:
277 jump .LWAIT_HERE;
278ENDPROC(__start)
279
280ENTRY(_real_start)
281 [ -- sp ] = reti;
282 p0.l = lo(WDOG_CTL);
283 p0.h = hi(WDOG_CTL);
284 r0 = 0xAD6(z);
285 w[p0] = r0; /* watchdog off for now */
286 ssync;
287
288 /* Code update for BSS size == 0
289 * Zero out the bss region.
290 */
291
292 p1.l = ___bss_start;
293 p1.h = ___bss_start;
294 p2.l = ___bss_stop;
295 p2.h = ___bss_stop;
296 r0 = 0;
297 p2 -= p1;
298 lsetup (.L_clear_bss, .L_clear_bss) lc0 = p2;
299.L_clear_bss:
300 B[p1++] = r0;
301
302 /* In case there is a NULL pointer reference
303 * Zero out region before stext
304 */
305
306 p1.l = 0x0;
307 p1.h = 0x0;
308 r0.l = __stext;
309 r0.h = __stext;
310 r0 = r0 >> 1;
311 p2 = r0;
312 r0 = 0;
313 lsetup (.L_clear_zero, .L_clear_zero) lc0 = p2;
314.L_clear_zero:
315 W[p1++] = r0;
316
317 /* pass the uboot arguments to the global value command line */
318 R0 = R7;
319 call _cmdline_init;
320
321 p1.l = __rambase;
322 p1.h = __rambase;
323 r0.l = __sdata;
324 r0.h = __sdata;
325 [p1] = r0;
326
327 p1.l = __ramstart;
328 p1.h = __ramstart;
329 p3.l = ___bss_stop;
330 p3.h = ___bss_stop;
331
332 r1 = p3;
333 [p1] = r1;
334
335 /*
336 * load the current thread pointer and stack
337 */
338 r1.l = _init_thread_union;
339 r1.h = _init_thread_union;
340
341 r2.l = 0x2000;
342 r2.h = 0x0000;
343 r1 = r1 + r2;
344 sp = r1;
345 usp = sp;
346 fp = sp;
347 jump.l _start_kernel;
348ENDPROC(_real_start)
349
350__FINIT
351
352.section .l1.text 38.section .l1.text
353#ifdef CONFIG_BFIN_KERNEL_CLOCK 39#ifdef CONFIG_BFIN_KERNEL_CLOCK
354ENTRY(_start_dma_code) 40ENTRY(_start_dma_code)
@@ -452,13 +138,6 @@ ENTRY(_start_dma_code)
452 [P2] = R1; 138 [P2] = R1;
453 SSYNC; 139 SSYNC;
454 140
455 p0.h = hi(SIC_IWR);
456 p0.l = lo(SIC_IWR);
457 r0.l = lo(IWR_ENABLE_ALL);
458 r0.h = hi(IWR_ENABLE_ALL);
459 [p0] = r0;
460 SSYNC;
461
462 RTS; 141 RTS;
463ENDPROC(_start_dma_code) 142ENDPROC(_start_dma_code)
464#endif /* CONFIG_BFIN_KERNEL_CLOCK */ 143#endif /* CONFIG_BFIN_KERNEL_CLOCK */
diff --git a/arch/blackfin/mach-bf537/ints-priority.c b/arch/blackfin/mach-bf537/ints-priority.c
index a8b915f202ec..b1300b3f1812 100644
--- a/arch/blackfin/mach-bf537/ints-priority.c
+++ b/arch/blackfin/mach-bf537/ints-priority.c
@@ -31,7 +31,7 @@
31#include <linux/irq.h> 31#include <linux/irq.h>
32#include <asm/blackfin.h> 32#include <asm/blackfin.h>
33 33
34void program_IAR(void) 34void __init program_IAR(void)
35{ 35{
36 /* Program the IAR0 Register with the configured priority */ 36 /* Program the IAR0 Register with the configured priority */
37 bfin_write_SIC_IAR0(((CONFIG_IRQ_PLL_WAKEUP - 7) << IRQ_PLL_WAKEUP_POS) | 37 bfin_write_SIC_IAR0(((CONFIG_IRQ_PLL_WAKEUP - 7) << IRQ_PLL_WAKEUP_POS) |
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-23 09:50:14 -0500