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-rw-r--r--arch/blackfin/mach-bf537/head.S16
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/blackfin/mach-bf537/head.S b/arch/blackfin/mach-bf537/head.S
index ac85fdfbfd01..9e9fac9c6345 100644
--- a/arch/blackfin/mach-bf537/head.S
+++ b/arch/blackfin/mach-bf537/head.S
@@ -182,26 +182,26 @@ ENTRY(__start)
182 182
183 /* Initialise UART - when booting from u-boot, the UART is not disabled 183 /* Initialise UART - when booting from u-boot, the UART is not disabled
184 * so if we dont initalize here, our serial console gets hosed */ 184 * so if we dont initalize here, our serial console gets hosed */
185 p0.h = hi(UART_LCR); 185 p0.h = hi(BFIN_UART_LCR);
186 p0.l = lo(UART_LCR); 186 p0.l = lo(BFIN_UART_LCR);
187 r0 = 0x0(Z); 187 r0 = 0x0(Z);
188 w[p0] = r0.L; /* To enable DLL writes */ 188 w[p0] = r0.L; /* To enable DLL writes */
189 ssync; 189 ssync;
190 190
191 p0.h = hi(UART_DLL); 191 p0.h = hi(BFIN_UART_DLL);
192 p0.l = lo(UART_DLL); 192 p0.l = lo(BFIN_UART_DLL);
193 r0 = 0x0(Z); 193 r0 = 0x0(Z);
194 w[p0] = r0.L; 194 w[p0] = r0.L;
195 ssync; 195 ssync;
196 196
197 p0.h = hi(UART_DLH); 197 p0.h = hi(BFIN_UART_DLH);
198 p0.l = lo(UART_DLH); 198 p0.l = lo(BFIN_UART_DLH);
199 r0 = 0x00(Z); 199 r0 = 0x00(Z);
200 w[p0] = r0.L; 200 w[p0] = r0.L;
201 ssync; 201 ssync;
202 202
203 p0.h = hi(UART_GCTL); 203 p0.h = hi(BFIN_UART_GCTL);
204 p0.l = lo(UART_GCTL); 204 p0.l = lo(BFIN_UART_GCTL);
205 r0 = 0x0(Z); 205 r0 = 0x0(Z);
206 w[p0] = r0.L; /* To enable UART clock */ 206 w[p0] = r0.L; /* To enable UART clock */
207 ssync; 207 ssync;