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diff --git a/arch/blackfin/mach-bf537/boards/tcm_bf537.c b/arch/blackfin/mach-bf537/boards/tcm_bf537.c
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1/*
2 * File: arch/blackfin/mach-bf537/boards/tcm_bf537.c
3 * Based on: arch/blackfin/mach-bf533/boards/cm_bf537.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created: 2005
7 * Description: Board description file
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2006 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/etherdevice.h>
33#include <linux/platform_device.h>
34#include <linux/mtd/mtd.h>
35#include <linux/mtd/partitions.h>
36#include <linux/mtd/physmap.h>
37#include <linux/spi/spi.h>
38#include <linux/spi/flash.h>
39#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
40#include <linux/usb/isp1362.h>
41#endif
42#include <linux/ata_platform.h>
43#include <linux/irq.h>
44#include <asm/dma.h>
45#include <asm/bfin5xx_spi.h>
46#include <asm/portmux.h>
47#include <asm/dpmc.h>
48
49/*
50 * Name the Board for the /proc/cpuinfo
51 */
52const char bfin_board_name[] = "Bluetechnix TCM BF537";
53
54#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
55/* all SPI peripherals info goes here */
56
57#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
58static struct mtd_partition bfin_spi_flash_partitions[] = {
59 {
60 .name = "bootloader(spi)",
61 .size = 0x00020000,
62 .offset = 0,
63 .mask_flags = MTD_CAP_ROM
64 }, {
65 .name = "linux kernel(spi)",
66 .size = 0xe0000,
67 .offset = 0x20000
68 }, {
69 .name = "file system(spi)",
70 .size = 0x700000,
71 .offset = 0x00100000,
72 }
73};
74
75static struct flash_platform_data bfin_spi_flash_data = {
76 .name = "m25p80",
77 .parts = bfin_spi_flash_partitions,
78 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
79 .type = "m25p64",
80};
81
82/* SPI flash chip (m25p64) */
83static struct bfin5xx_spi_chip spi_flash_chip_info = {
84 .enable_dma = 0, /* use dma transfer with this chip*/
85 .bits_per_word = 8,
86};
87#endif
88
89#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
90/* SPI ADC chip */
91static struct bfin5xx_spi_chip spi_adc_chip_info = {
92 .enable_dma = 1, /* use dma transfer with this chip*/
93 .bits_per_word = 16,
94};
95#endif
96
97#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
98static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
99 .enable_dma = 0,
100 .bits_per_word = 16,
101};
102#endif
103
104#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
105static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
106 .enable_dma = 0,
107 .bits_per_word = 16,
108};
109#endif
110
111#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
112static struct bfin5xx_spi_chip spi_mmc_chip_info = {
113 .enable_dma = 1,
114 .bits_per_word = 8,
115};
116#endif
117
118static struct spi_board_info bfin_spi_board_info[] __initdata = {
119#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
120 {
121 /* the modalias must be the same as spi device driver name */
122 .modalias = "m25p80", /* Name of spi_driver for this device */
123 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
124 .bus_num = 0, /* Framework bus number */
125 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
126 .platform_data = &bfin_spi_flash_data,
127 .controller_data = &spi_flash_chip_info,
128 .mode = SPI_MODE_3,
129 },
130#endif
131
132#if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
133 {
134 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
135 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
136 .bus_num = 0, /* Framework bus number */
137 .chip_select = 1, /* Framework chip select. */
138 .platform_data = NULL, /* No spi_driver specific config */
139 .controller_data = &spi_adc_chip_info,
140 },
141#endif
142
143#if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
144 {
145 .modalias = "ad1836-spi",
146 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
147 .bus_num = 0,
148 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
149 .controller_data = &ad1836_spi_chip_info,
150 },
151#endif
152
153#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
154 {
155 .modalias = "ad9960-spi",
156 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
157 .bus_num = 0,
158 .chip_select = 1,
159 .controller_data = &ad9960_spi_chip_info,
160 },
161#endif
162
163#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
164 {
165 .modalias = "spi_mmc_dummy",
166 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
167 .bus_num = 0,
168 .chip_select = 7,
169 .platform_data = NULL,
170 .controller_data = &spi_mmc_chip_info,
171 .mode = SPI_MODE_3,
172 },
173 {
174 .modalias = "spi_mmc",
175 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
176 .bus_num = 0,
177 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
178 .platform_data = NULL,
179 .controller_data = &spi_mmc_chip_info,
180 .mode = SPI_MODE_3,
181 },
182#endif
183};
184
185/* SPI (0) */
186static struct resource bfin_spi0_resource[] = {
187 [0] = {
188 .start = SPI0_REGBASE,
189 .end = SPI0_REGBASE + 0xFF,
190 .flags = IORESOURCE_MEM,
191 },
192 [1] = {
193 .start = CH_SPI,
194 .end = CH_SPI,
195 .flags = IORESOURCE_IRQ,
196 }
197};
198
199/* SPI controller data */
200static struct bfin5xx_spi_master bfin_spi0_info = {
201 .num_chipselect = 8,
202 .enable_dma = 1, /* master has the ability to do dma transfer */
203 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
204};
205
206static struct platform_device bfin_spi0_device = {
207 .name = "bfin-spi",
208 .id = 0, /* Bus number */
209 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
210 .resource = bfin_spi0_resource,
211 .dev = {
212 .platform_data = &bfin_spi0_info, /* Passed to driver */
213 },
214};
215#endif /* spi master and devices */
216
217#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
218static struct platform_device rtc_device = {
219 .name = "rtc-bfin",
220 .id = -1,
221};
222#endif
223
224#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
225static struct platform_device hitachi_fb_device = {
226 .name = "hitachi-tx09",
227};
228#endif
229
230#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
231static struct resource smc91x_resources[] = {
232 {
233 .start = 0x20200300,
234 .end = 0x20200300 + 16,
235 .flags = IORESOURCE_MEM,
236 }, {
237 .start = IRQ_PF14,
238 .end = IRQ_PF14,
239 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
240 },
241};
242
243static struct platform_device smc91x_device = {
244 .name = "smc91x",
245 .id = 0,
246 .num_resources = ARRAY_SIZE(smc91x_resources),
247 .resource = smc91x_resources,
248};
249#endif
250
251#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
252static struct resource isp1362_hcd_resources[] = {
253 {
254 .start = 0x20308000,
255 .end = 0x20308000,
256 .flags = IORESOURCE_MEM,
257 }, {
258 .start = 0x20308004,
259 .end = 0x20308004,
260 .flags = IORESOURCE_MEM,
261 }, {
262 .start = IRQ_PG15,
263 .end = IRQ_PG15,
264 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
265 },
266};
267
268static struct isp1362_platform_data isp1362_priv = {
269 .sel15Kres = 1,
270 .clknotstop = 0,
271 .oc_enable = 0,
272 .int_act_high = 0,
273 .int_edge_triggered = 0,
274 .remote_wakeup_connected = 0,
275 .no_power_switching = 1,
276 .power_switching_mode = 0,
277};
278
279static struct platform_device isp1362_hcd_device = {
280 .name = "isp1362-hcd",
281 .id = 0,
282 .dev = {
283 .platform_data = &isp1362_priv,
284 },
285 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
286 .resource = isp1362_hcd_resources,
287};
288#endif
289
290#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
291static struct resource net2272_bfin_resources[] = {
292 {
293 .start = 0x20200000,
294 .end = 0x20200000 + 0x100,
295 .flags = IORESOURCE_MEM,
296 }, {
297 .start = IRQ_PH14,
298 .end = IRQ_PH14,
299 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
300 },
301};
302
303static struct platform_device net2272_bfin_device = {
304 .name = "net2272",
305 .id = -1,
306 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
307 .resource = net2272_bfin_resources,
308};
309#endif
310
311#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
312static struct mtd_partition cm_partitions[] = {
313 {
314 .name = "bootloader(nor)",
315 .size = 0x40000,
316 .offset = 0,
317 }, {
318 .name = "linux kernel(nor)",
319 .size = 0xE0000,
320 .offset = MTDPART_OFS_APPEND,
321 }, {
322 .name = "file system(nor)",
323 .size = MTDPART_SIZ_FULL,
324 .offset = MTDPART_OFS_APPEND,
325 }
326};
327
328static struct physmap_flash_data cm_flash_data = {
329 .width = 2,
330 .parts = cm_partitions,
331 .nr_parts = ARRAY_SIZE(cm_partitions),
332};
333
334static unsigned cm_flash_gpios[] = { GPIO_PF4, GPIO_PF5 };
335
336static struct resource cm_flash_resource[] = {
337 {
338 .name = "cfi_probe",
339 .start = 0x20000000,
340 .end = 0x201fffff,
341 .flags = IORESOURCE_MEM,
342 }, {
343 .start = (unsigned long)cm_flash_gpios,
344 .end = ARRAY_SIZE(cm_flash_gpios),
345 .flags = IORESOURCE_IRQ,
346 }
347};
348
349static struct platform_device cm_flash_device = {
350 .name = "gpio-addr-flash",
351 .id = 0,
352 .dev = {
353 .platform_data = &cm_flash_data,
354 },
355 .num_resources = ARRAY_SIZE(cm_flash_resource),
356 .resource = cm_flash_resource,
357};
358#endif
359
360#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
361static struct resource bfin_uart_resources[] = {
362 {
363 .start = 0xFFC00400,
364 .end = 0xFFC004FF,
365 .flags = IORESOURCE_MEM,
366 }, {
367 .start = 0xFFC02000,
368 .end = 0xFFC020FF,
369 .flags = IORESOURCE_MEM,
370 },
371};
372
373static struct platform_device bfin_uart_device = {
374 .name = "bfin-uart",
375 .id = 1,
376 .num_resources = ARRAY_SIZE(bfin_uart_resources),
377 .resource = bfin_uart_resources,
378};
379#endif
380
381#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
382static struct resource bfin_sir_resources[] = {
383#ifdef CONFIG_BFIN_SIR0
384 {
385 .start = 0xFFC00400,
386 .end = 0xFFC004FF,
387 .flags = IORESOURCE_MEM,
388 },
389#endif
390#ifdef CONFIG_BFIN_SIR1
391 {
392 .start = 0xFFC02000,
393 .end = 0xFFC020FF,
394 .flags = IORESOURCE_MEM,
395 },
396#endif
397};
398
399static struct platform_device bfin_sir_device = {
400 .name = "bfin_sir",
401 .id = 0,
402 .num_resources = ARRAY_SIZE(bfin_sir_resources),
403 .resource = bfin_sir_resources,
404};
405#endif
406
407#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
408static struct resource bfin_twi0_resource[] = {
409 [0] = {
410 .start = TWI0_REGBASE,
411 .end = TWI0_REGBASE,
412 .flags = IORESOURCE_MEM,
413 },
414 [1] = {
415 .start = IRQ_TWI,
416 .end = IRQ_TWI,
417 .flags = IORESOURCE_IRQ,
418 },
419};
420
421static struct platform_device i2c_bfin_twi_device = {
422 .name = "i2c-bfin-twi",
423 .id = 0,
424 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
425 .resource = bfin_twi0_resource,
426};
427#endif
428
429#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
430static struct platform_device bfin_sport0_uart_device = {
431 .name = "bfin-sport-uart",
432 .id = 0,
433};
434
435static struct platform_device bfin_sport1_uart_device = {
436 .name = "bfin-sport-uart",
437 .id = 1,
438};
439#endif
440
441#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
442static struct platform_device bfin_mac_device = {
443 .name = "bfin_mac",
444};
445#endif
446
447#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
448#define PATA_INT IRQ_PF14
449
450static struct pata_platform_info bfin_pata_platform_data = {
451 .ioport_shift = 2,
452 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
453};
454
455static struct resource bfin_pata_resources[] = {
456 {
457 .start = 0x2030C000,
458 .end = 0x2030C01F,
459 .flags = IORESOURCE_MEM,
460 },
461 {
462 .start = 0x2030D018,
463 .end = 0x2030D01B,
464 .flags = IORESOURCE_MEM,
465 },
466 {
467 .start = PATA_INT,
468 .end = PATA_INT,
469 .flags = IORESOURCE_IRQ,
470 },
471};
472
473static struct platform_device bfin_pata_device = {
474 .name = "pata_platform",
475 .id = -1,
476 .num_resources = ARRAY_SIZE(bfin_pata_resources),
477 .resource = bfin_pata_resources,
478 .dev = {
479 .platform_data = &bfin_pata_platform_data,
480 }
481};
482#endif
483
484static const unsigned int cclk_vlev_datasheet[] =
485{
486 VRPAIR(VLEV_085, 250000000),
487 VRPAIR(VLEV_090, 376000000),
488 VRPAIR(VLEV_095, 426000000),
489 VRPAIR(VLEV_100, 426000000),
490 VRPAIR(VLEV_105, 476000000),
491 VRPAIR(VLEV_110, 476000000),
492 VRPAIR(VLEV_115, 476000000),
493 VRPAIR(VLEV_120, 500000000),
494 VRPAIR(VLEV_125, 533000000),
495 VRPAIR(VLEV_130, 600000000),
496};
497
498static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
499 .tuple_tab = cclk_vlev_datasheet,
500 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
501 .vr_settling_time = 25 /* us */,
502};
503
504static struct platform_device bfin_dpmc = {
505 .name = "bfin dpmc",
506 .dev = {
507 .platform_data = &bfin_dmpc_vreg_data,
508 },
509};
510
511static struct platform_device *cm_bf537_devices[] __initdata = {
512
513 &bfin_dpmc,
514
515#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
516 &hitachi_fb_device,
517#endif
518
519#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
520 &rtc_device,
521#endif
522
523#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
524 &bfin_uart_device,
525#endif
526
527#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
528 &bfin_sir_device,
529#endif
530
531#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
532 &i2c_bfin_twi_device,
533#endif
534
535#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
536 &bfin_sport0_uart_device,
537 &bfin_sport1_uart_device,
538#endif
539
540#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
541 &isp1362_hcd_device,
542#endif
543
544#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
545 &smc91x_device,
546#endif
547
548#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
549 &bfin_mac_device,
550#endif
551
552#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
553 &net2272_bfin_device,
554#endif
555
556#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
557 &bfin_spi0_device,
558#endif
559
560#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
561 &bfin_pata_device,
562#endif
563
564#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
565 &cm_flash_device,
566#endif
567};
568
569static int __init cm_bf537_init(void)
570{
571 printk(KERN_INFO "%s(): registering device resources\n", __func__);
572 platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
573#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
574 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
575#endif
576
577#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
578 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
579#endif
580 return 0;
581}
582
583arch_initcall(cm_bf537_init);
584
585void bfin_get_ether_addr(char *addr)
586{
587 random_ether_addr(addr);
588 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
589}
590EXPORT_SYMBOL(bfin_get_ether_addr);
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-07 12:48:07 -0500