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diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c
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1/*
2 * File: arch/blackfin/mach-bf537/boards/stamp.c
3 * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2006 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h>
34#include <linux/mtd/partitions.h>
35#include <linux/spi/spi.h>
36#include <linux/spi/flash.h>
37#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
38#include <linux/usb_isp1362.h>
39#endif
40#include <asm/irq.h>
41#include <linux/irq.h>
42#include <linux/interrupt.h>
43#include <asm/bfin5xx_spi.h>
44#include <linux/usb_sl811.h>
45
46#include <linux/spi/ad7877.h>
47
48/*
49 * Name the Board for the /proc/cpuinfo
50 */
51char *bfin_board_name = "ADDS-BF537-STAMP";
52
53/*
54 * Driver needs to know address, irq and flag pin.
55 */
56
57#define ISP1761_BASE 0x203C0000
58#define ISP1761_IRQ IRQ_PF7
59
60#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
61static struct resource bfin_isp1761_resources[] = {
62 [0] = {
63 .name = "isp1761-regs",
64 .start = ISP1761_BASE + 0x00000000,
65 .end = ISP1761_BASE + 0x000fffff,
66 .flags = IORESOURCE_MEM,
67 },
68 [1] = {
69 .start = ISP1761_IRQ,
70 .end = ISP1761_IRQ,
71 .flags = IORESOURCE_IRQ,
72 },
73};
74
75static struct platform_device bfin_isp1761_device = {
76 .name = "isp1761",
77 .id = 0,
78 .num_resources = ARRAY_SIZE(bfin_isp1761_resources),
79 .resource = bfin_isp1761_resources,
80};
81
82static struct platform_device *bfin_isp1761_devices[] = {
83 &bfin_isp1761_device,
84};
85
86int __init bfin_isp1761_init(void)
87{
88 unsigned int num_devices=ARRAY_SIZE(bfin_isp1761_devices);
89
90 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
91 set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING);
92
93 return platform_add_devices(bfin_isp1761_devices, num_devices);
94}
95
96void __exit bfin_isp1761_exit(void)
97{
98 platform_device_unregister(&bfin_isp1761_device);
99}
100
101arch_initcall(bfin_isp1761_init);
102#endif
103
104#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
105static struct resource bfin_pcmcia_cf_resources[] = {
106 {
107 .start = 0x20310000, /* IO PORT */
108 .end = 0x20312000,
109 .flags = IORESOURCE_MEM,
110 },{
111 .start = 0x20311000, /* Attribute Memeory */
112 .end = 0x20311FFF,
113 .flags = IORESOURCE_MEM,
114 },{
115 .start = IRQ_PF4,
116 .end = IRQ_PF4,
117 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
118 },{
119 .start = 6, /* Card Detect PF6 */
120 .end = 6,
121 .flags = IORESOURCE_IRQ,
122 },
123};
124
125static struct platform_device bfin_pcmcia_cf_device = {
126 .name = "bfin_cf_pcmcia",
127 .id = -1,
128 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
129 .resource = bfin_pcmcia_cf_resources,
130};
131#endif
132
133#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
134static struct platform_device rtc_device = {
135 .name = "rtc-bfin",
136 .id = -1,
137};
138#endif
139
140#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
141static struct resource smc91x_resources[] = {
142 {
143 .name = "smc91x-regs",
144 .start = 0x20300300,
145 .end = 0x20300300 + 16,
146 .flags = IORESOURCE_MEM,
147 },{
148
149 .start = IRQ_PF7,
150 .end = IRQ_PF7,
151 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
152 },
153};
154static struct platform_device smc91x_device = {
155 .name = "smc91x",
156 .id = 0,
157 .num_resources = ARRAY_SIZE(smc91x_resources),
158 .resource = smc91x_resources,
159};
160#endif
161
162#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
163static struct resource sl811_hcd_resources[] = {
164 {
165 .start = 0x20340000,
166 .end = 0x20340000,
167 .flags = IORESOURCE_MEM,
168 },{
169 .start = 0x20340004,
170 .end = 0x20340004,
171 .flags = IORESOURCE_MEM,
172 },{
173 .start = CONFIG_USB_SL811_BFIN_IRQ,
174 .end = CONFIG_USB_SL811_BFIN_IRQ,
175 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
176 },
177};
178
179#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
180void sl811_port_power(struct device *dev, int is_on)
181{
182 unsigned short mask = (1 << CONFIG_USB_SL811_BFIN_GPIO_VBUS);
183
184 bfin_write_PORT_FER(bfin_read_PORT_FER() & ~mask);
185 bfin_write_FIO_DIR(bfin_read_FIO_DIR() | mask);
186
187 if (is_on)
188 bfin_write_FIO_FLAG_S(mask);
189 else
190 bfin_write_FIO_FLAG_C(mask);
191}
192#endif
193
194static struct sl811_platform_data sl811_priv = {
195 .potpg = 10,
196 .power = 250, /* == 500mA */
197#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
198 .port_power = &sl811_port_power,
199#endif
200};
201
202static struct platform_device sl811_hcd_device = {
203 .name = "sl811-hcd",
204 .id = 0,
205 .dev = {
206 .platform_data = &sl811_priv,
207 },
208 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
209 .resource = sl811_hcd_resources,
210};
211#endif
212
213#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
214static struct resource isp1362_hcd_resources[] = {
215 {
216 .start = 0x20360000,
217 .end = 0x20360000,
218 .flags = IORESOURCE_MEM,
219 },{
220 .start = 0x20360004,
221 .end = 0x20360004,
222 .flags = IORESOURCE_MEM,
223 },{
224 .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
225 .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
226 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
227 },
228};
229
230static struct isp1362_platform_data isp1362_priv = {
231 .sel15Kres = 1,
232 .clknotstop = 0,
233 .oc_enable = 0,
234 .int_act_high = 0,
235 .int_edge_triggered = 0,
236 .remote_wakeup_connected = 0,
237 .no_power_switching = 1,
238 .power_switching_mode = 0,
239};
240
241static struct platform_device isp1362_hcd_device = {
242 .name = "isp1362-hcd",
243 .id = 0,
244 .dev = {
245 .platform_data = &isp1362_priv,
246 },
247 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
248 .resource = isp1362_hcd_resources,
249};
250#endif
251
252#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
253static struct platform_device bfin_mac_device = {
254 .name = "bfin_mac",
255};
256#endif
257
258#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
259static struct resource net2272_bfin_resources[] = {
260 {
261 .start = 0x20300000,
262 .end = 0x20300000 + 0x100,
263 .flags = IORESOURCE_MEM,
264 },{
265 .start = IRQ_PF7,
266 .end = IRQ_PF7,
267 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
268 },
269};
270
271static struct platform_device net2272_bfin_device = {
272 .name = "net2272",
273 .id = -1,
274 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
275 .resource = net2272_bfin_resources,
276};
277#endif
278
279#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
280/* all SPI peripherals info goes here */
281
282#if defined(CONFIG_MTD_M25P80) \
283 || defined(CONFIG_MTD_M25P80_MODULE)
284static struct mtd_partition bfin_spi_flash_partitions[] = {
285 {
286 .name = "bootloader",
287 .size = 0x00020000,
288 .offset = 0,
289 .mask_flags = MTD_CAP_ROM
290 },{
291 .name = "kernel",
292 .size = 0xe0000,
293 .offset = 0x20000
294 },{
295 .name = "file system",
296 .size = 0x700000,
297 .offset = 0x00100000,
298 }
299};
300
301static struct flash_platform_data bfin_spi_flash_data = {
302 .name = "m25p80",
303 .parts = bfin_spi_flash_partitions,
304 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
305 .type = "m25p64",
306};
307
308/* SPI flash chip (m25p64) */
309static struct bfin5xx_spi_chip spi_flash_chip_info = {
310 .enable_dma = 0, /* use dma transfer with this chip*/
311 .bits_per_word = 8,
312};
313#endif
314
315#if defined(CONFIG_SPI_ADC_BF533) \
316 || defined(CONFIG_SPI_ADC_BF533_MODULE)
317/* SPI ADC chip */
318static struct bfin5xx_spi_chip spi_adc_chip_info = {
319 .enable_dma = 1, /* use dma transfer with this chip*/
320 .bits_per_word = 16,
321};
322#endif
323
324#if defined(CONFIG_SND_BLACKFIN_AD1836) \
325 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
326static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
327 .enable_dma = 0,
328 .bits_per_word = 16,
329};
330#endif
331
332#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
333static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
334 .enable_dma = 0,
335 .bits_per_word = 16,
336};
337#endif
338
339#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
340static struct bfin5xx_spi_chip spi_mmc_chip_info = {
341 .enable_dma = 1,
342 .bits_per_word = 8,
343};
344#endif
345
346#if defined(CONFIG_PBX)
347static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
348 .ctl_reg = 0x4, /* send zero */
349 .enable_dma = 0,
350 .bits_per_word = 8,
351 .cs_change_per_word = 1,
352};
353#endif
354
355#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
356static struct bfin5xx_spi_chip ad5304_chip_info = {
357 .enable_dma = 0,
358 .bits_per_word = 16,
359};
360#endif
361
362#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
363static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
364// .cs_change_per_word = 1,
365 .enable_dma = 0,
366 .bits_per_word = 16,
367};
368
369static const struct ad7877_platform_data bfin_ad7877_ts_info = {
370 .model = 7877,
371 .vref_delay_usecs = 50, /* internal, no capacitor */
372 .x_plate_ohms = 419,
373 .y_plate_ohms = 486,
374 .pressure_max = 1000,
375 .pressure_min = 0,
376 .stopacq_polarity = 1,
377 .first_conversion_delay = 3,
378 .acquisition_time = 1,
379 .averaging = 1,
380 .pen_down_acc_interval = 1,
381};
382#endif
383
384static struct spi_board_info bfin_spi_board_info[] __initdata = {
385#if defined(CONFIG_MTD_M25P80) \
386 || defined(CONFIG_MTD_M25P80_MODULE)
387 {
388 /* the modalias must be the same as spi device driver name */
389 .modalias = "m25p80", /* Name of spi_driver for this device */
390 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
391 .bus_num = 1, /* Framework bus number */
392 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
393 .platform_data = &bfin_spi_flash_data,
394 .controller_data = &spi_flash_chip_info,
395 .mode = SPI_MODE_3,
396 },
397#endif
398
399#if defined(CONFIG_SPI_ADC_BF533) \
400 || defined(CONFIG_SPI_ADC_BF533_MODULE)
401 {
402 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
403 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
404 .bus_num = 1, /* Framework bus number */
405 .chip_select = 1, /* Framework chip select. */
406 .platform_data = NULL, /* No spi_driver specific config */
407 .controller_data = &spi_adc_chip_info,
408 },
409#endif
410
411#if defined(CONFIG_SND_BLACKFIN_AD1836) \
412 || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
413 {
414 .modalias = "ad1836-spi",
415 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
416 .bus_num = 1,
417 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
418 .controller_data = &ad1836_spi_chip_info,
419 },
420#endif
421#if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
422 {
423 .modalias = "ad9960-spi",
424 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
425 .bus_num = 1,
426 .chip_select = 1,
427 .controller_data = &ad9960_spi_chip_info,
428 },
429#endif
430#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
431 {
432 .modalias = "spi_mmc_dummy",
433 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
434 .bus_num = 1,
435 .chip_select = 0,
436 .platform_data = NULL,
437 .controller_data = &spi_mmc_chip_info,
438 .mode = SPI_MODE_3,
439 },
440 {
441 .modalias = "spi_mmc",
442 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
443 .bus_num = 1,
444 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
445 .platform_data = NULL,
446 .controller_data = &spi_mmc_chip_info,
447 .mode = SPI_MODE_3,
448 },
449#endif
450#if defined(CONFIG_PBX)
451 {
452 .modalias = "fxs-spi",
453 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
454 .bus_num = 1,
455 .chip_select = 3,
456 .controller_data= &spi_si3xxx_chip_info,
457 .mode = SPI_MODE_3,
458 },
459 {
460 .modalias = "fxo-spi",
461 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
462 .bus_num = 1,
463 .chip_select = 2,
464 .controller_data= &spi_si3xxx_chip_info,
465 .mode = SPI_MODE_3,
466 },
467#endif
468#if defined(CONFIG_AD5304) || defined(CONFIG_AD5304_MODULE)
469 {
470 .modalias = "ad5304_spi",
471 .max_speed_hz = 1250000, /* max spi clock (SCK) speed in HZ */
472 .bus_num = 1,
473 .chip_select = 2,
474 .platform_data = NULL,
475 .controller_data = &ad5304_chip_info,
476 .mode = SPI_MODE_2,
477 },
478#endif
479#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
480 {
481 .modalias = "ad7877",
482 .platform_data = &bfin_ad7877_ts_info,
483 .irq = IRQ_PF6,
484 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
485 .bus_num = 1,
486 .chip_select = 1,
487 .controller_data = &spi_ad7877_chip_info,
488 },
489#endif
490};
491
492/* SPI controller data */
493static struct bfin5xx_spi_master spi_bfin_master_info = {
494 .num_chipselect = 8,
495 .enable_dma = 1, /* master has the ability to do dma transfer */
496};
497
498static struct platform_device spi_bfin_master_device = {
499 .name = "bfin-spi-master",
500 .id = 1, /* Bus number */
501 .dev = {
502 .platform_data = &spi_bfin_master_info, /* Passed to driver */
503 },
504};
505#endif /* spi master and devices */
506
507#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
508static struct platform_device bfin_fb_device = {
509 .name = "bf537-fb",
510};
511#endif
512
513#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
514static struct resource bfin_uart_resources[] = {
515 {
516 .start = 0xFFC00400,
517 .end = 0xFFC004FF,
518 .flags = IORESOURCE_MEM,
519 },{
520 .start = 0xFFC02000,
521 .end = 0xFFC020FF,
522 .flags = IORESOURCE_MEM,
523 },
524};
525
526static struct platform_device bfin_uart_device = {
527 .name = "bfin-uart",
528 .id = 1,
529 .num_resources = ARRAY_SIZE(bfin_uart_resources),
530 .resource = bfin_uart_resources,
531};
532#endif
533
534#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
535static struct platform_device i2c_bfin_twi_device = {
536 .name = "i2c-bfin-twi",
537 .id = 0,
538};
539#endif
540
541#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
542static struct platform_device bfin_sport0_uart_device = {
543 .name = "bfin-sport-uart",
544 .id = 0,
545};
546
547static struct platform_device bfin_sport1_uart_device = {
548 .name = "bfin-sport-uart",
549 .id = 1,
550};
551#endif
552
553static struct platform_device *stamp_devices[] __initdata = {
554#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
555 &bfin_pcmcia_cf_device,
556#endif
557
558#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
559 &rtc_device,
560#endif
561
562#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
563 &sl811_hcd_device,
564#endif
565
566#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
567 &isp1362_hcd_device,
568#endif
569
570#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
571 &smc91x_device,
572#endif
573
574#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
575 &bfin_mac_device,
576#endif
577
578#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
579 &net2272_bfin_device,
580#endif
581
582#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
583 &spi_bfin_master_device,
584#endif
585
586#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
587 &bfin_fb_device,
588#endif
589
590#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
591 &bfin_uart_device,
592#endif
593
594#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
595 &i2c_bfin_twi_device,
596#endif
597
598#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
599 &bfin_sport0_uart_device,
600 &bfin_sport1_uart_device,
601#endif
602};
603
604static int __init stamp_init(void)
605{
606 printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
607 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
608#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
609 spi_register_board_info(bfin_spi_board_info,
610 ARRAY_SIZE(bfin_spi_board_info));
611#endif
612 return 0;
613}
614
615arch_initcall(stamp_init);
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