1 files changed, 6 insertions, 34 deletions
diff --git a/arch/blackfin/mach-bf533/include/mach/dma.h b/arch/blackfin/mach-bf533/include/mach/dma.h
index bd9d5e94307d..fb34934c5ba8 100644
--- a/arch/blackfin/mach-bf533/include/mach/dma.h
+++ b/arch/blackfin/mach-bf533/include/mach/dma.h
@@ -1,42 +1,14 @@
-/*****************************************************************************
+/* mach/dma.h - arch-specific DMA defines
-*
-*        BF-533/2/1 Specific Declarations
-*
-****************************************************************************/
-/*
- * File:         include/asm-blackfin/mach-bf533/dma.h
- * Based on:
- * Author:
 *
- * Created:
+ * Copyright 2004-2008 Analog Devices Inc.
- * Description:
 *
- * Rev:
+ * Licensed under the GPL-2 or later.
- *
- * Modified:
- *
- * Bugs:         Enter bugs at http://blackfin.uclinux.org/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; see the file COPYING.
- * If not, write to the Free Software Foundation,
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
 */
 #ifndef _MACH_DMA_H_
 #define _MACH_DMA_H_
-#define MAX_BLACKFIN_DMA_CHANNEL 12
+#define MAX_DMA_CHANNELS 12
 #define CH_PPI          0
 #define CH_SPORT0_RX    1
@@ -44,8 +16,8 @@
 #define CH_SPORT1_RX    3
 #define CH_SPORT1_TX    4
 #define CH_SPI          5
-#define CH_UART_RX      6
+#define CH_UART0_RX     6
-#define CH_UART_TX      7
+#define CH_UART0_TX     7
 #define CH_MEM_STREAM0_DEST     8        /* TX */
 #define CH_MEM_STREAM0_SRC      9        /* RX */
 #define CH_MEM_STREAM1_DEST     10       /* TX */

diff --git a/arch/blackfin/mach-bf533/include/mach/dma.h b/arch/blackfin/mach-bf533/include/mach/dma.h index bd9d5e94307d..fb34934c5ba8 100644 --- a/arch/blackfin/mach-bf533/include/mach/dma.h +++ b/arch/blackfin/mach-bf533/include/mach/dma.h
@@ -1,42 +1,14 @@
1	/*****************************************************************************	1	/* mach/dma.h - arch-specific DMA defines
2	*
3	* BF-533/2/1 Specific Declarations
4	*
5	****************************************************************************/
6	/*
7	* File: include/asm-blackfin/mach-bf533/dma.h
8	* Based on:
9	* Author:
10	*	2	*
11	* Created:	3	* Copyright 2004-2008 Analog Devices Inc.
12	* Description:
13	*	4	*
14	* Rev:	5	* Licensed under the GPL-2 or later.
15	*
16	* Modified:
17	*
18	* Bugs: Enter bugs at http://blackfin.uclinux.org/
19	*
20	* This program is free software; you can redistribute it and/or modify
21	* it under the terms of the GNU General Public License as published by
22	* the Free Software Foundation; either version 2, or (at your option)
23	* any later version.
24	*
25	* This program is distributed in the hope that it will be useful,
26	* but WITHOUT ANY WARRANTY; without even the implied warranty of
27	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28	* GNU General Public License for more details.
29	*
30	* You should have received a copy of the GNU General Public License
31	* along with this program; see the file COPYING.
32	* If not, write to the Free Software Foundation,
33	* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
34	*/	6	*/
35		7
36	#ifndef _MACH_DMA_H_	8	#ifndef _MACH_DMA_H_
37	#define _MACH_DMA_H_	9	#define _MACH_DMA_H_
38		10
39	#define MAX_BLACKFIN_DMA_CHANNEL 12	11	#define MAX_DMA_CHANNELS 12
40		12
41	#define CH_PPI 0	13	#define CH_PPI 0
42	#define CH_SPORT0_RX 1	14	#define CH_SPORT0_RX 1
@@ -44,8 +16,8 @@
44	#define CH_SPORT1_RX 3	16	#define CH_SPORT1_RX 3
45	#define CH_SPORT1_TX 4	17	#define CH_SPORT1_TX 4
46	#define CH_SPI 5	18	#define CH_SPI 5
47	#define CH_UART_RX 6	19	#define CH_UART0_RX 6
48	#define CH_UART_TX 7	20	#define CH_UART0_TX 7
49	#define CH_MEM_STREAM0_DEST 8 /* TX */	21	#define CH_MEM_STREAM0_DEST 8 /* TX */
50	#define CH_MEM_STREAM0_SRC 9 /* RX */	22	#define CH_MEM_STREAM0_SRC 9 /* RX */
51	#define CH_MEM_STREAM1_DEST 10 /* TX */	23	#define CH_MEM_STREAM1_DEST 10 /* TX */