aboutsummaryrefslogtreecommitdiffstats
path: root/arch/blackfin/mach-bf533/include/mach/dma.h
diff options
context:
space:
mode:
Diffstat (limited to 'arch/blackfin/mach-bf533/include/mach/dma.h')
-rw-r--r--arch/blackfin/mach-bf533/include/mach/dma.h54
1 files changed, 54 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf533/include/mach/dma.h b/arch/blackfin/mach-bf533/include/mach/dma.h
new file mode 100644
index 000000000000..bd9d5e94307d
--- /dev/null
+++ b/arch/blackfin/mach-bf533/include/mach/dma.h
@@ -0,0 +1,54 @@
1/*****************************************************************************
2*
3* BF-533/2/1 Specific Declarations
4*
5****************************************************************************/
6/*
7 * File: include/asm-blackfin/mach-bf533/dma.h
8 * Based on:
9 * Author:
10 *
11 * Created:
12 * Description:
13 *
14 * Rev:
15 *
16 * Modified:
17 *
18 * Bugs: Enter bugs at http://blackfin.uclinux.org/
19 *
20 * This program is free software; you can redistribute it and/or modify
21 * it under the terms of the GNU General Public License as published by
22 * the Free Software Foundation; either version 2, or (at your option)
23 * any later version.
24 *
25 * This program is distributed in the hope that it will be useful,
26 * but WITHOUT ANY WARRANTY; without even the implied warranty of
27 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 * GNU General Public License for more details.
29 *
30 * You should have received a copy of the GNU General Public License
31 * along with this program; see the file COPYING.
32 * If not, write to the Free Software Foundation,
33 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
34 */
35
36#ifndef _MACH_DMA_H_
37#define _MACH_DMA_H_
38
39#define MAX_BLACKFIN_DMA_CHANNEL 12
40
41#define CH_PPI 0
42#define CH_SPORT0_RX 1
43#define CH_SPORT0_TX 2
44#define CH_SPORT1_RX 3
45#define CH_SPORT1_TX 4
46#define CH_SPI 5
47#define CH_UART_RX 6
48#define CH_UART_TX 7
49#define CH_MEM_STREAM0_DEST 8 /* TX */
50#define CH_MEM_STREAM0_SRC 9 /* RX */
51#define CH_MEM_STREAM1_DEST 10 /* TX */
52#define CH_MEM_STREAM1_SRC 11 /* RX */
53
54#endif