diff options
Diffstat (limited to 'arch/blackfin/mach-bf533/head.S')
| -rw-r--r-- | arch/blackfin/mach-bf533/head.S | 30 |
1 files changed, 17 insertions, 13 deletions
diff --git a/arch/blackfin/mach-bf533/head.S b/arch/blackfin/mach-bf533/head.S index 4db9e6240906..7e2aa8d0f44f 100644 --- a/arch/blackfin/mach-bf533/head.S +++ b/arch/blackfin/mach-bf533/head.S | |||
| @@ -28,6 +28,7 @@ | |||
| 28 | */ | 28 | */ |
| 29 | 29 | ||
| 30 | #include <linux/linkage.h> | 30 | #include <linux/linkage.h> |
| 31 | #include <linux/init.h> | ||
| 31 | #include <asm/blackfin.h> | 32 | #include <asm/blackfin.h> |
| 32 | #if CONFIG_BFIN_KERNEL_CLOCK | 33 | #if CONFIG_BFIN_KERNEL_CLOCK |
| 33 | #include <asm/mach/mem_init.h> | 34 | #include <asm/mach/mem_init.h> |
| @@ -45,19 +46,19 @@ | |||
| 45 | 46 | ||
| 46 | #define INITIAL_STACK 0xFFB01000 | 47 | #define INITIAL_STACK 0xFFB01000 |
| 47 | 48 | ||
| 48 | .text | 49 | __INIT |
| 49 | 50 | ||
| 50 | ENTRY(__start) | 51 | ENTRY(__start) |
| 51 | ENTRY(__stext) | ||
| 52 | /* R0: argument of command line string, passed from uboot, save it */ | 52 | /* R0: argument of command line string, passed from uboot, save it */ |
| 53 | R7 = R0; | 53 | R7 = R0; |
| 54 | /* Set the SYSCFG register */ | 54 | /* Set the SYSCFG register: |
| 55 | * Enable Cycle Counter and Nesting Of Interrupts (3rd Bit) | ||
| 56 | */ | ||
| 55 | R0 = 0x36; | 57 | R0 = 0x36; |
| 56 | /*Enable Cycle Counter and Nesting Of Interrupts(3rd Bit)*/ | ||
| 57 | SYSCFG = R0; | 58 | SYSCFG = R0; |
| 58 | R0 = 0; | 59 | R0 = 0; |
| 59 | 60 | ||
| 60 | /*Clear Out All the data and pointer Registers*/ | 61 | /* Clear Out All the data and pointer Registers */ |
| 61 | R1 = R0; | 62 | R1 = R0; |
| 62 | R2 = R0; | 63 | R2 = R0; |
| 63 | R3 = R0; | 64 | R3 = R0; |
| @@ -79,7 +80,7 @@ ENTRY(__stext) | |||
| 79 | L2 = r0; | 80 | L2 = r0; |
| 80 | L3 = r0; | 81 | L3 = r0; |
| 81 | 82 | ||
| 82 | /* Clear Out All the DAG Registers*/ | 83 | /* Clear Out All the DAG Registers */ |
| 83 | B0 = r0; | 84 | B0 = r0; |
| 84 | B1 = r0; | 85 | B1 = r0; |
| 85 | B2 = r0; | 86 | B2 = r0; |
| @@ -265,6 +266,7 @@ ENTRY(__stext) | |||
| 265 | 266 | ||
| 266 | .LWAIT_HERE: | 267 | .LWAIT_HERE: |
| 267 | jump .LWAIT_HERE; | 268 | jump .LWAIT_HERE; |
| 269 | ENDPROC(__start) | ||
| 268 | 270 | ||
| 269 | ENTRY(_real_start) | 271 | ENTRY(_real_start) |
| 270 | [ -- sp ] = reti; | 272 | [ -- sp ] = reti; |
| @@ -303,7 +305,7 @@ ENTRY(_real_start) | |||
| 303 | .L_clear_zero: | 305 | .L_clear_zero: |
| 304 | W[p1++] = r0; | 306 | W[p1++] = r0; |
| 305 | 307 | ||
| 306 | /* pass the uboot arguments to the global value command line */ | 308 | /* pass the uboot arguments to the global value command line */ |
| 307 | R0 = R7; | 309 | R0 = R7; |
| 308 | call _cmdline_init; | 310 | call _cmdline_init; |
| 309 | 311 | ||
| @@ -322,7 +324,7 @@ ENTRY(_real_start) | |||
| 322 | [p1] = r1; | 324 | [p1] = r1; |
| 323 | 325 | ||
| 324 | /* | 326 | /* |
| 325 | * load the current thread pointer and stack | 327 | * load the current thread pointer and stack |
| 326 | */ | 328 | */ |
| 327 | r1.l = _init_thread_union; | 329 | r1.l = _init_thread_union; |
| 328 | r1.h = _init_thread_union; | 330 | r1.h = _init_thread_union; |
| @@ -333,9 +335,10 @@ ENTRY(_real_start) | |||
| 333 | sp = r1; | 335 | sp = r1; |
| 334 | usp = sp; | 336 | usp = sp; |
| 335 | fp = sp; | 337 | fp = sp; |
| 336 | call _start_kernel; | 338 | jump.l _start_kernel; |
| 337 | .L_exit: | 339 | ENDPROC(_real_start) |
| 338 | jump.s .L_exit; | 340 | |
| 341 | __FINIT | ||
| 339 | 342 | ||
| 340 | .section .l1.text | 343 | .section .l1.text |
| 341 | #if CONFIG_BFIN_KERNEL_CLOCK | 344 | #if CONFIG_BFIN_KERNEL_CLOCK |
| @@ -439,12 +442,13 @@ ENTRY(_start_dma_code) | |||
| 439 | 442 | ||
| 440 | p0.h = hi(SIC_IWR); | 443 | p0.h = hi(SIC_IWR); |
| 441 | p0.l = lo(SIC_IWR); | 444 | p0.l = lo(SIC_IWR); |
| 442 | r0.l = lo(IWR_ENABLE_ALL) | 445 | r0.l = lo(IWR_ENABLE_ALL); |
| 443 | r0.h = hi(IWR_ENABLE_ALL) | 446 | r0.h = hi(IWR_ENABLE_ALL); |
| 444 | [p0] = r0; | 447 | [p0] = r0; |
| 445 | SSYNC; | 448 | SSYNC; |
| 446 | 449 | ||
| 447 | RTS; | 450 | RTS; |
| 451 | ENDPROC(_start_dma_code) | ||
| 448 | #endif /* CONFIG_BFIN_KERNEL_CLOCK */ | 452 | #endif /* CONFIG_BFIN_KERNEL_CLOCK */ |
| 449 | 453 | ||
| 450 | ENTRY(_bfin_reset) | 454 | ENTRY(_bfin_reset) |
