diff options
Diffstat (limited to 'arch/blackfin/mach-bf533/boards/ip0x.c')
| -rw-r--r-- | arch/blackfin/mach-bf533/boards/ip0x.c | 303 |
1 files changed, 303 insertions, 0 deletions
diff --git a/arch/blackfin/mach-bf533/boards/ip0x.c b/arch/blackfin/mach-bf533/boards/ip0x.c new file mode 100644 index 000000000000..5864892de314 --- /dev/null +++ b/arch/blackfin/mach-bf533/boards/ip0x.c | |||
| @@ -0,0 +1,303 @@ | |||
| 1 | /* | ||
| 2 | * File: arch/blackfin/mach-bf533/ip0x.c | ||
| 3 | * Based on: arch/blackfin/mach-bf533/bf1.c | ||
| 4 | * Based on: arch/blackfin/mach-bf533/stamp.c | ||
| 5 | * Author: Ivan Danov <idanov@gmail.com> | ||
| 6 | * Modified for IP0X David Rowe | ||
| 7 | * | ||
| 8 | * Created: 2007 | ||
| 9 | * Description: Board info file for the IP04/IP08 boards, which | ||
| 10 | * are derived from the BlackfinOne V2.0 boards. | ||
| 11 | * | ||
| 12 | * Modified: | ||
| 13 | * COpyright 2007 David Rowe | ||
| 14 | * Copyright 2006 Intratrade Ltd. | ||
| 15 | * Copyright 2005 National ICT Australia (NICTA) | ||
| 16 | * Copyright 2004-2006 Analog Devices Inc. | ||
| 17 | * | ||
| 18 | * This program is free software; you can redistribute it and/or modify | ||
| 19 | * it under the terms of the GNU General Public License as published by | ||
| 20 | * the Free Software Foundation; either version 2 of the License, or | ||
| 21 | * (at your option) any later version. | ||
| 22 | * | ||
| 23 | * This program is distributed in the hope that it will be useful, | ||
| 24 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 25 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 26 | * GNU General Public License for more details. | ||
| 27 | * | ||
| 28 | * You should have received a copy of the GNU General Public License | ||
| 29 | * along with this program; if not, see the file COPYING, or write | ||
| 30 | * to the Free Software Foundation, Inc., | ||
| 31 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
| 32 | */ | ||
| 33 | |||
| 34 | #include <linux/device.h> | ||
| 35 | #include <linux/platform_device.h> | ||
| 36 | #include <linux/mtd/mtd.h> | ||
| 37 | #include <linux/mtd/partitions.h> | ||
| 38 | #include <linux/spi/spi.h> | ||
| 39 | #include <linux/spi/flash.h> | ||
| 40 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | ||
| 41 | #include <linux/usb/isp1362.h> | ||
| 42 | #endif | ||
| 43 | #include <asm/irq.h> | ||
| 44 | #include <asm/bfin5xx_spi.h> | ||
| 45 | |||
| 46 | /* | ||
| 47 | * Name the Board for the /proc/cpuinfo | ||
| 48 | */ | ||
| 49 | const char bfin_board_name[] = "IP04/IP08"; | ||
| 50 | |||
| 51 | /* | ||
| 52 | * Driver needs to know address, irq and flag pin. | ||
| 53 | */ | ||
| 54 | #if defined(CONFIG_BFIN532_IP0X) | ||
| 55 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) | ||
| 56 | |||
| 57 | #include <linux/dm9000.h> | ||
| 58 | |||
| 59 | static struct resource dm9000_resource1[] = { | ||
| 60 | { | ||
| 61 | .start = 0x20100000, | ||
| 62 | .end = 0x20100000 + 1, | ||
| 63 | .flags = IORESOURCE_MEM | ||
| 64 | },{ | ||
| 65 | .start = 0x20100000 + 2, | ||
| 66 | .end = 0x20100000 + 3, | ||
| 67 | .flags = IORESOURCE_MEM | ||
| 68 | },{ | ||
| 69 | .start = IRQ_PF15, | ||
| 70 | .end = IRQ_PF15, | ||
| 71 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | ||
| 72 | } | ||
| 73 | }; | ||
| 74 | |||
| 75 | static struct resource dm9000_resource2[] = { | ||
| 76 | { | ||
| 77 | .start = 0x20200000, | ||
| 78 | .end = 0x20200000 + 1, | ||
| 79 | .flags = IORESOURCE_MEM | ||
| 80 | },{ | ||
| 81 | .start = 0x20200000 + 2, | ||
| 82 | .end = 0x20200000 + 3, | ||
| 83 | .flags = IORESOURCE_MEM | ||
| 84 | },{ | ||
| 85 | .start = IRQ_PF14, | ||
| 86 | .end = IRQ_PF14, | ||
| 87 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | ||
| 88 | } | ||
| 89 | }; | ||
| 90 | |||
| 91 | /* | ||
| 92 | * for the moment we limit ourselves to 16bit IO until some | ||
| 93 | * better IO routines can be written and tested | ||
| 94 | */ | ||
| 95 | static struct dm9000_plat_data dm9000_platdata1 = { | ||
| 96 | .flags = DM9000_PLATF_16BITONLY, | ||
| 97 | }; | ||
| 98 | |||
| 99 | static struct platform_device dm9000_device1 = { | ||
| 100 | .name = "dm9000", | ||
| 101 | .id = 0, | ||
| 102 | .num_resources = ARRAY_SIZE(dm9000_resource1), | ||
| 103 | .resource = dm9000_resource1, | ||
| 104 | .dev = { | ||
| 105 | .platform_data = &dm9000_platdata1, | ||
| 106 | } | ||
| 107 | }; | ||
| 108 | |||
| 109 | static struct dm9000_plat_data dm9000_platdata2 = { | ||
| 110 | .flags = DM9000_PLATF_16BITONLY, | ||
| 111 | }; | ||
| 112 | |||
| 113 | static struct platform_device dm9000_device2 = { | ||
| 114 | .name = "dm9000", | ||
| 115 | .id = 1, | ||
| 116 | .num_resources = ARRAY_SIZE(dm9000_resource2), | ||
| 117 | .resource = dm9000_resource2, | ||
| 118 | .dev = { | ||
| 119 | .platform_data = &dm9000_platdata2, | ||
| 120 | } | ||
| 121 | }; | ||
| 122 | |||
| 123 | #endif | ||
| 124 | #endif | ||
| 125 | |||
| 126 | |||
| 127 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | ||
| 128 | /* all SPI peripherals info goes here */ | ||
| 129 | |||
| 130 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | ||
| 131 | static struct bfin5xx_spi_chip spi_mmc_chip_info = { | ||
| 132 | /* | ||
| 133 | * CPOL (Clock Polarity) | ||
| 134 | * 0 - Active high SCK | ||
| 135 | * 1 - Active low SCK | ||
| 136 | * CPHA (Clock Phase) Selects transfer format and operation mode | ||
| 137 | * 0 - SCLK toggles from middle of the first data bit, slave select | ||
| 138 | * pins controlled by hardware. | ||
| 139 | * 1 - SCLK toggles from beginning of first data bit, slave select | ||
| 140 | * pins controller by user software. | ||
| 141 | * .ctl_reg = 0x1c00, * CPOL=1,CPHA=1,Sandisk 1G work | ||
| 142 | * NO NO .ctl_reg = 0x1800, * CPOL=1,CPHA=0 | ||
| 143 | * NO NO .ctl_reg = 0x1400, * CPOL=0,CPHA=1 | ||
| 144 | */ | ||
| 145 | .ctl_reg = 0x1000, /* CPOL=0,CPHA=0,Sandisk 1G work */ | ||
| 146 | .enable_dma = 0, /* if 1 - block!!! */ | ||
| 147 | .bits_per_word = 8, | ||
| 148 | .cs_change_per_word = 0, | ||
| 149 | }; | ||
| 150 | #endif | ||
| 151 | |||
| 152 | /* Notice: for blackfin, the speed_hz is the value of register | ||
| 153 | * SPI_BAUD, not the real baudrate */ | ||
| 154 | static struct spi_board_info bfin_spi_board_info[] __initdata = { | ||
| 155 | #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE) | ||
| 156 | { | ||
| 157 | .modalias = "spi_mmc", | ||
| 158 | .max_speed_hz = 2, | ||
| 159 | .bus_num = 1, | ||
| 160 | .chip_select = CONFIG_SPI_MMC_CS_CHAN, | ||
| 161 | .platform_data = NULL, | ||
| 162 | .controller_data = &spi_mmc_chip_info, | ||
| 163 | }, | ||
| 164 | #endif | ||
| 165 | }; | ||
| 166 | |||
| 167 | /* SPI controller data */ | ||
| 168 | static struct bfin5xx_spi_master spi_bfin_master_info = { | ||
| 169 | .num_chipselect = 8, | ||
| 170 | .enable_dma = 1, /* master has the ability to do dma transfer */ | ||
| 171 | }; | ||
| 172 | |||
| 173 | static struct platform_device spi_bfin_master_device = { | ||
| 174 | .name = "bfin-spi-master", | ||
| 175 | .id = 1, /* Bus number */ | ||
| 176 | .dev = { | ||
| 177 | .platform_data = &spi_bfin_master_info, /* Passed to driver */ | ||
| 178 | }, | ||
| 179 | }; | ||
| 180 | #endif /* spi master and devices */ | ||
| 181 | |||
| 182 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | ||
| 183 | static struct resource bfin_uart_resources[] = { | ||
| 184 | { | ||
| 185 | .start = 0xFFC00400, | ||
| 186 | .end = 0xFFC004FF, | ||
| 187 | .flags = IORESOURCE_MEM, | ||
| 188 | }, | ||
| 189 | }; | ||
| 190 | |||
| 191 | static struct platform_device bfin_uart_device = { | ||
| 192 | .name = "bfin-uart", | ||
| 193 | .id = 1, | ||
| 194 | .num_resources = ARRAY_SIZE(bfin_uart_resources), | ||
| 195 | .resource = bfin_uart_resources, | ||
| 196 | }; | ||
| 197 | #endif | ||
| 198 | |||
| 199 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) | ||
| 200 | static struct resource bfin_sir_resources[] = { | ||
| 201 | #ifdef CONFIG_BFIN_SIR0 | ||
| 202 | { | ||
| 203 | .start = 0xFFC00400, | ||
| 204 | .end = 0xFFC004FF, | ||
| 205 | .flags = IORESOURCE_MEM, | ||
| 206 | }, | ||
| 207 | #endif | ||
| 208 | }; | ||
| 209 | |||
| 210 | static struct platform_device bfin_sir_device = { | ||
| 211 | .name = "bfin_sir", | ||
| 212 | .id = 0, | ||
| 213 | .num_resources = ARRAY_SIZE(bfin_sir_resources), | ||
| 214 | .resource = bfin_sir_resources, | ||
| 215 | }; | ||
| 216 | #endif | ||
| 217 | |||
| 218 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | ||
| 219 | static struct resource isp1362_hcd_resources[] = { | ||
| 220 | { | ||
| 221 | .start = 0x20300000, | ||
| 222 | .end = 0x20300000 + 1, | ||
| 223 | .flags = IORESOURCE_MEM, | ||
| 224 | },{ | ||
| 225 | .start = 0x20300000 + 2, | ||
| 226 | .end = 0x20300000 + 3, | ||
| 227 | .flags = IORESOURCE_MEM, | ||
| 228 | },{ | ||
| 229 | .start = IRQ_PF11, | ||
| 230 | .end = IRQ_PF11, | ||
| 231 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | ||
| 232 | }, | ||
| 233 | }; | ||
| 234 | |||
| 235 | static struct isp1362_platform_data isp1362_priv = { | ||
| 236 | .sel15Kres = 1, | ||
| 237 | .clknotstop = 0, | ||
| 238 | .oc_enable = 0, /* external OC */ | ||
| 239 | .int_act_high = 0, | ||
| 240 | .int_edge_triggered = 0, | ||
| 241 | .remote_wakeup_connected = 0, | ||
| 242 | .no_power_switching = 1, | ||
| 243 | .power_switching_mode = 0, | ||
| 244 | }; | ||
| 245 | |||
| 246 | static struct platform_device isp1362_hcd_device = { | ||
| 247 | .name = "isp1362-hcd", | ||
| 248 | .id = 0, | ||
| 249 | .dev = { | ||
| 250 | .platform_data = &isp1362_priv, | ||
| 251 | }, | ||
| 252 | .num_resources = ARRAY_SIZE(isp1362_hcd_resources), | ||
| 253 | .resource = isp1362_hcd_resources, | ||
| 254 | }; | ||
| 255 | #endif | ||
| 256 | |||
| 257 | |||
| 258 | static struct platform_device *ip0x_devices[] __initdata = { | ||
| 259 | #if defined(CONFIG_BFIN532_IP0X) | ||
| 260 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) | ||
| 261 | &dm9000_device1, | ||
| 262 | &dm9000_device2, | ||
| 263 | #endif | ||
| 264 | #endif | ||
| 265 | |||
| 266 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | ||
| 267 | &spi_bfin_master_device, | ||
| 268 | #endif | ||
| 269 | |||
| 270 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | ||
| 271 | &bfin_uart_device, | ||
| 272 | #endif | ||
| 273 | |||
| 274 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) | ||
| 275 | &bfin_sir_device, | ||
| 276 | #endif | ||
| 277 | |||
| 278 | #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) | ||
| 279 | &isp1362_hcd_device, | ||
| 280 | #endif | ||
| 281 | }; | ||
| 282 | |||
| 283 | static int __init ip0x_init(void) | ||
| 284 | { | ||
| 285 | int i; | ||
| 286 | |||
| 287 | printk(KERN_INFO "%s(): registering device resources\n", __func__); | ||
| 288 | platform_add_devices(ip0x_devices, ARRAY_SIZE(ip0x_devices)); | ||
| 289 | |||
| 290 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | ||
| 291 | for (i = 0; i < ARRAY_SIZE(bfin_spi_board_info); ++i) { | ||
| 292 | int j = 1 << bfin_spi_board_info[i].chip_select; | ||
| 293 | /* set spi cs to 1 */ | ||
| 294 | bfin_write_FIO_DIR(bfin_read_FIO_DIR() | j); | ||
| 295 | bfin_write_FIO_FLAG_S(j); | ||
| 296 | } | ||
| 297 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); | ||
| 298 | #endif | ||
| 299 | |||
| 300 | return 0; | ||
| 301 | } | ||
| 302 | |||
| 303 | arch_initcall(ip0x_init); | ||
