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Diffstat (limited to 'arch/blackfin/mach-bf527/boards/tll6527m.c')
-rw-r--r--arch/blackfin/mach-bf527/boards/tll6527m.c85
1 files changed, 13 insertions, 72 deletions
diff --git a/arch/blackfin/mach-bf527/boards/tll6527m.c b/arch/blackfin/mach-bf527/boards/tll6527m.c
index 18d303dd5627..3a92c4318d2d 100644
--- a/arch/blackfin/mach-bf527/boards/tll6527m.c
+++ b/arch/blackfin/mach-bf527/boards/tll6527m.c
@@ -8,6 +8,7 @@
8 */ 8 */
9 9
10#include <linux/device.h> 10#include <linux/device.h>
11#include <linux/export.h>
11#include <linux/platform_device.h> 12#include <linux/platform_device.h>
12#include <linux/mtd/mtd.h> 13#include <linux/mtd/mtd.h>
13#include <linux/mtd/partitions.h> 14#include <linux/mtd/partitions.h>
@@ -314,29 +315,12 @@ static struct flash_platform_data bfin_spi_flash_data = {
314/* SPI flash chip (m25p64) */ 315/* SPI flash chip (m25p64) */
315static struct bfin5xx_spi_chip spi_flash_chip_info = { 316static struct bfin5xx_spi_chip spi_flash_chip_info = {
316 .enable_dma = 0, /* use dma transfer with this chip*/ 317 .enable_dma = 0, /* use dma transfer with this chip*/
317 .bits_per_word = 8,
318};
319#endif
320
321#if defined(CONFIG_BFIN_SPI_ADC) \
322 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
323/* SPI ADC chip */
324static struct bfin5xx_spi_chip spi_adc_chip_info = {
325 .enable_dma = 0, /* use dma transfer with this chip*/
326/*
327 * tll6527m V1.0 does not support native spi slave selects
328 * hence DMA mode will not be useful since the ADC needs
329 * CS to toggle for each sample and cs_change_per_word
330 * seems to be removed from spi_bfin5xx.c
331 */
332 .bits_per_word = 16,
333}; 318};
334#endif 319#endif
335 320
336#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 321#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
337static struct bfin5xx_spi_chip mmc_spi_chip_info = { 322static struct bfin5xx_spi_chip mmc_spi_chip_info = {
338 .enable_dma = 0, 323 .enable_dma = 0,
339 .bits_per_word = 8,
340}; 324};
341#endif 325#endif
342 326
@@ -359,21 +343,6 @@ static const struct ad7879_platform_data bfin_ad7879_ts_info = {
359}; 343};
360#endif 344#endif
361 345
362#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) \
363 || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
364static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
365 .enable_dma = 0,
366 .bits_per_word = 16,
367};
368#endif
369
370#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
371static struct bfin5xx_spi_chip spidev_chip_info = {
372 .enable_dma = 0,
373 .bits_per_word = 8,
374};
375#endif
376
377#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) 346#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
378static struct platform_device bfin_i2s = { 347static struct platform_device bfin_i2s = {
379 .name = "bfin-i2s", 348 .name = "bfin-i2s",
@@ -382,24 +351,7 @@ static struct platform_device bfin_i2s = {
382}; 351};
383#endif 352#endif
384 353
385#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
386static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
387 .enable_dma = 0,
388 .bits_per_word = 8,
389};
390#endif
391
392#if defined(CONFIG_GPIO_MCP23S08) || defined(CONFIG_GPIO_MCP23S08_MODULE) 354#if defined(CONFIG_GPIO_MCP23S08) || defined(CONFIG_GPIO_MCP23S08_MODULE)
393static struct bfin5xx_spi_chip spi_mcp23s08_sys_chip_info = {
394 .enable_dma = 0,
395 .bits_per_word = 8,
396};
397
398static struct bfin5xx_spi_chip spi_mcp23s08_usr_chip_info = {
399 .enable_dma = 0,
400 .bits_per_word = 8,
401};
402
403#include <linux/spi/mcp23s08.h> 355#include <linux/spi/mcp23s08.h>
404static const struct mcp23s08_platform_data bfin_mcp23s08_sys_gpio_info = { 356static const struct mcp23s08_platform_data bfin_mcp23s08_sys_gpio_info = {
405 .chip[0].is_present = true, 357 .chip[0].is_present = true,
@@ -429,22 +381,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
429 }, 381 },
430#endif 382#endif
431 383
432#if defined(CONFIG_BFIN_SPI_ADC)
433 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
434 {
435 .modalias = "bfin_spi_adc",
436 /* Name of spi_driver for this device */
437 .max_speed_hz = 10000000,
438 /* max spi clock (SCK) speed in HZ */
439 .bus_num = 0, /* Framework bus number */
440 .chip_select = EXP_GPIO_SPISEL_BASE + 0x04 + MAX_CTRL_CS,
441 /* Framework chip select. */
442 .platform_data = NULL, /* No spi_driver specific config */
443 .controller_data = &spi_adc_chip_info,
444 .mode = SPI_MODE_0,
445 },
446#endif
447
448#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) 384#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
449 { 385 {
450 .modalias = "mmc_spi", 386 .modalias = "mmc_spi",
@@ -470,7 +406,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
470 /* max spi clock (SCK) speed in HZ */ 406 /* max spi clock (SCK) speed in HZ */
471 .bus_num = 0, 407 .bus_num = 0,
472 .chip_select = EXP_GPIO_SPISEL_BASE + 0x07 + MAX_CTRL_CS, 408 .chip_select = EXP_GPIO_SPISEL_BASE + 0x07 + MAX_CTRL_CS,
473 .controller_data = &spi_ad7879_chip_info,
474 .mode = SPI_CPHA | SPI_CPOL, 409 .mode = SPI_CPHA | SPI_CPOL,
475 }, 410 },
476#endif 411#endif
@@ -482,7 +417,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
482 .bus_num = 0, 417 .bus_num = 0,
483 .chip_select = EXP_GPIO_SPISEL_BASE + 0x03 + MAX_CTRL_CS, 418 .chip_select = EXP_GPIO_SPISEL_BASE + 0x03 + MAX_CTRL_CS,
484 .mode = SPI_CPHA | SPI_CPOL, 419 .mode = SPI_CPHA | SPI_CPOL,
485 .controller_data = &spidev_chip_info,
486 }, 420 },
487#endif 421#endif
488#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE) 422#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
@@ -491,7 +425,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
491 .max_speed_hz = 20000000, 425 .max_speed_hz = 20000000,
492 .bus_num = 0, 426 .bus_num = 0,
493 .chip_select = EXP_GPIO_SPISEL_BASE + 0x06 + MAX_CTRL_CS, 427 .chip_select = EXP_GPIO_SPISEL_BASE + 0x06 + MAX_CTRL_CS,
494 .controller_data = &lq035q1_spi_chip_info,
495 .mode = SPI_CPHA | SPI_CPOL, 428 .mode = SPI_CPHA | SPI_CPOL,
496 }, 429 },
497#endif 430#endif
@@ -502,7 +435,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
502 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ 435 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
503 .bus_num = 0, 436 .bus_num = 0,
504 .chip_select = EXP_GPIO_SPISEL_BASE + 0x01 + MAX_CTRL_CS, 437 .chip_select = EXP_GPIO_SPISEL_BASE + 0x01 + MAX_CTRL_CS,
505 .controller_data = &spi_mcp23s08_sys_chip_info,
506 .mode = SPI_CPHA | SPI_CPOL, 438 .mode = SPI_CPHA | SPI_CPOL,
507 }, 439 },
508 { 440 {
@@ -511,7 +443,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
511 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ 443 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
512 .bus_num = 0, 444 .bus_num = 0,
513 .chip_select = EXP_GPIO_SPISEL_BASE + 0x02 + MAX_CTRL_CS, 445 .chip_select = EXP_GPIO_SPISEL_BASE + 0x02 + MAX_CTRL_CS,
514 .controller_data = &spi_mcp23s08_usr_chip_info,
515 .mode = SPI_CPHA | SPI_CPOL, 446 .mode = SPI_CPHA | SPI_CPOL,
516 }, 447 },
517#endif 448#endif
@@ -565,8 +496,13 @@ static struct resource bfin_uart0_resources[] = {
565 .flags = IORESOURCE_MEM, 496 .flags = IORESOURCE_MEM,
566 }, 497 },
567 { 498 {
499 .start = IRQ_UART0_TX,
500 .end = IRQ_UART0_TX,
501 .flags = IORESOURCE_IRQ,
502 },
503 {
568 .start = IRQ_UART0_RX, 504 .start = IRQ_UART0_RX,
569 .end = IRQ_UART0_RX+1, 505 .end = IRQ_UART0_RX,
570 .flags = IORESOURCE_IRQ, 506 .flags = IORESOURCE_IRQ,
571 }, 507 },
572 { 508 {
@@ -609,8 +545,13 @@ static struct resource bfin_uart1_resources[] = {
609 .flags = IORESOURCE_MEM, 545 .flags = IORESOURCE_MEM,
610 }, 546 },
611 { 547 {
548 .start = IRQ_UART1_TX,
549 .end = IRQ_UART1_TX,
550 .flags = IORESOURCE_IRQ,
551 },
552 {
612 .start = IRQ_UART1_RX, 553 .start = IRQ_UART1_RX,
613 .end = IRQ_UART1_RX+1, 554 .end = IRQ_UART1_RX,
614 .flags = IORESOURCE_IRQ, 555 .flags = IORESOURCE_IRQ,
615 }, 556 },
616 { 557 {