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1/*
2 * File: arch/blackfin/mach-bf527/boards/ezbrd.c
3 * Based on: arch/blackfin/mach-bf537/boards/stamp.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2008 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h>
34#include <linux/mtd/partitions.h>
35#include <linux/mtd/physmap.h>
36#include <linux/spi/spi.h>
37#include <linux/spi/flash.h>
38
39#include <linux/i2c.h>
40#include <linux/irq.h>
41#include <linux/interrupt.h>
42#include <linux/usb/musb.h>
43#include <asm/dma.h>
44#include <asm/bfin5xx_spi.h>
45#include <asm/reboot.h>
46#include <asm/nand.h>
47#include <asm/portmux.h>
48#include <asm/dpmc.h>
49#include <linux/spi/ad7877.h>
50
51/*
52 * Name the Board for the /proc/cpuinfo
53 */
54const char bfin_board_name[] = "BF526-EZBRD";
55
56/*
57 * Driver needs to know address, irq and flag pin.
58 */
59
60#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
61static struct resource musb_resources[] = {
62 [0] = {
63 .start = 0xffc03800,
64 .end = 0xffc03cff,
65 .flags = IORESOURCE_MEM,
66 },
67 [1] = { /* general IRQ */
68 .start = IRQ_USB_INT0,
69 .end = IRQ_USB_INT0,
70 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
71 },
72 [2] = { /* DMA IRQ */
73 .start = IRQ_USB_DMA,
74 .end = IRQ_USB_DMA,
75 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
76 },
77};
78
79static struct musb_hdrc_config musb_config = {
80 .multipoint = 0,
81 .dyn_fifo = 0,
82 .soft_con = 1,
83 .dma = 1,
84 .num_eps = 7,
85 .dma_channels = 7,
86 .gpio_vrsel = GPIO_PG13,
87};
88
89static struct musb_hdrc_platform_data musb_plat = {
90#if defined(CONFIG_USB_MUSB_OTG)
91 .mode = MUSB_OTG,
92#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
93 .mode = MUSB_HOST,
94#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
95 .mode = MUSB_PERIPHERAL,
96#endif
97 .config = &musb_config,
98};
99
100static u64 musb_dmamask = ~(u32)0;
101
102static struct platform_device musb_device = {
103 .name = "musb_hdrc",
104 .id = 0,
105 .dev = {
106 .dma_mask = &musb_dmamask,
107 .coherent_dma_mask = 0xffffffff,
108 .platform_data = &musb_plat,
109 },
110 .num_resources = ARRAY_SIZE(musb_resources),
111 .resource = musb_resources,
112};
113#endif
114
115#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
116static struct mtd_partition ezbrd_partitions[] = {
117 {
118 .name = "bootloader(nor)",
119 .size = 0x40000,
120 .offset = 0,
121 }, {
122 .name = "linux kernel(nor)",
123 .size = 0x1C0000,
124 .offset = MTDPART_OFS_APPEND,
125 }, {
126 .name = "file system(nor)",
127 .size = MTDPART_SIZ_FULL,
128 .offset = MTDPART_OFS_APPEND,
129 }
130};
131
132static struct physmap_flash_data ezbrd_flash_data = {
133 .width = 2,
134 .parts = ezbrd_partitions,
135 .nr_parts = ARRAY_SIZE(ezbrd_partitions),
136};
137
138static struct resource ezbrd_flash_resource = {
139 .start = 0x20000000,
140 .end = 0x203fffff,
141 .flags = IORESOURCE_MEM,
142};
143
144static struct platform_device ezbrd_flash_device = {
145 .name = "physmap-flash",
146 .id = 0,
147 .dev = {
148 .platform_data = &ezbrd_flash_data,
149 },
150 .num_resources = 1,
151 .resource = &ezbrd_flash_resource,
152};
153#endif
154
155#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
156static struct mtd_partition partition_info[] = {
157 {
158 .name = "linux kernel(nand)",
159 .offset = 0,
160 .size = 4 * 1024 * 1024,
161 },
162 {
163 .name = "file system(nand)",
164 .offset = MTDPART_OFS_APPEND,
165 .size = MTDPART_SIZ_FULL,
166 },
167};
168
169static struct bf5xx_nand_platform bf5xx_nand_platform = {
170 .page_size = NFC_PG_SIZE_256,
171 .data_width = NFC_NWIDTH_8,
172 .partitions = partition_info,
173 .nr_partitions = ARRAY_SIZE(partition_info),
174 .rd_dly = 3,
175 .wr_dly = 3,
176};
177
178static struct resource bf5xx_nand_resources[] = {
179 {
180 .start = NFC_CTL,
181 .end = NFC_DATA_RD + 2,
182 .flags = IORESOURCE_MEM,
183 },
184 {
185 .start = CH_NFC,
186 .end = CH_NFC,
187 .flags = IORESOURCE_IRQ,
188 },
189};
190
191static struct platform_device bf5xx_nand_device = {
192 .name = "bf5xx-nand",
193 .id = 0,
194 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
195 .resource = bf5xx_nand_resources,
196 .dev = {
197 .platform_data = &bf5xx_nand_platform,
198 },
199};
200#endif
201
202#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
203static struct platform_device rtc_device = {
204 .name = "rtc-bfin",
205 .id = -1,
206};
207#endif
208
209
210#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
211static struct platform_device bfin_mac_device = {
212 .name = "bfin_mac",
213};
214#endif
215
216#if defined(CONFIG_MTD_M25P80) \
217 || defined(CONFIG_MTD_M25P80_MODULE)
218static struct mtd_partition bfin_spi_flash_partitions[] = {
219 {
220 .name = "bootloader(spi)",
221 .size = 0x00040000,
222 .offset = 0,
223 .mask_flags = MTD_CAP_ROM
224 }, {
225 .name = "linux kernel(spi)",
226 .size = MTDPART_SIZ_FULL,
227 .offset = MTDPART_OFS_APPEND,
228 }
229};
230
231static struct flash_platform_data bfin_spi_flash_data = {
232 .name = "m25p80",
233 .parts = bfin_spi_flash_partitions,
234 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
235 .type = "m25p16",
236};
237
238/* SPI flash chip (m25p64) */
239static struct bfin5xx_spi_chip spi_flash_chip_info = {
240 .enable_dma = 0, /* use dma transfer with this chip*/
241 .bits_per_word = 8,
242};
243#endif
244
245#if defined(CONFIG_SPI_ADC_BF533) \
246 || defined(CONFIG_SPI_ADC_BF533_MODULE)
247/* SPI ADC chip */
248static struct bfin5xx_spi_chip spi_adc_chip_info = {
249 .enable_dma = 1, /* use dma transfer with this chip*/
250 .bits_per_word = 16,
251};
252#endif
253
254#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
255static struct bfin5xx_spi_chip spi_mmc_chip_info = {
256 .enable_dma = 1,
257 .bits_per_word = 8,
258};
259#endif
260
261#if defined(CONFIG_PBX)
262static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
263 .ctl_reg = 0x4, /* send zero */
264 .enable_dma = 0,
265 .bits_per_word = 8,
266 .cs_change_per_word = 1,
267};
268#endif
269
270#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
271static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
272 .enable_dma = 0,
273 .bits_per_word = 16,
274};
275
276static const struct ad7877_platform_data bfin_ad7877_ts_info = {
277 .model = 7877,
278 .vref_delay_usecs = 50, /* internal, no capacitor */
279 .x_plate_ohms = 419,
280 .y_plate_ohms = 486,
281 .pressure_max = 1000,
282 .pressure_min = 0,
283 .stopacq_polarity = 1,
284 .first_conversion_delay = 3,
285 .acquisition_time = 1,
286 .averaging = 1,
287 .pen_down_acc_interval = 1,
288};
289#endif
290
291#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
292 && defined(CONFIG_SND_SOC_WM8731_SPI)
293static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
294 .enable_dma = 0,
295 .bits_per_word = 16,
296};
297#endif
298
299#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
300static struct bfin5xx_spi_chip spidev_chip_info = {
301 .enable_dma = 0,
302 .bits_per_word = 8,
303};
304#endif
305
306#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
307static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
308 .enable_dma = 0,
309 .bits_per_word = 8,
310};
311#endif
312
313static struct spi_board_info bfin_spi_board_info[] __initdata = {
314#if defined(CONFIG_MTD_M25P80) \
315 || defined(CONFIG_MTD_M25P80_MODULE)
316 {
317 /* the modalias must be the same as spi device driver name */
318 .modalias = "m25p80", /* Name of spi_driver for this device */
319 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
320 .bus_num = 0, /* Framework bus number */
321 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
322 .platform_data = &bfin_spi_flash_data,
323 .controller_data = &spi_flash_chip_info,
324 .mode = SPI_MODE_3,
325 },
326#endif
327
328#if defined(CONFIG_SPI_ADC_BF533) \
329 || defined(CONFIG_SPI_ADC_BF533_MODULE)
330 {
331 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
332 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
333 .bus_num = 0, /* Framework bus number */
334 .chip_select = 1, /* Framework chip select. */
335 .platform_data = NULL, /* No spi_driver specific config */
336 .controller_data = &spi_adc_chip_info,
337 },
338#endif
339
340#if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
341 {
342 .modalias = "spi_mmc_dummy",
343 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
344 .bus_num = 0,
345 .chip_select = 0,
346 .platform_data = NULL,
347 .controller_data = &spi_mmc_chip_info,
348 .mode = SPI_MODE_3,
349 },
350 {
351 .modalias = "spi_mmc",
352 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
353 .bus_num = 0,
354 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
355 .platform_data = NULL,
356 .controller_data = &spi_mmc_chip_info,
357 .mode = SPI_MODE_3,
358 },
359#endif
360#if defined(CONFIG_PBX)
361 {
362 .modalias = "fxs-spi",
363 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
364 .bus_num = 0,
365 .chip_select = 8 - CONFIG_J11_JUMPER,
366 .controller_data = &spi_si3xxx_chip_info,
367 .mode = SPI_MODE_3,
368 },
369 {
370 .modalias = "fxo-spi",
371 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
372 .bus_num = 0,
373 .chip_select = 8 - CONFIG_J19_JUMPER,
374 .controller_data = &spi_si3xxx_chip_info,
375 .mode = SPI_MODE_3,
376 },
377#endif
378#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
379 {
380 .modalias = "ad7877",
381 .platform_data = &bfin_ad7877_ts_info,
382 .irq = IRQ_PF8,
383 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
384 .bus_num = 0,
385 .chip_select = 2,
386 .controller_data = &spi_ad7877_chip_info,
387 },
388#endif
389#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
390 && defined(CONFIG_SND_SOC_WM8731_SPI)
391 {
392 .modalias = "wm8731",
393 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
394 .bus_num = 0,
395 .chip_select = 5,
396 .controller_data = &spi_wm8731_chip_info,
397 .mode = SPI_MODE_0,
398 },
399#endif
400#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
401 {
402 .modalias = "spidev",
403 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
404 .bus_num = 0,
405 .chip_select = 1,
406 .controller_data = &spidev_chip_info,
407 },
408#endif
409#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
410 {
411 .modalias = "bfin-lq035q1-spi",
412 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
413 .bus_num = 0,
414 .chip_select = 1,
415 .controller_data = &lq035q1_spi_chip_info,
416 .mode = SPI_CPHA | SPI_CPOL,
417 },
418#endif
419};
420
421#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
422/* SPI controller data */
423static struct bfin5xx_spi_master bfin_spi0_info = {
424 .num_chipselect = 8,
425 .enable_dma = 1, /* master has the ability to do dma transfer */
426 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
427};
428
429/* SPI (0) */
430static struct resource bfin_spi0_resource[] = {
431 [0] = {
432 .start = SPI0_REGBASE,
433 .end = SPI0_REGBASE + 0xFF,
434 .flags = IORESOURCE_MEM,
435 },
436 [1] = {
437 .start = CH_SPI,
438 .end = CH_SPI,
439 .flags = IORESOURCE_IRQ,
440 },
441};
442
443static struct platform_device bfin_spi0_device = {
444 .name = "bfin-spi",
445 .id = 0, /* Bus number */
446 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
447 .resource = bfin_spi0_resource,
448 .dev = {
449 .platform_data = &bfin_spi0_info, /* Passed to driver */
450 },
451};
452#endif /* spi master and devices */
453
454#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
455static struct resource bfin_uart_resources[] = {
456#ifdef CONFIG_SERIAL_BFIN_UART0
457 {
458 .start = 0xFFC00400,
459 .end = 0xFFC004FF,
460 .flags = IORESOURCE_MEM,
461 },
462#endif
463#ifdef CONFIG_SERIAL_BFIN_UART1
464 {
465 .start = 0xFFC02000,
466 .end = 0xFFC020FF,
467 .flags = IORESOURCE_MEM,
468 },
469#endif
470};
471
472static struct platform_device bfin_uart_device = {
473 .name = "bfin-uart",
474 .id = 1,
475 .num_resources = ARRAY_SIZE(bfin_uart_resources),
476 .resource = bfin_uart_resources,
477};
478#endif
479
480#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
481static struct resource bfin_sir_resources[] = {
482#ifdef CONFIG_BFIN_SIR0
483 {
484 .start = 0xFFC00400,
485 .end = 0xFFC004FF,
486 .flags = IORESOURCE_MEM,
487 },
488#endif
489#ifdef CONFIG_BFIN_SIR1
490 {
491 .start = 0xFFC02000,
492 .end = 0xFFC020FF,
493 .flags = IORESOURCE_MEM,
494 },
495#endif
496};
497
498static struct platform_device bfin_sir_device = {
499 .name = "bfin_sir",
500 .id = 0,
501 .num_resources = ARRAY_SIZE(bfin_sir_resources),
502 .resource = bfin_sir_resources,
503};
504#endif
505
506#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
507static struct resource bfin_twi0_resource[] = {
508 [0] = {
509 .start = TWI0_REGBASE,
510 .end = TWI0_REGBASE,
511 .flags = IORESOURCE_MEM,
512 },
513 [1] = {
514 .start = IRQ_TWI,
515 .end = IRQ_TWI,
516 .flags = IORESOURCE_IRQ,
517 },
518};
519
520static struct platform_device i2c_bfin_twi_device = {
521 .name = "i2c-bfin-twi",
522 .id = 0,
523 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
524 .resource = bfin_twi0_resource,
525};
526#endif
527
528#ifdef CONFIG_I2C_BOARDINFO
529static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
530#if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
531 {
532 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
533 },
534#endif
535#if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
536 {
537 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
538 .irq = IRQ_PF8,
539 },
540#endif
541};
542#endif
543
544#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
545static struct platform_device bfin_sport0_uart_device = {
546 .name = "bfin-sport-uart",
547 .id = 0,
548};
549
550static struct platform_device bfin_sport1_uart_device = {
551 .name = "bfin-sport-uart",
552 .id = 1,
553};
554#endif
555
556#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
557#include <linux/input.h>
558#include <linux/gpio_keys.h>
559
560static struct gpio_keys_button bfin_gpio_keys_table[] = {
561 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
562 {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
563};
564
565static struct gpio_keys_platform_data bfin_gpio_keys_data = {
566 .buttons = bfin_gpio_keys_table,
567 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
568};
569
570static struct platform_device bfin_device_gpiokeys = {
571 .name = "gpio-keys",
572 .dev = {
573 .platform_data = &bfin_gpio_keys_data,
574 },
575};
576#endif
577
578static struct resource bfin_gpios_resources = {
579 .start = 0,
580 .end = MAX_BLACKFIN_GPIOS - 1,
581 .flags = IORESOURCE_IRQ,
582};
583
584static struct platform_device bfin_gpios_device = {
585 .name = "simple-gpio",
586 .id = -1,
587 .num_resources = 1,
588 .resource = &bfin_gpios_resources,
589};
590
591static const unsigned int cclk_vlev_datasheet[] =
592{
593 VRPAIR(VLEV_100, 400000000),
594 VRPAIR(VLEV_105, 426000000),
595 VRPAIR(VLEV_110, 500000000),
596 VRPAIR(VLEV_115, 533000000),
597 VRPAIR(VLEV_120, 600000000),
598};
599
600static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
601 .tuple_tab = cclk_vlev_datasheet,
602 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
603 .vr_settling_time = 25 /* us */,
604};
605
606static struct platform_device bfin_dpmc = {
607 .name = "bfin dpmc",
608 .dev = {
609 .platform_data = &bfin_dmpc_vreg_data,
610 },
611};
612
613#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
614#include <asm/bfin-lq035q1.h>
615
616static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
617 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
618 .use_bl = 1,
619 .gpio_bl = GPIO_PG12,
620};
621
622static struct resource bfin_lq035q1_resources[] = {
623 {
624 .start = IRQ_PPI_ERROR,
625 .end = IRQ_PPI_ERROR,
626 .flags = IORESOURCE_IRQ,
627 },
628};
629
630static struct platform_device bfin_lq035q1_device = {
631 .name = "bfin-lq035q1",
632 .id = -1,
633 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
634 .resource = bfin_lq035q1_resources,
635 .dev = {
636 .platform_data = &bfin_lq035q1_data,
637 },
638};
639#endif
640
641static struct platform_device *stamp_devices[] __initdata = {
642
643 &bfin_dpmc,
644
645#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
646 &bf5xx_nand_device,
647#endif
648
649#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
650 &rtc_device,
651#endif
652
653#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
654 &musb_device,
655#endif
656
657#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
658 &bfin_mac_device,
659#endif
660
661#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
662 &bfin_spi0_device,
663#endif
664
665#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
666 &bfin_uart_device,
667#endif
668
669#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
670 &bfin_lq035q1_device,
671#endif
672
673#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
674 &bfin_sir_device,
675#endif
676
677#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
678 &i2c_bfin_twi_device,
679#endif
680
681#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
682 &bfin_sport0_uart_device,
683 &bfin_sport1_uart_device,
684#endif
685
686#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
687 &bfin_device_gpiokeys,
688#endif
689
690#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
691 &ezbrd_flash_device,
692#endif
693
694 &bfin_gpios_device,
695};
696
697static int __init stamp_init(void)
698{
699 printk(KERN_INFO "%s(): registering device resources\n", __func__);
700
701#ifdef CONFIG_I2C_BOARDINFO
702 i2c_register_board_info(0, bfin_i2c_board_info,
703 ARRAY_SIZE(bfin_i2c_board_info));
704#endif
705
706 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
707 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
708 return 0;
709}
710
711arch_initcall(stamp_init);
712
713void native_machine_restart(char *cmd)
714{
715 /* workaround reboot hang when booting from SPI */
716 if ((bfin_read_SYSCR() & 0x7) == 0x3)
717 bfin_gpio_reset_spi0_ssel1();
718}
719
720void bfin_get_ether_addr(char *addr)
721{
722 /* the MAC is stored in OTP memory page 0xDF */
723 u32 ret;
724 u64 otp_mac;
725 u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
726
727 ret = otp_read(0xDF, 0x00, &otp_mac);
728 if (!(ret & 0x1)) {
729 char *otp_mac_p = (char *)&otp_mac;
730 for (ret = 0; ret < 6; ++ret)
731 addr[ret] = otp_mac_p[5 - ret];
732 }
733}
734EXPORT_SYMBOL(bfin_get_ether_addr);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-11 04:30:17 -0500