aboutsummaryrefslogtreecommitdiffstats
path: root/arch/blackfin/kernel
diff options
context:
space:
mode:
Diffstat (limited to 'arch/blackfin/kernel')
-rw-r--r--arch/blackfin/kernel/bfin_dma_5xx.c15
-rw-r--r--arch/blackfin/kernel/fixed_code.S12
-rw-r--r--arch/blackfin/kernel/gptimers.c8
-rw-r--r--arch/blackfin/kernel/setup.c5
-rw-r--r--arch/blackfin/kernel/vmlinux.lds.S34
5 files changed, 49 insertions, 25 deletions
diff --git a/arch/blackfin/kernel/bfin_dma_5xx.c b/arch/blackfin/kernel/bfin_dma_5xx.c
index 5453bc3664fc..8fd5d22cec34 100644
--- a/arch/blackfin/kernel/bfin_dma_5xx.c
+++ b/arch/blackfin/kernel/bfin_dma_5xx.c
@@ -105,13 +105,14 @@ int request_dma(unsigned int channel, char *device_id)
105 mutex_unlock(&(dma_ch[channel].dmalock)); 105 mutex_unlock(&(dma_ch[channel].dmalock));
106 106
107#ifdef CONFIG_BF54x 107#ifdef CONFIG_BF54x
108 if (channel >= CH_UART2_RX && channel <= CH_UART3_TX && 108 if (channel >= CH_UART2_RX && channel <= CH_UART3_TX) {
109 strncmp(device_id, "BFIN_UART", 9) == 0) 109 if (strncmp(device_id, "BFIN_UART", 9) == 0)
110 dma_ch[channel].regs->peripheral_map |= 110 dma_ch[channel].regs->peripheral_map |=
111 (channel - CH_UART2_RX + 0xC); 111 (channel - CH_UART2_RX + 0xC);
112 else 112 else
113 dma_ch[channel].regs->peripheral_map |= 113 dma_ch[channel].regs->peripheral_map |=
114 (channel - CH_UART2_RX + 0x6); 114 (channel - CH_UART2_RX + 0x6);
115 }
115#endif 116#endif
116 117
117 dma_ch[channel].device_id = device_id; 118 dma_ch[channel].device_id = device_id;
diff --git a/arch/blackfin/kernel/fixed_code.S b/arch/blackfin/kernel/fixed_code.S
index 90262691b11a..5ed47228a390 100644
--- a/arch/blackfin/kernel/fixed_code.S
+++ b/arch/blackfin/kernel/fixed_code.S
@@ -101,9 +101,9 @@ ENDPROC (_atomic_ior32)
101 101
102.align 16 102.align 16
103 /* 103 /*
104 * Atomic ior, 32 bit. 104 * Atomic and, 32 bit.
105 * Inputs: P0: memory address to use 105 * Inputs: P0: memory address to use
106 * R0: value to ior 106 * R0: value to and
107 * Outputs: R0: new contents of the memory address. 107 * Outputs: R0: new contents of the memory address.
108 * R1: previous contents of the memory address. 108 * R1: previous contents of the memory address.
109 */ 109 */
@@ -112,13 +112,13 @@ ENTRY(_atomic_and32)
112 R0 = R1 & R0; 112 R0 = R1 & R0;
113 [P0] = R0; 113 [P0] = R0;
114 rts; 114 rts;
115ENDPROC (_atomic_ior32) 115ENDPROC (_atomic_and32)
116 116
117.align 16 117.align 16
118 /* 118 /*
119 * Atomic ior, 32 bit. 119 * Atomic xor, 32 bit.
120 * Inputs: P0: memory address to use 120 * Inputs: P0: memory address to use
121 * R0: value to ior 121 * R0: value to xor
122 * Outputs: R0: new contents of the memory address. 122 * Outputs: R0: new contents of the memory address.
123 * R1: previous contents of the memory address. 123 * R1: previous contents of the memory address.
124 */ 124 */
@@ -127,7 +127,7 @@ ENTRY(_atomic_xor32)
127 R0 = R1 ^ R0; 127 R0 = R1 ^ R0;
128 [P0] = R0; 128 [P0] = R0;
129 rts; 129 rts;
130ENDPROC (_atomic_ior32) 130ENDPROC (_atomic_xor32)
131 131
132.align 16 132.align 16
133 /* 133 /*
diff --git a/arch/blackfin/kernel/gptimers.c b/arch/blackfin/kernel/gptimers.c
index 5cf4bdb1df3b..1904d8b53328 100644
--- a/arch/blackfin/kernel/gptimers.c
+++ b/arch/blackfin/kernel/gptimers.c
@@ -1,9 +1,9 @@
1/* 1/*
2 * bfin_gptimers.c - derived from bf53x_timers.c 2 * gptimers.c - Blackfin General Purpose Timer core API
3 * Driver for General Purpose Timer functions on the Blackfin processor
4 * 3 *
5 * Copyright (C) 2005 John DeHority 4 * Copyright (c) 2005-2008 Analog Devices Inc.
6 * Copyright (C) 2006 Hella Aglaia GmbH (awe@aglaia-gmbh.de) 5 * Copyright (C) 2005 John DeHority
6 * Copyright (C) 2006 Hella Aglaia GmbH (awe@aglaia-gmbh.de)
7 * 7 *
8 * Licensed under the GPLv2. 8 * Licensed under the GPLv2.
9 */ 9 */
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index 8229b1090eb9..2255c289a714 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -32,6 +32,7 @@
32static DEFINE_PER_CPU(struct cpu, cpu_devices); 32static DEFINE_PER_CPU(struct cpu, cpu_devices);
33 33
34u16 _bfin_swrst; 34u16 _bfin_swrst;
35EXPORT_SYMBOL(_bfin_swrst);
35 36
36unsigned long memory_start, memory_end, physical_mem_end; 37unsigned long memory_start, memory_end, physical_mem_end;
37unsigned long reserved_mem_dcache_on; 38unsigned long reserved_mem_dcache_on;
@@ -514,6 +515,7 @@ static __init void memory_setup(void)
514 printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20); 515 printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
515 516
516 printk(KERN_INFO "Memory map:\n" 517 printk(KERN_INFO "Memory map:\n"
518 KERN_INFO " fixedcode = 0x%p-0x%p\n"
517 KERN_INFO " text = 0x%p-0x%p\n" 519 KERN_INFO " text = 0x%p-0x%p\n"
518 KERN_INFO " rodata = 0x%p-0x%p\n" 520 KERN_INFO " rodata = 0x%p-0x%p\n"
519 KERN_INFO " bss = 0x%p-0x%p\n" 521 KERN_INFO " bss = 0x%p-0x%p\n"
@@ -527,7 +529,8 @@ static __init void memory_setup(void)
527#if DMA_UNCACHED_REGION > 0 529#if DMA_UNCACHED_REGION > 0
528 KERN_INFO " DMA Zone = 0x%p-0x%p\n" 530 KERN_INFO " DMA Zone = 0x%p-0x%p\n"
529#endif 531#endif
530 , _stext, _etext, 532 , (void *)FIXED_CODE_START, (void *)FIXED_CODE_END,
533 _stext, _etext,
531 __start_rodata, __end_rodata, 534 __start_rodata, __end_rodata,
532 __bss_start, __bss_stop, 535 __bss_start, __bss_stop,
533 _sdata, _edata, 536 _sdata, _edata,
diff --git a/arch/blackfin/kernel/vmlinux.lds.S b/arch/blackfin/kernel/vmlinux.lds.S
index aed832540b3b..cb01a9de2680 100644
--- a/arch/blackfin/kernel/vmlinux.lds.S
+++ b/arch/blackfin/kernel/vmlinux.lds.S
@@ -147,44 +147,64 @@ SECTIONS
147 147
148 __l1_lma_start = .; 148 __l1_lma_start = .;
149 149
150#if L1_CODE_LENGTH
151# define LDS_L1_CODE *(.l1.text)
152#else
153# define LDS_L1_CODE
154#endif
150 .text_l1 L1_CODE_START : AT(LOADADDR(.init.ramfs) + SIZEOF(.init.ramfs)) 155 .text_l1 L1_CODE_START : AT(LOADADDR(.init.ramfs) + SIZEOF(.init.ramfs))
151 { 156 {
152 . = ALIGN(4); 157 . = ALIGN(4);
153 __stext_l1 = .; 158 __stext_l1 = .;
154 *(.l1.text) 159 LDS_L1_CODE
155
156 . = ALIGN(4); 160 . = ALIGN(4);
157 __etext_l1 = .; 161 __etext_l1 = .;
158 } 162 }
159 163
164#if L1_DATA_A_LENGTH
165# define LDS_L1_A_DATA *(.l1.data)
166# define LDS_L1_A_BSS *(.l1.bss)
167# define LDS_L1_A_CACHE *(.data_l1.cacheline_aligned)
168#else
169# define LDS_L1_A_DATA
170# define LDS_L1_A_BSS
171# define LDS_L1_A_CACHE
172#endif
160 .data_l1 L1_DATA_A_START : AT(LOADADDR(.text_l1) + SIZEOF(.text_l1)) 173 .data_l1 L1_DATA_A_START : AT(LOADADDR(.text_l1) + SIZEOF(.text_l1))
161 { 174 {
162 . = ALIGN(4); 175 . = ALIGN(4);
163 __sdata_l1 = .; 176 __sdata_l1 = .;
164 *(.l1.data) 177 LDS_L1_A_DATA
165 __edata_l1 = .; 178 __edata_l1 = .;
166 179
167 . = ALIGN(4); 180 . = ALIGN(4);
168 __sbss_l1 = .; 181 __sbss_l1 = .;
169 *(.l1.bss) 182 LDS_L1_A_BSS
170 183
171 . = ALIGN(32); 184 . = ALIGN(32);
172 *(.data_l1.cacheline_aligned) 185 LDS_L1_A_CACHE
173 186
174 . = ALIGN(4); 187 . = ALIGN(4);
175 __ebss_l1 = .; 188 __ebss_l1 = .;
176 } 189 }
177 190
191#if L1_DATA_B_LENGTH
192# define LDS_L1_B_DATA *(.l1.data.B)
193# define LDS_L1_B_BSS *(.l1.bss.B)
194#else
195# define LDS_L1_B_DATA
196# define LDS_L1_B_BSS
197#endif
178 .data_b_l1 L1_DATA_B_START : AT(LOADADDR(.data_l1) + SIZEOF(.data_l1)) 198 .data_b_l1 L1_DATA_B_START : AT(LOADADDR(.data_l1) + SIZEOF(.data_l1))
179 { 199 {
180 . = ALIGN(4); 200 . = ALIGN(4);
181 __sdata_b_l1 = .; 201 __sdata_b_l1 = .;
182 *(.l1.data.B) 202 LDS_L1_B_DATA
183 __edata_b_l1 = .; 203 __edata_b_l1 = .;
184 204
185 . = ALIGN(4); 205 . = ALIGN(4);
186 __sbss_b_l1 = .; 206 __sbss_b_l1 = .;
187 *(.l1.bss.B) 207 LDS_L1_B_BSS
188 208
189 . = ALIGN(4); 209 . = ALIGN(4);
190 __ebss_b_l1 = .; 210 __ebss_b_l1 = .;