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-rw-r--r--arch/blackfin/kernel/cplb-nompu/cplbinit.c10
-rw-r--r--arch/blackfin/kernel/setup.c45
2 files changed, 52 insertions, 3 deletions
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
index f271f39d5655..917325bfbd84 100644
--- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
@@ -26,6 +26,12 @@
26#include <asm/cplb.h> 26#include <asm/cplb.h>
27#include <asm/cplbinit.h> 27#include <asm/cplbinit.h>
28 28
29#ifdef CONFIG_MAX_MEM_SIZE
30# define CPLB_MEM CONFIG_MAX_MEM_SIZE
31#else
32# define CPLB_MEM CONFIG_MEM_SIZE
33#endif
34
29/* 35/*
30* Number of required data CPLB switchtable entries 36* Number of required data CPLB switchtable entries
31* MEMSIZE / 4 (we mostly install 4M page size CPLBs 37* MEMSIZE / 4 (we mostly install 4M page size CPLBs
@@ -35,7 +41,7 @@
35* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO 41* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO
36* 1 for ASYNC Memory 42* 1 for ASYNC Memory
37*/ 43*/
38#define MAX_SWITCH_D_CPLBS (((CONFIG_MEM_SIZE / 4) + 16 + 1 + 1 + 1 \ 44#define MAX_SWITCH_D_CPLBS (((CPLB_MEM / 4) + 16 + 1 + 1 + 1 \
39 + ASYNC_MEMORY_CPLB_COVERAGE) * 2) 45 + ASYNC_MEMORY_CPLB_COVERAGE) * 2)
40 46
41/* 47/*
@@ -46,7 +52,7 @@
46* possibly 1 for L2 Instruction Memory 52* possibly 1 for L2 Instruction Memory
47* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO 53* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO
48*/ 54*/
49#define MAX_SWITCH_I_CPLBS (((CONFIG_MEM_SIZE / 4) + 12 + 1 + 1 + 1) * 2) 55#define MAX_SWITCH_I_CPLBS (((CPLB_MEM / 4) + 12 + 1 + 1 + 1) * 2)
50 56
51 57
52u_long icplb_table[MAX_CPLBS + 1]; 58u_long icplb_table[MAX_CPLBS + 1];
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index c2f3e73ba25a..d6668328be72 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -649,6 +649,49 @@ static __init void setup_bootmem_allocator(void)
649 BOOTMEM_DEFAULT); 649 BOOTMEM_DEFAULT);
650} 650}
651 651
652#define EBSZ_TO_MEG(ebsz) \
653({ \
654 int meg = 0; \
655 switch (ebsz & 0xf) { \
656 case 0x1: meg = 16; break; \
657 case 0x3: meg = 32; break; \
658 case 0x5: meg = 64; break; \
659 case 0x7: meg = 128; break; \
660 case 0x9: meg = 256; break; \
661 case 0xb: meg = 512; break; \
662 } \
663 meg; \
664})
665static inline int __init get_mem_size(void)
666{
667#ifdef CONFIG_MEM_SIZE
668 return CONFIG_MEM_SIZE;
669#else
670# if defined(EBIU_SDBCTL)
671# if defined(BF561_FAMILY)
672 int ret = 0;
673 u32 sdbctl = bfin_read_EBIU_SDBCTL();
674 ret += EBSZ_TO_MEG(sdbctl >> 0);
675 ret += EBSZ_TO_MEG(sdbctl >> 8);
676 ret += EBSZ_TO_MEG(sdbctl >> 16);
677 ret += EBSZ_TO_MEG(sdbctl >> 24);
678 return ret;
679# else
680 return EBSZ_TO_MEG(bfin_read_EBIU_SDBCTL());
681# endif
682# elif defined(EBIU_DDRCTL1)
683 switch (bfin_read_EBIU_DDRCTL1() & 0xc0000) {
684 case DEVSZ_64: return 64;
685 case DEVSZ_128: return 128;
686 case DEVSZ_256: return 256;
687 case DEVSZ_512: return 512;
688 default: return 0;
689 }
690# endif
691#endif
692 BUG();
693}
694
652void __init setup_arch(char **cmdline_p) 695void __init setup_arch(char **cmdline_p)
653{ 696{
654 unsigned long sclk, cclk; 697 unsigned long sclk, cclk;
@@ -669,7 +712,7 @@ void __init setup_arch(char **cmdline_p)
669 712
670 /* setup memory defaults from the user config */ 713 /* setup memory defaults from the user config */
671 physical_mem_end = 0; 714 physical_mem_end = 0;
672 _ramend = CONFIG_MEM_SIZE * 1024 * 1024; 715 _ramend = get_mem_size() * 1024 * 1024;
673 716
674 memset(&bfin_memmap, 0, sizeof(bfin_memmap)); 717 memset(&bfin_memmap, 0, sizeof(bfin_memmap));
675 718