diff options
Diffstat (limited to 'arch/blackfin/kernel/setup.c')
-rw-r--r-- | arch/blackfin/kernel/setup.c | 122 |
1 files changed, 95 insertions, 27 deletions
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c index 6454babdfaff..298f023bcc09 100644 --- a/arch/blackfin/kernel/setup.c +++ b/arch/blackfin/kernel/setup.c | |||
@@ -117,15 +117,49 @@ void __cpuinit bfin_setup_caches(unsigned int cpu) | |||
117 | */ | 117 | */ |
118 | #ifdef CONFIG_BFIN_ICACHE | 118 | #ifdef CONFIG_BFIN_ICACHE |
119 | printk(KERN_INFO "Instruction Cache Enabled for CPU%u\n", cpu); | 119 | printk(KERN_INFO "Instruction Cache Enabled for CPU%u\n", cpu); |
120 | printk(KERN_INFO " External memory:" | ||
121 | # ifdef CONFIG_BFIN_EXTMEM_ICACHEABLE | ||
122 | " cacheable" | ||
123 | # else | ||
124 | " uncacheable" | ||
125 | # endif | ||
126 | " in instruction cache\n"); | ||
127 | if (L2_LENGTH) | ||
128 | printk(KERN_INFO " L2 SRAM :" | ||
129 | # ifdef CONFIG_BFIN_L2_ICACHEABLE | ||
130 | " cacheable" | ||
131 | # else | ||
132 | " uncacheable" | ||
133 | # endif | ||
134 | " in instruction cache\n"); | ||
135 | |||
136 | #else | ||
137 | printk(KERN_INFO "Instruction Cache Disabled for CPU%u\n", cpu); | ||
120 | #endif | 138 | #endif |
139 | |||
121 | #ifdef CONFIG_BFIN_DCACHE | 140 | #ifdef CONFIG_BFIN_DCACHE |
122 | printk(KERN_INFO "Data Cache Enabled for CPU%u" | 141 | printk(KERN_INFO "Data Cache Enabled for CPU%u\n", cpu); |
123 | # if defined CONFIG_BFIN_WB | 142 | printk(KERN_INFO " External memory:" |
124 | " (write-back)" | 143 | # if defined CONFIG_BFIN_EXTMEM_WRITEBACK |
125 | # elif defined CONFIG_BFIN_WT | 144 | " cacheable (write-back)" |
126 | " (write-through)" | 145 | # elif defined CONFIG_BFIN_EXTMEM_WRITETHROUGH |
146 | " cacheable (write-through)" | ||
147 | # else | ||
148 | " uncacheable" | ||
127 | # endif | 149 | # endif |
128 | "\n", cpu); | 150 | " in data cache\n"); |
151 | if (L2_LENGTH) | ||
152 | printk(KERN_INFO " L2 SRAM :" | ||
153 | # if defined CONFIG_BFIN_L2_WRITEBACK | ||
154 | " cacheable (write-back)" | ||
155 | # elif defined CONFIG_BFIN_L2_WRITETHROUGH | ||
156 | " cacheable (write-through)" | ||
157 | # else | ||
158 | " uncacheable" | ||
159 | # endif | ||
160 | " in data cache\n"); | ||
161 | #else | ||
162 | printk(KERN_INFO "Data Cache Disabled for CPU%u\n", cpu); | ||
129 | #endif | 163 | #endif |
130 | } | 164 | } |
131 | 165 | ||
@@ -443,9 +477,11 @@ static __init void parse_cmdline_early(char *cmdline_p) | |||
443 | } else if (!memcmp(to, "clkin_hz=", 9)) { | 477 | } else if (!memcmp(to, "clkin_hz=", 9)) { |
444 | to += 9; | 478 | to += 9; |
445 | early_init_clkin_hz(to); | 479 | early_init_clkin_hz(to); |
480 | #ifdef CONFIG_EARLY_PRINTK | ||
446 | } else if (!memcmp(to, "earlyprintk=", 12)) { | 481 | } else if (!memcmp(to, "earlyprintk=", 12)) { |
447 | to += 12; | 482 | to += 12; |
448 | setup_early_printk(to); | 483 | setup_early_printk(to); |
484 | #endif | ||
449 | } else if (!memcmp(to, "memmap=", 7)) { | 485 | } else if (!memcmp(to, "memmap=", 7)) { |
450 | to += 7; | 486 | to += 7; |
451 | parse_memmap(to); | 487 | parse_memmap(to); |
@@ -516,7 +552,7 @@ static __init void memory_setup(void) | |||
516 | && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1) | 552 | && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1) |
517 | mtd_size = | 553 | mtd_size = |
518 | PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2])); | 554 | PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2])); |
519 | # if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263) | 555 | # if (defined(CONFIG_BFIN_EXTMEM_ICACHEABLE) && ANOMALY_05000263) |
520 | /* Due to a Hardware Anomaly we need to limit the size of usable | 556 | /* Due to a Hardware Anomaly we need to limit the size of usable |
521 | * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on | 557 | * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on |
522 | * 05000263 - Hardware loop corrupted when taking an ICPLB exception | 558 | * 05000263 - Hardware loop corrupted when taking an ICPLB exception |
@@ -544,7 +580,7 @@ static __init void memory_setup(void) | |||
544 | dma_memcpy((void *)uclinux_ram_map.phys, _end, uclinux_ram_map.size); | 580 | dma_memcpy((void *)uclinux_ram_map.phys, _end, uclinux_ram_map.size); |
545 | #endif /* CONFIG_MTD_UCLINUX */ | 581 | #endif /* CONFIG_MTD_UCLINUX */ |
546 | 582 | ||
547 | #if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263) | 583 | #if (defined(CONFIG_BFIN_EXTMEM_ICACHEABLE) && ANOMALY_05000263) |
548 | /* Due to a Hardware Anomaly we need to limit the size of usable | 584 | /* Due to a Hardware Anomaly we need to limit the size of usable |
549 | * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on | 585 | * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on |
550 | * 05000263 - Hardware loop corrupted when taking an ICPLB exception | 586 | * 05000263 - Hardware loop corrupted when taking an ICPLB exception |
@@ -764,6 +800,11 @@ void __init setup_arch(char **cmdline_p) | |||
764 | { | 800 | { |
765 | unsigned long sclk, cclk; | 801 | unsigned long sclk, cclk; |
766 | 802 | ||
803 | /* Check to make sure we are running on the right processor */ | ||
804 | if (unlikely(CPUID != bfin_cpuid())) | ||
805 | printk(KERN_ERR "ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n", | ||
806 | CPU, bfin_cpuid(), bfin_revid()); | ||
807 | |||
767 | #ifdef CONFIG_DUMMY_CONSOLE | 808 | #ifdef CONFIG_DUMMY_CONSOLE |
768 | conswitchp = &dummy_con; | 809 | conswitchp = &dummy_con; |
769 | #endif | 810 | #endif |
@@ -778,14 +819,17 @@ void __init setup_arch(char **cmdline_p) | |||
778 | memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE); | 819 | memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE); |
779 | boot_command_line[COMMAND_LINE_SIZE - 1] = '\0'; | 820 | boot_command_line[COMMAND_LINE_SIZE - 1] = '\0'; |
780 | 821 | ||
781 | /* setup memory defaults from the user config */ | ||
782 | physical_mem_end = 0; | ||
783 | _ramend = get_mem_size() * 1024 * 1024; | ||
784 | |||
785 | memset(&bfin_memmap, 0, sizeof(bfin_memmap)); | 822 | memset(&bfin_memmap, 0, sizeof(bfin_memmap)); |
786 | 823 | ||
824 | /* If the user does not specify things on the command line, use | ||
825 | * what the bootloader set things up as | ||
826 | */ | ||
827 | physical_mem_end = 0; | ||
787 | parse_cmdline_early(&command_line[0]); | 828 | parse_cmdline_early(&command_line[0]); |
788 | 829 | ||
830 | if (_ramend == 0) | ||
831 | _ramend = get_mem_size() * 1024 * 1024; | ||
832 | |||
789 | if (physical_mem_end == 0) | 833 | if (physical_mem_end == 0) |
790 | physical_mem_end = _ramend; | 834 | physical_mem_end = _ramend; |
791 | 835 | ||
@@ -837,7 +881,8 @@ void __init setup_arch(char **cmdline_p) | |||
837 | defined(CONFIG_BF538) || defined(CONFIG_BF539) | 881 | defined(CONFIG_BF538) || defined(CONFIG_BF539) |
838 | _bfin_swrst = bfin_read_SWRST(); | 882 | _bfin_swrst = bfin_read_SWRST(); |
839 | #else | 883 | #else |
840 | _bfin_swrst = bfin_read_SYSCR(); | 884 | /* Clear boot mode field */ |
885 | _bfin_swrst = bfin_read_SYSCR() & ~0xf; | ||
841 | #endif | 886 | #endif |
842 | 887 | ||
843 | #ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT | 888 | #ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT |
@@ -875,10 +920,7 @@ void __init setup_arch(char **cmdline_p) | |||
875 | else | 920 | else |
876 | printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid()); | 921 | printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid()); |
877 | 922 | ||
878 | if (unlikely(CPUID != bfin_cpuid())) | 923 | if (likely(CPUID == bfin_cpuid())) { |
879 | printk(KERN_ERR "ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n", | ||
880 | CPU, bfin_cpuid(), bfin_revid()); | ||
881 | else { | ||
882 | if (bfin_revid() != bfin_compiled_revid()) { | 924 | if (bfin_revid() != bfin_compiled_revid()) { |
883 | if (bfin_compiled_revid() == -1) | 925 | if (bfin_compiled_revid() == -1) |
884 | printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n", | 926 | printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n", |
@@ -1157,16 +1199,25 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
1157 | icache_size = 0; | 1199 | icache_size = 0; |
1158 | 1200 | ||
1159 | seq_printf(m, "cache size\t: %d KB(L1 icache) " | 1201 | seq_printf(m, "cache size\t: %d KB(L1 icache) " |
1160 | "%d KB(L1 dcache%s) %d KB(L2 cache)\n", | 1202 | "%d KB(L1 dcache) %d KB(L2 cache)\n", |
1161 | icache_size, dcache_size, | 1203 | icache_size, dcache_size, 0); |
1162 | #if defined CONFIG_BFIN_WB | ||
1163 | "-wb" | ||
1164 | #elif defined CONFIG_BFIN_WT | ||
1165 | "-wt" | ||
1166 | #endif | ||
1167 | "", 0); | ||
1168 | |||
1169 | seq_printf(m, "%s\n", cache); | 1204 | seq_printf(m, "%s\n", cache); |
1205 | seq_printf(m, "external memory\t: " | ||
1206 | #if defined(CONFIG_BFIN_EXTMEM_ICACHEABLE) | ||
1207 | "cacheable" | ||
1208 | #else | ||
1209 | "uncacheable" | ||
1210 | #endif | ||
1211 | " in instruction cache\n"); | ||
1212 | seq_printf(m, "external memory\t: " | ||
1213 | #if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) | ||
1214 | "cacheable (write-back)" | ||
1215 | #elif defined(CONFIG_BFIN_EXTMEM_WRITETHROUGH) | ||
1216 | "cacheable (write-through)" | ||
1217 | #else | ||
1218 | "uncacheable" | ||
1219 | #endif | ||
1220 | " in data cache\n"); | ||
1170 | 1221 | ||
1171 | if (icache_size) | 1222 | if (icache_size) |
1172 | seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n", | 1223 | seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n", |
@@ -1239,8 +1290,25 @@ static int show_cpuinfo(struct seq_file *m, void *v) | |||
1239 | if (cpu_num != num_possible_cpus() - 1) | 1290 | if (cpu_num != num_possible_cpus() - 1) |
1240 | return 0; | 1291 | return 0; |
1241 | 1292 | ||
1242 | if (L2_LENGTH) | 1293 | if (L2_LENGTH) { |
1243 | seq_printf(m, "L2 SRAM\t\t: %dKB\n", L2_LENGTH/0x400); | 1294 | seq_printf(m, "L2 SRAM\t\t: %dKB\n", L2_LENGTH/0x400); |
1295 | seq_printf(m, "L2 SRAM\t\t: " | ||
1296 | #if defined(CONFIG_BFIN_L2_ICACHEABLE) | ||
1297 | "cacheable" | ||
1298 | #else | ||
1299 | "uncacheable" | ||
1300 | #endif | ||
1301 | " in instruction cache\n"); | ||
1302 | seq_printf(m, "L2 SRAM\t\t: " | ||
1303 | #if defined(CONFIG_BFIN_L2_WRITEBACK) | ||
1304 | "cacheable (write-back)" | ||
1305 | #elif defined(CONFIG_BFIN_L2_WRITETHROUGH) | ||
1306 | "cacheable (write-through)" | ||
1307 | #else | ||
1308 | "uncacheable" | ||
1309 | #endif | ||
1310 | " in data cache\n"); | ||
1311 | } | ||
1244 | seq_printf(m, "board name\t: %s\n", bfin_board_name); | 1312 | seq_printf(m, "board name\t: %s\n", bfin_board_name); |
1245 | seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n", | 1313 | seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n", |
1246 | physical_mem_end >> 10, (void *)0, (void *)physical_mem_end); | 1314 | physical_mem_end >> 10, (void *)0, (void *)physical_mem_end); |