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Diffstat (limited to 'arch/blackfin/kernel/kgdb.c')
-rw-r--r--arch/blackfin/kernel/kgdb.c125
1 files changed, 35 insertions, 90 deletions
diff --git a/arch/blackfin/kernel/kgdb.c b/arch/blackfin/kernel/kgdb.c
index 1c5afaeb9504..b163f6d3330d 100644
--- a/arch/blackfin/kernel/kgdb.c
+++ b/arch/blackfin/kernel/kgdb.c
@@ -34,9 +34,14 @@ int gdb_bfin_vector = -1;
34#error change the definition of slavecpulocks 34#error change the definition of slavecpulocks
35#endif 35#endif
36 36
37#ifdef CONFIG_BFIN_WDT 37#define IN_MEM(addr, size, l1_addr, l1_size) \
38# error "Please unselect blackfin watchdog driver before build KGDB." 38({ \
39#endif 39 unsigned long __addr = (unsigned long)(addr); \
40 (l1_size && __addr >= l1_addr && __addr + (size) <= l1_addr + l1_size); \
41})
42#define ASYNC_BANK_SIZE \
43 (ASYNC_BANK0_SIZE + ASYNC_BANK1_SIZE + \
44 ASYNC_BANK2_SIZE + ASYNC_BANK3_SIZE)
40 45
41void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs) 46void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
42{ 47{
@@ -219,6 +224,7 @@ int bfin_set_hw_break(unsigned long addr, int len, enum kgdb_bptype type)
219 if (bfin_type == breakinfo[breakno].type 224 if (bfin_type == breakinfo[breakno].type
220 && !breakinfo[breakno].occupied) { 225 && !breakinfo[breakno].occupied) {
221 breakinfo[breakno].occupied = 1; 226 breakinfo[breakno].occupied = 1;
227 breakinfo[breakno].skip = 0;
222 breakinfo[breakno].enabled = 1; 228 breakinfo[breakno].enabled = 1;
223 breakinfo[breakno].addr = addr; 229 breakinfo[breakno].addr = addr;
224 breakinfo[breakno].dataacc = dataacc; 230 breakinfo[breakno].dataacc = dataacc;
@@ -363,12 +369,12 @@ void kgdb_passive_cpu_callback(void *info)
363 369
364void kgdb_roundup_cpus(unsigned long flags) 370void kgdb_roundup_cpus(unsigned long flags)
365{ 371{
366 smp_call_function(kgdb_passive_cpu_callback, NULL, 0, 0); 372 smp_call_function(kgdb_passive_cpu_callback, NULL, 0);
367} 373}
368 374
369void kgdb_roundup_cpu(int cpu, unsigned long flags) 375void kgdb_roundup_cpu(int cpu, unsigned long flags)
370{ 376{
371 smp_call_function_single(cpu, kgdb_passive_cpu_callback, NULL, 0, 0); 377 smp_call_function_single(cpu, kgdb_passive_cpu_callback, NULL, 0);
372} 378}
373#endif 379#endif
374 380
@@ -385,10 +391,8 @@ int kgdb_arch_handle_exception(int vector, int signo,
385 struct pt_regs *regs) 391 struct pt_regs *regs)
386{ 392{
387 long addr; 393 long addr;
388 long breakno;
389 char *ptr; 394 char *ptr;
390 int newPC; 395 int newPC;
391 int wp_status;
392 int i; 396 int i;
393 397
394 switch (remcom_in_buffer[0]) { 398 switch (remcom_in_buffer[0]) {
@@ -426,17 +430,6 @@ int kgdb_arch_handle_exception(int vector, int signo,
426 kgdb_single_step = i + 1; 430 kgdb_single_step = i + 1;
427 } 431 }
428 432
429 if (vector == VEC_WATCH) {
430 wp_status = bfin_read_WPSTAT();
431 for (breakno = 0; breakno < HW_WATCHPOINT_NUM; breakno++) {
432 if (wp_status & (1 << breakno)) {
433 breakinfo->skip = 1;
434 break;
435 }
436 }
437 bfin_write_WPSTAT(0);
438 }
439
440 bfin_correct_hw_break(); 433 bfin_correct_hw_break();
441 434
442 return 0; 435 return 0;
@@ -478,57 +471,32 @@ static int validate_memory_access_address(unsigned long addr, int size)
478 return 0; 471 return 0;
479 if (addr >= SYSMMR_BASE) 472 if (addr >= SYSMMR_BASE)
480 return 0; 473 return 0;
481 if (addr >= ASYNC_BANK0_BASE 474 if (IN_MEM(addr, size, ASYNC_BANK0_BASE, ASYNC_BANK_SIZE))
482 && addr + size <= ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE)
483 return 0; 475 return 0;
484 if (cpu == 0) { 476 if (cpu == 0) {
485 if (addr >= L1_SCRATCH_START 477 if (IN_MEM(addr, size, L1_SCRATCH_START, L1_SCRATCH_LENGTH))
486 && (addr + size <= L1_SCRATCH_START + L1_SCRATCH_LENGTH))
487 return 0; 478 return 0;
488#if L1_CODE_LENGTH != 0 479 if (IN_MEM(addr, size, L1_CODE_START, L1_CODE_LENGTH))
489 if (addr >= L1_CODE_START
490 && (addr + size <= L1_CODE_START + L1_CODE_LENGTH))
491 return 0; 480 return 0;
492#endif 481 if (IN_MEM(addr, size, L1_DATA_A_START, L1_DATA_A_LENGTH))
493#if L1_DATA_A_LENGTH != 0
494 if (addr >= L1_DATA_A_START
495 && (addr + size <= L1_DATA_A_START + L1_DATA_A_LENGTH))
496 return 0; 482 return 0;
497#endif 483 if (IN_MEM(addr, size, L1_DATA_B_START, L1_DATA_B_LENGTH))
498#if L1_DATA_B_LENGTH != 0
499 if (addr >= L1_DATA_B_START
500 && (addr + size <= L1_DATA_B_START + L1_DATA_B_LENGTH))
501 return 0; 484 return 0;
502#endif
503#ifdef CONFIG_SMP 485#ifdef CONFIG_SMP
504 } else if (cpu == 1) { 486 } else if (cpu == 1) {
505 if (addr >= COREB_L1_SCRATCH_START 487 if (IN_MEM(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
506 && (addr + size <= COREB_L1_SCRATCH_START
507 + L1_SCRATCH_LENGTH))
508 return 0; 488 return 0;
509# if L1_CODE_LENGTH != 0 489 if (IN_MEM(addr, size, COREB_L1_CODE_START, L1_CODE_LENGTH))
510 if (addr >= COREB_L1_CODE_START
511 && (addr + size <= COREB_L1_CODE_START + L1_CODE_LENGTH))
512 return 0; 490 return 0;
513# endif 491 if (IN_MEM(addr, size, COREB_L1_DATA_A_START, L1_DATA_A_LENGTH))
514# if L1_DATA_A_LENGTH != 0
515 if (addr >= COREB_L1_DATA_A_START
516 && (addr + size <= COREB_L1_DATA_A_START + L1_DATA_A_LENGTH))
517 return 0; 492 return 0;
518# endif 493 if (IN_MEM(addr, size, COREB_L1_DATA_B_START, L1_DATA_B_LENGTH))
519# if L1_DATA_B_LENGTH != 0
520 if (addr >= COREB_L1_DATA_B_START
521 && (addr + size <= COREB_L1_DATA_B_START + L1_DATA_B_LENGTH))
522 return 0; 494 return 0;
523# endif
524#endif 495#endif
525 } 496 }
526 497
527#if L2_LENGTH != 0 498 if (IN_MEM(addr, size, L2_START, L2_LENGTH))
528 if (addr >= L2_START
529 && addr + size <= L2_START + L2_LENGTH)
530 return 0; 499 return 0;
531#endif
532 500
533 return EFAULT; 501 return EFAULT;
534} 502}
@@ -582,12 +550,9 @@ int kgdb_mem2hex(char *mem, char *buf, int count)
582 default: 550 default:
583 err = EFAULT; 551 err = EFAULT;
584 } 552 }
585 } else if (cpu == 0 && (unsigned int)mem >= L1_CODE_START && 553 } else if ((cpu == 0 && IN_MEM(mem, count, L1_CODE_START, L1_CODE_LENGTH))
586 (unsigned int)(mem + count) <= L1_CODE_START + L1_CODE_LENGTH
587#ifdef CONFIG_SMP 554#ifdef CONFIG_SMP
588 || cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START && 555 || (cpu == 1 && IN_MEM(mem, count, COREB_L1_CODE_START, L1_CODE_LENGTH))
589 (unsigned int)(mem + count) <=
590 COREB_L1_CODE_START + L1_CODE_LENGTH
591#endif 556#endif
592 ) { 557 ) {
593 /* access L1 instruction SRAM*/ 558 /* access L1 instruction SRAM*/
@@ -658,12 +623,9 @@ int kgdb_ebin2mem(char *buf, char *mem, int count)
658 default: 623 default:
659 return EFAULT; 624 return EFAULT;
660 } 625 }
661 } else if (cpu == 0 && (unsigned int)mem >= L1_CODE_START && 626 } else if ((cpu == 0 && IN_MEM(mem, count, L1_CODE_START, L1_CODE_LENGTH))
662 (unsigned int)(mem + count) < L1_CODE_START + L1_CODE_LENGTH
663#ifdef CONFIG_SMP 627#ifdef CONFIG_SMP
664 || cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START && 628 || (cpu == 1 && IN_MEM(mem, count, COREB_L1_CODE_START, L1_CODE_LENGTH))
665 (unsigned int)(mem + count) <=
666 COREB_L1_CODE_START + L1_CODE_LENGTH
667#endif 629#endif
668 ) { 630 ) {
669 /* access L1 instruction SRAM */ 631 /* access L1 instruction SRAM */
@@ -723,12 +685,9 @@ int kgdb_hex2mem(char *buf, char *mem, int count)
723 default: 685 default:
724 return EFAULT; 686 return EFAULT;
725 } 687 }
726 } else if (cpu == 0 && (unsigned int)mem >= L1_CODE_START && 688 } else if ((cpu == 0 && IN_MEM(mem, count, L1_CODE_START, L1_CODE_LENGTH))
727 (unsigned int)(mem + count) <= L1_CODE_START + L1_CODE_LENGTH
728#ifdef CONFIG_SMP 689#ifdef CONFIG_SMP
729 || cpu == 1 && (unsigned int)mem >= COREB_L1_CODE_START && 690 || (cpu == 1 && IN_MEM(mem, count, COREB_L1_CODE_START, L1_CODE_LENGTH))
730 (unsigned int)(mem + count) <=
731 COREB_L1_CODE_START + L1_CODE_LENGTH
732#endif 691#endif
733 ) { 692 ) {
734 /* access L1 instruction SRAM */ 693 /* access L1 instruction SRAM */
@@ -745,24 +704,16 @@ int kgdb_validate_break_address(unsigned long addr)
745 704
746 if (addr >= 0x1000 && (addr + BREAK_INSTR_SIZE) <= physical_mem_end) 705 if (addr >= 0x1000 && (addr + BREAK_INSTR_SIZE) <= physical_mem_end)
747 return 0; 706 return 0;
748 if (addr >= ASYNC_BANK0_BASE 707 if (IN_MEM(addr, BREAK_INSTR_SIZE, ASYNC_BANK0_BASE, ASYNC_BANK_SIZE))
749 && addr + BREAK_INSTR_SIZE <= ASYNC_BANK3_BASE + ASYNC_BANK3_BASE)
750 return 0; 708 return 0;
751#if L1_CODE_LENGTH != 0 709 if (cpu == 0 && IN_MEM(addr, BREAK_INSTR_SIZE, L1_CODE_START, L1_CODE_LENGTH))
752 if (cpu == 0 && addr >= L1_CODE_START
753 && addr + BREAK_INSTR_SIZE <= L1_CODE_START + L1_CODE_LENGTH)
754 return 0; 710 return 0;
755# ifdef CONFIG_SMP 711#ifdef CONFIG_SMP
756 else if (cpu == 1 && addr >= COREB_L1_CODE_START 712 else if (cpu == 1 && IN_MEM(addr, BREAK_INSTR_SIZE, COREB_L1_CODE_START, L1_CODE_LENGTH))
757 && addr + BREAK_INSTR_SIZE <= COREB_L1_CODE_START + L1_CODE_LENGTH)
758 return 0; 713 return 0;
759# endif
760#endif 714#endif
761#if L2_LENGTH != 0 715 if (IN_MEM(addr, BREAK_INSTR_SIZE, L2_START, L2_LENGTH))
762 if (addr >= L2_START
763 && addr + BREAK_INSTR_SIZE <= L2_START + L2_LENGTH)
764 return 0; 716 return 0;
765#endif
766 717
767 return EFAULT; 718 return EFAULT;
768} 719}
@@ -772,13 +723,9 @@ int kgdb_arch_set_breakpoint(unsigned long addr, char *saved_instr)
772 int err; 723 int err;
773 int cpu = raw_smp_processor_id(); 724 int cpu = raw_smp_processor_id();
774 725
775 if ((cpu == 0 && (unsigned int)addr >= L1_CODE_START 726 if ((cpu == 0 && IN_MEM(addr, BREAK_INSTR_SIZE, L1_CODE_START, L1_CODE_LENGTH))
776 && (unsigned int)(addr + BREAK_INSTR_SIZE)
777 < L1_CODE_START + L1_CODE_LENGTH)
778#ifdef CONFIG_SMP 727#ifdef CONFIG_SMP
779 || (cpu == 1 && (unsigned int)addr >= COREB_L1_CODE_START 728 || (cpu == 1 && IN_MEM(addr, BREAK_INSTR_SIZE, COREB_L1_CODE_START, L1_CODE_LENGTH))
780 && (unsigned int)(addr + BREAK_INSTR_SIZE)
781 < COREB_L1_CODE_START + L1_CODE_LENGTH)
782#endif 729#endif
783 ) { 730 ) {
784 /* access L1 instruction SRAM */ 731 /* access L1 instruction SRAM */
@@ -804,9 +751,7 @@ int kgdb_arch_set_breakpoint(unsigned long addr, char *saved_instr)
804 751
805int kgdb_arch_remove_breakpoint(unsigned long addr, char *bundle) 752int kgdb_arch_remove_breakpoint(unsigned long addr, char *bundle)
806{ 753{
807 if ((unsigned int)addr >= L1_CODE_START && 754 if (IN_MEM(addr, BREAK_INSTR_SIZE, L1_CODE_START, L1_CODE_LENGTH)) {
808 (unsigned int)(addr + BREAK_INSTR_SIZE) <
809 L1_CODE_START + L1_CODE_LENGTH) {
810 /* access L1 instruction SRAM */ 755 /* access L1 instruction SRAM */
811 if (dma_memcpy((void *)addr, bundle, BREAK_INSTR_SIZE) == NULL) 756 if (dma_memcpy((void *)addr, bundle, BREAK_INSTR_SIZE) == NULL)
812 return -EFAULT; 757 return -EFAULT;
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-09 16:38:41 -0500