1 files changed, 132 insertions, 0 deletions
diff --git a/arch/blackfin/kernel/fixed_code.S b/arch/blackfin/kernel/fixed_code.S
new file mode 100644
index 000000000000..99ea296c82c7
--- /dev/null
+++ b/arch/blackfin/kernel/fixed_code.S
@@ -0,0 +1,132 @@
+/*
+ * This file contains sequences of code that will be copied to a
+ * fixed location, defined in <asm/atomic_seq.h>.  The interrupt
+ * handlers ensure that these sequences appear to be atomic when
+ * executed from userspace.
+ * These are aligned to 16 bytes, so that we have some space to replace
+ * these sequences with something else (e.g. kernel traps if we ever do
+ * BF561 SMP).
+ */
+#include <linux/linkage.h>
+#include <asm/entry.h>
+#include <asm/unistd.h>
+.text
+ENTRY(_fixed_code_start)
+.align 16
+ENTRY(_sigreturn_stub)
+        P0 = __NR_rt_sigreturn;
+        EXCPT 0;
+        /* Speculative execution paranoia.  */
+0:      JUMP.S 0b;
+ENDPROC (_sigreturn_stub)
+.align 16
+        /*
+         * Atomic swap, 8 bit.
+         * Inputs:      P0: memory address to use
+         *              R1: value to store
+         * Output:      R0: old contents of the memory address, zero extended.
+         */
+ENTRY(_atomic_xchg32)
+        R0 = [P0];
+        [P0] = R1;
+        rts;
+ENDPROC (_atomic_xchg32)
+.align 16
+        /*
+         * Compare and swap, 32 bit.
+         * Inputs:      P0: memory address to use
+         *              R1: compare value
+         *              R2: new value to store
+         * The new value is stored if the contents of the memory
+         * address is equal to the compare value.
+         * Output:      R0: old contents of the memory address.
+         */
+ENTRY(_atomic_cas32)
+        R0 = [P0];
+        CC = R0 == R1;
+        IF !CC JUMP 1f;
+        [P0] = R2;
+1:
+        rts;
+ENDPROC (_atomic_cas32)
+.align 16
+        /*
+         * Atomic add, 32 bit.
+         * Inputs:      P0: memory address to use
+         *              R0: value to add
+         * Outputs:     R0: new contents of the memory address.
+         *              R1: previous contents of the memory address.
+         */
+ENTRY(_atomic_add32)
+        R1 = [P0];
+        R0 = R1 + R0;
+        [P0] = R0;
+        rts;
+ENDPROC (_atomic_add32)
+.align 16
+        /*
+         * Atomic sub, 32 bit.
+         * Inputs:      P0: memory address to use
+         *              R0: value to subtract
+         * Outputs:     R0: new contents of the memory address.
+         *              R1: previous contents of the memory address.
+         */
+ENTRY(_atomic_sub32)
+        R1 = [P0];
+        R0 = R1 - R0;
+        [P0] = R0;
+        rts;
+ENDPROC (_atomic_sub32)
+.align 16
+        /*
+         * Atomic ior, 32 bit.
+         * Inputs:      P0: memory address to use
+         *              R0: value to ior
+         * Outputs:     R0: new contents of the memory address.
+         *              R1: previous contents of the memory address.
+         */
+ENTRY(_atomic_ior32)
+        R1 = [P0];
+        R0 = R1 | R0;
+        [P0] = R0;
+        rts;
+ENDPROC (_atomic_ior32)
+.align 16
+        /*
+         * Atomic ior, 32 bit.
+         * Inputs:      P0: memory address to use
+         *              R0: value to ior
+         * Outputs:     R0: new contents of the memory address.
+         *              R1: previous contents of the memory address.
+         */
+ENTRY(_atomic_and32)
+        R1 = [P0];
+        R0 = R1 & R0;
+        [P0] = R0;
+        rts;
+ENDPROC (_atomic_ior32)
+.align 16
+        /*
+         * Atomic ior, 32 bit.
+         * Inputs:      P0: memory address to use
+         *              R0: value to ior
+         * Outputs:     R0: new contents of the memory address.
+         *              R1: previous contents of the memory address.
+         */
+ENTRY(_atomic_xor32)
+        R1 = [P0];
+        R0 = R1 ^ R0;
+        [P0] = R0;
+        rts;
+ENDPROC (_atomic_ior32)
+ENTRY(_fixed_code_end)

diff --git a/arch/blackfin/kernel/fixed_code.S b/arch/blackfin/kernel/fixed_code.S new file mode 100644 index 000000000000..99ea296c82c7 --- /dev/null +++ b/arch/blackfin/kernel/fixed_code.S
@@ -0,0 +1,132 @@
	1	/*
	2	* This file contains sequences of code that will be copied to a
	3	* fixed location, defined in <asm/atomic_seq.h>. The interrupt
	4	* handlers ensure that these sequences appear to be atomic when
	5	* executed from userspace.
	6	* These are aligned to 16 bytes, so that we have some space to replace
	7	* these sequences with something else (e.g. kernel traps if we ever do
	8	* BF561 SMP).
	9	*/
	10	#include <linux/linkage.h>
	11	#include <asm/entry.h>
	12	#include <asm/unistd.h>
	13
	14	.text
	15	ENTRY(_fixed_code_start)
	16
	17	.align 16
	18	ENTRY(_sigreturn_stub)
	19	P0 = __NR_rt_sigreturn;
	20	EXCPT 0;
	21	/* Speculative execution paranoia. */
	22	0: JUMP.S 0b;
	23	ENDPROC (_sigreturn_stub)
	24
	25	.align 16
	26	/*
	27	* Atomic swap, 8 bit.
	28	* Inputs: P0: memory address to use
	29	* R1: value to store
	30	* Output: R0: old contents of the memory address, zero extended.
	31	*/
	32	ENTRY(_atomic_xchg32)
	33	R0 = [P0];
	34	[P0] = R1;
	35	rts;
	36	ENDPROC (_atomic_xchg32)
	37
	38	.align 16
	39	/*
	40	* Compare and swap, 32 bit.
	41	* Inputs: P0: memory address to use
	42	* R1: compare value
	43	* R2: new value to store
	44	* The new value is stored if the contents of the memory
	45	* address is equal to the compare value.
	46	* Output: R0: old contents of the memory address.
	47	*/
	48	ENTRY(_atomic_cas32)
	49	R0 = [P0];
	50	CC = R0 == R1;
	51	IF !CC JUMP 1f;
	52	[P0] = R2;
	53	1:
	54	rts;
	55	ENDPROC (_atomic_cas32)
	56
	57	.align 16
	58	/*
	59	* Atomic add, 32 bit.
	60	* Inputs: P0: memory address to use
	61	* R0: value to add
	62	* Outputs: R0: new contents of the memory address.
	63	* R1: previous contents of the memory address.
	64	*/
	65	ENTRY(_atomic_add32)
	66	R1 = [P0];
	67	R0 = R1 + R0;
	68	[P0] = R0;
	69	rts;
	70	ENDPROC (_atomic_add32)
	71
	72	.align 16
	73	/*
	74	* Atomic sub, 32 bit.
	75	* Inputs: P0: memory address to use
	76	* R0: value to subtract
	77	* Outputs: R0: new contents of the memory address.
	78	* R1: previous contents of the memory address.
	79	*/
	80	ENTRY(_atomic_sub32)
	81	R1 = [P0];
	82	R0 = R1 - R0;
	83	[P0] = R0;
	84	rts;
	85	ENDPROC (_atomic_sub32)
	86
	87	.align 16
	88	/*
	89	* Atomic ior, 32 bit.
	90	* Inputs: P0: memory address to use
	91	* R0: value to ior
	92	* Outputs: R0: new contents of the memory address.
	93	* R1: previous contents of the memory address.
	94	*/
	95	ENTRY(_atomic_ior32)
	96	R1 = [P0];
	97	R0 = R1 \| R0;
	98	[P0] = R0;
	99	rts;
	100	ENDPROC (_atomic_ior32)
	101
	102	.align 16
	103	/*
	104	* Atomic ior, 32 bit.
	105	* Inputs: P0: memory address to use
	106	* R0: value to ior
	107	* Outputs: R0: new contents of the memory address.
	108	* R1: previous contents of the memory address.
	109	*/
	110	ENTRY(_atomic_and32)
	111	R1 = [P0];
	112	R0 = R1 & R0;
	113	[P0] = R0;
	114	rts;
	115	ENDPROC (_atomic_ior32)
	116
	117	.align 16
	118	/*
	119	* Atomic ior, 32 bit.
	120	* Inputs: P0: memory address to use
	121	* R0: value to ior
	122	* Outputs: R0: new contents of the memory address.
	123	* R1: previous contents of the memory address.
	124	*/
	125	ENTRY(_atomic_xor32)
	126	R1 = [P0];
	127	R0 = R1 ^ R0;
	128	[P0] = R0;
	129	rts;
	130	ENDPROC (_atomic_ior32)
	131
	132	ENTRY(_fixed_code_end)