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-rw-r--r--arch/blackfin/kernel/cplbinit.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/blackfin/kernel/cplbinit.c b/arch/blackfin/kernel/cplbinit.c
index 3b1c87c9fd51..f2db6a5e2b5b 100644
--- a/arch/blackfin/kernel/cplbinit.c
+++ b/arch/blackfin/kernel/cplbinit.c
@@ -23,6 +23,7 @@
23#include <linux/module.h> 23#include <linux/module.h>
24 24
25#include <asm/blackfin.h> 25#include <asm/blackfin.h>
26#include <asm/cplb.h>
26#include <asm/cplbinit.h> 27#include <asm/cplbinit.h>
27 28
28u_long icplb_table[MAX_CPLBS+1]; 29u_long icplb_table[MAX_CPLBS+1];
@@ -56,7 +57,7 @@ struct s_cplb {
56 struct cplb_tab switch_d; 57 struct cplb_tab switch_d;
57}; 58};
58 59
59#if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE) 60#if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
60static struct cplb_desc cplb_data[] = { 61static struct cplb_desc cplb_data[] = {
61 { 62 {
62 .start = 0, 63 .start = 0,
@@ -230,7 +231,7 @@ static void __fill_code_cplbtab(struct cplb_tab *t, int i, u32 a_start, u32 a_en
230 cplb_data[i].psize, 231 cplb_data[i].psize,
231 cplb_data[i].i_conf); 232 cplb_data[i].i_conf);
232 } else { 233 } else {
233#if defined(CONFIG_BLKFIN_CACHE) 234#if defined(CONFIG_BFIN_ICACHE)
234 if (ANOMALY_05000263 && i == SDRAM_KERN) { 235 if (ANOMALY_05000263 && i == SDRAM_KERN) {
235 fill_cplbtab(t, 236 fill_cplbtab(t,
236 cplb_data[i].start, 237 cplb_data[i].start,