diff options
Diffstat (limited to 'arch/blackfin/kernel/cplb-nompu/cplbinit.c')
-rw-r--r-- | arch/blackfin/kernel/cplb-nompu/cplbinit.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c index 6320bc45fbba..dd46b666fd4d 100644 --- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c +++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c | |||
@@ -26,6 +26,29 @@ | |||
26 | #include <asm/cplb.h> | 26 | #include <asm/cplb.h> |
27 | #include <asm/cplbinit.h> | 27 | #include <asm/cplbinit.h> |
28 | 28 | ||
29 | /* | ||
30 | * Number of required data CPLB switchtable entries | ||
31 | * MEMSIZE / 4 (we mostly install 4M page size CPLBs | ||
32 | * approx 16 for smaller 1MB page size CPLBs for allignment purposes | ||
33 | * 1 for L1 Data Memory | ||
34 | * possibly 1 for L2 Data Memory | ||
35 | * 1 for CONFIG_DEBUG_HUNT_FOR_ZERO | ||
36 | * 1 for ASYNC Memory | ||
37 | */ | ||
38 | #define MAX_SWITCH_D_CPLBS (((CONFIG_MEM_SIZE / 4) + 16 + 1 + 1 + 1 \ | ||
39 | + ASYNC_MEMORY_CPLB_COVERAGE) * 2) | ||
40 | |||
41 | /* | ||
42 | * Number of required instruction CPLB switchtable entries | ||
43 | * MEMSIZE / 4 (we mostly install 4M page size CPLBs | ||
44 | * approx 12 for smaller 1MB page size CPLBs for allignment purposes | ||
45 | * 1 for L1 Instruction Memory | ||
46 | * possibly 1 for L2 Instruction Memory | ||
47 | * 1 for CONFIG_DEBUG_HUNT_FOR_ZERO | ||
48 | */ | ||
49 | #define MAX_SWITCH_I_CPLBS (((CONFIG_MEM_SIZE / 4) + 12 + 1 + 1 + 1) * 2) | ||
50 | |||
51 | |||
29 | u_long icplb_table[MAX_CPLBS + 1]; | 52 | u_long icplb_table[MAX_CPLBS + 1]; |
30 | u_long dcplb_table[MAX_CPLBS + 1]; | 53 | u_long dcplb_table[MAX_CPLBS + 1]; |
31 | 54 | ||