diff options
Diffstat (limited to 'arch/blackfin/kernel/cplb-mpu/cplbinit.c')
-rw-r--r-- | arch/blackfin/kernel/cplb-mpu/cplbinit.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbinit.c b/arch/blackfin/kernel/cplb-mpu/cplbinit.c index c006a44527bf..36193eed9a1f 100644 --- a/arch/blackfin/kernel/cplb-mpu/cplbinit.c +++ b/arch/blackfin/kernel/cplb-mpu/cplbinit.c | |||
@@ -46,13 +46,13 @@ void __init generate_cplb_tables_cpu(unsigned int cpu) | |||
46 | 46 | ||
47 | printk(KERN_INFO "MPU: setting up cplb tables with memory protection\n"); | 47 | printk(KERN_INFO "MPU: setting up cplb tables with memory protection\n"); |
48 | 48 | ||
49 | #ifdef CONFIG_BFIN_ICACHE | 49 | #ifdef CONFIG_BFIN_EXTMEM_ICACHEABLE |
50 | i_cache = CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND; | 50 | i_cache = CPLB_L1_CHBL | ANOMALY_05000158_WORKAROUND; |
51 | #endif | 51 | #endif |
52 | 52 | ||
53 | #ifdef CONFIG_BFIN_DCACHE | 53 | #ifdef CONFIG_BFIN_EXTMEM_DCACHEABLE |
54 | d_cache = CPLB_L1_CHBL; | 54 | d_cache = CPLB_L1_CHBL; |
55 | #ifdef CONFIG_BFIN_WT | 55 | #ifdef CONFIG_BFIN_EXTMEM_WRITETROUGH |
56 | d_cache |= CPLB_L1_AOW | CPLB_WT; | 56 | d_cache |= CPLB_L1_AOW | CPLB_WT; |
57 | #endif | 57 | #endif |
58 | #endif | 58 | #endif |
@@ -91,9 +91,9 @@ void __init generate_cplb_tables_cpu(unsigned int cpu) | |||
91 | /* Cover L2 memory */ | 91 | /* Cover L2 memory */ |
92 | #if L2_LENGTH > 0 | 92 | #if L2_LENGTH > 0 |
93 | dcplb_tbl[cpu][i_d].addr = L2_START; | 93 | dcplb_tbl[cpu][i_d].addr = L2_START; |
94 | dcplb_tbl[cpu][i_d++].data = L2_DMEMORY | PAGE_SIZE_1MB; | 94 | dcplb_tbl[cpu][i_d++].data = L2_DMEMORY; |
95 | icplb_tbl[cpu][i_i].addr = L2_START; | 95 | icplb_tbl[cpu][i_i].addr = L2_START; |
96 | icplb_tbl[cpu][i_i++].data = L2_IMEMORY | PAGE_SIZE_1MB; | 96 | icplb_tbl[cpu][i_i++].data = L2_IMEMORY; |
97 | #endif | 97 | #endif |
98 | 98 | ||
99 | first_mask_dcplb = i_d; | 99 | first_mask_dcplb = i_d; |