aboutsummaryrefslogtreecommitdiffstats
path: root/arch/blackfin/kernel/cplb-mpu/cplbinit.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/blackfin/kernel/cplb-mpu/cplbinit.c')
-rw-r--r--arch/blackfin/kernel/cplb-mpu/cplbinit.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbinit.c b/arch/blackfin/kernel/cplb-mpu/cplbinit.c
index 8d42b9e50dfa..30fd6417f069 100644
--- a/arch/blackfin/kernel/cplb-mpu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-mpu/cplbinit.c
@@ -64,6 +64,15 @@ void __init generate_cplb_tables_cpu(unsigned int cpu)
64 icplb_tbl[cpu][i_i++].data = i_data | (addr == 0 ? CPLB_USER_RD : 0); 64 icplb_tbl[cpu][i_i++].data = i_data | (addr == 0 ? CPLB_USER_RD : 0);
65 } 65 }
66 66
67#ifdef CONFIG_ROMKERNEL
68 /* Cover kernel XIP flash area */
69 addr = CONFIG_ROM_BASE & ~(4 * 1024 * 1024 - 1);
70 dcplb_tbl[cpu][i_d].addr = addr;
71 dcplb_tbl[cpu][i_d++].data = d_data | CPLB_USER_RD;
72 icplb_tbl[cpu][i_i].addr = addr;
73 icplb_tbl[cpu][i_i++].data = i_data | CPLB_USER_RD;
74#endif
75
67 /* Cover L1 memory. One 4M area for code and data each is enough. */ 76 /* Cover L1 memory. One 4M area for code and data each is enough. */
68#if L1_DATA_A_LENGTH > 0 || L1_DATA_B_LENGTH > 0 77#if L1_DATA_A_LENGTH > 0 || L1_DATA_B_LENGTH > 0
69 dcplb_tbl[cpu][i_d].addr = get_l1_data_a_start_cpu(cpu); 78 dcplb_tbl[cpu][i_d].addr = get_l1_data_a_start_cpu(cpu);