12 files changed, 188 insertions, 58 deletions

diff --git a/arch/blackfin/include/asm/bfin-global.h b/arch/blackfin/include/asm/bfin-global.h
index 7ba70de66f2b..56dcb0a2d244 100644
--- a/arch/blackfin/include/asm/bfin-global.h
+++ b/arch/blackfin/include/asm/bfin-global.h
@@ -63,7 +63,6 @@ extern void bfin_dcache_init(void);
 extern void init_exception_vectors(void);
 extern void program_IAR(void);
 
-extern void bfin_reset(void);
 extern asmlinkage void lower_to_irq14(void);
 extern asmlinkage void bfin_return_from_exception(void);
 extern asmlinkage void evt14_softirq(void);
@@ -92,6 +91,8 @@ extern int sram_free(const void*);
 extern void *sram_alloc_with_lsl(size_t, unsigned long);
 extern int sram_free_with_lsl(const void*);
 
+extern void *isram_memcpy(void *dest, const void *src, size_t n);
+
 extern const char bfin_board_name[];
 
 extern unsigned long bfin_sic_iwr[];
@@ -104,7 +105,7 @@ extern char _stext_l1[], _etext_l1[], _sdata_l1[], _edata_l1[], _sbss_l1[],
         _stext_l2[], _etext_l2[], _sdata_l2[], _edata_l2[], _sbss_l2[],
         _ebss_l2[], _l2_lma_start[];
 
-/* only used when CONFIG_MTD_UCLINUX */
+/* only used when MTD_UCLINUX */
 extern unsigned long memory_mtd_start, memory_mtd_end, mtd_size;
 
 #ifdef CONFIG_BFIN_ICACHE_LOCK
diff --git a/arch/blackfin/include/asm/bfrom.h b/arch/blackfin/include/asm/bfrom.h
new file mode 100644
index 000000000000..cfe8024c3b2f
--- /dev/null
+++ b/arch/blackfin/include/asm/bfrom.h
@@ -0,0 +1,85 @@
+/* Blackfin on-chip ROM API
+ *
+ * Copyright 2008 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef __BFROM_H__
+#define __BFROM_H__
+
+#include <linux/types.h>
+
+/* Possible syscontrol action flags */
+#define SYSCTRL_READ        0x00000000    /* read registers */
+#define SYSCTRL_WRITE       0x00000001    /* write registers */
+#define SYSCTRL_SYSRESET    0x00000002    /* perform system reset */
+#define SYSCTRL_CORERESET   0x00000004    /* perform core reset */
+#define SYSCTRL_SOFTRESET   0x00000006    /* perform core and system reset */
+#define SYSCTRL_VRCTL       0x00000010    /* read/write VR_CTL register */
+#define SYSCTRL_EXTVOLTAGE  0x00000020    /* VDDINT supplied externally */
+#define SYSCTRL_INTVOLTAGE  0x00000000    /* VDDINT generated by on-chip regulator */
+#define SYSCTRL_OTPVOLTAGE  0x00000040    /* For Factory Purposes Only */
+#define SYSCTRL_PLLCTL      0x00000100    /* read/write PLL_CTL register */
+#define SYSCTRL_PLLDIV      0x00000200    /* read/write PLL_DIV register */
+#define SYSCTRL_LOCKCNT     0x00000400    /* read/write PLL_LOCKCNT register */
+#define SYSCTRL_PLLSTAT     0x00000800    /* read/write PLL_STAT register */
+
+typedef struct ADI_SYSCTRL_VALUES {
+        uint16_t uwVrCtl;
+        uint16_t uwPllCtl;
+        uint16_t uwPllDiv;
+        uint16_t uwPllLockCnt;
+        uint16_t uwPllStat;
+} ADI_SYSCTRL_VALUES;
+
+static uint32_t (* const bfrom_SysControl)(uint32_t action_flags, ADI_SYSCTRL_VALUES *power_settings, void *reserved) = (void *)0xEF000038;
+
+/* We need a dedicated function since we need to screw with the stack pointer
+ * when resetting.  The on-chip ROM will save/restore registers on the stack
+ * when doing a system reset, so the stack cannot be outside of the chip.
+ */
+__attribute__((__noreturn__))
+static inline void bfrom_SoftReset(void *new_stack)
+{
+        while (1)
+                __asm__ __volatile__(
+                        "sp = %[stack];"
+                        "jump (%[bfrom_syscontrol]);"
+                        : : [bfrom_syscontrol] "p"(bfrom_SysControl),
+                                "q0"(SYSCTRL_SOFTRESET),
+                                "q1"(0),
+                                "q2"(NULL),
+                                [stack] "p"(new_stack)
+                );
+}
+
+/* OTP Functions */
+static uint32_t (* const bfrom_OtpCommand)(uint32_t command, uint32_t value) = (void *)0xEF000018;
+static uint32_t (* const bfrom_OtpRead)(uint32_t page, uint32_t flags, uint64_t *page_content) = (void *)0xEF00001A;
+static uint32_t (* const bfrom_OtpWrite)(uint32_t page, uint32_t flags, uint64_t *page_content) = (void *)0xEF00001C;
+
+/* otp command: defines for "command" */
+#define OTP_INIT                 0x00000001
+#define OTP_CLOSE                0x00000002
+
+/* otp read/write: defines for "flags" */
+#define OTP_LOWER_HALF           0x00000000 /* select upper/lower 64-bit half (bit 0) */
+#define OTP_UPPER_HALF           0x00000001
+#define OTP_NO_ECC               0x00000010 /* do not use ECC */
+#define OTP_LOCK                 0x00000020 /* sets page protection bit for page */
+#define OTP_CHECK_FOR_PREV_WRITE 0x00000080
+
+/* Return values for all functions */
+#define OTP_SUCCESS          0x00000000
+#define OTP_MASTER_ERROR     0x001
+#define OTP_WRITE_ERROR      0x003
+#define OTP_READ_ERROR       0x005
+#define OTP_ACC_VIO_ERROR    0x009
+#define OTP_DATA_MULT_ERROR  0x011
+#define OTP_ECC_MULT_ERROR   0x021
+#define OTP_PREV_WR_ERROR    0x041
+#define OTP_DATA_SB_WARN     0x100
+#define OTP_ECC_SB_WARN      0x200
+
+#endif
diff --git a/arch/blackfin/include/asm/cacheflush.h b/arch/blackfin/include/asm/cacheflush.h
index d81a77545a04..5ef9e35e9c3b 100644
--- a/arch/blackfin/include/asm/cacheflush.h
+++ b/arch/blackfin/include/asm/cacheflush.h
@@ -30,8 +30,6 @@
 #ifndef _BLACKFIN_CACHEFLUSH_H
 #define _BLACKFIN_CACHEFLUSH_H
 
-#include <asm/cplb.h>
-
 extern void blackfin_icache_dcache_flush_range(unsigned int, unsigned int);
 extern void blackfin_icache_flush_range(unsigned int, unsigned int);
 extern void blackfin_dcache_flush_range(unsigned int, unsigned int);
diff --git a/arch/blackfin/include/asm/cplb.h b/arch/blackfin/include/asm/cplb.h
index 05d6f05fb748..9e8b4035fcec 100644
--- a/arch/blackfin/include/asm/cplb.h
+++ b/arch/blackfin/include/asm/cplb.h
@@ -55,7 +55,13 @@
 #endif
 
 #define L1_DMEMORY       (CPLB_LOCK | CPLB_COMMON)
-#define L2_MEMORY        (CPLB_COMMON)
+#ifdef CONFIG_BFIN_L2_CACHEABLE
+#define L2_IMEMORY        (SDRAM_IGENERIC)
+#define L2_DMEMORY        (SDRAM_DGENERIC)
+#else
+#define L2_IMEMORY        (CPLB_COMMON)
+#define L2_DMEMORY        (CPLB_COMMON)
+#endif
 #define SDRAM_DNON_CHBL  (CPLB_COMMON)
 #define SDRAM_EBIU       (CPLB_COMMON)
 #define SDRAM_OOPS       (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY)
diff --git a/arch/blackfin/include/asm/cplbinit.h b/arch/blackfin/include/asm/cplbinit.h
index 0eb1c1b685a7..d179b747ff03 100644
--- a/arch/blackfin/include/asm/cplbinit.h
+++ b/arch/blackfin/include/asm/cplbinit.h
@@ -90,6 +90,20 @@ extern u_long dpdt_swapcount_table[];
 extern unsigned long reserved_mem_dcache_on;
 extern unsigned long reserved_mem_icache_on;
 
-extern void generate_cpl_tables(void);
+extern void generate_cplb_tables(void);
+
+static inline int bfin_addr_dcachable(unsigned long addr)
+{
+#ifdef CONFIG_BFIN_DCACHE
+        if (addr < (_ramend - DMA_UNCACHED_REGION))
+                return 1;
+#endif
+
+        if (reserved_mem_dcache_on &&
+                addr >= _ramend && addr < physical_mem_end)
+                return 1;
+
+        return 0;
+}
 
 #endif
diff --git a/arch/blackfin/include/asm/cpumask.h b/arch/blackfin/include/asm/cpumask.h
deleted file mode 100644
index b20a8e9012cb..000000000000
--- a/arch/blackfin/include/asm/cpumask.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_BLACKFIN_CPUMASK_H
-#define _ASM_BLACKFIN_CPUMASK_H
-
-#include <asm-generic/cpumask.h>
-
-#endif                          /* _ASM_BLACKFIN_CPUMASK_H */
diff --git a/arch/blackfin/include/asm/dma-mapping.h b/arch/blackfin/include/asm/dma-mapping.h
index 1a13c2fc3667..ede748d67efd 100644
--- a/arch/blackfin/include/asm/dma-mapping.h
+++ b/arch/blackfin/include/asm/dma-mapping.h
@@ -80,4 +80,15 @@ extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
 extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
                       int nhwentries, enum dma_data_direction direction);
 
+static inline void dma_sync_single_for_cpu(struct device *dev,
+                                        dma_addr_t handle, size_t size,
+                                        enum dma_data_direction dir)
+{
+}
+
+static inline void dma_sync_single_for_device(struct device *dev,
+                                        dma_addr_t handle, size_t size,
+                                        enum dma_data_direction dir)
+{
+}
 #endif                          /* _BLACKFIN_DMA_MAPPING_H */
diff --git a/arch/blackfin/include/asm/kgdb.h b/arch/blackfin/include/asm/kgdb.h
index 0f73847fd6bc..26ebac6646d8 100644
--- a/arch/blackfin/include/asm/kgdb.h
+++ b/arch/blackfin/include/asm/kgdb.h
@@ -124,9 +124,16 @@ enum regnames {
 /* Number of bytes of registers.  */
 #define NUMREGBYTES BFIN_NUM_REGS*4
 
-#define BREAKPOINT() asm("   EXCPT 2;");
-#define BREAK_INSTR_SIZE       2
-#define HW_BREAKPOINT_NUM               6
+static inline void arch_kgdb_breakpoint(void)
+{
+        asm("   EXCPT 2;");
+}
+#define BREAK_INSTR_SIZE        2
+#define CACHE_FLUSH_IS_SAFE     1
+#define HW_INST_WATCHPOINT_NUM  6
+#define HW_WATCHPOINT_NUM       8
+#define TYPE_INST_WATCHPOINT    0
+#define TYPE_DATA_WATCHPOINT    1
 
 /* Instruction watchpoint address control register bits mask */
 #define WPPWR           0x1
@@ -163,10 +170,11 @@ enum regnames {
 #define WPDAEN1         0x8
 #define WPDCNTEN0       0x10
 #define WPDCNTEN1       0x20
+
 #define WPDSRC0         0xc0
-#define WPDACC0         0x300
+#define WPDACC0_OFFSET  8
 #define WPDSRC1         0xc00
-#define WPDACC1         0x3000
+#define WPDACC1_OFFSET  12
 
 /* Watchpoint status register bits mask */
 #define STATIA0         0x1
@@ -178,7 +186,4 @@ enum regnames {
 #define STATDA0         0x40
 #define STATDA1         0x80
 
-extern void kgdb_print(const char *fmt, ...);
-extern void init_kgdb_uart(void);
-
 #endif
diff --git a/arch/blackfin/include/asm/mmu_context.h b/arch/blackfin/include/asm/mmu_context.h
index 8529552a981f..35593dda2a4d 100644
--- a/arch/blackfin/include/asm/mmu_context.h
+++ b/arch/blackfin/include/asm/mmu_context.h
@@ -45,49 +45,12 @@ extern unsigned long l1_stack_len;
 extern int l1sram_free(const void*);
 extern void *l1sram_alloc_max(void*);
 
-static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
-{
-}
-
-/* Called when creating a new context during fork() or execve().  */
-static inline int
-init_new_context(struct task_struct *tsk, struct mm_struct *mm)
-{
-#ifdef CONFIG_MPU
-        unsigned long p = __get_free_pages(GFP_KERNEL, page_mask_order);
-        mm->context.page_rwx_mask = (unsigned long *)p;
-        memset(mm->context.page_rwx_mask, 0,
-               page_mask_nelts * 3 * sizeof(long));
-#endif
-        return 0;
-}
-
 static inline void free_l1stack(void)
 {
         nr_l1stack_tasks--;
         if (nr_l1stack_tasks == 0)
                 l1sram_free(l1_stack_base);
 }
-static inline void destroy_context(struct mm_struct *mm)
-{
-        struct sram_list_struct *tmp;
-
-        if (current_l1_stack_save == mm->context.l1_stack_save)
-                current_l1_stack_save = NULL;
-        if (mm->context.l1_stack_save)
-                free_l1stack();
-
-        while ((tmp = mm->context.sram_list)) {
-                mm->context.sram_list = tmp->next;
-                sram_free(tmp->addr);
-                kfree(tmp);
-        }
-#ifdef CONFIG_MPU
-        if (current_rwx_mask == mm->context.page_rwx_mask)
-                current_rwx_mask = NULL;
-        free_pages((unsigned long)mm->context.page_rwx_mask, page_mask_order);
-#endif
-}
 
 static inline unsigned long
 alloc_l1stack(unsigned long length, unsigned long *stack_base)
@@ -134,6 +97,7 @@ static inline void switch_mm(struct mm_struct *prev_mm, struct mm_struct *next_m
         }
 #endif
 
+#ifdef CONFIG_APP_STACK_L1
         /* L1 stack switching.  */
         if (!next_mm->context.l1_stack_save)
                 return;
@@ -144,6 +108,7 @@ static inline void switch_mm(struct mm_struct *prev_mm, struct mm_struct *next_m
         }
         current_l1_stack_save = next_mm->context.l1_stack_save;
         memcpy(l1_stack_base, current_l1_stack_save, l1_stack_len);
+#endif
 }
 
 #ifdef CONFIG_MPU
@@ -180,4 +145,44 @@ static inline void update_protections(struct mm_struct *mm)
 }
 #endif
 
+static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
+{
+}
+
+/* Called when creating a new context during fork() or execve().  */
+static inline int
+init_new_context(struct task_struct *tsk, struct mm_struct *mm)
+{
+#ifdef CONFIG_MPU
+        unsigned long p = __get_free_pages(GFP_KERNEL, page_mask_order);
+        mm->context.page_rwx_mask = (unsigned long *)p;
+        memset(mm->context.page_rwx_mask, 0,
+               page_mask_nelts * 3 * sizeof(long));
+#endif
+        return 0;
+}
+
+static inline void destroy_context(struct mm_struct *mm)
+{
+        struct sram_list_struct *tmp;
+
+#ifdef CONFIG_APP_STACK_L1
+        if (current_l1_stack_save == mm->context.l1_stack_save)
+                current_l1_stack_save = 0;
+        if (mm->context.l1_stack_save)
+                free_l1stack();
+#endif
+
+        while ((tmp = mm->context.sram_list)) {
+                mm->context.sram_list = tmp->next;
+                sram_free(tmp->addr);
+                kfree(tmp);
+        }
+#ifdef CONFIG_MPU
+        if (current_rwx_mask == mm->context.page_rwx_mask)
+                current_rwx_mask = NULL;
+        free_pages((unsigned long)mm->context.page_rwx_mask, page_mask_order);
+#endif
+}
+
 #endif
diff --git a/arch/blackfin/include/asm/processor.h b/arch/blackfin/include/asm/processor.h
index 6f3995b119d8..e3e9b41fa8db 100644
--- a/arch/blackfin/include/asm/processor.h
+++ b/arch/blackfin/include/asm/processor.h
@@ -134,6 +134,12 @@ static inline uint32_t __pure bfin_revid(void)
         return revid;
 }
 
+static inline uint16_t __pure bfin_cpuid(void)
+{
+        return (bfin_read_CHIPID() & CHIPID_FAMILY) >> 12;
+
+}
+
 static inline uint32_t __pure bfin_compiled_revid(void)
 {
 #if defined(CONFIG_BF_REV_0_0)
diff --git a/arch/blackfin/include/asm/ptrace.h b/arch/blackfin/include/asm/ptrace.h
index a45a80e54adc..e3f086dc7268 100644
--- a/arch/blackfin/include/asm/ptrace.h
+++ b/arch/blackfin/include/asm/ptrace.h
@@ -158,6 +158,8 @@ extern void show_regs(struct pt_regs *);
 #define PT_SEQSTAT 8
 #define PT_IPEND 4
 
+#define PT_ORIG_R0 208
+#define PT_ORIG_P0 212
 #define PT_SYSCFG 216
 #define PT_TEXT_ADDR 220
 #define PT_TEXT_END_ADDR 224
diff --git a/arch/blackfin/include/asm/traps.h b/arch/blackfin/include/asm/traps.h
index f0e5f940d9ca..34f7295fb070 100644
--- a/arch/blackfin/include/asm/traps.h
+++ b/arch/blackfin/include/asm/traps.h
@@ -59,6 +59,9 @@
         level "   or a 16-bit register is accessed with a 32-bit instruction.\n"
 #define HWC_x3(level) \
         "External Memory Addressing Error\n"
+#define EXC_0x04(level) \
+        "Unimplmented exception occured\n" \
+        level " - Maybe you forgot to install a custom exception handler?\n"
 #define HWC_x12(level) \
         "Performance Monitor Overflow\n"
 #define HWC_x18(level) \
@@ -84,7 +87,7 @@
         level "   a particular processor implementation.\n"
 #define EXC_0x22(level) \
         "Illegal instruction combination\n" \
-        level " - See section for multi-issue rules in the ADSP-BF53x Blackfin\n" \
+        level " - See section for multi-issue rules in the Blackfin\n" \
         level "   Processor Instruction Set Reference.\n"
 #define EXC_0x23(level) \
         "Data access CPLB protection violation\n" \