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-rw-r--r--arch/blackfin/include/asm/atomic.h2
-rw-r--r--arch/blackfin/include/asm/bitsperlong.h1
-rw-r--r--arch/blackfin/include/asm/cacheflush.h40
-rw-r--r--arch/blackfin/include/asm/cplb.h35
-rw-r--r--arch/blackfin/include/asm/dma.h10
-rw-r--r--arch/blackfin/include/asm/elf.h84
-rw-r--r--arch/blackfin/include/asm/entry.h92
-rw-r--r--arch/blackfin/include/asm/gptimers.h43
-rw-r--r--arch/blackfin/include/asm/io.h29
-rw-r--r--arch/blackfin/include/asm/ipipe.h4
-rw-r--r--arch/blackfin/include/asm/page.h2
-rw-r--r--arch/blackfin/include/asm/pda.h2
-rw-r--r--arch/blackfin/include/asm/processor.h4
-rw-r--r--arch/blackfin/include/asm/signal.h2
-rw-r--r--arch/blackfin/include/asm/time.h1
-rw-r--r--arch/blackfin/include/asm/uaccess.h32
16 files changed, 249 insertions, 134 deletions
diff --git a/arch/blackfin/include/asm/atomic.h b/arch/blackfin/include/asm/atomic.h
index 94b2a9b19451..7bbf44e4ddf9 100644
--- a/arch/blackfin/include/asm/atomic.h
+++ b/arch/blackfin/include/asm/atomic.h
@@ -208,6 +208,6 @@ static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
208#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0) 208#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
209#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0) 209#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
210 210
211#include <asm-generic/atomic.h> 211#include <asm-generic/atomic-long.h>
212 212
213#endif /* __ARCH_BLACKFIN_ATOMIC __ */ 213#endif /* __ARCH_BLACKFIN_ATOMIC __ */
diff --git a/arch/blackfin/include/asm/bitsperlong.h b/arch/blackfin/include/asm/bitsperlong.h
new file mode 100644
index 000000000000..6dc0bb0c13b2
--- /dev/null
+++ b/arch/blackfin/include/asm/bitsperlong.h
@@ -0,0 +1 @@
#include <asm-generic/bitsperlong.h>
diff --git a/arch/blackfin/include/asm/cacheflush.h b/arch/blackfin/include/asm/cacheflush.h
index 1b040f5b4feb..94697f0f6f40 100644
--- a/arch/blackfin/include/asm/cacheflush.h
+++ b/arch/blackfin/include/asm/cacheflush.h
@@ -30,7 +30,8 @@
30#ifndef _BLACKFIN_CACHEFLUSH_H 30#ifndef _BLACKFIN_CACHEFLUSH_H
31#define _BLACKFIN_CACHEFLUSH_H 31#define _BLACKFIN_CACHEFLUSH_H
32 32
33extern void blackfin_icache_dcache_flush_range(unsigned long start_address, unsigned long end_address); 33#include <asm/blackfin.h> /* for SSYNC() */
34
34extern void blackfin_icache_flush_range(unsigned long start_address, unsigned long end_address); 35extern void blackfin_icache_flush_range(unsigned long start_address, unsigned long end_address);
35extern void blackfin_dcache_flush_range(unsigned long start_address, unsigned long end_address); 36extern void blackfin_dcache_flush_range(unsigned long start_address, unsigned long end_address);
36extern void blackfin_dcache_invalidate_range(unsigned long start_address, unsigned long end_address); 37extern void blackfin_dcache_invalidate_range(unsigned long start_address, unsigned long end_address);
@@ -54,32 +55,28 @@ extern void blackfin_invalidate_entire_dcache(void);
54 55
55static inline void flush_icache_range(unsigned start, unsigned end) 56static inline void flush_icache_range(unsigned start, unsigned end)
56{ 57{
57#if defined(CONFIG_BFIN_DCACHE) && defined(CONFIG_BFIN_ICACHE) 58#if defined(CONFIG_BFIN_WB)
58 59 blackfin_dcache_flush_range(start, end);
59# if defined(CONFIG_BFIN_WT) 60#endif
60 blackfin_icache_flush_range((start), (end));
61 flush_icache_range_others(start, end);
62# else
63 blackfin_icache_dcache_flush_range((start), (end));
64# endif
65
66#else
67 61
68# if defined(CONFIG_BFIN_ICACHE) 62 /* Make sure all write buffers in the data side of the core
69 blackfin_icache_flush_range((start), (end)); 63 * are flushed before trying to invalidate the icache. This
64 * needs to be after the data flush and before the icache
65 * flush so that the SSYNC does the right thing in preventing
66 * the instruction prefetcher from hitting things in cached
67 * memory at the wrong time -- it runs much further ahead than
68 * the pipeline.
69 */
70 SSYNC();
71#if defined(CONFIG_BFIN_ICACHE)
72 blackfin_icache_flush_range(start, end);
70 flush_icache_range_others(start, end); 73 flush_icache_range_others(start, end);
71# endif
72# if defined(CONFIG_BFIN_DCACHE)
73 blackfin_dcache_flush_range((start), (end));
74# endif
75
76#endif 74#endif
77} 75}
78 76
79#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ 77#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
80do { memcpy(dst, src, len); \ 78do { memcpy(dst, src, len); \
81 flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \ 79 flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \
82 flush_icache_range_others((unsigned long) (dst), (unsigned long) (dst) + (len));\
83} while (0) 80} while (0)
84 81
85#define copy_from_user_page(vma, page, vaddr, dst, src, len) memcpy(dst, src, len) 82#define copy_from_user_page(vma, page, vaddr, dst, src, len) memcpy(dst, src, len)
@@ -111,6 +108,11 @@ static inline int bfin_addr_dcachable(unsigned long addr)
111 addr >= _ramend && addr < physical_mem_end) 108 addr >= _ramend && addr < physical_mem_end)
112 return 1; 109 return 1;
113 110
111#ifndef CONFIG_BFIN_L2_NOT_CACHED
112 if (addr >= L2_START && addr < L2_START + L2_LENGTH)
113 return 1;
114#endif
115
114 return 0; 116 return 0;
115} 117}
116 118
diff --git a/arch/blackfin/include/asm/cplb.h b/arch/blackfin/include/asm/cplb.h
index ad566ff9ad16..a75a6a9f0949 100644
--- a/arch/blackfin/include/asm/cplb.h
+++ b/arch/blackfin/include/asm/cplb.h
@@ -53,29 +53,32 @@
53#define SDRAM_DGENERIC (CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW | CPLB_COMMON) 53#define SDRAM_DGENERIC (CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW | CPLB_COMMON)
54#endif 54#endif
55 55
56#define SDRAM_DNON_CHBL (CPLB_COMMON)
57#define SDRAM_EBIU (CPLB_COMMON)
58#define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY)
59
56#define L1_DMEMORY (CPLB_LOCK | CPLB_COMMON) 60#define L1_DMEMORY (CPLB_LOCK | CPLB_COMMON)
57 61
58#ifdef CONFIG_SMP 62#ifdef CONFIG_SMP
59#define L2_ATTR (INITIAL_T | I_CPLB | D_CPLB) 63#define L2_ATTR (INITIAL_T | I_CPLB | D_CPLB)
60#define L2_IMEMORY (CPLB_COMMON | CPLB_LOCK) 64#define L2_IMEMORY (CPLB_COMMON)
61#define L2_DMEMORY (CPLB_COMMON | CPLB_LOCK) 65#define L2_DMEMORY (CPLB_LOCK | CPLB_COMMON)
62 66
63#else 67#else
64#ifdef CONFIG_BFIN_L2_CACHEABLE 68#define L2_ATTR (INITIAL_T | SWITCH_T | I_CPLB | D_CPLB)
65#define L2_IMEMORY (SDRAM_IGENERIC) 69#define L2_IMEMORY (SDRAM_IGENERIC)
66#define L2_DMEMORY (SDRAM_DGENERIC) 70
67#else 71# if defined(CONFIG_BFIN_L2_WB)
68#define L2_IMEMORY (CPLB_COMMON) 72# define L2_DMEMORY (CPLB_L1_CHBL | CPLB_COMMON)
69#define L2_DMEMORY (CPLB_COMMON) 73# elif defined(CONFIG_BFIN_L2_WT)
70#endif /* CONFIG_BFIN_L2_CACHEABLE */ 74# define L2_DMEMORY (CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW | CPLB_COMMON)
71 75# elif defined(CONFIG_BFIN_L2_NOT_CACHED)
72#define L2_ATTR (INITIAL_T | SWITCH_T | I_CPLB | D_CPLB) 76# define L2_DMEMORY (CPLB_COMMON)
77# else
78# define L2_DMEMORY (0)
79# endif
73#endif /* CONFIG_SMP */ 80#endif /* CONFIG_SMP */
74 81
75#define SDRAM_DNON_CHBL (CPLB_COMMON)
76#define SDRAM_EBIU (CPLB_COMMON)
77#define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY)
78
79#define SIZE_1K 0x00000400 /* 1K */ 82#define SIZE_1K 0x00000400 /* 1K */
80#define SIZE_4K 0x00001000 /* 4K */ 83#define SIZE_4K 0x00001000 /* 4K */
81#define SIZE_1M 0x00100000 /* 1M */ 84#define SIZE_1M 0x00100000 /* 1M */
diff --git a/arch/blackfin/include/asm/dma.h b/arch/blackfin/include/asm/dma.h
index e4f7b8043f02..c9a59622e23f 100644
--- a/arch/blackfin/include/asm/dma.h
+++ b/arch/blackfin/include/asm/dma.h
@@ -206,10 +206,16 @@ static inline unsigned long get_dma_curr_addr(unsigned int channel)
206 206
207static inline void set_dma_sg(unsigned int channel, struct dmasg *sg, int ndsize) 207static inline void set_dma_sg(unsigned int channel, struct dmasg *sg, int ndsize)
208{ 208{
209 /* Make sure the internal data buffers in the core are drained
210 * so that the DMA descriptors are completely written when the
211 * DMA engine goes to fetch them below.
212 */
213 SSYNC();
214
215 dma_ch[channel].regs->next_desc_ptr = sg;
209 dma_ch[channel].regs->cfg = 216 dma_ch[channel].regs->cfg =
210 (dma_ch[channel].regs->cfg & ~(0xf << 8)) | 217 (dma_ch[channel].regs->cfg & ~(0xf << 8)) |
211 ((ndsize & 0xf) << 8); 218 ((ndsize & 0xf) << 8);
212 dma_ch[channel].regs->next_desc_ptr = sg;
213} 219}
214 220
215static inline int dma_channel_active(unsigned int channel) 221static inline int dma_channel_active(unsigned int channel)
@@ -253,5 +259,7 @@ static inline void clear_dma_irqstat(unsigned int channel)
253void *dma_memcpy(void *dest, const void *src, size_t count); 259void *dma_memcpy(void *dest, const void *src, size_t count);
254void *safe_dma_memcpy(void *dest, const void *src, size_t count); 260void *safe_dma_memcpy(void *dest, const void *src, size_t count);
255void blackfin_dma_early_init(void); 261void blackfin_dma_early_init(void);
262void early_dma_memcpy(void *dest, const void *src, size_t count);
263void early_dma_memcpy_done(void);
256 264
257#endif 265#endif
diff --git a/arch/blackfin/include/asm/elf.h b/arch/blackfin/include/asm/elf.h
index cdbfcfc30f6a..230e1605d3fb 100644
--- a/arch/blackfin/include/asm/elf.h
+++ b/arch/blackfin/include/asm/elf.h
@@ -55,50 +55,50 @@ do { \
55#define ELF_FDPIC_CORE_EFLAGS EF_BFIN_FDPIC 55#define ELF_FDPIC_CORE_EFLAGS EF_BFIN_FDPIC
56#define ELF_EXEC_PAGESIZE 4096 56#define ELF_EXEC_PAGESIZE 4096
57 57
58#define R_unused0 0 /* relocation type 0 is not defined */ 58#define R_BFIN_UNUSED0 0 /* relocation type 0 is not defined */
59#define R_pcrel5m2 1 /*LSETUP part a */ 59#define R_BFIN_PCREL5M2 1 /* LSETUP part a */
60#define R_unused1 2 /* relocation type 2 is not defined */ 60#define R_BFIN_UNUSED1 2 /* relocation type 2 is not defined */
61#define R_pcrel10 3 /* type 3, if cc jump <target> */ 61#define R_BFIN_PCREL10 3 /* type 3, if cc jump <target> */
62#define R_pcrel12_jump 4 /* type 4, jump <target> */ 62#define R_BFIN_PCREL12_JUMP 4 /* type 4, jump <target> */
63#define R_rimm16 5 /* type 0x5, rN = <target> */ 63#define R_BFIN_RIMM16 5 /* type 0x5, rN = <target> */
64#define R_luimm16 6 /* # 0x6, preg.l=<target> Load imm 16 to lower half */ 64#define R_BFIN_LUIMM16 6 /* # 0x6, preg.l=<target> Load imm 16 to lower half */
65#define R_huimm16 7 /* # 0x7, preg.h=<target> Load imm 16 to upper half */ 65#define R_BFIN_HUIMM16 7 /* # 0x7, preg.h=<target> Load imm 16 to upper half */
66#define R_pcrel12_jump_s 8 /* # 0x8 jump.s <target> */ 66#define R_BFIN_PCREL12_JUMP_S 8 /* # 0x8 jump.s <target> */
67#define R_pcrel24_jump_x 9 /* # 0x9 jump.x <target> */ 67#define R_BFIN_PCREL24_JUMP_X 9 /* # 0x9 jump.x <target> */
68#define R_pcrel24 10 /* # 0xa call <target> , not expandable */ 68#define R_BFIN_PCREL24 10 /* # 0xa call <target> , not expandable */
69#define R_unusedb 11 /* # 0xb not generated */ 69#define R_BFIN_UNUSEDB 11 /* # 0xb not generated */
70#define R_unusedc 12 /* # 0xc not used */ 70#define R_BFIN_UNUSEDC 12 /* # 0xc not used */
71#define R_pcrel24_jump_l 13 /*0xd jump.l <target> */ 71#define R_BFIN_PCREL24_JUMP_L 13 /* 0xd jump.l <target> */
72#define R_pcrel24_call_x 14 /* 0xE, call.x <target> if <target> is above 24 bit limit call through P1 */ 72#define R_BFIN_PCREL24_CALL_X 14 /* 0xE, call.x <target> if <target> is above 24 bit limit call through P1 */
73#define R_var_eq_symb 15 /* 0xf, linker should treat it same as 0x12 */ 73#define R_BFIN_VAR_EQ_SYMB 15 /* 0xf, linker should treat it same as 0x12 */
74#define R_byte_data 16 /* 0x10, .byte var = symbol */ 74#define R_BFIN_BYTE_DATA 16 /* 0x10, .byte var = symbol */
75#define R_byte2_data 17 /* 0x11, .byte2 var = symbol */ 75#define R_BFIN_BYTE2_DATA 17 /* 0x11, .byte2 var = symbol */
76#define R_byte4_data 18 /* 0x12, .byte4 var = symbol and .var var=symbol */ 76#define R_BFIN_BYTE4_DATA 18 /* 0x12, .byte4 var = symbol and .var var=symbol */
77#define R_pcrel11 19 /* 0x13, lsetup part b */ 77#define R_BFIN_PCREL11 19 /* 0x13, lsetup part b */
78#define R_unused14 20 /* 0x14, undefined */ 78#define R_BFIN_UNUSED14 20 /* 0x14, undefined */
79#define R_unused15 21 /* not generated by VDSP 3.5 */ 79#define R_BFIN_UNUSED15 21 /* not generated by VDSP 3.5 */
80 80
81/* arithmetic relocations */ 81/* arithmetic relocations */
82#define R_push 0xE0 82#define R_BFIN_PUSH 0xE0
83#define R_const 0xE1 83#define R_BFIN_CONST 0xE1
84#define R_add 0xE2 84#define R_BFIN_ADD 0xE2
85#define R_sub 0xE3 85#define R_BFIN_SUB 0xE3
86#define R_mult 0xE4 86#define R_BFIN_MULT 0xE4
87#define R_div 0xE5 87#define R_BFIN_DIV 0xE5
88#define R_mod 0xE6 88#define R_BFIN_MOD 0xE6
89#define R_lshift 0xE7 89#define R_BFIN_LSHIFT 0xE7
90#define R_rshift 0xE8 90#define R_BFIN_RSHIFT 0xE8
91#define R_and 0xE9 91#define R_BFIN_AND 0xE9
92#define R_or 0xEA 92#define R_BFIN_OR 0xEA
93#define R_xor 0xEB 93#define R_BFIN_XOR 0xEB
94#define R_land 0xEC 94#define R_BFIN_LAND 0xEC
95#define R_lor 0xED 95#define R_BFIN_LOR 0xED
96#define R_len 0xEE 96#define R_BFIN_LEN 0xEE
97#define R_neg 0xEF 97#define R_BFIN_NEG 0xEF
98#define R_comp 0xF0 98#define R_BFIN_COMP 0xF0
99#define R_page 0xF1 99#define R_BFIN_PAGE 0xF1
100#define R_hwpage 0xF2 100#define R_BFIN_HWPAGE 0xF2
101#define R_addr 0xF3 101#define R_BFIN_ADDR 0xF3
102 102
103/* This is the location that an ET_DYN program is loaded if exec'ed. Typical 103/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
104 use of this is to invoke "./ld.so someprog" to test out a new version of 104 use of this is to invoke "./ld.so someprog" to test out a new version of
diff --git a/arch/blackfin/include/asm/entry.h b/arch/blackfin/include/asm/entry.h
index b30a2968e274..ec58efc130e6 100644
--- a/arch/blackfin/include/asm/entry.h
+++ b/arch/blackfin/include/asm/entry.h
@@ -35,21 +35,39 @@
35#else 35#else
36# define LOAD_IPIPE_IPEND 36# define LOAD_IPIPE_IPEND
37#endif 37#endif
38
39#ifndef CONFIG_EXACT_HWERR
40/* As a debugging aid - we save IPEND when DEBUG_KERNEL is on,
41 * otherwise it is a waste of cycles.
42 */
43# ifndef CONFIG_DEBUG_KERNEL
44#define INTERRUPT_ENTRY(N) \
45 [--sp] = SYSCFG; \
46 [--sp] = P0; /*orig_p0*/ \
47 [--sp] = R0; /*orig_r0*/ \
48 [--sp] = (R7:0,P5:0); \
49 R0 = (N); \
50 LOAD_IPIPE_IPEND \
51 jump __common_int_entry;
52# else /* CONFIG_DEBUG_KERNEL */
38#define INTERRUPT_ENTRY(N) \ 53#define INTERRUPT_ENTRY(N) \
39 [--sp] = SYSCFG; \ 54 [--sp] = SYSCFG; \
40 \
41 [--sp] = P0; /*orig_p0*/ \ 55 [--sp] = P0; /*orig_p0*/ \
42 [--sp] = R0; /*orig_r0*/ \ 56 [--sp] = R0; /*orig_r0*/ \
43 [--sp] = (R7:0,P5:0); \ 57 [--sp] = (R7:0,P5:0); \
58 p0.l = lo(IPEND); \
59 p0.h = hi(IPEND); \
60 r1 = [p0]; \
44 R0 = (N); \ 61 R0 = (N); \
45 LOAD_IPIPE_IPEND \ 62 LOAD_IPIPE_IPEND \
46 jump __common_int_entry; 63 jump __common_int_entry;
64# endif /* CONFIG_DEBUG_KERNEL */
47 65
48/* For timer interrupts, we need to save IPEND, since the user_mode 66/* For timer interrupts, we need to save IPEND, since the user_mode
49 macro accesses it to determine where to account time. */ 67 *macro accesses it to determine where to account time.
68 */
50#define TIMER_INTERRUPT_ENTRY(N) \ 69#define TIMER_INTERRUPT_ENTRY(N) \
51 [--sp] = SYSCFG; \ 70 [--sp] = SYSCFG; \
52 \
53 [--sp] = P0; /*orig_p0*/ \ 71 [--sp] = P0; /*orig_p0*/ \
54 [--sp] = R0; /*orig_r0*/ \ 72 [--sp] = R0; /*orig_r0*/ \
55 [--sp] = (R7:0,P5:0); \ 73 [--sp] = (R7:0,P5:0); \
@@ -58,6 +76,74 @@
58 r1 = [p0]; \ 76 r1 = [p0]; \
59 R0 = (N); \ 77 R0 = (N); \
60 jump __common_int_entry; 78 jump __common_int_entry;
79#else /* CONFIG_EXACT_HWERR is defined */
80
81/* if we want hardware error to be exact, we need to do a SSYNC (which forces
82 * read/writes to complete to the memory controllers), and check to see that
83 * caused a pending HW error condition. If so, we assume it was caused by user
84 * space, by setting the same interrupt that we are in (so it goes off again)
85 * and context restore, and a RTI (without servicing anything). This should
86 * cause the pending HWERR to fire, and when that is done, this interrupt will
87 * be re-serviced properly.
88 * As you can see by the code - we actually need to do two SSYNCS - one to
89 * make sure the read/writes complete, and another to make sure the hardware
90 * error is recognized by the core.
91 */
92#define INTERRUPT_ENTRY(N) \
93 SSYNC; \
94 SSYNC; \
95 [--sp] = SYSCFG; \
96 [--sp] = P0; /*orig_p0*/ \
97 [--sp] = R0; /*orig_r0*/ \
98 [--sp] = (R7:0,P5:0); \
99 R1 = ASTAT; \
100 P0.L = LO(ILAT); \
101 P0.H = HI(ILAT); \
102 R0 = [P0]; \
103 CC = BITTST(R0, EVT_IVHW_P); \
104 IF CC JUMP 1f; \
105 ASTAT = R1; \
106 p0.l = lo(IPEND); \
107 p0.h = hi(IPEND); \
108 r1 = [p0]; \
109 R0 = (N); \
110 LOAD_IPIPE_IPEND \
111 jump __common_int_entry; \
1121: ASTAT = R1; \
113 RAISE N; \
114 (R7:0, P5:0) = [SP++]; \
115 SP += 0x8; \
116 SYSCFG = [SP++]; \
117 CSYNC; \
118 RTI;
119
120#define TIMER_INTERRUPT_ENTRY(N) \
121 SSYNC; \
122 SSYNC; \
123 [--sp] = SYSCFG; \
124 [--sp] = P0; /*orig_p0*/ \
125 [--sp] = R0; /*orig_r0*/ \
126 [--sp] = (R7:0,P5:0); \
127 R1 = ASTAT; \
128 P0.L = LO(ILAT); \
129 P0.H = HI(ILAT); \
130 R0 = [P0]; \
131 CC = BITTST(R0, EVT_IVHW_P); \
132 IF CC JUMP 1f; \
133 ASTAT = R1; \
134 p0.l = lo(IPEND); \
135 p0.h = hi(IPEND); \
136 r1 = [p0]; \
137 R0 = (N); \
138 jump __common_int_entry; \
1391: ASTAT = R1; \
140 RAISE N; \
141 (R7:0, P5:0) = [SP++]; \
142 SP += 0x8; \
143 SYSCFG = [SP++]; \
144 CSYNC; \
145 RTI;
146#endif /* CONFIG_EXACT_HWERR */
61 147
62/* This one pushes RETI without using CLI. Interrupts are enabled. */ 148/* This one pushes RETI without using CLI. Interrupts are enabled. */
63#define SAVE_CONTEXT_SYSCALL save_context_syscall 149#define SAVE_CONTEXT_SYSCALL save_context_syscall
diff --git a/arch/blackfin/include/asm/gptimers.h b/arch/blackfin/include/asm/gptimers.h
index b0f847ae4bf4..89f08decb8e0 100644
--- a/arch/blackfin/include/asm/gptimers.h
+++ b/arch/blackfin/include/asm/gptimers.h
@@ -30,6 +30,7 @@
30# else 30# else
31# define MAX_BLACKFIN_GPTIMERS 11 31# define MAX_BLACKFIN_GPTIMERS 11
32# define TIMER8_GROUP_REG TIMER_ENABLE1 32# define TIMER8_GROUP_REG TIMER_ENABLE1
33# define TIMER_GROUP2 1
33# endif 34# endif
34# define TIMER0_GROUP_REG TIMER_ENABLE0 35# define TIMER0_GROUP_REG TIMER_ENABLE0
35#endif 36#endif
@@ -40,10 +41,12 @@
40# define MAX_BLACKFIN_GPTIMERS 12 41# define MAX_BLACKFIN_GPTIMERS 12
41# define TIMER0_GROUP_REG TMRS8_ENABLE 42# define TIMER0_GROUP_REG TMRS8_ENABLE
42# define TIMER8_GROUP_REG TMRS4_ENABLE 43# define TIMER8_GROUP_REG TMRS4_ENABLE
44# define TIMER_GROUP2 1
43#endif 45#endif
44/* 46/*
45 * All others: 3 timers: 47 * All others: 3 timers:
46 */ 48 */
49#define TIMER_GROUP1 0
47#if !defined(MAX_BLACKFIN_GPTIMERS) 50#if !defined(MAX_BLACKFIN_GPTIMERS)
48# define MAX_BLACKFIN_GPTIMERS 3 51# define MAX_BLACKFIN_GPTIMERS 3
49# define TIMER0_GROUP_REG TIMER_ENABLE 52# define TIMER0_GROUP_REG TIMER_ENABLE
@@ -109,8 +112,8 @@
109#define TIMER_ERR_PROG_PER 0x8000 112#define TIMER_ERR_PROG_PER 0x8000
110#define TIMER_ERR_PROG_PW 0xC000 113#define TIMER_ERR_PROG_PW 0xC000
111#define TIMER_EMU_RUN 0x0200 114#define TIMER_EMU_RUN 0x0200
112#define TIMER_TOGGLE_HI 0x0100 115#define TIMER_TOGGLE_HI 0x0100
113#define TIMER_CLK_SEL 0x0080 116#define TIMER_CLK_SEL 0x0080
114#define TIMER_OUT_DIS 0x0040 117#define TIMER_OUT_DIS 0x0040
115#define TIMER_TIN_SEL 0x0020 118#define TIMER_TIN_SEL 0x0020
116#define TIMER_IRQ_ENA 0x0010 119#define TIMER_IRQ_ENA 0x0010
@@ -169,23 +172,25 @@
169 172
170/* The actual gptimer API */ 173/* The actual gptimer API */
171 174
172void set_gptimer_pwidth (int timer_id, uint32_t width); 175void set_gptimer_pwidth(int timer_id, uint32_t width);
173uint32_t get_gptimer_pwidth (int timer_id); 176uint32_t get_gptimer_pwidth(int timer_id);
174void set_gptimer_period (int timer_id, uint32_t period); 177void set_gptimer_period(int timer_id, uint32_t period);
175uint32_t get_gptimer_period (int timer_id); 178uint32_t get_gptimer_period(int timer_id);
176uint32_t get_gptimer_count (int timer_id); 179uint32_t get_gptimer_count(int timer_id);
177uint16_t get_gptimer_intr (int timer_id); 180int get_gptimer_intr(int timer_id);
178void clear_gptimer_intr (int timer_id); 181void clear_gptimer_intr(int timer_id);
179uint16_t get_gptimer_over (int timer_id); 182int get_gptimer_over(int timer_id);
180void clear_gptimer_over (int timer_id); 183void clear_gptimer_over(int timer_id);
181void set_gptimer_config (int timer_id, uint16_t config); 184void set_gptimer_config(int timer_id, uint16_t config);
182uint16_t get_gptimer_config (int timer_id); 185uint16_t get_gptimer_config(int timer_id);
183void set_gptimer_pulse_hi (int timer_id); 186int get_gptimer_run(int timer_id);
187void set_gptimer_pulse_hi(int timer_id);
184void clear_gptimer_pulse_hi(int timer_id); 188void clear_gptimer_pulse_hi(int timer_id);
185void enable_gptimers (uint16_t mask); 189void enable_gptimers(uint16_t mask);
186void disable_gptimers (uint16_t mask); 190void disable_gptimers(uint16_t mask);
187uint16_t get_enabled_gptimers (void); 191void disable_gptimers_sync(uint16_t mask);
188uint32_t get_gptimer_status (int group); 192uint16_t get_enabled_gptimers(void);
189void set_gptimer_status (int group, uint32_t value); 193uint32_t get_gptimer_status(int group);
194void set_gptimer_status(int group, uint32_t value);
190 195
191#endif 196#endif
diff --git a/arch/blackfin/include/asm/io.h b/arch/blackfin/include/asm/io.h
index 63b2d8c78570..3022b5c96b37 100644
--- a/arch/blackfin/include/asm/io.h
+++ b/arch/blackfin/include/asm/io.h
@@ -80,19 +80,22 @@ static inline unsigned int readl(const volatile void __iomem *addr)
80#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c)) 80#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
81#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c)) 81#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
82 82
83#define inb(addr) readb(addr) 83/* Convert "I/O port addresses" to actual addresses. i.e. ugly casts. */
84#define inw(addr) readw(addr) 84#define __io(port) ((void *)(unsigned long)(port))
85#define inl(addr) readl(addr) 85
86#define outb(x,addr) ((void) writeb(x,addr)) 86#define inb(port) readb(__io(port))
87#define outw(x,addr) ((void) writew(x,addr)) 87#define inw(port) readw(__io(port))
88#define outl(x,addr) ((void) writel(x,addr)) 88#define inl(port) readl(__io(port))
89 89#define outb(x,port) writeb(x,__io(port))
90#define inb_p(addr) inb(addr) 90#define outw(x,port) writew(x,__io(port))
91#define inw_p(addr) inw(addr) 91#define outl(x,port) writel(x,__io(port))
92#define inl_p(addr) inl(addr) 92
93#define outb_p(x,addr) outb(x,addr) 93#define inb_p(port) inb(__io(port))
94#define outw_p(x,addr) outw(x,addr) 94#define inw_p(port) inw(__io(port))
95#define outl_p(x,addr) outl(x,addr) 95#define inl_p(port) inl(__io(port))
96#define outb_p(x,port) outb(x,__io(port))
97#define outw_p(x,port) outw(x,__io(port))
98#define outl_p(x,port) outl(x,__io(port))
96 99
97#define ioread8_rep(a,d,c) readsb(a,d,c) 100#define ioread8_rep(a,d,c) readsb(a,d,c)
98#define ioread16_rep(a,d,c) readsw(a,d,c) 101#define ioread16_rep(a,d,c) readsw(a,d,c)
diff --git a/arch/blackfin/include/asm/ipipe.h b/arch/blackfin/include/asm/ipipe.h
index 343b56361ec9..51d0bf5e2899 100644
--- a/arch/blackfin/include/asm/ipipe.h
+++ b/arch/blackfin/include/asm/ipipe.h
@@ -35,10 +35,10 @@
35#include <asm/atomic.h> 35#include <asm/atomic.h>
36#include <asm/traps.h> 36#include <asm/traps.h>
37 37
38#define IPIPE_ARCH_STRING "1.9-00" 38#define IPIPE_ARCH_STRING "1.9-01"
39#define IPIPE_MAJOR_NUMBER 1 39#define IPIPE_MAJOR_NUMBER 1
40#define IPIPE_MINOR_NUMBER 9 40#define IPIPE_MINOR_NUMBER 9
41#define IPIPE_PATCH_NUMBER 0 41#define IPIPE_PATCH_NUMBER 1
42 42
43#ifdef CONFIG_SMP 43#ifdef CONFIG_SMP
44#error "I-pipe/blackfin: SMP not implemented" 44#error "I-pipe/blackfin: SMP not implemented"
diff --git a/arch/blackfin/include/asm/page.h b/arch/blackfin/include/asm/page.h
index 344f6a8c1f22..3ea2016a1d4a 100644
--- a/arch/blackfin/include/asm/page.h
+++ b/arch/blackfin/include/asm/page.h
@@ -81,7 +81,7 @@ extern unsigned long memory_end;
81#define virt_addr_valid(kaddr) (((void *)(kaddr) >= (void *)PAGE_OFFSET) && \ 81#define virt_addr_valid(kaddr) (((void *)(kaddr) >= (void *)PAGE_OFFSET) && \
82 ((void *)(kaddr) < (void *)memory_end)) 82 ((void *)(kaddr) < (void *)memory_end))
83 83
84#include <asm-generic/page.h> 84#include <asm-generic/getorder.h>
85 85
86#endif /* __ASSEMBLY__ */ 86#endif /* __ASSEMBLY__ */
87 87
diff --git a/arch/blackfin/include/asm/pda.h b/arch/blackfin/include/asm/pda.h
index a67142740df0..b42555c1431c 100644
--- a/arch/blackfin/include/asm/pda.h
+++ b/arch/blackfin/include/asm/pda.h
@@ -64,8 +64,6 @@ struct blackfin_pda { /* Per-processor Data Area */
64 64
65extern struct blackfin_pda cpu_pda[]; 65extern struct blackfin_pda cpu_pda[];
66 66
67void reserve_pda(void);
68
69#endif /* __ASSEMBLY__ */ 67#endif /* __ASSEMBLY__ */
70 68
71#endif /* _ASM_BLACKFIN_PDA_H */ 69#endif /* _ASM_BLACKFIN_PDA_H */
diff --git a/arch/blackfin/include/asm/processor.h b/arch/blackfin/include/asm/processor.h
index 0eece23b41c7..3040415523b2 100644
--- a/arch/blackfin/include/asm/processor.h
+++ b/arch/blackfin/include/asm/processor.h
@@ -131,8 +131,8 @@ unsigned long get_wchan(struct task_struct *p);
131/* Get the Silicon Revision of the chip */ 131/* Get the Silicon Revision of the chip */
132static inline uint32_t __pure bfin_revid(void) 132static inline uint32_t __pure bfin_revid(void)
133{ 133{
134 /* stored in the upper 4 bits */ 134 /* Always use CHIPID, to work around ANOMALY_05000234 */
135 uint32_t revid = bfin_read_CHIPID() >> 28; 135 uint32_t revid = (bfin_read_CHIPID() & CHIPID_VERSION) >> 28;
136 136
137#ifdef CONFIG_BF52x 137#ifdef CONFIG_BF52x
138 /* ANOMALY_05000357 138 /* ANOMALY_05000357
diff --git a/arch/blackfin/include/asm/signal.h b/arch/blackfin/include/asm/signal.h
index 87951d251458..2eea90794454 100644
--- a/arch/blackfin/include/asm/signal.h
+++ b/arch/blackfin/include/asm/signal.h
@@ -104,7 +104,7 @@ typedef unsigned long sigset_t;
104#define MINSIGSTKSZ 2048 104#define MINSIGSTKSZ 2048
105#define SIGSTKSZ 8192 105#define SIGSTKSZ 8192
106 106
107#include <asm-generic/signal.h> 107#include <asm-generic/signal-defs.h>
108 108
109#ifdef __KERNEL__ 109#ifdef __KERNEL__
110struct old_sigaction { 110struct old_sigaction {
diff --git a/arch/blackfin/include/asm/time.h b/arch/blackfin/include/asm/time.h
index ddc43ce38533..589e937ed1eb 100644
--- a/arch/blackfin/include/asm/time.h
+++ b/arch/blackfin/include/asm/time.h
@@ -37,4 +37,5 @@ extern unsigned long long __bfin_cycles_off;
37extern unsigned int __bfin_cycles_mod; 37extern unsigned int __bfin_cycles_mod;
38#endif 38#endif
39 39
40extern void __init setup_core_timer(void);
40#endif 41#endif
diff --git a/arch/blackfin/include/asm/uaccess.h b/arch/blackfin/include/asm/uaccess.h
index 3248033531e6..8894e9ffbb57 100644
--- a/arch/blackfin/include/asm/uaccess.h
+++ b/arch/blackfin/include/asm/uaccess.h
@@ -59,12 +59,8 @@ static inline int is_in_rom(unsigned long addr)
59#ifndef CONFIG_ACCESS_CHECK 59#ifndef CONFIG_ACCESS_CHECK
60static inline int _access_ok(unsigned long addr, unsigned long size) { return 1; } 60static inline int _access_ok(unsigned long addr, unsigned long size) { return 1; }
61#else 61#else
62#ifdef CONFIG_ACCESS_OK_L1
63extern int _access_ok(unsigned long addr, unsigned long size)__attribute__((l1_text));
64#else
65extern int _access_ok(unsigned long addr, unsigned long size); 62extern int _access_ok(unsigned long addr, unsigned long size);
66#endif 63#endif
67#endif
68 64
69/* 65/*
70 * The exception table consists of pairs of addresses: the first is the 66 * The exception table consists of pairs of addresses: the first is the
@@ -83,9 +79,6 @@ struct exception_table_entry {
83 unsigned long insn, fixup; 79 unsigned long insn, fixup;
84}; 80};
85 81
86/* Returns 0 if exception not found and fixup otherwise. */
87extern unsigned long search_exception_table(unsigned long);
88
89/* 82/*
90 * These are the main single-value transfer routines. They automatically 83 * These are the main single-value transfer routines. They automatically
91 * use the right size if we just have the right pointer type. 84 * use the right size if we just have the right pointer type.
@@ -233,16 +226,29 @@ strncpy_from_user(char *dst, const char *src, long count)
233} 226}
234 227
235/* 228/*
236 * Return the size of a string (including the ending 0) 229 * Get the size of a string in user space.
230 * src: The string to measure
231 * n: The maximum valid length
237 * 232 *
238 * Return 0 on exception, a value greater than N if too long 233 * Get the size of a NUL-terminated string in user space.
234 *
235 * Returns the size of the string INCLUDING the terminating NUL.
236 * On exception, returns 0.
237 * If the string is too long, returns a value greater than n.
239 */ 238 */
240static inline long strnlen_user(const char *src, long n) 239static inline long __must_check strnlen_user(const char *src, long n)
241{ 240{
242 return (strlen(src) + 1); 241 if (!access_ok(VERIFY_READ, src, 1))
242 return 0;
243 return strnlen(src, n) + 1;
243} 244}
244 245
245#define strlen_user(str) strnlen_user(str, 32767) 246static inline long __must_check strlen_user(const char *src)
247{
248 if (!access_ok(VERIFY_READ, src, 1))
249 return 0;
250 return strlen(src) + 1;
251}
246 252
247/* 253/*
248 * Zero Userspace 254 * Zero Userspace
@@ -251,6 +257,8 @@ static inline long strnlen_user(const char *src, long n)
251static inline unsigned long __must_check 257static inline unsigned long __must_check
252__clear_user(void *to, unsigned long n) 258__clear_user(void *to, unsigned long n)
253{ 259{
260 if (!access_ok(VERIFY_WRITE, to, n))
261 return n;
254 memset(to, 0, n); 262 memset(to, 0, n);
255 return 0; 263 return 0;
256} 264}
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-02 17:51:16 -0500