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-rw-r--r--arch/blackfin/include/asm/gpio.h456
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diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h
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1/*
2 * File: arch/blackfin/kernel/bfin_gpio.h
3 * Based on:
4 * Author: Michael Hennerich (hennerich@blackfin.uclinux.org)
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2004-2008 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */
29
30/*
31* Number BF537/6/4 BF561 BF533/2/1
32* BF527/5/2
33*
34* GPIO_0 PF0 PF0 PF0
35* GPIO_1 PF1 PF1 PF1
36* GPIO_2 PF2 PF2 PF2
37* GPIO_3 PF3 PF3 PF3
38* GPIO_4 PF4 PF4 PF4
39* GPIO_5 PF5 PF5 PF5
40* GPIO_6 PF6 PF6 PF6
41* GPIO_7 PF7 PF7 PF7
42* GPIO_8 PF8 PF8 PF8
43* GPIO_9 PF9 PF9 PF9
44* GPIO_10 PF10 PF10 PF10
45* GPIO_11 PF11 PF11 PF11
46* GPIO_12 PF12 PF12 PF12
47* GPIO_13 PF13 PF13 PF13
48* GPIO_14 PF14 PF14 PF14
49* GPIO_15 PF15 PF15 PF15
50* GPIO_16 PG0 PF16
51* GPIO_17 PG1 PF17
52* GPIO_18 PG2 PF18
53* GPIO_19 PG3 PF19
54* GPIO_20 PG4 PF20
55* GPIO_21 PG5 PF21
56* GPIO_22 PG6 PF22
57* GPIO_23 PG7 PF23
58* GPIO_24 PG8 PF24
59* GPIO_25 PG9 PF25
60* GPIO_26 PG10 PF26
61* GPIO_27 PG11 PF27
62* GPIO_28 PG12 PF28
63* GPIO_29 PG13 PF29
64* GPIO_30 PG14 PF30
65* GPIO_31 PG15 PF31
66* GPIO_32 PH0 PF32
67* GPIO_33 PH1 PF33
68* GPIO_34 PH2 PF34
69* GPIO_35 PH3 PF35
70* GPIO_36 PH4 PF36
71* GPIO_37 PH5 PF37
72* GPIO_38 PH6 PF38
73* GPIO_39 PH7 PF39
74* GPIO_40 PH8 PF40
75* GPIO_41 PH9 PF41
76* GPIO_42 PH10 PF42
77* GPIO_43 PH11 PF43
78* GPIO_44 PH12 PF44
79* GPIO_45 PH13 PF45
80* GPIO_46 PH14 PF46
81* GPIO_47 PH15 PF47
82*/
83
84#ifndef __ARCH_BLACKFIN_GPIO_H__
85#define __ARCH_BLACKFIN_GPIO_H__
86
87#define gpio_bank(x) ((x) >> 4)
88#define gpio_bit(x) (1<<((x) & 0xF))
89#define gpio_sub_n(x) ((x) & 0xF)
90
91#define GPIO_BANKSIZE 16
92
93#define GPIO_0 0
94#define GPIO_1 1
95#define GPIO_2 2
96#define GPIO_3 3
97#define GPIO_4 4
98#define GPIO_5 5
99#define GPIO_6 6
100#define GPIO_7 7
101#define GPIO_8 8
102#define GPIO_9 9
103#define GPIO_10 10
104#define GPIO_11 11
105#define GPIO_12 12
106#define GPIO_13 13
107#define GPIO_14 14
108#define GPIO_15 15
109#define GPIO_16 16
110#define GPIO_17 17
111#define GPIO_18 18
112#define GPIO_19 19
113#define GPIO_20 20
114#define GPIO_21 21
115#define GPIO_22 22
116#define GPIO_23 23
117#define GPIO_24 24
118#define GPIO_25 25
119#define GPIO_26 26
120#define GPIO_27 27
121#define GPIO_28 28
122#define GPIO_29 29
123#define GPIO_30 30
124#define GPIO_31 31
125#define GPIO_32 32
126#define GPIO_33 33
127#define GPIO_34 34
128#define GPIO_35 35
129#define GPIO_36 36
130#define GPIO_37 37
131#define GPIO_38 38
132#define GPIO_39 39
133#define GPIO_40 40
134#define GPIO_41 41
135#define GPIO_42 42
136#define GPIO_43 43
137#define GPIO_44 44
138#define GPIO_45 45
139#define GPIO_46 46
140#define GPIO_47 47
141
142
143#define PERIPHERAL_USAGE 1
144#define GPIO_USAGE 0
145
146#ifdef BF533_FAMILY
147#define MAX_BLACKFIN_GPIOS 16
148
149#define GPIO_PF0 0
150#define GPIO_PF1 1
151#define GPIO_PF2 2
152#define GPIO_PF3 3
153#define GPIO_PF4 4
154#define GPIO_PF5 5
155#define GPIO_PF6 6
156#define GPIO_PF7 7
157#define GPIO_PF8 8
158#define GPIO_PF9 9
159#define GPIO_PF10 10
160#define GPIO_PF11 11
161#define GPIO_PF12 12
162#define GPIO_PF13 13
163#define GPIO_PF14 14
164#define GPIO_PF15 15
165
166#endif
167
168#if defined(BF527_FAMILY) || defined(BF537_FAMILY)
169#define MAX_BLACKFIN_GPIOS 48
170
171#define GPIO_PF0 0
172#define GPIO_PF1 1
173#define GPIO_PF2 2
174#define GPIO_PF3 3
175#define GPIO_PF4 4
176#define GPIO_PF5 5
177#define GPIO_PF6 6
178#define GPIO_PF7 7
179#define GPIO_PF8 8
180#define GPIO_PF9 9
181#define GPIO_PF10 10
182#define GPIO_PF11 11
183#define GPIO_PF12 12
184#define GPIO_PF13 13
185#define GPIO_PF14 14
186#define GPIO_PF15 15
187#define GPIO_PG0 16
188#define GPIO_PG1 17
189#define GPIO_PG2 18
190#define GPIO_PG3 19
191#define GPIO_PG4 20
192#define GPIO_PG5 21
193#define GPIO_PG6 22
194#define GPIO_PG7 23
195#define GPIO_PG8 24
196#define GPIO_PG9 25
197#define GPIO_PG10 26
198#define GPIO_PG11 27
199#define GPIO_PG12 28
200#define GPIO_PG13 29
201#define GPIO_PG14 30
202#define GPIO_PG15 31
203#define GPIO_PH0 32
204#define GPIO_PH1 33
205#define GPIO_PH2 34
206#define GPIO_PH3 35
207#define GPIO_PH4 36
208#define GPIO_PH5 37
209#define GPIO_PH6 38
210#define GPIO_PH7 39
211#define GPIO_PH8 40
212#define GPIO_PH9 41
213#define GPIO_PH10 42
214#define GPIO_PH11 43
215#define GPIO_PH12 44
216#define GPIO_PH13 45
217#define GPIO_PH14 46
218#define GPIO_PH15 47
219
220#define PORT_F GPIO_PF0
221#define PORT_G GPIO_PG0
222#define PORT_H GPIO_PH0
223
224#endif
225
226#ifdef BF548_FAMILY
227#include <mach/gpio.h>
228#endif
229
230#ifdef BF561_FAMILY
231#define MAX_BLACKFIN_GPIOS 48
232
233#define GPIO_PF0 0
234#define GPIO_PF1 1
235#define GPIO_PF2 2
236#define GPIO_PF3 3
237#define GPIO_PF4 4
238#define GPIO_PF5 5
239#define GPIO_PF6 6
240#define GPIO_PF7 7
241#define GPIO_PF8 8
242#define GPIO_PF9 9
243#define GPIO_PF10 10
244#define GPIO_PF11 11
245#define GPIO_PF12 12
246#define GPIO_PF13 13
247#define GPIO_PF14 14
248#define GPIO_PF15 15
249#define GPIO_PF16 16
250#define GPIO_PF17 17
251#define GPIO_PF18 18
252#define GPIO_PF19 19
253#define GPIO_PF20 20
254#define GPIO_PF21 21
255#define GPIO_PF22 22
256#define GPIO_PF23 23
257#define GPIO_PF24 24
258#define GPIO_PF25 25
259#define GPIO_PF26 26
260#define GPIO_PF27 27
261#define GPIO_PF28 28
262#define GPIO_PF29 29
263#define GPIO_PF30 30
264#define GPIO_PF31 31
265#define GPIO_PF32 32
266#define GPIO_PF33 33
267#define GPIO_PF34 34
268#define GPIO_PF35 35
269#define GPIO_PF36 36
270#define GPIO_PF37 37
271#define GPIO_PF38 38
272#define GPIO_PF39 39
273#define GPIO_PF40 40
274#define GPIO_PF41 41
275#define GPIO_PF42 42
276#define GPIO_PF43 43
277#define GPIO_PF44 44
278#define GPIO_PF45 45
279#define GPIO_PF46 46
280#define GPIO_PF47 47
281
282#define PORT_FIO0 GPIO_0
283#define PORT_FIO1 GPIO_16
284#define PORT_FIO2 GPIO_32
285#endif
286
287#ifndef __ASSEMBLY__
288
289/***********************************************************
290*
291* FUNCTIONS: Blackfin General Purpose Ports Access Functions
292*
293* INPUTS/OUTPUTS:
294* gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
295*
296*
297* DESCRIPTION: These functions abstract direct register access
298* to Blackfin processor General Purpose
299* Ports Regsiters
300*
301* CAUTION: These functions do not belong to the GPIO Driver API
302*************************************************************
303* MODIFICATION HISTORY :
304**************************************************************/
305
306#ifndef BF548_FAMILY
307void set_gpio_dir(unsigned, unsigned short);
308void set_gpio_inen(unsigned, unsigned short);
309void set_gpio_polar(unsigned, unsigned short);
310void set_gpio_edge(unsigned, unsigned short);
311void set_gpio_both(unsigned, unsigned short);
312void set_gpio_data(unsigned, unsigned short);
313void set_gpio_maska(unsigned, unsigned short);
314void set_gpio_maskb(unsigned, unsigned short);
315void set_gpio_toggle(unsigned);
316void set_gpiop_dir(unsigned, unsigned short);
317void set_gpiop_inen(unsigned, unsigned short);
318void set_gpiop_polar(unsigned, unsigned short);
319void set_gpiop_edge(unsigned, unsigned short);
320void set_gpiop_both(unsigned, unsigned short);
321void set_gpiop_data(unsigned, unsigned short);
322void set_gpiop_maska(unsigned, unsigned short);
323void set_gpiop_maskb(unsigned, unsigned short);
324unsigned short get_gpio_dir(unsigned);
325unsigned short get_gpio_inen(unsigned);
326unsigned short get_gpio_polar(unsigned);
327unsigned short get_gpio_edge(unsigned);
328unsigned short get_gpio_both(unsigned);
329unsigned short get_gpio_maska(unsigned);
330unsigned short get_gpio_maskb(unsigned);
331unsigned short get_gpio_data(unsigned);
332unsigned short get_gpiop_dir(unsigned);
333unsigned short get_gpiop_inen(unsigned);
334unsigned short get_gpiop_polar(unsigned);
335unsigned short get_gpiop_edge(unsigned);
336unsigned short get_gpiop_both(unsigned);
337unsigned short get_gpiop_maska(unsigned);
338unsigned short get_gpiop_maskb(unsigned);
339unsigned short get_gpiop_data(unsigned);
340
341struct gpio_port_t {
342 unsigned short data;
343 unsigned short dummy1;
344 unsigned short data_clear;
345 unsigned short dummy2;
346 unsigned short data_set;
347 unsigned short dummy3;
348 unsigned short toggle;
349 unsigned short dummy4;
350 unsigned short maska;
351 unsigned short dummy5;
352 unsigned short maska_clear;
353 unsigned short dummy6;
354 unsigned short maska_set;
355 unsigned short dummy7;
356 unsigned short maska_toggle;
357 unsigned short dummy8;
358 unsigned short maskb;
359 unsigned short dummy9;
360 unsigned short maskb_clear;
361 unsigned short dummy10;
362 unsigned short maskb_set;
363 unsigned short dummy11;
364 unsigned short maskb_toggle;
365 unsigned short dummy12;
366 unsigned short dir;
367 unsigned short dummy13;
368 unsigned short polar;
369 unsigned short dummy14;
370 unsigned short edge;
371 unsigned short dummy15;
372 unsigned short both;
373 unsigned short dummy16;
374 unsigned short inen;
375};
376#endif
377
378#ifdef CONFIG_PM
379
380unsigned int bfin_pm_standby_setup(void);
381void bfin_pm_standby_restore(void);
382
383void bfin_gpio_pm_hibernate_restore(void);
384void bfin_gpio_pm_hibernate_suspend(void);
385
386#ifndef CONFIG_BF54x
387#define PM_WAKE_RISING 0x1
388#define PM_WAKE_FALLING 0x2
389#define PM_WAKE_HIGH 0x4
390#define PM_WAKE_LOW 0x8
391#define PM_WAKE_BOTH_EDGES (PM_WAKE_RISING | PM_WAKE_FALLING)
392#define PM_WAKE_IGNORE 0xF0
393
394int gpio_pm_wakeup_request(unsigned gpio, unsigned char type);
395void gpio_pm_wakeup_free(unsigned gpio);
396
397struct gpio_port_s {
398 unsigned short data;
399 unsigned short maska;
400 unsigned short maskb;
401 unsigned short dir;
402 unsigned short polar;
403 unsigned short edge;
404 unsigned short both;
405 unsigned short inen;
406
407 unsigned short fer;
408 unsigned short reserved;
409 unsigned short mux;
410};
411#endif /*CONFIG_BF54x*/
412#endif /*CONFIG_PM*/
413/***********************************************************
414*
415* FUNCTIONS: Blackfin GPIO Driver
416*
417* INPUTS/OUTPUTS:
418* gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
419*
420*
421* DESCRIPTION: Blackfin GPIO Driver API
422*
423* CAUTION:
424*************************************************************
425* MODIFICATION HISTORY :
426**************************************************************/
427
428int gpio_request(unsigned, const char *);
429void gpio_free(unsigned);
430
431void gpio_set_value(unsigned gpio, int arg);
432int gpio_get_value(unsigned gpio);
433
434#ifndef BF548_FAMILY
435#define gpio_set_value(gpio, value) set_gpio_data(gpio, value)
436#endif
437
438int gpio_direction_input(unsigned gpio);
439int gpio_direction_output(unsigned gpio, int value);
440
441#include <asm-generic/gpio.h> /* cansleep wrappers */
442#include <asm/irq.h>
443
444static inline int gpio_to_irq(unsigned gpio)
445{
446 return (gpio + GPIO_IRQ_BASE);
447}
448
449static inline int irq_to_gpio(unsigned irq)
450{
451 return (irq - GPIO_IRQ_BASE);
452}
453
454#endif /* __ASSEMBLY__ */
455
456#endif /* __ARCH_BLACKFIN_GPIO_H__ */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-28 17:00:54 -0500