aboutsummaryrefslogtreecommitdiffstats
path: root/arch/blackfin/include/asm/cacheflush.h
diff options
context:
space:
mode:
Diffstat (limited to 'arch/blackfin/include/asm/cacheflush.h')
-rw-r--r--arch/blackfin/include/asm/cacheflush.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/blackfin/include/asm/cacheflush.h b/arch/blackfin/include/asm/cacheflush.h
index 5c17dee53b5d..7e55549e180f 100644
--- a/arch/blackfin/include/asm/cacheflush.h
+++ b/arch/blackfin/include/asm/cacheflush.h
@@ -56,7 +56,7 @@ extern void blackfin_invalidate_entire_icache(void);
56 56
57static inline void flush_icache_range(unsigned start, unsigned end) 57static inline void flush_icache_range(unsigned start, unsigned end)
58{ 58{
59#if defined(CONFIG_BFIN_WB) 59#if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK)
60 blackfin_dcache_flush_range(start, end); 60 blackfin_dcache_flush_range(start, end);
61#endif 61#endif
62 62
@@ -87,9 +87,9 @@ do { memcpy(dst, src, len); \
87#else 87#else
88# define invalidate_dcache_range(start,end) do { } while (0) 88# define invalidate_dcache_range(start,end) do { } while (0)
89#endif 89#endif
90#if defined(CONFIG_BFIN_DCACHE) && defined(CONFIG_BFIN_WB) 90#if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK)
91# define flush_dcache_range(start,end) blackfin_dcache_flush_range((start), (end)) 91# define flush_dcache_range(start,end) blackfin_dcache_flush_range((start), (end))
92# define flush_dcache_page(page) blackfin_dflush_page(page_address(page)) 92# define flush_dcache_page(page) blackfin_dflush_page(page_address(page))
93#else 93#else
94# define flush_dcache_range(start,end) do { } while (0) 94# define flush_dcache_range(start,end) do { } while (0)
95# define flush_dcache_page(page) do { } while (0) 95# define flush_dcache_page(page) do { } while (0)
@@ -100,7 +100,7 @@ extern unsigned long reserved_mem_icache_on;
100 100
101static inline int bfin_addr_dcacheable(unsigned long addr) 101static inline int bfin_addr_dcacheable(unsigned long addr)
102{ 102{
103#ifdef CONFIG_BFIN_DCACHE 103#ifdef CONFIG_BFIN_EXTMEM_DCACHEABLE
104 if (addr < (_ramend - DMA_UNCACHED_REGION)) 104 if (addr < (_ramend - DMA_UNCACHED_REGION))
105 return 1; 105 return 1;
106#endif 106#endif
@@ -109,7 +109,7 @@ static inline int bfin_addr_dcacheable(unsigned long addr)
109 addr >= _ramend && addr < physical_mem_end) 109 addr >= _ramend && addr < physical_mem_end)
110 return 1; 110 return 1;
111 111
112#ifndef CONFIG_BFIN_L2_NOT_CACHED 112#ifdef CONFIG_BFIN_L2_DCACHEABLE
113 if (addr >= L2_START && addr < L2_START + L2_LENGTH) 113 if (addr >= L2_START && addr < L2_START + L2_LENGTH)
114 return 1; 114 return 1;
115#endif 115#endif