diff options
Diffstat (limited to 'arch/avr32/mm/cache.c')
| -rw-r--r-- | arch/avr32/mm/cache.c | 150 |
1 files changed, 150 insertions, 0 deletions
diff --git a/arch/avr32/mm/cache.c b/arch/avr32/mm/cache.c new file mode 100644 index 000000000000..450515b245a0 --- /dev/null +++ b/arch/avr32/mm/cache.c | |||
| @@ -0,0 +1,150 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (C) 2004-2006 Atmel Corporation | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify | ||
| 5 | * it under the terms of the GNU General Public License version 2 as | ||
| 6 | * published by the Free Software Foundation. | ||
| 7 | */ | ||
| 8 | |||
| 9 | #include <linux/highmem.h> | ||
| 10 | #include <linux/unistd.h> | ||
| 11 | |||
| 12 | #include <asm/cacheflush.h> | ||
| 13 | #include <asm/cachectl.h> | ||
| 14 | #include <asm/processor.h> | ||
| 15 | #include <asm/uaccess.h> | ||
| 16 | |||
| 17 | /* | ||
| 18 | * If you attempt to flush anything more than this, you need superuser | ||
| 19 | * privileges. The value is completely arbitrary. | ||
| 20 | */ | ||
| 21 | #define CACHEFLUSH_MAX_LEN 1024 | ||
| 22 | |||
| 23 | void invalidate_dcache_region(void *start, size_t size) | ||
| 24 | { | ||
| 25 | unsigned long v, begin, end, linesz; | ||
| 26 | |||
| 27 | linesz = boot_cpu_data.dcache.linesz; | ||
| 28 | |||
| 29 | //printk("invalidate dcache: %p + %u\n", start, size); | ||
| 30 | |||
| 31 | /* You asked for it, you got it */ | ||
| 32 | begin = (unsigned long)start & ~(linesz - 1); | ||
| 33 | end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1); | ||
| 34 | |||
| 35 | for (v = begin; v < end; v += linesz) | ||
| 36 | invalidate_dcache_line((void *)v); | ||
| 37 | } | ||
| 38 | |||
| 39 | void clean_dcache_region(void *start, size_t size) | ||
| 40 | { | ||
| 41 | unsigned long v, begin, end, linesz; | ||
| 42 | |||
| 43 | linesz = boot_cpu_data.dcache.linesz; | ||
| 44 | begin = (unsigned long)start & ~(linesz - 1); | ||
| 45 | end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1); | ||
| 46 | |||
| 47 | for (v = begin; v < end; v += linesz) | ||
| 48 | clean_dcache_line((void *)v); | ||
| 49 | flush_write_buffer(); | ||
| 50 | } | ||
| 51 | |||
| 52 | void flush_dcache_region(void *start, size_t size) | ||
| 53 | { | ||
| 54 | unsigned long v, begin, end, linesz; | ||
| 55 | |||
| 56 | linesz = boot_cpu_data.dcache.linesz; | ||
| 57 | begin = (unsigned long)start & ~(linesz - 1); | ||
| 58 | end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1); | ||
| 59 | |||
| 60 | for (v = begin; v < end; v += linesz) | ||
| 61 | flush_dcache_line((void *)v); | ||
| 62 | flush_write_buffer(); | ||
| 63 | } | ||
| 64 | |||
| 65 | void invalidate_icache_region(void *start, size_t size) | ||
| 66 | { | ||
| 67 | unsigned long v, begin, end, linesz; | ||
| 68 | |||
| 69 | linesz = boot_cpu_data.icache.linesz; | ||
| 70 | begin = (unsigned long)start & ~(linesz - 1); | ||
| 71 | end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1); | ||
| 72 | |||
| 73 | for (v = begin; v < end; v += linesz) | ||
| 74 | invalidate_icache_line((void *)v); | ||
| 75 | } | ||
| 76 | |||
| 77 | static inline void __flush_icache_range(unsigned long start, unsigned long end) | ||
| 78 | { | ||
| 79 | unsigned long v, linesz; | ||
| 80 | |||
| 81 | linesz = boot_cpu_data.dcache.linesz; | ||
| 82 | for (v = start; v < end; v += linesz) { | ||
| 83 | clean_dcache_line((void *)v); | ||
| 84 | invalidate_icache_line((void *)v); | ||
| 85 | } | ||
| 86 | |||
| 87 | flush_write_buffer(); | ||
| 88 | } | ||
| 89 | |||
| 90 | /* | ||
| 91 | * This one is called after a module has been loaded. | ||
| 92 | */ | ||
| 93 | void flush_icache_range(unsigned long start, unsigned long end) | ||
| 94 | { | ||
| 95 | unsigned long linesz; | ||
| 96 | |||
| 97 | linesz = boot_cpu_data.dcache.linesz; | ||
| 98 | __flush_icache_range(start & ~(linesz - 1), | ||
| 99 | (end + linesz - 1) & ~(linesz - 1)); | ||
| 100 | } | ||
| 101 | |||
| 102 | /* | ||
| 103 | * This one is called from do_no_page(), do_swap_page() and install_page(). | ||
| 104 | */ | ||
| 105 | void flush_icache_page(struct vm_area_struct *vma, struct page *page) | ||
| 106 | { | ||
| 107 | if (vma->vm_flags & VM_EXEC) { | ||
| 108 | void *v = kmap(page); | ||
| 109 | __flush_icache_range((unsigned long)v, (unsigned long)v + PAGE_SIZE); | ||
| 110 | kunmap(v); | ||
| 111 | } | ||
| 112 | } | ||
| 113 | |||
| 114 | /* | ||
| 115 | * This one is used by copy_to_user_page() | ||
| 116 | */ | ||
| 117 | void flush_icache_user_range(struct vm_area_struct *vma, struct page *page, | ||
| 118 | unsigned long addr, int len) | ||
| 119 | { | ||
| 120 | if (vma->vm_flags & VM_EXEC) | ||
| 121 | flush_icache_range(addr, addr + len); | ||
| 122 | } | ||
| 123 | |||
| 124 | asmlinkage int sys_cacheflush(int operation, void __user *addr, size_t len) | ||
| 125 | { | ||
| 126 | int ret; | ||
| 127 | |||
| 128 | if (len > CACHEFLUSH_MAX_LEN) { | ||
| 129 | ret = -EPERM; | ||
| 130 | if (!capable(CAP_SYS_ADMIN)) | ||
| 131 | goto out; | ||
| 132 | } | ||
| 133 | |||
| 134 | ret = -EFAULT; | ||
| 135 | if (!access_ok(VERIFY_WRITE, addr, len)) | ||
| 136 | goto out; | ||
| 137 | |||
| 138 | switch (operation) { | ||
| 139 | case CACHE_IFLUSH: | ||
| 140 | flush_icache_range((unsigned long)addr, | ||
| 141 | (unsigned long)addr + len); | ||
| 142 | ret = 0; | ||
| 143 | break; | ||
| 144 | default: | ||
| 145 | ret = -EINVAL; | ||
| 146 | } | ||
| 147 | |||
| 148 | out: | ||
| 149 | return ret; | ||
| 150 | } | ||
