9 files changed, 235 insertions, 101 deletions

diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
index f1b9a3ac2733..5d00bb8d3cc2 100644
--- a/arch/avr32/mach-at32ap/at32ap700x.c
+++ b/arch/avr32/mach-at32ap/at32ap700x.c
@@ -1405,13 +1405,14 @@ static struct clk atmel_lcdfb0_pixclk = {
 struct platform_device *__init
 at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
                      unsigned long fbmem_start, unsigned long fbmem_len,
-                     unsigned int pin_config)
+                     u64 pin_mask)
 {
         struct platform_device *pdev;
         struct atmel_lcdfb_info *info;
         struct fb_monspecs *monspecs;
         struct fb_videomode *modedb;
         unsigned int modedb_size;
+        int i;
 
         /*
          * Do a deep copy of the fb data, monspecs and modedb. Make
@@ -1433,75 +1434,29 @@ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
         case 0:
                 pdev = &atmel_lcdfb0_device;
 
-                switch (pin_config) {
-                case 0:
-                        select_peripheral(PC(19), PERIPH_A, 0); /* CC     */
-                        select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC  */
-                        select_peripheral(PC(21), PERIPH_A, 0); /* PCLK   */
-                        select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC  */
-                        select_peripheral(PC(23), PERIPH_A, 0); /* DVAL   */
-                        select_peripheral(PC(24), PERIPH_A, 0); /* MODE   */
-                        select_peripheral(PC(25), PERIPH_A, 0); /* PWR    */
-                        select_peripheral(PC(26), PERIPH_A, 0); /* DATA0  */
-                        select_peripheral(PC(27), PERIPH_A, 0); /* DATA1  */
-                        select_peripheral(PC(28), PERIPH_A, 0); /* DATA2  */
-                        select_peripheral(PC(29), PERIPH_A, 0); /* DATA3  */
-                        select_peripheral(PC(30), PERIPH_A, 0); /* DATA4  */
-                        select_peripheral(PC(31), PERIPH_A, 0); /* DATA5  */
-                        select_peripheral(PD(0),  PERIPH_A, 0); /* DATA6  */
-                        select_peripheral(PD(1),  PERIPH_A, 0); /* DATA7  */
-                        select_peripheral(PD(2),  PERIPH_A, 0); /* DATA8  */
-                        select_peripheral(PD(3),  PERIPH_A, 0); /* DATA9  */
-                        select_peripheral(PD(4),  PERIPH_A, 0); /* DATA10 */
-                        select_peripheral(PD(5),  PERIPH_A, 0); /* DATA11 */
-                        select_peripheral(PD(6),  PERIPH_A, 0); /* DATA12 */
-                        select_peripheral(PD(7),  PERIPH_A, 0); /* DATA13 */
-                        select_peripheral(PD(8),  PERIPH_A, 0); /* DATA14 */
-                        select_peripheral(PD(9),  PERIPH_A, 0); /* DATA15 */
-                        select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */
-                        select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */
-                        select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */
-                        select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */
-                        select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */
-                        select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */
-                        select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */
-                        select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */
-                        break;
-                case 1:
-                        select_peripheral(PE(0),  PERIPH_B, 0); /* CC     */
-                        select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC  */
-                        select_peripheral(PC(21), PERIPH_A, 0); /* PCLK   */
-                        select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC  */
-                        select_peripheral(PE(1),  PERIPH_B, 0); /* DVAL   */
-                        select_peripheral(PE(2),  PERIPH_B, 0); /* MODE   */
-                        select_peripheral(PC(25), PERIPH_A, 0); /* PWR    */
-                        select_peripheral(PE(3),  PERIPH_B, 0); /* DATA0  */
-                        select_peripheral(PE(4),  PERIPH_B, 0); /* DATA1  */
-                        select_peripheral(PE(5),  PERIPH_B, 0); /* DATA2  */
-                        select_peripheral(PE(6),  PERIPH_B, 0); /* DATA3  */
-                        select_peripheral(PE(7),  PERIPH_B, 0); /* DATA4  */
-                        select_peripheral(PC(31), PERIPH_A, 0); /* DATA5  */
-                        select_peripheral(PD(0),  PERIPH_A, 0); /* DATA6  */
-                        select_peripheral(PD(1),  PERIPH_A, 0); /* DATA7  */
-                        select_peripheral(PE(8),  PERIPH_B, 0); /* DATA8  */
-                        select_peripheral(PE(9),  PERIPH_B, 0); /* DATA9  */
-                        select_peripheral(PE(10), PERIPH_B, 0); /* DATA10 */
-                        select_peripheral(PE(11), PERIPH_B, 0); /* DATA11 */
-                        select_peripheral(PE(12), PERIPH_B, 0); /* DATA12 */
-                        select_peripheral(PD(7),  PERIPH_A, 0); /* DATA13 */
-                        select_peripheral(PD(8),  PERIPH_A, 0); /* DATA14 */
-                        select_peripheral(PD(9),  PERIPH_A, 0); /* DATA15 */
-                        select_peripheral(PE(13), PERIPH_B, 0); /* DATA16 */
-                        select_peripheral(PE(14), PERIPH_B, 0); /* DATA17 */
-                        select_peripheral(PE(15), PERIPH_B, 0); /* DATA18 */
-                        select_peripheral(PE(16), PERIPH_B, 0); /* DATA19 */
-                        select_peripheral(PE(17), PERIPH_B, 0); /* DATA20 */
-                        select_peripheral(PE(18), PERIPH_B, 0); /* DATA21 */
-                        select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */
-                        select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */
-                        break;
-                default:
-                        goto err_invalid_id;
+                if (pin_mask == 0ULL)
+                        /* Default to "full" lcdc control signals and 24bit */
+                        pin_mask = ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL;
+
+                /* LCDC on port C */
+                for (i = 19; i < 32; i++) {
+                        if (pin_mask & (1ULL << i))
+                                at32_select_periph(GPIO_PIOC_BASE + i,
+                                                GPIO_PERIPH_A, 0);
+                }
+
+                /* LCDC on port D */
+                for (i = 0; i < 18; i++) {
+                        if (pin_mask & (1ULL << i))
+                                at32_select_periph(GPIO_PIOD_BASE + i,
+                                                GPIO_PERIPH_A, 0);
+                }
+
+                /* LCDC on port E */
+                for (i = 0; i < 19; i++) {
+                        if (pin_mask & (1ULL << (i + 32)))
+                                at32_select_periph(GPIO_PIOE_BASE + i,
+                                                GPIO_PERIPH_B, 0);
                 }
 
                 clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
@@ -2125,7 +2080,7 @@ static struct clk gclk4 = {
         .index          = 4,
 };
 
-struct clk *at32_clock_list[] = {
+static __initdata struct clk *init_clocks[] = {
         &osc32k,
         &osc0,
         &osc1,
@@ -2189,7 +2144,6 @@ struct clk *at32_clock_list[] = {
         &gclk3,
         &gclk4,
 };
-unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
 
 void __init setup_platform(void)
 {
@@ -2220,14 +2174,19 @@ void __init setup_platform(void)
         genclk_init_parent(&abdac0_sample_clk);
 
         /*
-         * Turn on all clocks that have at least one user already, and
-         * turn off everything else. We only do this for module
-         * clocks, and even though it isn't particularly pretty to
-         * check the address of the mode function, it should do the
-         * trick...
+         * Build initial dynamic clock list by registering all clocks
+         * from the array.
+         * At the same time, turn on all clocks that have at least one
+         * user already, and turn off everything else. We only do this
+         * for module clocks, and even though it isn't particularly
+         * pretty to  check the address of the mode function, it should
+         * do the trick...
          */
-        for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
-                struct clk *clk = at32_clock_list[i];
+        for (i = 0; i < ARRAY_SIZE(init_clocks); i++) {
+                struct clk *clk = init_clocks[i];
+
+                /* first, register clock */
+                at32_clk_register(clk);
 
                 if (clk->users == 0)
                         continue;
diff --git a/arch/avr32/mach-at32ap/clock.c b/arch/avr32/mach-at32ap/clock.c
index 6c27ddac5adf..138a00a2a2d0 100644
--- a/arch/avr32/mach-at32ap/clock.c
+++ b/arch/avr32/mach-at32ap/clock.c
@@ -15,24 +15,40 @@
 #include <linux/err.h>
 #include <linux/device.h>
 #include <linux/string.h>
+#include <linux/list.h>
 
 #include <mach/chip.h>
 
 #include "clock.h"
 
+/* at32 clock list */
+static LIST_HEAD(at32_clock_list);
+
 static DEFINE_SPINLOCK(clk_lock);
+static DEFINE_SPINLOCK(clk_list_lock);
+
+void at32_clk_register(struct clk *clk)
+{
+        spin_lock(&clk_list_lock);
+        /* add the new item to the end of the list */
+        list_add_tail(&clk->list, &at32_clock_list);
+        spin_unlock(&clk_list_lock);
+}
 
 struct clk *clk_get(struct device *dev, const char *id)
 {
-        int i;
+        struct clk *clk;
 
-        for (i = 0; i < at32_nr_clocks; i++) {
-                struct clk *clk = at32_clock_list[i];
+        spin_lock(&clk_list_lock);
 
-                if (clk->dev == dev && strcmp(id, clk->name) == 0)
+        list_for_each_entry(clk, &at32_clock_list, list) {
+                if (clk->dev == dev && strcmp(id, clk->name) == 0) {
+                        spin_unlock(&clk_list_lock);
                         return clk;
+                }
         }
 
+        spin_unlock(&clk_list_lock);
         return ERR_PTR(-ENOENT);
 }
 EXPORT_SYMBOL(clk_get);
@@ -203,8 +219,8 @@ dump_clock(struct clk *parent, struct clkinf *r)
 
         /* cost of this scan is small, but not linear... */
         r->nest = nest + NEST_DELTA;
-        for (i = 3; i < at32_nr_clocks; i++) {
-                clk = at32_clock_list[i];
+
+        list_for_each_entry(clk, &at32_clock_list, list) {
                 if (clk->parent == parent)
                         dump_clock(clk, r);
         }
@@ -215,6 +231,7 @@ static int clk_show(struct seq_file *s, void *unused)
 {
         struct clkinf   r;
         int             i;
+        struct clk      *clk;
 
         /* show all the power manager registers */
         seq_printf(s, "MCCTRL  = %8x\n", pm_readl(MCCTRL));
@@ -234,14 +251,25 @@ static int clk_show(struct seq_file *s, void *unused)
 
         seq_printf(s, "\n");
 
-        /* show clock tree as derived from the three oscillators
-         * we "know" are at the head of the list
-         */
         r.s = s;
         r.nest = 0;
-        dump_clock(at32_clock_list[0], &r);
-        dump_clock(at32_clock_list[1], &r);
-        dump_clock(at32_clock_list[2], &r);
+        /* protected from changes on the list while dumping */
+        spin_lock(&clk_list_lock);
+
+        /* show clock tree as derived from the three oscillators */
+        clk = clk_get(NULL, "osc32k");
+        dump_clock(clk, &r);
+        clk_put(clk);
+
+        clk = clk_get(NULL, "osc0");
+        dump_clock(clk, &r);
+        clk_put(clk);
+
+        clk = clk_get(NULL, "osc1");
+        dump_clock(clk, &r);
+        clk_put(clk);
+
+        spin_unlock(&clk_list_lock);
 
         return 0;
 }
diff --git a/arch/avr32/mach-at32ap/clock.h b/arch/avr32/mach-at32ap/clock.h
index bb8e1f295835..623bf0e9a1e7 100644
--- a/arch/avr32/mach-at32ap/clock.h
+++ b/arch/avr32/mach-at32ap/clock.h
@@ -12,8 +12,13 @@
  * published by the Free Software Foundation.
  */
 #include <linux/clk.h>
+#include <linux/list.h>
+
+
+void at32_clk_register(struct clk *clk);
 
 struct clk {
+        struct list_head list;          /* linking element */
         const char      *name;          /* Clock name/function */
         struct device   *dev;           /* Device the clock is used by */
         struct clk      *parent;        /* Parent clock, if any */
@@ -25,6 +30,3 @@ struct clk {
         u16             users;          /* Enabled if non-zero */
         u16             index;          /* Sibling index */
 };
-
-extern struct clk *at32_clock_list[];
-extern unsigned int at32_nr_clocks;
diff --git a/arch/avr32/mach-at32ap/include/mach/at32ap700x.h b/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
index 1e9852d65cca..a77d372f6f3e 100644
--- a/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
+++ b/arch/avr32/mach-at32ap/include/mach/at32ap700x.h
@@ -83,4 +83,132 @@
 #define HMATRIX_BASE    0xfff00800
 #define SDRAMC_BASE     0xfff03800
 
+/* LCDC on port C */
+#define ATMEL_LCDC_PC_CC        (1ULL << 19)
+#define ATMEL_LCDC_PC_HSYNC     (1ULL << 20)
+#define ATMEL_LCDC_PC_PCLK      (1ULL << 21)
+#define ATMEL_LCDC_PC_VSYNC     (1ULL << 22)
+#define ATMEL_LCDC_PC_DVAL      (1ULL << 23)
+#define ATMEL_LCDC_PC_MODE      (1ULL << 24)
+#define ATMEL_LCDC_PC_PWR       (1ULL << 25)
+#define ATMEL_LCDC_PC_DATA0     (1ULL << 26)
+#define ATMEL_LCDC_PC_DATA1     (1ULL << 27)
+#define ATMEL_LCDC_PC_DATA2     (1ULL << 28)
+#define ATMEL_LCDC_PC_DATA3     (1ULL << 29)
+#define ATMEL_LCDC_PC_DATA4     (1ULL << 30)
+#define ATMEL_LCDC_PC_DATA5     (1ULL << 31)
+
+/* LCDC on port D */
+#define ATMEL_LCDC_PD_DATA6     (1ULL << 0)
+#define ATMEL_LCDC_PD_DATA7     (1ULL << 1)
+#define ATMEL_LCDC_PD_DATA8     (1ULL << 2)
+#define ATMEL_LCDC_PD_DATA9     (1ULL << 3)
+#define ATMEL_LCDC_PD_DATA10    (1ULL << 4)
+#define ATMEL_LCDC_PD_DATA11    (1ULL << 5)
+#define ATMEL_LCDC_PD_DATA12    (1ULL << 6)
+#define ATMEL_LCDC_PD_DATA13    (1ULL << 7)
+#define ATMEL_LCDC_PD_DATA14    (1ULL << 8)
+#define ATMEL_LCDC_PD_DATA15    (1ULL << 9)
+#define ATMEL_LCDC_PD_DATA16    (1ULL << 10)
+#define ATMEL_LCDC_PD_DATA17    (1ULL << 11)
+#define ATMEL_LCDC_PD_DATA18    (1ULL << 12)
+#define ATMEL_LCDC_PD_DATA19    (1ULL << 13)
+#define ATMEL_LCDC_PD_DATA20    (1ULL << 14)
+#define ATMEL_LCDC_PD_DATA21    (1ULL << 15)
+#define ATMEL_LCDC_PD_DATA22    (1ULL << 16)
+#define ATMEL_LCDC_PD_DATA23    (1ULL << 17)
+
+/* LCDC on port E */
+#define ATMEL_LCDC_PE_CC        (1ULL << (32 + 0))
+#define ATMEL_LCDC_PE_DVAL      (1ULL << (32 + 1))
+#define ATMEL_LCDC_PE_MODE      (1ULL << (32 + 2))
+#define ATMEL_LCDC_PE_DATA0     (1ULL << (32 + 3))
+#define ATMEL_LCDC_PE_DATA1     (1ULL << (32 + 4))
+#define ATMEL_LCDC_PE_DATA2     (1ULL << (32 + 5))
+#define ATMEL_LCDC_PE_DATA3     (1ULL << (32 + 6))
+#define ATMEL_LCDC_PE_DATA4     (1ULL << (32 + 7))
+#define ATMEL_LCDC_PE_DATA8     (1ULL << (32 + 8))
+#define ATMEL_LCDC_PE_DATA9     (1ULL << (32 + 9))
+#define ATMEL_LCDC_PE_DATA10    (1ULL << (32 + 10))
+#define ATMEL_LCDC_PE_DATA11    (1ULL << (32 + 11))
+#define ATMEL_LCDC_PE_DATA12    (1ULL << (32 + 12))
+#define ATMEL_LCDC_PE_DATA16    (1ULL << (32 + 13))
+#define ATMEL_LCDC_PE_DATA17    (1ULL << (32 + 14))
+#define ATMEL_LCDC_PE_DATA18    (1ULL << (32 + 15))
+#define ATMEL_LCDC_PE_DATA19    (1ULL << (32 + 16))
+#define ATMEL_LCDC_PE_DATA20    (1ULL << (32 + 17))
+#define ATMEL_LCDC_PE_DATA21    (1ULL << (32 + 18))
+
+
+#define ATMEL_LCDC(PORT, PIN)   (ATMEL_LCDC_##PORT##_##PIN)
+
+
+#define ATMEL_LCDC_PRI_24B_DATA (                                       \
+                ATMEL_LCDC(PC, DATA0)  | ATMEL_LCDC(PC, DATA1)  |       \
+                ATMEL_LCDC(PC, DATA2)  | ATMEL_LCDC(PC, DATA3)  |       \
+                ATMEL_LCDC(PC, DATA4)  | ATMEL_LCDC(PC, DATA5)  |       \
+                ATMEL_LCDC(PD, DATA6)  | ATMEL_LCDC(PD, DATA7)  |       \
+                ATMEL_LCDC(PD, DATA8)  | ATMEL_LCDC(PD, DATA9)  |       \
+                ATMEL_LCDC(PD, DATA10) | ATMEL_LCDC(PD, DATA11) |       \
+                ATMEL_LCDC(PD, DATA12) | ATMEL_LCDC(PD, DATA13) |       \
+                ATMEL_LCDC(PD, DATA14) | ATMEL_LCDC(PD, DATA15) |       \
+                ATMEL_LCDC(PD, DATA16) | ATMEL_LCDC(PD, DATA17) |       \
+                ATMEL_LCDC(PD, DATA18) | ATMEL_LCDC(PD, DATA19) |       \
+                ATMEL_LCDC(PD, DATA20) | ATMEL_LCDC(PD, DATA21) |       \
+                ATMEL_LCDC(PD, DATA22) | ATMEL_LCDC(PD, DATA23))
+
+#define ATMEL_LCDC_ALT_24B_DATA (                                       \
+                ATMEL_LCDC(PE, DATA0)  | ATMEL_LCDC(PE, DATA1)  |       \
+                ATMEL_LCDC(PE, DATA2)  | ATMEL_LCDC(PE, DATA3)  |       \
+                ATMEL_LCDC(PE, DATA4)  | ATMEL_LCDC(PC, DATA5)  |       \
+                ATMEL_LCDC(PD, DATA6)  | ATMEL_LCDC(PD, DATA7)  |       \
+                ATMEL_LCDC(PE, DATA8)  | ATMEL_LCDC(PE, DATA9)  |       \
+                ATMEL_LCDC(PE, DATA10) | ATMEL_LCDC(PE, DATA11) |       \
+                ATMEL_LCDC(PE, DATA12) | ATMEL_LCDC(PD, DATA13) |       \
+                ATMEL_LCDC(PD, DATA14) | ATMEL_LCDC(PD, DATA15) |       \
+                ATMEL_LCDC(PE, DATA16) | ATMEL_LCDC(PE, DATA17) |       \
+                ATMEL_LCDC(PE, DATA18) | ATMEL_LCDC(PE, DATA19) |       \
+                ATMEL_LCDC(PE, DATA20) | ATMEL_LCDC(PE, DATA21) |       \
+                ATMEL_LCDC(PD, DATA22) | ATMEL_LCDC(PD, DATA23))
+
+#define ATMEL_LCDC_PRI_15B_DATA (                                       \
+                ATMEL_LCDC(PC, DATA0)  | ATMEL_LCDC(PC, DATA1)  |       \
+                ATMEL_LCDC(PC, DATA2)  | ATMEL_LCDC(PC, DATA3)  |       \
+                ATMEL_LCDC(PC, DATA4)  | ATMEL_LCDC(PC, DATA5)  |       \
+                ATMEL_LCDC(PD, DATA8)  | ATMEL_LCDC(PD, DATA9)  |       \
+                ATMEL_LCDC(PD, DATA10) | ATMEL_LCDC(PD, DATA11) |       \
+                ATMEL_LCDC(PD, DATA12) | ATMEL_LCDC(PD, DATA16) |       \
+                ATMEL_LCDC(PD, DATA17) | ATMEL_LCDC(PD, DATA18) |       \
+                ATMEL_LCDC(PD, DATA19) | ATMEL_LCDC(PD, DATA20))
+
+#define ATMEL_LCDC_ALT_15B_DATA (                                       \
+                ATMEL_LCDC(PE, DATA0)  | ATMEL_LCDC(PE, DATA1)  |       \
+                ATMEL_LCDC(PE, DATA2)  | ATMEL_LCDC(PE, DATA3)  |       \
+                ATMEL_LCDC(PE, DATA4)  | ATMEL_LCDC(PC, DATA5)  |       \
+                ATMEL_LCDC(PE, DATA8)  | ATMEL_LCDC(PE, DATA9)  |       \
+                ATMEL_LCDC(PE, DATA10) | ATMEL_LCDC(PE, DATA11) |       \
+                ATMEL_LCDC(PE, DATA12) | ATMEL_LCDC(PE, DATA16) |       \
+                ATMEL_LCDC(PE, DATA17) | ATMEL_LCDC(PE, DATA18) |       \
+                ATMEL_LCDC(PE, DATA19) | ATMEL_LCDC(PE, DATA20))
+
+#define ATMEL_LCDC_PRI_CONTROL (                                        \
+                ATMEL_LCDC(PC, CC)   | ATMEL_LCDC(PC, DVAL) |           \
+                ATMEL_LCDC(PC, MODE) | ATMEL_LCDC(PC, PWR))
+
+#define ATMEL_LCDC_ALT_CONTROL (                                        \
+                ATMEL_LCDC(PE, CC)   | ATMEL_LCDC(PE, DVAL) |           \
+                ATMEL_LCDC(PE, MODE) | ATMEL_LCDC(PC, PWR))
+
+#define ATMEL_LCDC_CONTROL (                                            \
+                ATMEL_LCDC(PC, HSYNC) | ATMEL_LCDC(PC, VSYNC) |         \
+                ATMEL_LCDC(PC, PCLK))
+
+#define ATMEL_LCDC_PRI_24BIT    (ATMEL_LCDC_CONTROL | ATMEL_LCDC_PRI_24B_DATA)
+
+#define ATMEL_LCDC_ALT_24BIT    (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_24B_DATA)
+
+#define ATMEL_LCDC_PRI_15BIT    (ATMEL_LCDC_CONTROL | ATMEL_LCDC_PRI_15B_DATA)
+
+#define ATMEL_LCDC_ALT_15BIT    (ATMEL_LCDC_CONTROL | ATMEL_LCDC_ALT_15B_DATA)
+
 #endif /* __ASM_ARCH_AT32AP700X_H__ */
diff --git a/arch/avr32/mach-at32ap/include/mach/board.h b/arch/avr32/mach-at32ap/include/mach/board.h
index e60e9076544d..c48386d66bc3 100644
--- a/arch/avr32/mach-at32ap/include/mach/board.h
+++ b/arch/avr32/mach-at32ap/include/mach/board.h
@@ -43,7 +43,7 @@ struct atmel_lcdfb_info;
 struct platform_device *
 at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
                      unsigned long fbmem_start, unsigned long fbmem_len,
-                     unsigned int pin_config);
+                     u64 pin_mask);
 
 struct usba_platform_data;
 struct platform_device *
diff --git a/arch/avr32/mach-at32ap/include/mach/io.h b/arch/avr32/mach-at32ap/include/mach/io.h
index 4ec6abc68ea3..22ea79b74052 100644
--- a/arch/avr32/mach-at32ap/include/mach/io.h
+++ b/arch/avr32/mach-at32ap/include/mach/io.h
@@ -1,8 +1,7 @@
 #ifndef __ASM_AVR32_ARCH_AT32AP_IO_H
 #define __ASM_AVR32_ARCH_AT32AP_IO_H
 
-/* For "bizarre" halfword swapping */
-#include <linux/byteorder/swabb.h>
+#include <linux/swab.h>
 
 #if defined(CONFIG_AP700X_32_BIT_SMC)
 # define __swizzle_addr_b(addr) (addr ^ 3UL)
diff --git a/arch/avr32/mach-at32ap/include/mach/portmux.h b/arch/avr32/mach-at32ap/include/mach/portmux.h
index b1abe6b4e4ef..4bbf99ec2c43 100644
--- a/arch/avr32/mach-at32ap/include/mach/portmux.h
+++ b/arch/avr32/mach-at32ap/include/mach/portmux.h
@@ -24,6 +24,7 @@
 void at32_select_periph(unsigned int pin, unsigned int periph,
                         unsigned long flags);
 void at32_select_gpio(unsigned int pin, unsigned long flags);
+void at32_deselect_pin(unsigned int pin);
 void at32_reserve_pin(unsigned int pin);
 
 #endif /* __ASM_ARCH_PORTMUX_H__ */
diff --git a/arch/avr32/mach-at32ap/pdc.c b/arch/avr32/mach-at32ap/pdc.c
index 1040bda4fda7..61ab15aae970 100644
--- a/arch/avr32/mach-at32ap/pdc.c
+++ b/arch/avr32/mach-at32ap/pdc.c
@@ -35,7 +35,6 @@ static int __init pdc_probe(struct platform_device *pdev)
 }
 
 static struct platform_driver pdc_driver = {
-        .probe          = pdc_probe,
         .driver         = {
                 .name   = "pdc",
         },
@@ -43,6 +42,6 @@ static struct platform_driver pdc_driver = {
 
 static int __init pdc_init(void)
 {
-        return platform_driver_register(&pdc_driver);
+        return platform_driver_probe(&pdc_driver, pdc_probe);
 }
 arch_initcall(pdc_init);
diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c
index 405ee6bad4ce..ef2561e15399 100644
--- a/arch/avr32/mach-at32ap/pio.c
+++ b/arch/avr32/mach-at32ap/pio.c
@@ -134,6 +134,25 @@ fail:
         dump_stack();
 }
 
+/*
+ * Undo a previous pin reservation. Will not affect the hardware
+ * configuration.
+ */
+void at32_deselect_pin(unsigned int pin)
+{
+        struct pio_device *pio;
+        unsigned int pin_index = pin & 0x1f;
+
+        pio = gpio_to_pio(pin);
+        if (unlikely(!pio)) {
+                printk("pio: invalid pin %u\n", pin);
+                dump_stack();
+                return;
+        }
+
+        clear_bit(pin_index, &pio->pinmux_mask);
+}
+
 /* Reserve a pin, preventing anyone else from changing its configuration. */
 void __init at32_reserve_pin(unsigned int pin)
 {
@@ -382,7 +401,6 @@ static int __init pio_probe(struct platform_device *pdev)
 }
 
 static struct platform_driver pio_driver = {
-        .probe          = pio_probe,
         .driver         = {
                 .name           = "pio",
         },
@@ -390,7 +408,7 @@ static struct platform_driver pio_driver = {
 
 static int __init pio_init(void)
 {
-        return platform_driver_register(&pio_driver);
+        return platform_driver_probe(&pio_driver, pio_probe);
 }
 postcore_initcall(pio_init);