diff options
Diffstat (limited to 'arch/avr32/mach-at32ap/include')
-rw-r--r-- | arch/avr32/mach-at32ap/include/mach/at32ap700x.h | 29 | ||||
-rw-r--r-- | arch/avr32/mach-at32ap/include/mach/hmatrix.h | 55 |
2 files changed, 84 insertions, 0 deletions
diff --git a/arch/avr32/mach-at32ap/include/mach/at32ap700x.h b/arch/avr32/mach-at32ap/include/mach/at32ap700x.h index 31b44e13ec32..1e9852d65cca 100644 --- a/arch/avr32/mach-at32ap/include/mach/at32ap700x.h +++ b/arch/avr32/mach-at32ap/include/mach/at32ap700x.h | |||
@@ -46,6 +46,35 @@ | |||
46 | #define DMAC_DMAREQ_2 9 | 46 | #define DMAC_DMAREQ_2 9 |
47 | #define DMAC_DMAREQ_3 10 | 47 | #define DMAC_DMAREQ_3 10 |
48 | 48 | ||
49 | /* HSB master IDs */ | ||
50 | #define HMATRIX_MASTER_CPU_DCACHE 0 | ||
51 | #define HMATRIX_MASTER_CPU_ICACHE 1 | ||
52 | #define HMATRIX_MASTER_PDC 2 | ||
53 | #define HMATRIX_MASTER_ISI 3 | ||
54 | #define HMATRIX_MASTER_USBA 4 | ||
55 | #define HMATRIX_MASTER_LCDC 5 | ||
56 | #define HMATRIX_MASTER_MACB0 6 | ||
57 | #define HMATRIX_MASTER_MACB1 7 | ||
58 | #define HMATRIX_MASTER_DMACA_M0 8 | ||
59 | #define HMATRIX_MASTER_DMACA_M1 9 | ||
60 | |||
61 | /* HSB slave IDs */ | ||
62 | #define HMATRIX_SLAVE_SRAM0 0 | ||
63 | #define HMATRIX_SLAVE_SRAM1 1 | ||
64 | #define HMATRIX_SLAVE_PBA 2 | ||
65 | #define HMATRIX_SLAVE_PBB 3 | ||
66 | #define HMATRIX_SLAVE_EBI 4 | ||
67 | #define HMATRIX_SLAVE_USBA 5 | ||
68 | #define HMATRIX_SLAVE_LCDC 6 | ||
69 | #define HMATRIX_SLAVE_DMACA 7 | ||
70 | |||
71 | /* Bits in HMATRIX SFR4 (EBI) */ | ||
72 | #define HMATRIX_EBI_SDRAM_ENABLE (1 << 1) | ||
73 | #define HMATRIX_EBI_NAND_ENABLE (1 << 3) | ||
74 | #define HMATRIX_EBI_CF0_ENABLE (1 << 4) | ||
75 | #define HMATRIX_EBI_CF1_ENABLE (1 << 5) | ||
76 | #define HMATRIX_EBI_PULLUP_DISABLE (1 << 8) | ||
77 | |||
49 | /* | 78 | /* |
50 | * Base addresses of controllers that may be accessed early by | 79 | * Base addresses of controllers that may be accessed early by |
51 | * platform code. | 80 | * platform code. |
diff --git a/arch/avr32/mach-at32ap/include/mach/hmatrix.h b/arch/avr32/mach-at32ap/include/mach/hmatrix.h new file mode 100644 index 000000000000..7a368f227ebc --- /dev/null +++ b/arch/avr32/mach-at32ap/include/mach/hmatrix.h | |||
@@ -0,0 +1,55 @@ | |||
1 | /* | ||
2 | * High-Speed Bus Matrix configuration registers | ||
3 | * | ||
4 | * Copyright (C) 2008 Atmel Corporation | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #ifndef __HMATRIX_H | ||
11 | #define __HMATRIX_H | ||
12 | |||
13 | extern struct clk at32_hmatrix_clk; | ||
14 | |||
15 | void hmatrix_write_reg(unsigned long offset, u32 value); | ||
16 | u32 hmatrix_read_reg(unsigned long offset); | ||
17 | |||
18 | void hmatrix_sfr_set_bits(unsigned int slave_id, u32 mask); | ||
19 | void hmatrix_sfr_clear_bits(unsigned int slave_id, u32 mask); | ||
20 | |||
21 | /* Master Configuration register */ | ||
22 | #define HMATRIX_MCFG(m) (0x0000 + 4 * (m)) | ||
23 | /* Undefined length burst limit */ | ||
24 | # define HMATRIX_MCFG_ULBT_INFINITE 0 /* Infinite length */ | ||
25 | # define HMATRIX_MCFG_ULBT_SINGLE 1 /* Single Access */ | ||
26 | # define HMATRIX_MCFG_ULBT_FOUR_BEAT 2 /* Four beat */ | ||
27 | # define HMATRIX_MCFG_ULBT_EIGHT_BEAT 3 /* Eight beat */ | ||
28 | # define HMATRIX_MCFG_ULBT_SIXTEEN_BEAT 4 /* Sixteen beat */ | ||
29 | |||
30 | /* Slave Configuration register */ | ||
31 | #define HMATRIX_SCFG(s) (0x0040 + 4 * (s)) | ||
32 | # define HMATRIX_SCFG_SLOT_CYCLE(x) ((x) << 0) /* Max burst cycles */ | ||
33 | # define HMATRIX_SCFG_DEFMSTR_NONE ( 0 << 16) /* No default master */ | ||
34 | # define HMATRIX_SCFG_DEFMSTR_LAST ( 1 << 16) /* Last def master */ | ||
35 | # define HMATRIX_SCFG_DEFMSTR_FIXED ( 2 << 16) /* Fixed def master */ | ||
36 | # define HMATRIX_SCFG_FIXED_DEFMSTR(m) ((m) << 18) /* Fixed master ID */ | ||
37 | # define HMATRIX_SCFG_ARBT_ROUND_ROBIN ( 0 << 24) /* RR arbitration */ | ||
38 | # define HMATRIX_SCFG_ARBT_FIXED_PRIO ( 1 << 24) /* Fixed priority */ | ||
39 | |||
40 | /* Slave Priority register A (master 0..7) */ | ||
41 | #define HMATRIX_PRAS(s) (0x0080 + 8 * (s)) | ||
42 | # define HMATRIX_PRAS_PRIO(m, p) ((p) << ((m) * 4)) | ||
43 | |||
44 | /* Slave Priority register A (master 8..15) */ | ||
45 | #define HMATRIX_PRBS(s) (0x0084 + 8 * (s)) | ||
46 | # define HMATRIX_PRBS_PRIO(m, p) ((p) << (((m) - 8) * 4)) | ||
47 | |||
48 | /* Master Remap Control Register */ | ||
49 | #define HMATRIX_MRCR 0x0100 | ||
50 | # define HMATRIX_MRCR_REMAP(m) ( 1 << (m)) /* Remap master m */ | ||
51 | |||
52 | /* Special Function Register. Bit definitions are chip-specific */ | ||
53 | #define HMATRIX_SFR(s) (0x0110 + 4 * (s)) | ||
54 | |||
55 | #endif /* __HMATRIX_H */ | ||