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Diffstat (limited to 'arch/avr32/mach-at32ap/at32ap700x.c')
-rw-r--r--arch/avr32/mach-at32ap/at32ap700x.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
index e67c99945428..bfc9d071db9b 100644
--- a/arch/avr32/mach-at32ap/at32ap700x.c
+++ b/arch/avr32/mach-at32ap/at32ap700x.c
@@ -2048,6 +2048,11 @@ at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data,
2048 rx_dws->reg_width = DW_DMA_SLAVE_WIDTH_16BIT; 2048 rx_dws->reg_width = DW_DMA_SLAVE_WIDTH_16BIT;
2049 rx_dws->cfg_hi = DWC_CFGH_SRC_PER(3); 2049 rx_dws->cfg_hi = DWC_CFGH_SRC_PER(3);
2050 rx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL); 2050 rx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
2051 rx_dws->src_master = 0;
2052 rx_dws->dst_master = 1;
2053 rx_dws->src_msize = DW_DMA_MSIZE_1;
2054 rx_dws->dst_msize = DW_DMA_MSIZE_1;
2055 rx_dws->fc = DW_DMA_FC_D_P2M;
2051 } 2056 }
2052 2057
2053 /* Check if DMA slave interface for playback should be configured. */ 2058 /* Check if DMA slave interface for playback should be configured. */
@@ -2056,6 +2061,11 @@ at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data,
2056 tx_dws->reg_width = DW_DMA_SLAVE_WIDTH_16BIT; 2061 tx_dws->reg_width = DW_DMA_SLAVE_WIDTH_16BIT;
2057 tx_dws->cfg_hi = DWC_CFGH_DST_PER(4); 2062 tx_dws->cfg_hi = DWC_CFGH_DST_PER(4);
2058 tx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL); 2063 tx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
2064 tx_dws->src_master = 0;
2065 tx_dws->dst_master = 1;
2066 tx_dws->src_msize = DW_DMA_MSIZE_1;
2067 tx_dws->dst_msize = DW_DMA_MSIZE_1;
2068 tx_dws->fc = DW_DMA_FC_D_M2P;
2059 } 2069 }
2060 2070
2061 if (platform_device_add_data(pdev, data, 2071 if (platform_device_add_data(pdev, data,
@@ -2128,6 +2138,11 @@ at32_add_device_abdac(unsigned int id, struct atmel_abdac_pdata *data)
2128 dws->reg_width = DW_DMA_SLAVE_WIDTH_32BIT; 2138 dws->reg_width = DW_DMA_SLAVE_WIDTH_32BIT;
2129 dws->cfg_hi = DWC_CFGH_DST_PER(2); 2139 dws->cfg_hi = DWC_CFGH_DST_PER(2);
2130 dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL); 2140 dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
2141 dws->src_master = 0;
2142 dws->dst_master = 1;
2143 dws->src_msize = DW_DMA_MSIZE_1;
2144 dws->dst_msize = DW_DMA_MSIZE_1;
2145 dws->fc = DW_DMA_FC_D_M2P;
2131 2146
2132 if (platform_device_add_data(pdev, data, 2147 if (platform_device_add_data(pdev, data,
2133 sizeof(struct atmel_abdac_pdata))) 2148 sizeof(struct atmel_abdac_pdata)))