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Diffstat (limited to 'arch/avr32/mach-at32ap/at32ap700x.c')
-rw-r--r--arch/avr32/mach-at32ap/at32ap700x.c460
1 files changed, 261 insertions, 199 deletions
diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c
index e01dbe4ebb40..813b6844cdf6 100644
--- a/arch/avr32/mach-at32ap/at32ap700x.c
+++ b/arch/avr32/mach-at32ap/at32ap700x.c
@@ -82,8 +82,9 @@ static struct platform_device _name##_id##_device = { \
82 .num_resources = ARRAY_SIZE(_name##_id##_resource), \ 82 .num_resources = ARRAY_SIZE(_name##_id##_resource), \
83} 83}
84 84
85#define select_peripheral(pin, periph, flags) \ 85#define select_peripheral(port, pin_mask, periph, flags) \
86 at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags) 86 at32_select_periph(GPIO_##port##_BASE, pin_mask, \
87 GPIO_##periph, flags)
87 88
88#define DEV_CLK(_name, devname, bus, _index) \ 89#define DEV_CLK(_name, devname, bus, _index) \
89static struct clk devname##_##_name = { \ 90static struct clk devname##_##_name = { \
@@ -871,6 +872,7 @@ static struct clk atmel_psif1_pclk = {
871struct platform_device *__init at32_add_device_psif(unsigned int id) 872struct platform_device *__init at32_add_device_psif(unsigned int id)
872{ 873{
873 struct platform_device *pdev; 874 struct platform_device *pdev;
875 u32 pin_mask;
874 876
875 if (!(id == 0 || id == 1)) 877 if (!(id == 0 || id == 1))
876 return NULL; 878 return NULL;
@@ -881,20 +883,22 @@ struct platform_device *__init at32_add_device_psif(unsigned int id)
881 883
882 switch (id) { 884 switch (id) {
883 case 0: 885 case 0:
886 pin_mask = (1 << 8) | (1 << 9); /* CLOCK & DATA */
887
884 if (platform_device_add_resources(pdev, atmel_psif0_resource, 888 if (platform_device_add_resources(pdev, atmel_psif0_resource,
885 ARRAY_SIZE(atmel_psif0_resource))) 889 ARRAY_SIZE(atmel_psif0_resource)))
886 goto err_add_resources; 890 goto err_add_resources;
887 atmel_psif0_pclk.dev = &pdev->dev; 891 atmel_psif0_pclk.dev = &pdev->dev;
888 select_peripheral(PA(8), PERIPH_A, 0); /* CLOCK */ 892 select_peripheral(PIOA, pin_mask, PERIPH_A, 0);
889 select_peripheral(PA(9), PERIPH_A, 0); /* DATA */
890 break; 893 break;
891 case 1: 894 case 1:
895 pin_mask = (1 << 11) | (1 << 12); /* CLOCK & DATA */
896
892 if (platform_device_add_resources(pdev, atmel_psif1_resource, 897 if (platform_device_add_resources(pdev, atmel_psif1_resource,
893 ARRAY_SIZE(atmel_psif1_resource))) 898 ARRAY_SIZE(atmel_psif1_resource)))
894 goto err_add_resources; 899 goto err_add_resources;
895 atmel_psif1_pclk.dev = &pdev->dev; 900 atmel_psif1_pclk.dev = &pdev->dev;
896 select_peripheral(PB(11), PERIPH_A, 0); /* CLOCK */ 901 select_peripheral(PIOB, pin_mask, PERIPH_A, 0);
897 select_peripheral(PB(12), PERIPH_A, 0); /* DATA */
898 break; 902 break;
899 default: 903 default:
900 return NULL; 904 return NULL;
@@ -958,26 +962,30 @@ DEV_CLK(usart, atmel_usart3, pba, 6);
958 962
959static inline void configure_usart0_pins(void) 963static inline void configure_usart0_pins(void)
960{ 964{
961 select_peripheral(PA(8), PERIPH_B, 0); /* RXD */ 965 u32 pin_mask = (1 << 8) | (1 << 9); /* RXD & TXD */
962 select_peripheral(PA(9), PERIPH_B, 0); /* TXD */ 966
967 select_peripheral(PIOA, pin_mask, PERIPH_B, 0);
963} 968}
964 969
965static inline void configure_usart1_pins(void) 970static inline void configure_usart1_pins(void)
966{ 971{
967 select_peripheral(PA(17), PERIPH_A, 0); /* RXD */ 972 u32 pin_mask = (1 << 17) | (1 << 18); /* RXD & TXD */
968 select_peripheral(PA(18), PERIPH_A, 0); /* TXD */ 973
974 select_peripheral(PIOA, pin_mask, PERIPH_A, 0);
969} 975}
970 976
971static inline void configure_usart2_pins(void) 977static inline void configure_usart2_pins(void)
972{ 978{
973 select_peripheral(PB(26), PERIPH_B, 0); /* RXD */ 979 u32 pin_mask = (1 << 26) | (1 << 27); /* RXD & TXD */
974 select_peripheral(PB(27), PERIPH_B, 0); /* TXD */ 980
981 select_peripheral(PIOB, pin_mask, PERIPH_B, 0);
975} 982}
976 983
977static inline void configure_usart3_pins(void) 984static inline void configure_usart3_pins(void)
978{ 985{
979 select_peripheral(PB(18), PERIPH_B, 0); /* RXD */ 986 u32 pin_mask = (1 << 18) | (1 << 17); /* RXD & TXD */
980 select_peripheral(PB(17), PERIPH_B, 0); /* TXD */ 987
988 select_peripheral(PIOB, pin_mask, PERIPH_B, 0);
981} 989}
982 990
983static struct platform_device *__initdata at32_usarts[4]; 991static struct platform_device *__initdata at32_usarts[4];
@@ -1057,59 +1065,69 @@ struct platform_device *__init
1057at32_add_device_eth(unsigned int id, struct eth_platform_data *data) 1065at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
1058{ 1066{
1059 struct platform_device *pdev; 1067 struct platform_device *pdev;
1068 u32 pin_mask;
1060 1069
1061 switch (id) { 1070 switch (id) {
1062 case 0: 1071 case 0:
1063 pdev = &macb0_device; 1072 pdev = &macb0_device;
1064 1073
1065 select_peripheral(PC(3), PERIPH_A, 0); /* TXD0 */ 1074 pin_mask = (1 << 3); /* TXD0 */
1066 select_peripheral(PC(4), PERIPH_A, 0); /* TXD1 */ 1075 pin_mask |= (1 << 4); /* TXD1 */
1067 select_peripheral(PC(7), PERIPH_A, 0); /* TXEN */ 1076 pin_mask |= (1 << 7); /* TXEN */
1068 select_peripheral(PC(8), PERIPH_A, 0); /* TXCK */ 1077 pin_mask |= (1 << 8); /* TXCK */
1069 select_peripheral(PC(9), PERIPH_A, 0); /* RXD0 */ 1078 pin_mask |= (1 << 9); /* RXD0 */
1070 select_peripheral(PC(10), PERIPH_A, 0); /* RXD1 */ 1079 pin_mask |= (1 << 10); /* RXD1 */
1071 select_peripheral(PC(13), PERIPH_A, 0); /* RXER */ 1080 pin_mask |= (1 << 13); /* RXER */
1072 select_peripheral(PC(15), PERIPH_A, 0); /* RXDV */ 1081 pin_mask |= (1 << 15); /* RXDV */
1073 select_peripheral(PC(16), PERIPH_A, 0); /* MDC */ 1082 pin_mask |= (1 << 16); /* MDC */
1074 select_peripheral(PC(17), PERIPH_A, 0); /* MDIO */ 1083 pin_mask |= (1 << 17); /* MDIO */
1075 1084
1076 if (!data->is_rmii) { 1085 if (!data->is_rmii) {
1077 select_peripheral(PC(0), PERIPH_A, 0); /* COL */ 1086 pin_mask |= (1 << 0); /* COL */
1078 select_peripheral(PC(1), PERIPH_A, 0); /* CRS */ 1087 pin_mask |= (1 << 1); /* CRS */
1079 select_peripheral(PC(2), PERIPH_A, 0); /* TXER */ 1088 pin_mask |= (1 << 2); /* TXER */
1080 select_peripheral(PC(5), PERIPH_A, 0); /* TXD2 */ 1089 pin_mask |= (1 << 5); /* TXD2 */
1081 select_peripheral(PC(6), PERIPH_A, 0); /* TXD3 */ 1090 pin_mask |= (1 << 6); /* TXD3 */
1082 select_peripheral(PC(11), PERIPH_A, 0); /* RXD2 */ 1091 pin_mask |= (1 << 11); /* RXD2 */
1083 select_peripheral(PC(12), PERIPH_A, 0); /* RXD3 */ 1092 pin_mask |= (1 << 12); /* RXD3 */
1084 select_peripheral(PC(14), PERIPH_A, 0); /* RXCK */ 1093 pin_mask |= (1 << 14); /* RXCK */
1085 select_peripheral(PC(18), PERIPH_A, 0); /* SPD */ 1094 pin_mask |= (1 << 18); /* SPD */
1086 } 1095 }
1096
1097 select_peripheral(PIOC, pin_mask, PERIPH_A, 0);
1098
1087 break; 1099 break;
1088 1100
1089 case 1: 1101 case 1:
1090 pdev = &macb1_device; 1102 pdev = &macb1_device;
1091 1103
1092 select_peripheral(PD(13), PERIPH_B, 0); /* TXD0 */ 1104 pin_mask = (1 << 13); /* TXD0 */
1093 select_peripheral(PD(14), PERIPH_B, 0); /* TXD1 */ 1105 pin_mask |= (1 << 14); /* TXD1 */
1094 select_peripheral(PD(11), PERIPH_B, 0); /* TXEN */ 1106 pin_mask |= (1 << 11); /* TXEN */
1095 select_peripheral(PD(12), PERIPH_B, 0); /* TXCK */ 1107 pin_mask |= (1 << 12); /* TXCK */
1096 select_peripheral(PD(10), PERIPH_B, 0); /* RXD0 */ 1108 pin_mask |= (1 << 10); /* RXD0 */
1097 select_peripheral(PD(6), PERIPH_B, 0); /* RXD1 */ 1109 pin_mask |= (1 << 6); /* RXD1 */
1098 select_peripheral(PD(5), PERIPH_B, 0); /* RXER */ 1110 pin_mask |= (1 << 5); /* RXER */
1099 select_peripheral(PD(4), PERIPH_B, 0); /* RXDV */ 1111 pin_mask |= (1 << 4); /* RXDV */
1100 select_peripheral(PD(3), PERIPH_B, 0); /* MDC */ 1112 pin_mask |= (1 << 3); /* MDC */
1101 select_peripheral(PD(2), PERIPH_B, 0); /* MDIO */ 1113 pin_mask |= (1 << 2); /* MDIO */
1114
1115 if (!data->is_rmii)
1116 pin_mask |= (1 << 15); /* SPD */
1117
1118 select_peripheral(PIOD, pin_mask, PERIPH_B, 0);
1102 1119
1103 if (!data->is_rmii) { 1120 if (!data->is_rmii) {
1104 select_peripheral(PC(19), PERIPH_B, 0); /* COL */ 1121 pin_mask = (1 << 19); /* COL */
1105 select_peripheral(PC(23), PERIPH_B, 0); /* CRS */ 1122 pin_mask |= (1 << 23); /* CRS */
1106 select_peripheral(PC(26), PERIPH_B, 0); /* TXER */ 1123 pin_mask |= (1 << 26); /* TXER */
1107 select_peripheral(PC(27), PERIPH_B, 0); /* TXD2 */ 1124 pin_mask |= (1 << 27); /* TXD2 */
1108 select_peripheral(PC(28), PERIPH_B, 0); /* TXD3 */ 1125 pin_mask |= (1 << 28); /* TXD3 */
1109 select_peripheral(PC(29), PERIPH_B, 0); /* RXD2 */ 1126 pin_mask |= (1 << 29); /* RXD2 */
1110 select_peripheral(PC(30), PERIPH_B, 0); /* RXD3 */ 1127 pin_mask |= (1 << 30); /* RXD3 */
1111 select_peripheral(PC(24), PERIPH_B, 0); /* RXCK */ 1128 pin_mask |= (1 << 24); /* RXCK */
1112 select_peripheral(PD(15), PERIPH_B, 0); /* SPD */ 1129
1130 select_peripheral(PIOC, pin_mask, PERIPH_B, 0);
1113 } 1131 }
1114 break; 1132 break;
1115 1133
@@ -1177,23 +1195,28 @@ at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
1177 { GPIO_PIN_PB(2), GPIO_PIN_PB(3), 1195 { GPIO_PIN_PB(2), GPIO_PIN_PB(3),
1178 GPIO_PIN_PB(4), GPIO_PIN_PA(27), }; 1196 GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
1179 struct platform_device *pdev; 1197 struct platform_device *pdev;
1198 u32 pin_mask;
1180 1199
1181 switch (id) { 1200 switch (id) {
1182 case 0: 1201 case 0:
1183 pdev = &atmel_spi0_device; 1202 pdev = &atmel_spi0_device;
1203 pin_mask = (1 << 1) | (1 << 2); /* MOSI & SCK */
1204
1184 /* pullup MISO so a level is always defined */ 1205 /* pullup MISO so a level is always defined */
1185 select_peripheral(PA(0), PERIPH_A, AT32_GPIOF_PULLUP); 1206 select_peripheral(PIOA, (1 << 0), PERIPH_A, AT32_GPIOF_PULLUP);
1186 select_peripheral(PA(1), PERIPH_A, 0); /* MOSI */ 1207 select_peripheral(PIOA, pin_mask, PERIPH_A, 0);
1187 select_peripheral(PA(2), PERIPH_A, 0); /* SCK */ 1208
1188 at32_spi_setup_slaves(0, b, n, spi0_pins); 1209 at32_spi_setup_slaves(0, b, n, spi0_pins);
1189 break; 1210 break;
1190 1211
1191 case 1: 1212 case 1:
1192 pdev = &atmel_spi1_device; 1213 pdev = &atmel_spi1_device;
1214 pin_mask = (1 << 1) | (1 << 5); /* MOSI */
1215
1193 /* pullup MISO so a level is always defined */ 1216 /* pullup MISO so a level is always defined */
1194 select_peripheral(PB(0), PERIPH_B, AT32_GPIOF_PULLUP); 1217 select_peripheral(PIOB, (1 << 0), PERIPH_B, AT32_GPIOF_PULLUP);
1195 select_peripheral(PB(1), PERIPH_B, 0); /* MOSI */ 1218 select_peripheral(PIOB, pin_mask, PERIPH_B, 0);
1196 select_peripheral(PB(5), PERIPH_B, 0); /* SCK */ 1219
1197 at32_spi_setup_slaves(1, b, n, spi1_pins); 1220 at32_spi_setup_slaves(1, b, n, spi1_pins);
1198 break; 1221 break;
1199 1222
@@ -1226,6 +1249,7 @@ struct platform_device *__init at32_add_device_twi(unsigned int id,
1226 unsigned int n) 1249 unsigned int n)
1227{ 1250{
1228 struct platform_device *pdev; 1251 struct platform_device *pdev;
1252 u32 pin_mask;
1229 1253
1230 if (id != 0) 1254 if (id != 0)
1231 return NULL; 1255 return NULL;
@@ -1238,8 +1262,9 @@ struct platform_device *__init at32_add_device_twi(unsigned int id,
1238 ARRAY_SIZE(atmel_twi0_resource))) 1262 ARRAY_SIZE(atmel_twi0_resource)))
1239 goto err_add_resources; 1263 goto err_add_resources;
1240 1264
1241 select_peripheral(PA(6), PERIPH_A, 0); /* SDA */ 1265 pin_mask = (1 << 6) | (1 << 7); /* SDA & SDL */
1242 select_peripheral(PA(7), PERIPH_A, 0); /* SDL */ 1266
1267 select_peripheral(PIOA, pin_mask, PERIPH_A, 0);
1243 1268
1244 atmel_twi0_pclk.dev = &pdev->dev; 1269 atmel_twi0_pclk.dev = &pdev->dev;
1245 1270
@@ -1272,10 +1297,16 @@ static struct clk atmel_mci0_pclk = {
1272struct platform_device *__init 1297struct platform_device *__init
1273at32_add_device_mci(unsigned int id, struct mci_platform_data *data) 1298at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
1274{ 1299{
1275 struct mci_platform_data _data;
1276 struct platform_device *pdev; 1300 struct platform_device *pdev;
1301 struct dw_dma_slave *dws;
1302 u32 pioa_mask;
1303 u32 piob_mask;
1277 1304
1278 if (id != 0) 1305 if (id != 0 || !data)
1306 return NULL;
1307
1308 /* Must have at least one usable slot */
1309 if (!data->slot[0].bus_width && !data->slot[1].bus_width)
1279 return NULL; 1310 return NULL;
1280 1311
1281 pdev = platform_device_alloc("atmel_mci", id); 1312 pdev = platform_device_alloc("atmel_mci", id);
@@ -1286,28 +1317,80 @@ at32_add_device_mci(unsigned int id, struct mci_platform_data *data)
1286 ARRAY_SIZE(atmel_mci0_resource))) 1317 ARRAY_SIZE(atmel_mci0_resource)))
1287 goto fail; 1318 goto fail;
1288 1319
1289 if (!data) { 1320 if (data->dma_slave)
1290 data = &_data; 1321 dws = kmemdup(to_dw_dma_slave(data->dma_slave),
1291 memset(data, -1, sizeof(struct mci_platform_data)); 1322 sizeof(struct dw_dma_slave), GFP_KERNEL);
1292 data->detect_pin = GPIO_PIN_NONE; 1323 else
1293 data->wp_pin = GPIO_PIN_NONE; 1324 dws = kzalloc(sizeof(struct dw_dma_slave), GFP_KERNEL);
1294 } 1325
1326 dws->slave.dev = &pdev->dev;
1327 dws->slave.dma_dev = &dw_dmac0_device.dev;
1328 dws->slave.reg_width = DMA_SLAVE_WIDTH_32BIT;
1329 dws->cfg_hi = (DWC_CFGH_SRC_PER(0)
1330 | DWC_CFGH_DST_PER(1));
1331 dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL
1332 | DWC_CFGL_HS_SRC_POL);
1333
1334 data->dma_slave = &dws->slave;
1295 1335
1296 if (platform_device_add_data(pdev, data, 1336 if (platform_device_add_data(pdev, data,
1297 sizeof(struct mci_platform_data))) 1337 sizeof(struct mci_platform_data)))
1298 goto fail; 1338 goto fail;
1299 1339
1300 select_peripheral(PA(10), PERIPH_A, 0); /* CLK */ 1340 /* CLK line is common to both slots */
1301 select_peripheral(PA(11), PERIPH_A, 0); /* CMD */ 1341 pioa_mask = 1 << 10;
1302 select_peripheral(PA(12), PERIPH_A, 0); /* DATA0 */
1303 select_peripheral(PA(13), PERIPH_A, 0); /* DATA1 */
1304 select_peripheral(PA(14), PERIPH_A, 0); /* DATA2 */
1305 select_peripheral(PA(15), PERIPH_A, 0); /* DATA3 */
1306 1342
1307 if (gpio_is_valid(data->detect_pin)) 1343 switch (data->slot[0].bus_width) {
1308 at32_select_gpio(data->detect_pin, 0); 1344 case 4:
1309 if (gpio_is_valid(data->wp_pin)) 1345 pioa_mask |= 1 << 13; /* DATA1 */
1310 at32_select_gpio(data->wp_pin, 0); 1346 pioa_mask |= 1 << 14; /* DATA2 */
1347 pioa_mask |= 1 << 15; /* DATA3 */
1348 /* fall through */
1349 case 1:
1350 pioa_mask |= 1 << 11; /* CMD */
1351 pioa_mask |= 1 << 12; /* DATA0 */
1352
1353 if (gpio_is_valid(data->slot[0].detect_pin))
1354 at32_select_gpio(data->slot[0].detect_pin, 0);
1355 if (gpio_is_valid(data->slot[0].wp_pin))
1356 at32_select_gpio(data->slot[0].wp_pin, 0);
1357 break;
1358 case 0:
1359 /* Slot is unused */
1360 break;
1361 default:
1362 goto fail;
1363 }
1364
1365 select_peripheral(PIOA, pioa_mask, PERIPH_A, 0);
1366 piob_mask = 0;
1367
1368 switch (data->slot[1].bus_width) {
1369 case 4:
1370 piob_mask |= 1 << 8; /* DATA1 */
1371 piob_mask |= 1 << 9; /* DATA2 */
1372 piob_mask |= 1 << 10; /* DATA3 */
1373 /* fall through */
1374 case 1:
1375 piob_mask |= 1 << 6; /* CMD */
1376 piob_mask |= 1 << 7; /* DATA0 */
1377 select_peripheral(PIOB, piob_mask, PERIPH_B, 0);
1378
1379 if (gpio_is_valid(data->slot[1].detect_pin))
1380 at32_select_gpio(data->slot[1].detect_pin, 0);
1381 if (gpio_is_valid(data->slot[1].wp_pin))
1382 at32_select_gpio(data->slot[1].wp_pin, 0);
1383 break;
1384 case 0:
1385 /* Slot is unused */
1386 break;
1387 default:
1388 if (!data->slot[0].bus_width)
1389 goto fail;
1390
1391 data->slot[1].bus_width = 0;
1392 break;
1393 }
1311 1394
1312 atmel_mci0_pclk.dev = &pdev->dev; 1395 atmel_mci0_pclk.dev = &pdev->dev;
1313 1396
@@ -1353,13 +1436,14 @@ static struct clk atmel_lcdfb0_pixclk = {
1353struct platform_device *__init 1436struct platform_device *__init
1354at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, 1437at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
1355 unsigned long fbmem_start, unsigned long fbmem_len, 1438 unsigned long fbmem_start, unsigned long fbmem_len,
1356 unsigned int pin_config) 1439 u64 pin_mask)
1357{ 1440{
1358 struct platform_device *pdev; 1441 struct platform_device *pdev;
1359 struct atmel_lcdfb_info *info; 1442 struct atmel_lcdfb_info *info;
1360 struct fb_monspecs *monspecs; 1443 struct fb_monspecs *monspecs;
1361 struct fb_videomode *modedb; 1444 struct fb_videomode *modedb;
1362 unsigned int modedb_size; 1445 unsigned int modedb_size;
1446 u32 portc_mask, portd_mask, porte_mask;
1363 1447
1364 /* 1448 /*
1365 * Do a deep copy of the fb data, monspecs and modedb. Make 1449 * Do a deep copy of the fb data, monspecs and modedb. Make
@@ -1381,76 +1465,21 @@ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
1381 case 0: 1465 case 0:
1382 pdev = &atmel_lcdfb0_device; 1466 pdev = &atmel_lcdfb0_device;
1383 1467
1384 switch (pin_config) { 1468 if (pin_mask == 0ULL)
1385 case 0: 1469 /* Default to "full" lcdc control signals and 24bit */
1386 select_peripheral(PC(19), PERIPH_A, 0); /* CC */ 1470 pin_mask = ATMEL_LCDC_PRI_24BIT | ATMEL_LCDC_PRI_CONTROL;
1387 select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */ 1471
1388 select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */ 1472 /* LCDC on port C */
1389 select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */ 1473 portc_mask = (pin_mask & 0xfff80000) >> 19;
1390 select_peripheral(PC(23), PERIPH_A, 0); /* DVAL */ 1474 select_peripheral(PIOC, portc_mask, PERIPH_A, 0);
1391 select_peripheral(PC(24), PERIPH_A, 0); /* MODE */ 1475
1392 select_peripheral(PC(25), PERIPH_A, 0); /* PWR */ 1476 /* LCDC on port D */
1393 select_peripheral(PC(26), PERIPH_A, 0); /* DATA0 */ 1477 portd_mask = pin_mask & 0x0003ffff;
1394 select_peripheral(PC(27), PERIPH_A, 0); /* DATA1 */ 1478 select_peripheral(PIOD, portd_mask, PERIPH_A, 0);
1395 select_peripheral(PC(28), PERIPH_A, 0); /* DATA2 */ 1479
1396 select_peripheral(PC(29), PERIPH_A, 0); /* DATA3 */ 1480 /* LCDC on port E */
1397 select_peripheral(PC(30), PERIPH_A, 0); /* DATA4 */ 1481 porte_mask = (pin_mask >> 32) & 0x0007ffff;
1398 select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */ 1482 select_peripheral(PIOE, porte_mask, PERIPH_B, 0);
1399 select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */
1400 select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */
1401 select_peripheral(PD(2), PERIPH_A, 0); /* DATA8 */
1402 select_peripheral(PD(3), PERIPH_A, 0); /* DATA9 */
1403 select_peripheral(PD(4), PERIPH_A, 0); /* DATA10 */
1404 select_peripheral(PD(5), PERIPH_A, 0); /* DATA11 */
1405 select_peripheral(PD(6), PERIPH_A, 0); /* DATA12 */
1406 select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */
1407 select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */
1408 select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */
1409 select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */
1410 select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */
1411 select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */
1412 select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */
1413 select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */
1414 select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */
1415 select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */
1416 select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */
1417 break;
1418 case 1:
1419 select_peripheral(PE(0), PERIPH_B, 0); /* CC */
1420 select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */
1421 select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */
1422 select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */
1423 select_peripheral(PE(1), PERIPH_B, 0); /* DVAL */
1424 select_peripheral(PE(2), PERIPH_B, 0); /* MODE */
1425 select_peripheral(PC(25), PERIPH_A, 0); /* PWR */
1426 select_peripheral(PE(3), PERIPH_B, 0); /* DATA0 */
1427 select_peripheral(PE(4), PERIPH_B, 0); /* DATA1 */
1428 select_peripheral(PE(5), PERIPH_B, 0); /* DATA2 */
1429 select_peripheral(PE(6), PERIPH_B, 0); /* DATA3 */
1430 select_peripheral(PE(7), PERIPH_B, 0); /* DATA4 */
1431 select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */
1432 select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */
1433 select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */
1434 select_peripheral(PE(8), PERIPH_B, 0); /* DATA8 */
1435 select_peripheral(PE(9), PERIPH_B, 0); /* DATA9 */
1436 select_peripheral(PE(10), PERIPH_B, 0); /* DATA10 */
1437 select_peripheral(PE(11), PERIPH_B, 0); /* DATA11 */
1438 select_peripheral(PE(12), PERIPH_B, 0); /* DATA12 */
1439 select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */
1440 select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */
1441 select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */
1442 select_peripheral(PE(13), PERIPH_B, 0); /* DATA16 */
1443 select_peripheral(PE(14), PERIPH_B, 0); /* DATA17 */
1444 select_peripheral(PE(15), PERIPH_B, 0); /* DATA18 */
1445 select_peripheral(PE(16), PERIPH_B, 0); /* DATA19 */
1446 select_peripheral(PE(17), PERIPH_B, 0); /* DATA20 */
1447 select_peripheral(PE(18), PERIPH_B, 0); /* DATA21 */
1448 select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */
1449 select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */
1450 break;
1451 default:
1452 goto err_invalid_id;
1453 }
1454 1483
1455 clk_set_parent(&atmel_lcdfb0_pixclk, &pll0); 1484 clk_set_parent(&atmel_lcdfb0_pixclk, &pll0);
1456 clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0)); 1485 clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0));
@@ -1499,6 +1528,7 @@ static struct clk atmel_pwm0_mck = {
1499struct platform_device *__init at32_add_device_pwm(u32 mask) 1528struct platform_device *__init at32_add_device_pwm(u32 mask)
1500{ 1529{
1501 struct platform_device *pdev; 1530 struct platform_device *pdev;
1531 u32 pin_mask;
1502 1532
1503 if (!mask) 1533 if (!mask)
1504 return NULL; 1534 return NULL;
@@ -1514,14 +1544,21 @@ struct platform_device *__init at32_add_device_pwm(u32 mask)
1514 if (platform_device_add_data(pdev, &mask, sizeof(mask))) 1544 if (platform_device_add_data(pdev, &mask, sizeof(mask)))
1515 goto out_free_pdev; 1545 goto out_free_pdev;
1516 1546
1547 pin_mask = 0;
1517 if (mask & (1 << 0)) 1548 if (mask & (1 << 0))
1518 select_peripheral(PA(28), PERIPH_A, 0); 1549 pin_mask |= (1 << 28);
1519 if (mask & (1 << 1)) 1550 if (mask & (1 << 1))
1520 select_peripheral(PA(29), PERIPH_A, 0); 1551 pin_mask |= (1 << 29);
1552 if (pin_mask > 0)
1553 select_peripheral(PIOA, pin_mask, PERIPH_A, 0);
1554
1555 pin_mask = 0;
1521 if (mask & (1 << 2)) 1556 if (mask & (1 << 2))
1522 select_peripheral(PA(21), PERIPH_B, 0); 1557 pin_mask |= (1 << 21);
1523 if (mask & (1 << 3)) 1558 if (mask & (1 << 3))
1524 select_peripheral(PA(22), PERIPH_B, 0); 1559 pin_mask |= (1 << 22);
1560 if (pin_mask > 0)
1561 select_peripheral(PIOA, pin_mask, PERIPH_B, 0);
1525 1562
1526 atmel_pwm0_mck.dev = &pdev->dev; 1563 atmel_pwm0_mck.dev = &pdev->dev;
1527 1564
@@ -1562,52 +1599,65 @@ struct platform_device *__init
1562at32_add_device_ssc(unsigned int id, unsigned int flags) 1599at32_add_device_ssc(unsigned int id, unsigned int flags)
1563{ 1600{
1564 struct platform_device *pdev; 1601 struct platform_device *pdev;
1602 u32 pin_mask = 0;
1565 1603
1566 switch (id) { 1604 switch (id) {
1567 case 0: 1605 case 0:
1568 pdev = &ssc0_device; 1606 pdev = &ssc0_device;
1569 if (flags & ATMEL_SSC_RF) 1607 if (flags & ATMEL_SSC_RF)
1570 select_peripheral(PA(21), PERIPH_A, 0); /* RF */ 1608 pin_mask |= (1 << 21); /* RF */
1571 if (flags & ATMEL_SSC_RK) 1609 if (flags & ATMEL_SSC_RK)
1572 select_peripheral(PA(22), PERIPH_A, 0); /* RK */ 1610 pin_mask |= (1 << 22); /* RK */
1573 if (flags & ATMEL_SSC_TK) 1611 if (flags & ATMEL_SSC_TK)
1574 select_peripheral(PA(23), PERIPH_A, 0); /* TK */ 1612 pin_mask |= (1 << 23); /* TK */
1575 if (flags & ATMEL_SSC_TF) 1613 if (flags & ATMEL_SSC_TF)
1576 select_peripheral(PA(24), PERIPH_A, 0); /* TF */ 1614 pin_mask |= (1 << 24); /* TF */
1577 if (flags & ATMEL_SSC_TD) 1615 if (flags & ATMEL_SSC_TD)
1578 select_peripheral(PA(25), PERIPH_A, 0); /* TD */ 1616 pin_mask |= (1 << 25); /* TD */
1579 if (flags & ATMEL_SSC_RD) 1617 if (flags & ATMEL_SSC_RD)
1580 select_peripheral(PA(26), PERIPH_A, 0); /* RD */ 1618 pin_mask |= (1 << 26); /* RD */
1619
1620 if (pin_mask > 0)
1621 select_peripheral(PIOA, pin_mask, PERIPH_A, 0);
1622
1581 break; 1623 break;
1582 case 1: 1624 case 1:
1583 pdev = &ssc1_device; 1625 pdev = &ssc1_device;
1584 if (flags & ATMEL_SSC_RF) 1626 if (flags & ATMEL_SSC_RF)
1585 select_peripheral(PA(0), PERIPH_B, 0); /* RF */ 1627 pin_mask |= (1 << 0); /* RF */
1586 if (flags & ATMEL_SSC_RK) 1628 if (flags & ATMEL_SSC_RK)
1587 select_peripheral(PA(1), PERIPH_B, 0); /* RK */ 1629 pin_mask |= (1 << 1); /* RK */
1588 if (flags & ATMEL_SSC_TK) 1630 if (flags & ATMEL_SSC_TK)
1589 select_peripheral(PA(2), PERIPH_B, 0); /* TK */ 1631 pin_mask |= (1 << 2); /* TK */
1590 if (flags & ATMEL_SSC_TF) 1632 if (flags & ATMEL_SSC_TF)
1591 select_peripheral(PA(3), PERIPH_B, 0); /* TF */ 1633 pin_mask |= (1 << 3); /* TF */
1592 if (flags & ATMEL_SSC_TD) 1634 if (flags & ATMEL_SSC_TD)
1593 select_peripheral(PA(4), PERIPH_B, 0); /* TD */ 1635 pin_mask |= (1 << 4); /* TD */
1594 if (flags & ATMEL_SSC_RD) 1636 if (flags & ATMEL_SSC_RD)
1595 select_peripheral(PA(5), PERIPH_B, 0); /* RD */ 1637 pin_mask |= (1 << 5); /* RD */
1638
1639 if (pin_mask > 0)
1640 select_peripheral(PIOA, pin_mask, PERIPH_B, 0);
1641
1596 break; 1642 break;
1597 case 2: 1643 case 2:
1598 pdev = &ssc2_device; 1644 pdev = &ssc2_device;
1599 if (flags & ATMEL_SSC_TD) 1645 if (flags & ATMEL_SSC_TD)
1600 select_peripheral(PB(13), PERIPH_A, 0); /* TD */ 1646 pin_mask |= (1 << 13); /* TD */
1601 if (flags & ATMEL_SSC_RD) 1647 if (flags & ATMEL_SSC_RD)
1602 select_peripheral(PB(14), PERIPH_A, 0); /* RD */ 1648 pin_mask |= (1 << 14); /* RD */
1603 if (flags & ATMEL_SSC_TK) 1649 if (flags & ATMEL_SSC_TK)
1604 select_peripheral(PB(15), PERIPH_A, 0); /* TK */ 1650 pin_mask |= (1 << 15); /* TK */
1605 if (flags & ATMEL_SSC_TF) 1651 if (flags & ATMEL_SSC_TF)
1606 select_peripheral(PB(16), PERIPH_A, 0); /* TF */ 1652 pin_mask |= (1 << 16); /* TF */
1607 if (flags & ATMEL_SSC_RF) 1653 if (flags & ATMEL_SSC_RF)
1608 select_peripheral(PB(17), PERIPH_A, 0); /* RF */ 1654 pin_mask |= (1 << 17); /* RF */
1609 if (flags & ATMEL_SSC_RK) 1655 if (flags & ATMEL_SSC_RK)
1610 select_peripheral(PB(18), PERIPH_A, 0); /* RK */ 1656 pin_mask |= (1 << 18); /* RK */
1657
1658 if (pin_mask > 0)
1659 select_peripheral(PIOB, pin_mask, PERIPH_A, 0);
1660
1611 break; 1661 break;
1612 default: 1662 default:
1613 return NULL; 1663 return NULL;
@@ -1745,14 +1795,15 @@ static int __init at32_init_ide_or_cf(struct platform_device *pdev,
1745 unsigned int cs, unsigned int extint) 1795 unsigned int cs, unsigned int extint)
1746{ 1796{
1747 static unsigned int extint_pin_map[4] __initdata = { 1797 static unsigned int extint_pin_map[4] __initdata = {
1748 GPIO_PIN_PB(25), 1798 (1 << 25),
1749 GPIO_PIN_PB(26), 1799 (1 << 26),
1750 GPIO_PIN_PB(27), 1800 (1 << 27),
1751 GPIO_PIN_PB(28), 1801 (1 << 28),
1752 }; 1802 };
1753 static bool common_pins_initialized __initdata = false; 1803 static bool common_pins_initialized __initdata = false;
1754 unsigned int extint_pin; 1804 unsigned int extint_pin;
1755 int ret; 1805 int ret;
1806 u32 pin_mask;
1756 1807
1757 if (extint >= ARRAY_SIZE(extint_pin_map)) 1808 if (extint >= ARRAY_SIZE(extint_pin_map))
1758 return -EINVAL; 1809 return -EINVAL;
@@ -1766,7 +1817,8 @@ static int __init at32_init_ide_or_cf(struct platform_device *pdev,
1766 if (ret) 1817 if (ret)
1767 return ret; 1818 return ret;
1768 1819
1769 select_peripheral(PE(21), PERIPH_A, 0); /* NCS4 -> OE_N */ 1820 /* NCS4 -> OE_N */
1821 select_peripheral(PIOE, (1 << 21), PERIPH_A, 0);
1770 hmatrix_sfr_set_bits(HMATRIX_SLAVE_EBI, HMATRIX_EBI_CF0_ENABLE); 1822 hmatrix_sfr_set_bits(HMATRIX_SLAVE_EBI, HMATRIX_EBI_CF0_ENABLE);
1771 break; 1823 break;
1772 case 5: 1824 case 5:
@@ -1776,7 +1828,8 @@ static int __init at32_init_ide_or_cf(struct platform_device *pdev,
1776 if (ret) 1828 if (ret)
1777 return ret; 1829 return ret;
1778 1830
1779 select_peripheral(PE(22), PERIPH_A, 0); /* NCS5 -> OE_N */ 1831 /* NCS5 -> OE_N */
1832 select_peripheral(PIOE, (1 << 22), PERIPH_A, 0);
1780 hmatrix_sfr_set_bits(HMATRIX_SLAVE_EBI, HMATRIX_EBI_CF1_ENABLE); 1833 hmatrix_sfr_set_bits(HMATRIX_SLAVE_EBI, HMATRIX_EBI_CF1_ENABLE);
1781 break; 1834 break;
1782 default: 1835 default:
@@ -1784,14 +1837,17 @@ static int __init at32_init_ide_or_cf(struct platform_device *pdev,
1784 } 1837 }
1785 1838
1786 if (!common_pins_initialized) { 1839 if (!common_pins_initialized) {
1787 select_peripheral(PE(19), PERIPH_A, 0); /* CFCE1 -> CS0_N */ 1840 pin_mask = (1 << 19); /* CFCE1 -> CS0_N */
1788 select_peripheral(PE(20), PERIPH_A, 0); /* CFCE2 -> CS1_N */ 1841 pin_mask |= (1 << 20); /* CFCE2 -> CS1_N */
1789 select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW -> DIR */ 1842 pin_mask |= (1 << 23); /* CFRNW -> DIR */
1790 select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT <- IORDY */ 1843 pin_mask |= (1 << 24); /* NWAIT <- IORDY */
1844
1845 select_peripheral(PIOE, pin_mask, PERIPH_A, 0);
1846
1791 common_pins_initialized = true; 1847 common_pins_initialized = true;
1792 } 1848 }
1793 1849
1794 at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH); 1850 select_peripheral(PIOB, extint_pin, PERIPH_A, AT32_GPIOF_DEGLITCH);
1795 1851
1796 pdev->resource[1].start = EIM_IRQ_BASE + extint; 1852 pdev->resource[1].start = EIM_IRQ_BASE + extint;
1797 pdev->resource[1].end = pdev->resource[1].start; 1853 pdev->resource[1].end = pdev->resource[1].start;
@@ -1930,6 +1986,7 @@ at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data)
1930{ 1986{
1931 struct platform_device *pdev; 1987 struct platform_device *pdev;
1932 struct ac97c_platform_data _data; 1988 struct ac97c_platform_data _data;
1989 u32 pin_mask;
1933 1990
1934 if (id != 0) 1991 if (id != 0)
1935 return NULL; 1992 return NULL;
@@ -1956,10 +2013,10 @@ at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data)
1956 sizeof(struct ac97c_platform_data))) 2013 sizeof(struct ac97c_platform_data)))
1957 goto fail; 2014 goto fail;
1958 2015
1959 select_peripheral(PB(20), PERIPH_B, 0); /* SDO */ 2016 pin_mask = (1 << 20) | (1 << 21); /* SDO & SYNC */
1960 select_peripheral(PB(21), PERIPH_B, 0); /* SYNC */ 2017 pin_mask |= (1 << 22) | (1 << 23); /* SCLK & SDI */
1961 select_peripheral(PB(22), PERIPH_B, 0); /* SCLK */ 2018
1962 select_peripheral(PB(23), PERIPH_B, 0); /* SDI */ 2019 select_peripheral(PIOB, pin_mask, PERIPH_B, 0);
1963 2020
1964 /* TODO: gpio_is_valid(data->reset_pin) with kernel 2.6.26. */ 2021 /* TODO: gpio_is_valid(data->reset_pin) with kernel 2.6.26. */
1965 if (data->reset_pin != GPIO_PIN_NONE) 2022 if (data->reset_pin != GPIO_PIN_NONE)
@@ -2001,6 +2058,7 @@ static struct clk abdac0_sample_clk = {
2001struct platform_device *__init at32_add_device_abdac(unsigned int id) 2058struct platform_device *__init at32_add_device_abdac(unsigned int id)
2002{ 2059{
2003 struct platform_device *pdev; 2060 struct platform_device *pdev;
2061 u32 pin_mask;
2004 2062
2005 if (id != 0) 2063 if (id != 0)
2006 return NULL; 2064 return NULL;
@@ -2013,10 +2071,10 @@ struct platform_device *__init at32_add_device_abdac(unsigned int id)
2013 ARRAY_SIZE(abdac0_resource))) 2071 ARRAY_SIZE(abdac0_resource)))
2014 goto err_add_resources; 2072 goto err_add_resources;
2015 2073
2016 select_peripheral(PB(20), PERIPH_A, 0); /* DATA1 */ 2074 pin_mask = (1 << 20) | (1 << 22); /* DATA1 & DATAN1 */
2017 select_peripheral(PB(21), PERIPH_A, 0); /* DATA0 */ 2075 pin_mask |= (1 << 21) | (1 << 23); /* DATA0 & DATAN0 */
2018 select_peripheral(PB(22), PERIPH_A, 0); /* DATAN1 */ 2076
2019 select_peripheral(PB(23), PERIPH_A, 0); /* DATAN0 */ 2077 select_peripheral(PIOB, pin_mask, PERIPH_A, 0);
2020 2078
2021 abdac0_pclk.dev = &pdev->dev; 2079 abdac0_pclk.dev = &pdev->dev;
2022 abdac0_sample_clk.dev = &pdev->dev; 2080 abdac0_sample_clk.dev = &pdev->dev;
@@ -2073,7 +2131,7 @@ static struct clk gclk4 = {
2073 .index = 4, 2131 .index = 4,
2074}; 2132};
2075 2133
2076struct clk *at32_clock_list[] = { 2134static __initdata struct clk *init_clocks[] = {
2077 &osc32k, 2135 &osc32k,
2078 &osc0, 2136 &osc0,
2079 &osc1, 2137 &osc1,
@@ -2137,7 +2195,6 @@ struct clk *at32_clock_list[] = {
2137 &gclk3, 2195 &gclk3,
2138 &gclk4, 2196 &gclk4,
2139}; 2197};
2140unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
2141 2198
2142void __init setup_platform(void) 2199void __init setup_platform(void)
2143{ 2200{
@@ -2168,14 +2225,19 @@ void __init setup_platform(void)
2168 genclk_init_parent(&abdac0_sample_clk); 2225 genclk_init_parent(&abdac0_sample_clk);
2169 2226
2170 /* 2227 /*
2171 * Turn on all clocks that have at least one user already, and 2228 * Build initial dynamic clock list by registering all clocks
2172 * turn off everything else. We only do this for module 2229 * from the array.
2173 * clocks, and even though it isn't particularly pretty to 2230 * At the same time, turn on all clocks that have at least one
2174 * check the address of the mode function, it should do the 2231 * user already, and turn off everything else. We only do this
2175 * trick... 2232 * for module clocks, and even though it isn't particularly
2233 * pretty to check the address of the mode function, it should
2234 * do the trick...
2176 */ 2235 */
2177 for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) { 2236 for (i = 0; i < ARRAY_SIZE(init_clocks); i++) {
2178 struct clk *clk = at32_clock_list[i]; 2237 struct clk *clk = init_clocks[i];
2238
2239 /* first, register clock */
2240 at32_clk_register(clk);
2179 2241
2180 if (clk->users == 0) 2242 if (clk->users == 0)
2181 continue; 2243 continue;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-18 10:44:24 -0500
== QLA_SUCCESS) { DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC " "code.\n", ha->host_no)); rval = qla2x00_verify_checksum(ha, srisc_address); if (rval == QLA_SUCCESS) { /* Start firmware execution. */ DEBUG(printk("scsi(%ld): Checksum OK, start " "firmware.\n", ha->host_no)); rval = qla2x00_execute_fw(ha, srisc_address); /* Retrieve firmware information. */ if (rval == QLA_SUCCESS && ha->fw_major_version == 0) { qla2x00_get_fw_version(ha, &ha->fw_major_version, &ha->fw_minor_version, &ha->fw_subminor_version, &ha->fw_attributes, &ha->fw_memory_size); qla2x00_resize_request_q(ha); ha->flags.npiv_supported = 0; if ((IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA84XX(ha)) && (ha->fw_attributes & BIT_2)) { ha->flags.npiv_supported = 1; if ((!ha->max_npiv_vports) || ((ha->max_npiv_vports + 1) % MIN_MULTI_ID_FABRIC)) ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; } if (ql2xallocfwdump) qla2x00_alloc_fw_dump(ha); } } else { DEBUG2(printk(KERN_INFO "scsi(%ld): ISP Firmware failed checksum.\n", ha->host_no)); } } if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { /* Enable proper parity. */ spin_lock_irqsave(&ha->hardware_lock, flags); if (IS_QLA2300(ha)) /* SRAM parity */ WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1); else /* SRAM, Instruction RAM and GP RAM parity */ WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7); RD_REG_WORD(&reg->hccr); spin_unlock_irqrestore(&ha->hardware_lock, flags); } if (rval) { DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n", ha->host_no)); } return (rval); } /** * qla2x00_init_response_q_entries() - Initializes response queue entries. * @ha: HA context * * Beginning of request ring has initialization control block already built * by nvram config routine. * * Returns 0 on success. */ static void qla2x00_init_response_q_entries(scsi_qla_host_t *ha) { uint16_t cnt; response_t *pkt; pkt = ha->response_ring_ptr; for (cnt = 0; cnt < ha->response_q_length; cnt++) { pkt->signature = RESPONSE_PROCESSED; pkt++; } } /** * qla2x00_update_fw_options() - Read and process firmware options. * @ha: HA context * * Returns 0 on success. */ void qla2x00_update_fw_options(scsi_qla_host_t *ha) { uint16_t swing, emphasis, tx_sens, rx_sens; memset(ha->fw_options, 0, sizeof(ha->fw_options)); qla2x00_get_fw_options(ha, ha->fw_options); if (IS_QLA2100(ha) || IS_QLA2200(ha)) return; /* Serial Link options. */ DEBUG3(printk("scsi(%ld): Serial link options:\n", ha->host_no)); DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options))); ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; if (ha->fw_seriallink_options[3] & BIT_2) { ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; /* 1G settings */ swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); emphasis = (ha->fw_seriallink_options[2] & (BIT_4 | BIT_3)) >> 3; tx_sens = ha->fw_seriallink_options[0] & (BIT_3 | BIT_2 | BIT_1 | BIT_0); rx_sens = (ha->fw_seriallink_options[0] & (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; ha->fw_options[10] = (emphasis << 14) | (swing << 8); if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { if (rx_sens == 0x0) rx_sens = 0x3; ha->fw_options[10] |= (tx_sens << 4) | rx_sens; } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) ha->fw_options[10] |= BIT_5 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | (tx_sens & (BIT_1 | BIT_0)); /* 2G settings */ swing = (ha->fw_seriallink_options[2] & (BIT_7 | BIT_6 | BIT_5)) >> 5; emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); tx_sens = ha->fw_seriallink_options[1] & (BIT_3 | BIT_2 | BIT_1 | BIT_0); rx_sens = (ha->fw_seriallink_options[1] & (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; ha->fw_options[11] = (emphasis << 14) | (swing << 8); if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { if (rx_sens == 0x0) rx_sens = 0x3; ha->fw_options[11] |= (tx_sens << 4) | rx_sens; } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) ha->fw_options[11] |= BIT_5 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | (tx_sens & (BIT_1 | BIT_0)); } /* FCP2 options. */ /* Return command IOCBs without waiting for an ABTS to complete. */ ha->fw_options[3] |= BIT_13; /* LED scheme. */ if (ha->flags.enable_led_scheme) ha->fw_options[2] |= BIT_12; /* Detect ISP6312. */ if (IS_QLA6312(ha)) ha->fw_options[2] |= BIT_13; /* Update firmware options. */ qla2x00_set_fw_options(ha, ha->fw_options); } void qla24xx_update_fw_options(scsi_qla_host_t *ha) { int rval; /* Update Serial Link options. */ if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) return; rval = qla2x00_set_serdes_params(ha, le16_to_cpu(ha->fw_seriallink_options24[1]), le16_to_cpu(ha->fw_seriallink_options24[2]), le16_to_cpu(ha->fw_seriallink_options24[3])); if (rval != QLA_SUCCESS) { qla_printk(KERN_WARNING, ha, "Unable to update Serial Link options (%x).\n", rval); } } void qla2x00_config_rings(struct scsi_qla_host *ha) { struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; /* Setup ring parameters in initialization control block. */ ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0); ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0); ha->init_cb->request_q_length = cpu_to_le16(ha->request_q_length); ha->init_cb->response_q_length = cpu_to_le16(ha->response_q_length); ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(ha->request_dma)); ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(ha->request_dma)); ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(ha->response_dma)); ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(ha->response_dma)); WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ } void qla24xx_config_rings(struct scsi_qla_host *ha) { struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; struct init_cb_24xx *icb; /* Setup ring parameters in initialization control block. */ icb = (struct init_cb_24xx *)ha->init_cb; icb->request_q_outpointer = __constant_cpu_to_le16(0); icb->response_q_inpointer = __constant_cpu_to_le16(0); icb->request_q_length = cpu_to_le16(ha->request_q_length); icb->response_q_length = cpu_to_le16(ha->response_q_length); icb->request_q_address[0] = cpu_to_le32(LSD(ha->request_dma)); icb->request_q_address[1] = cpu_to_le32(MSD(ha->request_dma)); icb->response_q_address[0] = cpu_to_le32(LSD(ha->response_dma)); icb->response_q_address[1] = cpu_to_le32(MSD(ha->response_dma)); WRT_REG_DWORD(&reg->req_q_in, 0); WRT_REG_DWORD(&reg->req_q_out, 0); WRT_REG_DWORD(&reg->rsp_q_in, 0); WRT_REG_DWORD(&reg->rsp_q_out, 0); RD_REG_DWORD(&reg->rsp_q_out); } /** * qla2x00_init_rings() - Initializes firmware. * @ha: HA context * * Beginning of request ring has initialization control block already built * by nvram config routine. * * Returns 0 on success. */ static int qla2x00_init_rings(scsi_qla_host_t *ha) { int rval; unsigned long flags = 0; int cnt; struct mid_init_cb_24xx *mid_init_cb = (struct mid_init_cb_24xx *) ha->init_cb; spin_lock_irqsave(&ha->hardware_lock, flags); /* Clear outstanding commands array. */ for (cnt = 0; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) ha->outstanding_cmds[cnt] = NULL; ha->current_outstanding_cmd = 0; /* Clear RSCN queue. */ ha->rscn_in_ptr = 0; ha->rscn_out_ptr = 0; /* Initialize firmware. */ ha->request_ring_ptr = ha->request_ring; ha->req_ring_index = 0; ha->req_q_cnt = ha->request_q_length; ha->response_ring_ptr = ha->response_ring; ha->rsp_ring_index = 0; /* Initialize response queue entries */ qla2x00_init_response_q_entries(ha); ha->isp_ops->config_rings(ha); spin_unlock_irqrestore(&ha->hardware_lock, flags); /* Update any ISP specific firmware options before initialization. */ ha->isp_ops->update_fw_options(ha); DEBUG(printk("scsi(%ld): Issue init firmware.\n", ha->host_no)); if (ha->flags.npiv_supported) mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); mid_init_cb->options = __constant_cpu_to_le16(BIT_1); rval = qla2x00_init_firmware(ha, ha->init_cb_size); if (rval) { DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n", ha->host_no)); } else { DEBUG3(printk("scsi(%ld): Init firmware -- success.\n", ha->host_no)); } return (rval); } /** * qla2x00_fw_ready() - Waits for firmware ready. * @ha: HA context * * Returns 0 on success. */ static int qla2x00_fw_ready(scsi_qla_host_t *ha) { int rval; unsigned long wtime, mtime, cs84xx_time; uint16_t min_wait; /* Minimum wait time if loop is down */ uint16_t wait_time; /* Wait time if loop is coming ready */ uint16_t state[3]; rval = QLA_SUCCESS; /* 20 seconds for loop down. */ min_wait = 20; /* * Firmware should take at most one RATOV to login, plus 5 seconds for * our own processing. */ if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { wait_time = min_wait; } /* Min wait time if loop down */ mtime = jiffies + (min_wait * HZ); /* wait time before firmware ready */ wtime = jiffies + (wait_time * HZ); /* Wait for ISP to finish LIP */ if (!ha->flags.init_done) qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n"); DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n", ha->host_no)); do { rval = qla2x00_get_firmware_state(ha, state); if (rval == QLA_SUCCESS) { if (state[0] < FSTATE_LOSS_OF_SYNC) { ha->device_flags &= ~DFLG_NO_CABLE; } if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { DEBUG16(printk("scsi(%ld): fw_state=%x " "84xx=%x.\n", ha->host_no, state[0], state[2])); if ((state[2] & FSTATE_LOGGED_IN) && (state[2] & FSTATE_WAITING_FOR_VERIFY)) { DEBUG16(printk("scsi(%ld): Sending " "verify iocb.\n", ha->host_no)); cs84xx_time = jiffies; rval = qla84xx_init_chip(ha); if (rval != QLA_SUCCESS) break; /* Add time taken to initialize. */ cs84xx_time = jiffies - cs84xx_time; wtime += cs84xx_time; mtime += cs84xx_time; DEBUG16(printk("scsi(%ld): Increasing " "wait time by %ld. New time %ld\n", ha->host_no, cs84xx_time, wtime)); } } else if (state[0] == FSTATE_READY) { DEBUG(printk("scsi(%ld): F/W Ready - OK \n", ha->host_no)); qla2x00_get_retry_cnt(ha, &ha->retry_count, &ha->login_timeout, &ha->r_a_tov); rval = QLA_SUCCESS; break; } rval = QLA_FUNCTION_FAILED; if (atomic_read(&ha->loop_down_timer) && state[0] != FSTATE_READY) { /* Loop down. Timeout on min_wait for states * other than Wait for Login. */ if (time_after_eq(jiffies, mtime)) { qla_printk(KERN_INFO, ha, "Cable is unplugged...\n"); ha->device_flags |= DFLG_NO_CABLE; break; } } } else { /* Mailbox cmd failed. Timeout on min_wait. */ if (time_after_eq(jiffies, mtime)) break; } if (time_after_eq(jiffies, wtime)) break; /* Delay for a while */ msleep(500); DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n", ha->host_no, state[0], jiffies)); } while (1); DEBUG(printk("scsi(%ld): fw_state=%x curr time=%lx.\n", ha->host_no, state[0], jiffies)); if (rval) { DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n", ha->host_no)); } return (rval); } /* * qla2x00_configure_hba * Setup adapter context. * * Input: * ha = adapter state pointer. * * Returns: * 0 = success * * Context: * Kernel context. */ static int qla2x00_configure_hba(scsi_qla_host_t *ha) { int rval; uint16_t loop_id; uint16_t topo; uint16_t sw_cap; uint8_t al_pa; uint8_t area; uint8_t domain; char connect_type[22]; /* Get host addresses. */ rval = qla2x00_get_adapter_id(ha, &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); if (rval != QLA_SUCCESS) { if (LOOP_TRANSITION(ha) || atomic_read(&ha->loop_down_timer) || (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { DEBUG2(printk("%s(%ld) Loop is in a transition state\n", __func__, ha->host_no)); } else { qla_printk(KERN_WARNING, ha, "ERROR -- Unable to get host loop ID.\n"); set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags); } return (rval); } if (topo == 4) { qla_printk(KERN_INFO, ha, "Cannot get topology - retrying.\n"); return (QLA_FUNCTION_FAILED); } ha->loop_id = loop_id; /* initialize */ ha->min_external_loopid = SNS_FIRST_LOOP_ID; ha->operating_mode = LOOP; ha->switch_cap = 0; switch (topo) { case 0: DEBUG3(printk("scsi(%ld): HBA in NL topology.\n", ha->host_no)); ha->current_topology = ISP_CFG_NL; strcpy(connect_type, "(Loop)"); break; case 1: DEBUG3(printk("scsi(%ld): HBA in FL topology.\n", ha->host_no)); ha->switch_cap = sw_cap; ha->current_topology = ISP_CFG_FL; strcpy(connect_type, "(FL_Port)"); break; case 2: DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n", ha->host_no)); ha->operating_mode = P2P; ha->current_topology = ISP_CFG_N; strcpy(connect_type, "(N_Port-to-N_Port)"); break; case 3: DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n", ha->host_no)); ha->switch_cap = sw_cap; ha->operating_mode = P2P; ha->current_topology = ISP_CFG_F; strcpy(connect_type, "(F_Port)"); break; default: DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. " "Using NL.\n", ha->host_no, topo)); ha->current_topology = ISP_CFG_NL; strcpy(connect_type, "(Loop)"); break; } /* Save Host port and loop ID. */ /* byte order - Big Endian */ ha->d_id.b.domain = domain; ha->d_id.b.area = area; ha->d_id.b.al_pa = al_pa; if (!ha->flags.init_done) qla_printk(KERN_INFO, ha, "Topology - %s, Host Loop address 0x%x\n", connect_type, ha->loop_id); if (rval) { DEBUG2_3(printk("scsi(%ld): FAILED.\n", ha->host_no)); } else { DEBUG3(printk("scsi(%ld): exiting normally.\n", ha->host_no)); } return(rval); } static inline void qla2x00_set_model_info(scsi_qla_host_t *ha, uint8_t *model, size_t len, char *def) { char *st, *en; uint16_t index; if (memcmp(model, BINZERO, len) != 0) { strncpy(ha->model_number, model, len); st = en = ha->model_number; en += len - 1; while (en > st) { if (*en != 0x20 && *en != 0x00) break; *en-- = '\0'; } index = (ha->pdev->subsystem_device & 0xff); if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && index < QLA_MODEL_NAMES) strncpy(ha->model_desc, qla2x00_model_name[index * 2 + 1], sizeof(ha->model_desc) - 1); } else { index = (ha->pdev->subsystem_device & 0xff); if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && index < QLA_MODEL_NAMES) { strcpy(ha->model_number, qla2x00_model_name[index * 2]); strncpy(ha->model_desc, qla2x00_model_name[index * 2 + 1], sizeof(ha->model_desc) - 1); } else { strcpy(ha->model_number, def); } } if (IS_FWI2_CAPABLE(ha)) qla2xxx_get_vpd_field(ha, "\x82", ha->model_desc, sizeof(ha->model_desc)); } /* On sparc systems, obtain port and node WWN from firmware * properties. */ static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *ha, nvram_t *nv) { #ifdef CONFIG_SPARC struct pci_dev *pdev = ha->pdev; struct device_node *dp = pci_device_to_OF_node(pdev); const u8 *val; int len; val = of_get_property(dp, "port-wwn", &len); if (val && len >= WWN_SIZE) memcpy(nv->port_name, val, WWN_SIZE); val = of_get_property(dp, "node-wwn", &len); if (val && len >= WWN_SIZE) memcpy(nv->node_name, val, WWN_SIZE); #endif } /* * NVRAM configuration for ISP 2xxx * * Input: * ha = adapter block pointer. * * Output: * initialization control block in response_ring * host adapters parameters in host adapter block * * Returns: * 0 = success. */ int qla2x00_nvram_config(scsi_qla_host_t *ha) { int rval; uint8_t chksum = 0; uint16_t cnt; uint8_t *dptr1, *dptr2; init_cb_t *icb = ha->init_cb; nvram_t *nv = ha->nvram; uint8_t *ptr = ha->nvram; struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; rval = QLA_SUCCESS; /* Determine NVRAM starting address. */ ha->nvram_size = sizeof(nvram_t); ha->nvram_base = 0; if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1) ha->nvram_base = 0x80; /* Get NVRAM data and calculate checksum. */ ha->isp_ops->read_nvram(ha, ptr, ha->nvram_base, ha->nvram_size); for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) chksum += *ptr++; DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no)); DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); /* Bad NVRAM data, set defaults parameters. */ if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { /* Reset NVRAM data. */ qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " "invalid -- WWPN) defaults.\n"); if (chksum) qla2xxx_hw_event_log(ha, HW_EVENT_NVRAM_CHKSUM_ERR, 0, MSW(chksum), LSW(chksum)); /* * Set default initialization control block. */ memset(nv, 0, ha->nvram_size); nv->parameter_block_version = ICB_VERSION; if (IS_QLA23XX(ha)) { nv->firmware_options[0] = BIT_2 | BIT_1; nv->firmware_options[1] = BIT_7 | BIT_5; nv->add_firmware_options[0] = BIT_5; nv->add_firmware_options[1] = BIT_5 | BIT_4; nv->frame_payload_size = __constant_cpu_to_le16(2048); nv->special_options[1] = BIT_7; } else if (IS_QLA2200(ha)) { nv->firmware_options[0] = BIT_2 | BIT_1; nv->firmware_options[1] = BIT_7 | BIT_5; nv->add_firmware_options[0] = BIT_5; nv->add_firmware_options[1] = BIT_5 | BIT_4; nv->frame_payload_size = __constant_cpu_to_le16(1024); } else if (IS_QLA2100(ha)) { nv->firmware_options[0] = BIT_3 | BIT_1; nv->firmware_options[1] = BIT_5; nv->frame_payload_size = __constant_cpu_to_le16(1024); } nv->max_iocb_allocation = __constant_cpu_to_le16(256); nv->execution_throttle = __constant_cpu_to_le16(16); nv->retry_count = 8; nv->retry_delay = 1; nv->port_name[0] = 33; nv->port_name[3] = 224; nv->port_name[4] = 139; qla2xxx_nvram_wwn_from_ofw(ha, nv); nv->login_timeout = 4; /* * Set default host adapter parameters */ nv->host_p[1] = BIT_2; nv->reset_delay = 5; nv->port_down_retry_count = 8; nv->max_luns_per_target = __constant_cpu_to_le16(8); nv->link_down_timeout = 60; rval = 1; } #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) /* * The SN2 does not provide BIOS emulation which means you can't change * potentially bogus BIOS settings. Force the use of default settings * for link rate and frame size. Hope that the rest of the settings * are valid. */ if (ia64_platform_is("sn2")) { nv->frame_payload_size = __constant_cpu_to_le16(2048); if (IS_QLA23XX(ha)) nv->special_options[1] = BIT_7; } #endif /* Reset Initialization control block */ memset(icb, 0, ha->init_cb_size); /* * Setup driver NVRAM options. */ nv->firmware_options[0] |= (BIT_6 | BIT_1); nv->firmware_options[0] &= ~(BIT_5 | BIT_4); nv->firmware_options[1] |= (BIT_5 | BIT_0); nv->firmware_options[1] &= ~BIT_4; if (IS_QLA23XX(ha)) { nv->firmware_options[0] |= BIT_2; nv->firmware_options[0] &= ~BIT_3; nv->add_firmware_options[1] |= BIT_5 | BIT_4; if (IS_QLA2300(ha)) { if (ha->fb_rev == FPM_2310) { strcpy(ha->model_number, "QLA2310"); } else { strcpy(ha->model_number, "QLA2300"); } } else { qla2x00_set_model_info(ha, nv->model_number, sizeof(nv->model_number), "QLA23xx"); } } else if (IS_QLA2200(ha)) { nv->firmware_options[0] |= BIT_2; /* * 'Point-to-point preferred, else loop' is not a safe * connection mode setting. */ if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == (BIT_5 | BIT_4)) { /* Force 'loop preferred, else point-to-point'. */ nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); nv->add_firmware_options[0] |= BIT_5; } strcpy(ha->model_number, "QLA22xx"); } else /*if (IS_QLA2100(ha))*/ { strcpy(ha->model_number, "QLA2100"); } /* * Copy over NVRAM RISC parameter block to initialization control block. */ dptr1 = (uint8_t *)icb; dptr2 = (uint8_t *)&nv->parameter_block_version; cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; while (cnt--) *dptr1++ = *dptr2++; /* Copy 2nd half. */ dptr1 = (uint8_t *)icb->add_firmware_options; cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; while (cnt--) *dptr1++ = *dptr2++; /* Use alternate WWN? */ if (nv->host_p[1] & BIT_7) { memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); } /* Prepare nodename */ if ((icb->firmware_options[1] & BIT_6) == 0) { /* * Firmware will apply the following mask if the nodename was * not provided. */ memcpy(icb->node_name, icb->port_name, WWN_SIZE); icb->node_name[0] &= 0xF0; } /* * Set host adapter parameters. */ if (nv->host_p[0] & BIT_7) ql2xextended_error_logging = 1; ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); /* Always load RISC code on non ISP2[12]00 chips. */ if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) ha->flags.disable_risc_code_load = 0; ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; ha->flags.disable_serdes = 0; ha->operating_mode = (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; memcpy(ha->fw_seriallink_options, nv->seriallink_options, sizeof(ha->fw_seriallink_options)); /* save HBA serial number */ ha->serial0 = icb->port_name[5]; ha->serial1 = icb->port_name[6]; ha->serial2 = icb->port_name[7]; ha->node_name = icb->node_name; ha->port_name = icb->port_name; icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); ha->retry_count = nv->retry_count; /* Set minimum login_timeout to 4 seconds. */ if (nv->login_timeout < ql2xlogintimeout) nv->login_timeout = ql2xlogintimeout; if (nv->login_timeout < 4) nv->login_timeout = 4; ha->login_timeout = nv->login_timeout; icb->login_timeout = nv->login_timeout; /* Set minimum RATOV to 100 tenths of a second. */ ha->r_a_tov = 100; ha->loop_reset_delay = nv->reset_delay; /* Link Down Timeout = 0: * * When Port Down timer expires we will start returning * I/O's to OS with "DID_NO_CONNECT". * * Link Down Timeout != 0: * * The driver waits for the link to come up after link down * before returning I/Os to OS with "DID_NO_CONNECT". */ if (nv->link_down_timeout == 0) { ha->loop_down_abort_time = (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); } else { ha->link_down_timeout = nv->link_down_timeout; ha->loop_down_abort_time = (LOOP_DOWN_TIME - ha->link_down_timeout); } /* * Need enough time to try and get the port back. */ ha->port_down_retry_count = nv->port_down_retry_count; if (qlport_down_retry) ha->port_down_retry_count = qlport_down_retry; /* Set login_retry_count */ ha->login_retry_count = nv->retry_count; if (ha->port_down_retry_count == nv->port_down_retry_count && ha->port_down_retry_count > 3) ha->login_retry_count = ha->port_down_retry_count; else if (ha->port_down_retry_count > (int)ha->login_retry_count) ha->login_retry_count = ha->port_down_retry_count; if (ql2xloginretrycount) ha->login_retry_count = ql2xloginretrycount; icb->lun_enables = __constant_cpu_to_le16(0); icb->command_resource_count = 0; icb->immediate_notify_resource_count = 0; icb->timeout = __constant_cpu_to_le16(0); if (IS_QLA2100(ha) || IS_QLA2200(ha)) { /* Enable RIO */ icb->firmware_options[0] &= ~BIT_3; icb->add_firmware_options[0] &= ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); icb->add_firmware_options[0] |= BIT_2; icb->response_accumulation_timer = 3; icb->interrupt_delay_timer = 5; ha->flags.process_response_queue = 1; } else { /* Enable ZIO. */ if (!ha->flags.init_done) { ha->zio_mode = icb->add_firmware_options[0] & (BIT_3 | BIT_2 | BIT_1 | BIT_0); ha->zio_timer = icb->interrupt_delay_timer ? icb->interrupt_delay_timer: 2; } icb->add_firmware_options[0] &= ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); ha->flags.process_response_queue = 0; if (ha->zio_mode != QLA_ZIO_DISABLED) { ha->zio_mode = QLA_ZIO_MODE_6; DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer " "delay (%d us).\n", ha->host_no, ha->zio_mode, ha->zio_timer * 100)); qla_printk(KERN_INFO, ha, "ZIO mode %d enabled; timer delay (%d us).\n", ha->zio_mode, ha->zio_timer * 100); icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; ha->flags.process_response_queue = 1; } } if (rval) { DEBUG2_3(printk(KERN_WARNING "scsi(%ld): NVRAM configuration failed!\n", ha->host_no)); } return (rval); } static void qla2x00_rport_del(void *data) { fc_port_t *fcport = data; struct fc_rport *rport; spin_lock_irq(fcport->ha->host->host_lock); rport = fcport->drport; fcport->drport = NULL; spin_unlock_irq(fcport->ha->host->host_lock); if (rport) fc_remote_port_delete(rport); } /** * qla2x00_alloc_fcport() - Allocate a generic fcport. * @ha: HA context * @flags: allocation flags * * Returns a pointer to the allocated fcport, or NULL, if none available. */ static fc_port_t * qla2x00_alloc_fcport(scsi_qla_host_t *ha, gfp_t flags) { fc_port_t *fcport; fcport = kzalloc(sizeof(fc_port_t), flags); if (!fcport) return NULL; /* Setup fcport template structure. */ fcport->ha = ha; fcport->vp_idx = ha->vp_idx; fcport->port_type = FCT_UNKNOWN; fcport->loop_id = FC_NO_LOOP_ID; atomic_set(&fcport->state, FCS_UNCONFIGURED); fcport->flags = FCF_RLC_SUPPORT; fcport->supported_classes = FC_COS_UNSPECIFIED; return fcport; } /* * qla2x00_configure_loop * Updates Fibre Channel Device Database with what is actually on loop. * * Input: * ha = adapter block pointer. * * Returns: * 0 = success. * 1 = error. * 2 = database was full and device was not configured. */ static int qla2x00_configure_loop(scsi_qla_host_t *ha) { int rval; unsigned long flags, save_flags; rval = QLA_SUCCESS; /* Get Initiator ID */ if (test_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags)) { rval = qla2x00_configure_hba(ha); if (rval != QLA_SUCCESS) { DEBUG(printk("scsi(%ld): Unable to configure HBA.\n", ha->host_no)); return (rval); } } save_flags = flags = ha->dpc_flags; DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n", ha->host_no, flags)); /* * If we have both an RSCN and PORT UPDATE pending then handle them * both at the same time. */ clear_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); clear_bit(RSCN_UPDATE, &ha->dpc_flags); /* Determine what we need to do */ if (ha->current_topology == ISP_CFG_FL && (test_bit(LOCAL_LOOP_UPDATE, &flags))) { ha->flags.rscn_queue_overflow = 1; set_bit(RSCN_UPDATE, &flags); } else if (ha->current_topology == ISP_CFG_F && (test_bit(LOCAL_LOOP_UPDATE, &flags))) { ha->flags.rscn_queue_overflow = 1; set_bit(RSCN_UPDATE, &flags); clear_bit(LOCAL_LOOP_UPDATE, &flags); } else if (ha->current_topology == ISP_CFG_N) { clear_bit(RSCN_UPDATE, &flags); } else if (!ha->flags.online || (test_bit(ABORT_ISP_ACTIVE, &flags))) { ha->flags.rscn_queue_overflow = 1; set_bit(RSCN_UPDATE, &flags); set_bit(LOCAL_LOOP_UPDATE, &flags); } if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) { rval = QLA_FUNCTION_FAILED; } else { rval = qla2x00_configure_local_loop(ha); } } if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { if (LOOP_TRANSITION(ha)) { rval = QLA_FUNCTION_FAILED; } else { rval = qla2x00_configure_fabric(ha); } } if (rval == QLA_SUCCESS) { if (atomic_read(&ha->loop_down_timer) || test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) { rval = QLA_FUNCTION_FAILED; } else { atomic_set(&ha->loop_state, LOOP_READY); DEBUG(printk("scsi(%ld): LOOP READY\n", ha->host_no)); } } if (rval) { DEBUG2_3(printk("%s(%ld): *** FAILED ***\n", __func__, ha->host_no)); } else { DEBUG3(printk("%s: exiting normally\n", __func__)); } /* Restore state if a resync event occurred during processing */ if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) { if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); if (test_bit(RSCN_UPDATE, &save_flags)) { ha->flags.rscn_queue_overflow = 1; set_bit(RSCN_UPDATE, &ha->dpc_flags); } } return (rval); } /* * qla2x00_configure_local_loop * Updates Fibre Channel Device Database with local loop devices. * * Input: * ha = adapter block pointer. * * Returns: * 0 = success. */ static int qla2x00_configure_local_loop(scsi_qla_host_t *ha) { int rval, rval2; int found_devs; int found; fc_port_t *fcport, *new_fcport; uint16_t index; uint16_t entries; char *id_iter; uint16_t loop_id; uint8_t domain, area, al_pa; scsi_qla_host_t *pha = to_qla_parent(ha); found_devs = 0; new_fcport = NULL; entries = MAX_FIBRE_DEVICES; DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", ha->host_no)); DEBUG3(qla2x00_get_fcal_position_map(ha, NULL)); /* Get list of logged in devices. */ memset(ha->gid_list, 0, GID_LIST_SIZE); rval = qla2x00_get_id_list(ha, ha->gid_list, ha->gid_list_dma, &entries); if (rval != QLA_SUCCESS) goto cleanup_allocation; DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n", ha->host_no, entries)); DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list, entries * sizeof(struct gid_list_info))); /* Allocate temporary fcport for any new fcports discovered. */ new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL); if (new_fcport == NULL) { rval = QLA_MEMORY_ALLOC_FAILED; goto cleanup_allocation; } new_fcport->flags &= ~FCF_FABRIC_DEVICE; /* * Mark local devices that were present with FCF_DEVICE_LOST for now. */ list_for_each_entry(fcport, &pha->fcports, list) { if (fcport->vp_idx != ha->vp_idx) continue; if (atomic_read(&fcport->state) == FCS_ONLINE && fcport->port_type != FCT_BROADCAST && (fcport->flags & FCF_FABRIC_DEVICE) == 0) { DEBUG(printk("scsi(%ld): Marking port lost, " "loop_id=0x%04x\n", ha->host_no, fcport->loop_id)); atomic_set(&fcport->state, FCS_DEVICE_LOST); fcport->flags &= ~FCF_FARP_DONE; } } /* Add devices to port list. */ id_iter = (char *)ha->gid_list; for (index = 0; index < entries; index++) { domain = ((struct gid_list_info *)id_iter)->domain; area = ((struct gid_list_info *)id_iter)->area; al_pa = ((struct gid_list_info *)id_iter)->al_pa; if (IS_QLA2100(ha) || IS_QLA2200(ha)) loop_id = (uint16_t) ((struct gid_list_info *)id_iter)->loop_id_2100; else loop_id = le16_to_cpu( ((struct gid_list_info *)id_iter)->loop_id); id_iter += ha->gid_list_info_size; /* Bypass reserved domain fields. */ if ((domain & 0xf0) == 0xf0) continue; /* Bypass if not same domain and area of adapter. */ if (area && domain && (area != ha->d_id.b.area || domain != ha->d_id.b.domain)) continue; /* Bypass invalid local loop ID. */ if (loop_id > LAST_LOCAL_LOOP_ID) continue; /* Fill in member data. */ new_fcport->d_id.b.domain = domain; new_fcport->d_id.b.area = area; new_fcport->d_id.b.al_pa = al_pa; new_fcport->loop_id = loop_id; new_fcport->vp_idx = ha->vp_idx; rval2 = qla2x00_get_port_database(ha, new_fcport, 0); if (rval2 != QLA_SUCCESS) { DEBUG2(printk("scsi(%ld): Failed to retrieve fcport " "information -- get_port_database=%x, " "loop_id=0x%04x\n", ha->host_no, rval2, new_fcport->loop_id)); DEBUG2(printk("scsi(%ld): Scheduling resync...\n", ha->host_no)); set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); continue; } /* Check for matching device in port list. */ found = 0; fcport = NULL; list_for_each_entry(fcport, &pha->fcports, list) { if (fcport->vp_idx != ha->vp_idx) continue; if (memcmp(new_fcport->port_name, fcport->port_name, WWN_SIZE)) continue; fcport->flags &= ~(FCF_FABRIC_DEVICE | FCF_PERSISTENT_BOUND); fcport->loop_id = new_fcport->loop_id; fcport->port_type = new_fcport->port_type; fcport->d_id.b24 = new_fcport->d_id.b24; memcpy(fcport->node_name, new_fcport->node_name, WWN_SIZE); found++; break; } if (!found) { /* New device, add to fcports list. */ new_fcport->flags &= ~FCF_PERSISTENT_BOUND; if (ha->parent) { new_fcport->ha = ha; new_fcport->vp_idx = ha->vp_idx; list_add_tail(&new_fcport->vp_fcport, &ha->vp_fcports); } list_add_tail(&new_fcport->list, &pha->fcports); /* Allocate a new replacement fcport. */ fcport = new_fcport; new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL); if (new_fcport == NULL) { rval = QLA_MEMORY_ALLOC_FAILED; goto cleanup_allocation; } new_fcport->flags &= ~FCF_FABRIC_DEVICE; } /* Base iIDMA settings on HBA port speed. */ fcport->fp_speed = ha->link_data_rate; qla2x00_update_fcport(ha, fcport); found_devs++; } cleanup_allocation: kfree(new_fcport); if (rval != QLA_SUCCESS) { DEBUG2(printk("scsi(%ld): Configure local loop error exit: " "rval=%x\n", ha->host_no, rval)); } if (found_devs) { ha->device_flags |= DFLG_LOCAL_DEVICES; ha->device_flags &= ~DFLG_RETRY_LOCAL_DEVICES; } return (rval); } static void qla2x00_iidma_fcport(scsi_qla_host_t *ha, fc_port_t *fcport) { #define LS_UNKNOWN 2 static char *link_speeds[5] = { "1", "2", "?", "4", "8" }; int rval; uint16_t mb[6]; if (!IS_IIDMA_CAPABLE(ha)) return; if (fcport->fp_speed == PORT_SPEED_UNKNOWN || fcport->fp_speed > ha->link_data_rate) return; rval = qla2x00_set_idma_speed(ha, fcport->loop_id, fcport->fp_speed, mb); if (rval != QLA_SUCCESS) { DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA " "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n", ha->host_no, fcport->port_name[0], fcport->port_name[1], fcport->port_name[2], fcport->port_name[3], fcport->port_name[4], fcport->port_name[5], fcport->port_name[6], fcport->port_name[7], rval, fcport->fp_speed, mb[0], mb[1])); } else { DEBUG2(qla_printk(KERN_INFO, ha, "iIDMA adjusted to %s GB/s on " "%02x%02x%02x%02x%02x%02x%02x%02x.\n", link_speeds[fcport->fp_speed], fcport->port_name[0], fcport->port_name[1], fcport->port_name[2], fcport->port_name[3], fcport->port_name[4], fcport->port_name[5], fcport->port_name[6], fcport->port_name[7])); } } static void qla2x00_reg_remote_port(scsi_qla_host_t *ha, fc_port_t *fcport) { struct fc_rport_identifiers rport_ids; struct fc_rport *rport; if (fcport->drport) qla2x00_rport_del(fcport); rport_ids.node_name = wwn_to_u64(fcport->node_name); rport_ids.port_name = wwn_to_u64(fcport->port_name); rport_ids.port_id = fcport->d_id.b.domain << 16 | fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; fcport->rport = rport = fc_remote_port_add(ha->host, 0, &rport_ids); if (!rport) { qla_printk(KERN_WARNING, ha, "Unable to allocate fc remote port!\n"); return; } spin_lock_irq(fcport->ha->host->host_lock); *((fc_port_t **)rport->dd_data) = fcport; spin_unlock_irq(fcport->ha->host->host_lock); rport->supported_classes = fcport->supported_classes; rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; if (fcport->port_type == FCT_INITIATOR) rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; if (fcport->port_type == FCT_TARGET) rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; fc_remote_port_rolechg(rport, rport_ids.roles); } /* * qla2x00_update_fcport * Updates device on list. * * Input: * ha = adapter block pointer. * fcport = port structure pointer. * * Return: * 0 - Success * BIT_0 - error * * Context: * Kernel context. */ void qla2x00_update_fcport(scsi_qla_host_t *ha, fc_port_t *fcport) { scsi_qla_host_t *pha = to_qla_parent(ha); fcport->ha = ha; fcport->login_retry = 0; fcport->port_login_retry_count = pha->port_down_retry_count * PORT_RETRY_TIME; atomic_set(&fcport->port_down_timer, pha->port_down_retry_count * PORT_RETRY_TIME); fcport->flags &= ~FCF_LOGIN_NEEDED; qla2x00_iidma_fcport(ha, fcport); atomic_set(&fcport->state, FCS_ONLINE); qla2x00_reg_remote_port(ha, fcport); } /* * qla2x00_configure_fabric * Setup SNS devices with loop ID's. * * Input: * ha = adapter block pointer. * * Returns: * 0 = success. * BIT_0 = error */ static int qla2x00_configure_fabric(scsi_qla_host_t *ha) { int rval, rval2; fc_port_t *fcport, *fcptemp; uint16_t next_loopid; uint16_t mb[MAILBOX_REGISTER_COUNT]; uint16_t loop_id; LIST_HEAD(new_fcports); scsi_qla_host_t *pha = to_qla_parent(ha); /* If FL port exists, then SNS is present */ if (IS_FWI2_CAPABLE(ha)) loop_id = NPH_F_PORT; else loop_id = SNS_FL_PORT; rval = qla2x00_get_port_name(ha, loop_id, ha->fabric_node_name, 1); if (rval != QLA_SUCCESS) { DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL " "Port\n", ha->host_no)); ha->device_flags &= ~SWITCH_FOUND; return (QLA_SUCCESS); } ha->device_flags |= SWITCH_FOUND; /* Mark devices that need re-synchronization. */ rval2 = qla2x00_device_resync(ha); if (rval2 == QLA_RSCNS_HANDLED) { /* No point doing the scan, just continue. */ return (QLA_SUCCESS); } do { /* FDMI support. */ if (ql2xfdmienable && test_and_clear_bit(REGISTER_FDMI_NEEDED, &ha->dpc_flags)) qla2x00_fdmi_register(ha); /* Ensure we are logged into the SNS. */ if (IS_FWI2_CAPABLE(ha)) loop_id = NPH_SNS; else loop_id = SIMPLE_NAME_SERVER; ha->isp_ops->fabric_login(ha, loop_id, 0xff, 0xff, 0xfc, mb, BIT_1 | BIT_0); if (mb[0] != MBS_COMMAND_COMPLETE) { DEBUG2(qla_printk(KERN_INFO, ha, "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id, mb[0], mb[1], mb[2], mb[6], mb[7])); return (QLA_SUCCESS); } if (test_and_clear_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags)) { if (qla2x00_rft_id(ha)) { /* EMPTY */ DEBUG2(printk("scsi(%ld): Register FC-4 " "TYPE failed.\n", ha->host_no)); } if (qla2x00_rff_id(ha)) { /* EMPTY */ DEBUG2(printk("scsi(%ld): Register FC-4 " "Features failed.\n", ha->host_no)); } if (qla2x00_rnn_id(ha)) { /* EMPTY */ DEBUG2(printk("scsi(%ld): Register Node Name " "failed.\n", ha->host_no)); } else if (qla2x00_rsnn_nn(ha)) { /* EMPTY */ DEBUG2(printk("scsi(%ld): Register Symbolic " "Node Name failed.\n", ha->host_no)); } } rval = qla2x00_find_all_fabric_devs(ha, &new_fcports); if (rval != QLA_SUCCESS) break; /* * Logout all previous fabric devices marked lost, except * tape devices. */ list_for_each_entry(fcport, &pha->fcports, list) { if (fcport->vp_idx !=ha->vp_idx) continue; if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) break; if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) continue; if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) { qla2x00_mark_device_lost(ha, fcport, ql2xplogiabsentdevice, 0); if (fcport->loop_id != FC_NO_LOOP_ID && (fcport->flags & FCF_TAPE_PRESENT) == 0 && fcport->port_type != FCT_INITIATOR && fcport->port_type != FCT_BROADCAST) { ha->isp_ops->fabric_logout(ha, fcport->loop_id, fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa); fcport->loop_id = FC_NO_LOOP_ID; } } } /* Starting free loop ID. */ next_loopid = pha->min_external_loopid; /* * Scan through our port list and login entries that need to be * logged in. */ list_for_each_entry(fcport, &pha->fcports, list) { if (fcport->vp_idx != ha->vp_idx) continue; if (atomic_read(&ha->loop_down_timer) || test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) break; if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || (fcport->flags & FCF_LOGIN_NEEDED) == 0) continue; if (fcport->loop_id == FC_NO_LOOP_ID) { fcport->loop_id = next_loopid; rval = qla2x00_find_new_loop_id( to_qla_parent(ha), fcport); if (rval != QLA_SUCCESS) { /* Ran out of IDs to use */ break; } } /* Login and update database */ qla2x00_fabric_dev_login(ha, fcport, &next_loopid); } /* Exit if out of loop IDs. */ if (rval != QLA_SUCCESS) { break; } /* * Login and add the new devices to our port list. */ list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { if (atomic_read(&ha->loop_down_timer) || test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) break; /* Find a new loop ID to use. */ fcport->loop_id = next_loopid; rval = qla2x00_find_new_loop_id(to_qla_parent(ha), fcport); if (rval != QLA_SUCCESS) {