diff options
Diffstat (limited to 'arch/avr32/kernel/cpu.c')
-rw-r--r-- | arch/avr32/kernel/cpu.c | 327 |
1 files changed, 327 insertions, 0 deletions
diff --git a/arch/avr32/kernel/cpu.c b/arch/avr32/kernel/cpu.c new file mode 100644 index 000000000000..342452ba2049 --- /dev/null +++ b/arch/avr32/kernel/cpu.c | |||
@@ -0,0 +1,327 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2005-2006 Atmel Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #include <linux/init.h> | ||
9 | #include <linux/sysdev.h> | ||
10 | #include <linux/seq_file.h> | ||
11 | #include <linux/cpu.h> | ||
12 | #include <linux/percpu.h> | ||
13 | #include <linux/param.h> | ||
14 | #include <linux/errno.h> | ||
15 | |||
16 | #include <asm/setup.h> | ||
17 | #include <asm/sysreg.h> | ||
18 | |||
19 | static DEFINE_PER_CPU(struct cpu, cpu_devices); | ||
20 | |||
21 | #ifdef CONFIG_PERFORMANCE_COUNTERS | ||
22 | |||
23 | /* | ||
24 | * XXX: If/when a SMP-capable implementation of AVR32 will ever be | ||
25 | * made, we must make sure that the code executes on the correct CPU. | ||
26 | */ | ||
27 | static ssize_t show_pc0event(struct sys_device *dev, char *buf) | ||
28 | { | ||
29 | unsigned long pccr; | ||
30 | |||
31 | pccr = sysreg_read(PCCR); | ||
32 | return sprintf(buf, "0x%lx\n", (pccr >> 12) & 0x3f); | ||
33 | } | ||
34 | static ssize_t store_pc0event(struct sys_device *dev, const char *buf, | ||
35 | size_t count) | ||
36 | { | ||
37 | unsigned long val; | ||
38 | char *endp; | ||
39 | |||
40 | val = simple_strtoul(buf, &endp, 0); | ||
41 | if (endp == buf || val > 0x3f) | ||
42 | return -EINVAL; | ||
43 | val = (val << 12) | (sysreg_read(PCCR) & 0xfffc0fff); | ||
44 | sysreg_write(PCCR, val); | ||
45 | return count; | ||
46 | } | ||
47 | static ssize_t show_pc0count(struct sys_device *dev, char *buf) | ||
48 | { | ||
49 | unsigned long pcnt0; | ||
50 | |||
51 | pcnt0 = sysreg_read(PCNT0); | ||
52 | return sprintf(buf, "%lu\n", pcnt0); | ||
53 | } | ||
54 | static ssize_t store_pc0count(struct sys_device *dev, const char *buf, | ||
55 | size_t count) | ||
56 | { | ||
57 | unsigned long val; | ||
58 | char *endp; | ||
59 | |||
60 | val = simple_strtoul(buf, &endp, 0); | ||
61 | if (endp == buf) | ||
62 | return -EINVAL; | ||
63 | sysreg_write(PCNT0, val); | ||
64 | |||
65 | return count; | ||
66 | } | ||
67 | |||
68 | static ssize_t show_pc1event(struct sys_device *dev, char *buf) | ||
69 | { | ||
70 | unsigned long pccr; | ||
71 | |||
72 | pccr = sysreg_read(PCCR); | ||
73 | return sprintf(buf, "0x%lx\n", (pccr >> 18) & 0x3f); | ||
74 | } | ||
75 | static ssize_t store_pc1event(struct sys_device *dev, const char *buf, | ||
76 | size_t count) | ||
77 | { | ||
78 | unsigned long val; | ||
79 | char *endp; | ||
80 | |||
81 | val = simple_strtoul(buf, &endp, 0); | ||
82 | if (endp == buf || val > 0x3f) | ||
83 | return -EINVAL; | ||
84 | val = (val << 18) | (sysreg_read(PCCR) & 0xff03ffff); | ||
85 | sysreg_write(PCCR, val); | ||
86 | return count; | ||
87 | } | ||
88 | static ssize_t show_pc1count(struct sys_device *dev, char *buf) | ||
89 | { | ||
90 | unsigned long pcnt1; | ||
91 | |||
92 | pcnt1 = sysreg_read(PCNT1); | ||
93 | return sprintf(buf, "%lu\n", pcnt1); | ||
94 | } | ||
95 | static ssize_t store_pc1count(struct sys_device *dev, const char *buf, | ||
96 | size_t count) | ||
97 | { | ||
98 | unsigned long val; | ||
99 | char *endp; | ||
100 | |||
101 | val = simple_strtoul(buf, &endp, 0); | ||
102 | if (endp == buf) | ||
103 | return -EINVAL; | ||
104 | sysreg_write(PCNT1, val); | ||
105 | |||
106 | return count; | ||
107 | } | ||
108 | |||
109 | static ssize_t show_pccycles(struct sys_device *dev, char *buf) | ||
110 | { | ||
111 | unsigned long pccnt; | ||
112 | |||
113 | pccnt = sysreg_read(PCCNT); | ||
114 | return sprintf(buf, "%lu\n", pccnt); | ||
115 | } | ||
116 | static ssize_t store_pccycles(struct sys_device *dev, const char *buf, | ||
117 | size_t count) | ||
118 | { | ||
119 | unsigned long val; | ||
120 | char *endp; | ||
121 | |||
122 | val = simple_strtoul(buf, &endp, 0); | ||
123 | if (endp == buf) | ||
124 | return -EINVAL; | ||
125 | sysreg_write(PCCNT, val); | ||
126 | |||
127 | return count; | ||
128 | } | ||
129 | |||
130 | static ssize_t show_pcenable(struct sys_device *dev, char *buf) | ||
131 | { | ||
132 | unsigned long pccr; | ||
133 | |||
134 | pccr = sysreg_read(PCCR); | ||
135 | return sprintf(buf, "%c\n", (pccr & 1)?'1':'0'); | ||
136 | } | ||
137 | static ssize_t store_pcenable(struct sys_device *dev, const char *buf, | ||
138 | size_t count) | ||
139 | { | ||
140 | unsigned long pccr, val; | ||
141 | char *endp; | ||
142 | |||
143 | val = simple_strtoul(buf, &endp, 0); | ||
144 | if (endp == buf) | ||
145 | return -EINVAL; | ||
146 | if (val) | ||
147 | val = 1; | ||
148 | |||
149 | pccr = sysreg_read(PCCR); | ||
150 | pccr = (pccr & ~1UL) | val; | ||
151 | sysreg_write(PCCR, pccr); | ||
152 | |||
153 | return count; | ||
154 | } | ||
155 | |||
156 | static SYSDEV_ATTR(pc0event, 0600, show_pc0event, store_pc0event); | ||
157 | static SYSDEV_ATTR(pc0count, 0600, show_pc0count, store_pc0count); | ||
158 | static SYSDEV_ATTR(pc1event, 0600, show_pc1event, store_pc1event); | ||
159 | static SYSDEV_ATTR(pc1count, 0600, show_pc1count, store_pc1count); | ||
160 | static SYSDEV_ATTR(pccycles, 0600, show_pccycles, store_pccycles); | ||
161 | static SYSDEV_ATTR(pcenable, 0600, show_pcenable, store_pcenable); | ||
162 | |||
163 | #endif /* CONFIG_PERFORMANCE_COUNTERS */ | ||
164 | |||
165 | static int __init topology_init(void) | ||
166 | { | ||
167 | int cpu; | ||
168 | |||
169 | for_each_possible_cpu(cpu) { | ||
170 | struct cpu *c = &per_cpu(cpu_devices, cpu); | ||
171 | |||
172 | register_cpu(c, cpu); | ||
173 | |||
174 | #ifdef CONFIG_PERFORMANCE_COUNTERS | ||
175 | sysdev_create_file(&c->sysdev, &attr_pc0event); | ||
176 | sysdev_create_file(&c->sysdev, &attr_pc0count); | ||
177 | sysdev_create_file(&c->sysdev, &attr_pc1event); | ||
178 | sysdev_create_file(&c->sysdev, &attr_pc1count); | ||
179 | sysdev_create_file(&c->sysdev, &attr_pccycles); | ||
180 | sysdev_create_file(&c->sysdev, &attr_pcenable); | ||
181 | #endif | ||
182 | } | ||
183 | |||
184 | return 0; | ||
185 | } | ||
186 | |||
187 | subsys_initcall(topology_init); | ||
188 | |||
189 | static const char *cpu_names[] = { | ||
190 | "Morgan", | ||
191 | "AP7000", | ||
192 | }; | ||
193 | #define NR_CPU_NAMES ARRAY_SIZE(cpu_names) | ||
194 | |||
195 | static const char *arch_names[] = { | ||
196 | "AVR32A", | ||
197 | "AVR32B", | ||
198 | }; | ||
199 | #define NR_ARCH_NAMES ARRAY_SIZE(arch_names) | ||
200 | |||
201 | static const char *mmu_types[] = { | ||
202 | "No MMU", | ||
203 | "ITLB and DTLB", | ||
204 | "Shared TLB", | ||
205 | "MPU" | ||
206 | }; | ||
207 | |||
208 | void __init setup_processor(void) | ||
209 | { | ||
210 | unsigned long config0, config1; | ||
211 | unsigned cpu_id, cpu_rev, arch_id, arch_rev, mmu_type; | ||
212 | unsigned tmp; | ||
213 | |||
214 | config0 = sysreg_read(CONFIG0); /* 0x0000013e; */ | ||
215 | config1 = sysreg_read(CONFIG1); /* 0x01f689a2; */ | ||
216 | cpu_id = config0 >> 24; | ||
217 | cpu_rev = (config0 >> 16) & 0xff; | ||
218 | arch_id = (config0 >> 13) & 0x07; | ||
219 | arch_rev = (config0 >> 10) & 0x07; | ||
220 | mmu_type = (config0 >> 7) & 0x03; | ||
221 | |||
222 | boot_cpu_data.arch_type = arch_id; | ||
223 | boot_cpu_data.cpu_type = cpu_id; | ||
224 | boot_cpu_data.arch_revision = arch_rev; | ||
225 | boot_cpu_data.cpu_revision = cpu_rev; | ||
226 | boot_cpu_data.tlb_config = mmu_type; | ||
227 | |||
228 | tmp = (config1 >> 13) & 0x07; | ||
229 | if (tmp) { | ||
230 | boot_cpu_data.icache.ways = 1 << ((config1 >> 10) & 0x07); | ||
231 | boot_cpu_data.icache.sets = 1 << ((config1 >> 16) & 0x0f); | ||
232 | boot_cpu_data.icache.linesz = 1 << (tmp + 1); | ||
233 | } | ||
234 | tmp = (config1 >> 3) & 0x07; | ||
235 | if (tmp) { | ||
236 | boot_cpu_data.dcache.ways = 1 << (config1 & 0x07); | ||
237 | boot_cpu_data.dcache.sets = 1 << ((config1 >> 6) & 0x0f); | ||
238 | boot_cpu_data.dcache.linesz = 1 << (tmp + 1); | ||
239 | } | ||
240 | |||
241 | if ((cpu_id >= NR_CPU_NAMES) || (arch_id >= NR_ARCH_NAMES)) { | ||
242 | printk ("Unknown CPU configuration (ID %02x, arch %02x), " | ||
243 | "continuing anyway...\n", | ||
244 | cpu_id, arch_id); | ||
245 | return; | ||
246 | } | ||
247 | |||
248 | printk ("CPU: %s [%02x] revision %d (%s revision %d)\n", | ||
249 | cpu_names[cpu_id], cpu_id, cpu_rev, | ||
250 | arch_names[arch_id], arch_rev); | ||
251 | printk ("CPU: MMU configuration: %s\n", mmu_types[mmu_type]); | ||
252 | printk ("CPU: features:"); | ||
253 | if (config0 & (1 << 6)) | ||
254 | printk(" fpu"); | ||
255 | if (config0 & (1 << 5)) | ||
256 | printk(" java"); | ||
257 | if (config0 & (1 << 4)) | ||
258 | printk(" perfctr"); | ||
259 | if (config0 & (1 << 3)) | ||
260 | printk(" ocd"); | ||
261 | printk("\n"); | ||
262 | } | ||
263 | |||
264 | #ifdef CONFIG_PROC_FS | ||
265 | static int c_show(struct seq_file *m, void *v) | ||
266 | { | ||
267 | unsigned int icache_size, dcache_size; | ||
268 | unsigned int cpu = smp_processor_id(); | ||
269 | |||
270 | icache_size = boot_cpu_data.icache.ways * | ||
271 | boot_cpu_data.icache.sets * | ||
272 | boot_cpu_data.icache.linesz; | ||
273 | dcache_size = boot_cpu_data.dcache.ways * | ||
274 | boot_cpu_data.dcache.sets * | ||
275 | boot_cpu_data.dcache.linesz; | ||
276 | |||
277 | seq_printf(m, "processor\t: %d\n", cpu); | ||
278 | |||
279 | if (boot_cpu_data.arch_type < NR_ARCH_NAMES) | ||
280 | seq_printf(m, "cpu family\t: %s revision %d\n", | ||
281 | arch_names[boot_cpu_data.arch_type], | ||
282 | boot_cpu_data.arch_revision); | ||
283 | if (boot_cpu_data.cpu_type < NR_CPU_NAMES) | ||
284 | seq_printf(m, "cpu type\t: %s revision %d\n", | ||
285 | cpu_names[boot_cpu_data.cpu_type], | ||
286 | boot_cpu_data.cpu_revision); | ||
287 | |||
288 | seq_printf(m, "i-cache\t\t: %dK (%u ways x %u sets x %u)\n", | ||
289 | icache_size >> 10, | ||
290 | boot_cpu_data.icache.ways, | ||
291 | boot_cpu_data.icache.sets, | ||
292 | boot_cpu_data.icache.linesz); | ||
293 | seq_printf(m, "d-cache\t\t: %dK (%u ways x %u sets x %u)\n", | ||
294 | dcache_size >> 10, | ||
295 | boot_cpu_data.dcache.ways, | ||
296 | boot_cpu_data.dcache.sets, | ||
297 | boot_cpu_data.dcache.linesz); | ||
298 | seq_printf(m, "bogomips\t: %lu.%02lu\n", | ||
299 | boot_cpu_data.loops_per_jiffy / (500000/HZ), | ||
300 | (boot_cpu_data.loops_per_jiffy / (5000/HZ)) % 100); | ||
301 | |||
302 | return 0; | ||
303 | } | ||
304 | |||
305 | static void *c_start(struct seq_file *m, loff_t *pos) | ||
306 | { | ||
307 | return *pos < 1 ? (void *)1 : NULL; | ||
308 | } | ||
309 | |||
310 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) | ||
311 | { | ||
312 | ++*pos; | ||
313 | return NULL; | ||
314 | } | ||
315 | |||
316 | static void c_stop(struct seq_file *m, void *v) | ||
317 | { | ||
318 | |||
319 | } | ||
320 | |||
321 | struct seq_operations cpuinfo_op = { | ||
322 | .start = c_start, | ||
323 | .next = c_next, | ||
324 | .stop = c_stop, | ||
325 | .show = c_show | ||
326 | }; | ||
327 | #endif /* CONFIG_PROC_FS */ | ||