96 files changed, 6746 insertions, 0 deletions

diff --git a/arch/avr32/include/asm/Kbuild b/arch/avr32/include/asm/Kbuild
new file mode 100644
index 000000000000..3136628ba8d2
--- /dev/null
+++ b/arch/avr32/include/asm/Kbuild
@@ -0,0 +1,3 @@
+include include/asm-generic/Kbuild.asm
+
+header-y        += cachectl.h
diff --git a/arch/avr32/include/asm/a.out.h b/arch/avr32/include/asm/a.out.h
new file mode 100644
index 000000000000..e46375a34a72
--- /dev/null
+++ b/arch/avr32/include/asm/a.out.h
@@ -0,0 +1,20 @@
+#ifndef __ASM_AVR32_A_OUT_H
+#define __ASM_AVR32_A_OUT_H
+
+struct exec
+{
+  unsigned long a_info;         /* Use macros N_MAGIC, etc for access */
+  unsigned a_text;              /* length of text, in bytes */
+  unsigned a_data;              /* length of data, in bytes */
+  unsigned a_bss;               /* length of uninitialized data area for file, in bytes */
+  unsigned a_syms;              /* length of symbol table data in file, in bytes */
+  unsigned a_entry;             /* start address */
+  unsigned a_trsize;            /* length of relocation info for text, in bytes */
+  unsigned a_drsize;            /* length of relocation info for data, in bytes */
+};
+
+#define N_TRSIZE(a)     ((a).a_trsize)
+#define N_DRSIZE(a)     ((a).a_drsize)
+#define N_SYMSIZE(a)    ((a).a_syms)
+
+#endif /* __ASM_AVR32_A_OUT_H */
diff --git a/arch/avr32/include/asm/addrspace.h b/arch/avr32/include/asm/addrspace.h
new file mode 100644
index 000000000000..366794858ec7
--- /dev/null
+++ b/arch/avr32/include/asm/addrspace.h
@@ -0,0 +1,43 @@
+/*
+ * Defitions for the address spaces of the AVR32 CPUs. Heavily based on
+ * include/asm-sh/addrspace.h
+ *
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_ADDRSPACE_H
+#define __ASM_AVR32_ADDRSPACE_H
+
+#ifdef CONFIG_MMU
+
+/* Memory segments when segmentation is enabled */
+#define P0SEG           0x00000000
+#define P1SEG           0x80000000
+#define P2SEG           0xa0000000
+#define P3SEG           0xc0000000
+#define P4SEG           0xe0000000
+
+/* Returns the privileged segment base of a given address */
+#define PXSEG(a)        (((unsigned long)(a)) & 0xe0000000)
+
+/* Returns the physical address of a PnSEG (n=1,2) address */
+#define PHYSADDR(a)     (((unsigned long)(a)) & 0x1fffffff)
+
+/*
+ * Map an address to a certain privileged segment
+ */
+#define P1SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) \
+                                      | P1SEG))
+#define P2SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) \
+                                      | P2SEG))
+#define P3SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) \
+                                      | P3SEG))
+#define P4SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) \
+                                      | P4SEG))
+
+#endif /* CONFIG_MMU */
+
+#endif /* __ASM_AVR32_ADDRSPACE_H */
diff --git a/arch/avr32/include/asm/asm.h b/arch/avr32/include/asm/asm.h
new file mode 100644
index 000000000000..a2c64f404b98
--- /dev/null
+++ b/arch/avr32/include/asm/asm.h
@@ -0,0 +1,102 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_ASM_H__
+#define __ASM_AVR32_ASM_H__
+
+#include <asm/sysreg.h>
+#include <asm/asm-offsets.h>
+#include <asm/thread_info.h>
+
+#define mask_interrupts         ssrf    SYSREG_GM_OFFSET
+#define mask_exceptions         ssrf    SYSREG_EM_OFFSET
+#define unmask_interrupts       csrf    SYSREG_GM_OFFSET
+#define unmask_exceptions       csrf    SYSREG_EM_OFFSET
+
+#ifdef CONFIG_FRAME_POINTER
+        .macro  save_fp
+        st.w    --sp, r7
+        .endm
+        .macro  restore_fp
+        ld.w    r7, sp++
+        .endm
+        .macro  zero_fp
+        mov     r7, 0
+        .endm
+#else
+        .macro  save_fp
+        .endm
+        .macro  restore_fp
+        .endm
+        .macro  zero_fp
+        .endm
+#endif
+        .macro  get_thread_info reg
+        mov     \reg, sp
+        andl    \reg, ~(THREAD_SIZE - 1) & 0xffff
+        .endm
+
+        /* Save and restore registers */
+        .macro  save_min sr, tmp=lr
+        pushm   lr
+        mfsr    \tmp, \sr
+        zero_fp
+        st.w    --sp, \tmp
+        .endm
+
+        .macro  restore_min sr, tmp=lr
+        ld.w    \tmp, sp++
+        mtsr    \sr, \tmp
+        popm    lr
+        .endm
+
+        .macro  save_half sr, tmp=lr
+        save_fp
+        pushm   r8-r9,r10,r11,r12,lr
+        zero_fp
+        mfsr    \tmp, \sr
+        st.w    --sp, \tmp
+        .endm
+
+        .macro  restore_half sr, tmp=lr
+        ld.w    \tmp, sp++
+        mtsr    \sr, \tmp
+        popm    r8-r9,r10,r11,r12,lr
+        restore_fp
+        .endm
+
+        .macro  save_full_user sr, tmp=lr
+        stmts   --sp, r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,sp,lr
+        st.w    --sp, lr
+        zero_fp
+        mfsr    \tmp, \sr
+        st.w    --sp, \tmp
+        .endm
+
+        .macro  restore_full_user sr, tmp=lr
+        ld.w    \tmp, sp++
+        mtsr    \sr, \tmp
+        ld.w    lr, sp++
+        ldmts   sp++, r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,sp,lr
+        .endm
+
+        /* uaccess macros */
+        .macro branch_if_kernel scratch, label
+        get_thread_info \scratch
+        ld.w    \scratch, \scratch[TI_flags]
+        bld     \scratch, TIF_USERSPACE
+        brcc    \label
+        .endm
+
+        .macro ret_if_privileged scratch, addr, size, ret
+        sub     \scratch, \size, 1
+        add     \scratch, \addr
+        retcs   \ret
+        retmi   \ret
+        .endm
+
+#endif /* __ASM_AVR32_ASM_H__ */
diff --git a/arch/avr32/include/asm/atmel-mci.h b/arch/avr32/include/asm/atmel-mci.h
new file mode 100644
index 000000000000..c2ea6e1c9aa1
--- /dev/null
+++ b/arch/avr32/include/asm/atmel-mci.h
@@ -0,0 +1,9 @@
+#ifndef __ASM_AVR32_ATMEL_MCI_H
+#define __ASM_AVR32_ATMEL_MCI_H
+
+struct mci_platform_data {
+        int                     detect_pin;
+        int                     wp_pin;
+};
+
+#endif /* __ASM_AVR32_ATMEL_MCI_H */
diff --git a/arch/avr32/include/asm/atomic.h b/arch/avr32/include/asm/atomic.h
new file mode 100644
index 000000000000..7ef3862a73d0
--- /dev/null
+++ b/arch/avr32/include/asm/atomic.h
@@ -0,0 +1,201 @@
+/*
+ * Atomic operations that C can't guarantee us.  Useful for
+ * resource counting etc.
+ *
+ * But use these as seldom as possible since they are slower than
+ * regular operations.
+ *
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_ATOMIC_H
+#define __ASM_AVR32_ATOMIC_H
+
+#include <asm/system.h>
+
+typedef struct { volatile int counter; } atomic_t;
+#define ATOMIC_INIT(i)  { (i) }
+
+#define atomic_read(v)          ((v)->counter)
+#define atomic_set(v, i)        (((v)->counter) = i)
+
+/*
+ * atomic_sub_return - subtract the atomic variable
+ * @i: integer value to subtract
+ * @v: pointer of type atomic_t
+ *
+ * Atomically subtracts @i from @v. Returns the resulting value.
+ */
+static inline int atomic_sub_return(int i, atomic_t *v)
+{
+        int result;
+
+        asm volatile(
+                "/* atomic_sub_return */\n"
+                "1:     ssrf    5\n"
+                "       ld.w    %0, %2\n"
+                "       sub     %0, %3\n"
+                "       stcond  %1, %0\n"
+                "       brne    1b"
+                : "=&r"(result), "=o"(v->counter)
+                : "m"(v->counter), "rKs21"(i)
+                : "cc");
+
+        return result;
+}
+
+/*
+ * atomic_add_return - add integer to atomic variable
+ * @i: integer value to add
+ * @v: pointer of type atomic_t
+ *
+ * Atomically adds @i to @v. Returns the resulting value.
+ */
+static inline int atomic_add_return(int i, atomic_t *v)
+{
+        int result;
+
+        if (__builtin_constant_p(i) && (i >= -1048575) && (i <= 1048576))
+                result = atomic_sub_return(-i, v);
+        else
+                asm volatile(
+                        "/* atomic_add_return */\n"
+                        "1:     ssrf    5\n"
+                        "       ld.w    %0, %1\n"
+                        "       add     %0, %3\n"
+                        "       stcond  %2, %0\n"
+                        "       brne    1b"
+                        : "=&r"(result), "=o"(v->counter)
+                        : "m"(v->counter), "r"(i)
+                        : "cc", "memory");
+
+        return result;
+}
+
+/*
+ * atomic_sub_unless - sub unless the number is a given value
+ * @v: pointer of type atomic_t
+ * @a: the amount to add to v...
+ * @u: ...unless v is equal to u.
+ *
+ * If the atomic value v is not equal to u, this function subtracts a
+ * from v, and returns non zero. If v is equal to u then it returns
+ * zero. This is done as an atomic operation.
+*/
+static inline int atomic_sub_unless(atomic_t *v, int a, int u)
+{
+        int tmp, result = 0;
+
+        asm volatile(
+                "/* atomic_sub_unless */\n"
+                "1:     ssrf    5\n"
+                "       ld.w    %0, %3\n"
+                "       cp.w    %0, %5\n"
+                "       breq    1f\n"
+                "       sub     %0, %4\n"
+                "       stcond  %2, %0\n"
+                "       brne    1b\n"
+                "       mov     %1, 1\n"
+                "1:"
+                : "=&r"(tmp), "=&r"(result), "=o"(v->counter)
+                : "m"(v->counter), "rKs21"(a), "rKs21"(u), "1"(result)
+                : "cc", "memory");
+
+        return result;
+}
+
+/*
+ * atomic_add_unless - add unless the number is a given value
+ * @v: pointer of type atomic_t
+ * @a: the amount to add to v...
+ * @u: ...unless v is equal to u.
+ *
+ * If the atomic value v is not equal to u, this function adds a to v,
+ * and returns non zero. If v is equal to u then it returns zero. This
+ * is done as an atomic operation.
+*/
+static inline int atomic_add_unless(atomic_t *v, int a, int u)
+{
+        int tmp, result;
+
+        if (__builtin_constant_p(a) && (a >= -1048575) && (a <= 1048576))
+                result = atomic_sub_unless(v, -a, u);
+        else {
+                result = 0;
+                asm volatile(
+                        "/* atomic_add_unless */\n"
+                        "1:     ssrf    5\n"
+                        "       ld.w    %0, %3\n"
+                        "       cp.w    %0, %5\n"
+                        "       breq    1f\n"
+                        "       add     %0, %4\n"
+                        "       stcond  %2, %0\n"
+                        "       brne    1b\n"
+                        "       mov     %1, 1\n"
+                        "1:"
+                        : "=&r"(tmp), "=&r"(result), "=o"(v->counter)
+                        : "m"(v->counter), "r"(a), "ir"(u), "1"(result)
+                        : "cc", "memory");
+        }
+
+        return result;
+}
+
+/*
+ * atomic_sub_if_positive - conditionally subtract integer from atomic variable
+ * @i: integer value to subtract
+ * @v: pointer of type atomic_t
+ *
+ * Atomically test @v and subtract @i if @v is greater or equal than @i.
+ * The function returns the old value of @v minus @i.
+ */
+static inline int atomic_sub_if_positive(int i, atomic_t *v)
+{
+        int result;
+
+        asm volatile(
+                "/* atomic_sub_if_positive */\n"
+                "1:     ssrf    5\n"
+                "       ld.w    %0, %2\n"
+                "       sub     %0, %3\n"
+                "       brlt    1f\n"
+                "       stcond  %1, %0\n"
+                "       brne    1b\n"
+                "1:"
+                : "=&r"(result), "=o"(v->counter)
+                : "m"(v->counter), "ir"(i)
+                : "cc", "memory");
+
+        return result;
+}
+
+#define atomic_xchg(v, new)     (xchg(&((v)->counter), new))
+#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
+
+#define atomic_sub(i, v)        (void)atomic_sub_return(i, v)
+#define atomic_add(i, v)        (void)atomic_add_return(i, v)
+#define atomic_dec(v)           atomic_sub(1, (v))
+#define atomic_inc(v)           atomic_add(1, (v))
+
+#define atomic_dec_return(v)    atomic_sub_return(1, v)
+#define atomic_inc_return(v)    atomic_add_return(1, v)
+
+#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
+#define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0)
+#define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0)
+#define atomic_add_negative(i, v) (atomic_add_return(i, v) < 0)
+
+#define atomic_inc_not_zero(v)  atomic_add_unless(v, 1, 0)
+#define atomic_dec_if_positive(v) atomic_sub_if_positive(1, v)
+
+#define smp_mb__before_atomic_dec()     barrier()
+#define smp_mb__after_atomic_dec()      barrier()
+#define smp_mb__before_atomic_inc()     barrier()
+#define smp_mb__after_atomic_inc()      barrier()
+
+#include <asm-generic/atomic.h>
+
+#endif /*  __ASM_AVR32_ATOMIC_H */
diff --git a/arch/avr32/include/asm/auxvec.h b/arch/avr32/include/asm/auxvec.h
new file mode 100644
index 000000000000..d5dd435bf8f4
--- /dev/null
+++ b/arch/avr32/include/asm/auxvec.h
@@ -0,0 +1,4 @@
+#ifndef __ASM_AVR32_AUXVEC_H
+#define __ASM_AVR32_AUXVEC_H
+
+#endif /* __ASM_AVR32_AUXVEC_H */
diff --git a/arch/avr32/include/asm/bitops.h b/arch/avr32/include/asm/bitops.h
new file mode 100644
index 000000000000..1a50b69b1a19
--- /dev/null
+++ b/arch/avr32/include/asm/bitops.h
@@ -0,0 +1,301 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_BITOPS_H
+#define __ASM_AVR32_BITOPS_H
+
+#ifndef _LINUX_BITOPS_H
+#error only <linux/bitops.h> can be included directly
+#endif
+
+#include <asm/byteorder.h>
+#include <asm/system.h>
+
+/*
+ * clear_bit() doesn't provide any barrier for the compiler
+ */
+#define smp_mb__before_clear_bit()      barrier()
+#define smp_mb__after_clear_bit()       barrier()
+
+/*
+ * set_bit - Atomically set a bit in memory
+ * @nr: the bit to set
+ * @addr: the address to start counting from
+ *
+ * This function is atomic and may not be reordered.  See __set_bit()
+ * if you do not require the atomic guarantees.
+ *
+ * Note that @nr may be almost arbitrarily large; this function is not
+ * restricted to acting on a single-word quantity.
+ */
+static inline void set_bit(int nr, volatile void * addr)
+{
+        unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG;
+        unsigned long tmp;
+
+        if (__builtin_constant_p(nr)) {
+                asm volatile(
+                        "1:     ssrf    5\n"
+                        "       ld.w    %0, %2\n"
+                        "       sbr     %0, %3\n"
+                        "       stcond  %1, %0\n"
+                        "       brne    1b"
+                        : "=&r"(tmp), "=o"(*p)
+                        : "m"(*p), "i"(nr)
+                        : "cc");
+        } else {
+                unsigned long mask = 1UL << (nr % BITS_PER_LONG);
+                asm volatile(
+                        "1:     ssrf    5\n"
+                        "       ld.w    %0, %2\n"
+                        "       or      %0, %3\n"
+                        "       stcond  %1, %0\n"
+                        "       brne    1b"
+                        : "=&r"(tmp), "=o"(*p)
+                        : "m"(*p), "r"(mask)
+                        : "cc");
+        }
+}
+
+/*
+ * clear_bit - Clears a bit in memory
+ * @nr: Bit to clear
+ * @addr: Address to start counting from
+ *
+ * clear_bit() is atomic and may not be reordered.  However, it does
+ * not contain a memory barrier, so if it is used for locking purposes,
+ * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
+ * in order to ensure changes are visible on other processors.
+ */
+static inline void clear_bit(int nr, volatile void * addr)
+{
+        unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG;
+        unsigned long tmp;
+
+        if (__builtin_constant_p(nr)) {
+                asm volatile(
+                        "1:     ssrf    5\n"
+                        "       ld.w    %0, %2\n"
+                        "       cbr     %0, %3\n"
+                        "       stcond  %1, %0\n"
+                        "       brne    1b"
+                        : "=&r"(tmp), "=o"(*p)
+                        : "m"(*p), "i"(nr)
+                        : "cc");
+        } else {
+                unsigned long mask = 1UL << (nr % BITS_PER_LONG);
+                asm volatile(
+                        "1:     ssrf    5\n"
+                        "       ld.w    %0, %2\n"
+                        "       andn    %0, %3\n"
+                        "       stcond  %1, %0\n"
+                        "       brne    1b"
+                        : "=&r"(tmp), "=o"(*p)
+                        : "m"(*p), "r"(mask)
+                        : "cc");
+        }
+}
+
+/*
+ * change_bit - Toggle a bit in memory
+ * @nr: Bit to change
+ * @addr: Address to start counting from
+ *
+ * change_bit() is atomic and may not be reordered.
+ * Note that @nr may be almost arbitrarily large; this function is not
+ * restricted to acting on a single-word quantity.
+ */
+static inline void change_bit(int nr, volatile void * addr)
+{
+        unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG;
+        unsigned long mask = 1UL << (nr % BITS_PER_LONG);
+        unsigned long tmp;
+
+        asm volatile(
+                "1:     ssrf    5\n"
+                "       ld.w    %0, %2\n"
+                "       eor     %0, %3\n"
+                "       stcond  %1, %0\n"
+                "       brne    1b"
+                : "=&r"(tmp), "=o"(*p)
+                : "m"(*p), "r"(mask)
+                : "cc");
+}
+
+/*
+ * test_and_set_bit - Set a bit and return its old value
+ * @nr: Bit to set
+ * @addr: Address to count from
+ *
+ * This operation is atomic and cannot be reordered.
+ * It also implies a memory barrier.
+ */
+static inline int test_and_set_bit(int nr, volatile void * addr)
+{
+        unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG;
+        unsigned long mask = 1UL << (nr % BITS_PER_LONG);
+        unsigned long tmp, old;
+
+        if (__builtin_constant_p(nr)) {
+                asm volatile(
+                        "1:     ssrf    5\n"
+                        "       ld.w    %0, %3\n"
+                        "       mov     %2, %0\n"
+                        "       sbr     %0, %4\n"
+                        "       stcond  %1, %0\n"
+                        "       brne    1b"
+                        : "=&r"(tmp), "=o"(*p), "=&r"(old)
+                        : "m"(*p), "i"(nr)
+                        : "memory", "cc");
+        } else {
+                asm volatile(
+                        "1:     ssrf    5\n"
+                        "       ld.w    %2, %3\n"
+                        "       or      %0, %2, %4\n"
+                        "       stcond  %1, %0\n"
+                        "       brne    1b"
+                        : "=&r"(tmp), "=o"(*p), "=&r"(old)
+                        : "m"(*p), "r"(mask)
+                        : "memory", "cc");
+        }
+
+        return (old & mask) != 0;
+}
+
+/*
+ * test_and_clear_bit - Clear a bit and return its old value
+ * @nr: Bit to clear
+ * @addr: Address to count from
+ *
+ * This operation is atomic and cannot be reordered.
+ * It also implies a memory barrier.
+ */
+static inline int test_and_clear_bit(int nr, volatile void * addr)
+{
+        unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG;
+        unsigned long mask = 1UL << (nr % BITS_PER_LONG);
+        unsigned long tmp, old;
+
+        if (__builtin_constant_p(nr)) {
+                asm volatile(
+                        "1:     ssrf    5\n"
+                        "       ld.w    %0, %3\n"
+                        "       mov     %2, %0\n"
+                        "       cbr     %0, %4\n"
+                        "       stcond  %1, %0\n"
+                        "       brne    1b"
+                        : "=&r"(tmp), "=o"(*p), "=&r"(old)
+                        : "m"(*p), "i"(nr)
+                        : "memory", "cc");
+        } else {
+                asm volatile(
+                        "1:     ssrf    5\n"
+                        "       ld.w    %0, %3\n"
+                        "       mov     %2, %0\n"
+                        "       andn    %0, %4\n"
+                        "       stcond  %1, %0\n"
+                        "       brne    1b"
+                        : "=&r"(tmp), "=o"(*p), "=&r"(old)
+                        : "m"(*p), "r"(mask)
+                        : "memory", "cc");
+        }
+
+        return (old & mask) != 0;
+}
+
+/*
+ * test_and_change_bit - Change a bit and return its old value
+ * @nr: Bit to change
+ * @addr: Address to count from
+ *
+ * This operation is atomic and cannot be reordered.
+ * It also implies a memory barrier.
+ */
+static inline int test_and_change_bit(int nr, volatile void * addr)
+{
+        unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG;
+        unsigned long mask = 1UL << (nr % BITS_PER_LONG);
+        unsigned long tmp, old;
+
+        asm volatile(
+                "1:     ssrf    5\n"
+                "       ld.w    %2, %3\n"
+                "       eor     %0, %2, %4\n"
+                "       stcond  %1, %0\n"
+                "       brne    1b"
+                : "=&r"(tmp), "=o"(*p), "=&r"(old)
+                : "m"(*p), "r"(mask)
+                : "memory", "cc");
+
+        return (old & mask) != 0;
+}
+
+#include <asm-generic/bitops/non-atomic.h>
+
+/* Find First bit Set */
+static inline unsigned long __ffs(unsigned long word)
+{
+        unsigned long result;
+
+        asm("brev %1\n\t"
+            "clz %0,%1"
+            : "=r"(result), "=&r"(word)
+            : "1"(word));
+        return result;
+}
+
+/* Find First Zero */
+static inline unsigned long ffz(unsigned long word)
+{
+        return __ffs(~word);
+}
+
+/* Find Last bit Set */
+static inline int fls(unsigned long word)
+{
+        unsigned long result;
+
+        asm("clz %0,%1" : "=r"(result) : "r"(word));
+        return 32 - result;
+}
+
+unsigned long find_first_zero_bit(const unsigned long *addr,
+                                  unsigned long size);
+unsigned long find_next_zero_bit(const unsigned long *addr,
+                                 unsigned long size,
+                                 unsigned long offset);
+unsigned long find_first_bit(const unsigned long *addr,
+                             unsigned long size);
+unsigned long find_next_bit(const unsigned long *addr,
+                                 unsigned long size,
+                                 unsigned long offset);
+
+/*
+ * ffs: find first bit set. This is defined the same way as
+ * the libc and compiler builtin ffs routines, therefore
+ * differs in spirit from the above ffz (man ffs).
+ *
+ * The difference is that bit numbering starts at 1, and if no bit is set,
+ * the function returns 0.
+ */
+static inline int ffs(unsigned long word)
+{
+        if(word == 0)
+                return 0;
+        return __ffs(word) + 1;
+}
+
+#include <asm-generic/bitops/fls64.h>
+#include <asm-generic/bitops/sched.h>
+#include <asm-generic/bitops/hweight.h>
+#include <asm-generic/bitops/lock.h>
+
+#include <asm-generic/bitops/ext2-non-atomic.h>
+#include <asm-generic/bitops/ext2-atomic.h>
+#include <asm-generic/bitops/minix-le.h>
+
+#endif /* __ASM_AVR32_BITOPS_H */
diff --git a/arch/avr32/include/asm/bug.h b/arch/avr32/include/asm/bug.h
new file mode 100644
index 000000000000..331d45bab18f
--- /dev/null
+++ b/arch/avr32/include/asm/bug.h
@@ -0,0 +1,73 @@
+/*
+ * Copyright (C) 2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_BUG_H
+#define __ASM_AVR32_BUG_H
+
+#ifdef CONFIG_BUG
+
+/*
+ * According to our Chief Architect, this compact opcode is very
+ * unlikely to ever be implemented.
+ */
+#define AVR32_BUG_OPCODE        0x5df0
+
+#ifdef CONFIG_DEBUG_BUGVERBOSE
+
+#define _BUG_OR_WARN(flags)                                             \
+        asm volatile(                                                   \
+                "1:     .hword  %0\n"                                   \
+                "       .section __bug_table,\"a\",@progbits\n"         \
+                "2:     .long   1b\n"                                   \
+                "       .long   %1\n"                                   \
+                "       .short  %2\n"                                   \
+                "       .short  %3\n"                                   \
+                "       .org    2b + %4\n"                              \
+                "       .previous"                                      \
+                :                                                       \
+                : "i"(AVR32_BUG_OPCODE), "i"(__FILE__),                 \
+                  "i"(__LINE__), "i"(flags),                            \
+                  "i"(sizeof(struct bug_entry)))
+
+#else
+
+#define _BUG_OR_WARN(flags)                                             \
+        asm volatile(                                                   \
+                "1:     .hword  %0\n"                                   \
+                "       .section __bug_table,\"a\",@progbits\n"         \
+                "2:     .long   1b\n"                                   \
+                "       .short  %1\n"                                   \
+                "       .org    2b + %2\n"                              \
+                "       .previous"                                      \
+                :                                                       \
+                : "i"(AVR32_BUG_OPCODE), "i"(flags),                    \
+                  "i"(sizeof(struct bug_entry)))
+
+#endif /* CONFIG_DEBUG_BUGVERBOSE */
+
+#define BUG()                                                           \
+        do {                                                            \
+                _BUG_OR_WARN(0);                                        \
+                for (;;);                                               \
+        } while (0)
+
+#define WARN_ON(condition)                                                      \
+        ({                                                              \
+                int __ret_warn_on = !!(condition);                      \
+                if (unlikely(__ret_warn_on))                            \
+                        _BUG_OR_WARN(BUGFLAG_WARNING);                  \
+                unlikely(__ret_warn_on);                                \
+        })
+
+#define HAVE_ARCH_BUG
+#define HAVE_ARCH_WARN_ON
+
+#endif /* CONFIG_BUG */
+
+#include <asm-generic/bug.h>
+
+#endif /* __ASM_AVR32_BUG_H */
diff --git a/arch/avr32/include/asm/bugs.h b/arch/avr32/include/asm/bugs.h
new file mode 100644
index 000000000000..7635e770622e
--- /dev/null
+++ b/arch/avr32/include/asm/bugs.h
@@ -0,0 +1,15 @@
+/*
+ * This is included by init/main.c to check for architecture-dependent bugs.
+ *
+ * Needs:
+ *      void check_bugs(void);
+ */
+#ifndef __ASM_AVR32_BUGS_H
+#define __ASM_AVR32_BUGS_H
+
+static void __init check_bugs(void)
+{
+        cpu_data->loops_per_jiffy = loops_per_jiffy;
+}
+
+#endif /* __ASM_AVR32_BUGS_H */
diff --git a/arch/avr32/include/asm/byteorder.h b/arch/avr32/include/asm/byteorder.h
new file mode 100644
index 000000000000..d77b48ba7338
--- /dev/null
+++ b/arch/avr32/include/asm/byteorder.h
@@ -0,0 +1,31 @@
+/*
+ * AVR32 endian-conversion functions.
+ */
+#ifndef __ASM_AVR32_BYTEORDER_H
+#define __ASM_AVR32_BYTEORDER_H
+
+#include <asm/types.h>
+#include <linux/compiler.h>
+
+#ifdef __CHECKER__
+extern unsigned long __builtin_bswap_32(unsigned long x);
+extern unsigned short __builtin_bswap_16(unsigned short x);
+#endif
+
+/*
+ * avr32-linux-gcc versions earlier than 4.2 improperly sign-extends
+ * the result.
+ */
+#if !(__GNUC__ == 4 && __GNUC_MINOR__ < 2)
+#define __arch__swab32(x) __builtin_bswap_32(x)
+#define __arch__swab16(x) __builtin_bswap_16(x)
+#endif
+
+#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
+# define __BYTEORDER_HAS_U64__
+# define __SWAB_64_THRU_32__
+#endif
+
+#include <linux/byteorder/big_endian.h>
+
+#endif /* __ASM_AVR32_BYTEORDER_H */
diff --git a/arch/avr32/include/asm/cache.h b/arch/avr32/include/asm/cache.h
new file mode 100644
index 000000000000..d3cf35ab11ab
--- /dev/null
+++ b/arch/avr32/include/asm/cache.h
@@ -0,0 +1,38 @@
+#ifndef __ASM_AVR32_CACHE_H
+#define __ASM_AVR32_CACHE_H
+
+#define L1_CACHE_SHIFT 5
+#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
+
+/*
+ * Memory returned by kmalloc() may be used for DMA, so we must make
+ * sure that all such allocations are cache aligned. Otherwise,
+ * unrelated code may cause parts of the buffer to be read into the
+ * cache before the transfer is done, causing old data to be seen by
+ * the CPU.
+ */
+#define ARCH_KMALLOC_MINALIGN   L1_CACHE_BYTES
+
+#ifndef __ASSEMBLER__
+struct cache_info {
+        unsigned int ways;
+        unsigned int sets;
+        unsigned int linesz;
+};
+#endif /* __ASSEMBLER */
+
+/* Cache operation constants */
+#define ICACHE_FLUSH            0x00
+#define ICACHE_INVALIDATE       0x01
+#define ICACHE_LOCK             0x02
+#define ICACHE_UNLOCK           0x03
+#define ICACHE_PREFETCH         0x04
+
+#define DCACHE_FLUSH            0x08
+#define DCACHE_LOCK             0x09
+#define DCACHE_UNLOCK           0x0a
+#define DCACHE_INVALIDATE       0x0b
+#define DCACHE_CLEAN            0x0c
+#define DCACHE_CLEAN_INVAL      0x0d
+
+#endif /* __ASM_AVR32_CACHE_H */
diff --git a/arch/avr32/include/asm/cachectl.h b/arch/avr32/include/asm/cachectl.h
new file mode 100644
index 000000000000..4faf1ce60061
--- /dev/null
+++ b/arch/avr32/include/asm/cachectl.h
@@ -0,0 +1,11 @@
+#ifndef __ASM_AVR32_CACHECTL_H
+#define __ASM_AVR32_CACHECTL_H
+
+/*
+ * Operations that can be performed through the cacheflush system call
+ */
+
+/* Clean the data cache, then invalidate the icache */
+#define CACHE_IFLUSH    0
+
+#endif /* __ASM_AVR32_CACHECTL_H */
diff --git a/arch/avr32/include/asm/cacheflush.h b/arch/avr32/include/asm/cacheflush.h
new file mode 100644
index 000000000000..670674749b20
--- /dev/null
+++ b/arch/avr32/include/asm/cacheflush.h
@@ -0,0 +1,131 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_CACHEFLUSH_H
+#define __ASM_AVR32_CACHEFLUSH_H
+
+/* Keep includes the same across arches.  */
+#include <linux/mm.h>
+
+#define CACHE_OP_ICACHE_INVALIDATE      0x01
+#define CACHE_OP_DCACHE_INVALIDATE      0x0b
+#define CACHE_OP_DCACHE_CLEAN           0x0c
+#define CACHE_OP_DCACHE_CLEAN_INVAL     0x0d
+
+/*
+ * Invalidate any cacheline containing virtual address vaddr without
+ * writing anything back to memory.
+ *
+ * Note that this function may corrupt unrelated data structures when
+ * applied on buffers that are not cacheline aligned in both ends.
+ */
+static inline void invalidate_dcache_line(void *vaddr)
+{
+        asm volatile("cache %0[0], %1"
+                     :
+                     : "r"(vaddr), "n"(CACHE_OP_DCACHE_INVALIDATE)
+                     : "memory");
+}
+
+/*
+ * Make sure any cacheline containing virtual address vaddr is written
+ * to memory.
+ */
+static inline void clean_dcache_line(void *vaddr)
+{
+        asm volatile("cache %0[0], %1"
+                     :
+                     : "r"(vaddr), "n"(CACHE_OP_DCACHE_CLEAN)
+                     : "memory");
+}
+
+/*
+ * Make sure any cacheline containing virtual address vaddr is written
+ * to memory and then invalidate it.
+ */
+static inline void flush_dcache_line(void *vaddr)
+{
+        asm volatile("cache %0[0], %1"
+                     :
+                     : "r"(vaddr), "n"(CACHE_OP_DCACHE_CLEAN_INVAL)
+                     : "memory");
+}
+
+/*
+ * Invalidate any instruction cacheline containing virtual address
+ * vaddr.
+ */
+static inline void invalidate_icache_line(void *vaddr)
+{
+        asm volatile("cache %0[0], %1"
+                     :
+                     : "r"(vaddr), "n"(CACHE_OP_ICACHE_INVALIDATE)
+                     : "memory");
+}
+
+/*
+ * Applies the above functions on all lines that are touched by the
+ * specified virtual address range.
+ */
+void invalidate_dcache_region(void *start, size_t len);
+void clean_dcache_region(void *start, size_t len);
+void flush_dcache_region(void *start, size_t len);
+void invalidate_icache_region(void *start, size_t len);
+
+/*
+ * Make sure any pending writes are completed before continuing.
+ */
+#define flush_write_buffer() asm volatile("sync 0" : : : "memory")
+
+/*
+ * The following functions are called when a virtual mapping changes.
+ * We do not need to flush anything in this case.
+ */
+#define flush_cache_all()                       do { } while (0)
+#define flush_cache_mm(mm)                      do { } while (0)
+#define flush_cache_dup_mm(mm)                  do { } while (0)
+#define flush_cache_range(vma, start, end)      do { } while (0)
+#define flush_cache_page(vma, vmaddr, pfn)      do { } while (0)
+#define flush_cache_vmap(start, end)            do { } while (0)
+#define flush_cache_vunmap(start, end)          do { } while (0)
+
+/*
+ * I think we need to implement this one to be able to reliably
+ * execute pages from RAMDISK. However, if we implement the
+ * flush_dcache_*() functions, it might not be needed anymore.
+ *
+ * #define flush_icache_page(vma, page)         do { } while (0)
+ */
+extern void flush_icache_page(struct vm_area_struct *vma, struct page *page);
+
+/*
+ * These are (I think) related to D-cache aliasing.  We might need to
+ * do something here, but only for certain configurations.  No such
+ * configurations exist at this time.
+ */
+#define flush_dcache_page(page)                 do { } while (0)
+#define flush_dcache_mmap_lock(page)            do { } while (0)
+#define flush_dcache_mmap_unlock(page)          do { } while (0)
+
+/*
+ * These are for I/D cache coherency. In this case, we do need to
+ * flush with all configurations.
+ */
+extern void flush_icache_range(unsigned long start, unsigned long end);
+
+extern void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
+                unsigned long vaddr, void *dst, const void *src,
+                unsigned long len);
+
+static inline void copy_from_user_page(struct vm_area_struct *vma,
+                struct page *page, unsigned long vaddr, void *dst,
+                const void *src, unsigned long len)
+{
+        memcpy(dst, src, len);
+}
+
+#endif /* __ASM_AVR32_CACHEFLUSH_H */
diff --git a/arch/avr32/include/asm/checksum.h b/arch/avr32/include/asm/checksum.h
new file mode 100644
index 000000000000..4ddbfd2486af
--- /dev/null
+++ b/arch/avr32/include/asm/checksum.h
@@ -0,0 +1,152 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_CHECKSUM_H
+#define __ASM_AVR32_CHECKSUM_H
+
+/*
+ * computes the checksum of a memory block at buff, length len,
+ * and adds in "sum" (32-bit)
+ *
+ * returns a 32-bit number suitable for feeding into itself
+ * or csum_tcpudp_magic
+ *
+ * this function must be called with even lengths, except
+ * for the last fragment, which may be odd
+ *
+ * it's best to have buff aligned on a 32-bit boundary
+ */
+__wsum csum_partial(const void *buff, int len, __wsum sum);
+
+/*
+ * the same as csum_partial, but copies from src while it
+ * checksums, and handles user-space pointer exceptions correctly, when needed.
+ *
+ * here even more important to align src and dst on a 32-bit (or even
+ * better 64-bit) boundary
+ */
+__wsum csum_partial_copy_generic(const void *src, void *dst, int len,
+                                       __wsum sum, int *src_err_ptr,
+                                       int *dst_err_ptr);
+
+/*
+ *      Note: when you get a NULL pointer exception here this means someone
+ *      passed in an incorrect kernel address to one of these functions.
+ *
+ *      If you use these functions directly please don't forget the
+ *      access_ok().
+ */
+static inline
+__wsum csum_partial_copy_nocheck(const void *src, void *dst,
+                                       int len, __wsum sum)
+{
+        return csum_partial_copy_generic(src, dst, len, sum, NULL, NULL);
+}
+
+static inline
+__wsum csum_partial_copy_from_user(const void __user *src, void *dst,
+                                          int len, __wsum sum, int *err_ptr)
+{
+        return csum_partial_copy_generic((const void __force *)src, dst, len,
+                                         sum, err_ptr, NULL);
+}
+
+/*
+ *      This is a version of ip_compute_csum() optimized for IP headers,
+ *      which always checksum on 4 octet boundaries.
+ */
+static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
+{
+        unsigned int sum, tmp;
+
+        __asm__ __volatile__(
+                "       ld.w    %0, %1++\n"
+                "       ld.w    %3, %1++\n"
+                "       sub     %2, 4\n"
+                "       add     %0, %3\n"
+                "       ld.w    %3, %1++\n"
+                "       adc     %0, %0, %3\n"
+                "       ld.w    %3, %1++\n"
+                "       adc     %0, %0, %3\n"
+                "       acr     %0\n"
+                "1:     ld.w    %3, %1++\n"
+                "       add     %0, %3\n"
+                "       acr     %0\n"
+                "       sub     %2, 1\n"
+                "       brne    1b\n"
+                "       lsl     %3, %0, 16\n"
+                "       andl    %0, 0\n"
+                "       mov     %2, 0xffff\n"
+                "       add     %0, %3\n"
+                "       adc     %0, %0, %2\n"
+                "       com     %0\n"
+                "       lsr     %0, 16\n"
+                : "=r"(sum), "=r"(iph), "=r"(ihl), "=r"(tmp)
+                : "1"(iph), "2"(ihl)
+                : "memory", "cc");
+        return (__force __sum16)sum;
+}
+
+/*
+ *      Fold a partial checksum
+ */
+
+static inline __sum16 csum_fold(__wsum sum)
+{
+        unsigned int tmp;
+
+        asm("   bfextu  %1, %0, 0, 16\n"
+            "   lsr     %0, 16\n"
+            "   add     %0, %1\n"
+            "   bfextu  %1, %0, 16, 16\n"
+            "   add     %0, %1"
+            : "=&r"(sum), "=&r"(tmp)
+            : "0"(sum));
+
+        return (__force __sum16)~sum;
+}
+
+static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
+                                               unsigned short len,
+                                               unsigned short proto,
+                                               __wsum sum)
+{
+        asm("   add     %0, %1\n"
+            "   adc     %0, %0, %2\n"
+            "   adc     %0, %0, %3\n"
+            "   acr     %0"
+            : "=r"(sum)
+            : "r"(daddr), "r"(saddr), "r"(len + proto),
+              "0"(sum)
+            : "cc");
+
+        return sum;
+}
+
+/*
+ * computes the checksum of the TCP/UDP pseudo-header
+ * returns a 16-bit checksum, already complemented
+ */
+static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
+                                                   unsigned short len,
+                                                   unsigned short proto,
+                                                   __wsum sum)
+{
+        return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
+}
+
+/*
+ * this routine is used for miscellaneous IP-like checksums, mainly
+ * in icmp.c
+ */
+
+static inline __sum16 ip_compute_csum(const void *buff, int len)
+{
+    return csum_fold(csum_partial(buff, len, 0));
+}
+
+#endif /* __ASM_AVR32_CHECKSUM_H */
diff --git a/arch/avr32/include/asm/cputime.h b/arch/avr32/include/asm/cputime.h
new file mode 100644
index 000000000000..e87e0f81cbeb
--- /dev/null
+++ b/arch/avr32/include/asm/cputime.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_AVR32_CPUTIME_H
+#define __ASM_AVR32_CPUTIME_H
+
+#include <asm-generic/cputime.h>
+
+#endif /* __ASM_AVR32_CPUTIME_H */
diff --git a/arch/avr32/include/asm/current.h b/arch/avr32/include/asm/current.h
new file mode 100644
index 000000000000..c7b0549eab8a
--- /dev/null
+++ b/arch/avr32/include/asm/current.h
@@ -0,0 +1,15 @@
+#ifndef __ASM_AVR32_CURRENT_H
+#define __ASM_AVR32_CURRENT_H
+
+#include <linux/thread_info.h>
+
+struct task_struct;
+
+inline static struct task_struct * get_current(void)
+{
+        return current_thread_info()->task;
+}
+
+#define current get_current()
+
+#endif /* __ASM_AVR32_CURRENT_H */
diff --git a/arch/avr32/include/asm/delay.h b/arch/avr32/include/asm/delay.h
new file mode 100644
index 000000000000..a0ed9a9839a5
--- /dev/null
+++ b/arch/avr32/include/asm/delay.h
@@ -0,0 +1,26 @@
+#ifndef __ASM_AVR32_DELAY_H
+#define __ASM_AVR32_DELAY_H
+
+/*
+ * Copyright (C) 1993 Linus Torvalds
+ *
+ * Delay routines calling functions in arch/avr32/lib/delay.c
+ */
+
+extern void __bad_udelay(void);
+extern void __bad_ndelay(void);
+
+extern void __udelay(unsigned long usecs);
+extern void __ndelay(unsigned long nsecs);
+extern void __const_udelay(unsigned long xloops);
+extern void __delay(unsigned long loops);
+
+#define udelay(n) (__builtin_constant_p(n) ? \
+        ((n) > 20000 ? __bad_udelay() : __const_udelay((n) * 0x10c6ul)) : \
+        __udelay(n))
+
+#define ndelay(n) (__builtin_constant_p(n) ? \
+        ((n) > 20000 ? __bad_ndelay() : __const_udelay((n) * 5ul)) : \
+        __ndelay(n))
+
+#endif /* __ASM_AVR32_DELAY_H */
diff --git a/arch/avr32/include/asm/device.h b/arch/avr32/include/asm/device.h
new file mode 100644
index 000000000000..d8f9872b0e2d
--- /dev/null
+++ b/arch/avr32/include/asm/device.h
@@ -0,0 +1,7 @@
+/*
+ * Arch specific extensions to struct device
+ *
+ * This file is released under the GPLv2
+ */
+#include <asm-generic/device.h>
+
diff --git a/arch/avr32/include/asm/div64.h b/arch/avr32/include/asm/div64.h
new file mode 100644
index 000000000000..d7ddd4fdeca6
--- /dev/null
+++ b/arch/avr32/include/asm/div64.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_AVR32_DIV64_H
+#define __ASM_AVR32_DIV64_H
+
+#include <asm-generic/div64.h>
+
+#endif /* __ASM_AVR32_DIV64_H */
diff --git a/arch/avr32/include/asm/dma-mapping.h b/arch/avr32/include/asm/dma-mapping.h
new file mode 100644
index 000000000000..0399359ab5d8
--- /dev/null
+++ b/arch/avr32/include/asm/dma-mapping.h
@@ -0,0 +1,349 @@
+#ifndef __ASM_AVR32_DMA_MAPPING_H
+#define __ASM_AVR32_DMA_MAPPING_H
+
+#include <linux/mm.h>
+#include <linux/device.h>
+#include <linux/scatterlist.h>
+#include <asm/processor.h>
+#include <asm/cacheflush.h>
+#include <asm/io.h>
+
+extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
+        int direction);
+
+/*
+ * Return whether the given device DMA address mask can be supported
+ * properly.  For example, if your device can only drive the low 24-bits
+ * during bus mastering, then you would pass 0x00ffffff as the mask
+ * to this function.
+ */
+static inline int dma_supported(struct device *dev, u64 mask)
+{
+        /* Fix when needed. I really don't know of any limitations */
+        return 1;
+}
+
+static inline int dma_set_mask(struct device *dev, u64 dma_mask)
+{
+        if (!dev->dma_mask || !dma_supported(dev, dma_mask))
+                return -EIO;
+
+        *dev->dma_mask = dma_mask;
+        return 0;
+}
+
+/*
+ * dma_map_single can't fail as it is implemented now.
+ */
+static inline int dma_mapping_error(struct device *dev, dma_addr_t addr)
+{
+        return 0;
+}
+
+/**
+ * dma_alloc_coherent - allocate consistent memory for DMA
+ * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
+ * @size: required memory size
+ * @handle: bus-specific DMA address
+ *
+ * Allocate some uncached, unbuffered memory for a device for
+ * performing DMA.  This function allocates pages, and will
+ * return the CPU-viewed address, and sets @handle to be the
+ * device-viewed address.
+ */
+extern void *dma_alloc_coherent(struct device *dev, size_t size,
+                                dma_addr_t *handle, gfp_t gfp);
+
+/**
+ * dma_free_coherent - free memory allocated by dma_alloc_coherent
+ * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
+ * @size: size of memory originally requested in dma_alloc_coherent
+ * @cpu_addr: CPU-view address returned from dma_alloc_coherent
+ * @handle: device-view address returned from dma_alloc_coherent
+ *
+ * Free (and unmap) a DMA buffer previously allocated by
+ * dma_alloc_coherent().
+ *
+ * References to memory and mappings associated with cpu_addr/handle
+ * during and after this call executing are illegal.
+ */
+extern void dma_free_coherent(struct device *dev, size_t size,
+                              void *cpu_addr, dma_addr_t handle);
+
+/**
+ * dma_alloc_writecombine - allocate write-combining memory for DMA
+ * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
+ * @size: required memory size
+ * @handle: bus-specific DMA address
+ *
+ * Allocate some uncached, buffered memory for a device for
+ * performing DMA.  This function allocates pages, and will
+ * return the CPU-viewed address, and sets @handle to be the
+ * device-viewed address.
+ */
+extern void *dma_alloc_writecombine(struct device *dev, size_t size,
+                                    dma_addr_t *handle, gfp_t gfp);
+
+/**
+ * dma_free_coherent - free memory allocated by dma_alloc_writecombine
+ * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
+ * @size: size of memory originally requested in dma_alloc_writecombine
+ * @cpu_addr: CPU-view address returned from dma_alloc_writecombine
+ * @handle: device-view address returned from dma_alloc_writecombine
+ *
+ * Free (and unmap) a DMA buffer previously allocated by
+ * dma_alloc_writecombine().
+ *
+ * References to memory and mappings associated with cpu_addr/handle
+ * during and after this call executing are illegal.
+ */
+extern void dma_free_writecombine(struct device *dev, size_t size,
+                                  void *cpu_addr, dma_addr_t handle);
+
+/**
+ * dma_map_single - map a single buffer for streaming DMA
+ * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
+ * @cpu_addr: CPU direct mapped address of buffer
+ * @size: size of buffer to map
+ * @dir: DMA transfer direction
+ *
+ * Ensure that any data held in the cache is appropriately discarded
+ * or written back.
+ *
+ * The device owns this memory once this call has completed.  The CPU
+ * can regain ownership by calling dma_unmap_single() or dma_sync_single().
+ */
+static inline dma_addr_t
+dma_map_single(struct device *dev, void *cpu_addr, size_t size,
+               enum dma_data_direction direction)
+{
+        dma_cache_sync(dev, cpu_addr, size, direction);
+        return virt_to_bus(cpu_addr);
+}
+
+/**
+ * dma_unmap_single - unmap a single buffer previously mapped
+ * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
+ * @handle: DMA address of buffer
+ * @size: size of buffer to map
+ * @dir: DMA transfer direction
+ *
+ * Unmap a single streaming mode DMA translation.  The handle and size
+ * must match what was provided in the previous dma_map_single() call.
+ * All other usages are undefined.
+ *
+ * After this call, reads by the CPU to the buffer are guaranteed to see
+ * whatever the device wrote there.
+ */
+static inline void
+dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
+                 enum dma_data_direction direction)
+{
+
+}
+
+/**
+ * dma_map_page - map a portion of a page for streaming DMA
+ * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
+ * @page: page that buffer resides in
+ * @offset: offset into page for start of buffer
+ * @size: size of buffer to map
+ * @dir: DMA transfer direction
+ *
+ * Ensure that any data held in the cache is appropriately discarded
+ * or written back.
+ *
+ * The device owns this memory once this call has completed.  The CPU
+ * can regain ownership by calling dma_unmap_page() or dma_sync_single().
+ */
+static inline dma_addr_t
+dma_map_page(struct device *dev, struct page *page,
+             unsigned long offset, size_t size,
+             enum dma_data_direction direction)
+{
+        return dma_map_single(dev, page_address(page) + offset,
+                              size, direction);
+}
+
+/**
+ * dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
+ * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
+ * @handle: DMA address of buffer
+ * @size: size of buffer to map
+ * @dir: DMA transfer direction
+ *
+ * Unmap a single streaming mode DMA translation.  The handle and size
+ * must match what was provided in the previous dma_map_single() call.
+ * All other usages are undefined.
+ *
+ * After this call, reads by the CPU to the buffer are guaranteed to see
+ * whatever the device wrote there.
+ */
+static inline void
+dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
+               enum dma_data_direction direction)
+{
+        dma_unmap_single(dev, dma_address, size, direction);
+}
+
+/**
+ * dma_map_sg - map a set of SG buffers for streaming mode DMA
+ * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
+ * @sg: list of buffers
+ * @nents: number of buffers to map
+ * @dir: DMA transfer direction
+ *
+ * Map a set of buffers described by scatterlist in streaming
+ * mode for DMA.  This is the scatter-gather version of the
+ * above pci_map_single interface.  Here the scatter gather list
+ * elements are each tagged with the appropriate dma address
+ * and length.  They are obtained via sg_dma_{address,length}(SG).
+ *
+ * NOTE: An implementation may be able to use a smaller number of
+ *       DMA address/length pairs than there are SG table elements.
+ *       (for example via virtual mapping capabilities)
+ *       The routine returns the number of addr/length pairs actually
+ *       used, at most nents.
+ *
+ * Device ownership issues as mentioned above for pci_map_single are
+ * the same here.
+ */
+static inline int
+dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
+           enum dma_data_direction direction)
+{
+        int i;
+
+        for (i = 0; i < nents; i++) {
+                char *virt;
+
+                sg[i].dma_address = page_to_bus(sg_page(&sg[i])) + sg[i].offset;
+                virt = sg_virt(&sg[i]);
+                dma_cache_sync(dev, virt, sg[i].length, direction);
+        }
+
+        return nents;
+}
+
+/**
+ * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
+ * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
+ * @sg: list of buffers
+ * @nents: number of buffers to map
+ * @dir: DMA transfer direction
+ *
+ * Unmap a set of streaming mode DMA translations.
+ * Again, CPU read rules concerning calls here are the same as for
+ * pci_unmap_single() above.
+ */
+static inline void
+dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
+             enum dma_data_direction direction)
+{
+
+}
+
+/**
+ * dma_sync_single_for_cpu
+ * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
+ * @handle: DMA address of buffer
+ * @size: size of buffer to map
+ * @dir: DMA transfer direction
+ *
+ * Make physical memory consistent for a single streaming mode DMA
+ * translation after a transfer.
+ *
+ * If you perform a dma_map_single() but wish to interrogate the
+ * buffer using the cpu, yet do not wish to teardown the DMA mapping,
+ * you must call this function before doing so.  At the next point you
+ * give the DMA address back to the card, you must first perform a
+ * dma_sync_single_for_device, and then the device again owns the
+ * buffer.
+ */
+static inline void
+dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
+                        size_t size, enum dma_data_direction direction)
+{
+        /*
+         * No need to do anything since the CPU isn't supposed to
+         * touch this memory after we flushed it at mapping- or
+         * sync-for-device time.
+         */
+}
+
+static inline void
+dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
+                           size_t size, enum dma_data_direction direction)
+{
+        dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction);
+}
+
+static inline void
+dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
+                              unsigned long offset, size_t size,
+                              enum dma_data_direction direction)
+{
+        /* just sync everything, that's all the pci API can do */
+        dma_sync_single_for_cpu(dev, dma_handle, offset+size, direction);
+}
+
+static inline void
+dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
+                                 unsigned long offset, size_t size,
+                                 enum dma_data_direction direction)
+{
+        /* just sync everything, that's all the pci API can do */
+        dma_sync_single_for_device(dev, dma_handle, offset+size, direction);
+}
+
+/**
+ * dma_sync_sg_for_cpu
+ * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
+ * @sg: list of buffers
+ * @nents: number of buffers to map
+ * @dir: DMA transfer direction
+ *
+ * Make physical memory consistent for a set of streaming
+ * mode DMA translations after a transfer.
+ *
+ * The same as dma_sync_single_for_* but for a scatter-gather list,
+ * same rules and usage.
+ */
+static inline void
+dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
+                    int nents, enum dma_data_direction direction)
+{
+        /*
+         * No need to do anything since the CPU isn't supposed to
+         * touch this memory after we flushed it at mapping- or
+         * sync-for-device time.
+         */
+}
+
+static inline void
+dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
+                       int nents, enum dma_data_direction direction)
+{
+        int i;
+
+        for (i = 0; i < nents; i++) {
+                dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, direction);
+        }
+}
+
+/* Now for the API extensions over the pci_ one */
+
+#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
+#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
+
+static inline int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
+{
+        return 1;
+}
+
+static inline int dma_get_cache_alignment(void)
+{
+        return boot_cpu_data.dcache.linesz;
+}
+
+#endif /* __ASM_AVR32_DMA_MAPPING_H */
diff --git a/arch/avr32/include/asm/dma.h b/arch/avr32/include/asm/dma.h
new file mode 100644
index 000000000000..9e91205590ac
--- /dev/null
+++ b/arch/avr32/include/asm/dma.h
@@ -0,0 +1,8 @@
+#ifndef __ASM_AVR32_DMA_H
+#define __ASM_AVR32_DMA_H
+
+/* The maximum address that we can perform a DMA transfer to on this platform.
+ * Not really applicable to AVR32, but some functions need it. */
+#define MAX_DMA_ADDRESS         0xffffffff
+
+#endif /* __ASM_AVR32_DMA_H */
diff --git a/arch/avr32/include/asm/elf.h b/arch/avr32/include/asm/elf.h
new file mode 100644
index 000000000000..64ce40ee1d58
--- /dev/null
+++ b/arch/avr32/include/asm/elf.h
@@ -0,0 +1,108 @@
+#ifndef __ASM_AVR32_ELF_H
+#define __ASM_AVR32_ELF_H
+
+/* AVR32 relocation numbers */
+#define R_AVR32_NONE            0
+#define R_AVR32_32              1
+#define R_AVR32_16              2
+#define R_AVR32_8               3
+#define R_AVR32_32_PCREL        4
+#define R_AVR32_16_PCREL        5
+#define R_AVR32_8_PCREL         6
+#define R_AVR32_DIFF32          7
+#define R_AVR32_DIFF16          8
+#define R_AVR32_DIFF8           9
+#define R_AVR32_GOT32           10
+#define R_AVR32_GOT16           11
+#define R_AVR32_GOT8            12
+#define R_AVR32_21S             13
+#define R_AVR32_16U             14
+#define R_AVR32_16S             15
+#define R_AVR32_8S              16
+#define R_AVR32_8S_EXT          17
+#define R_AVR32_22H_PCREL       18
+#define R_AVR32_18W_PCREL       19
+#define R_AVR32_16B_PCREL       20
+#define R_AVR32_16N_PCREL       21
+#define R_AVR32_14UW_PCREL      22
+#define R_AVR32_11H_PCREL       23
+#define R_AVR32_10UW_PCREL      24
+#define R_AVR32_9H_PCREL        25
+#define R_AVR32_9UW_PCREL       26
+#define R_AVR32_HI16            27
+#define R_AVR32_LO16            28
+#define R_AVR32_GOTPC           29
+#define R_AVR32_GOTCALL         30
+#define R_AVR32_LDA_GOT         31
+#define R_AVR32_GOT21S          32
+#define R_AVR32_GOT18SW         33
+#define R_AVR32_GOT16S          34
+#define R_AVR32_GOT7UW          35
+#define R_AVR32_32_CPENT        36
+#define R_AVR32_CPCALL          37
+#define R_AVR32_16_CP           38
+#define R_AVR32_9W_CP           39
+#define R_AVR32_RELATIVE        40
+#define R_AVR32_GLOB_DAT        41
+#define R_AVR32_JMP_SLOT        42
+#define R_AVR32_ALIGN           43
+
+/*
+ * ELF register definitions..
+ */
+
+#include <asm/ptrace.h>
+#include <asm/user.h>
+
+typedef unsigned long elf_greg_t;
+
+#define ELF_NGREG (sizeof (struct pt_regs) / sizeof (elf_greg_t))
+typedef elf_greg_t elf_gregset_t[ELF_NGREG];
+
+typedef struct user_fpu_struct elf_fpregset_t;
+
+/*
+ * This is used to ensure we don't load something for the wrong architecture.
+ */
+#define elf_check_arch(x) ( (x)->e_machine == EM_AVR32 )
+
+/*
+ * These are used to set parameters in the core dumps.
+ */
+#define ELF_CLASS       ELFCLASS32
+#ifdef __LITTLE_ENDIAN__
+#define ELF_DATA        ELFDATA2LSB
+#else
+#define ELF_DATA        ELFDATA2MSB
+#endif
+#define ELF_ARCH        EM_AVR32
+
+#define USE_ELF_CORE_DUMP
+#define ELF_EXEC_PAGESIZE       4096
+
+/* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
+   use of this is to invoke "./ld.so someprog" to test out a new version of
+   the loader.  We need to make sure that it is out of the way of the program
+   that it will "exec", and that there is sufficient room for the brk.  */
+
+#define ELF_ET_DYN_BASE         (2 * TASK_SIZE / 3)
+
+
+/* This yields a mask that user programs can use to figure out what
+   instruction set this CPU supports.  This could be done in user space,
+   but it's not easy, and we've already done it here.  */
+
+#define ELF_HWCAP       (0)
+
+/* This yields a string that ld.so will use to load implementation
+   specific libraries for optimization.  This is more specific in
+   intent than poking at uname or /proc/cpuinfo.
+
+   For the moment, we have only optimizations for the Intel generations,
+   but that could change... */
+
+#define ELF_PLATFORM  (NULL)
+
+#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT)
+
+#endif /* __ASM_AVR32_ELF_H */
diff --git a/arch/avr32/include/asm/emergency-restart.h b/arch/avr32/include/asm/emergency-restart.h
new file mode 100644
index 000000000000..3e7e014776ba
--- /dev/null
+++ b/arch/avr32/include/asm/emergency-restart.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_AVR32_EMERGENCY_RESTART_H
+#define __ASM_AVR32_EMERGENCY_RESTART_H
+
+#include <asm-generic/emergency-restart.h>
+
+#endif /* __ASM_AVR32_EMERGENCY_RESTART_H */
diff --git a/arch/avr32/include/asm/errno.h b/arch/avr32/include/asm/errno.h
new file mode 100644
index 000000000000..558a7249f06d
--- /dev/null
+++ b/arch/avr32/include/asm/errno.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_AVR32_ERRNO_H
+#define __ASM_AVR32_ERRNO_H
+
+#include <asm-generic/errno.h>
+
+#endif /* __ASM_AVR32_ERRNO_H */
diff --git a/arch/avr32/include/asm/fb.h b/arch/avr32/include/asm/fb.h
new file mode 100644
index 000000000000..41baf84ad402
--- /dev/null
+++ b/arch/avr32/include/asm/fb.h
@@ -0,0 +1,21 @@
+#ifndef _ASM_FB_H_
+#define _ASM_FB_H_
+
+#include <linux/fb.h>
+#include <linux/fs.h>
+#include <asm/page.h>
+
+static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma,
+                                unsigned long off)
+{
+        vma->vm_page_prot = __pgprot((pgprot_val(vma->vm_page_prot)
+                                      & ~_PAGE_CACHABLE)
+                                     | (_PAGE_BUFFER | _PAGE_DIRTY));
+}
+
+static inline int fb_is_primary_device(struct fb_info *info)
+{
+        return 0;
+}
+
+#endif /* _ASM_FB_H_ */
diff --git a/arch/avr32/include/asm/fcntl.h b/arch/avr32/include/asm/fcntl.h
new file mode 100644
index 000000000000..14c0c4402b11
--- /dev/null
+++ b/arch/avr32/include/asm/fcntl.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_AVR32_FCNTL_H
+#define __ASM_AVR32_FCNTL_H
+
+#include <asm-generic/fcntl.h>
+
+#endif /* __ASM_AVR32_FCNTL_H */
diff --git a/arch/avr32/include/asm/futex.h b/arch/avr32/include/asm/futex.h
new file mode 100644
index 000000000000..10419f14a68a
--- /dev/null
+++ b/arch/avr32/include/asm/futex.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_AVR32_FUTEX_H
+#define __ASM_AVR32_FUTEX_H
+
+#include <asm-generic/futex.h>
+
+#endif /* __ASM_AVR32_FUTEX_H */
diff --git a/arch/avr32/include/asm/gpio.h b/arch/avr32/include/asm/gpio.h
new file mode 100644
index 000000000000..19e8ccc77db3
--- /dev/null
+++ b/arch/avr32/include/asm/gpio.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_AVR32_GPIO_H
+#define __ASM_AVR32_GPIO_H
+
+#include <asm/arch/gpio.h>
+
+#endif /* __ASM_AVR32_GPIO_H */
diff --git a/arch/avr32/include/asm/hardirq.h b/arch/avr32/include/asm/hardirq.h
new file mode 100644
index 000000000000..267354356f60
--- /dev/null
+++ b/arch/avr32/include/asm/hardirq.h
@@ -0,0 +1,34 @@
+#ifndef __ASM_AVR32_HARDIRQ_H
+#define __ASM_AVR32_HARDIRQ_H
+
+#include <linux/threads.h>
+#include <asm/irq.h>
+
+#ifndef __ASSEMBLY__
+
+#include <linux/cache.h>
+
+/* entry.S is sensitive to the offsets of these fields */
+typedef struct {
+        unsigned int __softirq_pending;
+} ____cacheline_aligned irq_cpustat_t;
+
+void ack_bad_irq(unsigned int irq);
+
+/* Standard mappings for irq_cpustat_t above */
+#include <linux/irq_cpustat.h>
+
+#endif /* __ASSEMBLY__ */
+
+#define HARDIRQ_BITS    12
+
+/*
+ * The hardirq mask has to be large enough to have
+ * space for potentially all IRQ sources in the system
+ * nesting on a single CPU:
+ */
+#if (1 << HARDIRQ_BITS) < NR_IRQS
+# error HARDIRQ_BITS is too low!
+#endif
+
+#endif /* __ASM_AVR32_HARDIRQ_H */
diff --git a/arch/avr32/include/asm/hw_irq.h b/arch/avr32/include/asm/hw_irq.h
new file mode 100644
index 000000000000..218b0a6bfd1b
--- /dev/null
+++ b/arch/avr32/include/asm/hw_irq.h
@@ -0,0 +1,9 @@
+#ifndef __ASM_AVR32_HW_IRQ_H
+#define __ASM_AVR32_HW_IRQ_H
+
+static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i)
+{
+        /* Nothing to do */
+}
+
+#endif /* __ASM_AVR32_HW_IRQ_H */
diff --git a/arch/avr32/include/asm/io.h b/arch/avr32/include/asm/io.h
new file mode 100644
index 000000000000..8be7ea9c9047
--- /dev/null
+++ b/arch/avr32/include/asm/io.h
@@ -0,0 +1,312 @@
+#ifndef __ASM_AVR32_IO_H
+#define __ASM_AVR32_IO_H
+
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/types.h>
+
+#include <asm/addrspace.h>
+#include <asm/byteorder.h>
+
+#include <asm/arch/io.h>
+
+/* virt_to_phys will only work when address is in P1 or P2 */
+static __inline__ unsigned long virt_to_phys(volatile void *address)
+{
+        return PHYSADDR(address);
+}
+
+static __inline__ void * phys_to_virt(unsigned long address)
+{
+        return (void *)P1SEGADDR(address);
+}
+
+#define cached_to_phys(addr)    ((unsigned long)PHYSADDR(addr))
+#define uncached_to_phys(addr)  ((unsigned long)PHYSADDR(addr))
+#define phys_to_cached(addr)    ((void *)P1SEGADDR(addr))
+#define phys_to_uncached(addr)  ((void *)P2SEGADDR(addr))
+
+/*
+ * Generic IO read/write.  These perform native-endian accesses.  Note
+ * that some architectures will want to re-define __raw_{read,write}w.
+ */
+extern void __raw_writesb(void __iomem *addr, const void *data, int bytelen);
+extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen);
+extern void __raw_writesl(void __iomem *addr, const void *data, int longlen);
+
+extern void __raw_readsb(const void __iomem *addr, void *data, int bytelen);
+extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen);
+extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
+
+static inline void __raw_writeb(u8 v, volatile void __iomem *addr)
+{
+        *(volatile u8 __force *)addr = v;
+}
+static inline void __raw_writew(u16 v, volatile void __iomem *addr)
+{
+        *(volatile u16 __force *)addr = v;
+}
+static inline void __raw_writel(u32 v, volatile void __iomem *addr)
+{
+        *(volatile u32 __force *)addr = v;
+}
+
+static inline u8 __raw_readb(const volatile void __iomem *addr)
+{
+        return *(const volatile u8 __force *)addr;
+}
+static inline u16 __raw_readw(const volatile void __iomem *addr)
+{
+        return *(const volatile u16 __force *)addr;
+}
+static inline u32 __raw_readl(const volatile void __iomem *addr)
+{
+        return *(const volatile u32 __force *)addr;
+}
+
+/* Convert I/O port address to virtual address */
+#ifndef __io
+# define __io(p)        ((void *)phys_to_uncached(p))
+#endif
+
+/*
+ * Not really sure about the best way to slow down I/O on
+ * AVR32. Defining it as a no-op until we have an actual test case.
+ */
+#define SLOW_DOWN_IO    do { } while (0)
+
+#define __BUILD_MEMORY_SINGLE(pfx, bwl, type)                           \
+static inline void                                                      \
+pfx##write##bwl(type val, volatile void __iomem *addr)                  \
+{                                                                       \
+        volatile type *__addr;                                          \
+        type __val;                                                     \
+                                                                        \
+        __addr = (void *)__swizzle_addr_##bwl((unsigned long)(addr));   \
+        __val = pfx##ioswab##bwl(__addr, val);                          \
+                                                                        \
+        BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long));             \
+                                                                        \
+        *__addr = __val;                                                \
+}                                                                       \
+                                                                        \
+static inline type pfx##read##bwl(const volatile void __iomem *addr)    \
+{                                                                       \
+        volatile type *__addr;                                          \
+        type __val;                                                     \
+                                                                        \
+        __addr = (void *)__swizzle_addr_##bwl((unsigned long)(addr));   \
+                                                                        \
+        BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long));             \
+                                                                        \
+        __val = *__addr;                                                \
+        return pfx##ioswab##bwl(__addr, __val);                         \
+}
+
+#define __BUILD_IOPORT_SINGLE(pfx, bwl, type, p, slow)                  \
+static inline void pfx##out##bwl##p(type val, unsigned long port)       \
+{                                                                       \
+        volatile type *__addr;                                          \
+        type __val;                                                     \
+                                                                        \
+        __addr = __io(__swizzle_addr_##bwl(port));                      \
+        __val = pfx##ioswab##bwl(__addr, val);                          \
+                                                                        \
+        BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long));             \
+                                                                        \
+        *__addr = __val;                                                \
+        slow;                                                           \
+}                                                                       \
+                                                                        \
+static inline type pfx##in##bwl##p(unsigned long port)                  \
+{                                                                       \
+        volatile type *__addr;                                          \
+        type __val;                                                     \
+                                                                        \
+        __addr = __io(__swizzle_addr_##bwl(port));                      \
+                                                                        \
+        BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long));             \
+                                                                        \
+        __val = *__addr;                                                \
+        slow;                                                           \
+                                                                        \
+        return pfx##ioswab##bwl(__addr, __val);                         \
+}
+
+#define __BUILD_MEMORY_PFX(bus, bwl, type)                              \
+        __BUILD_MEMORY_SINGLE(bus, bwl, type)
+
+#define BUILDIO_MEM(bwl, type)                                          \
+        __BUILD_MEMORY_PFX(, bwl, type)                                 \
+        __BUILD_MEMORY_PFX(__mem_, bwl, type)
+
+#define __BUILD_IOPORT_PFX(bus, bwl, type)                              \
+        __BUILD_IOPORT_SINGLE(bus, bwl, type, ,)                        \
+        __BUILD_IOPORT_SINGLE(bus, bwl, type, _p, SLOW_DOWN_IO)
+
+#define BUILDIO_IOPORT(bwl, type)                                       \
+        __BUILD_IOPORT_PFX(, bwl, type)                                 \
+        __BUILD_IOPORT_PFX(__mem_, bwl, type)
+
+BUILDIO_MEM(b, u8)
+BUILDIO_MEM(w, u16)
+BUILDIO_MEM(l, u32)
+
+BUILDIO_IOPORT(b, u8)
+BUILDIO_IOPORT(w, u16)
+BUILDIO_IOPORT(l, u32)
+
+#define readb_relaxed                   readb
+#define readw_relaxed                   readw
+#define readl_relaxed                   readl
+
+#define __BUILD_MEMORY_STRING(bwl, type)                                \
+static inline void writes##bwl(volatile void __iomem *addr,             \
+                               const void *data, unsigned int count)    \
+{                                                                       \
+        const type *__data = data;                                      \
+                                                                        \
+        while (count--)                                                 \
+                __mem_write##bwl(*__data++, addr);                      \
+}                                                                       \
+                                                                        \
+static inline void reads##bwl(const volatile void __iomem *addr,        \
+                              void *data, unsigned int count)           \
+{                                                                       \
+        type *__data = data;                                            \
+                                                                        \
+        while (count--)                                                 \
+                *__data++ = __mem_read##bwl(addr);                      \
+}
+
+#define __BUILD_IOPORT_STRING(bwl, type)                                \
+static inline void outs##bwl(unsigned long port, const void *data,      \
+                             unsigned int count)                        \
+{                                                                       \
+        const type *__data = data;                                      \
+                                                                        \
+        while (count--)                                                 \
+                __mem_out##bwl(*__data++, port);                        \
+}                                                                       \
+                                                                        \
+static inline void ins##bwl(unsigned long port, void *data,             \
+                           unsigned int count)                          \
+{                                                                       \
+        type *__data = data;                                            \
+                                                                        \
+        while (count--)                                                 \
+                *__data++ = __mem_in##bwl(port);                        \
+}
+
+#define BUILDSTRING(bwl, type)                                          \
+        __BUILD_MEMORY_STRING(bwl, type)                                \
+        __BUILD_IOPORT_STRING(bwl, type)
+
+BUILDSTRING(b, u8)
+BUILDSTRING(w, u16)
+BUILDSTRING(l, u32)
+
+/*
+ * io{read,write}{8,16,32} macros in both le (for PCI style consumers) and native be
+ */
+#ifndef ioread8
+
+#define ioread8(p)              ((unsigned int)readb(p))
+
+#define ioread16(p)             ((unsigned int)readw(p))
+#define ioread16be(p)           ((unsigned int)__raw_readw(p))
+
+#define ioread32(p)             ((unsigned int)readl(p))
+#define ioread32be(p)           ((unsigned int)__raw_readl(p))
+
+#define iowrite8(v,p)           writeb(v, p)
+
+#define iowrite16(v,p)          writew(v, p)
+#define iowrite16be(v,p)        __raw_writew(v, p)
+
+#define iowrite32(v,p)          writel(v, p)
+#define iowrite32be(v,p)        __raw_writel(v, p)
+
+#define ioread8_rep(p,d,c)      readsb(p,d,c)
+#define ioread16_rep(p,d,c)     readsw(p,d,c)
+#define ioread32_rep(p,d,c)     readsl(p,d,c)
+
+#define iowrite8_rep(p,s,c)     writesb(p,s,c)
+#define iowrite16_rep(p,s,c)    writesw(p,s,c)
+#define iowrite32_rep(p,s,c)    writesl(p,s,c)
+
+#endif
+
+static inline void memcpy_fromio(void * to, const volatile void __iomem *from,
+                                 unsigned long count)
+{
+        memcpy(to, (const void __force *)from, count);
+}
+
+static inline void  memcpy_toio(volatile void __iomem *to, const void * from,
+                                unsigned long count)
+{
+        memcpy((void __force *)to, from, count);
+}
+
+static inline void memset_io(volatile void __iomem *addr, unsigned char val,
+                             unsigned long count)
+{
+        memset((void __force *)addr, val, count);
+}
+
+#define mmiowb()
+
+#define IO_SPACE_LIMIT  0xffffffff
+
+extern void __iomem *__ioremap(unsigned long offset, size_t size,
+                               unsigned long flags);
+extern void __iounmap(void __iomem *addr);
+
+/*
+ * ioremap      -   map bus memory into CPU space
+ * @offset      bus address of the memory
+ * @size        size of the resource to map
+ *
+ * ioremap performs a platform specific sequence of operations to make
+ * bus memory CPU accessible via the readb/.../writel functions and
+ * the other mmio helpers. The returned address is not guaranteed to
+ * be usable directly as a virtual address.
+ */
+#define ioremap(offset, size)                   \
+        __ioremap((offset), (size), 0)
+
+#define ioremap_nocache(offset, size)           \
+        __ioremap((offset), (size), 0)
+
+#define iounmap(addr)                           \
+        __iounmap(addr)
+
+#define cached(addr) P1SEGADDR(addr)
+#define uncached(addr) P2SEGADDR(addr)
+
+#define virt_to_bus virt_to_phys
+#define bus_to_virt phys_to_virt
+#define page_to_bus page_to_phys
+#define bus_to_page phys_to_page
+
+/*
+ * Create a virtual mapping cookie for an IO port range.  There exists
+ * no such thing as port-based I/O on AVR32, so a regular ioremap()
+ * should do what we need.
+ */
+#define ioport_map(port, nr)    ioremap(port, nr)
+#define ioport_unmap(port)      iounmap(port)
+
+/*
+ * Convert a physical pointer to a virtual kernel pointer for /dev/mem
+ * access
+ */
+#define xlate_dev_mem_ptr(p)    __va(p)
+
+/*
+ * Convert a virtual cached pointer to an uncached pointer
+ */
+#define xlate_dev_kmem_ptr(p)   p
+
+#endif /* __ASM_AVR32_IO_H */
diff --git a/arch/avr32/include/asm/ioctl.h b/arch/avr32/include/asm/ioctl.h
new file mode 100644
index 000000000000..c8472c1398ef
--- /dev/null
+++ b/arch/avr32/include/asm/ioctl.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_AVR32_IOCTL_H
+#define __ASM_AVR32_IOCTL_H
+
+#include <asm-generic/ioctl.h>
+
+#endif /* __ASM_AVR32_IOCTL_H */
diff --git a/arch/avr32/include/asm/ioctls.h b/arch/avr32/include/asm/ioctls.h
new file mode 100644
index 000000000000..0cf2c0a4502b
--- /dev/null
+++ b/arch/avr32/include/asm/ioctls.h
@@ -0,0 +1,87 @@
+#ifndef __ASM_AVR32_IOCTLS_H
+#define __ASM_AVR32_IOCTLS_H
+
+#include <asm/ioctl.h>
+
+/* 0x54 is just a magic number to make these relatively unique ('T') */
+
+#define TCGETS          0x5401
+#define TCSETS          0x5402 /* Clashes with SNDCTL_TMR_START sound ioctl */
+#define TCSETSW         0x5403
+#define TCSETSF         0x5404
+#define TCGETA          0x5405
+#define TCSETA          0x5406
+#define TCSETAW         0x5407
+#define TCSETAF         0x5408
+#define TCSBRK          0x5409
+#define TCXONC          0x540A
+#define TCFLSH          0x540B
+#define TIOCEXCL        0x540C
+#define TIOCNXCL        0x540D
+#define TIOCSCTTY       0x540E
+#define TIOCGPGRP       0x540F
+#define TIOCSPGRP       0x5410
+#define TIOCOUTQ        0x5411
+#define TIOCSTI         0x5412
+#define TIOCGWINSZ      0x5413
+#define TIOCSWINSZ      0x5414
+#define TIOCMGET        0x5415
+#define TIOCMBIS        0x5416
+#define TIOCMBIC        0x5417
+#define TIOCMSET        0x5418
+#define TIOCGSOFTCAR    0x5419
+#define TIOCSSOFTCAR    0x541A
+#define FIONREAD        0x541B
+#define TIOCINQ         FIONREAD
+#define TIOCLINUX       0x541C
+#define TIOCCONS        0x541D
+#define TIOCGSERIAL     0x541E
+#define TIOCSSERIAL     0x541F
+#define TIOCPKT         0x5420
+#define FIONBIO         0x5421
+#define TIOCNOTTY       0x5422
+#define TIOCSETD        0x5423
+#define TIOCGETD        0x5424
+#define TCSBRKP         0x5425  /* Needed for POSIX tcsendbreak() */
+/* #define TIOCTTYGSTRUCT 0x5426 - Former debugging-only ioctl */
+#define TIOCSBRK        0x5427  /* BSD compatibility */
+#define TIOCCBRK        0x5428  /* BSD compatibility */
+#define TIOCGSID        0x5429  /* Return the session ID of FD */
+#define TCGETS2         _IOR('T',0x2A, struct termios2)
+#define TCSETS2         _IOW('T',0x2B, struct termios2)
+#define TCSETSW2        _IOW('T',0x2C, struct termios2)
+#define TCSETSF2        _IOW('T',0x2D, struct termios2)
+#define TIOCGPTN        _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
+#define TIOCSPTLCK      _IOW('T',0x31, int)  /* Lock/unlock Pty */
+
+#define FIONCLEX        0x5450
+#define FIOCLEX         0x5451
+#define FIOASYNC        0x5452
+#define TIOCSERCONFIG   0x5453
+#define TIOCSERGWILD    0x5454
+#define TIOCSERSWILD    0x5455
+#define TIOCGLCKTRMIOS  0x5456
+#define TIOCSLCKTRMIOS  0x5457
+#define TIOCSERGSTRUCT  0x5458 /* For debugging only */
+#define TIOCSERGETLSR   0x5459 /* Get line status register */
+#define TIOCSERGETMULTI 0x545A /* Get multiport config  */
+#define TIOCSERSETMULTI 0x545B /* Set multiport config */
+
+#define TIOCMIWAIT      0x545C  /* wait for a change on serial input line(s) */
+#define TIOCGICOUNT     0x545D  /* read serial port inline interrupt counts */
+#define TIOCGHAYESESP   0x545E  /* Get Hayes ESP configuration */
+#define TIOCSHAYESESP   0x545F  /* Set Hayes ESP configuration */
+#define FIOQSIZE        0x5460
+
+/* Used for packet mode */
+#define TIOCPKT_DATA             0
+#define TIOCPKT_FLUSHREAD        1
+#define TIOCPKT_FLUSHWRITE       2
+#define TIOCPKT_STOP             4
+#define TIOCPKT_START            8
+#define TIOCPKT_NOSTOP          16
+#define TIOCPKT_DOSTOP          32
+
+#define TIOCSER_TEMT    0x01    /* Transmitter physically empty */
+
+#endif /* __ASM_AVR32_IOCTLS_H */
diff --git a/arch/avr32/include/asm/ipcbuf.h b/arch/avr32/include/asm/ipcbuf.h
new file mode 100644
index 000000000000..1552c9698f5e
--- /dev/null
+++ b/arch/avr32/include/asm/ipcbuf.h
@@ -0,0 +1,29 @@
+#ifndef __ASM_AVR32_IPCBUF_H
+#define __ASM_AVR32_IPCBUF_H
+
+/*
+* The user_ipc_perm structure for AVR32 architecture.
+* Note extra padding because this structure is passed back and forth
+* between kernel and user space.
+*
+* Pad space is left for:
+* - 32-bit mode_t and seq
+* - 2 miscellaneous 32-bit values
+*/
+
+struct ipc64_perm
+{
+        __kernel_key_t          key;
+        __kernel_uid32_t        uid;
+        __kernel_gid32_t        gid;
+        __kernel_uid32_t        cuid;
+        __kernel_gid32_t        cgid;
+        __kernel_mode_t         mode;
+        unsigned short          __pad1;
+        unsigned short          seq;
+        unsigned short          __pad2;
+        unsigned long           __unused1;
+        unsigned long           __unused2;
+};
+
+#endif /* __ASM_AVR32_IPCBUF_H */
diff --git a/arch/avr32/include/asm/irq.h b/arch/avr32/include/asm/irq.h
new file mode 100644
index 000000000000..c563b7720c1a
--- /dev/null
+++ b/arch/avr32/include/asm/irq.h
@@ -0,0 +1,24 @@
+#ifndef __ASM_AVR32_IRQ_H
+#define __ASM_AVR32_IRQ_H
+
+#define NR_INTERNAL_IRQS        64
+
+#include <asm/arch/irq.h>
+
+#ifndef NR_IRQS
+#define NR_IRQS                 (NR_INTERNAL_IRQS)
+#endif
+
+#define irq_canonicalize(i)     (i)
+
+#ifndef __ASSEMBLER__
+int nmi_enable(void);
+void nmi_disable(void);
+
+/*
+ * Returns a bitmask of pending interrupts in a group.
+ */
+extern unsigned long intc_get_pending(unsigned int group);
+#endif
+
+#endif /* __ASM_AVR32_IOCTLS_H */
diff --git a/arch/avr32/include/asm/irq_regs.h b/arch/avr32/include/asm/irq_regs.h
new file mode 100644
index 000000000000..3dd9c0b70270
--- /dev/null
+++ b/arch/avr32/include/asm/irq_regs.h
@@ -0,0 +1 @@
+#include <asm-generic/irq_regs.h>
diff --git a/arch/avr32/include/asm/irqflags.h b/arch/avr32/include/asm/irqflags.h
new file mode 100644
index 000000000000..93570daac38a
--- /dev/null
+++ b/arch/avr32/include/asm/irqflags.h
@@ -0,0 +1,68 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_IRQFLAGS_H
+#define __ASM_AVR32_IRQFLAGS_H
+
+#include <asm/sysreg.h>
+
+static inline unsigned long __raw_local_save_flags(void)
+{
+        return sysreg_read(SR);
+}
+
+#define raw_local_save_flags(x)                                 \
+        do { (x) = __raw_local_save_flags(); } while (0)
+
+/*
+ * This will restore ALL status register flags, not only the interrupt
+ * mask flag.
+ *
+ * The empty asm statement informs the compiler of this fact while
+ * also serving as a barrier.
+ */
+static inline void raw_local_irq_restore(unsigned long flags)
+{
+        sysreg_write(SR, flags);
+        asm volatile("" : : : "memory", "cc");
+}
+
+static inline void raw_local_irq_disable(void)
+{
+        asm volatile("ssrf %0" : : "n"(SYSREG_GM_OFFSET) : "memory");
+}
+
+static inline void raw_local_irq_enable(void)
+{
+        asm volatile("csrf %0" : : "n"(SYSREG_GM_OFFSET) : "memory");
+}
+
+static inline int raw_irqs_disabled_flags(unsigned long flags)
+{
+        return (flags & SYSREG_BIT(GM)) != 0;
+}
+
+static inline int raw_irqs_disabled(void)
+{
+        unsigned long flags = __raw_local_save_flags();
+
+        return raw_irqs_disabled_flags(flags);
+}
+
+static inline unsigned long __raw_local_irq_save(void)
+{
+        unsigned long flags = __raw_local_save_flags();
+
+        raw_local_irq_disable();
+
+        return flags;
+}
+
+#define raw_local_irq_save(flags)                               \
+        do { (flags) = __raw_local_irq_save(); } while (0)
+
+#endif /* __ASM_AVR32_IRQFLAGS_H */
diff --git a/arch/avr32/include/asm/kdebug.h b/arch/avr32/include/asm/kdebug.h
new file mode 100644
index 000000000000..ca4f9542365a
--- /dev/null
+++ b/arch/avr32/include/asm/kdebug.h
@@ -0,0 +1,11 @@
+#ifndef __ASM_AVR32_KDEBUG_H
+#define __ASM_AVR32_KDEBUG_H
+
+/* Grossly misnamed. */
+enum die_val {
+        DIE_BREAKPOINT,
+        DIE_SSTEP,
+        DIE_NMI,
+};
+
+#endif /* __ASM_AVR32_KDEBUG_H */
diff --git a/arch/avr32/include/asm/kmap_types.h b/arch/avr32/include/asm/kmap_types.h
new file mode 100644
index 000000000000..b7f5c6870107
--- /dev/null
+++ b/arch/avr32/include/asm/kmap_types.h
@@ -0,0 +1,30 @@
+#ifndef __ASM_AVR32_KMAP_TYPES_H
+#define __ASM_AVR32_KMAP_TYPES_H
+
+#ifdef CONFIG_DEBUG_HIGHMEM
+# define D(n) __KM_FENCE_##n ,
+#else
+# define D(n)
+#endif
+
+enum km_type {
+D(0)    KM_BOUNCE_READ,
+D(1)    KM_SKB_SUNRPC_DATA,
+D(2)    KM_SKB_DATA_SOFTIRQ,
+D(3)    KM_USER0,
+D(4)    KM_USER1,
+D(5)    KM_BIO_SRC_IRQ,
+D(6)    KM_BIO_DST_IRQ,
+D(7)    KM_PTE0,
+D(8)    KM_PTE1,
+D(9)    KM_PTE2,
+D(10)   KM_IRQ0,
+D(11)   KM_IRQ1,
+D(12)   KM_SOFTIRQ0,
+D(13)   KM_SOFTIRQ1,
+D(14)   KM_TYPE_NR
+};
+
+#undef D
+
+#endif /* __ASM_AVR32_KMAP_TYPES_H */
diff --git a/arch/avr32/include/asm/kprobes.h b/arch/avr32/include/asm/kprobes.h
new file mode 100644
index 000000000000..996cb656474e
--- /dev/null
+++ b/arch/avr32/include/asm/kprobes.h
@@ -0,0 +1,35 @@
+/*
+ * Kernel Probes (KProbes)
+ *
+ * Copyright (C) 2005-2006 Atmel Corporation
+ * Copyright (C) IBM Corporation, 2002, 2004
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_KPROBES_H
+#define __ASM_AVR32_KPROBES_H
+
+#include <linux/types.h>
+
+typedef u16     kprobe_opcode_t;
+#define BREAKPOINT_INSTRUCTION  0xd673  /* breakpoint */
+#define MAX_INSN_SIZE           2
+
+#define kretprobe_blacklist_size 0
+
+#define arch_remove_kprobe(p)   do { } while (0)
+
+/* Architecture specific copy of original instruction */
+struct arch_specific_insn {
+        kprobe_opcode_t insn[MAX_INSN_SIZE];
+};
+
+extern int kprobe_fault_handler(struct pt_regs *regs, int trapnr);
+extern int kprobe_exceptions_notify(struct notifier_block *self,
+                                    unsigned long val, void *data);
+
+#define flush_insn_slot(p)      do { } while (0)
+
+#endif /* __ASM_AVR32_KPROBES_H */
diff --git a/arch/avr32/include/asm/linkage.h b/arch/avr32/include/asm/linkage.h
new file mode 100644
index 000000000000..f7b285e910d4
--- /dev/null
+++ b/arch/avr32/include/asm/linkage.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_LINKAGE_H
+#define __ASM_LINKAGE_H
+
+#define __ALIGN .balign 2
+#define __ALIGN_STR ".balign 2"
+
+#endif /* __ASM_LINKAGE_H */
diff --git a/arch/avr32/include/asm/local.h b/arch/avr32/include/asm/local.h
new file mode 100644
index 000000000000..1c1619694da3
--- /dev/null
+++ b/arch/avr32/include/asm/local.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_AVR32_LOCAL_H
+#define __ASM_AVR32_LOCAL_H
+
+#include <asm-generic/local.h>
+
+#endif /* __ASM_AVR32_LOCAL_H */
diff --git a/arch/avr32/include/asm/mach/serial_at91.h b/arch/avr32/include/asm/mach/serial_at91.h
new file mode 100644
index 000000000000..55b317a89061
--- /dev/null
+++ b/arch/avr32/include/asm/mach/serial_at91.h
@@ -0,0 +1,33 @@
+/*
+ *  linux/include/asm-arm/mach/serial_at91.h
+ *
+ *  Based on serial_sa1100.h  by Nicolas Pitre
+ *
+ *  Copyright (C) 2002 ATMEL Rousset
+ *
+ *  Low level machine dependent UART functions.
+ */
+
+struct uart_port;
+
+/*
+ * This is a temporary structure for registering these
+ * functions; it is intended to be discarded after boot.
+ */
+struct atmel_port_fns {
+        void    (*set_mctrl)(struct uart_port *, u_int);
+        u_int   (*get_mctrl)(struct uart_port *);
+        void    (*enable_ms)(struct uart_port *);
+        void    (*pm)(struct uart_port *, u_int, u_int);
+        int     (*set_wake)(struct uart_port *, u_int);
+        int     (*open)(struct uart_port *);
+        void    (*close)(struct uart_port *);
+};
+
+#if defined(CONFIG_SERIAL_ATMEL)
+void atmel_register_uart_fns(struct atmel_port_fns *fns);
+#else
+#define atmel_register_uart_fns(fns) do { } while (0)
+#endif
+
+
diff --git a/arch/avr32/include/asm/mman.h b/arch/avr32/include/asm/mman.h
new file mode 100644
index 000000000000..648f91e7187a
--- /dev/null
+++ b/arch/avr32/include/asm/mman.h
@@ -0,0 +1,17 @@
+#ifndef __ASM_AVR32_MMAN_H__
+#define __ASM_AVR32_MMAN_H__
+
+#include <asm-generic/mman.h>
+
+#define MAP_GROWSDOWN   0x0100          /* stack-like segment */
+#define MAP_DENYWRITE   0x0800          /* ETXTBSY */
+#define MAP_EXECUTABLE  0x1000          /* mark it as an executable */
+#define MAP_LOCKED      0x2000          /* pages are locked */
+#define MAP_NORESERVE   0x4000          /* don't check for reservations */
+#define MAP_POPULATE    0x8000          /* populate (prefault) page tables */
+#define MAP_NONBLOCK    0x10000         /* do not block on IO */
+
+#define MCL_CURRENT     1               /* lock all current mappings */
+#define MCL_FUTURE      2               /* lock all future mappings */
+
+#endif /* __ASM_AVR32_MMAN_H__ */
diff --git a/arch/avr32/include/asm/mmu.h b/arch/avr32/include/asm/mmu.h
new file mode 100644
index 000000000000..60c2d2650d32
--- /dev/null
+++ b/arch/avr32/include/asm/mmu.h
@@ -0,0 +1,10 @@
+#ifndef __ASM_AVR32_MMU_H
+#define __ASM_AVR32_MMU_H
+
+/* Default "unsigned long" context */
+typedef unsigned long mm_context_t;
+
+#define MMU_ITLB_ENTRIES        64
+#define MMU_DTLB_ENTRIES        64
+
+#endif /* __ASM_AVR32_MMU_H */
diff --git a/arch/avr32/include/asm/mmu_context.h b/arch/avr32/include/asm/mmu_context.h
new file mode 100644
index 000000000000..27ff23407100
--- /dev/null
+++ b/arch/avr32/include/asm/mmu_context.h
@@ -0,0 +1,148 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * ASID handling taken from SH implementation.
+ *   Copyright (C) 1999 Niibe Yutaka
+ *   Copyright (C) 2003 Paul Mundt
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_MMU_CONTEXT_H
+#define __ASM_AVR32_MMU_CONTEXT_H
+
+#include <asm/tlbflush.h>
+#include <asm/sysreg.h>
+#include <asm-generic/mm_hooks.h>
+
+/*
+ * The MMU "context" consists of two things:
+ *    (a) TLB cache version
+ *    (b) ASID (Address Space IDentifier)
+ */
+#define MMU_CONTEXT_ASID_MASK           0x000000ff
+#define MMU_CONTEXT_VERSION_MASK        0xffffff00
+#define MMU_CONTEXT_FIRST_VERSION       0x00000100
+#define NO_CONTEXT                      0
+
+#define MMU_NO_ASID                     0x100
+
+/* Virtual Page Number mask */
+#define MMU_VPN_MASK    0xfffff000
+
+/* Cache of MMU context last used */
+extern unsigned long mmu_context_cache;
+
+/*
+ * Get MMU context if needed
+ */
+static inline void
+get_mmu_context(struct mm_struct *mm)
+{
+        unsigned long mc = mmu_context_cache;
+
+        if (((mm->context ^ mc) & MMU_CONTEXT_VERSION_MASK) == 0)
+                /* It's up to date, do nothing */
+                return;
+
+        /* It's old, we need to get new context with new version */
+        mc = ++mmu_context_cache;
+        if (!(mc & MMU_CONTEXT_ASID_MASK)) {
+                /*
+                 * We have exhausted all ASIDs of this version.
+                 * Flush the TLB and start new cycle.
+                 */
+                flush_tlb_all();
+                /*
+                 * Fix version. Note that we avoid version #0
+                 * to distinguish NO_CONTEXT.
+                 */
+                if (!mc)
+                        mmu_context_cache = mc = MMU_CONTEXT_FIRST_VERSION;
+        }
+        mm->context = mc;
+}
+
+/*
+ * Initialize the context related info for a new mm_struct
+ * instance.
+ */
+static inline int init_new_context(struct task_struct *tsk,
+                                       struct mm_struct *mm)
+{
+        mm->context = NO_CONTEXT;
+        return 0;
+}
+
+/*
+ * Destroy context related info for an mm_struct that is about
+ * to be put to rest.
+ */
+static inline void destroy_context(struct mm_struct *mm)
+{
+        /* Do nothing */
+}
+
+static inline void set_asid(unsigned long asid)
+{
+        /* XXX: We're destroying TLBEHI[8:31] */
+        sysreg_write(TLBEHI, asid & MMU_CONTEXT_ASID_MASK);
+        cpu_sync_pipeline();
+}
+
+static inline unsigned long get_asid(void)
+{
+        unsigned long asid;
+
+        asid = sysreg_read(TLBEHI);
+        return asid & MMU_CONTEXT_ASID_MASK;
+}
+
+static inline void activate_context(struct mm_struct *mm)
+{
+        get_mmu_context(mm);
+        set_asid(mm->context & MMU_CONTEXT_ASID_MASK);
+}
+
+static inline void switch_mm(struct mm_struct *prev,
+                                 struct mm_struct *next,
+                                 struct task_struct *tsk)
+{
+        if (likely(prev != next)) {
+                unsigned long __pgdir = (unsigned long)next->pgd;
+
+                sysreg_write(PTBR, __pgdir);
+                activate_context(next);
+        }
+}
+
+#define deactivate_mm(tsk,mm) do { } while(0)
+
+#define activate_mm(prev, next) switch_mm((prev), (next), NULL)
+
+static inline void
+enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
+{
+}
+
+
+static inline void enable_mmu(void)
+{
+        sysreg_write(MMUCR, (SYSREG_BIT(MMUCR_S)
+                             | SYSREG_BIT(E)
+                             | SYSREG_BIT(MMUCR_I)));
+        nop(); nop(); nop(); nop(); nop(); nop(); nop(); nop();
+
+        if (mmu_context_cache == NO_CONTEXT)
+                mmu_context_cache = MMU_CONTEXT_FIRST_VERSION;
+
+        set_asid(mmu_context_cache & MMU_CONTEXT_ASID_MASK);
+}
+
+static inline void disable_mmu(void)
+{
+        sysreg_write(MMUCR, SYSREG_BIT(MMUCR_S));
+}
+
+#endif /* __ASM_AVR32_MMU_CONTEXT_H */
diff --git a/arch/avr32/include/asm/module.h b/arch/avr32/include/asm/module.h
new file mode 100644
index 000000000000..451444538a1b
--- /dev/null
+++ b/arch/avr32/include/asm/module.h
@@ -0,0 +1,28 @@
+#ifndef __ASM_AVR32_MODULE_H
+#define __ASM_AVR32_MODULE_H
+
+struct mod_arch_syminfo {
+        unsigned long got_offset;
+        int got_initialized;
+};
+
+struct mod_arch_specific {
+        /* Starting offset of got in the module core memory. */
+        unsigned long got_offset;
+        /* Size of the got. */
+        unsigned long got_size;
+        /* Number of symbols in syminfo. */
+        int nsyms;
+        /* Additional symbol information (got offsets). */
+        struct mod_arch_syminfo *syminfo;
+};
+
+#define Elf_Shdr                Elf32_Shdr
+#define Elf_Sym                 Elf32_Sym
+#define Elf_Ehdr                Elf32_Ehdr
+
+#define MODULE_PROC_FAMILY "AVR32v1"
+
+#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY
+
+#endif /* __ASM_AVR32_MODULE_H */
diff --git a/arch/avr32/include/asm/msgbuf.h b/arch/avr32/include/asm/msgbuf.h
new file mode 100644
index 000000000000..ac18bc4da7f7
--- /dev/null
+++ b/arch/avr32/include/asm/msgbuf.h
@@ -0,0 +1,31 @@
+#ifndef __ASM_AVR32_MSGBUF_H
+#define __ASM_AVR32_MSGBUF_H
+
+/*
+ * The msqid64_ds structure for i386 architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ *
+ * Pad space is left for:
+ * - 64-bit time_t to solve y2038 problem
+ * - 2 miscellaneous 32-bit values
+ */
+
+struct msqid64_ds {
+        struct ipc64_perm msg_perm;
+        __kernel_time_t msg_stime;      /* last msgsnd time */
+        unsigned long   __unused1;
+        __kernel_time_t msg_rtime;      /* last msgrcv time */
+        unsigned long   __unused2;
+        __kernel_time_t msg_ctime;      /* last change time */
+        unsigned long   __unused3;
+        unsigned long  msg_cbytes;      /* current number of bytes on queue */
+        unsigned long  msg_qnum;        /* number of messages in queue */
+        unsigned long  msg_qbytes;      /* max number of bytes on queue */
+        __kernel_pid_t msg_lspid;       /* pid of last msgsnd */
+        __kernel_pid_t msg_lrpid;       /* last receive pid */
+        unsigned long  __unused4;
+        unsigned long  __unused5;
+};
+
+#endif /* __ASM_AVR32_MSGBUF_H */
diff --git a/arch/avr32/include/asm/mutex.h b/arch/avr32/include/asm/mutex.h
new file mode 100644
index 000000000000..458c1f7fbc18
--- /dev/null
+++ b/arch/avr32/include/asm/mutex.h
@@ -0,0 +1,9 @@
+/*
+ * Pull in the generic implementation for the mutex fastpath.
+ *
+ * TODO: implement optimized primitives instead, or leave the generic
+ * implementation in place, or pick the atomic_xchg() based generic
+ * implementation. (see asm-generic/mutex-xchg.h for details)
+ */
+
+#include <asm-generic/mutex-dec.h>
diff --git a/arch/avr32/include/asm/numnodes.h b/arch/avr32/include/asm/numnodes.h
new file mode 100644
index 000000000000..0b864d7ce330
--- /dev/null
+++ b/arch/avr32/include/asm/numnodes.h
@@ -0,0 +1,7 @@
+#ifndef __ASM_AVR32_NUMNODES_H
+#define __ASM_AVR32_NUMNODES_H
+
+/* Max 4 nodes */
+#define NODES_SHIFT     2
+
+#endif /* __ASM_AVR32_NUMNODES_H */
diff --git a/arch/avr32/include/asm/ocd.h b/arch/avr32/include/asm/ocd.h
new file mode 100644
index 000000000000..6bef09490235
--- /dev/null
+++ b/arch/avr32/include/asm/ocd.h
@@ -0,0 +1,543 @@
+/*
+ * AVR32 OCD Interface and register definitions
+ *
+ * Copyright (C) 2004-2007 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_OCD_H
+#define __ASM_AVR32_OCD_H
+
+/* OCD Register offsets. Abbreviations used below:
+ *
+ *      BP      Breakpoint
+ *      Comm    Communication
+ *      DT      Data Trace
+ *      PC      Program Counter
+ *      PID     Process ID
+ *      R/W     Read/Write
+ *      WP      Watchpoint
+ */
+#define OCD_DID                         0x0000  /* Device ID */
+#define OCD_DC                          0x0008  /* Development Control */
+#define OCD_DS                          0x0010  /* Development Status */
+#define OCD_RWCS                        0x001c  /* R/W Access Control */
+#define OCD_RWA                         0x0024  /* R/W Access Address */
+#define OCD_RWD                         0x0028  /* R/W Access Data */
+#define OCD_WT                          0x002c  /* Watchpoint Trigger */
+#define OCD_DTC                         0x0034  /* Data Trace Control */
+#define OCD_DTSA0                       0x0038  /* DT Start Addr Channel 0 */
+#define OCD_DTSA1                       0x003c  /* DT Start Addr Channel 1 */
+#define OCD_DTEA0                       0x0048  /* DT End Addr Channel 0 */
+#define OCD_DTEA1                       0x004c  /* DT End Addr Channel 1 */
+#define OCD_BWC0A                       0x0058  /* PC BP/WP Control 0A */
+#define OCD_BWC0B                       0x005c  /* PC BP/WP Control 0B */
+#define OCD_BWC1A                       0x0060  /* PC BP/WP Control 1A */
+#define OCD_BWC1B                       0x0064  /* PC BP/WP Control 1B */
+#define OCD_BWC2A                       0x0068  /* PC BP/WP Control 2A */
+#define OCD_BWC2B                       0x006c  /* PC BP/WP Control 2B */
+#define OCD_BWC3A                       0x0070  /* Data BP/WP Control 3A */
+#define OCD_BWC3B                       0x0074  /* Data BP/WP Control 3B */
+#define OCD_BWA0A                       0x0078  /* PC BP/WP Address 0A */
+#define OCD_BWA0B                       0x007c  /* PC BP/WP Address 0B */
+#define OCD_BWA1A                       0x0080  /* PC BP/WP Address 1A */
+#define OCD_BWA1B                       0x0084  /* PC BP/WP Address 1B */
+#define OCD_BWA2A                       0x0088  /* PC BP/WP Address 2A */
+#define OCD_BWA2B                       0x008c  /* PC BP/WP Address 2B */
+#define OCD_BWA3A                       0x0090  /* Data BP/WP Address 3A */
+#define OCD_BWA3B                       0x0094  /* Data BP/WP Address 3B */
+#define OCD_NXCFG                       0x0100  /* Nexus Configuration */
+#define OCD_DINST                       0x0104  /* Debug Instruction */
+#define OCD_DPC                         0x0108  /* Debug Program Counter */
+#define OCD_CPUCM                       0x010c  /* CPU Control Mask */
+#define OCD_DCCPU                       0x0110  /* Debug Comm CPU */
+#define OCD_DCEMU                       0x0114  /* Debug Comm Emulator */
+#define OCD_DCSR                        0x0118  /* Debug Comm Status */
+#define OCD_PID                         0x011c  /* Ownership Trace PID */
+#define OCD_EPC0                        0x0120  /* Event Pair Control 0 */
+#define OCD_EPC1                        0x0124  /* Event Pair Control 1 */
+#define OCD_EPC2                        0x0128  /* Event Pair Control 2 */
+#define OCD_EPC3                        0x012c  /* Event Pair Control 3 */
+#define OCD_AXC                         0x0130  /* AUX port Control */
+
+/* Bits in DID */
+#define OCD_DID_MID_START               1
+#define OCD_DID_MID_SIZE                11
+#define OCD_DID_PN_START                12
+#define OCD_DID_PN_SIZE                 16
+#define OCD_DID_RN_START                28
+#define OCD_DID_RN_SIZE                 4
+
+/* Bits in DC */
+#define OCD_DC_TM_START                 0
+#define OCD_DC_TM_SIZE                  2
+#define OCD_DC_EIC_START                3
+#define OCD_DC_EIC_SIZE                 2
+#define OCD_DC_OVC_START                5
+#define OCD_DC_OVC_SIZE                 3
+#define OCD_DC_SS_BIT                   8
+#define OCD_DC_DBR_BIT                  12
+#define OCD_DC_DBE_BIT                  13
+#define OCD_DC_EOS_START                20
+#define OCD_DC_EOS_SIZE                 2
+#define OCD_DC_SQA_BIT                  22
+#define OCD_DC_IRP_BIT                  23
+#define OCD_DC_IFM_BIT                  24
+#define OCD_DC_TOZ_BIT                  25
+#define OCD_DC_TSR_BIT                  26
+#define OCD_DC_RID_BIT                  27
+#define OCD_DC_ORP_BIT                  28
+#define OCD_DC_MM_BIT                   29
+#define OCD_DC_RES_BIT                  30
+#define OCD_DC_ABORT_BIT                31
+
+/* Bits in DS */
+#define OCD_DS_SSS_BIT                  0
+#define OCD_DS_SWB_BIT                  1
+#define OCD_DS_HWB_BIT                  2
+#define OCD_DS_HWE_BIT                  3
+#define OCD_DS_STP_BIT                  4
+#define OCD_DS_DBS_BIT                  5
+#define OCD_DS_BP_START                 8
+#define OCD_DS_BP_SIZE                  8
+#define OCD_DS_INC_BIT                  24
+#define OCD_DS_BOZ_BIT                  25
+#define OCD_DS_DBA_BIT                  26
+#define OCD_DS_EXB_BIT                  27
+#define OCD_DS_NTBF_BIT                 28
+
+/* Bits in RWCS */
+#define OCD_RWCS_DV_BIT                 0
+#define OCD_RWCS_ERR_BIT                1
+#define OCD_RWCS_CNT_START              2
+#define OCD_RWCS_CNT_SIZE               14
+#define OCD_RWCS_CRC_BIT                19
+#define OCD_RWCS_NTBC_START             20
+#define OCD_RWCS_NTBC_SIZE              2
+#define OCD_RWCS_NTE_BIT                22
+#define OCD_RWCS_NTAP_BIT               23
+#define OCD_RWCS_WRAPPED_BIT            24
+#define OCD_RWCS_CCTRL_START            25
+#define OCD_RWCS_CCTRL_SIZE             2
+#define OCD_RWCS_SZ_START               27
+#define OCD_RWCS_SZ_SIZE                3
+#define OCD_RWCS_RW_BIT                 30
+#define OCD_RWCS_AC_BIT                 31
+
+/* Bits in RWA */
+#define OCD_RWA_RWA_START               0
+#define OCD_RWA_RWA_SIZE                32
+
+/* Bits in RWD */
+#define OCD_RWD_RWD_START               0
+#define OCD_RWD_RWD_SIZE                32
+
+/* Bits in WT */
+#define OCD_WT_DTE_START                20
+#define OCD_WT_DTE_SIZE                 3
+#define OCD_WT_DTS_START                23
+#define OCD_WT_DTS_SIZE                 3
+#define OCD_WT_PTE_START                26
+#define OCD_WT_PTE_SIZE                 3
+#define OCD_WT_PTS_START                29
+#define OCD_WT_PTS_SIZE                 3
+
+/* Bits in DTC */
+#define OCD_DTC_T0WP_BIT                0
+#define OCD_DTC_T1WP_BIT                1
+#define OCD_DTC_ASID0EN_BIT             2
+#define OCD_DTC_ASID0_START             3
+#define OCD_DTC_ASID0_SIZE              8
+#define OCD_DTC_ASID1EN_BIT             11
+#define OCD_DTC_ASID1_START             12
+#define OCD_DTC_ASID1_SIZE              8
+#define OCD_DTC_RWT1_START              28
+#define OCD_DTC_RWT1_SIZE               2
+#define OCD_DTC_RWT0_START              30
+#define OCD_DTC_RWT0_SIZE               2
+
+/* Bits in DTSA0 */
+#define OCD_DTSA0_DTSA_START            0
+#define OCD_DTSA0_DTSA_SIZE             32
+
+/* Bits in DTSA1 */
+#define OCD_DTSA1_DTSA_START            0
+#define OCD_DTSA1_DTSA_SIZE             32
+
+/* Bits in DTEA0 */
+#define OCD_DTEA0_DTEA_START            0
+#define OCD_DTEA0_DTEA_SIZE             32
+
+/* Bits in DTEA1 */
+#define OCD_DTEA1_DTEA_START            0
+#define OCD_DTEA1_DTEA_SIZE             32
+
+/* Bits in BWC0A */
+#define OCD_BWC0A_ASIDEN_BIT            0
+#define OCD_BWC0A_ASID_START            1
+#define OCD_BWC0A_ASID_SIZE             8
+#define OCD_BWC0A_EOC_BIT               14
+#define OCD_BWC0A_AME_BIT               25
+#define OCD_BWC0A_BWE_START             30
+#define OCD_BWC0A_BWE_SIZE              2
+
+/* Bits in BWC0B */
+#define OCD_BWC0B_ASIDEN_BIT            0
+#define OCD_BWC0B_ASID_START            1
+#define OCD_BWC0B_ASID_SIZE             8
+#define OCD_BWC0B_EOC_BIT               14
+#define OCD_BWC0B_AME_BIT               25
+#define OCD_BWC0B_BWE_START             30
+#define OCD_BWC0B_BWE_SIZE              2
+
+/* Bits in BWC1A */
+#define OCD_BWC1A_ASIDEN_BIT            0
+#define OCD_BWC1A_ASID_START            1
+#define OCD_BWC1A_ASID_SIZE             8
+#define OCD_BWC1A_EOC_BIT               14
+#define OCD_BWC1A_AME_BIT               25
+#define OCD_BWC1A_BWE_START             30
+#define OCD_BWC1A_BWE_SIZE              2
+
+/* Bits in BWC1B */
+#define OCD_BWC1B_ASIDEN_BIT            0
+#define OCD_BWC1B_ASID_START            1
+#define OCD_BWC1B_ASID_SIZE             8
+#define OCD_BWC1B_EOC_BIT               14
+#define OCD_BWC1B_AME_BIT               25
+#define OCD_BWC1B_BWE_START             30
+#define OCD_BWC1B_BWE_SIZE              2
+
+/* Bits in BWC2A */
+#define OCD_BWC2A_ASIDEN_BIT            0
+#define OCD_BWC2A_ASID_START            1
+#define OCD_BWC2A_ASID_SIZE             8
+#define OCD_BWC2A_EOC_BIT               14
+#define OCD_BWC2A_AMB_START             20
+#define OCD_BWC2A_AMB_SIZE              5
+#define OCD_BWC2A_AME_BIT               25
+#define OCD_BWC2A_BWE_START             30
+#define OCD_BWC2A_BWE_SIZE              2
+
+/* Bits in BWC2B */
+#define OCD_BWC2B_ASIDEN_BIT            0
+#define OCD_BWC2B_ASID_START            1
+#define OCD_BWC2B_ASID_SIZE             8
+#define OCD_BWC2B_EOC_BIT               14
+#define OCD_BWC2B_AME_BIT               25
+#define OCD_BWC2B_BWE_START             30
+#define OCD_BWC2B_BWE_SIZE              2
+
+/* Bits in BWC3A */
+#define OCD_BWC3A_ASIDEN_BIT            0
+#define OCD_BWC3A_ASID_START            1
+#define OCD_BWC3A_ASID_SIZE             8
+#define OCD_BWC3A_SIZE_START            9
+#define OCD_BWC3A_SIZE_SIZE             3
+#define OCD_BWC3A_EOC_BIT               14
+#define OCD_BWC3A_BWO_START             16
+#define OCD_BWC3A_BWO_SIZE              2
+#define OCD_BWC3A_BME_START             20
+#define OCD_BWC3A_BME_SIZE              4
+#define OCD_BWC3A_BRW_START             28
+#define OCD_BWC3A_BRW_SIZE              2
+#define OCD_BWC3A_BWE_START             30
+#define OCD_BWC3A_BWE_SIZE              2
+
+/* Bits in BWC3B */
+#define OCD_BWC3B_ASIDEN_BIT            0
+#define OCD_BWC3B_ASID_START            1
+#define OCD_BWC3B_ASID_SIZE             8
+#define OCD_BWC3B_SIZE_START            9
+#define OCD_BWC3B_SIZE_SIZE             3
+#define OCD_BWC3B_EOC_BIT               14
+#define OCD_BWC3B_BWO_START             16
+#define OCD_BWC3B_BWO_SIZE              2
+#define OCD_BWC3B_BME_START             20
+#define OCD_BWC3B_BME_SIZE              4
+#define OCD_BWC3B_BRW_START             28
+#define OCD_BWC3B_BRW_SIZE              2
+#define OCD_BWC3B_BWE_START             30
+#define OCD_BWC3B_BWE_SIZE              2
+
+/* Bits in BWA0A */
+#define OCD_BWA0A_BWA_START             0
+#define OCD_BWA0A_BWA_SIZE              32
+
+/* Bits in BWA0B */
+#define OCD_BWA0B_BWA_START             0
+#define OCD_BWA0B_BWA_SIZE              32
+
+/* Bits in BWA1A */
+#define OCD_BWA1A_BWA_START             0
+#define OCD_BWA1A_BWA_SIZE              32
+
+/* Bits in BWA1B */
+#define OCD_BWA1B_BWA_START             0
+#define OCD_BWA1B_BWA_SIZE              32
+
+/* Bits in BWA2A */
+#define OCD_BWA2A_BWA_START             0
+#define OCD_BWA2A_BWA_SIZE              32
+
+/* Bits in BWA2B */
+#define OCD_BWA2B_BWA_START             0
+#define OCD_BWA2B_BWA_SIZE              32
+
+/* Bits in BWA3A */
+#define OCD_BWA3A_BWA_START             0
+#define OCD_BWA3A_BWA_SIZE              32
+
+/* Bits in BWA3B */
+#define OCD_BWA3B_BWA_START             0
+#define OCD_BWA3B_BWA_SIZE              32
+
+/* Bits in NXCFG */
+#define OCD_NXCFG_NXARCH_START          0
+#define OCD_NXCFG_NXARCH_SIZE           4
+#define OCD_NXCFG_NXOCD_START           4
+#define OCD_NXCFG_NXOCD_SIZE            4
+#define OCD_NXCFG_NXPCB_START           8
+#define OCD_NXCFG_NXPCB_SIZE            4
+#define OCD_NXCFG_NXDB_START            12
+#define OCD_NXCFG_NXDB_SIZE             4
+#define OCD_NXCFG_MXMSEO_BIT            16
+#define OCD_NXCFG_NXMDO_START           17
+#define OCD_NXCFG_NXMDO_SIZE            4
+#define OCD_NXCFG_NXPT_BIT              21
+#define OCD_NXCFG_NXOT_BIT              22
+#define OCD_NXCFG_NXDWT_BIT             23
+#define OCD_NXCFG_NXDRT_BIT             24
+#define OCD_NXCFG_NXDTC_START           25
+#define OCD_NXCFG_NXDTC_SIZE            3
+#define OCD_NXCFG_NXDMA_BIT             28
+
+/* Bits in DINST */
+#define OCD_DINST_DINST_START           0
+#define OCD_DINST_DINST_SIZE            32
+
+/* Bits in CPUCM */
+#define OCD_CPUCM_BEM_BIT               1
+#define OCD_CPUCM_FEM_BIT               2
+#define OCD_CPUCM_REM_BIT               3
+#define OCD_CPUCM_IBEM_BIT              4
+#define OCD_CPUCM_IEEM_BIT              5
+
+/* Bits in DCCPU */
+#define OCD_DCCPU_DATA_START            0
+#define OCD_DCCPU_DATA_SIZE             32
+
+/* Bits in DCEMU */
+#define OCD_DCEMU_DATA_START            0
+#define OCD_DCEMU_DATA_SIZE             32
+
+/* Bits in DCSR */
+#define OCD_DCSR_CPUD_BIT               0
+#define OCD_DCSR_EMUD_BIT               1
+
+/* Bits in PID */
+#define OCD_PID_PROCESS_START           0
+#define OCD_PID_PROCESS_SIZE            32
+
+/* Bits in EPC0 */
+#define OCD_EPC0_RNG_START              0
+#define OCD_EPC0_RNG_SIZE               2
+#define OCD_EPC0_CE_BIT                 4
+#define OCD_EPC0_ECNT_START             16
+#define OCD_EPC0_ECNT_SIZE              16
+
+/* Bits in EPC1 */
+#define OCD_EPC1_RNG_START              0
+#define OCD_EPC1_RNG_SIZE               2
+#define OCD_EPC1_ATB_BIT                5
+#define OCD_EPC1_AM_BIT                 6
+
+/* Bits in EPC2 */
+#define OCD_EPC2_RNG_START              0
+#define OCD_EPC2_RNG_SIZE               2
+#define OCD_EPC2_DB_START               2
+#define OCD_EPC2_DB_SIZE                2
+
+/* Bits in EPC3 */
+#define OCD_EPC3_RNG_START              0
+#define OCD_EPC3_RNG_SIZE               2
+#define OCD_EPC3_DWE_BIT                2
+
+/* Bits in AXC */
+#define OCD_AXC_DIV_START               0
+#define OCD_AXC_DIV_SIZE                4
+#define OCD_AXC_AXE_BIT                 8
+#define OCD_AXC_AXS_BIT                 9
+#define OCD_AXC_DDR_BIT                 10
+#define OCD_AXC_LS_BIT                  11
+#define OCD_AXC_REX_BIT                 12
+#define OCD_AXC_REXTEN_BIT              13
+
+/* Constants for DC:EIC */
+#define OCD_EIC_PROGRAM_AND_DATA_TRACE  0
+#define OCD_EIC_BREAKPOINT              1
+#define OCD_EIC_NOP                     2
+
+/* Constants for DC:OVC */
+#define OCD_OVC_OVERRUN                 0
+#define OCD_OVC_DELAY_CPU_BTM           1
+#define OCD_OVC_DELAY_CPU_DTM           2
+#define OCD_OVC_DELAY_CPU_BTM_DTM       3
+
+/* Constants for DC:EOS */
+#define OCD_EOS_NOP                     0
+#define OCD_EOS_DEBUG_MODE              1
+#define OCD_EOS_BREAKPOINT_WATCHPOINT   2
+#define OCD_EOS_THQ                     3
+
+/* Constants for RWCS:NTBC */
+#define OCD_NTBC_OVERWRITE              0
+#define OCD_NTBC_DISABLE                1
+#define OCD_NTBC_BREAKPOINT             2
+
+/* Constants for RWCS:CCTRL */
+#define OCD_CCTRL_AUTO                  0
+#define OCD_CCTRL_CACHED                1
+#define OCD_CCTRL_UNCACHED              2
+
+/* Constants for RWCS:SZ */
+#define OCD_SZ_BYTE                     0
+#define OCD_SZ_HALFWORD                 1
+#define OCD_SZ_WORD                     2
+
+/* Constants for WT:PTS */
+#define OCD_PTS_DISABLED                0
+#define OCD_PTS_PROGRAM_0B              1
+#define OCD_PTS_PROGRAM_1A              2
+#define OCD_PTS_PROGRAM_1B              3
+#define OCD_PTS_PROGRAM_2A              4
+#define OCD_PTS_PROGRAM_2B              5
+#define OCD_PTS_DATA_3A                 6
+#define OCD_PTS_DATA_3B                 7
+
+/* Constants for DTC:RWT1 */
+#define OCD_RWT1_NO_TRACE               0
+#define OCD_RWT1_DATA_READ              1
+#define OCD_RWT1_DATA_WRITE             2
+#define OCD_RWT1_DATA_READ_WRITE        3
+
+/* Constants for DTC:RWT0 */
+#define OCD_RWT0_NO_TRACE               0
+#define OCD_RWT0_DATA_READ              1
+#define OCD_RWT0_DATA_WRITE             2
+#define OCD_RWT0_DATA_READ_WRITE        3
+
+/* Constants for BWC0A:BWE */
+#define OCD_BWE_DISABLED                0
+#define OCD_BWE_BREAKPOINT_ENABLED      1
+#define OCD_BWE_WATCHPOINT_ENABLED      3
+
+/* Constants for BWC0B:BWE */
+#define OCD_BWE_DISABLED                0
+#define OCD_BWE_BREAKPOINT_ENABLED      1
+#define OCD_BWE_WATCHPOINT_ENABLED      3
+
+/* Constants for BWC1A:BWE */
+#define OCD_BWE_DISABLED                0
+#define OCD_BWE_BREAKPOINT_ENABLED      1
+#define OCD_BWE_WATCHPOINT_ENABLED      3
+
+/* Constants for BWC1B:BWE */
+#define OCD_BWE_DISABLED                0
+#define OCD_BWE_BREAKPOINT_ENABLED      1
+#define OCD_BWE_WATCHPOINT_ENABLED      3
+
+/* Constants for BWC2A:BWE */
+#define OCD_BWE_DISABLED                0
+#define OCD_BWE_BREAKPOINT_ENABLED      1
+#define OCD_BWE_WATCHPOINT_ENABLED      3
+
+/* Constants for BWC2B:BWE */
+#define OCD_BWE_DISABLED                0
+#define OCD_BWE_BREAKPOINT_ENABLED      1
+#define OCD_BWE_WATCHPOINT_ENABLED      3
+
+/* Constants for BWC3A:SIZE */
+#define OCD_SIZE_BYTE_ACCESS            4
+#define OCD_SIZE_HALFWORD_ACCESS        5
+#define OCD_SIZE_WORD_ACCESS            6
+#define OCD_SIZE_DOUBLE_WORD_ACCESS     7
+
+/* Constants for BWC3A:BRW */
+#define OCD_BRW_READ_BREAK              0
+#define OCD_BRW_WRITE_BREAK             1
+#define OCD_BRW_ANY_ACCES_BREAK         2
+
+/* Constants for BWC3A:BWE */
+#define OCD_BWE_DISABLED                0
+#define OCD_BWE_BREAKPOINT_ENABLED      1
+#define OCD_BWE_WATCHPOINT_ENABLED      3
+
+/* Constants for BWC3B:SIZE */
+#define OCD_SIZE_BYTE_ACCESS            4
+#define OCD_SIZE_HALFWORD_ACCESS        5
+#define OCD_SIZE_WORD_ACCESS            6
+#define OCD_SIZE_DOUBLE_WORD_ACCESS     7
+
+/* Constants for BWC3B:BRW */
+#define OCD_BRW_READ_BREAK              0
+#define OCD_BRW_WRITE_BREAK             1
+#define OCD_BRW_ANY_ACCES_BREAK         2
+
+/* Constants for BWC3B:BWE */
+#define OCD_BWE_DISABLED                0
+#define OCD_BWE_BREAKPOINT_ENABLED      1
+#define OCD_BWE_WATCHPOINT_ENABLED      3
+
+/* Constants for EPC0:RNG */
+#define OCD_RNG_DISABLED                0
+#define OCD_RNG_EXCLUSIVE               1
+#define OCD_RNG_INCLUSIVE               2
+
+/* Constants for EPC1:RNG */
+#define OCD_RNG_DISABLED                0
+#define OCD_RNG_EXCLUSIVE               1
+#define OCD_RNG_INCLUSIVE               2
+
+/* Constants for EPC2:RNG */
+#define OCD_RNG_DISABLED                0
+#define OCD_RNG_EXCLUSIVE               1
+#define OCD_RNG_INCLUSIVE               2
+
+/* Constants for EPC2:DB */
+#define OCD_DB_DISABLED                 0
+#define OCD_DB_CHAINED_B                1
+#define OCD_DB_CHAINED_A                2
+#define OCD_DB_AHAINED_A_AND_B          3
+
+/* Constants for EPC3:RNG */
+#define OCD_RNG_DISABLED                0
+#define OCD_RNG_EXCLUSIVE               1
+#define OCD_RNG_INCLUSIVE               2
+
+#ifndef __ASSEMBLER__
+
+/* Register access macros */
+static inline unsigned long __ocd_read(unsigned int reg)
+{
+        return __builtin_mfdr(reg);
+}
+
+static inline void __ocd_write(unsigned int reg, unsigned long value)
+{
+        __builtin_mtdr(reg, value);
+}
+
+#define ocd_read(reg)                   __ocd_read(OCD_##reg)
+#define ocd_write(reg, value)           __ocd_write(OCD_##reg, value)
+
+struct task_struct;
+
+void ocd_enable(struct task_struct *child);
+void ocd_disable(struct task_struct *child);
+
+#endif /* !__ASSEMBLER__ */
+
+#endif /* __ASM_AVR32_OCD_H */
diff --git a/arch/avr32/include/asm/page.h b/arch/avr32/include/asm/page.h
new file mode 100644
index 000000000000..f805d1cb11bc
--- /dev/null
+++ b/arch/avr32/include/asm/page.h
@@ -0,0 +1,104 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_PAGE_H
+#define __ASM_AVR32_PAGE_H
+
+#include <linux/const.h>
+
+/* PAGE_SHIFT determines the page size */
+#define PAGE_SHIFT      12
+#define PAGE_SIZE       (_AC(1, UL) << PAGE_SHIFT)
+#define PAGE_MASK       (~(PAGE_SIZE-1))
+#define PTE_MASK        PAGE_MASK
+
+#ifndef __ASSEMBLY__
+
+#include <asm/addrspace.h>
+
+extern void clear_page(void *to);
+extern void copy_page(void *to, void *from);
+
+#define clear_user_page(page, vaddr, pg)        clear_page(page)
+#define copy_user_page(to, from, vaddr, pg)     copy_page(to, from)
+
+/*
+ * These are used to make use of C type-checking..
+ */
+typedef struct { unsigned long pte; } pte_t;
+typedef struct { unsigned long pgd; } pgd_t;
+typedef struct { unsigned long pgprot; } pgprot_t;
+typedef struct page *pgtable_t;
+
+#define pte_val(x)              ((x).pte)
+#define pgd_val(x)              ((x).pgd)
+#define pgprot_val(x)           ((x).pgprot)
+
+#define __pte(x)                ((pte_t) { (x) })
+#define __pgd(x)                ((pgd_t) { (x) })
+#define __pgprot(x)             ((pgprot_t) { (x) })
+
+/* FIXME: These should be removed soon */
+extern unsigned long memory_start, memory_end;
+
+/* Pure 2^n version of get_order */
+static inline int get_order(unsigned long size)
+{
+        unsigned lz;
+
+        size = (size - 1) >> PAGE_SHIFT;
+        asm("clz %0, %1" : "=r"(lz) : "r"(size));
+        return 32 - lz;
+}
+
+#endif /* !__ASSEMBLY__ */
+
+/*
+ * The hardware maps the virtual addresses 0x80000000 -> 0x9fffffff
+ * permanently to the physical addresses 0x00000000 -> 0x1fffffff when
+ * segmentation is enabled. We want to make use of this in order to
+ * minimize TLB pressure.
+ */
+#define PAGE_OFFSET             (0x80000000UL)
+
+/*
+ * ALSA uses virt_to_page() on DMA pages, which I'm not entirely sure
+ * is a good idea. Anyway, we can't simply subtract PAGE_OFFSET here
+ * in that case, so we'll have to mask out the three most significant
+ * bits of the address instead...
+ *
+ * What's the difference between __pa() and virt_to_phys() anyway?
+ */
+#define __pa(x)         PHYSADDR(x)
+#define __va(x)         ((void *)(P1SEGADDR(x)))
+
+#define MAP_NR(addr)    (((unsigned long)(addr) - PAGE_OFFSET) >> PAGE_SHIFT)
+
+#define phys_to_page(phys)      (pfn_to_page(phys >> PAGE_SHIFT))
+#define page_to_phys(page)      (page_to_pfn(page) << PAGE_SHIFT)
+
+#ifndef CONFIG_NEED_MULTIPLE_NODES
+
+#define PHYS_PFN_OFFSET         (CONFIG_PHYS_OFFSET >> PAGE_SHIFT)
+
+#define pfn_to_page(pfn)        (mem_map + ((pfn) - PHYS_PFN_OFFSET))
+#define page_to_pfn(page)       ((unsigned long)((page) - mem_map) + PHYS_PFN_OFFSET)
+#define pfn_valid(pfn)          ((pfn) >= PHYS_PFN_OFFSET && (pfn) < (PHYS_PFN_OFFSET + max_mapnr))
+#endif /* CONFIG_NEED_MULTIPLE_NODES */
+
+#define virt_to_page(kaddr)     pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
+#define virt_addr_valid(kaddr)  pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
+
+#define VM_DATA_DEFAULT_FLAGS   (VM_READ | VM_WRITE |   \
+                                 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
+
+/*
+ * Memory above this physical address will be considered highmem.
+ */
+#define HIGHMEM_START           0x20000000UL
+
+#endif /* __ASM_AVR32_PAGE_H */
diff --git a/arch/avr32/include/asm/param.h b/arch/avr32/include/asm/param.h
new file mode 100644
index 000000000000..34bc8d4c3b29
--- /dev/null
+++ b/arch/avr32/include/asm/param.h
@@ -0,0 +1,23 @@
+#ifndef __ASM_AVR32_PARAM_H
+#define __ASM_AVR32_PARAM_H
+
+#ifdef __KERNEL__
+# define HZ             CONFIG_HZ
+# define USER_HZ        100             /* User interfaces are in "ticks" */
+# define CLOCKS_PER_SEC (USER_HZ)       /* frequency at which times() counts */
+#endif
+
+#ifndef HZ
+# define HZ             100
+#endif
+
+/* TODO: Should be configurable */
+#define EXEC_PAGESIZE   4096
+
+#ifndef NOGROUP
+# define NOGROUP        (-1)
+#endif
+
+#define MAXHOSTNAMELEN  64
+
+#endif /* __ASM_AVR32_PARAM_H */
diff --git a/arch/avr32/include/asm/pci.h b/arch/avr32/include/asm/pci.h
new file mode 100644
index 000000000000..a32a02372017
--- /dev/null
+++ b/arch/avr32/include/asm/pci.h
@@ -0,0 +1,10 @@
+#ifndef __ASM_AVR32_PCI_H__
+#define __ASM_AVR32_PCI_H__
+
+/* We don't support PCI yet, but some drivers require this file anyway */
+
+#define PCI_DMA_BUS_IS_PHYS     (1)
+
+#include <asm-generic/pci-dma-compat.h>
+
+#endif /* __ASM_AVR32_PCI_H__ */
diff --git a/arch/avr32/include/asm/percpu.h b/arch/avr32/include/asm/percpu.h
new file mode 100644
index 000000000000..69227b4cd0d4
--- /dev/null
+++ b/arch/avr32/include/asm/percpu.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_AVR32_PERCPU_H
+#define __ASM_AVR32_PERCPU_H
+
+#include <asm-generic/percpu.h>
+
+#endif /* __ASM_AVR32_PERCPU_H */
diff --git a/arch/avr32/include/asm/pgalloc.h b/arch/avr32/include/asm/pgalloc.h
new file mode 100644
index 000000000000..640821323943
--- /dev/null
+++ b/arch/avr32/include/asm/pgalloc.h
@@ -0,0 +1,98 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_PGALLOC_H
+#define __ASM_AVR32_PGALLOC_H
+
+#include <linux/quicklist.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+
+#define QUICK_PGD       0       /* Preserve kernel mappings over free */
+#define QUICK_PT        1       /* Zero on free */
+
+static inline void pmd_populate_kernel(struct mm_struct *mm,
+                                       pmd_t *pmd, pte_t *pte)
+{
+        set_pmd(pmd, __pmd((unsigned long)pte));
+}
+
+static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
+                                    pgtable_t pte)
+{
+        set_pmd(pmd, __pmd((unsigned long)page_address(pte)));
+}
+#define pmd_pgtable(pmd) pmd_page(pmd)
+
+static inline void pgd_ctor(void *x)
+{
+        pgd_t *pgd = x;
+
+        memcpy(pgd + USER_PTRS_PER_PGD,
+                swapper_pg_dir + USER_PTRS_PER_PGD,
+                (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
+}
+
+/*
+ * Allocate and free page tables
+ */
+static inline pgd_t *pgd_alloc(struct mm_struct *mm)
+{
+        return quicklist_alloc(QUICK_PGD, GFP_KERNEL | __GFP_REPEAT, pgd_ctor);
+}
+
+static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
+{
+        quicklist_free(QUICK_PGD, NULL, pgd);
+}
+
+static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
+                                          unsigned long address)
+{
+        return quicklist_alloc(QUICK_PT, GFP_KERNEL | __GFP_REPEAT, NULL);
+}
+
+static inline pgtable_t pte_alloc_one(struct mm_struct *mm,
+                                         unsigned long address)
+{
+        struct page *page;
+        void *pg;
+
+        pg = quicklist_alloc(QUICK_PT, GFP_KERNEL | __GFP_REPEAT, NULL);
+        if (!pg)
+                return NULL;
+
+        page = virt_to_page(pg);
+        pgtable_page_ctor(page);
+
+        return page;
+}
+
+static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
+{
+        quicklist_free(QUICK_PT, NULL, pte);
+}
+
+static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
+{
+        pgtable_page_dtor(pte);
+        quicklist_free_page(QUICK_PT, NULL, pte);
+}
+
+#define __pte_free_tlb(tlb,pte)                         \
+do {                                                    \
+        pgtable_page_dtor(pte);                         \
+        tlb_remove_page((tlb), pte);                    \
+} while (0)
+
+static inline void check_pgt_cache(void)
+{
+        quicklist_trim(QUICK_PGD, NULL, 25, 16);
+        quicklist_trim(QUICK_PT, NULL, 25, 16);
+}
+
+#endif /* __ASM_AVR32_PGALLOC_H */
diff --git a/arch/avr32/include/asm/pgtable-2level.h b/arch/avr32/include/asm/pgtable-2level.h
new file mode 100644
index 000000000000..425dd567b5b9
--- /dev/null
+++ b/arch/avr32/include/asm/pgtable-2level.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_PGTABLE_2LEVEL_H
+#define __ASM_AVR32_PGTABLE_2LEVEL_H
+
+#include <asm-generic/pgtable-nopmd.h>
+
+/*
+ * Traditional 2-level paging structure
+ */
+#define PGDIR_SHIFT     22
+#define PTRS_PER_PGD    1024
+
+#define PTRS_PER_PTE    1024
+
+#ifndef __ASSEMBLY__
+#define pte_ERROR(e) \
+        printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
+#define pgd_ERROR(e) \
+        printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
+
+/*
+ * Certain architectures need to do special things when PTEs
+ * within a page table are directly modified.  Thus, the following
+ * hook is made available.
+ */
+#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
+#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep, pteval)
+
+/*
+ * (pmds are folded into pgds so this doesn't get actually called,
+ * but the define is needed for a generic inline function.)
+ */
+#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
+
+#define pte_pfn(x)              ((unsigned long)(((x).pte >> PAGE_SHIFT)))
+#define pfn_pte(pfn, prot)      __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
+#define pfn_pmd(pfn, prot)      __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* __ASM_AVR32_PGTABLE_2LEVEL_H */
diff --git a/arch/avr32/include/asm/pgtable.h b/arch/avr32/include/asm/pgtable.h
new file mode 100644
index 000000000000..fecdda16f444
--- /dev/null
+++ b/arch/avr32/include/asm/pgtable.h
@@ -0,0 +1,377 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_PGTABLE_H
+#define __ASM_AVR32_PGTABLE_H
+
+#include <asm/addrspace.h>
+
+#ifndef __ASSEMBLY__
+#include <linux/sched.h>
+
+#endif /* !__ASSEMBLY__ */
+
+/*
+ * Use two-level page tables just as the i386 (without PAE)
+ */
+#include <asm/pgtable-2level.h>
+
+/*
+ * The following code might need some cleanup when the values are
+ * final...
+ */
+#define PMD_SIZE        (1UL << PMD_SHIFT)
+#define PMD_MASK        (~(PMD_SIZE-1))
+#define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
+#define PGDIR_MASK      (~(PGDIR_SIZE-1))
+
+#define USER_PTRS_PER_PGD       (TASK_SIZE / PGDIR_SIZE)
+#define FIRST_USER_ADDRESS      0
+
+#ifndef __ASSEMBLY__
+extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
+extern void paging_init(void);
+
+/*
+ * ZERO_PAGE is a global shared page that is always zero: used for
+ * zero-mapped memory areas etc.
+ */
+extern struct page *empty_zero_page;
+#define ZERO_PAGE(vaddr) (empty_zero_page)
+
+/*
+ * Just any arbitrary offset to the start of the vmalloc VM area: the
+ * current 8 MiB value just means that there will be a 8 MiB "hole"
+ * after the uncached physical memory (P2 segment) until the vmalloc
+ * area starts. That means that any out-of-bounds memory accesses will
+ * hopefully be caught; we don't know if the end of the P1/P2 segments
+ * are actually used for anything, but it is anyway safer to let the
+ * MMU catch these kinds of errors than to rely on the memory bus.
+ *
+ * A "hole" of the same size is added to the end of the P3 segment as
+ * well. It might seem wasteful to use 16 MiB of virtual address space
+ * on this, but we do have 512 MiB of it...
+ *
+ * The vmalloc() routines leave a hole of 4 KiB between each vmalloced
+ * area for the same reason.
+ */
+#define VMALLOC_OFFSET  (8 * 1024 * 1024)
+#define VMALLOC_START   (P3SEG + VMALLOC_OFFSET)
+#define VMALLOC_END     (P4SEG - VMALLOC_OFFSET)
+#endif /* !__ASSEMBLY__ */
+
+/*
+ * Page flags. Some of these flags are not directly supported by
+ * hardware, so we have to emulate them.
+ */
+#define _TLBEHI_BIT_VALID       9
+#define _TLBEHI_VALID           (1 << _TLBEHI_BIT_VALID)
+
+#define _PAGE_BIT_WT            0  /* W-bit   : write-through */
+#define _PAGE_BIT_DIRTY         1  /* D-bit   : page changed */
+#define _PAGE_BIT_SZ0           2  /* SZ0-bit : Size of page */
+#define _PAGE_BIT_SZ1           3  /* SZ1-bit : Size of page */
+#define _PAGE_BIT_EXECUTE       4  /* X-bit   : execute access allowed */
+#define _PAGE_BIT_RW            5  /* AP0-bit : write access allowed */
+#define _PAGE_BIT_USER          6  /* AP1-bit : user space access allowed */
+#define _PAGE_BIT_BUFFER        7  /* B-bit   : bufferable */
+#define _PAGE_BIT_GLOBAL        8  /* G-bit   : global (ignore ASID) */
+#define _PAGE_BIT_CACHABLE      9  /* C-bit   : cachable */
+
+/* If we drop support for 1K pages, we get two extra bits */
+#define _PAGE_BIT_PRESENT       10
+#define _PAGE_BIT_ACCESSED      11 /* software: page was accessed */
+
+/* The following flags are only valid when !PRESENT */
+#define _PAGE_BIT_FILE          0 /* software: pagecache or swap? */
+
+#define _PAGE_WT                (1 << _PAGE_BIT_WT)
+#define _PAGE_DIRTY             (1 << _PAGE_BIT_DIRTY)
+#define _PAGE_EXECUTE           (1 << _PAGE_BIT_EXECUTE)
+#define _PAGE_RW                (1 << _PAGE_BIT_RW)
+#define _PAGE_USER              (1 << _PAGE_BIT_USER)
+#define _PAGE_BUFFER            (1 << _PAGE_BIT_BUFFER)
+#define _PAGE_GLOBAL            (1 << _PAGE_BIT_GLOBAL)
+#define _PAGE_CACHABLE          (1 << _PAGE_BIT_CACHABLE)
+
+/* Software flags */
+#define _PAGE_ACCESSED          (1 << _PAGE_BIT_ACCESSED)
+#define _PAGE_PRESENT           (1 << _PAGE_BIT_PRESENT)
+#define _PAGE_FILE              (1 << _PAGE_BIT_FILE)
+
+/*
+ * Page types, i.e. sizes. _PAGE_TYPE_NONE corresponds to what is
+ * usually called _PAGE_PROTNONE on other architectures.
+ *
+ * XXX: Find out if _PAGE_PROTNONE is equivalent with !_PAGE_USER. If
+ * so, we can encode all possible page sizes (although we can't really
+ * support 1K pages anyway due to the _PAGE_PRESENT and _PAGE_ACCESSED
+ * bits)
+ *
+ */
+#define _PAGE_TYPE_MASK         ((1 << _PAGE_BIT_SZ0) | (1 << _PAGE_BIT_SZ1))
+#define _PAGE_TYPE_NONE         (0 << _PAGE_BIT_SZ0)
+#define _PAGE_TYPE_SMALL        (1 << _PAGE_BIT_SZ0)
+#define _PAGE_TYPE_MEDIUM       (2 << _PAGE_BIT_SZ0)
+#define _PAGE_TYPE_LARGE        (3 << _PAGE_BIT_SZ0)
+
+/*
+ * Mask which drop software flags. We currently can't handle more than
+ * 512 MiB of physical memory, so we can use bits 29-31 for other
+ * stuff.  With a fixed 4K page size, we can use bits 10-11 as well as
+ * bits 2-3 (SZ)
+ */
+#define _PAGE_FLAGS_HARDWARE_MASK       0xfffff3ff
+
+#define _PAGE_FLAGS_CACHE_MASK  (_PAGE_CACHABLE | _PAGE_BUFFER | _PAGE_WT)
+
+/* Flags that may be modified by software */
+#define _PAGE_CHG_MASK          (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY \
+                                 | _PAGE_FLAGS_CACHE_MASK)
+
+#define _PAGE_FLAGS_READ        (_PAGE_CACHABLE | _PAGE_BUFFER)
+#define _PAGE_FLAGS_WRITE       (_PAGE_FLAGS_READ | _PAGE_RW | _PAGE_DIRTY)
+
+#define _PAGE_NORMAL(x) __pgprot((x) | _PAGE_PRESENT | _PAGE_TYPE_SMALL \
+                                 | _PAGE_ACCESSED)
+
+#define PAGE_NONE       (_PAGE_ACCESSED | _PAGE_TYPE_NONE)
+#define PAGE_READ       (_PAGE_FLAGS_READ | _PAGE_USER)
+#define PAGE_EXEC       (_PAGE_FLAGS_READ | _PAGE_EXECUTE | _PAGE_USER)
+#define PAGE_WRITE      (_PAGE_FLAGS_WRITE | _PAGE_USER)
+#define PAGE_KERNEL     _PAGE_NORMAL(_PAGE_FLAGS_WRITE | _PAGE_EXECUTE | _PAGE_GLOBAL)
+#define PAGE_KERNEL_RO  _PAGE_NORMAL(_PAGE_FLAGS_READ | _PAGE_EXECUTE | _PAGE_GLOBAL)
+
+#define _PAGE_P(x)      _PAGE_NORMAL((x) & ~(_PAGE_RW | _PAGE_DIRTY))
+#define _PAGE_S(x)      _PAGE_NORMAL(x)
+
+#define PAGE_COPY       _PAGE_P(PAGE_WRITE | PAGE_READ)
+#define PAGE_SHARED     _PAGE_S(PAGE_WRITE | PAGE_READ)
+
+#ifndef __ASSEMBLY__
+/*
+ * The hardware supports flags for write- and execute access. Read is
+ * always allowed if the page is loaded into the TLB, so the "-w-",
+ * "--x" and "-wx" mappings are implemented as "rw-", "r-x" and "rwx",
+ * respectively.
+ *
+ * The "---" case is handled by software; the page will simply not be
+ * loaded into the TLB if the page type is _PAGE_TYPE_NONE.
+ */
+
+#define __P000  __pgprot(PAGE_NONE)
+#define __P001  _PAGE_P(PAGE_READ)
+#define __P010  _PAGE_P(PAGE_WRITE)
+#define __P011  _PAGE_P(PAGE_WRITE | PAGE_READ)
+#define __P100  _PAGE_P(PAGE_EXEC)
+#define __P101  _PAGE_P(PAGE_EXEC | PAGE_READ)
+#define __P110  _PAGE_P(PAGE_EXEC | PAGE_WRITE)
+#define __P111  _PAGE_P(PAGE_EXEC | PAGE_WRITE | PAGE_READ)
+
+#define __S000  __pgprot(PAGE_NONE)
+#define __S001  _PAGE_S(PAGE_READ)
+#define __S010  _PAGE_S(PAGE_WRITE)
+#define __S011  _PAGE_S(PAGE_WRITE | PAGE_READ)
+#define __S100  _PAGE_S(PAGE_EXEC)
+#define __S101  _PAGE_S(PAGE_EXEC | PAGE_READ)
+#define __S110  _PAGE_S(PAGE_EXEC | PAGE_WRITE)
+#define __S111  _PAGE_S(PAGE_EXEC | PAGE_WRITE | PAGE_READ)
+
+#define pte_none(x)     (!pte_val(x))
+#define pte_present(x)  (pte_val(x) & _PAGE_PRESENT)
+
+#define pte_clear(mm,addr,xp)                                   \
+        do {                                                    \
+                set_pte_at(mm, addr, xp, __pte(0));             \
+        } while (0)
+
+/*
+ * The following only work if pte_present() is true.
+ * Undefined behaviour if not..
+ */
+static inline int pte_write(pte_t pte)
+{
+        return pte_val(pte) & _PAGE_RW;
+}
+static inline int pte_dirty(pte_t pte)
+{
+        return pte_val(pte) & _PAGE_DIRTY;
+}
+static inline int pte_young(pte_t pte)
+{
+        return pte_val(pte) & _PAGE_ACCESSED;
+}
+static inline int pte_special(pte_t pte)
+{
+        return 0;
+}
+
+/*
+ * The following only work if pte_present() is not true.
+ */
+static inline int pte_file(pte_t pte)
+{
+        return pte_val(pte) & _PAGE_FILE;
+}
+
+/* Mutator functions for PTE bits */
+static inline pte_t pte_wrprotect(pte_t pte)
+{
+        set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW));
+        return pte;
+}
+static inline pte_t pte_mkclean(pte_t pte)
+{
+        set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY));
+        return pte;
+}
+static inline pte_t pte_mkold(pte_t pte)
+{
+        set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED));
+        return pte;
+}
+static inline pte_t pte_mkwrite(pte_t pte)
+{
+        set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW));
+        return pte;
+}
+static inline pte_t pte_mkdirty(pte_t pte)
+{
+        set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY));
+        return pte;
+}
+static inline pte_t pte_mkyoung(pte_t pte)
+{
+        set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED));
+        return pte;
+}
+static inline pte_t pte_mkspecial(pte_t pte)
+{
+        return pte;
+}
+
+#define pmd_none(x)     (!pmd_val(x))
+#define pmd_present(x)  (pmd_val(x))
+
+static inline void pmd_clear(pmd_t *pmdp)
+{
+        set_pmd(pmdp, __pmd(0));
+}
+
+#define pmd_bad(x)      (pmd_val(x) & ~PAGE_MASK)
+
+/*
+ * Permanent address of a page. We don't support highmem, so this is
+ * trivial.
+ */
+#define pages_to_mb(x)  ((x) >> (20-PAGE_SHIFT))
+#define pte_page(x)     (pfn_to_page(pte_pfn(x)))
+
+/*
+ * Mark the prot value as uncacheable and unbufferable
+ */
+#define pgprot_noncached(prot)                                          \
+        __pgprot(pgprot_val(prot) & ~(_PAGE_BUFFER | _PAGE_CACHABLE))
+
+/*
+ * Mark the prot value as uncacheable but bufferable
+ */
+#define pgprot_writecombine(prot)                                       \
+        __pgprot((pgprot_val(prot) & ~_PAGE_CACHABLE) | _PAGE_BUFFER)
+
+/*
+ * Conversion functions: convert a page and protection to a page entry,
+ * and a page entry and page directory to the page they refer to.
+ *
+ * extern pte_t mk_pte(struct page *page, pgprot_t pgprot)
+ */
+#define mk_pte(page, pgprot)    pfn_pte(page_to_pfn(page), (pgprot))
+
+static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
+{
+        set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK)
+                            | pgprot_val(newprot)));
+        return pte;
+}
+
+#define page_pte(page)  page_pte_prot(page, __pgprot(0))
+
+#define pmd_page_vaddr(pmd)     pmd_val(pmd)
+#define pmd_page(pmd)           (virt_to_page(pmd_val(pmd)))
+
+/* to find an entry in a page-table-directory. */
+#define pgd_index(address)      (((address) >> PGDIR_SHIFT)     \
+                                 & (PTRS_PER_PGD - 1))
+#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
+
+/* to find an entry in a kernel page-table-directory */
+#define pgd_offset_k(address)   pgd_offset(&init_mm, address)
+
+/* Find an entry in the third-level page table.. */
+#define pte_index(address)                              \
+        ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
+#define pte_offset(dir, address)                                        \
+        ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
+#define pte_offset_kernel(dir, address)                                 \
+        ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
+#define pte_offset_map(dir, address) pte_offset_kernel(dir, address)
+#define pte_offset_map_nested(dir, address) pte_offset_kernel(dir, address)
+#define pte_unmap(pte)          do { } while (0)
+#define pte_unmap_nested(pte)   do { } while (0)
+
+struct vm_area_struct;
+extern void update_mmu_cache(struct vm_area_struct * vma,
+                             unsigned long address, pte_t pte);
+
+/*
+ * Encode and decode a swap entry
+ *
+ * Constraints:
+ *   _PAGE_FILE at bit 0
+ *   _PAGE_TYPE_* at bits 2-3 (for emulating _PAGE_PROTNONE)
+ *   _PAGE_PRESENT at bit 10
+ *
+ * We encode the type into bits 4-9 and offset into bits 11-31. This
+ * gives us a 21 bits offset, or 2**21 * 4K = 8G usable swap space per
+ * device, and 64 possible types.
+ *
+ * NOTE: We should set ZEROs at the position of _PAGE_PRESENT
+ *       and _PAGE_PROTNONE bits
+ */
+#define __swp_type(x)           (((x).val >> 4) & 0x3f)
+#define __swp_offset(x)         ((x).val >> 11)
+#define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 4) | ((offset) << 11) })
+#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
+#define __swp_entry_to_pte(x)   ((pte_t) { (x).val })
+
+/*
+ * Encode and decode a nonlinear file mapping entry. We have to
+ * preserve _PAGE_FILE and _PAGE_PRESENT here. _PAGE_TYPE_* isn't
+ * necessary, since _PAGE_FILE implies !_PAGE_PROTNONE (?)
+ */
+#define PTE_FILE_MAX_BITS       30
+#define pte_to_pgoff(pte)       (((pte_val(pte) >> 1) & 0x1ff)          \
+                                 | ((pte_val(pte) >> 11) << 9))
+#define pgoff_to_pte(off)       ((pte_t) { ((((off) & 0x1ff) << 1)      \
+                                            | (((off) >> 9) << 11)      \
+                                            | _PAGE_FILE) })
+
+typedef pte_t *pte_addr_t;
+
+#define kern_addr_valid(addr)   (1)
+
+#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
+        remap_pfn_range(vma, vaddr, pfn, size, prot)
+
+/* No page table caches to initialize (?) */
+#define pgtable_cache_init()    do { } while(0)
+
+#include <asm-generic/pgtable.h>
+
+#endif /* !__ASSEMBLY__ */
+
+#endif /* __ASM_AVR32_PGTABLE_H */
diff --git a/arch/avr32/include/asm/poll.h b/arch/avr32/include/asm/poll.h
new file mode 100644
index 000000000000..c98509d3149e
--- /dev/null
+++ b/arch/avr32/include/asm/poll.h
@@ -0,0 +1 @@
+#include <asm-generic/poll.h>
diff --git a/arch/avr32/include/asm/posix_types.h b/arch/avr32/include/asm/posix_types.h
new file mode 100644
index 000000000000..fe0c0c014389
--- /dev/null
+++ b/arch/avr32/include/asm/posix_types.h
@@ -0,0 +1,125 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_POSIX_TYPES_H
+#define __ASM_AVR32_POSIX_TYPES_H
+
+/*
+ * This file is generally used by user-level software, so you need to
+ * be a little careful about namespace pollution etc.  Also, we cannot
+ * assume GCC is being used.
+ */
+
+typedef unsigned long   __kernel_ino_t;
+typedef unsigned short  __kernel_mode_t;
+typedef unsigned short  __kernel_nlink_t;
+typedef long            __kernel_off_t;
+typedef int             __kernel_pid_t;
+typedef unsigned short  __kernel_ipc_pid_t;
+typedef unsigned int    __kernel_uid_t;
+typedef unsigned int    __kernel_gid_t;
+typedef unsigned long   __kernel_size_t;
+typedef long            __kernel_ssize_t;
+typedef int             __kernel_ptrdiff_t;
+typedef long            __kernel_time_t;
+typedef long            __kernel_suseconds_t;
+typedef long            __kernel_clock_t;
+typedef int             __kernel_timer_t;
+typedef int             __kernel_clockid_t;
+typedef int             __kernel_daddr_t;
+typedef char *          __kernel_caddr_t;
+typedef unsigned short  __kernel_uid16_t;
+typedef unsigned short  __kernel_gid16_t;
+typedef unsigned int    __kernel_uid32_t;
+typedef unsigned int    __kernel_gid32_t;
+
+typedef unsigned short  __kernel_old_uid_t;
+typedef unsigned short  __kernel_old_gid_t;
+typedef unsigned short  __kernel_old_dev_t;
+
+#ifdef __GNUC__
+typedef long long       __kernel_loff_t;
+#endif
+
+typedef struct {
+    int     val[2];
+} __kernel_fsid_t;
+
+#if defined(__KERNEL__)
+
+#undef  __FD_SET
+static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)
+{
+    unsigned long __tmp = __fd / __NFDBITS;
+    unsigned long __rem = __fd % __NFDBITS;
+    __fdsetp->fds_bits[__tmp] |= (1UL<<__rem);
+}
+
+#undef  __FD_CLR
+static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp)
+{
+    unsigned long __tmp = __fd / __NFDBITS;
+    unsigned long __rem = __fd % __NFDBITS;
+    __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem);
+}
+
+
+#undef  __FD_ISSET
+static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p)
+{
+    unsigned long __tmp = __fd / __NFDBITS;
+    unsigned long __rem = __fd % __NFDBITS;
+    return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0;
+}
+
+/*
+ * This will unroll the loop for the normal constant case (8 ints,
+ * for a 256-bit fd_set)
+ */
+#undef  __FD_ZERO
+static __inline__ void __FD_ZERO(__kernel_fd_set *__p)
+{
+    unsigned long *__tmp = __p->fds_bits;
+    int __i;
+
+    if (__builtin_constant_p(__FDSET_LONGS)) {
+        switch (__FDSET_LONGS) {
+            case 16:
+                __tmp[ 0] = 0; __tmp[ 1] = 0;
+                __tmp[ 2] = 0; __tmp[ 3] = 0;
+                __tmp[ 4] = 0; __tmp[ 5] = 0;
+                __tmp[ 6] = 0; __tmp[ 7] = 0;
+                __tmp[ 8] = 0; __tmp[ 9] = 0;
+                __tmp[10] = 0; __tmp[11] = 0;
+                __tmp[12] = 0; __tmp[13] = 0;
+                __tmp[14] = 0; __tmp[15] = 0;
+                return;
+
+            case 8:
+                __tmp[ 0] = 0; __tmp[ 1] = 0;
+                __tmp[ 2] = 0; __tmp[ 3] = 0;
+                __tmp[ 4] = 0; __tmp[ 5] = 0;
+                __tmp[ 6] = 0; __tmp[ 7] = 0;
+                return;
+
+            case 4:
+                __tmp[ 0] = 0; __tmp[ 1] = 0;
+                __tmp[ 2] = 0; __tmp[ 3] = 0;
+                return;
+        }
+    }
+    __i = __FDSET_LONGS;
+    while (__i) {
+        __i--;
+        *__tmp = 0;
+        __tmp++;
+    }
+}
+
+#endif /* defined(__KERNEL__) */
+
+#endif /* __ASM_AVR32_POSIX_TYPES_H */
diff --git a/arch/avr32/include/asm/processor.h b/arch/avr32/include/asm/processor.h
new file mode 100644
index 000000000000..49a88f5a9d2f
--- /dev/null
+++ b/arch/avr32/include/asm/processor.h
@@ -0,0 +1,178 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_PROCESSOR_H
+#define __ASM_AVR32_PROCESSOR_H
+
+#include <asm/page.h>
+#include <asm/cache.h>
+
+#define TASK_SIZE       0x80000000
+
+#ifdef __KERNEL__
+#define STACK_TOP       TASK_SIZE
+#define STACK_TOP_MAX   STACK_TOP
+#endif
+
+#ifndef __ASSEMBLY__
+
+static inline void *current_text_addr(void)
+{
+        register void *pc asm("pc");
+        return pc;
+}
+
+enum arch_type {
+        ARCH_AVR32A,
+        ARCH_AVR32B,
+        ARCH_MAX
+};
+
+enum cpu_type {
+        CPU_MORGAN,
+        CPU_AT32AP,
+        CPU_MAX
+};
+
+enum tlb_config {
+        TLB_NONE,
+        TLB_SPLIT,
+        TLB_UNIFIED,
+        TLB_INVALID
+};
+
+#define AVR32_FEATURE_RMW       (1 << 0)
+#define AVR32_FEATURE_DSP       (1 << 1)
+#define AVR32_FEATURE_SIMD      (1 << 2)
+#define AVR32_FEATURE_OCD       (1 << 3)
+#define AVR32_FEATURE_PCTR      (1 << 4)
+#define AVR32_FEATURE_JAVA      (1 << 5)
+#define AVR32_FEATURE_FPU       (1 << 6)
+
+struct avr32_cpuinfo {
+        struct clk *clk;
+        unsigned long loops_per_jiffy;
+        enum arch_type arch_type;
+        enum cpu_type cpu_type;
+        unsigned short arch_revision;
+        unsigned short cpu_revision;
+        enum tlb_config tlb_config;
+        unsigned long features;
+        u32 device_id;
+
+        struct cache_info icache;
+        struct cache_info dcache;
+};
+
+static inline unsigned int avr32_get_manufacturer_id(struct avr32_cpuinfo *cpu)
+{
+        return (cpu->device_id >> 1) & 0x7f;
+}
+static inline unsigned int avr32_get_product_number(struct avr32_cpuinfo *cpu)
+{
+        return (cpu->device_id >> 12) & 0xffff;
+}
+static inline unsigned int avr32_get_chip_revision(struct avr32_cpuinfo *cpu)
+{
+        return (cpu->device_id >> 28) & 0x0f;
+}
+
+extern struct avr32_cpuinfo boot_cpu_data;
+
+#ifdef CONFIG_SMP
+extern struct avr32_cpuinfo cpu_data[];
+#define current_cpu_data cpu_data[smp_processor_id()]
+#else
+#define cpu_data (&boot_cpu_data)
+#define current_cpu_data boot_cpu_data
+#endif
+
+/* This decides where the kernel will search for a free chunk of vm
+ * space during mmap's
+ */
+#define TASK_UNMAPPED_BASE      (PAGE_ALIGN(TASK_SIZE / 3))
+
+#define cpu_relax()             barrier()
+#define cpu_sync_pipeline()     asm volatile("sub pc, -2" : : : "memory")
+
+struct cpu_context {
+        unsigned long sr;
+        unsigned long pc;
+        unsigned long ksp;      /* Kernel stack pointer */
+        unsigned long r7;
+        unsigned long r6;
+        unsigned long r5;
+        unsigned long r4;
+        unsigned long r3;
+        unsigned long r2;
+        unsigned long r1;
+        unsigned long r0;
+};
+
+/* This struct contains the CPU context as stored by switch_to() */
+struct thread_struct {
+        struct cpu_context cpu_context;
+        unsigned long single_step_addr;
+        u16 single_step_insn;
+};
+
+#define INIT_THREAD {                                           \
+        .cpu_context = {                                        \
+                .ksp = sizeof(init_stack) + (long)&init_stack,  \
+        },                                                      \
+}
+
+/*
+ * Do necessary setup to start up a newly executed thread.
+ */
+#define start_thread(regs, new_pc, new_sp)       \
+        do {                                     \
+                set_fs(USER_DS);                 \
+                memset(regs, 0, sizeof(*regs));  \
+                regs->sr = MODE_USER;            \
+                regs->pc = new_pc & ~1;          \
+                regs->sp = new_sp;               \
+        } while(0)
+
+struct task_struct;
+
+/* Free all resources held by a thread */
+extern void release_thread(struct task_struct *);
+
+/* Create a kernel thread without removing it from tasklists */
+extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
+
+/* Prepare to copy thread state - unlazy all lazy status */
+#define prepare_to_copy(tsk) do { } while(0)
+
+/* Return saved PC of a blocked thread */
+#define thread_saved_pc(tsk)    ((tsk)->thread.cpu_context.pc)
+
+struct pt_regs;
+extern unsigned long get_wchan(struct task_struct *p);
+extern void show_regs_log_lvl(struct pt_regs *regs, const char *log_lvl);
+extern void show_stack_log_lvl(struct task_struct *tsk, unsigned long sp,
+                               struct pt_regs *regs, const char *log_lvl);
+
+#define task_pt_regs(p) \
+        ((struct pt_regs *)(THREAD_SIZE + task_stack_page(p)) - 1)
+
+#define KSTK_EIP(tsk)   ((tsk)->thread.cpu_context.pc)
+#define KSTK_ESP(tsk)   ((tsk)->thread.cpu_context.ksp)
+
+#define ARCH_HAS_PREFETCH
+
+static inline void prefetch(const void *x)
+{
+        const char *c = x;
+        asm volatile("pref %0" : : "r"(c));
+}
+#define PREFETCH_STRIDE L1_CACHE_BYTES
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ASM_AVR32_PROCESSOR_H */
diff --git a/arch/avr32/include/asm/ptrace.h b/arch/avr32/include/asm/ptrace.h
new file mode 100644
index 000000000000..9e2d44f4e0fe
--- /dev/null
+++ b/arch/avr32/include/asm/ptrace.h
@@ -0,0 +1,157 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_PTRACE_H
+#define __ASM_AVR32_PTRACE_H
+
+#define PTRACE_GETREGS          12
+#define PTRACE_SETREGS          13
+
+/*
+ * Status Register bits
+ */
+#define SR_H            0x20000000
+#define SR_J            0x10000000
+#define SR_DM           0x08000000
+#define SR_D            0x04000000
+#define MODE_NMI        0x01c00000
+#define MODE_EXCEPTION  0x01800000
+#define MODE_INT3       0x01400000
+#define MODE_INT2       0x01000000
+#define MODE_INT1       0x00c00000
+#define MODE_INT0       0x00800000
+#define MODE_SUPERVISOR 0x00400000
+#define MODE_USER       0x00000000
+#define MODE_MASK       0x01c00000
+#define SR_EM           0x00200000
+#define SR_I3M          0x00100000
+#define SR_I2M          0x00080000
+#define SR_I1M          0x00040000
+#define SR_I0M          0x00020000
+#define SR_GM           0x00010000
+
+#define SR_H_BIT        29
+#define SR_J_BIT        28
+#define SR_DM_BIT       27
+#define SR_D_BIT        26
+#define MODE_SHIFT      22
+#define SR_EM_BIT       21
+#define SR_I3M_BIT      20
+#define SR_I2M_BIT      19
+#define SR_I1M_BIT      18
+#define SR_I0M_BIT      17
+#define SR_GM_BIT       16
+
+/* The user-visible part */
+#define SR_L            0x00000020
+#define SR_Q            0x00000010
+#define SR_V            0x00000008
+#define SR_N            0x00000004
+#define SR_Z            0x00000002
+#define SR_C            0x00000001
+
+#define SR_L_BIT        5
+#define SR_Q_BIT        4
+#define SR_V_BIT        3
+#define SR_N_BIT        2
+#define SR_Z_BIT        1
+#define SR_C_BIT        0
+
+/*
+ * The order is defined by the stmts instruction. r0 is stored first,
+ * so it gets the highest address.
+ *
+ * Registers 0-12 are general-purpose registers (r12 is normally used for
+ * the function return value).
+ * Register 13 is the stack pointer
+ * Register 14 is the link register
+ * Register 15 is the program counter (retrieved from the RAR sysreg)
+ */
+#define FRAME_SIZE_FULL 72
+#define REG_R12_ORIG    68
+#define REG_R0          64
+#define REG_R1          60
+#define REG_R2          56
+#define REG_R3          52
+#define REG_R4          48
+#define REG_R5          44
+#define REG_R6          40
+#define REG_R7          36
+#define REG_R8          32
+#define REG_R9          28
+#define REG_R10         24
+#define REG_R11         20
+#define REG_R12         16
+#define REG_SP          12
+#define REG_LR           8
+
+#define FRAME_SIZE_MIN   8
+#define REG_PC           4
+#define REG_SR           0
+
+#ifndef __ASSEMBLY__
+struct pt_regs {
+        /* These are always saved */
+        unsigned long sr;
+        unsigned long pc;
+
+        /* These are sometimes saved */
+        unsigned long lr;
+        unsigned long sp;
+        unsigned long r12;
+        unsigned long r11;
+        unsigned long r10;
+        unsigned long r9;
+        unsigned long r8;
+        unsigned long r7;
+        unsigned long r6;
+        unsigned long r5;
+        unsigned long r4;
+        unsigned long r3;
+        unsigned long r2;
+        unsigned long r1;
+        unsigned long r0;
+
+        /* Only saved on system call */
+        unsigned long r12_orig;
+};
+
+#ifdef __KERNEL__
+
+#include <asm/ocd.h>
+
+#define arch_ptrace_attach(child)       ocd_enable(child)
+
+#define user_mode(regs)                 (((regs)->sr & MODE_MASK) == MODE_USER)
+#define instruction_pointer(regs)       ((regs)->pc)
+#define profile_pc(regs)                instruction_pointer(regs)
+
+extern void show_regs (struct pt_regs *);
+
+static __inline__ int valid_user_regs(struct pt_regs *regs)
+{
+        /*
+         * Some of the Java bits might be acceptable if/when we
+         * implement some support for that stuff...
+         */
+        if ((regs->sr & 0xffff0000) == 0)
+                return 1;
+
+        /*
+         * Force status register flags to be sane and report this
+         * illegal behaviour...
+         */
+        regs->sr &= 0x0000ffff;
+        return 0;
+}
+
+
+#endif /* __KERNEL__ */
+
+#endif /* ! __ASSEMBLY__ */
+
+#endif /* __ASM_AVR32_PTRACE_H */
diff --git a/arch/avr32/include/asm/resource.h b/arch/avr32/include/asm/resource.h
new file mode 100644
index 000000000000..c6dd101472b1
--- /dev/null
+++ b/arch/avr32/include/asm/resource.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_AVR32_RESOURCE_H
+#define __ASM_AVR32_RESOURCE_H
+
+#include <asm-generic/resource.h>
+
+#endif /* __ASM_AVR32_RESOURCE_H */
diff --git a/arch/avr32/include/asm/scatterlist.h b/arch/avr32/include/asm/scatterlist.h
new file mode 100644
index 000000000000..377320e3bd17
--- /dev/null
+++ b/arch/avr32/include/asm/scatterlist.h
@@ -0,0 +1,26 @@
+#ifndef __ASM_AVR32_SCATTERLIST_H
+#define __ASM_AVR32_SCATTERLIST_H
+
+#include <asm/types.h>
+
+struct scatterlist {
+#ifdef CONFIG_DEBUG_SG
+   unsigned long        sg_magic;
+#endif
+    unsigned long       page_link;
+    unsigned int        offset;
+    dma_addr_t          dma_address;
+    unsigned int        length;
+};
+
+/* These macros should be used after a pci_map_sg call has been done
+ * to get bus addresses of each of the SG entries and their lengths.
+ * You should only work with the number of sg entries pci_map_sg
+ * returns.
+ */
+#define sg_dma_address(sg)      ((sg)->dma_address)
+#define sg_dma_len(sg)          ((sg)->length)
+
+#define ISA_DMA_THRESHOLD (0xffffffff)
+
+#endif /* __ASM_AVR32_SCATTERLIST_H */
diff --git a/arch/avr32/include/asm/sections.h b/arch/avr32/include/asm/sections.h
new file mode 100644
index 000000000000..aa14252e4181
--- /dev/null
+++ b/arch/avr32/include/asm/sections.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_AVR32_SECTIONS_H
+#define __ASM_AVR32_SECTIONS_H
+
+#include <asm-generic/sections.h>
+
+#endif /* __ASM_AVR32_SECTIONS_H */
diff --git a/arch/avr32/include/asm/sembuf.h b/arch/avr32/include/asm/sembuf.h
new file mode 100644
index 000000000000..e472216e0c97
--- /dev/null
+++ b/arch/avr32/include/asm/sembuf.h
@@ -0,0 +1,25 @@
+#ifndef __ASM_AVR32_SEMBUF_H
+#define __ASM_AVR32_SEMBUF_H
+
+/*
+* The semid64_ds structure for AVR32 architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ *
+ * Pad space is left for:
+ * - 64-bit time_t to solve y2038 problem
+ * - 2 miscellaneous 32-bit values
+ */
+
+struct semid64_ds {
+        struct ipc64_perm sem_perm;             /* permissions .. see ipc.h */
+        __kernel_time_t sem_otime;              /* last semop time */
+        unsigned long   __unused1;
+        __kernel_time_t sem_ctime;              /* last change time */
+        unsigned long   __unused2;
+        unsigned long   sem_nsems;              /* no. of semaphores in array */
+        unsigned long   __unused3;
+        unsigned long   __unused4;
+};
+
+#endif /* __ASM_AVR32_SEMBUF_H */
diff --git a/arch/avr32/include/asm/serial.h b/arch/avr32/include/asm/serial.h
new file mode 100644
index 000000000000..5ecaebc22b02
--- /dev/null
+++ b/arch/avr32/include/asm/serial.h
@@ -0,0 +1,13 @@
+#ifndef _ASM_SERIAL_H
+#define _ASM_SERIAL_H
+
+/*
+ * This assumes you have a 1.8432 MHz clock for your UART.
+ *
+ * It'd be nice if someone built a serial card with a 24.576 MHz
+ * clock, since the 16550A is capable of handling a top speed of 1.5
+ * megabits/second; but this requires the faster clock.
+ */
+#define BASE_BAUD (1843200 / 16)
+
+#endif /* _ASM_SERIAL_H */
diff --git a/arch/avr32/include/asm/setup.h b/arch/avr32/include/asm/setup.h
new file mode 100644
index 000000000000..ff5b7cf6be4d
--- /dev/null
+++ b/arch/avr32/include/asm/setup.h
@@ -0,0 +1,138 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * Based on linux/include/asm-arm/setup.h
+ *   Copyright (C) 1997-1999 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_SETUP_H__
+#define __ASM_AVR32_SETUP_H__
+
+#define COMMAND_LINE_SIZE 256
+
+#ifdef __KERNEL__
+
+/* Magic number indicating that a tag table is present */
+#define ATAG_MAGIC      0xa2a25441
+
+#ifndef __ASSEMBLY__
+
+/*
+ * Generic memory range, used by several tags.
+ *
+ *   addr is always physical.
+ *   size is measured in bytes.
+ *   next is for use by the OS, e.g. for grouping regions into
+ *        linked lists.
+ */
+struct tag_mem_range {
+        u32                     addr;
+        u32                     size;
+        struct tag_mem_range *  next;
+};
+
+/* The list ends with an ATAG_NONE node. */
+#define ATAG_NONE       0x00000000
+
+struct tag_header {
+        u32 size;
+        u32 tag;
+};
+
+/* The list must start with an ATAG_CORE node */
+#define ATAG_CORE       0x54410001
+
+struct tag_core {
+        u32 flags;
+        u32 pagesize;
+        u32 rootdev;
+};
+
+/* it is allowed to have multiple ATAG_MEM nodes */
+#define ATAG_MEM        0x54410002
+/* ATAG_MEM uses tag_mem_range */
+
+/* command line: \0 terminated string */
+#define ATAG_CMDLINE    0x54410003
+
+struct tag_cmdline {
+        char    cmdline[1];     /* this is the minimum size */
+};
+
+/* Ramdisk image (may be compressed) */
+#define ATAG_RDIMG      0x54410004
+/* ATAG_RDIMG uses tag_mem_range */
+
+/* Information about various clocks present in the system */
+#define ATAG_CLOCK      0x54410005
+
+struct tag_clock {
+        u32     clock_id;       /* Which clock are we talking about? */
+        u32     clock_flags;    /* Special features */
+        u64     clock_hz;       /* Clock speed in Hz */
+};
+
+/* The clock types we know about */
+#define CLOCK_BOOTCPU   0
+
+/* Memory reserved for the system (e.g. the bootloader) */
+#define ATAG_RSVD_MEM   0x54410006
+/* ATAG_RSVD_MEM uses tag_mem_range */
+
+/* Ethernet information */
+
+#define ATAG_ETHERNET   0x54410007
+
+struct tag_ethernet {
+        u8      mac_index;
+        u8      mii_phy_addr;
+        u8      hw_address[6];
+};
+
+#define ETH_INVALID_PHY 0xff
+
+struct tag {
+        struct tag_header hdr;
+        union {
+                struct tag_core core;
+                struct tag_mem_range mem_range;
+                struct tag_cmdline cmdline;
+                struct tag_clock clock;
+                struct tag_ethernet ethernet;
+        } u;
+};
+
+struct tagtable {
+        u32     tag;
+        int     (*parse)(struct tag *);
+};
+
+#define __tag __used __attribute__((__section__(".taglist.init")))
+#define __tagtable(tag, fn)                                             \
+        static struct tagtable __tagtable_##fn __tag = { tag, fn }
+
+#define tag_member_present(tag,member)                                  \
+        ((unsigned long)(&((struct tag *)0L)->member + 1)               \
+         <= (tag)->hdr.size * 4)
+
+#define tag_next(t)     ((struct tag *)((u32 *)(t) + (t)->hdr.size))
+#define tag_size(type)  ((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
+
+#define for_each_tag(t,base)                                            \
+        for (t = base; t->hdr.size; t = tag_next(t))
+
+extern struct tag *bootloader_tags;
+
+extern resource_size_t fbmem_start;
+extern resource_size_t fbmem_size;
+
+void setup_processor(void);
+
+#endif /* !__ASSEMBLY__ */
+
+#endif  /*  __KERNEL__  */
+
+#endif /* __ASM_AVR32_SETUP_H__ */
diff --git a/arch/avr32/include/asm/shmbuf.h b/arch/avr32/include/asm/shmbuf.h
new file mode 100644
index 000000000000..c62fba41739a
--- /dev/null
+++ b/arch/avr32/include/asm/shmbuf.h
@@ -0,0 +1,42 @@
+#ifndef __ASM_AVR32_SHMBUF_H
+#define __ASM_AVR32_SHMBUF_H
+
+/*
+ * The shmid64_ds structure for i386 architecture.
+ * Note extra padding because this structure is passed back and forth
+ * between kernel and user space.
+ *
+ * Pad space is left for:
+ * - 64-bit time_t to solve y2038 problem
+ * - 2 miscellaneous 32-bit values
+ */
+
+struct shmid64_ds {
+        struct ipc64_perm       shm_perm;       /* operation perms */
+        size_t                  shm_segsz;      /* size of segment (bytes) */
+        __kernel_time_t         shm_atime;      /* last attach time */
+        unsigned long           __unused1;
+        __kernel_time_t         shm_dtime;      /* last detach time */
+        unsigned long           __unused2;
+        __kernel_time_t         shm_ctime;      /* last change time */
+        unsigned long           __unused3;
+        __kernel_pid_t          shm_cpid;       /* pid of creator */
+        __kernel_pid_t          shm_lpid;       /* pid of last operator */
+        unsigned long           shm_nattch;     /* no. of current attaches */
+        unsigned long           __unused4;
+        unsigned long           __unused5;
+};
+
+struct shminfo64 {
+        unsigned long   shmmax;
+        unsigned long   shmmin;
+        unsigned long   shmmni;
+        unsigned long   shmseg;
+        unsigned long   shmall;
+        unsigned long   __unused1;
+        unsigned long   __unused2;
+        unsigned long   __unused3;
+        unsigned long   __unused4;
+};
+
+#endif /* __ASM_AVR32_SHMBUF_H */
diff --git a/arch/avr32/include/asm/shmparam.h b/arch/avr32/include/asm/shmparam.h
new file mode 100644
index 000000000000..3681266c77f7
--- /dev/null
+++ b/arch/avr32/include/asm/shmparam.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_AVR32_SHMPARAM_H
+#define __ASM_AVR32_SHMPARAM_H
+
+#define SHMLBA PAGE_SIZE        /* attach addr a multiple of this */
+
+#endif /* __ASM_AVR32_SHMPARAM_H */
diff --git a/arch/avr32/include/asm/sigcontext.h b/arch/avr32/include/asm/sigcontext.h
new file mode 100644
index 000000000000..e04062b5f39f
--- /dev/null
+++ b/arch/avr32/include/asm/sigcontext.h
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_SIGCONTEXT_H
+#define __ASM_AVR32_SIGCONTEXT_H
+
+struct sigcontext {
+        unsigned long   oldmask;
+
+        /* CPU registers */
+        unsigned long   sr;
+        unsigned long   pc;
+        unsigned long   lr;
+        unsigned long   sp;
+        unsigned long   r12;
+        unsigned long   r11;
+        unsigned long   r10;
+        unsigned long   r9;
+        unsigned long   r8;
+        unsigned long   r7;
+        unsigned long   r6;
+        unsigned long   r5;
+        unsigned long   r4;
+        unsigned long   r3;
+        unsigned long   r2;
+        unsigned long   r1;
+        unsigned long   r0;
+};
+
+#endif /* __ASM_AVR32_SIGCONTEXT_H */
diff --git a/arch/avr32/include/asm/siginfo.h b/arch/avr32/include/asm/siginfo.h
new file mode 100644
index 000000000000..5ee93f40a8a8
--- /dev/null
+++ b/arch/avr32/include/asm/siginfo.h
@@ -0,0 +1,6 @@
+#ifndef _AVR32_SIGINFO_H
+#define _AVR32_SIGINFO_H
+
+#include <asm-generic/siginfo.h>
+
+#endif
diff --git a/arch/avr32/include/asm/signal.h b/arch/avr32/include/asm/signal.h
new file mode 100644
index 000000000000..caffefeeba1f
--- /dev/null
+++ b/arch/avr32/include/asm/signal.h
@@ -0,0 +1,168 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_SIGNAL_H
+#define __ASM_AVR32_SIGNAL_H
+
+#include <linux/types.h>
+
+/* Avoid too many header ordering problems.  */
+struct siginfo;
+
+#ifdef __KERNEL__
+/* Most things should be clean enough to redefine this at will, if care
+   is taken to make libc match.  */
+
+#define _NSIG           64
+#define _NSIG_BPW       32
+#define _NSIG_WORDS     (_NSIG / _NSIG_BPW)
+
+typedef unsigned long old_sigset_t;             /* at least 32 bits */
+
+typedef struct {
+        unsigned long sig[_NSIG_WORDS];
+} sigset_t;
+
+#else
+/* Here we must cater to libcs that poke about in kernel headers.  */
+
+#define NSIG            32
+typedef unsigned long sigset_t;
+
+#endif /* __KERNEL__ */
+
+#define SIGHUP           1
+#define SIGINT           2
+#define SIGQUIT          3
+#define SIGILL           4
+#define SIGTRAP          5
+#define SIGABRT          6
+#define SIGIOT           6
+#define SIGBUS           7
+#define SIGFPE           8
+#define SIGKILL          9
+#define SIGUSR1         10
+#define SIGSEGV         11
+#define SIGUSR2         12
+#define SIGPIPE         13
+#define SIGALRM         14
+#define SIGTERM         15
+#define SIGSTKFLT       16
+#define SIGCHLD         17
+#define SIGCONT         18
+#define SIGSTOP         19
+#define SIGTSTP         20
+#define SIGTTIN         21
+#define SIGTTOU         22
+#define SIGURG          23
+#define SIGXCPU         24
+#define SIGXFSZ         25
+#define SIGVTALRM       26
+#define SIGPROF         27
+#define SIGWINCH        28
+#define SIGIO           29
+#define SIGPOLL         SIGIO
+/*
+#define SIGLOST         29
+*/
+#define SIGPWR          30
+#define SIGSYS          31
+#define SIGUNUSED       31
+
+/* These should not be considered constants from userland.  */
+#define SIGRTMIN        32
+#define SIGRTMAX        (_NSIG-1)
+
+/*
+ * SA_FLAGS values:
+ *
+ * SA_NOCLDSTOP         flag to turn off SIGCHLD when children stop.
+ * SA_NOCLDWAIT         flag on SIGCHLD to inhibit zombies.
+ * SA_SIGINFO           deliver the signal with SIGINFO structs
+ * SA_ONSTACK           indicates that a registered stack_t will be used.
+ * SA_RESTART           flag to get restarting signals (which were the default long ago)
+ * SA_NODEFER           prevents the current signal from being masked in the handler.
+ * SA_RESETHAND         clears the handler when the signal is delivered.
+ *
+ * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
+ * Unix names RESETHAND and NODEFER respectively.
+ */
+#define SA_NOCLDSTOP    0x00000001
+#define SA_NOCLDWAIT    0x00000002
+#define SA_SIGINFO      0x00000004
+#define SA_RESTORER     0x04000000
+#define SA_ONSTACK      0x08000000
+#define SA_RESTART      0x10000000
+#define SA_NODEFER      0x40000000
+#define SA_RESETHAND    0x80000000
+
+#define SA_NOMASK       SA_NODEFER
+#define SA_ONESHOT      SA_RESETHAND
+
+/*
+ * sigaltstack controls
+ */
+#define SS_ONSTACK      1
+#define SS_DISABLE      2
+
+#define MINSIGSTKSZ     2048
+#define SIGSTKSZ        8192
+
+#include <asm-generic/signal.h>
+
+#ifdef __KERNEL__
+struct old_sigaction {
+        __sighandler_t sa_handler;
+        old_sigset_t sa_mask;
+        unsigned long sa_flags;
+        __sigrestore_t sa_restorer;
+};
+
+struct sigaction {
+        __sighandler_t sa_handler;
+        unsigned long sa_flags;
+        __sigrestore_t sa_restorer;
+        sigset_t sa_mask;               /* mask last for extensibility */
+};
+
+struct k_sigaction {
+        struct sigaction sa;
+};
+#else
+/* Here we must cater to libcs that poke about in kernel headers.  */
+
+struct sigaction {
+        union {
+                __sighandler_t _sa_handler;
+                void (*_sa_sigaction)(int, struct siginfo *, void *);
+        } _u;
+        sigset_t sa_mask;
+        unsigned long sa_flags;
+        void (*sa_restorer)(void);
+};
+
+#define sa_handler      _u._sa_handler
+#define sa_sigaction    _u._sa_sigaction
+
+#endif /* __KERNEL__ */
+
+typedef struct sigaltstack {
+        void __user *ss_sp;
+        int ss_flags;
+        size_t ss_size;
+} stack_t;
+
+#ifdef __KERNEL__
+
+#include <asm/sigcontext.h>
+#undef __HAVE_ARCH_SIG_BITOPS
+
+#define ptrace_signal_deliver(regs, cookie) do { } while (0)
+
+#endif /* __KERNEL__ */
+
+#endif
diff --git a/arch/avr32/include/asm/socket.h b/arch/avr32/include/asm/socket.h
new file mode 100644
index 000000000000..35863f260929
--- /dev/null
+++ b/arch/avr32/include/asm/socket.h
@@ -0,0 +1,57 @@
+#ifndef __ASM_AVR32_SOCKET_H
+#define __ASM_AVR32_SOCKET_H
+
+#include <asm/sockios.h>
+
+/* For setsockopt(2) */
+#define SOL_SOCKET      1
+
+#define SO_DEBUG        1
+#define SO_REUSEADDR    2
+#define SO_TYPE         3
+#define SO_ERROR        4
+#define SO_DONTROUTE    5
+#define SO_BROADCAST    6
+#define SO_SNDBUF       7
+#define SO_RCVBUF       8
+#define SO_SNDBUFFORCE  32
+#define SO_RCVBUFFORCE  33
+#define SO_KEEPALIVE    9
+#define SO_OOBINLINE    10
+#define SO_NO_CHECK     11
+#define SO_PRIORITY     12
+#define SO_LINGER       13
+#define SO_BSDCOMPAT    14
+/* To add :#define SO_REUSEPORT 15 */
+#define SO_PASSCRED     16
+#define SO_PEERCRED     17
+#define SO_RCVLOWAT     18
+#define SO_SNDLOWAT     19
+#define SO_RCVTIMEO     20
+#define SO_SNDTIMEO     21
+
+/* Security levels - as per NRL IPv6 - don't actually do anything */
+#define SO_SECURITY_AUTHENTICATION              22
+#define SO_SECURITY_ENCRYPTION_TRANSPORT        23
+#define SO_SECURITY_ENCRYPTION_NETWORK          24
+
+#define SO_BINDTODEVICE 25
+
+/* Socket filtering */
+#define SO_ATTACH_FILTER        26
+#define SO_DETACH_FILTER        27
+
+#define SO_PEERNAME             28
+#define SO_TIMESTAMP            29
+#define SCM_TIMESTAMP           SO_TIMESTAMP
+
+#define SO_ACCEPTCONN           30
+
+#define SO_PEERSEC              31
+#define SO_PASSSEC              34
+#define SO_TIMESTAMPNS          35
+#define SCM_TIMESTAMPNS         SO_TIMESTAMPNS
+
+#define SO_MARK                 36
+
+#endif /* __ASM_AVR32_SOCKET_H */
diff --git a/arch/avr32/include/asm/sockios.h b/arch/avr32/include/asm/sockios.h
new file mode 100644
index 000000000000..0802d742f97d
--- /dev/null
+++ b/arch/avr32/include/asm/sockios.h
@@ -0,0 +1,13 @@
+#ifndef __ASM_AVR32_SOCKIOS_H
+#define __ASM_AVR32_SOCKIOS_H
+
+/* Socket-level I/O control calls. */
+#define FIOSETOWN       0x8901
+#define SIOCSPGRP       0x8902
+#define FIOGETOWN       0x8903
+#define SIOCGPGRP       0x8904
+#define SIOCATMARK      0x8905
+#define SIOCGSTAMP      0x8906          /* Get stamp (timeval) */
+#define SIOCGSTAMPNS    0x8907          /* Get stamp (timespec) */
+
+#endif /* __ASM_AVR32_SOCKIOS_H */
diff --git a/arch/avr32/include/asm/stat.h b/arch/avr32/include/asm/stat.h
new file mode 100644
index 000000000000..e72881e10230
--- /dev/null
+++ b/arch/avr32/include/asm/stat.h
@@ -0,0 +1,79 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_STAT_H
+#define __ASM_AVR32_STAT_H
+
+struct __old_kernel_stat {
+        unsigned short st_dev;
+        unsigned short st_ino;
+        unsigned short st_mode;
+        unsigned short st_nlink;
+        unsigned short st_uid;
+        unsigned short st_gid;
+        unsigned short st_rdev;
+        unsigned long  st_size;
+        unsigned long  st_atime;
+        unsigned long  st_mtime;
+        unsigned long  st_ctime;
+};
+
+struct stat {
+        unsigned long st_dev;
+        unsigned long st_ino;
+        unsigned short st_mode;
+        unsigned short st_nlink;
+        unsigned short st_uid;
+        unsigned short st_gid;
+        unsigned long  st_rdev;
+        unsigned long  st_size;
+        unsigned long  st_blksize;
+        unsigned long  st_blocks;
+        unsigned long  st_atime;
+        unsigned long  st_atime_nsec;
+        unsigned long  st_mtime;
+        unsigned long  st_mtime_nsec;
+        unsigned long  st_ctime;
+        unsigned long  st_ctime_nsec;
+        unsigned long  __unused4;
+        unsigned long  __unused5;
+};
+
+#define STAT_HAVE_NSEC 1
+
+struct stat64 {
+        unsigned long long st_dev;
+
+        unsigned long long st_ino;
+        unsigned int    st_mode;
+        unsigned int    st_nlink;
+
+        unsigned long   st_uid;
+        unsigned long   st_gid;
+
+        unsigned long long st_rdev;
+
+        long long       st_size;
+        unsigned long   __pad1;         /* align 64-bit st_blocks */
+        unsigned long   st_blksize;
+
+        unsigned long long st_blocks;   /* Number 512-byte blocks allocated. */
+
+        unsigned long   st_atime;
+        unsigned long   st_atime_nsec;
+
+        unsigned long   st_mtime;
+        unsigned long   st_mtime_nsec;
+
+        unsigned long   st_ctime;
+        unsigned long   st_ctime_nsec;
+
+        unsigned long   __unused1;
+        unsigned long   __unused2;
+};
+
+#endif /* __ASM_AVR32_STAT_H */
diff --git a/arch/avr32/include/asm/statfs.h b/arch/avr32/include/asm/statfs.h
new file mode 100644
index 000000000000..2961bd18c50e
--- /dev/null
+++ b/arch/avr32/include/asm/statfs.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_AVR32_STATFS_H
+#define __ASM_AVR32_STATFS_H
+
+#include <asm-generic/statfs.h>
+
+#endif /* __ASM_AVR32_STATFS_H */
diff --git a/arch/avr32/include/asm/string.h b/arch/avr32/include/asm/string.h
new file mode 100644
index 000000000000..c91a623cd585
--- /dev/null
+++ b/arch/avr32/include/asm/string.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_STRING_H
+#define __ASM_AVR32_STRING_H
+
+#define __HAVE_ARCH_MEMSET
+extern void *memset(void *b, int c, size_t len);
+
+#define __HAVE_ARCH_MEMCPY
+extern void *memcpy(void *to, const void *from, size_t len);
+
+#endif /* __ASM_AVR32_STRING_H */
diff --git a/arch/avr32/include/asm/sysreg.h b/arch/avr32/include/asm/sysreg.h
new file mode 100644
index 000000000000..d4e0950170ca
--- /dev/null
+++ b/arch/avr32/include/asm/sysreg.h
@@ -0,0 +1,291 @@
+/*
+ * AVR32 System Registers
+ *
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_SYSREG_H
+#define __ASM_AVR32_SYSREG_H
+
+/* sysreg register offsets */
+#define SYSREG_SR                               0x0000
+#define SYSREG_EVBA                             0x0004
+#define SYSREG_ACBA                             0x0008
+#define SYSREG_CPUCR                            0x000c
+#define SYSREG_ECR                              0x0010
+#define SYSREG_RSR_SUP                          0x0014
+#define SYSREG_RSR_INT0                         0x0018
+#define SYSREG_RSR_INT1                         0x001c
+#define SYSREG_RSR_INT2                         0x0020
+#define SYSREG_RSR_INT3                         0x0024
+#define SYSREG_RSR_EX                           0x0028
+#define SYSREG_RSR_NMI                          0x002c
+#define SYSREG_RSR_DBG                          0x0030
+#define SYSREG_RAR_SUP                          0x0034
+#define SYSREG_RAR_INT0                         0x0038
+#define SYSREG_RAR_INT1                         0x003c
+#define SYSREG_RAR_INT2                         0x0040
+#define SYSREG_RAR_INT3                         0x0044
+#define SYSREG_RAR_EX                           0x0048
+#define SYSREG_RAR_NMI                          0x004c
+#define SYSREG_RAR_DBG                          0x0050
+#define SYSREG_JECR                             0x0054
+#define SYSREG_JOSP                             0x0058
+#define SYSREG_JAVA_LV0                         0x005c
+#define SYSREG_JAVA_LV1                         0x0060
+#define SYSREG_JAVA_LV2                         0x0064
+#define SYSREG_JAVA_LV3                         0x0068
+#define SYSREG_JAVA_LV4                         0x006c
+#define SYSREG_JAVA_LV5                         0x0070
+#define SYSREG_JAVA_LV6                         0x0074
+#define SYSREG_JAVA_LV7                         0x0078
+#define SYSREG_JTBA                             0x007c
+#define SYSREG_JBCR                             0x0080
+#define SYSREG_CONFIG0                          0x0100
+#define SYSREG_CONFIG1                          0x0104
+#define SYSREG_COUNT                            0x0108
+#define SYSREG_COMPARE                          0x010c
+#define SYSREG_TLBEHI                           0x0110
+#define SYSREG_TLBELO                           0x0114
+#define SYSREG_PTBR                             0x0118
+#define SYSREG_TLBEAR                           0x011c
+#define SYSREG_MMUCR                            0x0120
+#define SYSREG_TLBARLO                          0x0124
+#define SYSREG_TLBARHI                          0x0128
+#define SYSREG_PCCNT                            0x012c
+#define SYSREG_PCNT0                            0x0130
+#define SYSREG_PCNT1                            0x0134
+#define SYSREG_PCCR                             0x0138
+#define SYSREG_BEAR                             0x013c
+#define SYSREG_SABAL                            0x0300
+#define SYSREG_SABAH                            0x0304
+#define SYSREG_SABD                             0x0308
+
+/* Bitfields in SR */
+#define SYSREG_SR_C_OFFSET                      0
+#define SYSREG_SR_C_SIZE                        1
+#define SYSREG_Z_OFFSET                         1
+#define SYSREG_Z_SIZE                           1
+#define SYSREG_SR_N_OFFSET                      2
+#define SYSREG_SR_N_SIZE                        1
+#define SYSREG_SR_V_OFFSET                      3
+#define SYSREG_SR_V_SIZE                        1
+#define SYSREG_Q_OFFSET                         4
+#define SYSREG_Q_SIZE                           1
+#define SYSREG_L_OFFSET                         5
+#define SYSREG_L_SIZE                           1
+#define SYSREG_T_OFFSET                         14
+#define SYSREG_T_SIZE                           1
+#define SYSREG_SR_R_OFFSET                      15
+#define SYSREG_SR_R_SIZE                        1
+#define SYSREG_GM_OFFSET                        16
+#define SYSREG_GM_SIZE                          1
+#define SYSREG_I0M_OFFSET                       17
+#define SYSREG_I0M_SIZE                         1
+#define SYSREG_I1M_OFFSET                       18
+#define SYSREG_I1M_SIZE                         1
+#define SYSREG_I2M_OFFSET                       19
+#define SYSREG_I2M_SIZE                         1
+#define SYSREG_I3M_OFFSET                       20
+#define SYSREG_I3M_SIZE                         1
+#define SYSREG_EM_OFFSET                        21
+#define SYSREG_EM_SIZE                          1
+#define SYSREG_MODE_OFFSET                      22
+#define SYSREG_MODE_SIZE                        3
+#define SYSREG_M0_OFFSET                        22
+#define SYSREG_M0_SIZE                          1
+#define SYSREG_M1_OFFSET                        23
+#define SYSREG_M1_SIZE                          1
+#define SYSREG_M2_OFFSET                        24
+#define SYSREG_M2_SIZE                          1
+#define SYSREG_SR_D_OFFSET                      26
+#define SYSREG_SR_D_SIZE                        1
+#define SYSREG_DM_OFFSET                        27
+#define SYSREG_DM_SIZE                          1
+#define SYSREG_SR_J_OFFSET                      28
+#define SYSREG_SR_J_SIZE                        1
+#define SYSREG_H_OFFSET                         29
+#define SYSREG_H_SIZE                           1
+
+/* Bitfields in CPUCR */
+#define SYSREG_BI_OFFSET                        0
+#define SYSREG_BI_SIZE                          1
+#define SYSREG_BE_OFFSET                        1
+#define SYSREG_BE_SIZE                          1
+#define SYSREG_FE_OFFSET                        2
+#define SYSREG_FE_SIZE                          1
+#define SYSREG_RE_OFFSET                        3
+#define SYSREG_RE_SIZE                          1
+#define SYSREG_IBE_OFFSET                       4
+#define SYSREG_IBE_SIZE                         1
+#define SYSREG_IEE_OFFSET                       5
+#define SYSREG_IEE_SIZE                         1
+
+/* Bitfields in CONFIG0 */
+#define SYSREG_CONFIG0_R_OFFSET                 0
+#define SYSREG_CONFIG0_R_SIZE                   1
+#define SYSREG_CONFIG0_D_OFFSET                 1
+#define SYSREG_CONFIG0_D_SIZE                   1
+#define SYSREG_CONFIG0_S_OFFSET                 2
+#define SYSREG_CONFIG0_S_SIZE                   1
+#define SYSREG_CONFIG0_O_OFFSET                 3
+#define SYSREG_CONFIG0_O_SIZE                   1
+#define SYSREG_CONFIG0_P_OFFSET                 4
+#define SYSREG_CONFIG0_P_SIZE                   1
+#define SYSREG_CONFIG0_J_OFFSET                 5
+#define SYSREG_CONFIG0_J_SIZE                   1
+#define SYSREG_CONFIG0_F_OFFSET                 6
+#define SYSREG_CONFIG0_F_SIZE                   1
+#define SYSREG_MMUT_OFFSET                      7
+#define SYSREG_MMUT_SIZE                        3
+#define SYSREG_AR_OFFSET                        10
+#define SYSREG_AR_SIZE                          3
+#define SYSREG_AT_OFFSET                        13
+#define SYSREG_AT_SIZE                          3
+#define SYSREG_PROCESSORREVISION_OFFSET         16
+#define SYSREG_PROCESSORREVISION_SIZE           8
+#define SYSREG_PROCESSORID_OFFSET               24
+#define SYSREG_PROCESSORID_SIZE                 8
+
+/* Bitfields in CONFIG1 */
+#define SYSREG_DASS_OFFSET                      0
+#define SYSREG_DASS_SIZE                        3
+#define SYSREG_DLSZ_OFFSET                      3
+#define SYSREG_DLSZ_SIZE                        3
+#define SYSREG_DSET_OFFSET                      6
+#define SYSREG_DSET_SIZE                        4
+#define SYSREG_IASS_OFFSET                      10
+#define SYSREG_IASS_SIZE                        3
+#define SYSREG_ILSZ_OFFSET                      13
+#define SYSREG_ILSZ_SIZE                        3
+#define SYSREG_ISET_OFFSET                      16
+#define SYSREG_ISET_SIZE                        4
+#define SYSREG_DMMUSZ_OFFSET                    20
+#define SYSREG_DMMUSZ_SIZE                      6
+#define SYSREG_IMMUSZ_OFFSET                    26
+#define SYSREG_IMMUSZ_SIZE                      6
+
+/* Bitfields in TLBEHI */
+#define SYSREG_ASID_OFFSET                      0
+#define SYSREG_ASID_SIZE                        8
+#define SYSREG_TLBEHI_I_OFFSET                  8
+#define SYSREG_TLBEHI_I_SIZE                    1
+#define SYSREG_TLBEHI_V_OFFSET                  9
+#define SYSREG_TLBEHI_V_SIZE                    1
+#define SYSREG_VPN_OFFSET                       10
+#define SYSREG_VPN_SIZE                         22
+
+/* Bitfields in TLBELO */
+#define SYSREG_W_OFFSET                         0
+#define SYSREG_W_SIZE                           1
+#define SYSREG_TLBELO_D_OFFSET                  1
+#define SYSREG_TLBELO_D_SIZE                    1
+#define SYSREG_SZ_OFFSET                        2
+#define SYSREG_SZ_SIZE                          2
+#define SYSREG_AP_OFFSET                        4
+#define SYSREG_AP_SIZE                          3
+#define SYSREG_B_OFFSET                         7
+#define SYSREG_B_SIZE                           1
+#define SYSREG_G_OFFSET                         8
+#define SYSREG_G_SIZE                           1
+#define SYSREG_TLBELO_C_OFFSET                  9
+#define SYSREG_TLBELO_C_SIZE                    1
+#define SYSREG_PFN_OFFSET                       10
+#define SYSREG_PFN_SIZE                         22
+
+/* Bitfields in MMUCR */
+#define SYSREG_E_OFFSET                         0
+#define SYSREG_E_SIZE                           1
+#define SYSREG_M_OFFSET                         1
+#define SYSREG_M_SIZE                           1
+#define SYSREG_MMUCR_I_OFFSET                   2
+#define SYSREG_MMUCR_I_SIZE                     1
+#define SYSREG_MMUCR_N_OFFSET                   3
+#define SYSREG_MMUCR_N_SIZE                     1
+#define SYSREG_MMUCR_S_OFFSET                   4
+#define SYSREG_MMUCR_S_SIZE                     1
+#define SYSREG_DLA_OFFSET                       8
+#define SYSREG_DLA_SIZE                         6
+#define SYSREG_DRP_OFFSET                       14
+#define SYSREG_DRP_SIZE                         6
+#define SYSREG_ILA_OFFSET                       20
+#define SYSREG_ILA_SIZE                         6
+#define SYSREG_IRP_OFFSET                       26
+#define SYSREG_IRP_SIZE                         6
+
+/* Bitfields in PCCR */
+#define SYSREG_PCCR_E_OFFSET                    0
+#define SYSREG_PCCR_E_SIZE                      1
+#define SYSREG_PCCR_R_OFFSET                    1
+#define SYSREG_PCCR_R_SIZE                      1
+#define SYSREG_PCCR_C_OFFSET                    2
+#define SYSREG_PCCR_C_SIZE                      1
+#define SYSREG_PCCR_S_OFFSET                    3
+#define SYSREG_PCCR_S_SIZE                      1
+#define SYSREG_IEC_OFFSET                       4
+#define SYSREG_IEC_SIZE                         1
+#define SYSREG_IE0_OFFSET                       5
+#define SYSREG_IE0_SIZE                         1
+#define SYSREG_IE1_OFFSET                       6
+#define SYSREG_IE1_SIZE                         1
+#define SYSREG_FC_OFFSET                        8
+#define SYSREG_FC_SIZE                          1
+#define SYSREG_F0_OFFSET                        9
+#define SYSREG_F0_SIZE                          1
+#define SYSREG_F1_OFFSET                        10
+#define SYSREG_F1_SIZE                          1
+#define SYSREG_CONF0_OFFSET                     12
+#define SYSREG_CONF0_SIZE                       6
+#define SYSREG_CONF1_OFFSET                     18
+#define SYSREG_CONF1_SIZE                       6
+
+/* Constants for ECR */
+#define ECR_UNRECOVERABLE                       0
+#define ECR_TLB_MULTIPLE                        1
+#define ECR_BUS_ERROR_WRITE                     2
+#define ECR_BUS_ERROR_READ                      3
+#define ECR_NMI                                 4
+#define ECR_ADDR_ALIGN_X                        5
+#define ECR_PROTECTION_X                        6
+#define ECR_DEBUG                               7
+#define ECR_ILLEGAL_OPCODE                      8
+#define ECR_UNIMPL_INSTRUCTION                  9
+#define ECR_PRIVILEGE_VIOLATION                 10
+#define ECR_FPE                                 11
+#define ECR_COPROC_ABSENT                       12
+#define ECR_ADDR_ALIGN_R                        13
+#define ECR_ADDR_ALIGN_W                        14
+#define ECR_PROTECTION_R                        15
+#define ECR_PROTECTION_W                        16
+#define ECR_DTLB_MODIFIED                       17
+#define ECR_TLB_MISS_X                          20
+#define ECR_TLB_MISS_R                          24
+#define ECR_TLB_MISS_W                          28
+
+/* Bit manipulation macros */
+#define SYSREG_BIT(name)                                \
+        (1 << SYSREG_##name##_OFFSET)
+#define SYSREG_BF(name,value)                           \
+        (((value) & ((1 << SYSREG_##name##_SIZE) - 1))  \
+         << SYSREG_##name##_OFFSET)
+#define SYSREG_BFEXT(name,value)\
+        (((value) >> SYSREG_##name##_OFFSET)            \
+         & ((1 << SYSREG_##name##_SIZE) - 1))
+#define SYSREG_BFINS(name,value,old)                    \
+        (((old) & ~(((1 << SYSREG_##name##_SIZE) - 1)   \
+                    << SYSREG_##name##_OFFSET))         \
+         | SYSREG_BF(name,value))
+
+/* Register access macros */
+#ifdef __CHECKER__
+extern unsigned long __builtin_mfsr(unsigned long reg);
+extern void __builtin_mtsr(unsigned long reg, unsigned long value);
+#endif
+
+#define sysreg_read(reg)                __builtin_mfsr(SYSREG_##reg)
+#define sysreg_write(reg, value)        __builtin_mtsr(SYSREG_##reg, value)
+
+#endif /* __ASM_AVR32_SYSREG_H */
diff --git a/arch/avr32/include/asm/system.h b/arch/avr32/include/asm/system.h
new file mode 100644
index 000000000000..9702c2213e1e
--- /dev/null
+++ b/arch/avr32/include/asm/system.h
@@ -0,0 +1,178 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_SYSTEM_H
+#define __ASM_AVR32_SYSTEM_H
+
+#include <linux/compiler.h>
+#include <linux/linkage.h>
+#include <linux/types.h>
+
+#include <asm/ptrace.h>
+#include <asm/sysreg.h>
+
+#define xchg(ptr,x) \
+        ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
+
+#define nop() asm volatile("nop")
+
+#define mb()                    asm volatile("" : : : "memory")
+#define rmb()                   mb()
+#define wmb()                   asm volatile("sync 0" : : : "memory")
+#define read_barrier_depends()  do { } while(0)
+#define set_mb(var, value)      do { var = value; mb(); } while(0)
+
+/*
+ * Help PathFinder and other Nexus-compliant debuggers keep track of
+ * the current PID by emitting an Ownership Trace Message each time we
+ * switch task.
+ */
+#ifdef CONFIG_OWNERSHIP_TRACE
+#include <asm/ocd.h>
+#define finish_arch_switch(prev)                        \
+        do {                                            \
+                ocd_write(PID, prev->pid);              \
+                ocd_write(PID, current->pid);           \
+        } while(0)
+#endif
+
+/*
+ * switch_to(prev, next, last) should switch from task `prev' to task
+ * `next'. `prev' will never be the same as `next'.
+ *
+ * We just delegate everything to the __switch_to assembly function,
+ * which is implemented in arch/avr32/kernel/switch_to.S
+ *
+ * mb() tells GCC not to cache `current' across this call.
+ */
+struct cpu_context;
+struct task_struct;
+extern struct task_struct *__switch_to(struct task_struct *,
+                                       struct cpu_context *,
+                                       struct cpu_context *);
+#define switch_to(prev, next, last)                                     \
+        do {                                                            \
+                last = __switch_to(prev, &prev->thread.cpu_context + 1, \
+                                   &next->thread.cpu_context);          \
+        } while (0)
+
+#ifdef CONFIG_SMP
+# error "The AVR32 port does not support SMP"
+#else
+# define smp_mb()               barrier()
+# define smp_rmb()              barrier()
+# define smp_wmb()              barrier()
+# define smp_read_barrier_depends() do { } while(0)
+#endif
+
+#include <linux/irqflags.h>
+
+extern void __xchg_called_with_bad_pointer(void);
+
+static inline unsigned long xchg_u32(u32 val, volatile u32 *m)
+{
+        u32 ret;
+
+        asm volatile("xchg %[ret], %[m], %[val]"
+                        : [ret] "=&r"(ret), "=m"(*m)
+                        : "m"(*m), [m] "r"(m), [val] "r"(val)
+                        : "memory");
+        return ret;
+}
+
+static inline unsigned long __xchg(unsigned long x,
+                                       volatile void *ptr,
+                                       int size)
+{
+        switch(size) {
+        case 4:
+                return xchg_u32(x, ptr);
+        default:
+                __xchg_called_with_bad_pointer();
+                return x;
+        }
+}
+
+static inline unsigned long __cmpxchg_u32(volatile int *m, unsigned long old,
+                                          unsigned long new)
+{
+        __u32 ret;
+
+        asm volatile(
+                "1:     ssrf    5\n"
+                "       ld.w    %[ret], %[m]\n"
+                "       cp.w    %[ret], %[old]\n"
+                "       brne    2f\n"
+                "       stcond  %[m], %[new]\n"
+                "       brne    1b\n"
+                "2:\n"
+                : [ret] "=&r"(ret), [m] "=m"(*m)
+                : "m"(m), [old] "ir"(old), [new] "r"(new)
+                : "memory", "cc");
+        return ret;
+}
+
+extern unsigned long __cmpxchg_u64_unsupported_on_32bit_kernels(
+        volatile int * m, unsigned long old, unsigned long new);
+#define __cmpxchg_u64 __cmpxchg_u64_unsupported_on_32bit_kernels
+
+/* This function doesn't exist, so you'll get a linker error
+   if something tries to do an invalid cmpxchg().  */
+extern void __cmpxchg_called_with_bad_pointer(void);
+
+#define __HAVE_ARCH_CMPXCHG 1
+
+static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
+                                      unsigned long new, int size)
+{
+        switch (size) {
+        case 4:
+                return __cmpxchg_u32(ptr, old, new);
+        case 8:
+                return __cmpxchg_u64(ptr, old, new);
+        }
+
+        __cmpxchg_called_with_bad_pointer();
+        return old;
+}
+
+#define cmpxchg(ptr, old, new)                                  \
+        ((typeof(*(ptr)))__cmpxchg((ptr), (unsigned long)(old), \
+                                   (unsigned long)(new),        \
+                                   sizeof(*(ptr))))
+
+#include <asm-generic/cmpxchg-local.h>
+
+static inline unsigned long __cmpxchg_local(volatile void *ptr,
+                                      unsigned long old,
+                                      unsigned long new, int size)
+{
+        switch (size) {
+        case 4:
+                return __cmpxchg_u32(ptr, old, new);
+        default:
+                return __cmpxchg_local_generic(ptr, old, new, size);
+        }
+
+        return old;
+}
+
+#define cmpxchg_local(ptr, old, new)                                    \
+        ((typeof(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(old),   \
+                                   (unsigned long)(new),                \
+                                   sizeof(*(ptr))))
+
+#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
+
+struct pt_regs;
+void NORET_TYPE die(const char *str, struct pt_regs *regs, long err);
+void _exception(long signr, struct pt_regs *regs, int code,
+                unsigned long addr);
+
+#define arch_align_stack(x)     (x)
+
+#endif /* __ASM_AVR32_SYSTEM_H */
diff --git a/arch/avr32/include/asm/termbits.h b/arch/avr32/include/asm/termbits.h
new file mode 100644
index 000000000000..db2daab31fdb
--- /dev/null
+++ b/arch/avr32/include/asm/termbits.h
@@ -0,0 +1,195 @@
+#ifndef __ASM_AVR32_TERMBITS_H
+#define __ASM_AVR32_TERMBITS_H
+
+#include <linux/posix_types.h>
+
+typedef unsigned char   cc_t;
+typedef unsigned int    speed_t;
+typedef unsigned int    tcflag_t;
+
+#define NCCS 19
+struct termios {
+        tcflag_t c_iflag;               /* input mode flags */
+        tcflag_t c_oflag;               /* output mode flags */
+        tcflag_t c_cflag;               /* control mode flags */
+        tcflag_t c_lflag;               /* local mode flags */
+        cc_t c_line;                    /* line discipline */
+        cc_t c_cc[NCCS];                /* control characters */
+};
+
+struct termios2 {
+        tcflag_t c_iflag;               /* input mode flags */
+        tcflag_t c_oflag;               /* output mode flags */
+        tcflag_t c_cflag;               /* control mode flags */
+        tcflag_t c_lflag;               /* local mode flags */
+        cc_t c_line;                    /* line discipline */
+        cc_t c_cc[NCCS];                /* control characters */
+        speed_t c_ispeed;               /* input speed */
+        speed_t c_ospeed;               /* output speed */
+};
+
+struct ktermios {
+        tcflag_t c_iflag;               /* input mode flags */
+        tcflag_t c_oflag;               /* output mode flags */
+        tcflag_t c_cflag;               /* control mode flags */
+        tcflag_t c_lflag;               /* local mode flags */
+        cc_t c_line;                    /* line discipline */
+        cc_t c_cc[NCCS];                /* control characters */
+        speed_t c_ispeed;               /* input speed */
+        speed_t c_ospeed;               /* output speed */
+};
+
+/* c_cc characters */
+#define VINTR 0
+#define VQUIT 1
+#define VERASE 2
+#define VKILL 3
+#define VEOF 4
+#define VTIME 5
+#define VMIN 6
+#define VSWTC 7
+#define VSTART 8
+#define VSTOP 9
+#define VSUSP 10
+#define VEOL 11
+#define VREPRINT 12
+#define VDISCARD 13
+#define VWERASE 14
+#define VLNEXT 15
+#define VEOL2 16
+
+/* c_iflag bits */
+#define IGNBRK  0000001
+#define BRKINT  0000002
+#define IGNPAR  0000004
+#define PARMRK  0000010
+#define INPCK   0000020
+#define ISTRIP  0000040
+#define INLCR   0000100
+#define IGNCR   0000200
+#define ICRNL   0000400
+#define IUCLC   0001000
+#define IXON    0002000
+#define IXANY   0004000
+#define IXOFF   0010000
+#define IMAXBEL 0020000
+#define IUTF8   0040000
+
+/* c_oflag bits */
+#define OPOST   0000001
+#define OLCUC   0000002
+#define ONLCR   0000004
+#define OCRNL   0000010
+#define ONOCR   0000020
+#define ONLRET  0000040
+#define OFILL   0000100
+#define OFDEL   0000200
+#define NLDLY   0000400
+#define   NL0   0000000
+#define   NL1   0000400
+#define CRDLY   0003000
+#define   CR0   0000000
+#define   CR1   0001000
+#define   CR2   0002000
+#define   CR3   0003000
+#define TABDLY  0014000
+#define   TAB0  0000000
+#define   TAB1  0004000
+#define   TAB2  0010000
+#define   TAB3  0014000
+#define   XTABS 0014000
+#define BSDLY   0020000
+#define   BS0   0000000
+#define   BS1   0020000
+#define VTDLY   0040000
+#define   VT0   0000000
+#define   VT1   0040000
+#define FFDLY   0100000
+#define   FF0   0000000
+#define   FF1   0100000
+
+/* c_cflag bit meaning */
+#define CBAUD   0010017
+#define  B0     0000000         /* hang up */
+#define  B50    0000001
+#define  B75    0000002
+#define  B110   0000003
+#define  B134   0000004
+#define  B150   0000005
+#define  B200   0000006
+#define  B300   0000007
+#define  B600   0000010
+#define  B1200  0000011
+#define  B1800  0000012
+#define  B2400  0000013
+#define  B4800  0000014
+#define  B9600  0000015
+#define  B19200 0000016
+#define  B38400 0000017
+#define EXTA B19200
+#define EXTB B38400
+#define CSIZE   0000060
+#define   CS5   0000000
+#define   CS6   0000020
+#define   CS7   0000040
+#define   CS8   0000060
+#define CSTOPB  0000100
+#define CREAD   0000200
+#define PARENB  0000400
+#define PARODD  0001000
+#define HUPCL   0002000
+#define CLOCAL  0004000
+#define CBAUDEX 0010000
+#define    B57600 0010001
+#define   B115200 0010002
+#define   B230400 0010003
+#define   B460800 0010004
+#define   B500000 0010005
+#define   B576000 0010006
+#define   B921600 0010007
+#define  B1000000 0010010
+#define  B1152000 0010011
+#define  B1500000 0010012
+#define  B2000000 0010013
+#define  B2500000 0010014
+#define  B3000000 0010015
+#define  B3500000 0010016
+#define  B4000000 0010017
+#define CIBAUD    002003600000  /* input baud rate (not used) */
+#define CMSPAR    010000000000          /* mark or space (stick) parity */
+#define CRTSCTS   020000000000          /* flow control */
+
+/* c_lflag bits */
+#define ISIG    0000001
+#define ICANON  0000002
+#define XCASE   0000004
+#define ECHO    0000010
+#define ECHOE   0000020
+#define ECHOK   0000040
+#define ECHONL  0000100
+#define NOFLSH  0000200
+#define TOSTOP  0000400
+#define ECHOCTL 0001000
+#define ECHOPRT 0002000
+#define ECHOKE  0004000
+#define FLUSHO  0010000
+#define PENDIN  0040000
+#define IEXTEN  0100000
+
+/* tcflow() and TCXONC use these */
+#define TCOOFF          0
+#define TCOON           1
+#define TCIOFF          2
+#define TCION           3
+
+/* tcflush() and TCFLSH use these */
+#define TCIFLUSH        0
+#define TCOFLUSH        1
+#define TCIOFLUSH       2
+
+/* tcsetattr uses these */
+#define TCSANOW         0
+#define TCSADRAIN       1
+#define TCSAFLUSH       2
+
+#endif /* __ASM_AVR32_TERMBITS_H */
diff --git a/arch/avr32/include/asm/termios.h b/arch/avr32/include/asm/termios.h
new file mode 100644
index 000000000000..0152aba35154
--- /dev/null
+++ b/arch/avr32/include/asm/termios.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_TERMIOS_H
+#define __ASM_AVR32_TERMIOS_H
+
+#include <asm/termbits.h>
+#include <asm/ioctls.h>
+
+struct winsize {
+        unsigned short ws_row;
+        unsigned short ws_col;
+        unsigned short ws_xpixel;
+        unsigned short ws_ypixel;
+};
+
+#define NCC 8
+struct termio {
+        unsigned short c_iflag;         /* input mode flags */
+        unsigned short c_oflag;         /* output mode flags */
+        unsigned short c_cflag;         /* control mode flags */
+        unsigned short c_lflag;         /* local mode flags */
+        unsigned char c_line;           /* line discipline */
+        unsigned char c_cc[NCC];        /* control characters */
+};
+
+/* modem lines */
+#define TIOCM_LE        0x001
+#define TIOCM_DTR       0x002
+#define TIOCM_RTS       0x004
+#define TIOCM_ST        0x008
+#define TIOCM_SR        0x010
+#define TIOCM_CTS       0x020
+#define TIOCM_CAR       0x040
+#define TIOCM_RNG       0x080
+#define TIOCM_DSR       0x100
+#define TIOCM_CD        TIOCM_CAR
+#define TIOCM_RI        TIOCM_RNG
+#define TIOCM_OUT1      0x2000
+#define TIOCM_OUT2      0x4000
+#define TIOCM_LOOP      0x8000
+
+/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
+
+#ifdef __KERNEL__
+/*      intr=^C         quit=^\         erase=del       kill=^U
+        eof=^D          vtime=\0        vmin=\1         sxtc=\0
+        start=^Q        stop=^S         susp=^Z         eol=\0
+        reprint=^R      discard=^U      werase=^W       lnext=^V
+        eol2=\0
+*/
+#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
+
+#include <asm-generic/termios.h>
+
+#endif  /* __KERNEL__ */
+
+#endif  /* __ASM_AVR32_TERMIOS_H */
diff --git a/arch/avr32/include/asm/thread_info.h b/arch/avr32/include/asm/thread_info.h
new file mode 100644
index 000000000000..294b25f9323d
--- /dev/null
+++ b/arch/avr32/include/asm/thread_info.h
@@ -0,0 +1,115 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_THREAD_INFO_H
+#define __ASM_AVR32_THREAD_INFO_H
+
+#include <asm/page.h>
+
+#define THREAD_SIZE_ORDER       1
+#define THREAD_SIZE             (PAGE_SIZE << THREAD_SIZE_ORDER)
+
+#ifndef __ASSEMBLY__
+#include <asm/types.h>
+
+struct task_struct;
+struct exec_domain;
+
+struct thread_info {
+        struct task_struct      *task;          /* main task structure */
+        struct exec_domain      *exec_domain;   /* execution domain */
+        unsigned long           flags;          /* low level flags */
+        __u32                   cpu;
+        __s32                   preempt_count;  /* 0 => preemptable, <0 => BUG */
+        __u32                   rar_saved;      /* return address... */
+        __u32                   rsr_saved;      /* ...and status register
+                                                   saved by debug handler
+                                                   when setting up
+                                                   trampoline */
+        struct restart_block    restart_block;
+        __u8                    supervisor_stack[0];
+};
+
+#define INIT_THREAD_INFO(tsk)                                           \
+{                                                                       \
+        .task           = &tsk,                                         \
+        .exec_domain    = &default_exec_domain,                         \
+        .flags          = 0,                                            \
+        .cpu            = 0,                                            \
+        .preempt_count  = 1,                                            \
+        .restart_block  = {                                             \
+                .fn     = do_no_restart_syscall                         \
+        }                                                               \
+}
+
+#define init_thread_info        (init_thread_union.thread_info)
+#define init_stack              (init_thread_union.stack)
+
+/*
+ * Get the thread information struct from C.
+ * We do the usual trick and use the lower end of the stack for this
+ */
+static inline struct thread_info *current_thread_info(void)
+{
+        unsigned long addr = ~(THREAD_SIZE - 1);
+
+        asm("and %0, sp" : "=r"(addr) : "0"(addr));
+        return (struct thread_info *)addr;
+}
+
+#define get_thread_info(ti) get_task_struct((ti)->task)
+#define put_thread_info(ti) put_task_struct((ti)->task)
+
+#endif /* !__ASSEMBLY__ */
+
+#define PREEMPT_ACTIVE          0x40000000
+
+/*
+ * Thread information flags
+ * - these are process state flags that various assembly files may need to access
+ * - pending work-to-be-done flags are in LSW
+ * - other flags in MSW
+ */
+#define TIF_SYSCALL_TRACE       0       /* syscall trace active */
+#define TIF_SIGPENDING          1       /* signal pending */
+#define TIF_NEED_RESCHED        2       /* rescheduling necessary */
+#define TIF_POLLING_NRFLAG      3       /* true if poll_idle() is polling
+                                           TIF_NEED_RESCHED */
+#define TIF_BREAKPOINT          4       /* enter monitor mode on return */
+#define TIF_SINGLE_STEP         5       /* single step in progress */
+#define TIF_MEMDIE              6
+#define TIF_RESTORE_SIGMASK     7       /* restore signal mask in do_signal */
+#define TIF_CPU_GOING_TO_SLEEP  8       /* CPU is entering sleep 0 mode */
+#define TIF_FREEZE              29
+#define TIF_DEBUG               30      /* debugging enabled */
+#define TIF_USERSPACE           31      /* true if FS sets userspace */
+
+#define _TIF_SYSCALL_TRACE      (1 << TIF_SYSCALL_TRACE)
+#define _TIF_SIGPENDING         (1 << TIF_SIGPENDING)
+#define _TIF_NEED_RESCHED       (1 << TIF_NEED_RESCHED)
+#define _TIF_POLLING_NRFLAG     (1 << TIF_POLLING_NRFLAG)
+#define _TIF_SINGLE_STEP        (1 << TIF_SINGLE_STEP)
+#define _TIF_MEMDIE             (1 << TIF_MEMDIE)
+#define _TIF_RESTORE_SIGMASK    (1 << TIF_RESTORE_SIGMASK)
+#define _TIF_CPU_GOING_TO_SLEEP (1 << TIF_CPU_GOING_TO_SLEEP)
+
+/* Note: The masks below must never span more than 16 bits! */
+
+/* work to do on interrupt/exception return */
+#define _TIF_WORK_MASK                          \
+        ((1 << TIF_SIGPENDING)                  \
+         | (1 << TIF_NEED_RESCHED)              \
+         | (1 << TIF_POLLING_NRFLAG)            \
+         | (1 << TIF_BREAKPOINT)                \
+         | (1 << TIF_RESTORE_SIGMASK))
+
+/* work to do on any return to userspace */
+#define _TIF_ALLWORK_MASK       (_TIF_WORK_MASK | (1 << TIF_SYSCALL_TRACE))
+/* work to do on return from debug mode */
+#define _TIF_DBGWORK_MASK       (_TIF_WORK_MASK & ~(1 << TIF_BREAKPOINT))
+
+#endif /* __ASM_AVR32_THREAD_INFO_H */
diff --git a/arch/avr32/include/asm/timex.h b/arch/avr32/include/asm/timex.h
new file mode 100644
index 000000000000..187dcf38b210
--- /dev/null
+++ b/arch/avr32/include/asm/timex.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_TIMEX_H
+#define __ASM_AVR32_TIMEX_H
+
+/*
+ * This is the frequency of the timer used for Linux's timer interrupt.
+ * The value should be defined as accurate as possible or under certain
+ * circumstances Linux timekeeping might become inaccurate or fail.
+ *
+ * For many system the exact clockrate of the timer isn't known but due to
+ * the way this value is used we can get away with a wrong value as long
+ * as this value is:
+ *
+ *  - a multiple of HZ
+ *  - a divisor of the actual rate
+ *
+ * 500000 is a good such cheat value.
+ *
+ * The obscure number 1193182 is the same as used by the original i8254
+ * time in legacy PC hardware; the chip is never found in AVR32 systems.
+ */
+#define CLOCK_TICK_RATE         500000  /* Underlying HZ */
+
+typedef unsigned long cycles_t;
+
+static inline cycles_t get_cycles (void)
+{
+        return 0;
+}
+
+#define ARCH_HAS_READ_CURRENT_TIMER
+
+#endif /* __ASM_AVR32_TIMEX_H */
diff --git a/arch/avr32/include/asm/tlb.h b/arch/avr32/include/asm/tlb.h
new file mode 100644
index 000000000000..5c55f9ce7c7d
--- /dev/null
+++ b/arch/avr32/include/asm/tlb.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_TLB_H
+#define __ASM_AVR32_TLB_H
+
+#define tlb_start_vma(tlb, vma) \
+        flush_cache_range(vma, vma->vm_start, vma->vm_end)
+
+#define tlb_end_vma(tlb, vma) \
+        flush_tlb_range(vma, vma->vm_start, vma->vm_end)
+
+#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while(0)
+
+/*
+ * Flush whole TLB for MM
+ */
+#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
+
+#include <asm-generic/tlb.h>
+
+/*
+ * For debugging purposes
+ */
+extern void show_dtlb_entry(unsigned int index);
+extern void dump_dtlb(void);
+
+#endif /* __ASM_AVR32_TLB_H */
diff --git a/arch/avr32/include/asm/tlbflush.h b/arch/avr32/include/asm/tlbflush.h
new file mode 100644
index 000000000000..bf90a786f6be
--- /dev/null
+++ b/arch/avr32/include/asm/tlbflush.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_TLBFLUSH_H
+#define __ASM_AVR32_TLBFLUSH_H
+
+#include <asm/mmu.h>
+
+/*
+ * TLB flushing:
+ *
+ *  - flush_tlb() flushes the current mm struct TLBs
+ *  - flush_tlb_all() flushes all processes' TLB entries
+ *  - flush_tlb_mm(mm) flushes the specified mm context TLBs
+ *  - flush_tlb_page(vma, vmaddr) flushes one page
+ *  - flush_tlb_range(vma, start, end) flushes a range of pages
+ *  - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
+ */
+extern void flush_tlb(void);
+extern void flush_tlb_all(void);
+extern void flush_tlb_mm(struct mm_struct *mm);
+extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
+                            unsigned long end);
+extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long page);
+
+extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
+
+#endif /* __ASM_AVR32_TLBFLUSH_H */
diff --git a/arch/avr32/include/asm/topology.h b/arch/avr32/include/asm/topology.h
new file mode 100644
index 000000000000..5b766cbb4806
--- /dev/null
+++ b/arch/avr32/include/asm/topology.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_AVR32_TOPOLOGY_H
+#define __ASM_AVR32_TOPOLOGY_H
+
+#include <asm-generic/topology.h>
+
+#endif /* __ASM_AVR32_TOPOLOGY_H */
diff --git a/arch/avr32/include/asm/traps.h b/arch/avr32/include/asm/traps.h
new file mode 100644
index 000000000000..6a8fb944f414
--- /dev/null
+++ b/arch/avr32/include/asm/traps.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_TRAPS_H
+#define __ASM_AVR32_TRAPS_H
+
+#include <linux/list.h>
+
+struct undef_hook {
+        struct list_head node;
+        u32 insn_mask;
+        u32 insn_val;
+        int (*fn)(struct pt_regs *regs, u32 insn);
+};
+
+void register_undef_hook(struct undef_hook *hook);
+void unregister_undef_hook(struct undef_hook *hook);
+
+#endif /* __ASM_AVR32_TRAPS_H */
diff --git a/arch/avr32/include/asm/types.h b/arch/avr32/include/asm/types.h
new file mode 100644
index 000000000000..9cefda6f534a
--- /dev/null
+++ b/arch/avr32/include/asm/types.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_TYPES_H
+#define __ASM_AVR32_TYPES_H
+
+#include <asm-generic/int-ll64.h>
+
+#ifndef __ASSEMBLY__
+
+typedef unsigned short umode_t;
+
+#endif /* __ASSEMBLY__ */
+
+/*
+ * These aren't exported outside the kernel to avoid name space clashes
+ */
+#ifdef __KERNEL__
+
+#define BITS_PER_LONG 32
+
+#ifndef __ASSEMBLY__
+
+/* Dma addresses are 32-bits wide.  */
+
+typedef u32 dma_addr_t;
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __KERNEL__ */
+
+
+#endif /* __ASM_AVR32_TYPES_H */
diff --git a/arch/avr32/include/asm/uaccess.h b/arch/avr32/include/asm/uaccess.h
new file mode 100644
index 000000000000..ed092395215e
--- /dev/null
+++ b/arch/avr32/include/asm/uaccess.h
@@ -0,0 +1,324 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_UACCESS_H
+#define __ASM_AVR32_UACCESS_H
+
+#include <linux/errno.h>
+#include <linux/sched.h>
+
+#define VERIFY_READ     0
+#define VERIFY_WRITE    1
+
+typedef struct {
+        unsigned int is_user_space;
+} mm_segment_t;
+
+/*
+ * The fs value determines whether argument validity checking should be
+ * performed or not.  If get_fs() == USER_DS, checking is performed, with
+ * get_fs() == KERNEL_DS, checking is bypassed.
+ *
+ * For historical reasons (Data Segment Register?), these macros are misnamed.
+ */
+#define MAKE_MM_SEG(s)  ((mm_segment_t) { (s) })
+#define segment_eq(a,b) ((a).is_user_space == (b).is_user_space)
+
+#define USER_ADDR_LIMIT 0x80000000
+
+#define KERNEL_DS       MAKE_MM_SEG(0)
+#define USER_DS         MAKE_MM_SEG(1)
+
+#define get_ds()        (KERNEL_DS)
+
+static inline mm_segment_t get_fs(void)
+{
+        return MAKE_MM_SEG(test_thread_flag(TIF_USERSPACE));
+}
+
+static inline void set_fs(mm_segment_t s)
+{
+        if (s.is_user_space)
+                set_thread_flag(TIF_USERSPACE);
+        else
+                clear_thread_flag(TIF_USERSPACE);
+}
+
+/*
+ * Test whether a block of memory is a valid user space address.
+ * Returns 0 if the range is valid, nonzero otherwise.
+ *
+ * We do the following checks:
+ *   1. Is the access from kernel space?
+ *   2. Does (addr + size) set the carry bit?
+ *   3. Is (addr + size) a negative number (i.e. >= 0x80000000)?
+ *
+ * If yes on the first check, access is granted.
+ * If no on any of the others, access is denied.
+ */
+#define __range_ok(addr, size)                                          \
+        (test_thread_flag(TIF_USERSPACE)                                \
+         && (((unsigned long)(addr) >= 0x80000000)                      \
+             || ((unsigned long)(size) > 0x80000000)                    \
+             || (((unsigned long)(addr) + (unsigned long)(size)) > 0x80000000)))
+
+#define access_ok(type, addr, size) (likely(__range_ok(addr, size) == 0))
+
+/* Generic arbitrary sized copy. Return the number of bytes NOT copied */
+extern __kernel_size_t __copy_user(void *to, const void *from,
+                                   __kernel_size_t n);
+
+extern __kernel_size_t copy_to_user(void __user *to, const void *from,
+                                    __kernel_size_t n);
+extern __kernel_size_t copy_from_user(void *to, const void __user *from,
+                                      __kernel_size_t n);
+
+static inline __kernel_size_t __copy_to_user(void __user *to, const void *from,
+                                             __kernel_size_t n)
+{
+        return __copy_user((void __force *)to, from, n);
+}
+static inline __kernel_size_t __copy_from_user(void *to,
+                                               const void __user *from,
+                                               __kernel_size_t n)
+{
+        return __copy_user(to, (const void __force *)from, n);
+}
+
+#define __copy_to_user_inatomic __copy_to_user
+#define __copy_from_user_inatomic __copy_from_user
+
+/*
+ * put_user: - Write a simple value into user space.
+ * @x:   Value to copy to user space.
+ * @ptr: Destination address, in user space.
+ *
+ * Context: User context only.  This function may sleep.
+ *
+ * This macro copies a single simple value from kernel space to user
+ * space.  It supports simple types like char and int, but not larger
+ * data types like structures or arrays.
+ *
+ * @ptr must have pointer-to-simple-variable type, and @x must be assignable
+ * to the result of dereferencing @ptr.
+ *
+ * Returns zero on success, or -EFAULT on error.
+ */
+#define put_user(x,ptr) \
+        __put_user_check((x),(ptr),sizeof(*(ptr)))
+
+/*
+ * get_user: - Get a simple variable from user space.
+ * @x:   Variable to store result.
+ * @ptr: Source address, in user space.
+ *
+ * Context: User context only.  This function may sleep.
+ *
+ * This macro copies a single simple variable from user space to kernel
+ * space.  It supports simple types like char and int, but not larger
+ * data types like structures or arrays.
+ *
+ * @ptr must have pointer-to-simple-variable type, and the result of
+ * dereferencing @ptr must be assignable to @x without a cast.
+ *
+ * Returns zero on success, or -EFAULT on error.
+ * On error, the variable @x is set to zero.
+ */
+#define get_user(x,ptr) \
+        __get_user_check((x),(ptr),sizeof(*(ptr)))
+
+/*
+ * __put_user: - Write a simple value into user space, with less checking.
+ * @x:   Value to copy to user space.
+ * @ptr: Destination address, in user space.
+ *
+ * Context: User context only.  This function may sleep.
+ *
+ * This macro copies a single simple value from kernel space to user
+ * space.  It supports simple types like char and int, but not larger
+ * data types like structures or arrays.
+ *
+ * @ptr must have pointer-to-simple-variable type, and @x must be assignable
+ * to the result of dereferencing @ptr.
+ *
+ * Caller must check the pointer with access_ok() before calling this
+ * function.
+ *
+ * Returns zero on success, or -EFAULT on error.
+ */
+#define __put_user(x,ptr) \
+        __put_user_nocheck((x),(ptr),sizeof(*(ptr)))
+
+/*
+ * __get_user: - Get a simple variable from user space, with less checking.
+ * @x:   Variable to store result.
+ * @ptr: Source address, in user space.
+ *
+ * Context: User context only.  This function may sleep.
+ *
+ * This macro copies a single simple variable from user space to kernel
+ * space.  It supports simple types like char and int, but not larger
+ * data types like structures or arrays.
+ *
+ * @ptr must have pointer-to-simple-variable type, and the result of
+ * dereferencing @ptr must be assignable to @x without a cast.
+ *
+ * Caller must check the pointer with access_ok() before calling this
+ * function.
+ *
+ * Returns zero on success, or -EFAULT on error.
+ * On error, the variable @x is set to zero.
+ */
+#define __get_user(x,ptr) \
+        __get_user_nocheck((x),(ptr),sizeof(*(ptr)))
+
+extern int __get_user_bad(void);
+extern int __put_user_bad(void);
+
+#define __get_user_nocheck(x, ptr, size)                                \
+({                                                                      \
+        unsigned long __gu_val = 0;                                     \
+        int __gu_err = 0;                                               \
+                                                                        \
+        switch (size) {                                                 \
+        case 1: __get_user_asm("ub", __gu_val, ptr, __gu_err); break;   \
+        case 2: __get_user_asm("uh", __gu_val, ptr, __gu_err); break;   \
+        case 4: __get_user_asm("w", __gu_val, ptr, __gu_err); break;    \
+        default: __gu_err = __get_user_bad(); break;                    \
+        }                                                               \
+                                                                        \
+        x = (typeof(*(ptr)))__gu_val;                                   \
+        __gu_err;                                                       \
+})
+
+#define __get_user_check(x, ptr, size)                                  \
+({                                                                      \
+        unsigned long __gu_val = 0;                                     \
+        const typeof(*(ptr)) __user * __gu_addr = (ptr);                \
+        int __gu_err = 0;                                               \
+                                                                        \
+        if (access_ok(VERIFY_READ, __gu_addr, size)) {                  \
+                switch (size) {                                         \
+                case 1:                                                 \
+                        __get_user_asm("ub", __gu_val, __gu_addr,       \
+                                       __gu_err);                       \
+                        break;                                          \
+                case 2:                                                 \
+                        __get_user_asm("uh", __gu_val, __gu_addr,       \
+                                       __gu_err);                       \
+                        break;                                          \
+                case 4:                                                 \
+                        __get_user_asm("w", __gu_val, __gu_addr,        \
+                                       __gu_err);                       \
+                        break;                                          \
+                default:                                                \
+                        __gu_err = __get_user_bad();                    \
+                        break;                                          \
+                }                                                       \
+        } else {                                                        \
+                __gu_err = -EFAULT;                                     \
+        }                                                               \
+        x = (typeof(*(ptr)))__gu_val;                                   \
+        __gu_err;                                                       \
+})
+
+#define __get_user_asm(suffix, __gu_val, ptr, __gu_err)                 \
+        asm volatile(                                                   \
+                "1:     ld." suffix "   %1, %3                  \n"     \
+                "2:                                             \n"     \
+                "       .section .fixup, \"ax\"                 \n"     \
+                "3:     mov     %0, %4                          \n"     \
+                "       rjmp    2b                              \n"     \
+                "       .previous                               \n"     \
+                "       .section __ex_table, \"a\"              \n"     \
+                "       .long   1b, 3b                          \n"     \
+                "       .previous                               \n"     \
+                : "=r"(__gu_err), "=r"(__gu_val)                        \
+                : "0"(__gu_err), "m"(*(ptr)), "i"(-EFAULT))
+
+#define __put_user_nocheck(x, ptr, size)                                \
+({                                                                      \
+        typeof(*(ptr)) __pu_val;                                        \
+        int __pu_err = 0;                                               \
+                                                                        \
+        __pu_val = (x);                                                 \
+        switch (size) {                                                 \
+        case 1: __put_user_asm("b", ptr, __pu_val, __pu_err); break;    \
+        case 2: __put_user_asm("h", ptr, __pu_val, __pu_err); break;    \
+        case 4: __put_user_asm("w", ptr, __pu_val, __pu_err); break;    \
+        case 8: __put_user_asm("d", ptr, __pu_val, __pu_err); break;    \
+        default: __pu_err = __put_user_bad(); break;                    \
+        }                                                               \
+        __pu_err;                                                       \
+})
+
+#define __put_user_check(x, ptr, size)                                  \
+({                                                                      \
+        typeof(*(ptr)) __pu_val;                                        \
+        typeof(*(ptr)) __user *__pu_addr = (ptr);                       \
+        int __pu_err = 0;                                               \
+                                                                        \
+        __pu_val = (x);                                                 \
+        if (access_ok(VERIFY_WRITE, __pu_addr, size)) {                 \
+                switch (size) {                                         \
+                case 1:                                                 \
+                        __put_user_asm("b", __pu_addr, __pu_val,        \
+                                       __pu_err);                       \
+                        break;                                          \
+                case 2:                                                 \
+                        __put_user_asm("h", __pu_addr, __pu_val,        \
+                                       __pu_err);                       \
+                        break;                                          \
+                case 4:                                                 \
+                        __put_user_asm("w", __pu_addr, __pu_val,        \
+                                       __pu_err);                       \
+                        break;                                          \
+                case 8:                                                 \
+                        __put_user_asm("d", __pu_addr, __pu_val,                \
+                                       __pu_err);                       \
+                        break;                                          \
+                default:                                                \
+                        __pu_err = __put_user_bad();                    \
+                        break;                                          \
+                }                                                       \
+        } else {                                                        \
+                __pu_err = -EFAULT;                                     \
+        }                                                               \
+        __pu_err;                                                       \
+})
+
+#define __put_user_asm(suffix, ptr, __pu_val, __gu_err)                 \
+        asm volatile(                                                   \
+                "1:     st." suffix "   %1, %3                  \n"     \
+                "2:                                             \n"     \
+                "       .section .fixup, \"ax\"                 \n"     \
+                "3:     mov     %0, %4                          \n"     \
+                "       rjmp    2b                              \n"     \
+                "       .previous                               \n"     \
+                "       .section __ex_table, \"a\"              \n"     \
+                "       .long   1b, 3b                          \n"     \
+                "       .previous                               \n"     \
+                : "=r"(__gu_err), "=m"(*(ptr))                          \
+                : "0"(__gu_err), "r"(__pu_val), "i"(-EFAULT))
+
+extern __kernel_size_t clear_user(void __user *addr, __kernel_size_t size);
+extern __kernel_size_t __clear_user(void __user *addr, __kernel_size_t size);
+
+extern long strncpy_from_user(char *dst, const char __user *src, long count);
+extern long __strncpy_from_user(char *dst, const char __user *src, long count);
+
+extern long strnlen_user(const char __user *__s, long __n);
+extern long __strnlen_user(const char __user *__s, long __n);
+
+#define strlen_user(s) strnlen_user(s, ~0UL >> 1)
+
+struct exception_table_entry
+{
+        unsigned long insn, fixup;
+};
+
+#endif /* __ASM_AVR32_UACCESS_H */
diff --git a/arch/avr32/include/asm/ucontext.h b/arch/avr32/include/asm/ucontext.h
new file mode 100644
index 000000000000..ac7259c2a799
--- /dev/null
+++ b/arch/avr32/include/asm/ucontext.h
@@ -0,0 +1,12 @@
+#ifndef __ASM_AVR32_UCONTEXT_H
+#define __ASM_AVR32_UCONTEXT_H
+
+struct ucontext {
+        unsigned long           uc_flags;
+        struct ucontext *       uc_link;
+        stack_t                 uc_stack;
+        struct sigcontext       uc_mcontext;
+        sigset_t                uc_sigmask;
+};
+
+#endif /* __ASM_AVR32_UCONTEXT_H */
diff --git a/arch/avr32/include/asm/unaligned.h b/arch/avr32/include/asm/unaligned.h
new file mode 100644
index 000000000000..041877290470
--- /dev/null
+++ b/arch/avr32/include/asm/unaligned.h
@@ -0,0 +1,21 @@
+#ifndef _ASM_AVR32_UNALIGNED_H
+#define _ASM_AVR32_UNALIGNED_H
+
+/*
+ * AVR32 can handle some unaligned accesses, depending on the
+ * implementation.  The AVR32 AP implementation can handle unaligned
+ * words, but halfwords must be halfword-aligned, and doublewords must
+ * be word-aligned.
+ *
+ * However, swapped word loads must be word-aligned so we can't
+ * optimize word loads in general.
+ */
+
+#include <linux/unaligned/be_struct.h>
+#include <linux/unaligned/le_byteshift.h>
+#include <linux/unaligned/generic.h>
+
+#define get_unaligned   __get_unaligned_be
+#define put_unaligned   __put_unaligned_be
+
+#endif /* _ASM_AVR32_UNALIGNED_H */
diff --git a/arch/avr32/include/asm/unistd.h b/arch/avr32/include/asm/unistd.h
new file mode 100644
index 000000000000..89861a27543e
--- /dev/null
+++ b/arch/avr32/include/asm/unistd.h
@@ -0,0 +1,345 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __ASM_AVR32_UNISTD_H
+#define __ASM_AVR32_UNISTD_H
+
+/*
+ * This file contains the system call numbers.
+ */
+
+#define __NR_restart_syscall      0
+#define __NR_exit                 1
+#define __NR_fork                 2
+#define __NR_read                 3
+#define __NR_write                4
+#define __NR_open                 5
+#define __NR_close                6
+#define __NR_umask                7
+#define __NR_creat                8
+#define __NR_link                 9
+#define __NR_unlink              10
+#define __NR_execve              11
+#define __NR_chdir               12
+#define __NR_time                13
+#define __NR_mknod               14
+#define __NR_chmod               15
+#define __NR_chown               16
+#define __NR_lchown              17
+#define __NR_lseek               18
+#define __NR__llseek             19
+#define __NR_getpid              20
+#define __NR_mount               21
+#define __NR_umount2             22
+#define __NR_setuid              23
+#define __NR_getuid              24
+#define __NR_stime               25
+#define __NR_ptrace              26
+#define __NR_alarm               27
+#define __NR_pause               28
+#define __NR_utime               29
+#define __NR_stat                30
+#define __NR_fstat               31
+#define __NR_lstat               32
+#define __NR_access              33
+#define __NR_chroot              34
+#define __NR_sync                35
+#define __NR_fsync               36
+#define __NR_kill                37
+#define __NR_rename              38
+#define __NR_mkdir               39
+#define __NR_rmdir               40
+#define __NR_dup                 41
+#define __NR_pipe                42
+#define __NR_times               43
+#define __NR_clone               44
+#define __NR_brk                 45
+#define __NR_setgid              46
+#define __NR_getgid              47
+#define __NR_getcwd              48
+#define __NR_geteuid             49
+#define __NR_getegid             50
+#define __NR_acct                51
+#define __NR_setfsuid            52
+#define __NR_setfsgid            53
+#define __NR_ioctl               54
+#define __NR_fcntl               55
+#define __NR_setpgid             56
+#define __NR_mremap              57
+#define __NR_setresuid           58
+#define __NR_getresuid           59
+#define __NR_setreuid            60
+#define __NR_setregid            61
+#define __NR_ustat               62
+#define __NR_dup2                63
+#define __NR_getppid             64
+#define __NR_getpgrp             65
+#define __NR_setsid              66
+#define __NR_rt_sigaction        67
+#define __NR_rt_sigreturn        68
+#define __NR_rt_sigprocmask      69
+#define __NR_rt_sigpending       70
+#define __NR_rt_sigtimedwait     71
+#define __NR_rt_sigqueueinfo     72
+#define __NR_rt_sigsuspend       73
+#define __NR_sethostname         74
+#define __NR_setrlimit           75
+#define __NR_getrlimit           76     /* SuS compliant getrlimit */
+#define __NR_getrusage           77
+#define __NR_gettimeofday        78
+#define __NR_settimeofday        79
+#define __NR_getgroups           80
+#define __NR_setgroups           81
+#define __NR_select              82
+#define __NR_symlink             83
+#define __NR_fchdir              84
+#define __NR_readlink            85
+#define __NR_pread               86
+#define __NR_pwrite              87
+#define __NR_swapon              88
+#define __NR_reboot              89
+#define __NR_mmap2               90
+#define __NR_munmap              91
+#define __NR_truncate            92
+#define __NR_ftruncate           93
+#define __NR_fchmod              94
+#define __NR_fchown              95
+#define __NR_getpriority         96
+#define __NR_setpriority         97
+#define __NR_wait4               98
+#define __NR_statfs              99
+#define __NR_fstatfs            100
+#define __NR_vhangup            101
+#define __NR_sigaltstack        102
+#define __NR_syslog             103
+#define __NR_setitimer          104
+#define __NR_getitimer          105
+#define __NR_swapoff            106
+#define __NR_sysinfo            107
+/* 108 was __NR_ipc for a little while */
+#define __NR_sendfile           109
+#define __NR_setdomainname      110
+#define __NR_uname              111
+#define __NR_adjtimex           112
+#define __NR_mprotect           113
+#define __NR_vfork              114
+#define __NR_init_module        115
+#define __NR_delete_module      116
+#define __NR_quotactl           117
+#define __NR_getpgid            118
+#define __NR_bdflush            119
+#define __NR_sysfs              120
+#define __NR_personality        121
+#define __NR_afs_syscall        122 /* Syscall for Andrew File System */
+#define __NR_getdents           123
+#define __NR_flock              124
+#define __NR_msync              125
+#define __NR_readv              126
+#define __NR_writev             127
+#define __NR_getsid             128
+#define __NR_fdatasync          129
+#define __NR__sysctl            130
+#define __NR_mlock              131
+#define __NR_munlock            132
+#define __NR_mlockall           133
+#define __NR_munlockall         134
+#define __NR_sched_setparam             135
+#define __NR_sched_getparam             136
+#define __NR_sched_setscheduler         137
+#define __NR_sched_getscheduler         138
+#define __NR_sched_yield                139
+#define __NR_sched_get_priority_max     140
+#define __NR_sched_get_priority_min     141
+#define __NR_sched_rr_get_interval      142
+#define __NR_nanosleep          143
+#define __NR_poll               144
+#define __NR_nfsservctl         145
+#define __NR_setresgid          146
+#define __NR_getresgid          147
+#define __NR_prctl              148
+#define __NR_socket             149
+#define __NR_bind               150
+#define __NR_connect            151
+#define __NR_listen             152
+#define __NR_accept             153
+#define __NR_getsockname        154
+#define __NR_getpeername        155
+#define __NR_socketpair         156
+#define __NR_send               157
+#define __NR_recv               158
+#define __NR_sendto             159
+#define __NR_recvfrom           160
+#define __NR_shutdown           161
+#define __NR_setsockopt         162
+#define __NR_getsockopt         163
+#define __NR_sendmsg            164
+#define __NR_recvmsg            165
+#define __NR_truncate64         166
+#define __NR_ftruncate64        167
+#define __NR_stat64             168
+#define __NR_lstat64            169
+#define __NR_fstat64            170
+#define __NR_pivot_root         171
+#define __NR_mincore            172
+#define __NR_madvise            173
+#define __NR_getdents64         174
+#define __NR_fcntl64            175
+#define __NR_gettid             176
+#define __NR_readahead          177
+#define __NR_setxattr           178
+#define __NR_lsetxattr          179
+#define __NR_fsetxattr          180
+#define __NR_getxattr           181
+#define __NR_lgetxattr          182
+#define __NR_fgetxattr          183
+#define __NR_listxattr          184
+#define __NR_llistxattr         185
+#define __NR_flistxattr         186
+#define __NR_removexattr        187
+#define __NR_lremovexattr       188
+#define __NR_fremovexattr       189
+#define __NR_tkill              190
+#define __NR_sendfile64         191
+#define __NR_futex              192
+#define __NR_sched_setaffinity  193
+#define __NR_sched_getaffinity  194
+#define __NR_capget             195
+#define __NR_capset             196
+#define __NR_io_setup           197
+#define __NR_io_destroy         198
+#define __NR_io_getevents       199
+#define __NR_io_submit          200
+#define __NR_io_cancel          201
+#define __NR_fadvise64          202
+#define __NR_exit_group         203
+#define __NR_lookup_dcookie     204
+#define __NR_epoll_create       205
+#define __NR_epoll_ctl          206
+#define __NR_epoll_wait         207
+#define __NR_remap_file_pages   208
+#define __NR_set_tid_address    209
+
+#define __NR_timer_create       210
+#define __NR_timer_settime      211
+#define __NR_timer_gettime      212
+#define __NR_timer_getoverrun   213
+#define __NR_timer_delete       214
+#define __NR_clock_settime      215
+#define __NR_clock_gettime      216
+#define __NR_clock_getres       217
+#define __NR_clock_nanosleep    218
+#define __NR_statfs64           219
+#define __NR_fstatfs64          220
+#define __NR_tgkill             221
+                                /* 222 reserved for tux */
+#define __NR_utimes             223
+#define __NR_fadvise64_64       224
+
+#define __NR_cacheflush         225
+
+#define __NR_vserver            226
+#define __NR_mq_open            227
+#define __NR_mq_unlink          228
+#define __NR_mq_timedsend       229
+#define __NR_mq_timedreceive    230
+#define __NR_mq_notify          231
+#define __NR_mq_getsetattr      232
+#define __NR_kexec_load         233
+#define __NR_waitid             234
+#define __NR_add_key            235
+#define __NR_request_key        236
+#define __NR_keyctl             237
+#define __NR_ioprio_set         238
+#define __NR_ioprio_get         239
+#define __NR_inotify_init       240
+#define __NR_inotify_add_watch  241
+#define __NR_inotify_rm_watch   242
+#define __NR_openat             243
+#define __NR_mkdirat            244
+#define __NR_mknodat            245
+#define __NR_fchownat           246
+#define __NR_futimesat          247
+#define __NR_fstatat64          248
+#define __NR_unlinkat           249
+#define __NR_renameat           250
+#define __NR_linkat             251
+#define __NR_symlinkat          252
+#define __NR_readlinkat         253
+#define __NR_fchmodat           254
+#define __NR_faccessat          255
+#define __NR_pselect6           256
+#define __NR_ppoll              257
+#define __NR_unshare            258
+#define __NR_set_robust_list    259
+#define __NR_get_robust_list    260
+#define __NR_splice             261
+#define __NR_sync_file_range    262
+#define __NR_tee                263
+#define __NR_vmsplice           264
+#define __NR_epoll_pwait        265
+
+#define __NR_msgget             266
+#define __NR_msgsnd             267
+#define __NR_msgrcv             268
+#define __NR_msgctl             269
+#define __NR_semget             270
+#define __NR_semop              271
+#define __NR_semctl             272
+#define __NR_semtimedop         273
+#define __NR_shmat              274
+#define __NR_shmget             275
+#define __NR_shmdt              276
+#define __NR_shmctl             277
+
+#define __NR_utimensat          278
+#define __NR_signalfd           279
+/* 280 was __NR_timerfd */
+#define __NR_eventfd            281
+
+#ifdef __KERNEL__
+#define NR_syscalls             282
+
+/* Old stuff */
+#define __IGNORE_uselib
+#define __IGNORE_mmap
+
+/* NUMA stuff */
+#define __IGNORE_mbind
+#define __IGNORE_get_mempolicy
+#define __IGNORE_set_mempolicy
+#define __IGNORE_migrate_pages
+#define __IGNORE_move_pages
+
+/* SMP stuff */
+#define __IGNORE_getcpu
+
+#define __ARCH_WANT_IPC_PARSE_VERSION
+#define __ARCH_WANT_STAT64
+#define __ARCH_WANT_SYS_ALARM
+#define __ARCH_WANT_SYS_GETHOSTNAME
+#define __ARCH_WANT_SYS_PAUSE
+#define __ARCH_WANT_SYS_TIME
+#define __ARCH_WANT_SYS_UTIME
+#define __ARCH_WANT_SYS_WAITPID
+#define __ARCH_WANT_SYS_FADVISE64
+#define __ARCH_WANT_SYS_GETPGRP
+#define __ARCH_WANT_SYS_LLSEEK
+#define __ARCH_WANT_SYS_GETPGRP
+#define __ARCH_WANT_SYS_RT_SIGACTION
+#define __ARCH_WANT_SYS_RT_SIGSUSPEND
+
+/*
+ * "Conditional" syscalls
+ *
+ * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
+ * but it doesn't work on all toolchains, so we just do it by hand
+ */
+#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall");
+
+#endif /* __KERNEL__ */
+
+#endif /* __ASM_AVR32_UNISTD_H */
diff --git a/arch/avr32/include/asm/user.h b/arch/avr32/include/asm/user.h
new file mode 100644
index 000000000000..7e9152f81f5e
--- /dev/null
+++ b/arch/avr32/include/asm/user.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Note: We may not need these definitions for AVR32, as we don't
+ * support a.out.
+ */
+#ifndef __ASM_AVR32_USER_H
+#define __ASM_AVR32_USER_H
+
+#include <linux/types.h>
+#include <asm/ptrace.h>
+#include <asm/page.h>
+
+/*
+ * Core file format: The core file is written in such a way that gdb
+ * can understand it and provide useful information to the user (under
+ * linux we use the `trad-core' bfd).  The file contents are as follows:
+ *
+ *  upage: 1 page consisting of a user struct that tells gdb
+ *      what is present in the file.  Directly after this is a
+ *      copy of the task_struct, which is currently not used by gdb,
+ *      but it may come in handy at some point.  All of the registers
+ *      are stored as part of the upage.  The upage should always be
+ *      only one page long.
+ *  data: The data segment follows next.  We use current->end_text to
+ *      current->brk to pick up all of the user variables, plus any memory
+ *      that may have been sbrk'ed.  No attempt is made to determine if a
+ *      page is demand-zero or if a page is totally unused, we just cover
+ *      the entire range.  All of the addresses are rounded in such a way
+ *      that an integral number of pages is written.
+ *  stack: We need the stack information in order to get a meaningful
+ *      backtrace.  We need to write the data from usp to
+ *      current->start_stack, so we round each of these in order to be able
+ *      to write an integer number of pages.
+ */
+
+struct user_fpu_struct {
+        /* We have no FPU (yet) */
+};
+
+struct user {
+        struct pt_regs  regs;                   /* entire machine state */
+        size_t          u_tsize;                /* text size (pages) */
+        size_t          u_dsize;                /* data size (pages) */
+        size_t          u_ssize;                /* stack size (pages) */
+        unsigned long   start_code;             /* text starting address */
+        unsigned long   start_data;             /* data starting address */
+        unsigned long   start_stack;            /* stack starting address */
+        long int        signal;                 /* signal causing core dump */
+        unsigned long   u_ar0;                  /* help gdb find registers */
+        unsigned long   magic;                  /* identifies a core file */
+        char            u_comm[32];             /* user command name */
+};
+
+#define NBPG                    PAGE_SIZE
+#define UPAGES                  1
+#define HOST_TEXT_START_ADDR    (u.start_code)
+#define HOST_DATA_START_ADDR    (u.start_data)
+#define HOST_STACK_END_ADDR     (u.start_stack + u.u_ssize * NBPG)
+
+#endif /* __ASM_AVR32_USER_H */
diff --git a/arch/avr32/include/asm/xor.h b/arch/avr32/include/asm/xor.h
new file mode 100644
index 000000000000..99c87aa0af4f
--- /dev/null
+++ b/arch/avr32/include/asm/xor.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_XOR_H
+#define _ASM_XOR_H
+
+#include <asm-generic/xor.h>
+
+#endif