aboutsummaryrefslogtreecommitdiffstats
path: root/arch/avr32/boards
diff options
context:
space:
mode:
Diffstat (limited to 'arch/avr32/boards')
-rw-r--r--arch/avr32/boards/atstk1000/atstk1002.c18
-rw-r--r--arch/avr32/boards/atstk1000/atstk1003.c18
-rw-r--r--arch/avr32/boards/favr-32/setup.c20
-rw-r--r--arch/avr32/boards/mimc200/setup.c2
4 files changed, 3 insertions, 55 deletions
diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c
index 5c5cdf3b464f..11e7800c1632 100644
--- a/arch/avr32/boards/atstk1000/atstk1002.c
+++ b/arch/avr32/boards/atstk1000/atstk1002.c
@@ -287,23 +287,7 @@ static int __init atstk1002_init(void)
287 * ATSTK1000 uses 32-bit SDRAM interface. Reserve the 287 * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
288 * SDRAM-specific pins so that nobody messes with them. 288 * SDRAM-specific pins so that nobody messes with them.
289 */ 289 */
290 at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */ 290 at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
291 at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */
292 at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */
293 at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */
294 at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */
295 at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */
296 at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */
297 at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */
298 at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */
299 at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */
300 at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */
301 at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */
302 at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */
303 at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */
304 at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */
305 at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */
306 at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */
307 291
308#ifdef CONFIG_BOARD_ATSTK1006 292#ifdef CONFIG_BOARD_ATSTK1006
309 smc_set_timing(&nand_config, &nand_timing); 293 smc_set_timing(&nand_config, &nand_timing);
diff --git a/arch/avr32/boards/atstk1000/atstk1003.c b/arch/avr32/boards/atstk1000/atstk1003.c
index 134b566630b0..ac31666613a1 100644
--- a/arch/avr32/boards/atstk1000/atstk1003.c
+++ b/arch/avr32/boards/atstk1000/atstk1003.c
@@ -131,23 +131,7 @@ static int __init atstk1003_init(void)
131 * ATSTK1000 uses 32-bit SDRAM interface. Reserve the 131 * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
132 * SDRAM-specific pins so that nobody messes with them. 132 * SDRAM-specific pins so that nobody messes with them.
133 */ 133 */
134 at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */ 134 at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
135 at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */
136 at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */
137 at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */
138 at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */
139 at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */
140 at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */
141 at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */
142 at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */
143 at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */
144 at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */
145 at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */
146 at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */
147 at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */
148 at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */
149 at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */
150 at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */
151 135
152#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM 136#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
153 at32_add_device_usart(1); 137 at32_add_device_usart(1);
diff --git a/arch/avr32/boards/favr-32/setup.c b/arch/avr32/boards/favr-32/setup.c
index 1ee4faf0742d..1a12930df8e7 100644
--- a/arch/avr32/boards/favr-32/setup.c
+++ b/arch/avr32/boards/favr-32/setup.c
@@ -307,28 +307,10 @@ static int __init favr32_init(void)
307 * Favr-32 uses 32-bit SDRAM interface. Reserve the SDRAM-specific 307 * Favr-32 uses 32-bit SDRAM interface. Reserve the SDRAM-specific
308 * pins so that nobody messes with them. 308 * pins so that nobody messes with them.
309 */ 309 */
310 at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */ 310 at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL);
311 at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */
312 at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */
313 at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */
314 at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */
315 at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */
316 at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */
317 at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */
318 at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */
319 at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */
320 at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */
321 at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */
322 at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */
323 at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */
324 at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */
325 at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */
326 at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */
327 311
328 at32_select_gpio(GPIO_PIN_PB(3), 0); /* IRQ from ADS7843 */ 312 at32_select_gpio(GPIO_PIN_PB(3), 0); /* IRQ from ADS7843 */
329 313
330 at32_add_system_devices();
331
332 at32_add_device_usart(0); 314 at32_add_device_usart(0);
333 315
334 set_hw_addr(at32_add_device_eth(0, &eth_data[0])); 316 set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
diff --git a/arch/avr32/boards/mimc200/setup.c b/arch/avr32/boards/mimc200/setup.c
index 397cbb8f44c8..c060d4d2839e 100644
--- a/arch/avr32/boards/mimc200/setup.c
+++ b/arch/avr32/boards/mimc200/setup.c
@@ -207,8 +207,6 @@ static int __init mimc200_init(void)
207 * reserve any pins for it. 207 * reserve any pins for it.
208 */ 208 */
209 209
210 at32_add_system_devices();
211
212 at32_add_device_usart(0); 210 at32_add_device_usart(0);
213 at32_add_device_usart(1); 211 at32_add_device_usart(1);
214 at32_add_device_usart(2); 212 at32_add_device_usart(2);