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-rw-r--r--arch/arm/Kconfig4
-rw-r--r--arch/arm/common/it8152.c1
-rw-r--r--arch/arm/mach-at91/Makefile2
-rw-r--r--arch/arm/mach-at91/board-pcontrol-g20.c98
-rw-r--r--arch/arm/mach-at91/board-stamp9g20.c82
-rw-r--r--arch/arm/mach-at91/clock.c2
-rw-r--r--arch/arm/mach-at91/include/mach/at91_mci.h2
-rw-r--r--arch/arm/mach-at91/include/mach/stamp9g20.h7
-rw-r--r--arch/arm/mach-ixp4xx/common-pci.c2
-rw-r--r--arch/arm/mach-mmp/mmp2.c1
-rw-r--r--arch/arm/mach-omap2/board-zoom-peripherals.c2
-rw-r--r--arch/arm/mach-omap2/io.c2
-rw-r--r--arch/arm/mach-omap2/pm-debug.c34
-rw-r--r--arch/arm/mach-omap2/pm24xx.c34
-rw-r--r--arch/arm/mach-omap2/pm34xx.c27
-rw-r--r--arch/arm/mach-omap2/prcm-common.h11
-rw-r--r--arch/arm/mach-pxa/palmtx.c3
-rw-r--r--arch/arm/mach-s3c2412/Kconfig9
-rw-r--r--arch/arm/mach-s3c2412/Makefile3
-rw-r--r--arch/arm/mach-s3c2416/Kconfig4
-rw-r--r--arch/arm/mach-s3c2440/Kconfig4
-rw-r--r--arch/arm/mach-s3c2440/s3c2440.c11
-rw-r--r--arch/arm/mach-s3c2440/s3c2442.c14
-rw-r--r--arch/arm/mach-s3c2443/Kconfig1
-rw-r--r--arch/arm/mach-s5pv210/mach-aquila.c6
-rw-r--r--arch/arm/mach-s5pv210/mach-goni.c6
-rw-r--r--arch/arm/mach-s5pv310/Kconfig11
-rw-r--r--arch/arm/mach-s5pv310/Makefile3
-rw-r--r--arch/arm/mach-s5pv310/cpu.c7
-rw-r--r--arch/arm/mach-s5pv310/dev-pd.c139
-rw-r--r--arch/arm/mach-s5pv310/include/mach/map.h2
-rw-r--r--arch/arm/mach-s5pv310/include/mach/regs-pmu.h30
-rw-r--r--arch/arm/mach-s5pv310/mach-smdkc210.c8
-rw-r--r--arch/arm/mach-s5pv310/mach-smdkv310.c8
-rw-r--r--arch/arm/mach-s5pv310/mach-universal_c210.c80
-rw-r--r--arch/arm/mach-shmobile/include/mach/entry-macro.S30
-rw-r--r--arch/arm/mach-shmobile/include/mach/vmalloc.h2
-rw-r--r--arch/arm/mm/cache-v6.S28
-rw-r--r--arch/arm/mm/cache-v7.S27
-rw-r--r--arch/arm/mm/proc-macros.S22
-rw-r--r--arch/arm/plat-omap/counter_32k.c3
-rw-r--r--arch/arm/plat-omap/sram.c2
-rw-r--r--arch/arm/plat-s3c24xx/Kconfig2
-rw-r--r--arch/arm/plat-s3c24xx/cpu.c8
-rw-r--r--arch/arm/plat-s3c24xx/gpiolib.c2
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/s3c244x.h7
-rw-r--r--arch/arm/plat-s5p/include/plat/map-s5p.h1
-rw-r--r--arch/arm/plat-samsung/gpio-config.c47
-rw-r--r--arch/arm/plat-samsung/include/plat/devs.h2
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h11
-rw-r--r--arch/arm/tools/mach-types183
51 files changed, 803 insertions, 234 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f1d9297b1050..d56d21c0573b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1311,7 +1311,7 @@ config HZ
1311 1311
1312config THUMB2_KERNEL 1312config THUMB2_KERNEL
1313 bool "Compile the kernel in Thumb-2 mode" 1313 bool "Compile the kernel in Thumb-2 mode"
1314 depends on CPU_V7 && EXPERIMENTAL 1314 depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL
1315 select AEABI 1315 select AEABI
1316 select ARM_ASM_UNIFIED 1316 select ARM_ASM_UNIFIED
1317 help 1317 help
@@ -1759,7 +1759,7 @@ comment "At least one emulation must be selected"
1759 1759
1760config FPE_NWFPE 1760config FPE_NWFPE
1761 bool "NWFPE math emulation" 1761 bool "NWFPE math emulation"
1762 depends on !AEABI || OABI_COMPAT 1762 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1763 ---help--- 1763 ---help---
1764 Say Y to include the NWFPE floating point emulator in the kernel. 1764 Say Y to include the NWFPE floating point emulator in the kernel.
1765 This is necessary to run most binaries. Linux does not currently 1765 This is necessary to run most binaries. Linux does not currently
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index 1bec96e85196..42ff90b46dfb 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -352,3 +352,4 @@ struct pci_bus * __init it8152_pci_scan_bus(int nr, struct pci_sys_data *sys)
352 return pci_scan_bus(nr, &it8152_ops, sys); 352 return pci_scan_bus(nr, &it8152_ops, sys);
353} 353}
354 354
355EXPORT_SYMBOL(dma_set_coherent_mask);
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 62d686f0b426..d13add71f72a 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -65,7 +65,7 @@ obj-$(CONFIG_MACH_AT91SAM9G20EK) += board-sam9g20ek.o
65obj-$(CONFIG_MACH_CPU9G20) += board-cpu9krea.o 65obj-$(CONFIG_MACH_CPU9G20) += board-cpu9krea.o
66obj-$(CONFIG_MACH_STAMP9G20) += board-stamp9g20.o 66obj-$(CONFIG_MACH_STAMP9G20) += board-stamp9g20.o
67obj-$(CONFIG_MACH_PORTUXG20) += board-stamp9g20.o 67obj-$(CONFIG_MACH_PORTUXG20) += board-stamp9g20.o
68obj-$(CONFIG_MACH_PCONTROL_G20) += board-pcontrol-g20.o 68obj-$(CONFIG_MACH_PCONTROL_G20) += board-pcontrol-g20.o board-stamp9g20.o
69 69
70# AT91SAM9260/AT91SAM9G20 board-specific support 70# AT91SAM9260/AT91SAM9G20 board-specific support
71obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o 71obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o
diff --git a/arch/arm/mach-at91/board-pcontrol-g20.c b/arch/arm/mach-at91/board-pcontrol-g20.c
index bba5a560e02b..feb65787c30b 100644
--- a/arch/arm/mach-at91/board-pcontrol-g20.c
+++ b/arch/arm/mach-at91/board-pcontrol-g20.c
@@ -31,6 +31,7 @@
31 31
32#include <mach/board.h> 32#include <mach/board.h>
33#include <mach/at91sam9_smc.h> 33#include <mach/at91sam9_smc.h>
34#include <mach/stamp9g20.h>
34 35
35#include "sam9_smc.h" 36#include "sam9_smc.h"
36#include "generic.h" 37#include "generic.h"
@@ -38,11 +39,7 @@
38 39
39static void __init pcontrol_g20_map_io(void) 40static void __init pcontrol_g20_map_io(void)
40{ 41{
41 /* Initialize processor: 18.432 MHz crystal */ 42 stamp9g20_map_io();
42 at91sam9260_initialize(18432000);
43
44 /* DGBU on ttyS0. (Rx, Tx) only TTL -> JTAG connector X7 17,19 ) */
45 at91_register_uart(0, 0, 0);
46 43
47 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) piggyback A2 */ 44 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) piggyback A2 */
48 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS 45 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS
@@ -54,9 +51,6 @@ static void __init pcontrol_g20_map_io(void)
54 51
55 /* USART2 on ttyS3. (Rx, Tx) 9bit-Bus Multidrop-mode X4 */ 52 /* USART2 on ttyS3. (Rx, Tx) 9bit-Bus Multidrop-mode X4 */
56 at91_register_uart(AT91SAM9260_ID_US4, 3, 0); 53 at91_register_uart(AT91SAM9260_ID_US4, 3, 0);
57
58 /* set serial console to ttyS0 (ie, DBGU) */
59 at91_set_serial_console(0);
60} 54}
61 55
62 56
@@ -66,38 +60,6 @@ static void __init init_irq(void)
66} 60}
67 61
68 62
69/*
70 * NAND flash 512MiB 1,8V 8-bit, sector size 128 KiB
71 */
72static struct atmel_nand_data __initdata nand_data = {
73 .ale = 21,
74 .cle = 22,
75 .rdy_pin = AT91_PIN_PC13,
76 .enable_pin = AT91_PIN_PC14,
77};
78
79/*
80 * Bus timings; unit = 7.57ns
81 */
82static struct sam9_smc_config __initdata nand_smc_config = {
83 .ncs_read_setup = 0,
84 .nrd_setup = 2,
85 .ncs_write_setup = 0,
86 .nwe_setup = 2,
87
88 .ncs_read_pulse = 4,
89 .nrd_pulse = 4,
90 .ncs_write_pulse = 4,
91 .nwe_pulse = 4,
92
93 .read_cycle = 7,
94 .write_cycle = 7,
95
96 .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE
97 | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_DBW_8,
98 .tdf_cycles = 3,
99};
100
101static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { { 63static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { {
102 .ncs_read_setup = 16, 64 .ncs_read_setup = 16,
103 .nrd_setup = 18, 65 .nrd_setup = 18,
@@ -138,14 +100,6 @@ static struct sam9_smc_config __initdata pcontrol_smc_config[2] = { {
138 .tdf_cycles = 1, 100 .tdf_cycles = 1,
139} }; 101} };
140 102
141static void __init add_device_nand(void)
142{
143 /* configure chip-select 3 (NAND) */
144 sam9_smc_configure(3, &nand_smc_config);
145 at91_add_device_nand(&nand_data);
146}
147
148
149static void __init add_device_pcontrol(void) 103static void __init add_device_pcontrol(void)
150{ 104{
151 /* configure chip-select 4 (IO compatible to 8051 X4 ) */ 105 /* configure chip-select 4 (IO compatible to 8051 X4 ) */
@@ -156,23 +110,6 @@ static void __init add_device_pcontrol(void)
156 110
157 111
158/* 112/*
159 * MCI (SD/MMC)
160 * det_pin, wp_pin and vcc_pin are not connected
161 */
162#if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
163static struct mci_platform_data __initdata mmc_data = {
164 .slot[0] = {
165 .bus_width = 4,
166 },
167};
168#else
169static struct at91_mmc_data __initdata mmc_data = {
170 .wire4 = 1,
171};
172#endif
173
174
175/*
176 * USB Host port 113 * USB Host port
177 */ 114 */
178static struct at91_usbh_data __initdata usbh_data = { 115static struct at91_usbh_data __initdata usbh_data = {
@@ -265,42 +202,13 @@ static struct spi_board_info pcontrol_g20_spi_devices[] = {
265}; 202};
266 203
267 204
268/*
269 * Dallas 1-Wire DS2431
270 */
271static struct w1_gpio_platform_data w1_gpio_pdata = {
272 .pin = AT91_PIN_PA29,
273 .is_open_drain = 1,
274};
275
276static struct platform_device w1_device = {
277 .name = "w1-gpio",
278 .id = -1,
279 .dev.platform_data = &w1_gpio_pdata,
280};
281
282static void add_wire1(void)
283{
284 at91_set_GPIO_periph(w1_gpio_pdata.pin, 1);
285 at91_set_multi_drive(w1_gpio_pdata.pin, 1);
286 platform_device_register(&w1_device);
287}
288
289
290static void __init pcontrol_g20_board_init(void) 205static void __init pcontrol_g20_board_init(void)
291{ 206{
292 at91_add_device_serial(); 207 stamp9g20_board_init();
293 add_device_nand();
294#if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
295 at91_add_device_mci(0, &mmc_data);
296#else
297 at91_add_device_mmc(0, &mmc_data);
298#endif
299 at91_add_device_usbh(&usbh_data); 208 at91_add_device_usbh(&usbh_data);
300 at91_add_device_eth(&macb_data); 209 at91_add_device_eth(&macb_data);
301 at91_add_device_i2c(pcontrol_g20_i2c_devices, 210 at91_add_device_i2c(pcontrol_g20_i2c_devices,
302 ARRAY_SIZE(pcontrol_g20_i2c_devices)); 211 ARRAY_SIZE(pcontrol_g20_i2c_devices));
303 add_wire1();
304 add_device_pcontrol(); 212 add_device_pcontrol();
305 at91_add_device_spi(pcontrol_g20_spi_devices, 213 at91_add_device_spi(pcontrol_g20_spi_devices,
306 ARRAY_SIZE(pcontrol_g20_spi_devices)); 214 ARRAY_SIZE(pcontrol_g20_spi_devices));
diff --git a/arch/arm/mach-at91/board-stamp9g20.c b/arch/arm/mach-at91/board-stamp9g20.c
index 5206eef4a67e..f8902b118960 100644
--- a/arch/arm/mach-at91/board-stamp9g20.c
+++ b/arch/arm/mach-at91/board-stamp9g20.c
@@ -32,7 +32,7 @@
32#include "generic.h" 32#include "generic.h"
33 33
34 34
35static void __init portuxg20_map_io(void) 35void __init stamp9g20_map_io(void)
36{ 36{
37 /* Initialize processor: 18.432 MHz crystal */ 37 /* Initialize processor: 18.432 MHz crystal */
38 at91sam9260_initialize(18432000); 38 at91sam9260_initialize(18432000);
@@ -40,6 +40,24 @@ static void __init portuxg20_map_io(void)
40 /* DGBU on ttyS0. (Rx & Tx only) */ 40 /* DGBU on ttyS0. (Rx & Tx only) */
41 at91_register_uart(0, 0, 0); 41 at91_register_uart(0, 0, 0);
42 42
43 /* set serial console to ttyS0 (ie, DBGU) */
44 at91_set_serial_console(0);
45}
46
47static void __init stamp9g20evb_map_io(void)
48{
49 stamp9g20_map_io();
50
51 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
52 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
53 | ATMEL_UART_DTR | ATMEL_UART_DSR
54 | ATMEL_UART_DCD | ATMEL_UART_RI);
55}
56
57static void __init portuxg20_map_io(void)
58{
59 stamp9g20_map_io();
60
43 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ 61 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
44 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS 62 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
45 | ATMEL_UART_DTR | ATMEL_UART_DSR 63 | ATMEL_UART_DTR | ATMEL_UART_DSR
@@ -56,26 +74,6 @@ static void __init portuxg20_map_io(void)
56 74
57 /* USART5 on ttyS6. (Rx, Tx only) */ 75 /* USART5 on ttyS6. (Rx, Tx only) */
58 at91_register_uart(AT91SAM9260_ID_US5, 6, 0); 76 at91_register_uart(AT91SAM9260_ID_US5, 6, 0);
59
60 /* set serial console to ttyS0 (ie, DBGU) */
61 at91_set_serial_console(0);
62}
63
64static void __init stamp9g20_map_io(void)
65{
66 /* Initialize processor: 18.432 MHz crystal */
67 at91sam9260_initialize(18432000);
68
69 /* DGBU on ttyS0. (Rx & Tx only) */
70 at91_register_uart(0, 0, 0);
71
72 /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
73 at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
74 | ATMEL_UART_DTR | ATMEL_UART_DSR
75 | ATMEL_UART_DCD | ATMEL_UART_RI);
76
77 /* set serial console to ttyS0 (ie, DBGU) */
78 at91_set_serial_console(0);
79} 77}
80 78
81static void __init init_irq(void) 79static void __init init_irq(void)
@@ -156,7 +154,7 @@ static struct at91_udc_data __initdata portuxg20_udc_data = {
156 .pullup_pin = 0, /* pull-up driven by UDC */ 154 .pullup_pin = 0, /* pull-up driven by UDC */
157}; 155};
158 156
159static struct at91_udc_data __initdata stamp9g20_udc_data = { 157static struct at91_udc_data __initdata stamp9g20evb_udc_data = {
160 .vbus_pin = AT91_PIN_PA22, 158 .vbus_pin = AT91_PIN_PA22,
161 .pullup_pin = 0, /* pull-up driven by UDC */ 159 .pullup_pin = 0, /* pull-up driven by UDC */
162}; 160};
@@ -190,7 +188,7 @@ static struct gpio_led portuxg20_leds[] = {
190 } 188 }
191}; 189};
192 190
193static struct gpio_led stamp9g20_leds[] = { 191static struct gpio_led stamp9g20evb_leds[] = {
194 { 192 {
195 .name = "D8", 193 .name = "D8",
196 .gpio = AT91_PIN_PB18, 194 .gpio = AT91_PIN_PB18,
@@ -250,7 +248,7 @@ void add_w1(void)
250} 248}
251 249
252 250
253static void __init generic_board_init(void) 251void __init stamp9g20_board_init(void)
254{ 252{
255 /* Serial */ 253 /* Serial */
256 at91_add_device_serial(); 254 at91_add_device_serial();
@@ -262,34 +260,40 @@ static void __init generic_board_init(void)
262#else 260#else
263 at91_add_device_mmc(0, &mmc_data); 261 at91_add_device_mmc(0, &mmc_data);
264#endif 262#endif
265 /* USB Host */
266 at91_add_device_usbh(&usbh_data);
267 /* Ethernet */
268 at91_add_device_eth(&macb_data);
269 /* I2C */
270 at91_add_device_i2c(NULL, 0);
271 /* W1 */ 263 /* W1 */
272 add_w1(); 264 add_w1();
273} 265}
274 266
275static void __init portuxg20_board_init(void) 267static void __init portuxg20_board_init(void)
276{ 268{
277 generic_board_init(); 269 stamp9g20_board_init();
278 /* SPI */ 270 /* USB Host */
279 at91_add_device_spi(portuxg20_spi_devices, ARRAY_SIZE(portuxg20_spi_devices)); 271 at91_add_device_usbh(&usbh_data);
280 /* USB Device */ 272 /* USB Device */
281 at91_add_device_udc(&portuxg20_udc_data); 273 at91_add_device_udc(&portuxg20_udc_data);
274 /* Ethernet */
275 at91_add_device_eth(&macb_data);
276 /* I2C */
277 at91_add_device_i2c(NULL, 0);
278 /* SPI */
279 at91_add_device_spi(portuxg20_spi_devices, ARRAY_SIZE(portuxg20_spi_devices));
282 /* LEDs */ 280 /* LEDs */
283 at91_gpio_leds(portuxg20_leds, ARRAY_SIZE(portuxg20_leds)); 281 at91_gpio_leds(portuxg20_leds, ARRAY_SIZE(portuxg20_leds));
284} 282}
285 283
286static void __init stamp9g20_board_init(void) 284static void __init stamp9g20evb_board_init(void)
287{ 285{
288 generic_board_init(); 286 stamp9g20_board_init();
287 /* USB Host */
288 at91_add_device_usbh(&usbh_data);
289 /* USB Device */ 289 /* USB Device */
290 at91_add_device_udc(&stamp9g20_udc_data); 290 at91_add_device_udc(&stamp9g20evb_udc_data);
291 /* Ethernet */
292 at91_add_device_eth(&macb_data);
293 /* I2C */
294 at91_add_device_i2c(NULL, 0);
291 /* LEDs */ 295 /* LEDs */
292 at91_gpio_leds(stamp9g20_leds, ARRAY_SIZE(stamp9g20_leds)); 296 at91_gpio_leds(stamp9g20evb_leds, ARRAY_SIZE(stamp9g20evb_leds));
293} 297}
294 298
295MACHINE_START(PORTUXG20, "taskit PortuxG20") 299MACHINE_START(PORTUXG20, "taskit PortuxG20")
@@ -305,7 +309,7 @@ MACHINE_START(STAMP9G20, "taskit Stamp9G20")
305 /* Maintainer: taskit GmbH */ 309 /* Maintainer: taskit GmbH */
306 .boot_params = AT91_SDRAM_BASE + 0x100, 310 .boot_params = AT91_SDRAM_BASE + 0x100,
307 .timer = &at91sam926x_timer, 311 .timer = &at91sam926x_timer,
308 .map_io = stamp9g20_map_io, 312 .map_io = stamp9g20evb_map_io,
309 .init_irq = init_irq, 313 .init_irq = init_irq,
310 .init_machine = stamp9g20_board_init, 314 .init_machine = stamp9g20evb_board_init,
311MACHINE_END 315MACHINE_END
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index 7525cee3983f..9113da6845f1 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -658,7 +658,7 @@ static void __init at91_upll_usbfs_clock_init(unsigned long main_clock)
658 /* Now set uhpck values */ 658 /* Now set uhpck values */
659 uhpck.parent = &utmi_clk; 659 uhpck.parent = &utmi_clk;
660 uhpck.pmc_mask = AT91SAM926x_PMC_UHP; 660 uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
661 uhpck.rate_hz = utmi_clk.parent->rate_hz; 661 uhpck.rate_hz = utmi_clk.rate_hz;
662 uhpck.rate_hz /= 1 + ((at91_sys_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8); 662 uhpck.rate_hz /= 1 + ((at91_sys_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8);
663} 663}
664 664
diff --git a/arch/arm/mach-at91/include/mach/at91_mci.h b/arch/arm/mach-at91/include/mach/at91_mci.h
index 57f8ee154943..27ac6f550fe3 100644
--- a/arch/arm/mach-at91/include/mach/at91_mci.h
+++ b/arch/arm/mach-at91/include/mach/at91_mci.h
@@ -74,6 +74,8 @@
74#define AT91_MCI_TRTYP_BLOCK (0 << 19) 74#define AT91_MCI_TRTYP_BLOCK (0 << 19)
75#define AT91_MCI_TRTYP_MULTIPLE (1 << 19) 75#define AT91_MCI_TRTYP_MULTIPLE (1 << 19)
76#define AT91_MCI_TRTYP_STREAM (2 << 19) 76#define AT91_MCI_TRTYP_STREAM (2 << 19)
77#define AT91_MCI_TRTYP_SDIO_BYTE (4 << 19)
78#define AT91_MCI_TRTYP_SDIO_BLOCK (5 << 19)
77 79
78#define AT91_MCI_BLKR 0x18 /* Block Register */ 80#define AT91_MCI_BLKR 0x18 /* Block Register */
79#define AT91_MCI_BLKR_BCNT(n) ((0xffff & (n)) << 0) /* Block count */ 81#define AT91_MCI_BLKR_BCNT(n) ((0xffff & (n)) << 0) /* Block count */
diff --git a/arch/arm/mach-at91/include/mach/stamp9g20.h b/arch/arm/mach-at91/include/mach/stamp9g20.h
new file mode 100644
index 000000000000..6120f9c46d59
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/stamp9g20.h
@@ -0,0 +1,7 @@
1#ifndef __MACH_STAMP9G20_H
2#define __MACH_STAMP9G20_H
3
4void stamp9g20_map_io(void);
5void stamp9g20_board_init(void);
6
7#endif
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index 24498a932ba6..a54b3db80366 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -513,4 +513,4 @@ int dma_set_coherent_mask(struct device *dev, u64 mask)
513 513
514EXPORT_SYMBOL(ixp4xx_pci_read); 514EXPORT_SYMBOL(ixp4xx_pci_read);
515EXPORT_SYMBOL(ixp4xx_pci_write); 515EXPORT_SYMBOL(ixp4xx_pci_write);
516 516EXPORT_SYMBOL(dma_set_coherent_mask);
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index daf3993349f8..2e3dd08ccc3f 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -126,7 +126,6 @@ static APBC_CLK(twsi3, MMP2_TWSI3, 0, 26000000);
126static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000); 126static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000);
127static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000); 127static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000);
128static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000); 128static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000);
129static APBC_CLK(rtc, MMP2_RTC, 0, 32768);
130 129
131static APMU_CLK(nand, NAND, 0xbf, 100000000); 130static APMU_CLK(nand, NAND, 0xbf, 100000000);
132 131
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index 86c9b2102952..9db9203667df 100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -216,7 +216,7 @@ static struct omap2_hsmmc_info mmc[] __initdata = {
216 { 216 {
217 .name = "wl1271", 217 .name = "wl1271",
218 .mmc = 3, 218 .mmc = 3,
219 .caps = MMC_CAP_4_BIT_DATA, 219 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
220 .gpio_wp = -EINVAL, 220 .gpio_wp = -EINVAL,
221 .gpio_cd = -EINVAL, 221 .gpio_cd = -EINVAL,
222 .nonremovable = true, 222 .nonremovable = true,
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 40562ddd3ee4..a1939b1e6f82 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -297,7 +297,7 @@ static int __init _omap2_init_reprogram_sdrc(void)
297 return 0; 297 return 0;
298 298
299 dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck"); 299 dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
300 if (!dpll3_m2_ck) 300 if (IS_ERR(dpll3_m2_ck))
301 return -EINVAL; 301 return -EINVAL;
302 302
303 rate = clk_get_rate(dpll3_m2_ck); 303 rate = clk_get_rate(dpll3_m2_ck);
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 5e81517a7af2..a8afb610c7d8 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -161,6 +161,23 @@ void omap2_pm_dump(int mode, int resume, unsigned int us)
161 printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val); 161 printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val);
162} 162}
163 163
164void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds)
165{
166 u32 tick_rate, cycles;
167
168 if (!seconds && !milliseconds)
169 return;
170
171 tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer_wakeup));
172 cycles = tick_rate * seconds + tick_rate * milliseconds / 1000;
173 omap_dm_timer_stop(gptimer_wakeup);
174 omap_dm_timer_set_load_start(gptimer_wakeup, 0, 0xffffffff - cycles);
175
176 pr_info("PM: Resume timer in %u.%03u secs"
177 " (%d ticks at %d ticks/sec.)\n",
178 seconds, milliseconds, cycles, tick_rate);
179}
180
164#ifdef CONFIG_DEBUG_FS 181#ifdef CONFIG_DEBUG_FS
165#include <linux/debugfs.h> 182#include <linux/debugfs.h>
166#include <linux/seq_file.h> 183#include <linux/seq_file.h>
@@ -354,23 +371,6 @@ void pm_dbg_update_time(struct powerdomain *pwrdm, int prev)
354 pwrdm->timer = t; 371 pwrdm->timer = t;
355} 372}
356 373
357void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds)
358{
359 u32 tick_rate, cycles;
360
361 if (!seconds && !milliseconds)
362 return;
363
364 tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer_wakeup));
365 cycles = tick_rate * seconds + tick_rate * milliseconds / 1000;
366 omap_dm_timer_stop(gptimer_wakeup);
367 omap_dm_timer_set_load_start(gptimer_wakeup, 0, 0xffffffff - cycles);
368
369 pr_info("PM: Resume timer in %u.%03u secs"
370 " (%d ticks at %d ticks/sec.)\n",
371 seconds, milliseconds, cycles, tick_rate);
372}
373
374static int clkdm_dbg_show_counter(struct clockdomain *clkdm, void *user) 374static int clkdm_dbg_show_counter(struct clockdomain *clkdm, void *user)
375{ 375{
376 struct seq_file *s = (struct seq_file *)user; 376 struct seq_file *s = (struct seq_file *)user;
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index c85923e56b85..aaeea49b9bdd 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -53,6 +53,19 @@
53#include <plat/powerdomain.h> 53#include <plat/powerdomain.h>
54#include <plat/clockdomain.h> 54#include <plat/clockdomain.h>
55 55
56#ifdef CONFIG_SUSPEND
57static suspend_state_t suspend_state = PM_SUSPEND_ON;
58static inline bool is_suspending(void)
59{
60 return (suspend_state != PM_SUSPEND_ON);
61}
62#else
63static inline bool is_suspending(void)
64{
65 return false;
66}
67#endif
68
56static void (*omap2_sram_idle)(void); 69static void (*omap2_sram_idle)(void);
57static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl, 70static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl,
58 void __iomem *sdrc_power); 71 void __iomem *sdrc_power);
@@ -120,8 +133,9 @@ static void omap2_enter_full_retention(void)
120 goto no_sleep; 133 goto no_sleep;
121 134
122 /* Block console output in case it is on one of the OMAP UARTs */ 135 /* Block console output in case it is on one of the OMAP UARTs */
123 if (try_acquire_console_sem()) 136 if (!is_suspending())
124 goto no_sleep; 137 if (try_acquire_console_sem())
138 goto no_sleep;
125 139
126 omap_uart_prepare_idle(0); 140 omap_uart_prepare_idle(0);
127 omap_uart_prepare_idle(1); 141 omap_uart_prepare_idle(1);
@@ -136,7 +150,8 @@ static void omap2_enter_full_retention(void)
136 omap_uart_resume_idle(1); 150 omap_uart_resume_idle(1);
137 omap_uart_resume_idle(0); 151 omap_uart_resume_idle(0);
138 152
139 release_console_sem(); 153 if (!is_suspending())
154 release_console_sem();
140 155
141no_sleep: 156no_sleep:
142 if (omap2_pm_debug) { 157 if (omap2_pm_debug) {
@@ -284,6 +299,12 @@ out:
284 local_irq_enable(); 299 local_irq_enable();
285} 300}
286 301
302static int omap2_pm_begin(suspend_state_t state)
303{
304 suspend_state = state;
305 return 0;
306}
307
287static int omap2_pm_prepare(void) 308static int omap2_pm_prepare(void)
288{ 309{
289 /* We cannot sleep in idle until we have resumed */ 310 /* We cannot sleep in idle until we have resumed */
@@ -333,10 +354,17 @@ static void omap2_pm_finish(void)
333 enable_hlt(); 354 enable_hlt();
334} 355}
335 356
357static void omap2_pm_end(void)
358{
359 suspend_state = PM_SUSPEND_ON;
360}
361
336static struct platform_suspend_ops omap_pm_ops = { 362static struct platform_suspend_ops omap_pm_ops = {
363 .begin = omap2_pm_begin,
337 .prepare = omap2_pm_prepare, 364 .prepare = omap2_pm_prepare,
338 .enter = omap2_pm_enter, 365 .enter = omap2_pm_enter,
339 .finish = omap2_pm_finish, 366 .finish = omap2_pm_finish,
367 .end = omap2_pm_end,
340 .valid = suspend_valid_only_mem, 368 .valid = suspend_valid_only_mem,
341}; 369};
342 370
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 0ec8a04b7473..648b8c50d024 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -50,6 +50,19 @@
50#include "sdrc.h" 50#include "sdrc.h"
51#include "control.h" 51#include "control.h"
52 52
53#ifdef CONFIG_SUSPEND
54static suspend_state_t suspend_state = PM_SUSPEND_ON;
55static inline bool is_suspending(void)
56{
57 return (suspend_state != PM_SUSPEND_ON);
58}
59#else
60static inline bool is_suspending(void)
61{
62 return false;
63}
64#endif
65
53/* Scratchpad offsets */ 66/* Scratchpad offsets */
54#define OMAP343X_TABLE_ADDRESS_OFFSET 0xc4 67#define OMAP343X_TABLE_ADDRESS_OFFSET 0xc4
55#define OMAP343X_TABLE_VALUE_OFFSET 0xc0 68#define OMAP343X_TABLE_VALUE_OFFSET 0xc0
@@ -387,10 +400,11 @@ void omap_sram_idle(void)
387 } 400 }
388 401
389 /* Block console output in case it is on one of the OMAP UARTs */ 402 /* Block console output in case it is on one of the OMAP UARTs */
390 if (per_next_state < PWRDM_POWER_ON || 403 if (!is_suspending())
391 core_next_state < PWRDM_POWER_ON) 404 if (per_next_state < PWRDM_POWER_ON ||
392 if (try_acquire_console_sem()) 405 core_next_state < PWRDM_POWER_ON)
393 goto console_still_active; 406 if (try_acquire_console_sem())
407 goto console_still_active;
394 408
395 /* PER */ 409 /* PER */
396 if (per_next_state < PWRDM_POWER_ON) { 410 if (per_next_state < PWRDM_POWER_ON) {
@@ -470,7 +484,8 @@ void omap_sram_idle(void)
470 omap_uart_resume_idle(3); 484 omap_uart_resume_idle(3);
471 } 485 }
472 486
473 release_console_sem(); 487 if (!is_suspending())
488 release_console_sem();
474 489
475console_still_active: 490console_still_active:
476 /* Disable IO-PAD and IO-CHAIN wakeup */ 491 /* Disable IO-PAD and IO-CHAIN wakeup */
@@ -514,8 +529,6 @@ out:
514} 529}
515 530
516#ifdef CONFIG_SUSPEND 531#ifdef CONFIG_SUSPEND
517static suspend_state_t suspend_state;
518
519static int omap3_pm_prepare(void) 532static int omap3_pm_prepare(void)
520{ 533{
521 disable_hlt(); 534 disable_hlt();
diff --git a/arch/arm/mach-omap2/prcm-common.h b/arch/arm/mach-omap2/prcm-common.h
index 298a22a754e2..f81acee4738d 100644
--- a/arch/arm/mach-omap2/prcm-common.h
+++ b/arch/arm/mach-omap2/prcm-common.h
@@ -243,13 +243,14 @@
243#define OMAP24XX_EN_GPT1_MASK (1 << 0) 243#define OMAP24XX_EN_GPT1_MASK (1 << 0)
244 244
245/* PM_WKST_WKUP, CM_IDLEST_WKUP shared bits */ 245/* PM_WKST_WKUP, CM_IDLEST_WKUP shared bits */
246#define OMAP24XX_ST_GPIOS_SHIFT (1 << 2) 246#define OMAP24XX_ST_GPIOS_SHIFT 2
247#define OMAP24XX_ST_GPIOS_MASK 2 247#define OMAP24XX_ST_GPIOS_MASK (1 << 2)
248#define OMAP24XX_ST_GPT1_SHIFT (1 << 0) 248#define OMAP24XX_ST_GPT1_SHIFT 0
249#define OMAP24XX_ST_GPT1_MASK 0 249#define OMAP24XX_ST_GPT1_MASK (1 << 0)
250 250
251/* CM_IDLEST_MDM and PM_WKST_MDM shared bits */ 251/* CM_IDLEST_MDM and PM_WKST_MDM shared bits */
252#define OMAP2430_ST_MDM_SHIFT (1 << 0) 252#define OMAP2430_ST_MDM_SHIFT 0
253#define OMAP2430_ST_MDM_MASK (1 << 0)
253 254
254 255
255/* 3430 register bits shared between CM & PRM registers */ 256/* 3430 register bits shared between CM & PRM registers */
diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c
index d2060a1d1d68..e5c9932b7588 100644
--- a/arch/arm/mach-pxa/palmtx.c
+++ b/arch/arm/mach-pxa/palmtx.c
@@ -241,7 +241,8 @@ static inline void palmtx_keys_init(void) {}
241/****************************************************************************** 241/******************************************************************************
242 * NAND Flash 242 * NAND Flash
243 ******************************************************************************/ 243 ******************************************************************************/
244#if defined(CONFIG_MTD_NAND_GPIO) || defined(CONFIG_MTD_NAND_GPIO_MODULE) 244#if defined(CONFIG_MTD_NAND_PLATFORM) || \
245 defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
245static void palmtx_nand_cmd_ctl(struct mtd_info *mtd, int cmd, 246static void palmtx_nand_cmd_ctl(struct mtd_info *mtd, int cmd,
246 unsigned int ctrl) 247 unsigned int ctrl)
247{ 248{
diff --git a/arch/arm/mach-s3c2412/Kconfig b/arch/arm/mach-s3c2412/Kconfig
index cef6a65637bd..6983cb4d4cae 100644
--- a/arch/arm/mach-s3c2412/Kconfig
+++ b/arch/arm/mach-s3c2412/Kconfig
@@ -16,7 +16,7 @@ config CPU_S3C2412
16config CPU_S3C2412_ONLY 16config CPU_S3C2412_ONLY
17 bool 17 bool
18 depends on ARCH_S3C2410 && !CPU_S3C2400 && !CPU_S3C2410 && \ 18 depends on ARCH_S3C2410 && !CPU_S3C2400 && !CPU_S3C2410 && \
19 !CPU_2416 && !CPU_S3C2440 && !CPU_S3C2442 && \ 19 !CPU_S3C2416 && !CPU_S3C2440 && !CPU_S3C2442 && \
20 !CPU_S3C2443 && CPU_S3C2412 20 !CPU_S3C2443 && CPU_S3C2412
21 default y if CPU_S3C2412 21 default y if CPU_S3C2412
22 22
@@ -28,9 +28,16 @@ config S3C2412_DMA
28 28
29config S3C2412_PM 29config S3C2412_PM
30 bool 30 bool
31 select S3C2412_PM_SLEEP
31 help 32 help
32 Internal config node to apply S3C2412 power management 33 Internal config node to apply S3C2412 power management
33 34
35config S3C2412_PM_SLEEP
36 bool
37 help
38 Internal config node to apply sleep for S3C2412 power management.
39 Can be selected by another SoCs with similar sleep procedure.
40
34# Note, the S3C2412 IOtiming support is in plat-s3c24xx 41# Note, the S3C2412 IOtiming support is in plat-s3c24xx
35 42
36config S3C2412_CPUFREQ 43config S3C2412_CPUFREQ
diff --git a/arch/arm/mach-s3c2412/Makefile b/arch/arm/mach-s3c2412/Makefile
index 530ec46cbaea..6c48a91ea39e 100644
--- a/arch/arm/mach-s3c2412/Makefile
+++ b/arch/arm/mach-s3c2412/Makefile
@@ -14,7 +14,8 @@ obj-$(CONFIG_CPU_S3C2412) += irq.o
14obj-$(CONFIG_CPU_S3C2412) += clock.o 14obj-$(CONFIG_CPU_S3C2412) += clock.o
15obj-$(CONFIG_CPU_S3C2412) += gpio.o 15obj-$(CONFIG_CPU_S3C2412) += gpio.o
16obj-$(CONFIG_S3C2412_DMA) += dma.o 16obj-$(CONFIG_S3C2412_DMA) += dma.o
17obj-$(CONFIG_S3C2412_PM) += pm.o sleep.o 17obj-$(CONFIG_S3C2412_PM) += pm.o
18obj-$(CONFIG_S3C2412_PM_SLEEP) += sleep.o
18obj-$(CONFIG_S3C2412_CPUFREQ) += cpu-freq.o 19obj-$(CONFIG_S3C2412_CPUFREQ) += cpu-freq.o
19 20
20# Machine support 21# Machine support
diff --git a/arch/arm/mach-s3c2416/Kconfig b/arch/arm/mach-s3c2416/Kconfig
index 87b9c9f003bd..df8d14974c90 100644
--- a/arch/arm/mach-s3c2416/Kconfig
+++ b/arch/arm/mach-s3c2416/Kconfig
@@ -27,6 +27,7 @@ config S3C2416_DMA
27 27
28config S3C2416_PM 28config S3C2416_PM
29 bool 29 bool
30 select S3C2412_PM_SLEEP
30 help 31 help
31 Internal config node to apply S3C2416 power management 32 Internal config node to apply S3C2416 power management
32 33
@@ -35,9 +36,12 @@ menu "S3C2416 Machines"
35config MACH_SMDK2416 36config MACH_SMDK2416
36 bool "SMDK2416" 37 bool "SMDK2416"
37 select CPU_S3C2416 38 select CPU_S3C2416
39 select MACH_SMDK
38 select S3C_DEV_FB 40 select S3C_DEV_FB
39 select S3C_DEV_HSMMC 41 select S3C_DEV_HSMMC
40 select S3C_DEV_HSMMC1 42 select S3C_DEV_HSMMC1
43 select S3C_DEV_NAND
44 select S3C_DEV_USB_HOST
41 select S3C2416_PM if PM 45 select S3C2416_PM if PM
42 help 46 help
43 Say Y here if you are using an SMDK2416 47 Say Y here if you are using an SMDK2416
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
index ff024a6c0f85..a0cb2581894f 100644
--- a/arch/arm/mach-s3c2440/Kconfig
+++ b/arch/arm/mach-s3c2440/Kconfig
@@ -18,6 +18,7 @@ config CPU_S3C2440
18config CPU_S3C2442 18config CPU_S3C2442
19 bool 19 bool
20 select CPU_ARM920T 20 select CPU_ARM920T
21 select S3C_GPIO_PULL_DOWN
21 select S3C2410_CLOCK 22 select S3C2410_CLOCK
22 select S3C2410_GPIO 23 select S3C2410_GPIO
23 select S3C2410_PM if PM 24 select S3C2410_PM if PM
@@ -178,6 +179,9 @@ config MACH_MINI2440
178 bool "MINI2440 development board" 179 bool "MINI2440 development board"
179 select CPU_S3C2440 180 select CPU_S3C2440
180 select EEPROM_AT24 181 select EEPROM_AT24
182 select NEW_LEDS
183 select LEDS_CLASS
184 select LEDS_TRIGGER
181 select LEDS_TRIGGER_BACKLIGHT 185 select LEDS_TRIGGER_BACKLIGHT
182 select S3C_DEV_NAND 186 select S3C_DEV_NAND
183 select S3C_DEV_USB_HOST 187 select S3C_DEV_USB_HOST
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c
index d50f3ae6173d..f7663f731ea0 100644
--- a/arch/arm/mach-s3c2440/s3c2440.c
+++ b/arch/arm/mach-s3c2440/s3c2440.c
@@ -46,9 +46,6 @@ int __init s3c2440_init(void)
46{ 46{
47 printk("S3C2440: Initialising architecture\n"); 47 printk("S3C2440: Initialising architecture\n");
48 48
49 s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_1up;
50 s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_1up;
51
52 /* change irq for watchdog */ 49 /* change irq for watchdog */
53 50
54 s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT; 51 s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT;
@@ -58,3 +55,11 @@ int __init s3c2440_init(void)
58 55
59 return sysdev_register(&s3c2440_sysdev); 56 return sysdev_register(&s3c2440_sysdev);
60} 57}
58
59void __init s3c2440_map_io(void)
60{
61 s3c244x_map_io();
62
63 s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_1up;
64 s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_1up;
65}
diff --git a/arch/arm/mach-s3c2440/s3c2442.c b/arch/arm/mach-s3c2440/s3c2442.c
index 188ad1e57dc0..ecf813546554 100644
--- a/arch/arm/mach-s3c2440/s3c2442.c
+++ b/arch/arm/mach-s3c2440/s3c2442.c
@@ -32,6 +32,7 @@
32#include <linux/interrupt.h> 32#include <linux/interrupt.h>
33#include <linux/ioport.h> 33#include <linux/ioport.h>
34#include <linux/mutex.h> 34#include <linux/mutex.h>
35#include <linux/gpio.h>
35#include <linux/clk.h> 36#include <linux/clk.h>
36#include <linux/io.h> 37#include <linux/io.h>
37 38
@@ -43,6 +44,11 @@
43 44
44#include <plat/clock.h> 45#include <plat/clock.h>
45#include <plat/cpu.h> 46#include <plat/cpu.h>
47#include <plat/s3c244x.h>
48
49#include <plat/gpio-core.h>
50#include <plat/gpio-cfg.h>
51#include <plat/gpio-cfg-helpers.h>
46 52
47/* S3C2442 extended clock support */ 53/* S3C2442 extended clock support */
48 54
@@ -163,3 +169,11 @@ int __init s3c2442_init(void)
163 169
164 return sysdev_register(&s3c2442_sysdev); 170 return sysdev_register(&s3c2442_sysdev);
165} 171}
172
173void __init s3c2442_map_io(void)
174{
175 s3c244x_map_io();
176
177 s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_1down;
178 s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_1down;
179}
diff --git a/arch/arm/mach-s3c2443/Kconfig b/arch/arm/mach-s3c2443/Kconfig
index 4fef723126fa..31babec90cec 100644
--- a/arch/arm/mach-s3c2443/Kconfig
+++ b/arch/arm/mach-s3c2443/Kconfig
@@ -5,6 +5,7 @@
5config CPU_S3C2443 5config CPU_S3C2443
6 bool 6 bool
7 depends on ARCH_S3C2410 7 depends on ARCH_S3C2410
8 select CPU_ARM920T
8 select S3C2443_DMA if S3C2410_DMA 9 select S3C2443_DMA if S3C2410_DMA
9 select CPU_LLSERIAL_S3C2440 10 select CPU_LLSERIAL_S3C2440
10 select SAMSUNG_CLKSRC 11 select SAMSUNG_CLKSRC
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index 28677caf3613..461aa035afc0 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -378,6 +378,12 @@ static struct max8998_regulator_data aquila_regulators[] = {
378static struct max8998_platform_data aquila_max8998_pdata = { 378static struct max8998_platform_data aquila_max8998_pdata = {
379 .num_regulators = ARRAY_SIZE(aquila_regulators), 379 .num_regulators = ARRAY_SIZE(aquila_regulators),
380 .regulators = aquila_regulators, 380 .regulators = aquila_regulators,
381 .buck1_set1 = S5PV210_GPH0(3),
382 .buck1_set2 = S5PV210_GPH0(4),
383 .buck2_set3 = S5PV210_GPH0(5),
384 .buck1_max_voltage1 = 1200000,
385 .buck1_max_voltage2 = 1200000,
386 .buck2_max_voltage = 1200000,
381}; 387};
382#endif 388#endif
383 389
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index b1dcf964a768..e22d5112fd44 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -518,6 +518,12 @@ static struct max8998_regulator_data goni_regulators[] = {
518static struct max8998_platform_data goni_max8998_pdata = { 518static struct max8998_platform_data goni_max8998_pdata = {
519 .num_regulators = ARRAY_SIZE(goni_regulators), 519 .num_regulators = ARRAY_SIZE(goni_regulators),
520 .regulators = goni_regulators, 520 .regulators = goni_regulators,
521 .buck1_set1 = S5PV210_GPH0(3),
522 .buck1_set2 = S5PV210_GPH0(4),
523 .buck2_set3 = S5PV210_GPH0(5),
524 .buck1_max_voltage1 = 1200000,
525 .buck1_max_voltage2 = 1200000,
526 .buck2_max_voltage = 1200000,
521}; 527};
522#endif 528#endif
523 529
diff --git a/arch/arm/mach-s5pv310/Kconfig b/arch/arm/mach-s5pv310/Kconfig
index 1150b360f38c..e0cef3fd165e 100644
--- a/arch/arm/mach-s5pv310/Kconfig
+++ b/arch/arm/mach-s5pv310/Kconfig
@@ -14,6 +14,11 @@ config CPU_S5PV310
14 help 14 help
15 Enable S5PV310 CPU support 15 Enable S5PV310 CPU support
16 16
17config S5PV310_DEV_PD
18 bool
19 help
20 Compile in platform device definitions for Power Domain
21
17config S5PV310_SETUP_I2C1 22config S5PV310_SETUP_I2C1
18 bool 23 bool
19 help 24 help
@@ -73,6 +78,7 @@ config MACH_SMDKC210
73 select S3C_DEV_HSMMC1 78 select S3C_DEV_HSMMC1
74 select S3C_DEV_HSMMC2 79 select S3C_DEV_HSMMC2
75 select S3C_DEV_HSMMC3 80 select S3C_DEV_HSMMC3
81 select S5PV310_DEV_PD
76 select S5PV310_SETUP_SDHCI 82 select S5PV310_SETUP_SDHCI
77 help 83 help
78 Machine support for Samsung SMDKC210 84 Machine support for Samsung SMDKC210
@@ -82,6 +88,10 @@ config MACH_UNIVERSAL_C210
82 bool "Mobile UNIVERSAL_C210 Board" 88 bool "Mobile UNIVERSAL_C210 Board"
83 select CPU_S5PV310 89 select CPU_S5PV310
84 select S5P_DEV_ONENAND 90 select S5P_DEV_ONENAND
91 select S3C_DEV_HSMMC
92 select S3C_DEV_HSMMC2
93 select S3C_DEV_HSMMC3
94 select S5PV310_SETUP_SDHCI
85 select S3C_DEV_I2C1 95 select S3C_DEV_I2C1
86 select S5PV310_SETUP_I2C1 96 select S5PV310_SETUP_I2C1
87 help 97 help
@@ -101,6 +111,7 @@ config MACH_SMDKV310
101 select S3C_DEV_HSMMC1 111 select S3C_DEV_HSMMC1
102 select S3C_DEV_HSMMC2 112 select S3C_DEV_HSMMC2
103 select S3C_DEV_HSMMC3 113 select S3C_DEV_HSMMC3
114 select S5PV310_DEV_PD
104 select S5PV310_SETUP_SDHCI 115 select S5PV310_SETUP_SDHCI
105 help 116 help
106 Machine support for Samsung SMDKV310 117 Machine support for Samsung SMDKV310
diff --git a/arch/arm/mach-s5pv310/Makefile b/arch/arm/mach-s5pv310/Makefile
index 84afc64e7c01..e310609d6268 100644
--- a/arch/arm/mach-s5pv310/Makefile
+++ b/arch/arm/mach-s5pv310/Makefile
@@ -27,6 +27,9 @@ obj-$(CONFIG_MACH_UNIVERSAL_C210) += mach-universal_c210.o
27 27
28# device support 28# device support
29 29
30obj-y += dev-audio.o
31obj-$(CONFIG_S5PV310_DEV_PD) += dev-pd.o
32
30obj-$(CONFIG_S5PV310_SETUP_I2C1) += setup-i2c1.o 33obj-$(CONFIG_S5PV310_SETUP_I2C1) += setup-i2c1.o
31obj-$(CONFIG_S5PV310_SETUP_I2C2) += setup-i2c2.o 34obj-$(CONFIG_S5PV310_SETUP_I2C2) += setup-i2c2.o
32obj-$(CONFIG_S5PV310_SETUP_I2C3) += setup-i2c3.o 35obj-$(CONFIG_S5PV310_SETUP_I2C3) += setup-i2c3.o
diff --git a/arch/arm/mach-s5pv310/cpu.c b/arch/arm/mach-s5pv310/cpu.c
index 3d0c1cb68d9e..9900464082db 100644
--- a/arch/arm/mach-s5pv310/cpu.c
+++ b/arch/arm/mach-s5pv310/cpu.c
@@ -43,6 +43,11 @@ static struct map_desc s5pv310_iodesc[] __initdata = {
43 .length = SZ_128K, 43 .length = SZ_128K,
44 .type = MT_DEVICE, 44 .type = MT_DEVICE,
45 }, { 45 }, {
46 .virtual = (unsigned long)S5P_VA_PMU,
47 .pfn = __phys_to_pfn(S5PV310_PA_PMU),
48 .length = SZ_64K,
49 .type = MT_DEVICE,
50 }, {
46 .virtual = (unsigned long)S5P_VA_COMBINER_BASE, 51 .virtual = (unsigned long)S5P_VA_COMBINER_BASE,
47 .pfn = __phys_to_pfn(S5PV310_PA_COMBINER), 52 .pfn = __phys_to_pfn(S5PV310_PA_COMBINER),
48 .length = SZ_4K, 53 .length = SZ_4K,
@@ -177,7 +182,7 @@ static int __init s5pv310_l2x0_cache_init(void)
177 __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN, 182 __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN,
178 S5P_VA_L2CC + L2X0_POWER_CTRL); 183 S5P_VA_L2CC + L2X0_POWER_CTRL);
179 184
180 l2x0_init(S5P_VA_L2CC, 0x7C070001, 0xC200ffff); 185 l2x0_init(S5P_VA_L2CC, 0x7C470001, 0xC200ffff);
181 186
182 return 0; 187 return 0;
183} 188}
diff --git a/arch/arm/mach-s5pv310/dev-pd.c b/arch/arm/mach-s5pv310/dev-pd.c
new file mode 100644
index 000000000000..58a50c2d0b67
--- /dev/null
+++ b/arch/arm/mach-s5pv310/dev-pd.c
@@ -0,0 +1,139 @@
1/* linux/arch/arm/mach-s5pv310/dev-pd.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5PV310 - Power Domain support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/io.h>
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
16#include <linux/delay.h>
17
18#include <mach/regs-pmu.h>
19
20#include <plat/pd.h>
21
22static int s5pv310_pd_enable(struct device *dev)
23{
24 struct samsung_pd_info *pdata = dev->platform_data;
25 u32 timeout;
26
27 __raw_writel(S5P_INT_LOCAL_PWR_EN, pdata->base);
28
29 /* Wait max 1ms */
30 timeout = 10;
31 while ((__raw_readl(pdata->base + 0x4) & S5P_INT_LOCAL_PWR_EN)
32 != S5P_INT_LOCAL_PWR_EN) {
33 if (timeout == 0) {
34 printk(KERN_ERR "Power domain %s enable failed.\n",
35 dev_name(dev));
36 return -ETIMEDOUT;
37 }
38 timeout--;
39 udelay(100);
40 }
41
42 return 0;
43}
44
45static int s5pv310_pd_disable(struct device *dev)
46{
47 struct samsung_pd_info *pdata = dev->platform_data;
48 u32 timeout;
49
50 __raw_writel(0, pdata->base);
51
52 /* Wait max 1ms */
53 timeout = 10;
54 while (__raw_readl(pdata->base + 0x4) & S5P_INT_LOCAL_PWR_EN) {
55 if (timeout == 0) {
56 printk(KERN_ERR "Power domain %s disable failed.\n",
57 dev_name(dev));
58 return -ETIMEDOUT;
59 }
60 timeout--;
61 udelay(100);
62 }
63
64 return 0;
65}
66
67struct platform_device s5pv310_device_pd[] = {
68 {
69 .name = "samsung-pd",
70 .id = 0,
71 .dev = {
72 .platform_data = &(struct samsung_pd_info) {
73 .enable = s5pv310_pd_enable,
74 .disable = s5pv310_pd_disable,
75 .base = S5P_PMU_MFC_CONF,
76 },
77 },
78 }, {
79 .name = "samsung-pd",
80 .id = 1,
81 .dev = {
82 .platform_data = &(struct samsung_pd_info) {
83 .enable = s5pv310_pd_enable,
84 .disable = s5pv310_pd_disable,
85 .base = S5P_PMU_G3D_CONF,
86 },
87 },
88 }, {
89 .name = "samsung-pd",
90 .id = 2,
91 .dev = {
92 .platform_data = &(struct samsung_pd_info) {
93 .enable = s5pv310_pd_enable,
94 .disable = s5pv310_pd_disable,
95 .base = S5P_PMU_LCD0_CONF,
96 },
97 },
98 }, {
99 .name = "samsung-pd",
100 .id = 3,
101 .dev = {
102 .platform_data = &(struct samsung_pd_info) {
103 .enable = s5pv310_pd_enable,
104 .disable = s5pv310_pd_disable,
105 .base = S5P_PMU_LCD1_CONF,
106 },
107 },
108 }, {
109 .name = "samsung-pd",
110 .id = 4,
111 .dev = {
112 .platform_data = &(struct samsung_pd_info) {
113 .enable = s5pv310_pd_enable,
114 .disable = s5pv310_pd_disable,
115 .base = S5P_PMU_TV_CONF,
116 },
117 },
118 }, {
119 .name = "samsung-pd",
120 .id = 5,
121 .dev = {
122 .platform_data = &(struct samsung_pd_info) {
123 .enable = s5pv310_pd_enable,
124 .disable = s5pv310_pd_disable,
125 .base = S5P_PMU_CAM_CONF,
126 },
127 },
128 }, {
129 .name = "samsung-pd",
130 .id = 6,
131 .dev = {
132 .platform_data = &(struct samsung_pd_info) {
133 .enable = s5pv310_pd_enable,
134 .disable = s5pv310_pd_disable,
135 .base = S5P_PMU_GPS_CONF,
136 },
137 },
138 },
139};
diff --git a/arch/arm/mach-s5pv310/include/mach/map.h b/arch/arm/mach-s5pv310/include/mach/map.h
index 7acf4e77e92e..a16d0c9c27bc 100644
--- a/arch/arm/mach-s5pv310/include/mach/map.h
+++ b/arch/arm/mach-s5pv310/include/mach/map.h
@@ -39,6 +39,8 @@
39#define S5PV310_PA_SYSCON (0x10010000) 39#define S5PV310_PA_SYSCON (0x10010000)
40#define S5P_PA_SYSCON S5PV310_PA_SYSCON 40#define S5P_PA_SYSCON S5PV310_PA_SYSCON
41 41
42#define S5PV310_PA_PMU (0x10020000)
43
42#define S5PV310_PA_CMU (0x10030000) 44#define S5PV310_PA_CMU (0x10030000)
43 45
44#define S5PV310_PA_WATCHDOG (0x10060000) 46#define S5PV310_PA_WATCHDOG (0x10060000)
diff --git a/arch/arm/mach-s5pv310/include/mach/regs-pmu.h b/arch/arm/mach-s5pv310/include/mach/regs-pmu.h
new file mode 100644
index 000000000000..fb333d0f6073
--- /dev/null
+++ b/arch/arm/mach-s5pv310/include/mach/regs-pmu.h
@@ -0,0 +1,30 @@
1/* linux/arch/arm/mach-s5pv310/include/mach/regs-pmu.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5PV310 - Power management unit definition
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_REGS_PMU_H
14#define __ASM_ARCH_REGS_PMU_H __FILE__
15
16#include <mach/map.h>
17
18#define S5P_PMUREG(x) (S5P_VA_PMU + (x))
19
20#define S5P_PMU_CAM_CONF S5P_PMUREG(0x3C00)
21#define S5P_PMU_TV_CONF S5P_PMUREG(0x3C20)
22#define S5P_PMU_MFC_CONF S5P_PMUREG(0x3C40)
23#define S5P_PMU_G3D_CONF S5P_PMUREG(0x3C60)
24#define S5P_PMU_LCD0_CONF S5P_PMUREG(0x3C80)
25#define S5P_PMU_LCD1_CONF S5P_PMUREG(0x3CA0)
26#define S5P_PMU_GPS_CONF S5P_PMUREG(0x3CE0)
27
28#define S5P_INT_LOCAL_PWR_EN 0x7
29
30#endif /* __ASM_ARCH_REGS_PMU_H */
diff --git a/arch/arm/mach-s5pv310/mach-smdkc210.c b/arch/arm/mach-s5pv310/mach-smdkc210.c
index 2b8d4fc52d7c..f65e668ceae9 100644
--- a/arch/arm/mach-s5pv310/mach-smdkc210.c
+++ b/arch/arm/mach-s5pv310/mach-smdkc210.c
@@ -23,6 +23,7 @@
23#include <plat/cpu.h> 23#include <plat/cpu.h>
24#include <plat/devs.h> 24#include <plat/devs.h>
25#include <plat/sdhci.h> 25#include <plat/sdhci.h>
26#include <plat/pd.h>
26 27
27#include <mach/map.h> 28#include <mach/map.h>
28#include <mach/regs-srom.h> 29#include <mach/regs-srom.h>
@@ -147,6 +148,13 @@ static struct platform_device *smdkc210_devices[] __initdata = {
147 &s3c_device_rtc, 148 &s3c_device_rtc,
148 &s3c_device_wdt, 149 &s3c_device_wdt,
149 &smdkc210_smsc911x, 150 &smdkc210_smsc911x,
151 &s5pv310_device_pd[PD_MFC],
152 &s5pv310_device_pd[PD_G3D],
153 &s5pv310_device_pd[PD_LCD0],
154 &s5pv310_device_pd[PD_LCD1],
155 &s5pv310_device_pd[PD_CAM],
156 &s5pv310_device_pd[PD_TV],
157 &s5pv310_device_pd[PD_GPS],
150}; 158};
151 159
152static void __init smdkc210_smsc911x_init(void) 160static void __init smdkc210_smsc911x_init(void)
diff --git a/arch/arm/mach-s5pv310/mach-smdkv310.c b/arch/arm/mach-s5pv310/mach-smdkv310.c
index 35826d66632c..19aa3e3c011d 100644
--- a/arch/arm/mach-s5pv310/mach-smdkv310.c
+++ b/arch/arm/mach-s5pv310/mach-smdkv310.c
@@ -23,6 +23,7 @@
23#include <plat/cpu.h> 23#include <plat/cpu.h>
24#include <plat/devs.h> 24#include <plat/devs.h>
25#include <plat/sdhci.h> 25#include <plat/sdhci.h>
26#include <plat/pd.h>
26 27
27#include <mach/map.h> 28#include <mach/map.h>
28#include <mach/regs-srom.h> 29#include <mach/regs-srom.h>
@@ -147,6 +148,13 @@ static struct platform_device *smdkv310_devices[] __initdata = {
147 &s3c_device_rtc, 148 &s3c_device_rtc,
148 &s3c_device_wdt, 149 &s3c_device_wdt,
149 &smdkv310_smsc911x, 150 &smdkv310_smsc911x,
151 &s5pv310_device_pd[PD_MFC],
152 &s5pv310_device_pd[PD_G3D],
153 &s5pv310_device_pd[PD_LCD0],
154 &s5pv310_device_pd[PD_LCD1],
155 &s5pv310_device_pd[PD_CAM],
156 &s5pv310_device_pd[PD_TV],
157 &s5pv310_device_pd[PD_GPS],
150}; 158};
151 159
152static void __init smdkv310_smsc911x_init(void) 160static void __init smdkv310_smsc911x_init(void)
diff --git a/arch/arm/mach-s5pv310/mach-universal_c210.c b/arch/arm/mach-s5pv310/mach-universal_c210.c
index 16d8fc00cafd..36bc3cf825e3 100644
--- a/arch/arm/mach-s5pv310/mach-universal_c210.c
+++ b/arch/arm/mach-s5pv310/mach-universal_c210.c
@@ -13,6 +13,9 @@
13#include <linux/i2c.h> 13#include <linux/i2c.h>
14#include <linux/gpio_keys.h> 14#include <linux/gpio_keys.h>
15#include <linux/gpio.h> 15#include <linux/gpio.h>
16#include <linux/regulator/machine.h>
17#include <linux/regulator/fixed.h>
18#include <linux/mmc/host.h>
16 19
17#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
18#include <asm/mach-types.h> 21#include <asm/mach-types.h>
@@ -21,6 +24,7 @@
21#include <plat/s5pv310.h> 24#include <plat/s5pv310.h>
22#include <plat/cpu.h> 25#include <plat/cpu.h>
23#include <plat/devs.h> 26#include <plat/devs.h>
27#include <plat/sdhci.h>
24 28
25#include <mach/map.h> 29#include <mach/map.h>
26 30
@@ -116,6 +120,73 @@ static struct platform_device universal_gpio_keys = {
116 }, 120 },
117}; 121};
118 122
123/* eMMC */
124static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
125 .max_width = 8,
126 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
127 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
128 MMC_CAP_DISABLE),
129 .cd_type = S3C_SDHCI_CD_PERMANENT,
130 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
131};
132
133static struct regulator_consumer_supply mmc0_supplies[] = {
134 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
135};
136
137static struct regulator_init_data mmc0_fixed_voltage_init_data = {
138 .constraints = {
139 .name = "VMEM_VDD_2.8V",
140 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
141 },
142 .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies),
143 .consumer_supplies = mmc0_supplies,
144};
145
146static struct fixed_voltage_config mmc0_fixed_voltage_config = {
147 .supply_name = "MASSMEMORY_EN",
148 .microvolts = 2800000,
149 .gpio = S5PV310_GPE1(3),
150 .enable_high = true,
151 .init_data = &mmc0_fixed_voltage_init_data,
152};
153
154static struct platform_device mmc0_fixed_voltage = {
155 .name = "reg-fixed-voltage",
156 .id = 0,
157 .dev = {
158 .platform_data = &mmc0_fixed_voltage_config,
159 },
160};
161
162/* SD */
163static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
164 .max_width = 4,
165 .host_caps = MMC_CAP_4_BIT_DATA |
166 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
167 MMC_CAP_DISABLE,
168 .ext_cd_gpio = S5PV310_GPX3(4), /* XEINT_28 */
169 .ext_cd_gpio_invert = 1,
170 .cd_type = S3C_SDHCI_CD_GPIO,
171 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
172};
173
174/* WiFi */
175static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
176 .max_width = 4,
177 .host_caps = MMC_CAP_4_BIT_DATA |
178 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
179 MMC_CAP_DISABLE,
180 .cd_type = S3C_SDHCI_CD_EXTERNAL,
181};
182
183static void __init universal_sdhci_init(void)
184{
185 s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
186 s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
187 s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
188}
189
119/* I2C0 */ 190/* I2C0 */
120static struct i2c_board_info i2c0_devs[] __initdata = { 191static struct i2c_board_info i2c0_devs[] __initdata = {
121 /* Camera, To be updated */ 192 /* Camera, To be updated */
@@ -127,6 +198,13 @@ static struct i2c_board_info i2c1_devs[] __initdata = {
127}; 198};
128 199
129static struct platform_device *universal_devices[] __initdata = { 200static struct platform_device *universal_devices[] __initdata = {
201 /* Samsung Platform Devices */
202 &mmc0_fixed_voltage,
203 &s3c_device_hsmmc0,
204 &s3c_device_hsmmc2,
205 &s3c_device_hsmmc3,
206
207 /* Universal Devices */
130 &universal_gpio_keys, 208 &universal_gpio_keys,
131 &s5p_device_onenand, 209 &s5p_device_onenand,
132}; 210};
@@ -140,6 +218,8 @@ static void __init universal_map_io(void)
140 218
141static void __init universal_machine_init(void) 219static void __init universal_machine_init(void)
142{ 220{
221 universal_sdhci_init();
222
143 i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs)); 223 i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs));
144 i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs)); 224 i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
145 225
diff --git a/arch/arm/mach-shmobile/include/mach/entry-macro.S b/arch/arm/mach-shmobile/include/mach/entry-macro.S
index a285d13c7416..f428c4db2b60 100644
--- a/arch/arm/mach-shmobile/include/mach/entry-macro.S
+++ b/arch/arm/mach-shmobile/include/mach/entry-macro.S
@@ -1,4 +1,5 @@
1/* 1/*
2 * Copyright (C) 2010 Magnus Damm
2 * Copyright (C) 2008 Renesas Solutions Corp. 3 * Copyright (C) 2008 Renesas Solutions Corp.
3 * 4 *
4 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
@@ -14,24 +15,45 @@
14 * along with this program; if not, write to the Free Software 15 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 16 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
16 */ 17 */
17#include <mach/hardware.h>
18#include <mach/irqs.h> 18#include <mach/irqs.h>
19 19
20#define INTCA_BASE 0xe6980000
21#define INTFLGA_OFFS 0x00000018 /* accept pending interrupt */
22#define INTEVTA_OFFS 0x00000020 /* vector number of accepted interrupt */
23#define INTLVLA_OFFS 0x00000030 /* priority level of accepted interrupt */
24#define INTLVLB_OFFS 0x00000034 /* previous priority level */
25
20 .macro disable_fiq 26 .macro disable_fiq
21 .endm 27 .endm
22 28
23 .macro get_irqnr_preamble, base, tmp 29 .macro get_irqnr_preamble, base, tmp
24 ldr \base, =INTFLGA 30 ldr \base, =INTCA_BASE
25 .endm 31 .endm
26 32
27 .macro arch_ret_to_user, tmp1, tmp2 33 .macro arch_ret_to_user, tmp1, tmp2
28 .endm 34 .endm
29 35
30 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 36 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
31 ldr \irqnr, [\base] 37 /* The single INTFLGA read access below results in the following:
38 *
39 * 1. INTLVLB is updated with old priority value from INTLVLA
40 * 2. Highest priority interrupt is accepted
41 * 3. INTLVLA is updated to contain priority of accepted interrupt
42 * 4. Accepted interrupt vector is stored in INTFLGA and INTEVTA
43 */
44 ldr \irqnr, [\base, #INTFLGA_OFFS]
45
46 /* Restore INTLVLA with the value saved in INTLVLB.
47 * This is required to support interrupt priorities properly.
48 */
49 ldrb \tmp, [\base, #INTLVLB_OFFS]
50 strb \tmp, [\base, #INTLVLA_OFFS]
51
52 /* Handle invalid vector number case */
32 cmp \irqnr, #0 53 cmp \irqnr, #0
33 beq 1000f 54 beq 1000f
34 /* intevt to irq number */ 55
56 /* Convert vector to irq number, same as the evt2irq() macro */
35 lsr \irqnr, \irqnr, #0x5 57 lsr \irqnr, \irqnr, #0x5
36 subs \irqnr, \irqnr, #16 58 subs \irqnr, \irqnr, #16
37 59
diff --git a/arch/arm/mach-shmobile/include/mach/vmalloc.h b/arch/arm/mach-shmobile/include/mach/vmalloc.h
index 4aecf6e3a859..2b8fd8b942fe 100644
--- a/arch/arm/mach-shmobile/include/mach/vmalloc.h
+++ b/arch/arm/mach-shmobile/include/mach/vmalloc.h
@@ -2,6 +2,6 @@
2#define __ASM_MACH_VMALLOC_H 2#define __ASM_MACH_VMALLOC_H
3 3
4/* Vmalloc at ... - 0xe5ffffff */ 4/* Vmalloc at ... - 0xe5ffffff */
5#define VMALLOC_END 0xe6000000 5#define VMALLOC_END 0xe6000000UL
6 6
7#endif /* __ASM_MACH_VMALLOC_H */ 7#endif /* __ASM_MACH_VMALLOC_H */
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S
index 99fa688dfadd..c96fa1b3f49f 100644
--- a/arch/arm/mm/cache-v6.S
+++ b/arch/arm/mm/cache-v6.S
@@ -203,6 +203,10 @@ ENTRY(v6_flush_kern_dcache_area)
203 * - end - virtual end address of region 203 * - end - virtual end address of region
204 */ 204 */
205v6_dma_inv_range: 205v6_dma_inv_range:
206#ifdef CONFIG_DMA_CACHE_RWFO
207 ldrb r2, [r0] @ read for ownership
208 strb r2, [r0] @ write for ownership
209#endif
206 tst r0, #D_CACHE_LINE_SIZE - 1 210 tst r0, #D_CACHE_LINE_SIZE - 1
207 bic r0, r0, #D_CACHE_LINE_SIZE - 1 211 bic r0, r0, #D_CACHE_LINE_SIZE - 1
208#ifdef HARVARD_CACHE 212#ifdef HARVARD_CACHE
@@ -211,6 +215,10 @@ v6_dma_inv_range:
211 mcrne p15, 0, r0, c7, c11, 1 @ clean unified line 215 mcrne p15, 0, r0, c7, c11, 1 @ clean unified line
212#endif 216#endif
213 tst r1, #D_CACHE_LINE_SIZE - 1 217 tst r1, #D_CACHE_LINE_SIZE - 1
218#ifdef CONFIG_DMA_CACHE_RWFO
219 ldrneb r2, [r1, #-1] @ read for ownership
220 strneb r2, [r1, #-1] @ write for ownership
221#endif
214 bic r1, r1, #D_CACHE_LINE_SIZE - 1 222 bic r1, r1, #D_CACHE_LINE_SIZE - 1
215#ifdef HARVARD_CACHE 223#ifdef HARVARD_CACHE
216 mcrne p15, 0, r1, c7, c14, 1 @ clean & invalidate D line 224 mcrne p15, 0, r1, c7, c14, 1 @ clean & invalidate D line
@@ -218,10 +226,6 @@ v6_dma_inv_range:
218 mcrne p15, 0, r1, c7, c15, 1 @ clean & invalidate unified line 226 mcrne p15, 0, r1, c7, c15, 1 @ clean & invalidate unified line
219#endif 227#endif
2201: 2281:
221#ifdef CONFIG_DMA_CACHE_RWFO
222 ldr r2, [r0] @ read for ownership
223 str r2, [r0] @ write for ownership
224#endif
225#ifdef HARVARD_CACHE 229#ifdef HARVARD_CACHE
226 mcr p15, 0, r0, c7, c6, 1 @ invalidate D line 230 mcr p15, 0, r0, c7, c6, 1 @ invalidate D line
227#else 231#else
@@ -229,6 +233,10 @@ v6_dma_inv_range:
229#endif 233#endif
230 add r0, r0, #D_CACHE_LINE_SIZE 234 add r0, r0, #D_CACHE_LINE_SIZE
231 cmp r0, r1 235 cmp r0, r1
236#ifdef CONFIG_DMA_CACHE_RWFO
237 ldrlo r2, [r0] @ read for ownership
238 strlo r2, [r0] @ write for ownership
239#endif
232 blo 1b 240 blo 1b
233 mov r0, #0 241 mov r0, #0
234 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer 242 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
@@ -263,12 +271,12 @@ v6_dma_clean_range:
263 * - end - virtual end address of region 271 * - end - virtual end address of region
264 */ 272 */
265ENTRY(v6_dma_flush_range) 273ENTRY(v6_dma_flush_range)
266 bic r0, r0, #D_CACHE_LINE_SIZE - 1
2671:
268#ifdef CONFIG_DMA_CACHE_RWFO 274#ifdef CONFIG_DMA_CACHE_RWFO
269 ldr r2, [r0] @ read for ownership 275 ldrb r2, [r0] @ read for ownership
270 str r2, [r0] @ write for ownership 276 strb r2, [r0] @ write for ownership
271#endif 277#endif
278 bic r0, r0, #D_CACHE_LINE_SIZE - 1
2791:
272#ifdef HARVARD_CACHE 280#ifdef HARVARD_CACHE
273 mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line 281 mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line
274#else 282#else
@@ -276,6 +284,10 @@ ENTRY(v6_dma_flush_range)
276#endif 284#endif
277 add r0, r0, #D_CACHE_LINE_SIZE 285 add r0, r0, #D_CACHE_LINE_SIZE
278 cmp r0, r1 286 cmp r0, r1
287#ifdef CONFIG_DMA_CACHE_RWFO
288 ldrlob r2, [r0] @ read for ownership
289 strlob r2, [r0] @ write for ownership
290#endif
279 blo 1b 291 blo 1b
280 mov r0, #0 292 mov r0, #0
281 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer 293 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index a3ebf7a4f49b..6136e68ce953 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -173,15 +173,22 @@ ENTRY(v7_coherent_user_range)
173 UNWIND(.fnstart ) 173 UNWIND(.fnstart )
174 dcache_line_size r2, r3 174 dcache_line_size r2, r3
175 sub r3, r2, #1 175 sub r3, r2, #1
176 bic r0, r0, r3 176 bic r12, r0, r3
1771: 1771:
178 USER( mcr p15, 0, r0, c7, c11, 1 ) @ clean D line to the point of unification 178 USER( mcr p15, 0, r12, c7, c11, 1 ) @ clean D line to the point of unification
179 add r12, r12, r2
180 cmp r12, r1
181 blo 1b
179 dsb 182 dsb
180 USER( mcr p15, 0, r0, c7, c5, 1 ) @ invalidate I line 183 icache_line_size r2, r3
181 add r0, r0, r2 184 sub r3, r2, #1
185 bic r12, r0, r3
1822: 1862:
183 cmp r0, r1 187 USER( mcr p15, 0, r12, c7, c5, 1 ) @ invalidate I line
184 blo 1b 188 add r12, r12, r2
189 cmp r12, r1
190 blo 2b
1913:
185 mov r0, #0 192 mov r0, #0
186 ALT_SMP(mcr p15, 0, r0, c7, c1, 6) @ invalidate BTB Inner Shareable 193 ALT_SMP(mcr p15, 0, r0, c7, c1, 6) @ invalidate BTB Inner Shareable
187 ALT_UP(mcr p15, 0, r0, c7, c5, 6) @ invalidate BTB 194 ALT_UP(mcr p15, 0, r0, c7, c5, 6) @ invalidate BTB
@@ -194,10 +201,10 @@ ENTRY(v7_coherent_user_range)
194 * isn't mapped, just try the next page. 201 * isn't mapped, just try the next page.
195 */ 202 */
1969001: 2039001:
197 mov r0, r0, lsr #12 204 mov r12, r12, lsr #12
198 mov r0, r0, lsl #12 205 mov r12, r12, lsl #12
199 add r0, r0, #4096 206 add r12, r12, #4096
200 b 2b 207 b 3b
201 UNWIND(.fnend ) 208 UNWIND(.fnend )
202ENDPROC(v7_coherent_kern_range) 209ENDPROC(v7_coherent_kern_range)
203ENDPROC(v7_coherent_user_range) 210ENDPROC(v7_coherent_user_range)
diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S
index 7d63beaf9745..b795afd0a2c6 100644
--- a/arch/arm/mm/proc-macros.S
+++ b/arch/arm/mm/proc-macros.S
@@ -61,17 +61,27 @@
61 .endm 61 .endm
62 62
63/* 63/*
64 * cache_line_size - get the cache line size from the CSIDR register 64 * dcache_line_size - get the minimum D-cache line size from the CTR register
65 * (available on ARMv7+). It assumes that the CSSR register was configured 65 * on ARMv7.
66 * to access the L1 data cache CSIDR.
67 */ 66 */
68 .macro dcache_line_size, reg, tmp 67 .macro dcache_line_size, reg, tmp
69 mrc p15, 1, \tmp, c0, c0, 0 @ read CSIDR 68 mrc p15, 0, \tmp, c0, c0, 1 @ read ctr
70 and \tmp, \tmp, #7 @ cache line size encoding 69 lsr \tmp, \tmp, #16
71 mov \reg, #16 @ size offset 70 and \tmp, \tmp, #0xf @ cache line size encoding
71 mov \reg, #4 @ bytes per word
72 mov \reg, \reg, lsl \tmp @ actual cache line size 72 mov \reg, \reg, lsl \tmp @ actual cache line size
73 .endm 73 .endm
74 74
75/*
76 * icache_line_size - get the minimum I-cache line size from the CTR register
77 * on ARMv7.
78 */
79 .macro icache_line_size, reg, tmp
80 mrc p15, 0, \tmp, c0, c0, 1 @ read ctr
81 and \tmp, \tmp, #0xf @ cache line size encoding
82 mov \reg, #4 @ bytes per word
83 mov \reg, \reg, lsl \tmp @ actual cache line size
84 .endm
75 85
76/* 86/*
77 * Sanity check the PTE configuration for the code below - which makes 87 * Sanity check the PTE configuration for the code below - which makes
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index 155fe43a672b..8722a136f3a5 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -16,6 +16,7 @@
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/err.h>
19 20
20#include <plat/common.h> 21#include <plat/common.h>
21#include <plat/board.h> 22#include <plat/board.h>
@@ -164,7 +165,7 @@ static int __init omap_init_clocksource_32k(void)
164 return -ENODEV; 165 return -ENODEV;
165 166
166 sync_32k_ick = clk_get(NULL, "omap_32ksync_ick"); 167 sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
167 if (sync_32k_ick) 168 if (!IS_ERR(sync_32k_ick))
168 clk_enable(sync_32k_ick); 169 clk_enable(sync_32k_ick);
169 170
170 clocksource_32k.mult = clocksource_hz2mult(32768, 171 clocksource_32k.mult = clocksource_hz2mult(32768,
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index e2c8eebe6b3a..74dac419d328 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -166,7 +166,7 @@ static void __init omap_detect_sram(void)
166 cpu_is_omap1710()) 166 cpu_is_omap1710())
167 omap_sram_size = 0x4000; /* 16K */ 167 omap_sram_size = 0x4000; /* 16K */
168 else if (cpu_is_omap1611()) 168 else if (cpu_is_omap1611())
169 omap_sram_size = 0x3e800; /* 250K */ 169 omap_sram_size = SZ_256K;
170 else { 170 else {
171 printk(KERN_ERR "Could not detect SRAM size\n"); 171 printk(KERN_ERR "Could not detect SRAM size\n");
172 omap_sram_size = 0x4000; 172 omap_sram_size = 0x4000;
diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig
index 5a27b1b538f2..eb105e61c746 100644
--- a/arch/arm/plat-s3c24xx/Kconfig
+++ b/arch/arm/plat-s3c24xx/Kconfig
@@ -8,7 +8,7 @@ config PLAT_S3C24XX
8 default y 8 default y
9 select NO_IOPORT 9 select NO_IOPORT
10 select ARCH_REQUIRE_GPIOLIB 10 select ARCH_REQUIRE_GPIOLIB
11 select S3C_DEVICE_NAND 11 select S3C_DEV_NAND
12 select S3C_GPIO_CFG_S3C24XX 12 select S3C_GPIO_CFG_S3C24XX
13 help 13 help
14 Base platform code for any Samsung S3C24XX device 14 Base platform code for any Samsung S3C24XX device
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c
index 76d0858c3cbb..4a10c0f684b2 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/plat-s3c24xx/cpu.c
@@ -88,7 +88,7 @@ static struct cpu_table cpu_ids[] __initdata = {
88 { 88 {
89 .idcode = 0x32440000, 89 .idcode = 0x32440000,
90 .idmask = 0xffffffff, 90 .idmask = 0xffffffff,
91 .map_io = s3c244x_map_io, 91 .map_io = s3c2440_map_io,
92 .init_clocks = s3c244x_init_clocks, 92 .init_clocks = s3c244x_init_clocks,
93 .init_uarts = s3c244x_init_uarts, 93 .init_uarts = s3c244x_init_uarts,
94 .init = s3c2440_init, 94 .init = s3c2440_init,
@@ -97,7 +97,7 @@ static struct cpu_table cpu_ids[] __initdata = {
97 { 97 {
98 .idcode = 0x32440001, 98 .idcode = 0x32440001,
99 .idmask = 0xffffffff, 99 .idmask = 0xffffffff,
100 .map_io = s3c244x_map_io, 100 .map_io = s3c2440_map_io,
101 .init_clocks = s3c244x_init_clocks, 101 .init_clocks = s3c244x_init_clocks,
102 .init_uarts = s3c244x_init_uarts, 102 .init_uarts = s3c244x_init_uarts,
103 .init = s3c2440_init, 103 .init = s3c2440_init,
@@ -106,7 +106,7 @@ static struct cpu_table cpu_ids[] __initdata = {
106 { 106 {
107 .idcode = 0x32440aaa, 107 .idcode = 0x32440aaa,
108 .idmask = 0xffffffff, 108 .idmask = 0xffffffff,
109 .map_io = s3c244x_map_io, 109 .map_io = s3c2442_map_io,
110 .init_clocks = s3c244x_init_clocks, 110 .init_clocks = s3c244x_init_clocks,
111 .init_uarts = s3c244x_init_uarts, 111 .init_uarts = s3c244x_init_uarts,
112 .init = s3c2442_init, 112 .init = s3c2442_init,
@@ -115,7 +115,7 @@ static struct cpu_table cpu_ids[] __initdata = {
115 { 115 {
116 .idcode = 0x32440aab, 116 .idcode = 0x32440aab,
117 .idmask = 0xffffffff, 117 .idmask = 0xffffffff,
118 .map_io = s3c244x_map_io, 118 .map_io = s3c2442_map_io,
119 .init_clocks = s3c244x_init_clocks, 119 .init_clocks = s3c244x_init_clocks,
120 .init_uarts = s3c244x_init_uarts, 120 .init_uarts = s3c244x_init_uarts,
121 .init = s3c2442_init, 121 .init = s3c2442_init,
diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c
index 24c6f5a30596..243b6411050d 100644
--- a/arch/arm/plat-s3c24xx/gpiolib.c
+++ b/arch/arm/plat-s3c24xx/gpiolib.c
@@ -82,8 +82,6 @@ static struct s3c_gpio_cfg s3c24xx_gpiocfg_banka = {
82struct s3c_gpio_cfg s3c24xx_gpiocfg_default = { 82struct s3c_gpio_cfg s3c24xx_gpiocfg_default = {
83 .set_config = s3c_gpio_setcfg_s3c24xx, 83 .set_config = s3c_gpio_setcfg_s3c24xx,
84 .get_config = s3c_gpio_getcfg_s3c24xx, 84 .get_config = s3c_gpio_getcfg_s3c24xx,
85 .set_pull = s3c_gpio_setpull_1up,
86 .get_pull = s3c_gpio_getpull_1up,
87}; 85};
88 86
89struct s3c_gpio_chip s3c24xx_gpios[] = { 87struct s3c_gpio_chip s3c24xx_gpios[] = {
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c244x.h b/arch/arm/plat-s3c24xx/include/plat/s3c244x.h
index 307248d1ccbb..89e8d0a25f87 100644
--- a/arch/arm/plat-s3c24xx/include/plat/s3c244x.h
+++ b/arch/arm/plat-s3c24xx/include/plat/s3c244x.h
@@ -21,17 +21,22 @@ extern void s3c244x_init_clocks(int xtal);
21#else 21#else
22#define s3c244x_init_clocks NULL 22#define s3c244x_init_clocks NULL
23#define s3c244x_init_uarts NULL 23#define s3c244x_init_uarts NULL
24#define s3c244x_map_io NULL
25#endif 24#endif
26 25
27#ifdef CONFIG_CPU_S3C2440 26#ifdef CONFIG_CPU_S3C2440
28extern int s3c2440_init(void); 27extern int s3c2440_init(void);
28
29extern void s3c2440_map_io(void);
29#else 30#else
30#define s3c2440_init NULL 31#define s3c2440_init NULL
32#define s3c2440_map_io NULL
31#endif 33#endif
32 34
33#ifdef CONFIG_CPU_S3C2442 35#ifdef CONFIG_CPU_S3C2442
34extern int s3c2442_init(void); 36extern int s3c2442_init(void);
37
38extern void s3c2442_map_io(void);
35#else 39#else
36#define s3c2442_init NULL 40#define s3c2442_init NULL
41#define s3c2442_map_io NULL
37#endif 42#endif
diff --git a/arch/arm/plat-s5p/include/plat/map-s5p.h b/arch/arm/plat-s5p/include/plat/map-s5p.h
index fef353d44513..d973d39666a3 100644
--- a/arch/arm/plat-s5p/include/plat/map-s5p.h
+++ b/arch/arm/plat-s5p/include/plat/map-s5p.h
@@ -15,6 +15,7 @@
15 15
16#define S5P_VA_CHIPID S3C_ADDR(0x02000000) 16#define S5P_VA_CHIPID S3C_ADDR(0x02000000)
17#define S5P_VA_CMU S3C_ADDR(0x02100000) 17#define S5P_VA_CMU S3C_ADDR(0x02100000)
18#define S5P_VA_PMU S3C_ADDR(0x02180000)
18#define S5P_VA_GPIO S3C_ADDR(0x02200000) 19#define S5P_VA_GPIO S3C_ADDR(0x02200000)
19#define S5P_VA_GPIO1 S5P_VA_GPIO 20#define S5P_VA_GPIO1 S5P_VA_GPIO
20#define S5P_VA_GPIO2 S3C_ADDR(0x02240000) 21#define S5P_VA_GPIO2 S3C_ADDR(0x02240000)
diff --git a/arch/arm/plat-samsung/gpio-config.c b/arch/arm/plat-samsung/gpio-config.c
index b732b773b9af..0aa32f242ee4 100644
--- a/arch/arm/plat-samsung/gpio-config.c
+++ b/arch/arm/plat-samsung/gpio-config.c
@@ -280,18 +280,17 @@ s3c_gpio_pull_t s3c_gpio_getpull_updown(struct s3c_gpio_chip *chip,
280} 280}
281#endif 281#endif
282 282
283#ifdef CONFIG_S3C_GPIO_PULL_UP 283#if defined(CONFIG_S3C_GPIO_PULL_UP) || defined(CONFIG_S3C_GPIO_PULL_DOWN)
284int s3c_gpio_setpull_1up(struct s3c_gpio_chip *chip, 284static int s3c_gpio_setpull_1(struct s3c_gpio_chip *chip,
285 unsigned int off, s3c_gpio_pull_t pull) 285 unsigned int off, s3c_gpio_pull_t pull,
286 s3c_gpio_pull_t updown)
286{ 287{
287 void __iomem *reg = chip->base + 0x08; 288 void __iomem *reg = chip->base + 0x08;
288 u32 pup = __raw_readl(reg); 289 u32 pup = __raw_readl(reg);
289 290
290 pup = __raw_readl(reg); 291 if (pull == updown)
291
292 if (pup == S3C_GPIO_PULL_UP)
293 pup &= ~(1 << off); 292 pup &= ~(1 << off);
294 else if (pup == S3C_GPIO_PULL_NONE) 293 else if (pull == S3C_GPIO_PULL_NONE)
295 pup |= (1 << off); 294 pup |= (1 << off);
296 else 295 else
297 return -EINVAL; 296 return -EINVAL;
@@ -300,17 +299,45 @@ int s3c_gpio_setpull_1up(struct s3c_gpio_chip *chip,
300 return 0; 299 return 0;
301} 300}
302 301
303s3c_gpio_pull_t s3c_gpio_getpull_1up(struct s3c_gpio_chip *chip, 302static s3c_gpio_pull_t s3c_gpio_getpull_1(struct s3c_gpio_chip *chip,
304 unsigned int off) 303 unsigned int off, s3c_gpio_pull_t updown)
305{ 304{
306 void __iomem *reg = chip->base + 0x08; 305 void __iomem *reg = chip->base + 0x08;
307 u32 pup = __raw_readl(reg); 306 u32 pup = __raw_readl(reg);
308 307
309 pup &= (1 << off); 308 pup &= (1 << off);
310 return pup ? S3C_GPIO_PULL_NONE : S3C_GPIO_PULL_UP; 309 return pup ? S3C_GPIO_PULL_NONE : updown;
310}
311#endif /* CONFIG_S3C_GPIO_PULL_UP || CONFIG_S3C_GPIO_PULL_DOWN */
312
313#ifdef CONFIG_S3C_GPIO_PULL_UP
314s3c_gpio_pull_t s3c_gpio_getpull_1up(struct s3c_gpio_chip *chip,
315 unsigned int off)
316{
317 return s3c_gpio_getpull_1(chip, off, S3C_GPIO_PULL_UP);
318}
319
320int s3c_gpio_setpull_1up(struct s3c_gpio_chip *chip,
321 unsigned int off, s3c_gpio_pull_t pull)
322{
323 return s3c_gpio_setpull_1(chip, off, pull, S3C_GPIO_PULL_UP);
311} 324}
312#endif /* CONFIG_S3C_GPIO_PULL_UP */ 325#endif /* CONFIG_S3C_GPIO_PULL_UP */
313 326
327#ifdef CONFIG_S3C_GPIO_PULL_DOWN
328s3c_gpio_pull_t s3c_gpio_getpull_1down(struct s3c_gpio_chip *chip,
329 unsigned int off)
330{
331 return s3c_gpio_getpull_1(chip, off, S3C_GPIO_PULL_DOWN);
332}
333
334int s3c_gpio_setpull_1down(struct s3c_gpio_chip *chip,
335 unsigned int off, s3c_gpio_pull_t pull)
336{
337 return s3c_gpio_setpull_1(chip, off, pull, S3C_GPIO_PULL_DOWN);
338}
339#endif /* CONFIG_S3C_GPIO_PULL_DOWN */
340
314#ifdef CONFIG_S5P_GPIO_DRVSTR 341#ifdef CONFIG_S5P_GPIO_DRVSTR
315s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin) 342s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin)
316{ 343{
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 2d82a6cb1444..4dad6e24e970 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -122,6 +122,8 @@ extern struct platform_device s5p_device_fimc0;
122extern struct platform_device s5p_device_fimc1; 122extern struct platform_device s5p_device_fimc1;
123extern struct platform_device s5p_device_fimc2; 123extern struct platform_device s5p_device_fimc2;
124 124
125extern struct platform_device s5pv310_device_pd[];
126
125/* s3c2440 specific devices */ 127/* s3c2440 specific devices */
126 128
127#ifdef CONFIG_CPU_S3C2440 129#ifdef CONFIG_CPU_S3C2440
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
index 8fd65d8b5863..0d2c5703f1ee 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
@@ -210,6 +210,17 @@ extern s3c_gpio_pull_t s3c_gpio_getpull_1up(struct s3c_gpio_chip *chip,
210 unsigned int off); 210 unsigned int off);
211 211
212/** 212/**
213 * s3c_gpio_getpull_1down() - Get configuration for choice of down or none
214 * @chip: The gpio chip that the GPIO pin belongs to
215 * @off: The offset to the pin to get the configuration of.
216 *
217 * This helper function reads the state of the pull-down resistor for the
218 * given GPIO in the same case as s3c_gpio_setpull_1down.
219*/
220extern s3c_gpio_pull_t s3c_gpio_getpull_1down(struct s3c_gpio_chip *chip,
221 unsigned int off);
222
223/**
213 * s3c_gpio_setpull_s3c2443() - Pull configuration for s3c2443. 224 * s3c_gpio_setpull_s3c2443() - Pull configuration for s3c2443.
214 * @chip: The gpio chip that is being configured. 225 * @chip: The gpio chip that is being configured.
215 * @off: The offset for the GPIO being configured. 226 * @off: The offset for the GPIO being configured.
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 55590a4d87c9..2fea897ebeb1 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
12# 12#
13# http://www.arm.linux.org.uk/developer/machines/?action=new 13# http://www.arm.linux.org.uk/developer/machines/?action=new
14# 14#
15# Last update: Thu Sep 9 22:43:01 2010 15# Last update: Sun Dec 12 23:24:27 2010
16# 16#
17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number 17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
18# 18#
@@ -2321,7 +2321,7 @@ mx31txtr MACH_MX31TXTR MX31TXTR 2332
2321u380 MACH_U380 U380 2333 2321u380 MACH_U380 U380 2333
2322oamp3_hualu MACH_HUALU_BOARD HUALU_BOARD 2334 2322oamp3_hualu MACH_HUALU_BOARD HUALU_BOARD 2334
2323npcmx50 MACH_NPCMX50 NPCMX50 2335 2323npcmx50 MACH_NPCMX50 NPCMX50 2335
2324mx51_lange51 MACH_MX51_LANGE51 MX51_LANGE51 2336 2324mx51_efikamx MACH_MX51_EFIKAMX MX51_EFIKAMX 2336
2325mx51_lange52 MACH_MX51_LANGE52 MX51_LANGE52 2337 2325mx51_lange52 MACH_MX51_LANGE52 MX51_LANGE52 2337
2326riom MACH_RIOM RIOM 2338 2326riom MACH_RIOM RIOM 2338
2327comcas MACH_COMCAS COMCAS 2339 2327comcas MACH_COMCAS COMCAS 2339
@@ -2355,7 +2355,7 @@ at91sam9263cs MACH_AT91SAM9263CS AT91SAM9263CS 2366
2355csb732 MACH_CSB732 CSB732 2367 2355csb732 MACH_CSB732 CSB732 2367
2356u8500 MACH_U8500 U8500 2368 2356u8500 MACH_U8500 U8500 2368
2357huqiu MACH_HUQIU HUQIU 2369 2357huqiu MACH_HUQIU HUQIU 2369
2358mx51_kunlun MACH_MX51_KUNLUN MX51_KUNLUN 2370 2358mx51_efikasb MACH_MX51_EFIKASB MX51_EFIKASB 2370
2359pmt1g MACH_PMT1G PMT1G 2371 2359pmt1g MACH_PMT1G PMT1G 2371
2360htcelf MACH_HTCELF HTCELF 2372 2360htcelf MACH_HTCELF HTCELF 2372
2361armadillo420 MACH_ARMADILLO420 ARMADILLO420 2373 2361armadillo420 MACH_ARMADILLO420 ARMADILLO420 2373
@@ -2971,7 +2971,7 @@ premierwave_en MACH_PREMIERWAVE_EN PREMIERWAVE_EN 2985
2971wasabi MACH_WASABI WASABI 2986 2971wasabi MACH_WASABI WASABI 2986
2972vivow MACH_VIVOW VIVOW 2987 2972vivow MACH_VIVOW VIVOW 2987
2973mx50_rdp MACH_MX50_RDP MX50_RDP 2988 2973mx50_rdp MACH_MX50_RDP MX50_RDP 2988
2974universal MACH_UNIVERSAL UNIVERSAL 2989 2974universal_c210 MACH_UNIVERSAL_C210 UNIVERSAL_C210 2989
2975real6410 MACH_REAL6410 REAL6410 2990 2975real6410 MACH_REAL6410 REAL6410 2990
2976spx_sakura MACH_SPX_SAKURA SPX_SAKURA 2991 2976spx_sakura MACH_SPX_SAKURA SPX_SAKURA 2991
2977ij3k_2440 MACH_IJ3K_2440 IJ3K_2440 2992 2977ij3k_2440 MACH_IJ3K_2440 IJ3K_2440 2992
@@ -3044,3 +3044,178 @@ harvest_desoto MACH_HARVEST_DESOTO HARVEST_DESOTO 3059
3044msm8x60_qrdc MACH_MSM8X60_QRDC MSM8X60_QRDC 3060 3044msm8x60_qrdc MACH_MSM8X60_QRDC MSM8X60_QRDC 3060
3045spear900 MACH_SPEAR900 SPEAR900 3061 3045spear900 MACH_SPEAR900 SPEAR900 3061
3046pcontrol_g20 MACH_PCONTROL_G20 PCONTROL_G20 3062 3046pcontrol_g20 MACH_PCONTROL_G20 PCONTROL_G20 3062
3047rdstor MACH_RDSTOR RDSTOR 3063
3048usdloader MACH_USDLOADER USDLOADER 3064
3049tsoploader MACH_TSOPLOADER TSOPLOADER 3065
3050kronos MACH_KRONOS KRONOS 3066
3051ffcore MACH_FFCORE FFCORE 3067
3052mone MACH_MONE MONE 3068
3053unit2s MACH_UNIT2S UNIT2S 3069
3054acer_a5 MACH_ACER_A5 ACER_A5 3070
3055etherpro_isp MACH_ETHERPRO_ISP ETHERPRO_ISP 3071
3056stretchs7000 MACH_STRETCHS7000 STRETCHS7000 3072
3057p87_smartsim MACH_P87_SMARTSIM P87_SMARTSIM 3073
3058tulip MACH_TULIP TULIP 3074
3059sunflower MACH_SUNFLOWER SUNFLOWER 3075
3060rib MACH_RIB RIB 3076
3061clod MACH_CLOD CLOD 3077
3062rump MACH_RUMP RUMP 3078
3063tenderloin MACH_TENDERLOIN TENDERLOIN 3079
3064shortloin MACH_SHORTLOIN SHORTLOIN 3080
3065crespo MACH_CRESPO CRESPO 3081
3066antares MACH_ANTARES ANTARES 3082
3067wb40n MACH_WB40N WB40N 3083
3068herring MACH_HERRING HERRING 3084
3069naxy400 MACH_NAXY400 NAXY400 3085
3070naxy1200 MACH_NAXY1200 NAXY1200 3086
3071vpr200 MACH_VPR200 VPR200 3087
3072bug20 MACH_BUG20 BUG20 3088
3073goflexnet MACH_GOFLEXNET GOFLEXNET 3089
3074torbreck MACH_TORBRECK TORBRECK 3090
3075saarb_mg1 MACH_SAARB_MG1 SAARB_MG1 3091
3076callisto MACH_CALLISTO CALLISTO 3092
3077multhsu MACH_MULTHSU MULTHSU 3093
3078saluda MACH_SALUDA SALUDA 3094
3079pemp_omap3_apollo MACH_PEMP_OMAP3_APOLLO PEMP_OMAP3_APOLLO 3095
3080vc0718 MACH_VC0718 VC0718 3096
3081mvblx MACH_MVBLX MVBLX 3097
3082inhand_apeiron MACH_INHAND_APEIRON INHAND_APEIRON 3098
3083inhand_fury MACH_INHAND_FURY INHAND_FURY 3099
3084inhand_siren MACH_INHAND_SIREN INHAND_SIREN 3100
3085hdnvp MACH_HDNVP HDNVP 3101
3086softwinner MACH_SOFTWINNER SOFTWINNER 3102
3087prima2_evb MACH_PRIMA2_EVB PRIMA2_EVB 3103
3088nas6210 MACH_NAS6210 NAS6210 3104
3089unisdev MACH_UNISDEV UNISDEV 3105
3090sbca11 MACH_SBCA11 SBCA11 3106
3091saga MACH_SAGA SAGA 3107
3092ns_k330 MACH_NS_K330 NS_K330 3108
3093tanna MACH_TANNA TANNA 3109
3094imate8502 MACH_IMATE8502 IMATE8502 3110
3095aspen MACH_ASPEN ASPEN 3111
3096daintree_cwac MACH_DAINTREE_CWAC DAINTREE_CWAC 3112
3097zmx25 MACH_ZMX25 ZMX25 3113
3098maple1 MACH_MAPLE1 MAPLE1 3114
3099qsd8x72_surf MACH_QSD8X72_SURF QSD8X72_SURF 3115
3100qsd8x72_ffa MACH_QSD8X72_FFA QSD8X72_FFA 3116
3101abilene MACH_ABILENE ABILENE 3117
3102eigen_ttr MACH_EIGEN_TTR EIGEN_TTR 3118
3103iomega_ix2_200 MACH_IOMEGA_IX2_200 IOMEGA_IX2_200 3119
3104coretec_vcx7400 MACH_CORETEC_VCX7400 CORETEC_VCX7400 3120
3105santiago MACH_SANTIAGO SANTIAGO 3121
3106mx257sol MACH_MX257SOL MX257SOL 3122
3107strasbourg MACH_STRASBOURG STRASBOURG 3123
3108msm8x60_fluid MACH_MSM8X60_FLUID MSM8X60_FLUID 3124
3109smartqv5 MACH_SMARTQV5 SMARTQV5 3125
3110smartqv3 MACH_SMARTQV3 SMARTQV3 3126
3111smartqv7 MACH_SMARTQV7 SMARTQV7 3127
3112paz00 MACH_PAZ00 PAZ00 3128
3113acmenetusfoxg20 MACH_ACMENETUSFOXG20 ACMENETUSFOXG20 3129
3114htcwillow MACH_HTCWILLOW HTCWILLOW 3130
3115fwbd_0404 MACH_FWBD_0404 FWBD_0404 3131
3116hdgu MACH_HDGU HDGU 3132
3117pyramid MACH_PYRAMID PYRAMID 3133
3118epiphan MACH_EPIPHAN EPIPHAN 3134
3119omap_bender MACH_OMAP_BENDER OMAP_BENDER 3135
3120gurnard MACH_GURNARD GURNARD 3136
3121gtl_it5100 MACH_GTL_IT5100 GTL_IT5100 3137
3122bcm2708 MACH_BCM2708 BCM2708 3138
3123mx51_ggc MACH_MX51_GGC MX51_GGC 3139
3124sharespace MACH_SHARESPACE SHARESPACE 3140
3125haba_knx_explorer MACH_HABA_KNX_EXPLORER HABA_KNX_EXPLORER 3141
3126simtec_kirkmod MACH_SIMTEC_KIRKMOD SIMTEC_KIRKMOD 3142
3127crux MACH_CRUX CRUX 3143
3128mx51_bravo MACH_MX51_BRAVO MX51_BRAVO 3144
3129charon MACH_CHARON CHARON 3145
3130picocom3 MACH_PICOCOM3 PICOCOM3 3146
3131picocom4 MACH_PICOCOM4 PICOCOM4 3147
3132serrano MACH_SERRANO SERRANO 3148
3133doubleshot MACH_DOUBLESHOT DOUBLESHOT 3149
3134evsy MACH_EVSY EVSY 3150
3135huashan MACH_HUASHAN HUASHAN 3151
3136lausanne MACH_LAUSANNE LAUSANNE 3152
3137emerald MACH_EMERALD EMERALD 3153
3138tqma35 MACH_TQMA35 TQMA35 3154
3139marvel MACH_MARVEL MARVEL 3155
3140manuae MACH_MANUAE MANUAE 3156
3141chacha MACH_CHACHA CHACHA 3157
3142lemon MACH_LEMON LEMON 3158
3143csc MACH_CSC CSC 3159
3144gira_knxip_router MACH_GIRA_KNXIP_ROUTER GIRA_KNXIP_ROUTER 3160
3145t20 MACH_T20 T20 3161
3146hdmini MACH_HDMINI HDMINI 3162
3147sciphone_g2 MACH_SCIPHONE_G2 SCIPHONE_G2 3163
3148express MACH_EXPRESS EXPRESS 3164
3149express_kt MACH_EXPRESS_KT EXPRESS_KT 3165
3150maximasp MACH_MAXIMASP MAXIMASP 3166
3151nitrogen_imx51 MACH_NITROGEN_IMX51 NITROGEN_IMX51 3167
3152nitrogen_imx53 MACH_NITROGEN_IMX53 NITROGEN_IMX53 3168
3153sunfire MACH_SUNFIRE SUNFIRE 3169
3154arowana MACH_AROWANA AROWANA 3170
3155tegra_daytona MACH_TEGRA_DAYTONA TEGRA_DAYTONA 3171
3156tegra_swordfish MACH_TEGRA_SWORDFISH TEGRA_SWORDFISH 3172
3157edison MACH_EDISON EDISON 3173
3158svp8500v1 MACH_SVP8500V1 SVP8500V1 3174
3159svp8500v2 MACH_SVP8500V2 SVP8500V2 3175
3160svp5500 MACH_SVP5500 SVP5500 3176
3161b5500 MACH_B5500 B5500 3177
3162s5500 MACH_S5500 S5500 3178
3163icon MACH_ICON ICON 3179
3164elephant MACH_ELEPHANT ELEPHANT 3180
3165msm8x60_fusion MACH_MSM8X60_FUSION MSM8X60_FUSION 3181
3166shooter MACH_SHOOTER SHOOTER 3182
3167spade_lte MACH_SPADE_LTE SPADE_LTE 3183
3168philhwani MACH_PHILHWANI PHILHWANI 3184
3169gsncomm MACH_GSNCOMM GSNCOMM 3185
3170strasbourg_a2 MACH_STRASBOURG_A2 STRASBOURG_A2 3186
3171mmm MACH_MMM MMM 3187
3172davinci_dm365_bv MACH_DAVINCI_DM365_BV DAVINCI_DM365_BV 3188
3173ag5evm MACH_AG5EVM AG5EVM 3189
3174sc575plc MACH_SC575PLC SC575PLC 3190
3175sc575hmi MACH_SC575IPC SC575IPC 3191
3176omap3_tdm3730 MACH_OMAP3_TDM3730 OMAP3_TDM3730 3192
3177g7 MACH_G7 G7 3193
3178top9000_eval MACH_TOP9000_EVAL TOP9000_EVAL 3194
3179top9000_su MACH_TOP9000_SU TOP9000_SU 3195
3180utm300 MACH_UTM300 UTM300 3196
3181tsunagi MACH_TSUNAGI TSUNAGI 3197
3182ts75xx MACH_TS75XX TS75XX 3198
3183msm8x60_fusn_ffa MACH_MSM8X60_FUSN_FFA MSM8X60_FUSN_FFA 3199
3184ts47xx MACH_TS47XX TS47XX 3200
3185da850_k5 MACH_DA850_K5 DA850_K5 3201
3186ax502 MACH_AX502 AX502 3202
3187igep0032 MACH_IGEP0032 IGEP0032 3203
3188antero MACH_ANTERO ANTERO 3204
3189synergy MACH_SYNERGY SYNERGY 3205
3190ics_if_voip MACH_ICS_IF_VOIP ICS_IF_VOIP 3206
3191wlf_cragg_6410 MACH_WLF_CRAGG_6410 WLF_CRAGG_6410 3207
3192punica MACH_PUNICA PUNICA 3208
3193sbc_nt250 MACH_SBC_NT250 SBC_NT250 3209
3194mx27_wmultra MACH_MX27_WMULTRA MX27_WMULTRA 3210
3195mackerel MACH_MACKEREL MACKEREL 3211
3196fa9x27 MACH_FA9X27 FA9X27 3213
3197ns2816tb MACH_NS2816TB NS2816TB 3214
3198ns2816_ntpad MACH_NS2816_NTPAD NS2816_NTPAD 3215
3199ns2816_ntnb MACH_NS2816_NTNB NS2816_NTNB 3216
3200kaen MACH_KAEN KAEN 3217
3201nv1000 MACH_NV1000 NV1000 3218
3202nuc950ts MACH_NUC950TS NUC950TS 3219
3203nokia_rm680 MACH_NOKIA_RM680 NOKIA_RM680 3220
3204ast2200 MACH_AST2200 AST2200 3221
3205lead MACH_LEAD LEAD 3222
3206unino1 MACH_UNINO1 UNINO1 3223
3207greeco MACH_GREECO GREECO 3224
3208verdi MACH_VERDI VERDI 3225
3209dm6446_adbox MACH_DM6446_ADBOX DM6446_ADBOX 3226
3210quad_salsa MACH_QUAD_SALSA QUAD_SALSA 3227
3211abb_gma_1_1 MACH_ABB_GMA_1_1 ABB_GMA_1_1 3228
3212svcid MACH_SVCID SVCID 3229
3213msm8960_sim MACH_MSM8960_SIM MSM8960_SIM 3230
3214msm8960_rumi3 MACH_MSM8960_RUMI3 MSM8960_RUMI3 3231
3215icon_g MACH_ICON_G ICON_G 3232
3216mb3 MACH_MB3 MB3 3233
3217gsia18s MACH_GSIA18S GSIA18S 3234
3218pivicc MACH_PIVICC PIVICC 3235
3219pcm048 MACH_PCM048 PCM048 3236
3220dds MACH_DDS DDS 3237
3221chalten_xa1 MACH_CHALTEN_XA1 CHALTEN_XA1 3238