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-rw-r--r--arch/arm/Kconfig5
-rw-r--r--arch/arm/boot/.gitignore1
-rw-r--r--arch/arm/configs/imx_v4_v5_defconfig1
-rw-r--r--arch/arm/configs/lpc32xx_defconfig145
-rw-r--r--arch/arm/include/asm/pmu.h2
-rw-r--r--arch/arm/kernel/ecard.c1
-rw-r--r--arch/arm/kernel/perf_event.c45
-rw-r--r--arch/arm/kernel/perf_event_v6.c22
-rw-r--r--arch/arm/kernel/perf_event_v7.c11
-rw-r--r--arch/arm/kernel/perf_event_xscale.c20
-rw-r--r--arch/arm/mach-davinci/cpufreq.c2
-rw-r--r--arch/arm/mach-davinci/da850.c2
-rw-r--r--arch/arm/mach-davinci/dma.c6
-rw-r--r--arch/arm/mach-davinci/include/mach/edma.h5
-rw-r--r--arch/arm/mach-ep93xx/vision_ep9307.c2
-rw-r--r--arch/arm/mach-exynos/mach-universal_c210.c2
-rw-r--r--arch/arm/mach-imx/mach-pcm038.c2
-rw-r--r--arch/arm/mach-imx/mm-imx3.c2
-rw-r--r--arch/arm/mach-lpc32xx/clock.c62
-rw-r--r--arch/arm/mach-lpc32xx/common.h1
-rw-r--r--arch/arm/mach-lpc32xx/include/mach/platform.h51
-rw-r--r--arch/arm/mach-lpc32xx/phy3250.c2
-rw-r--r--arch/arm/mach-lpc32xx/pm.c2
-rw-r--r--arch/arm/mach-lpc32xx/timer.c48
-rw-r--r--arch/arm/mach-omap1/io.c2
-rw-r--r--arch/arm/mach-omap1/lcd_dma.c2
-rw-r--r--arch/arm/mach-omap2/Makefile4
-rw-r--r--arch/arm/mach-omap2/board-2430sdp.c2
-rw-r--r--arch/arm/mach-omap2/board-3430sdp.c5
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c4
-rw-r--r--arch/arm/mach-omap2/board-am3517evm.c2
-rw-r--r--arch/arm/mach-omap2/board-cm-t35.c5
-rw-r--r--arch/arm/mach-omap2/board-devkit8000.c4
-rw-r--r--arch/arm/mach-omap2/board-flash.c2
-rw-r--r--arch/arm/mach-omap2/board-igep0020.c6
-rw-r--r--arch/arm/mach-omap2/board-ldp.c3
-rw-r--r--arch/arm/mach-omap2/board-n8x0.c8
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c10
-rw-r--r--arch/arm/mach-omap2/board-omap3evm.c7
-rw-r--r--arch/arm/mach-omap2/board-omap3logic.c2
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c15
-rw-r--r--arch/arm/mach-omap2/board-omap3stalker.c15
-rw-r--r--arch/arm/mach-omap2/board-omap3touchbook.c17
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c6
-rw-r--r--arch/arm/mach-omap2/board-overo.c3
-rw-r--r--arch/arm/mach-omap2/board-rm680.c2
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c2
-rw-r--r--arch/arm/mach-omap2/board-zoom-peripherals.c4
-rw-r--r--arch/arm/mach-omap2/clkt_clksel.c1
-rw-r--r--arch/arm/mach-omap2/common-board-devices.c8
-rw-r--r--arch/arm/mach-omap2/control.h5
-rw-r--r--arch/arm/mach-omap2/devices.c8
-rw-r--r--arch/arm/mach-omap2/display.c8
-rw-r--r--arch/arm/mach-omap2/dma.c2
-rw-r--r--arch/arm/mach-omap2/gpio.c2
-rw-r--r--arch/arm/mach-omap2/gpmc-smsc911x.c11
-rw-r--r--arch/arm/mach-omap2/gpmc.c2
-rw-r--r--arch/arm/mach-omap2/hsmmc.c123
-rw-r--r--arch/arm/mach-omap2/hsmmc.h12
-rw-r--r--arch/arm/mach-omap2/id.c3
-rw-r--r--arch/arm/mach-omap2/io.c3
-rw-r--r--arch/arm/mach-omap2/mailbox.c3
-rw-r--r--arch/arm/mach-omap2/mcbsp.c2
-rw-r--r--arch/arm/mach-omap2/mux.c16
-rw-r--r--arch/arm/mach-omap2/omap-hotplug.c2
-rw-r--r--arch/arm/mach-omap2/omap-iommu.c3
-rw-r--r--arch/arm/mach-omap2/omap-mpuss-lowpower.c2
-rw-r--r--arch/arm/mach-omap2/omap-wakeupgen.c53
-rw-r--r--arch/arm/mach-omap2/omap4-common.c2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c1
-rw-r--r--arch/arm/mach-omap2/pm.c4
-rw-r--r--arch/arm/mach-omap2/powerdomain-common.c1
-rw-r--r--arch/arm/mach-omap2/powerdomain2xxx_3xxx.c1
-rw-r--r--arch/arm/mach-omap2/powerdomain44xx.c1
-rw-r--r--arch/arm/mach-omap2/powerdomains3xxx_data.c1
-rw-r--r--arch/arm/mach-omap2/sr_device.c2
-rw-r--r--arch/arm/mach-omap2/twl-common.c1
-rw-r--r--arch/arm/mach-omap2/vc.c1
-rw-r--r--arch/arm/mach-omap2/vp.c4
-rw-r--r--arch/arm/mach-pxa/generic.h1
-rw-r--r--arch/arm/mach-pxa/mfp-pxa2xx.c7
-rw-r--r--arch/arm/mach-pxa/pxa25x.c3
-rw-r--r--arch/arm/mach-pxa/pxa27x.c3
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c1
-rw-r--r--arch/arm/mach-pxa/pxa95x.c1
-rw-r--r--arch/arm/mach-s3c2440/common.h2
-rw-r--r--arch/arm/mach-s3c2440/mach-anubis.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-at2440evb.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-gta02.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-mini2440.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-nexcoder.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-osiris.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-rx1950.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-rx3715.c2
-rw-r--r--arch/arm/mach-s3c2440/mach-smdk2440.c2
-rw-r--r--arch/arm/mach-s3c2440/s3c2440.c13
-rw-r--r--arch/arm/mach-s3c2440/s3c244x.c12
-rw-r--r--arch/arm/mach-ux500/Kconfig46
-rw-r--r--arch/arm/mach-ux500/Makefile2
-rw-r--r--arch/arm/mach-ux500/board-mop500-regulators.c28
-rw-r--r--arch/arm/mach-ux500/board-mop500-u8500uib.c1
-rw-r--r--arch/arm/mach-ux500/board-mop500.c2
-rw-r--r--arch/arm/mach-ux500/board-mop500.h2
-rw-r--r--arch/arm/mach-ux500/clock.c7
-rw-r--r--arch/arm/mach-ux500/clock.h1
-rw-r--r--arch/arm/mach-ux500/devices-db8500.c6
-rw-r--r--arch/arm/mach-ux500/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-ux500/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-vexpress/Kconfig2
-rw-r--r--arch/arm/mm/proc-v7.S4
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx25.h42
-rw-r--r--arch/arm/plat-omap/clock.c1
-rw-r--r--arch/arm/plat-omap/dma.c2
-rw-r--r--arch/arm/plat-omap/dmtimer.c19
-rw-r--r--arch/arm/plat-omap/include/plat/cpu.h2
-rw-r--r--arch/arm/plat-omap/include/plat/irqs.h10
-rw-r--r--arch/arm/plat-omap/include/plat/omap_device.h7
-rw-r--r--arch/arm/plat-omap/include/plat/sram.h1
-rw-r--r--arch/arm/plat-omap/mailbox.c2
-rw-r--r--arch/arm/plat-omap/omap_device.c20
-rw-r--r--arch/arm/plat-omap/sram.c14
-rw-r--r--arch/arm/plat-s3c24xx/dma.c2
-rw-r--r--arch/arm/plat-samsung/devs.c2
-rw-r--r--arch/arm/plat-spear/time.c6
124 files changed, 764 insertions, 394 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index baf6dc6e9a1b..3b3de99c2d6c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -901,6 +901,7 @@ config ARCH_U300
901 901
902config ARCH_U8500 902config ARCH_U8500
903 bool "ST-Ericsson U8500 Series" 903 bool "ST-Ericsson U8500 Series"
904 depends on MMU
904 select CPU_V7 905 select CPU_V7
905 select ARM_AMBA 906 select ARM_AMBA
906 select GENERIC_CLOCKEVENTS 907 select GENERIC_CLOCKEVENTS
@@ -1280,7 +1281,7 @@ config ARM_ERRATA_743622
1280 depends on CPU_V7 1281 depends on CPU_V7
1281 help 1282 help
1282 This option enables the workaround for the 743622 Cortex-A9 1283 This option enables the workaround for the 743622 Cortex-A9
1283 (r2p0..r2p2) erratum. Under very rare conditions, a faulty 1284 (r2p*) erratum. Under very rare conditions, a faulty
1284 optimisation in the Cortex-A9 Store Buffer may lead to data 1285 optimisation in the Cortex-A9 Store Buffer may lead to data
1285 corruption. This workaround sets a specific bit in the diagnostic 1286 corruption. This workaround sets a specific bit in the diagnostic
1286 register of the Cortex-A9 which disables the Store Buffer 1287 register of the Cortex-A9 which disables the Store Buffer
@@ -1577,7 +1578,7 @@ config LOCAL_TIMERS
1577config ARCH_NR_GPIO 1578config ARCH_NR_GPIO
1578 int 1579 int
1579 default 1024 if ARCH_SHMOBILE || ARCH_TEGRA 1580 default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1580 default 350 if ARCH_U8500 1581 default 355 if ARCH_U8500
1581 default 0 1582 default 0
1582 help 1583 help
1583 Maximum number of GPIOs in the system. 1584 Maximum number of GPIOs in the system.
diff --git a/arch/arm/boot/.gitignore b/arch/arm/boot/.gitignore
index ce1c5ff746e7..3c79f85975aa 100644
--- a/arch/arm/boot/.gitignore
+++ b/arch/arm/boot/.gitignore
@@ -3,3 +3,4 @@ zImage
3xipImage 3xipImage
4bootpImage 4bootpImage
5uImage 5uImage
6*.dtb
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index d9eddfd77428..b5ac644e12af 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -69,6 +69,7 @@ CONFIG_MTD_CFI=y
69CONFIG_MTD_CFI_ADV_OPTIONS=y 69CONFIG_MTD_CFI_ADV_OPTIONS=y
70CONFIG_MTD_CFI_GEOMETRY=y 70CONFIG_MTD_CFI_GEOMETRY=y
71# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set 71# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
72CONFIG_MTD_MAP_BANK_WIDTH_4=y
72# CONFIG_MTD_CFI_I2 is not set 73# CONFIG_MTD_CFI_I2 is not set
73CONFIG_MTD_CFI_INTELEXT=y 74CONFIG_MTD_CFI_INTELEXT=y
74CONFIG_MTD_PHYSMAP=y 75CONFIG_MTD_PHYSMAP=y
diff --git a/arch/arm/configs/lpc32xx_defconfig b/arch/arm/configs/lpc32xx_defconfig
new file mode 100644
index 000000000000..fb2088171ca9
--- /dev/null
+++ b/arch/arm/configs/lpc32xx_defconfig
@@ -0,0 +1,145 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_SYSVIPC=y
3CONFIG_IKCONFIG=y
4CONFIG_IKCONFIG_PROC=y
5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_SYSFS_DEPRECATED=y
7CONFIG_SYSFS_DEPRECATED_V2=y
8CONFIG_BLK_DEV_INITRD=y
9CONFIG_CC_OPTIMIZE_FOR_SIZE=y
10CONFIG_SYSCTL_SYSCALL=y
11CONFIG_EMBEDDED=y
12CONFIG_SLAB=y
13CONFIG_MODULES=y
14CONFIG_MODULE_UNLOAD=y
15# CONFIG_BLK_DEV_BSG is not set
16CONFIG_PARTITION_ADVANCED=y
17CONFIG_ARCH_LPC32XX=y
18CONFIG_NO_HZ=y
19CONFIG_HIGH_RES_TIMERS=y
20CONFIG_PREEMPT=y
21CONFIG_AEABI=y
22CONFIG_ZBOOT_ROM_TEXT=0x0
23CONFIG_ZBOOT_ROM_BSS=0x0
24CONFIG_CMDLINE="console=ttyS0,115200n81 root=/dev/ram0"
25CONFIG_CPU_IDLE=y
26CONFIG_FPE_NWFPE=y
27CONFIG_VFP=y
28# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
29CONFIG_BINFMT_AOUT=y
30CONFIG_NET=y
31CONFIG_PACKET=y
32CONFIG_UNIX=y
33CONFIG_INET=y
34CONFIG_IP_MULTICAST=y
35CONFIG_IP_PNP=y
36CONFIG_IP_PNP_DHCP=y
37CONFIG_IP_PNP_BOOTP=y
38# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
39# CONFIG_INET_XFRM_MODE_TUNNEL is not set
40# CONFIG_INET_XFRM_MODE_BEET is not set
41# CONFIG_INET_LRO is not set
42# CONFIG_INET_DIAG is not set
43# CONFIG_IPV6 is not set
44# CONFIG_WIRELESS is not set
45CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
46# CONFIG_FW_LOADER is not set
47CONFIG_MTD=y
48CONFIG_MTD_CMDLINE_PARTS=y
49CONFIG_MTD_CHAR=y
50CONFIG_MTD_BLOCK=y
51CONFIG_MTD_NAND=y
52CONFIG_MTD_NAND_MUSEUM_IDS=y
53CONFIG_BLK_DEV_LOOP=y
54CONFIG_BLK_DEV_CRYPTOLOOP=y
55CONFIG_BLK_DEV_RAM=y
56CONFIG_BLK_DEV_RAM_COUNT=1
57CONFIG_BLK_DEV_RAM_SIZE=16384
58CONFIG_MISC_DEVICES=y
59CONFIG_EEPROM_AT25=y
60CONFIG_SCSI=y
61CONFIG_BLK_DEV_SD=y
62CONFIG_NETDEVICES=y
63CONFIG_MII=y
64CONFIG_PHYLIB=y
65CONFIG_SMSC_PHY=y
66# CONFIG_WLAN is not set
67# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
68CONFIG_INPUT_MOUSEDEV_SCREEN_X=240
69CONFIG_INPUT_MOUSEDEV_SCREEN_Y=320
70CONFIG_INPUT_EVDEV=y
71# CONFIG_INPUT_MOUSE is not set
72CONFIG_INPUT_TOUCHSCREEN=y
73CONFIG_TOUCHSCREEN_LPC32XX=y
74# CONFIG_LEGACY_PTYS is not set
75CONFIG_SERIAL_8250=y
76CONFIG_SERIAL_8250_CONSOLE=y
77# CONFIG_HW_RANDOM is not set
78CONFIG_I2C=y
79CONFIG_I2C_CHARDEV=y
80CONFIG_I2C_PNX=y
81CONFIG_SPI=y
82CONFIG_SPI_PL022=y
83CONFIG_GPIO_SYSFS=y
84# CONFIG_HWMON is not set
85CONFIG_WATCHDOG=y
86CONFIG_PNX4008_WATCHDOG=y
87CONFIG_FB=y
88CONFIG_FB_ARMCLCD=y
89CONFIG_FRAMEBUFFER_CONSOLE=y
90CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
91CONFIG_LOGO=y
92# CONFIG_LOGO_LINUX_MONO is not set
93# CONFIG_LOGO_LINUX_VGA16 is not set
94CONFIG_SOUND=y
95CONFIG_SND=y
96CONFIG_SND_SEQUENCER=y
97CONFIG_SND_MIXER_OSS=y
98CONFIG_SND_PCM_OSS=y
99CONFIG_SND_SEQUENCER_OSS=y
100CONFIG_SND_DYNAMIC_MINORS=y
101# CONFIG_SND_VERBOSE_PROCFS is not set
102# CONFIG_SND_DRIVERS is not set
103# CONFIG_SND_ARM is not set
104# CONFIG_SND_SPI is not set
105CONFIG_SND_SOC=y
106# CONFIG_HID_SUPPORT is not set
107CONFIG_USB=y
108CONFIG_USB_STORAGE=y
109CONFIG_USB_LIBUSUAL=y
110CONFIG_MMC=y
111# CONFIG_MMC_BLOCK_BOUNCE is not set
112CONFIG_MMC_ARMMMCI=y
113CONFIG_NEW_LEDS=y
114CONFIG_LEDS_CLASS=y
115CONFIG_LEDS_GPIO=y
116CONFIG_LEDS_TRIGGERS=y
117CONFIG_LEDS_TRIGGER_HEARTBEAT=y
118CONFIG_RTC_CLASS=y
119CONFIG_RTC_INTF_DEV_UIE_EMUL=y
120CONFIG_RTC_DRV_LPC32XX=y
121CONFIG_EXT2_FS=y
122CONFIG_AUTOFS4_FS=y
123CONFIG_MSDOS_FS=y
124CONFIG_VFAT_FS=y
125CONFIG_TMPFS=y
126CONFIG_JFFS2_FS=y
127CONFIG_JFFS2_FS_WBUF_VERIFY=y
128CONFIG_CRAMFS=y
129CONFIG_NFS_FS=y
130CONFIG_NFS_V3=y
131CONFIG_ROOT_NFS=y
132CONFIG_NLS_CODEPAGE_437=y
133CONFIG_NLS_ASCII=y
134CONFIG_NLS_ISO8859_1=y
135CONFIG_NLS_UTF8=y
136# CONFIG_SCHED_DEBUG is not set
137# CONFIG_DEBUG_PREEMPT is not set
138CONFIG_DEBUG_INFO=y
139# CONFIG_FTRACE is not set
140# CONFIG_ARM_UNWIND is not set
141CONFIG_DEBUG_LL=y
142CONFIG_EARLY_PRINTK=y
143CONFIG_CRYPTO_ANSI_CPRNG=y
144# CONFIG_CRYPTO_HW is not set
145CONFIG_CRC_CCITT=y
diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h
index b5a5be2536c1..90114faa9f3c 100644
--- a/arch/arm/include/asm/pmu.h
+++ b/arch/arm/include/asm/pmu.h
@@ -134,7 +134,7 @@ int __init armpmu_register(struct arm_pmu *armpmu, char *name, int type);
134 134
135u64 armpmu_event_update(struct perf_event *event, 135u64 armpmu_event_update(struct perf_event *event,
136 struct hw_perf_event *hwc, 136 struct hw_perf_event *hwc,
137 int idx, int overflow); 137 int idx);
138 138
139int armpmu_event_set_period(struct perf_event *event, 139int armpmu_event_set_period(struct perf_event *event,
140 struct hw_perf_event *hwc, 140 struct hw_perf_event *hwc,
diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c
index 4dd0edab6a65..1651d4950744 100644
--- a/arch/arm/kernel/ecard.c
+++ b/arch/arm/kernel/ecard.c
@@ -242,6 +242,7 @@ static void ecard_init_pgtables(struct mm_struct *mm)
242 242
243 memcpy(dst_pgd, src_pgd, sizeof(pgd_t) * (EASI_SIZE / PGDIR_SIZE)); 243 memcpy(dst_pgd, src_pgd, sizeof(pgd_t) * (EASI_SIZE / PGDIR_SIZE));
244 244
245 vma.vm_flags = VM_EXEC;
245 vma.vm_mm = mm; 246 vma.vm_mm = mm;
246 247
247 flush_tlb_range(&vma, IO_START, IO_START + IO_SIZE); 248 flush_tlb_range(&vma, IO_START, IO_START + IO_SIZE);
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 5bb91bf3d47f..b2abfa18f137 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -180,7 +180,7 @@ armpmu_event_set_period(struct perf_event *event,
180u64 180u64
181armpmu_event_update(struct perf_event *event, 181armpmu_event_update(struct perf_event *event,
182 struct hw_perf_event *hwc, 182 struct hw_perf_event *hwc,
183 int idx, int overflow) 183 int idx)
184{ 184{
185 struct arm_pmu *armpmu = to_arm_pmu(event->pmu); 185 struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
186 u64 delta, prev_raw_count, new_raw_count; 186 u64 delta, prev_raw_count, new_raw_count;
@@ -193,13 +193,7 @@ again:
193 new_raw_count) != prev_raw_count) 193 new_raw_count) != prev_raw_count)
194 goto again; 194 goto again;
195 195
196 new_raw_count &= armpmu->max_period; 196 delta = (new_raw_count - prev_raw_count) & armpmu->max_period;
197 prev_raw_count &= armpmu->max_period;
198
199 if (overflow)
200 delta = armpmu->max_period - prev_raw_count + new_raw_count + 1;
201 else
202 delta = new_raw_count - prev_raw_count;
203 197
204 local64_add(delta, &event->count); 198 local64_add(delta, &event->count);
205 local64_sub(delta, &hwc->period_left); 199 local64_sub(delta, &hwc->period_left);
@@ -216,7 +210,7 @@ armpmu_read(struct perf_event *event)
216 if (hwc->idx < 0) 210 if (hwc->idx < 0)
217 return; 211 return;
218 212
219 armpmu_event_update(event, hwc, hwc->idx, 0); 213 armpmu_event_update(event, hwc, hwc->idx);
220} 214}
221 215
222static void 216static void
@@ -232,7 +226,7 @@ armpmu_stop(struct perf_event *event, int flags)
232 if (!(hwc->state & PERF_HES_STOPPED)) { 226 if (!(hwc->state & PERF_HES_STOPPED)) {
233 armpmu->disable(hwc, hwc->idx); 227 armpmu->disable(hwc, hwc->idx);
234 barrier(); /* why? */ 228 barrier(); /* why? */
235 armpmu_event_update(event, hwc, hwc->idx, 0); 229 armpmu_event_update(event, hwc, hwc->idx);
236 hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE; 230 hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;
237 } 231 }
238} 232}
@@ -518,7 +512,13 @@ __hw_perf_event_init(struct perf_event *event)
518 hwc->config_base |= (unsigned long)mapping; 512 hwc->config_base |= (unsigned long)mapping;
519 513
520 if (!hwc->sample_period) { 514 if (!hwc->sample_period) {
521 hwc->sample_period = armpmu->max_period; 515 /*
516 * For non-sampling runs, limit the sample_period to half
517 * of the counter width. That way, the new counter value
518 * is far less likely to overtake the previous one unless
519 * you have some serious IRQ latency issues.
520 */
521 hwc->sample_period = armpmu->max_period >> 1;
522 hwc->last_period = hwc->sample_period; 522 hwc->last_period = hwc->sample_period;
523 local64_set(&hwc->period_left, hwc->sample_period); 523 local64_set(&hwc->period_left, hwc->sample_period);
524 } 524 }
@@ -680,6 +680,28 @@ static void __init cpu_pmu_init(struct arm_pmu *armpmu)
680} 680}
681 681
682/* 682/*
683 * PMU hardware loses all context when a CPU goes offline.
684 * When a CPU is hotplugged back in, since some hardware registers are
685 * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
686 * junk values out of them.
687 */
688static int __cpuinit pmu_cpu_notify(struct notifier_block *b,
689 unsigned long action, void *hcpu)
690{
691 if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
692 return NOTIFY_DONE;
693
694 if (cpu_pmu && cpu_pmu->reset)
695 cpu_pmu->reset(NULL);
696
697 return NOTIFY_OK;
698}
699
700static struct notifier_block __cpuinitdata pmu_cpu_notifier = {
701 .notifier_call = pmu_cpu_notify,
702};
703
704/*
683 * CPU PMU identification and registration. 705 * CPU PMU identification and registration.
684 */ 706 */
685static int __init 707static int __init
@@ -730,6 +752,7 @@ init_hw_perf_events(void)
730 pr_info("enabled with %s PMU driver, %d counters available\n", 752 pr_info("enabled with %s PMU driver, %d counters available\n",
731 cpu_pmu->name, cpu_pmu->num_events); 753 cpu_pmu->name, cpu_pmu->num_events);
732 cpu_pmu_init(cpu_pmu); 754 cpu_pmu_init(cpu_pmu);
755 register_cpu_notifier(&pmu_cpu_notifier);
733 armpmu_register(cpu_pmu, "cpu", PERF_TYPE_RAW); 756 armpmu_register(cpu_pmu, "cpu", PERF_TYPE_RAW);
734 } else { 757 } else {
735 pr_info("no hardware support available\n"); 758 pr_info("no hardware support available\n");
diff --git a/arch/arm/kernel/perf_event_v6.c b/arch/arm/kernel/perf_event_v6.c
index 533be9930ec2..b78af0cc6ef3 100644
--- a/arch/arm/kernel/perf_event_v6.c
+++ b/arch/arm/kernel/perf_event_v6.c
@@ -467,23 +467,6 @@ armv6pmu_enable_event(struct hw_perf_event *hwc,
467 raw_spin_unlock_irqrestore(&events->pmu_lock, flags); 467 raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
468} 468}
469 469
470static int counter_is_active(unsigned long pmcr, int idx)
471{
472 unsigned long mask = 0;
473 if (idx == ARMV6_CYCLE_COUNTER)
474 mask = ARMV6_PMCR_CCOUNT_IEN;
475 else if (idx == ARMV6_COUNTER0)
476 mask = ARMV6_PMCR_COUNT0_IEN;
477 else if (idx == ARMV6_COUNTER1)
478 mask = ARMV6_PMCR_COUNT1_IEN;
479
480 if (mask)
481 return pmcr & mask;
482
483 WARN_ONCE(1, "invalid counter number (%d)\n", idx);
484 return 0;
485}
486
487static irqreturn_t 470static irqreturn_t
488armv6pmu_handle_irq(int irq_num, 471armv6pmu_handle_irq(int irq_num,
489 void *dev) 472 void *dev)
@@ -513,7 +496,8 @@ armv6pmu_handle_irq(int irq_num,
513 struct perf_event *event = cpuc->events[idx]; 496 struct perf_event *event = cpuc->events[idx];
514 struct hw_perf_event *hwc; 497 struct hw_perf_event *hwc;
515 498
516 if (!counter_is_active(pmcr, idx)) 499 /* Ignore if we don't have an event. */
500 if (!event)
517 continue; 501 continue;
518 502
519 /* 503 /*
@@ -524,7 +508,7 @@ armv6pmu_handle_irq(int irq_num,
524 continue; 508 continue;
525 509
526 hwc = &event->hw; 510 hwc = &event->hw;
527 armpmu_event_update(event, hwc, idx, 1); 511 armpmu_event_update(event, hwc, idx);
528 data.period = event->hw.last_period; 512 data.period = event->hw.last_period;
529 if (!armpmu_event_set_period(event, hwc, idx)) 513 if (!armpmu_event_set_period(event, hwc, idx))
530 continue; 514 continue;
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 6933244c68f9..4d7095af2ab3 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -809,6 +809,11 @@ static inline int armv7_pmnc_disable_intens(int idx)
809 809
810 counter = ARMV7_IDX_TO_COUNTER(idx); 810 counter = ARMV7_IDX_TO_COUNTER(idx);
811 asm volatile("mcr p15, 0, %0, c9, c14, 2" : : "r" (BIT(counter))); 811 asm volatile("mcr p15, 0, %0, c9, c14, 2" : : "r" (BIT(counter)));
812 isb();
813 /* Clear the overflow flag in case an interrupt is pending. */
814 asm volatile("mcr p15, 0, %0, c9, c12, 3" : : "r" (BIT(counter)));
815 isb();
816
812 return idx; 817 return idx;
813} 818}
814 819
@@ -955,6 +960,10 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
955 struct perf_event *event = cpuc->events[idx]; 960 struct perf_event *event = cpuc->events[idx];
956 struct hw_perf_event *hwc; 961 struct hw_perf_event *hwc;
957 962
963 /* Ignore if we don't have an event. */
964 if (!event)
965 continue;
966
958 /* 967 /*
959 * We have a single interrupt for all counters. Check that 968 * We have a single interrupt for all counters. Check that
960 * each counter has overflowed before we process it. 969 * each counter has overflowed before we process it.
@@ -963,7 +972,7 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
963 continue; 972 continue;
964 973
965 hwc = &event->hw; 974 hwc = &event->hw;
966 armpmu_event_update(event, hwc, idx, 1); 975 armpmu_event_update(event, hwc, idx);
967 data.period = event->hw.last_period; 976 data.period = event->hw.last_period;
968 if (!armpmu_event_set_period(event, hwc, idx)) 977 if (!armpmu_event_set_period(event, hwc, idx))
969 continue; 978 continue;
diff --git a/arch/arm/kernel/perf_event_xscale.c b/arch/arm/kernel/perf_event_xscale.c
index 3b99d8269829..71a21e6712f5 100644
--- a/arch/arm/kernel/perf_event_xscale.c
+++ b/arch/arm/kernel/perf_event_xscale.c
@@ -255,11 +255,14 @@ xscale1pmu_handle_irq(int irq_num, void *dev)
255 struct perf_event *event = cpuc->events[idx]; 255 struct perf_event *event = cpuc->events[idx];
256 struct hw_perf_event *hwc; 256 struct hw_perf_event *hwc;
257 257
258 if (!event)
259 continue;
260
258 if (!xscale1_pmnc_counter_has_overflowed(pmnc, idx)) 261 if (!xscale1_pmnc_counter_has_overflowed(pmnc, idx))
259 continue; 262 continue;
260 263
261 hwc = &event->hw; 264 hwc = &event->hw;
262 armpmu_event_update(event, hwc, idx, 1); 265 armpmu_event_update(event, hwc, idx);
263 data.period = event->hw.last_period; 266 data.period = event->hw.last_period;
264 if (!armpmu_event_set_period(event, hwc, idx)) 267 if (!armpmu_event_set_period(event, hwc, idx))
265 continue; 268 continue;
@@ -592,11 +595,14 @@ xscale2pmu_handle_irq(int irq_num, void *dev)
592 struct perf_event *event = cpuc->events[idx]; 595 struct perf_event *event = cpuc->events[idx];
593 struct hw_perf_event *hwc; 596 struct hw_perf_event *hwc;
594 597
595 if (!xscale2_pmnc_counter_has_overflowed(pmnc, idx)) 598 if (!event)
599 continue;
600
601 if (!xscale2_pmnc_counter_has_overflowed(of_flags, idx))
596 continue; 602 continue;
597 603
598 hwc = &event->hw; 604 hwc = &event->hw;
599 armpmu_event_update(event, hwc, idx, 1); 605 armpmu_event_update(event, hwc, idx);
600 data.period = event->hw.last_period; 606 data.period = event->hw.last_period;
601 if (!armpmu_event_set_period(event, hwc, idx)) 607 if (!armpmu_event_set_period(event, hwc, idx))
602 continue; 608 continue;
@@ -663,7 +669,7 @@ xscale2pmu_enable_event(struct hw_perf_event *hwc, int idx)
663static void 669static void
664xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx) 670xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
665{ 671{
666 unsigned long flags, ien, evtsel; 672 unsigned long flags, ien, evtsel, of_flags;
667 struct pmu_hw_events *events = cpu_pmu->get_hw_events(); 673 struct pmu_hw_events *events = cpu_pmu->get_hw_events();
668 674
669 ien = xscale2pmu_read_int_enable(); 675 ien = xscale2pmu_read_int_enable();
@@ -672,26 +678,31 @@ xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
672 switch (idx) { 678 switch (idx) {
673 case XSCALE_CYCLE_COUNTER: 679 case XSCALE_CYCLE_COUNTER:
674 ien &= ~XSCALE2_CCOUNT_INT_EN; 680 ien &= ~XSCALE2_CCOUNT_INT_EN;
681 of_flags = XSCALE2_CCOUNT_OVERFLOW;
675 break; 682 break;
676 case XSCALE_COUNTER0: 683 case XSCALE_COUNTER0:
677 ien &= ~XSCALE2_COUNT0_INT_EN; 684 ien &= ~XSCALE2_COUNT0_INT_EN;
678 evtsel &= ~XSCALE2_COUNT0_EVT_MASK; 685 evtsel &= ~XSCALE2_COUNT0_EVT_MASK;
679 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT0_EVT_SHFT; 686 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT0_EVT_SHFT;
687 of_flags = XSCALE2_COUNT0_OVERFLOW;
680 break; 688 break;
681 case XSCALE_COUNTER1: 689 case XSCALE_COUNTER1:
682 ien &= ~XSCALE2_COUNT1_INT_EN; 690 ien &= ~XSCALE2_COUNT1_INT_EN;
683 evtsel &= ~XSCALE2_COUNT1_EVT_MASK; 691 evtsel &= ~XSCALE2_COUNT1_EVT_MASK;
684 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT1_EVT_SHFT; 692 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT1_EVT_SHFT;
693 of_flags = XSCALE2_COUNT1_OVERFLOW;
685 break; 694 break;
686 case XSCALE_COUNTER2: 695 case XSCALE_COUNTER2:
687 ien &= ~XSCALE2_COUNT2_INT_EN; 696 ien &= ~XSCALE2_COUNT2_INT_EN;
688 evtsel &= ~XSCALE2_COUNT2_EVT_MASK; 697 evtsel &= ~XSCALE2_COUNT2_EVT_MASK;
689 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT2_EVT_SHFT; 698 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT2_EVT_SHFT;
699 of_flags = XSCALE2_COUNT2_OVERFLOW;
690 break; 700 break;
691 case XSCALE_COUNTER3: 701 case XSCALE_COUNTER3:
692 ien &= ~XSCALE2_COUNT3_INT_EN; 702 ien &= ~XSCALE2_COUNT3_INT_EN;
693 evtsel &= ~XSCALE2_COUNT3_EVT_MASK; 703 evtsel &= ~XSCALE2_COUNT3_EVT_MASK;
694 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT3_EVT_SHFT; 704 evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT3_EVT_SHFT;
705 of_flags = XSCALE2_COUNT3_OVERFLOW;
695 break; 706 break;
696 default: 707 default:
697 WARN_ONCE(1, "invalid counter number (%d)\n", idx); 708 WARN_ONCE(1, "invalid counter number (%d)\n", idx);
@@ -701,6 +712,7 @@ xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
701 raw_spin_lock_irqsave(&events->pmu_lock, flags); 712 raw_spin_lock_irqsave(&events->pmu_lock, flags);
702 xscale2pmu_write_event_select(evtsel); 713 xscale2pmu_write_event_select(evtsel);
703 xscale2pmu_write_int_enable(ien); 714 xscale2pmu_write_int_enable(ien);
715 xscale2pmu_write_overflow_flags(of_flags);
704 raw_spin_unlock_irqrestore(&events->pmu_lock, flags); 716 raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
705} 717}
706 718
diff --git a/arch/arm/mach-davinci/cpufreq.c b/arch/arm/mach-davinci/cpufreq.c
index 5bba7070f271..031048fec9f5 100644
--- a/arch/arm/mach-davinci/cpufreq.c
+++ b/arch/arm/mach-davinci/cpufreq.c
@@ -95,7 +95,7 @@ static int davinci_target(struct cpufreq_policy *policy,
95 if (freqs.old == freqs.new) 95 if (freqs.old == freqs.new)
96 return ret; 96 return ret;
97 97
98 dev_dbg(&cpufreq.dev, "transition: %u --> %u\n", freqs.old, freqs.new); 98 dev_dbg(cpufreq.dev, "transition: %u --> %u\n", freqs.old, freqs.new);
99 99
100 ret = cpufreq_frequency_table_target(policy, pdata->freq_table, 100 ret = cpufreq_frequency_table_target(policy, pdata->freq_table,
101 freqs.new, relation, &idx); 101 freqs.new, relation, &idx);
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 992c4c410185..b44dc844e15e 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -1026,7 +1026,7 @@ static int da850_round_armrate(struct clk *clk, unsigned long rate)
1026} 1026}
1027#endif 1027#endif
1028 1028
1029int da850_register_pm(struct platform_device *pdev) 1029int __init da850_register_pm(struct platform_device *pdev)
1030{ 1030{
1031 int ret; 1031 int ret;
1032 struct davinci_pm_config *pdata = pdev->dev.platform_data; 1032 struct davinci_pm_config *pdata = pdev->dev.platform_data;
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c
index da90103a313d..fd33919c95d4 100644
--- a/arch/arm/mach-davinci/dma.c
+++ b/arch/arm/mach-davinci/dma.c
@@ -1508,12 +1508,8 @@ static int __init edma_probe(struct platform_device *pdev)
1508 goto fail; 1508 goto fail;
1509 } 1509 }
1510 1510
1511 /* Everything lives on transfer controller 1 until otherwise
1512 * specified. This way, long transfers on the low priority queue
1513 * started by the codec engine will not cause audio defects.
1514 */
1515 for (i = 0; i < edma_cc[j]->num_channels; i++) 1511 for (i = 0; i < edma_cc[j]->num_channels; i++)
1516 map_dmach_queue(j, i, EVENTQ_1); 1512 map_dmach_queue(j, i, info[j]->default_queue);
1517 1513
1518 queue_tc_mapping = info[j]->queue_tc_mapping; 1514 queue_tc_mapping = info[j]->queue_tc_mapping;
1519 queue_priority_mapping = info[j]->queue_priority_mapping; 1515 queue_priority_mapping = info[j]->queue_priority_mapping;
diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/arch/arm/mach-davinci/include/mach/edma.h
index 20c77f29bf0f..7e84c906ceff 100644
--- a/arch/arm/mach-davinci/include/mach/edma.h
+++ b/arch/arm/mach-davinci/include/mach/edma.h
@@ -250,6 +250,11 @@ struct edma_soc_info {
250 unsigned n_slot; 250 unsigned n_slot;
251 unsigned n_tc; 251 unsigned n_tc;
252 unsigned n_cc; 252 unsigned n_cc;
253 /*
254 * Default queue is expected to be a low-priority queue.
255 * This way, long transfers on the default queue started
256 * by the codec engine will not cause audio defects.
257 */
253 enum dma_event_q default_queue; 258 enum dma_event_q default_queue;
254 259
255 /* Resource reservation for other cores */ 260 /* Resource reservation for other cores */
diff --git a/arch/arm/mach-ep93xx/vision_ep9307.c b/arch/arm/mach-ep93xx/vision_ep9307.c
index d5fb44f16d31..d67d0b4feb6f 100644
--- a/arch/arm/mach-ep93xx/vision_ep9307.c
+++ b/arch/arm/mach-ep93xx/vision_ep9307.c
@@ -34,6 +34,7 @@
34#include <mach/ep93xx_spi.h> 34#include <mach/ep93xx_spi.h>
35#include <mach/gpio-ep93xx.h> 35#include <mach/gpio-ep93xx.h>
36 36
37#include <asm/hardware/vic.h>
37#include <asm/mach-types.h> 38#include <asm/mach-types.h>
38#include <asm/mach/map.h> 39#include <asm/mach/map.h>
39#include <asm/mach/arch.h> 40#include <asm/mach/arch.h>
@@ -361,6 +362,7 @@ MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307")
361 .atag_offset = 0x100, 362 .atag_offset = 0x100,
362 .map_io = vision_map_io, 363 .map_io = vision_map_io,
363 .init_irq = ep93xx_init_irq, 364 .init_irq = ep93xx_init_irq,
365 .handle_irq = vic_handle_irq,
364 .timer = &ep93xx_timer, 366 .timer = &ep93xx_timer,
365 .init_machine = vision_init_machine, 367 .init_machine = vision_init_machine,
366 .restart = ep93xx_restart, 368 .restart = ep93xx_restart,
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index 44553933b144..02f086ddd518 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -13,6 +13,7 @@
13#include <linux/i2c.h> 13#include <linux/i2c.h>
14#include <linux/gpio_keys.h> 14#include <linux/gpio_keys.h>
15#include <linux/gpio.h> 15#include <linux/gpio.h>
16#include <linux/interrupt.h>
16#include <linux/fb.h> 17#include <linux/fb.h>
17#include <linux/mfd/max8998.h> 18#include <linux/mfd/max8998.h>
18#include <linux/regulator/machine.h> 19#include <linux/regulator/machine.h>
@@ -595,6 +596,7 @@ static struct mxt_platform_data qt602240_platform_data = {
595 .threshold = 0x28, 596 .threshold = 0x28,
596 .voltage = 2800000, /* 2.8V */ 597 .voltage = 2800000, /* 2.8V */
597 .orient = MXT_DIAGONAL, 598 .orient = MXT_DIAGONAL,
599 .irqflags = IRQF_TRIGGER_FALLING,
598}; 600};
599 601
600static struct i2c_board_info i2c3_devs[] __initdata = { 602static struct i2c_board_info i2c3_devs[] __initdata = {
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c
index 16f126da9f8f..2f3debe2a113 100644
--- a/arch/arm/mach-imx/mach-pcm038.c
+++ b/arch/arm/mach-imx/mach-pcm038.c
@@ -233,7 +233,7 @@ static struct regulator_init_data sdhc1_data = {
233 233
234static struct regulator_consumer_supply cam_consumers[] = { 234static struct regulator_consumer_supply cam_consumers[] = {
235 { 235 {
236 .dev = NULL, 236 .dev_name = NULL,
237 .supply = "imx_cam_vcc", 237 .supply = "imx_cam_vcc",
238 }, 238 },
239}; 239};
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index 8404ee72555a..6222151f55be 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -76,7 +76,7 @@ static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size,
76 return __arm_ioremap(phys_addr, size, mtype); 76 return __arm_ioremap(phys_addr, size, mtype);
77} 77}
78 78
79void imx3_init_l2x0(void) 79void __init imx3_init_l2x0(void)
80{ 80{
81 void __iomem *l2x0_base; 81 void __iomem *l2x0_base;
82 void __iomem *clkctl_base; 82 void __iomem *clkctl_base;
diff --git a/arch/arm/mach-lpc32xx/clock.c b/arch/arm/mach-lpc32xx/clock.c
index 473015ac07bd..f55c772d1816 100644
--- a/arch/arm/mach-lpc32xx/clock.c
+++ b/arch/arm/mach-lpc32xx/clock.c
@@ -82,6 +82,7 @@
82 * will also impact the individual peripheral rates. 82 * will also impact the individual peripheral rates.
83 */ 83 */
84 84
85#include <linux/export.h>
85#include <linux/kernel.h> 86#include <linux/kernel.h>
86#include <linux/list.h> 87#include <linux/list.h>
87#include <linux/errno.h> 88#include <linux/errno.h>
@@ -97,9 +98,10 @@
97#include "clock.h" 98#include "clock.h"
98#include "common.h" 99#include "common.h"
99 100
101static DEFINE_SPINLOCK(global_clkregs_lock);
102
100static struct clk clk_armpll; 103static struct clk clk_armpll;
101static struct clk clk_usbpll; 104static struct clk clk_usbpll;
102static DEFINE_MUTEX(clkm_lock);
103 105
104/* 106/*
105 * Post divider values for PLLs based on selected register value 107 * Post divider values for PLLs based on selected register value
@@ -127,7 +129,7 @@ static struct clk osc_32KHz = {
127static int local_pll397_enable(struct clk *clk, int enable) 129static int local_pll397_enable(struct clk *clk, int enable)
128{ 130{
129 u32 reg; 131 u32 reg;
130 unsigned long timeout = 1 + msecs_to_jiffies(10); 132 unsigned long timeout = jiffies + msecs_to_jiffies(10);
131 133
132 reg = __raw_readl(LPC32XX_CLKPWR_PLL397_CTRL); 134 reg = __raw_readl(LPC32XX_CLKPWR_PLL397_CTRL);
133 135
@@ -142,7 +144,7 @@ static int local_pll397_enable(struct clk *clk, int enable)
142 /* Wait for PLL397 lock */ 144 /* Wait for PLL397 lock */
143 while (((__raw_readl(LPC32XX_CLKPWR_PLL397_CTRL) & 145 while (((__raw_readl(LPC32XX_CLKPWR_PLL397_CTRL) &
144 LPC32XX_CLKPWR_SYSCTRL_PLL397_STS) == 0) && 146 LPC32XX_CLKPWR_SYSCTRL_PLL397_STS) == 0) &&
145 (timeout > jiffies)) 147 time_before(jiffies, timeout))
146 cpu_relax(); 148 cpu_relax();
147 149
148 if ((__raw_readl(LPC32XX_CLKPWR_PLL397_CTRL) & 150 if ((__raw_readl(LPC32XX_CLKPWR_PLL397_CTRL) &
@@ -156,7 +158,7 @@ static int local_pll397_enable(struct clk *clk, int enable)
156static int local_oscmain_enable(struct clk *clk, int enable) 158static int local_oscmain_enable(struct clk *clk, int enable)
157{ 159{
158 u32 reg; 160 u32 reg;
159 unsigned long timeout = 1 + msecs_to_jiffies(10); 161 unsigned long timeout = jiffies + msecs_to_jiffies(10);
160 162
161 reg = __raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL); 163 reg = __raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL);
162 164
@@ -171,7 +173,7 @@ static int local_oscmain_enable(struct clk *clk, int enable)
171 /* Wait for main oscillator to start */ 173 /* Wait for main oscillator to start */
172 while (((__raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL) & 174 while (((__raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL) &
173 LPC32XX_CLKPWR_MOSC_DISABLE) != 0) && 175 LPC32XX_CLKPWR_MOSC_DISABLE) != 0) &&
174 (timeout > jiffies)) 176 time_before(jiffies, timeout))
175 cpu_relax(); 177 cpu_relax();
176 178
177 if ((__raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL) & 179 if ((__raw_readl(LPC32XX_CLKPWR_MAIN_OSC_CTRL) &
@@ -383,7 +385,7 @@ static int local_usbpll_enable(struct clk *clk, int enable)
383{ 385{
384 u32 reg; 386 u32 reg;
385 int ret = -ENODEV; 387 int ret = -ENODEV;
386 unsigned long timeout = 1 + msecs_to_jiffies(10); 388 unsigned long timeout = jiffies + msecs_to_jiffies(10);
387 389
388 reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL); 390 reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);
389 391
@@ -396,7 +398,7 @@ static int local_usbpll_enable(struct clk *clk, int enable)
396 __raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL); 398 __raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL);
397 399
398 /* Wait for PLL lock */ 400 /* Wait for PLL lock */
399 while ((timeout > jiffies) & (ret == -ENODEV)) { 401 while (time_before(jiffies, timeout) && (ret == -ENODEV)) {
400 reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL); 402 reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);
401 if (reg & LPC32XX_CLKPWR_USBCTRL_PLL_STS) 403 if (reg & LPC32XX_CLKPWR_USBCTRL_PLL_STS)
402 ret = 0; 404 ret = 0;
@@ -926,20 +928,8 @@ static struct clk clk_lcd = {
926 .enable_mask = LPC32XX_CLKPWR_LCDCTRL_CLK_EN, 928 .enable_mask = LPC32XX_CLKPWR_LCDCTRL_CLK_EN,
927}; 929};
928 930
929static inline void clk_lock(void)
930{
931 mutex_lock(&clkm_lock);
932}
933
934static inline void clk_unlock(void)
935{
936 mutex_unlock(&clkm_lock);
937}
938
939static void local_clk_disable(struct clk *clk) 931static void local_clk_disable(struct clk *clk)
940{ 932{
941 WARN_ON(clk->usecount == 0);
942
943 /* Don't attempt to disable clock if it has no users */ 933 /* Don't attempt to disable clock if it has no users */
944 if (clk->usecount > 0) { 934 if (clk->usecount > 0) {
945 clk->usecount--; 935 clk->usecount--;
@@ -982,10 +972,11 @@ static int local_clk_enable(struct clk *clk)
982int clk_enable(struct clk *clk) 972int clk_enable(struct clk *clk)
983{ 973{
984 int ret; 974 int ret;
975 unsigned long flags;
985 976
986 clk_lock(); 977 spin_lock_irqsave(&global_clkregs_lock, flags);
987 ret = local_clk_enable(clk); 978 ret = local_clk_enable(clk);
988 clk_unlock(); 979 spin_unlock_irqrestore(&global_clkregs_lock, flags);
989 980
990 return ret; 981 return ret;
991} 982}
@@ -996,9 +987,11 @@ EXPORT_SYMBOL(clk_enable);
996 */ 987 */
997void clk_disable(struct clk *clk) 988void clk_disable(struct clk *clk)
998{ 989{
999 clk_lock(); 990 unsigned long flags;
991
992 spin_lock_irqsave(&global_clkregs_lock, flags);
1000 local_clk_disable(clk); 993 local_clk_disable(clk);
1001 clk_unlock(); 994 spin_unlock_irqrestore(&global_clkregs_lock, flags);
1002} 995}
1003EXPORT_SYMBOL(clk_disable); 996EXPORT_SYMBOL(clk_disable);
1004 997
@@ -1007,13 +1000,7 @@ EXPORT_SYMBOL(clk_disable);
1007 */ 1000 */
1008unsigned long clk_get_rate(struct clk *clk) 1001unsigned long clk_get_rate(struct clk *clk)
1009{ 1002{
1010 unsigned long rate; 1003 return clk->get_rate(clk);
1011
1012 clk_lock();
1013 rate = clk->get_rate(clk);
1014 clk_unlock();
1015
1016 return rate;
1017} 1004}
1018EXPORT_SYMBOL(clk_get_rate); 1005EXPORT_SYMBOL(clk_get_rate);
1019 1006
@@ -1029,11 +1016,8 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
1029 * the actual rate set as part of the peripheral dividers 1016 * the actual rate set as part of the peripheral dividers
1030 * instead of high level clock control 1017 * instead of high level clock control
1031 */ 1018 */
1032 if (clk->set_rate) { 1019 if (clk->set_rate)
1033 clk_lock();
1034 ret = clk->set_rate(clk, rate); 1020 ret = clk->set_rate(clk, rate);
1035 clk_unlock();
1036 }
1037 1021
1038 return ret; 1022 return ret;
1039} 1023}
@@ -1044,15 +1028,11 @@ EXPORT_SYMBOL(clk_set_rate);
1044 */ 1028 */
1045long clk_round_rate(struct clk *clk, unsigned long rate) 1029long clk_round_rate(struct clk *clk, unsigned long rate)
1046{ 1030{
1047 clk_lock();
1048
1049 if (clk->round_rate) 1031 if (clk->round_rate)
1050 rate = clk->round_rate(clk, rate); 1032 rate = clk->round_rate(clk, rate);
1051 else 1033 else
1052 rate = clk->get_rate(clk); 1034 rate = clk->get_rate(clk);
1053 1035
1054 clk_unlock();
1055
1056 return rate; 1036 return rate;
1057} 1037}
1058EXPORT_SYMBOL(clk_round_rate); 1038EXPORT_SYMBOL(clk_round_rate);
@@ -1111,10 +1091,10 @@ static struct clk_lookup lookups[] = {
1111 _REGISTER_CLOCK("lpc32xx_keys.0", NULL, clk_kscan) 1091 _REGISTER_CLOCK("lpc32xx_keys.0", NULL, clk_kscan)
1112 _REGISTER_CLOCK("lpc32xx-nand.0", "nand_ck", clk_nand) 1092 _REGISTER_CLOCK("lpc32xx-nand.0", "nand_ck", clk_nand)
1113 _REGISTER_CLOCK("lpc32xx-adc", NULL, clk_adc) 1093 _REGISTER_CLOCK("lpc32xx-adc", NULL, clk_adc)
1114 _REGISTER_CLOCK("tbd", "i2s0_ck", clk_i2s0) 1094 _REGISTER_CLOCK(NULL, "i2s0_ck", clk_i2s0)
1115 _REGISTER_CLOCK("tbd", "i2s1_ck", clk_i2s1) 1095 _REGISTER_CLOCK(NULL, "i2s1_ck", clk_i2s1)
1116 _REGISTER_CLOCK("ts-lpc32xx", NULL, clk_tsc) 1096 _REGISTER_CLOCK("ts-lpc32xx", NULL, clk_tsc)
1117 _REGISTER_CLOCK("dev:mmc0", "MCLK", clk_mmc) 1097 _REGISTER_CLOCK("dev:mmc0", NULL, clk_mmc)
1118 _REGISTER_CLOCK("lpc-net.0", NULL, clk_net) 1098 _REGISTER_CLOCK("lpc-net.0", NULL, clk_net)
1119 _REGISTER_CLOCK("dev:clcd", NULL, clk_lcd) 1099 _REGISTER_CLOCK("dev:clcd", NULL, clk_lcd)
1120 _REGISTER_CLOCK("lpc32xx_udc", "ck_usbd", clk_usbd) 1100 _REGISTER_CLOCK("lpc32xx_udc", "ck_usbd", clk_usbd)
diff --git a/arch/arm/mach-lpc32xx/common.h b/arch/arm/mach-lpc32xx/common.h
index 04b72739eb9c..68f2e46d98ad 100644
--- a/arch/arm/mach-lpc32xx/common.h
+++ b/arch/arm/mach-lpc32xx/common.h
@@ -66,7 +66,6 @@ extern u32 clk_get_pclk_div(void);
66 */ 66 */
67extern void lpc32xx_get_uid(u32 devid[4]); 67extern void lpc32xx_get_uid(u32 devid[4]);
68 68
69extern void lpc32xx_watchdog_reset(void);
70extern u32 lpc32xx_return_iram_size(void); 69extern u32 lpc32xx_return_iram_size(void);
71 70
72/* 71/*
diff --git a/arch/arm/mach-lpc32xx/include/mach/platform.h b/arch/arm/mach-lpc32xx/include/mach/platform.h
index 14ea8d1aadb5..c584f5bb164f 100644
--- a/arch/arm/mach-lpc32xx/include/mach/platform.h
+++ b/arch/arm/mach-lpc32xx/include/mach/platform.h
@@ -591,42 +591,42 @@
591/* 591/*
592 * Timer/counter register offsets 592 * Timer/counter register offsets
593 */ 593 */
594#define LCP32XX_TIMER_IR(x) io_p2v((x) + 0x00) 594#define LPC32XX_TIMER_IR(x) io_p2v((x) + 0x00)
595#define LCP32XX_TIMER_TCR(x) io_p2v((x) + 0x04) 595#define LPC32XX_TIMER_TCR(x) io_p2v((x) + 0x04)
596#define LCP32XX_TIMER_TC(x) io_p2v((x) + 0x08) 596#define LPC32XX_TIMER_TC(x) io_p2v((x) + 0x08)
597#define LCP32XX_TIMER_PR(x) io_p2v((x) + 0x0C) 597#define LPC32XX_TIMER_PR(x) io_p2v((x) + 0x0C)
598#define LCP32XX_TIMER_PC(x) io_p2v((x) + 0x10) 598#define LPC32XX_TIMER_PC(x) io_p2v((x) + 0x10)
599#define LCP32XX_TIMER_MCR(x) io_p2v((x) + 0x14) 599#define LPC32XX_TIMER_MCR(x) io_p2v((x) + 0x14)
600#define LCP32XX_TIMER_MR0(x) io_p2v((x) + 0x18) 600#define LPC32XX_TIMER_MR0(x) io_p2v((x) + 0x18)
601#define LCP32XX_TIMER_MR1(x) io_p2v((x) + 0x1C) 601#define LPC32XX_TIMER_MR1(x) io_p2v((x) + 0x1C)
602#define LCP32XX_TIMER_MR2(x) io_p2v((x) + 0x20) 602#define LPC32XX_TIMER_MR2(x) io_p2v((x) + 0x20)
603#define LCP32XX_TIMER_MR3(x) io_p2v((x) + 0x24) 603#define LPC32XX_TIMER_MR3(x) io_p2v((x) + 0x24)
604#define LCP32XX_TIMER_CCR(x) io_p2v((x) + 0x28) 604#define LPC32XX_TIMER_CCR(x) io_p2v((x) + 0x28)
605#define LCP32XX_TIMER_CR0(x) io_p2v((x) + 0x2C) 605#define LPC32XX_TIMER_CR0(x) io_p2v((x) + 0x2C)
606#define LCP32XX_TIMER_CR1(x) io_p2v((x) + 0x30) 606#define LPC32XX_TIMER_CR1(x) io_p2v((x) + 0x30)
607#define LCP32XX_TIMER_CR2(x) io_p2v((x) + 0x34) 607#define LPC32XX_TIMER_CR2(x) io_p2v((x) + 0x34)
608#define LCP32XX_TIMER_CR3(x) io_p2v((x) + 0x38) 608#define LPC32XX_TIMER_CR3(x) io_p2v((x) + 0x38)
609#define LCP32XX_TIMER_EMR(x) io_p2v((x) + 0x3C) 609#define LPC32XX_TIMER_EMR(x) io_p2v((x) + 0x3C)
610#define LCP32XX_TIMER_CTCR(x) io_p2v((x) + 0x70) 610#define LPC32XX_TIMER_CTCR(x) io_p2v((x) + 0x70)
611 611
612/* 612/*
613 * ir register definitions 613 * ir register definitions
614 */ 614 */
615#define LCP32XX_TIMER_CNTR_MTCH_BIT(n) (1 << ((n) & 0x3)) 615#define LPC32XX_TIMER_CNTR_MTCH_BIT(n) (1 << ((n) & 0x3))
616#define LCP32XX_TIMER_CNTR_CAPT_BIT(n) (1 << (4 + ((n) & 0x3))) 616#define LPC32XX_TIMER_CNTR_CAPT_BIT(n) (1 << (4 + ((n) & 0x3)))
617 617
618/* 618/*
619 * tcr register definitions 619 * tcr register definitions
620 */ 620 */
621#define LCP32XX_TIMER_CNTR_TCR_EN 0x1 621#define LPC32XX_TIMER_CNTR_TCR_EN 0x1
622#define LCP32XX_TIMER_CNTR_TCR_RESET 0x2 622#define LPC32XX_TIMER_CNTR_TCR_RESET 0x2
623 623
624/* 624/*
625 * mcr register definitions 625 * mcr register definitions
626 */ 626 */
627#define LCP32XX_TIMER_CNTR_MCR_MTCH(n) (0x1 << ((n) * 3)) 627#define LPC32XX_TIMER_CNTR_MCR_MTCH(n) (0x1 << ((n) * 3))
628#define LCP32XX_TIMER_CNTR_MCR_RESET(n) (0x1 << (((n) * 3) + 1)) 628#define LPC32XX_TIMER_CNTR_MCR_RESET(n) (0x1 << (((n) * 3) + 1))
629#define LCP32XX_TIMER_CNTR_MCR_STOP(n) (0x1 << (((n) * 3) + 2)) 629#define LPC32XX_TIMER_CNTR_MCR_STOP(n) (0x1 << (((n) * 3) + 2))
630 630
631/* 631/*
632 * Standard UART register offsets 632 * Standard UART register offsets
@@ -690,5 +690,8 @@
690#define LPC32XX_GPIO_P1_MUX_SET _GPREG(0x130) 690#define LPC32XX_GPIO_P1_MUX_SET _GPREG(0x130)
691#define LPC32XX_GPIO_P1_MUX_CLR _GPREG(0x134) 691#define LPC32XX_GPIO_P1_MUX_CLR _GPREG(0x134)
692#define LPC32XX_GPIO_P1_MUX_STATE _GPREG(0x138) 692#define LPC32XX_GPIO_P1_MUX_STATE _GPREG(0x138)
693#define LPC32XX_GPIO_P2_MUX_SET _GPREG(0x028)
694#define LPC32XX_GPIO_P2_MUX_CLR _GPREG(0x02C)
695#define LPC32XX_GPIO_P2_MUX_STATE _GPREG(0x030)
693 696
694#endif 697#endif
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c
index a539f4f72f28..0d79a3f8a5e0 100644
--- a/arch/arm/mach-lpc32xx/phy3250.c
+++ b/arch/arm/mach-lpc32xx/phy3250.c
@@ -247,6 +247,8 @@ static struct platform_device lpc32xx_gpio_led_device = {
247}; 247};
248 248
249static struct platform_device *phy3250_devs[] __initdata = { 249static struct platform_device *phy3250_devs[] __initdata = {
250 &lpc32xx_rtc_device,
251 &lpc32xx_tsc_device,
250 &lpc32xx_i2c0_device, 252 &lpc32xx_i2c0_device,
251 &lpc32xx_i2c1_device, 253 &lpc32xx_i2c1_device,
252 &lpc32xx_i2c2_device, 254 &lpc32xx_i2c2_device,
diff --git a/arch/arm/mach-lpc32xx/pm.c b/arch/arm/mach-lpc32xx/pm.c
index b9c80597b7bf..207e81275ff0 100644
--- a/arch/arm/mach-lpc32xx/pm.c
+++ b/arch/arm/mach-lpc32xx/pm.c
@@ -13,7 +13,7 @@
13/* 13/*
14 * LPC32XX CPU and system power management 14 * LPC32XX CPU and system power management
15 * 15 *
16 * The LCP32XX has three CPU modes for controlling system power: run, 16 * The LPC32XX has three CPU modes for controlling system power: run,
17 * direct-run, and halt modes. When switching between halt and run modes, 17 * direct-run, and halt modes. When switching between halt and run modes,
18 * the CPU transistions through direct-run mode. For Linux, direct-run 18 * the CPU transistions through direct-run mode. For Linux, direct-run
19 * mode is not used in normal operation. Halt mode is used when the 19 * mode is not used in normal operation. Halt mode is used when the
diff --git a/arch/arm/mach-lpc32xx/timer.c b/arch/arm/mach-lpc32xx/timer.c
index b42c909bbeeb..c40667c33161 100644
--- a/arch/arm/mach-lpc32xx/timer.c
+++ b/arch/arm/mach-lpc32xx/timer.c
@@ -34,11 +34,11 @@
34static int lpc32xx_clkevt_next_event(unsigned long delta, 34static int lpc32xx_clkevt_next_event(unsigned long delta,
35 struct clock_event_device *dev) 35 struct clock_event_device *dev)
36{ 36{
37 __raw_writel(LCP32XX_TIMER_CNTR_TCR_RESET, 37 __raw_writel(LPC32XX_TIMER_CNTR_TCR_RESET,
38 LCP32XX_TIMER_TCR(LPC32XX_TIMER0_BASE)); 38 LPC32XX_TIMER_TCR(LPC32XX_TIMER0_BASE));
39 __raw_writel(delta, LCP32XX_TIMER_PR(LPC32XX_TIMER0_BASE)); 39 __raw_writel(delta, LPC32XX_TIMER_PR(LPC32XX_TIMER0_BASE));
40 __raw_writel(LCP32XX_TIMER_CNTR_TCR_EN, 40 __raw_writel(LPC32XX_TIMER_CNTR_TCR_EN,
41 LCP32XX_TIMER_TCR(LPC32XX_TIMER0_BASE)); 41 LPC32XX_TIMER_TCR(LPC32XX_TIMER0_BASE));
42 42
43 return 0; 43 return 0;
44} 44}
@@ -58,7 +58,7 @@ static void lpc32xx_clkevt_mode(enum clock_event_mode mode,
58 * disable the timer to wait for the first call to 58 * disable the timer to wait for the first call to
59 * set_next_event(). 59 * set_next_event().
60 */ 60 */
61 __raw_writel(0, LCP32XX_TIMER_TCR(LPC32XX_TIMER0_BASE)); 61 __raw_writel(0, LPC32XX_TIMER_TCR(LPC32XX_TIMER0_BASE));
62 break; 62 break;
63 63
64 case CLOCK_EVT_MODE_UNUSED: 64 case CLOCK_EVT_MODE_UNUSED:
@@ -81,8 +81,8 @@ static irqreturn_t lpc32xx_timer_interrupt(int irq, void *dev_id)
81 struct clock_event_device *evt = &lpc32xx_clkevt; 81 struct clock_event_device *evt = &lpc32xx_clkevt;
82 82
83 /* Clear match */ 83 /* Clear match */
84 __raw_writel(LCP32XX_TIMER_CNTR_MTCH_BIT(0), 84 __raw_writel(LPC32XX_TIMER_CNTR_MTCH_BIT(0),
85 LCP32XX_TIMER_IR(LPC32XX_TIMER0_BASE)); 85 LPC32XX_TIMER_IR(LPC32XX_TIMER0_BASE));
86 86
87 evt->event_handler(evt); 87 evt->event_handler(evt);
88 88
@@ -128,14 +128,14 @@ static void __init lpc32xx_timer_init(void)
128 clkrate = clkrate / clk_get_pclk_div(); 128 clkrate = clkrate / clk_get_pclk_div();
129 129
130 /* Initial timer setup */ 130 /* Initial timer setup */
131 __raw_writel(0, LCP32XX_TIMER_TCR(LPC32XX_TIMER0_BASE)); 131 __raw_writel(0, LPC32XX_TIMER_TCR(LPC32XX_TIMER0_BASE));
132 __raw_writel(LCP32XX_TIMER_CNTR_MTCH_BIT(0), 132 __raw_writel(LPC32XX_TIMER_CNTR_MTCH_BIT(0),
133 LCP32XX_TIMER_IR(LPC32XX_TIMER0_BASE)); 133 LPC32XX_TIMER_IR(LPC32XX_TIMER0_BASE));
134 __raw_writel(1, LCP32XX_TIMER_MR0(LPC32XX_TIMER0_BASE)); 134 __raw_writel(1, LPC32XX_TIMER_MR0(LPC32XX_TIMER0_BASE));
135 __raw_writel(LCP32XX_TIMER_CNTR_MCR_MTCH(0) | 135 __raw_writel(LPC32XX_TIMER_CNTR_MCR_MTCH(0) |
136 LCP32XX_TIMER_CNTR_MCR_STOP(0) | 136 LPC32XX_TIMER_CNTR_MCR_STOP(0) |
137 LCP32XX_TIMER_CNTR_MCR_RESET(0), 137 LPC32XX_TIMER_CNTR_MCR_RESET(0),
138 LCP32XX_TIMER_MCR(LPC32XX_TIMER0_BASE)); 138 LPC32XX_TIMER_MCR(LPC32XX_TIMER0_BASE));
139 139
140 /* Setup tick interrupt */ 140 /* Setup tick interrupt */
141 setup_irq(IRQ_LPC32XX_TIMER0, &lpc32xx_timer_irq); 141 setup_irq(IRQ_LPC32XX_TIMER0, &lpc32xx_timer_irq);
@@ -151,14 +151,14 @@ static void __init lpc32xx_timer_init(void)
151 clockevents_register_device(&lpc32xx_clkevt); 151 clockevents_register_device(&lpc32xx_clkevt);
152 152
153 /* Use timer1 as clock source. */ 153 /* Use timer1 as clock source. */
154 __raw_writel(LCP32XX_TIMER_CNTR_TCR_RESET, 154 __raw_writel(LPC32XX_TIMER_CNTR_TCR_RESET,
155 LCP32XX_TIMER_TCR(LPC32XX_TIMER1_BASE)); 155 LPC32XX_TIMER_TCR(LPC32XX_TIMER1_BASE));
156 __raw_writel(0, LCP32XX_TIMER_PR(LPC32XX_TIMER1_BASE)); 156 __raw_writel(0, LPC32XX_TIMER_PR(LPC32XX_TIMER1_BASE));
157 __raw_writel(0, LCP32XX_TIMER_MCR(LPC32XX_TIMER1_BASE)); 157 __raw_writel(0, LPC32XX_TIMER_MCR(LPC32XX_TIMER1_BASE));
158 __raw_writel(LCP32XX_TIMER_CNTR_TCR_EN, 158 __raw_writel(LPC32XX_TIMER_CNTR_TCR_EN,
159 LCP32XX_TIMER_TCR(LPC32XX_TIMER1_BASE)); 159 LPC32XX_TIMER_TCR(LPC32XX_TIMER1_BASE));
160 160
161 clocksource_mmio_init(LCP32XX_TIMER_TC(LPC32XX_TIMER1_BASE), 161 clocksource_mmio_init(LPC32XX_TIMER_TC(LPC32XX_TIMER1_BASE),
162 "lpc32xx_clksrc", clkrate, 300, 32, clocksource_mmio_readl_up); 162 "lpc32xx_clksrc", clkrate, 300, 32, clocksource_mmio_readl_up);
163} 163}
164 164
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index 8e55b6fb3478..55a8f582d04c 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -118,7 +118,7 @@ void __init omap16xx_map_io(void)
118/* 118/*
119 * Common low-level hardware init for omap1. 119 * Common low-level hardware init for omap1.
120 */ 120 */
121void omap1_init_early(void) 121void __init omap1_init_early(void)
122{ 122{
123 omap_check_revision(); 123 omap_check_revision();
124 124
diff --git a/arch/arm/mach-omap1/lcd_dma.c b/arch/arm/mach-omap1/lcd_dma.c
index 453809359ba6..4c5ce7d829c2 100644
--- a/arch/arm/mach-omap1/lcd_dma.c
+++ b/arch/arm/mach-omap1/lcd_dma.c
@@ -117,7 +117,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_mirror);
117void omap_set_lcd_dma_b1_vxres(unsigned long vxres) 117void omap_set_lcd_dma_b1_vxres(unsigned long vxres)
118{ 118{
119 if (cpu_is_omap15xx()) { 119 if (cpu_is_omap15xx()) {
120 printk(KERN_ERR "DMA virtual resulotion is not supported " 120 printk(KERN_ERR "DMA virtual resolution is not supported "
121 "in 1510 mode\n"); 121 "in 1510 mode\n");
122 BUG(); 122 BUG();
123 } 123 }
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 56a6e98652cc..f1096172b9bb 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -265,6 +265,8 @@ obj-y += $(smc91x-m) $(smc91x-y)
265 265
266smsc911x-$(CONFIG_SMSC911X) := gpmc-smsc911x.o 266smsc911x-$(CONFIG_SMSC911X) := gpmc-smsc911x.o
267obj-y += $(smsc911x-m) $(smsc911x-y) 267obj-y += $(smsc911x-m) $(smsc911x-y)
268obj-$(CONFIG_ARCH_OMAP4) += hwspinlock.o 268ifneq ($(CONFIG_HWSPINLOCK_OMAP),)
269obj-y += hwspinlock.o
270endif
269 271
270obj-y += common-board-devices.o twl-common.o 272obj-y += common-board-devices.o twl-common.o
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 7370983f809f..c8bda62900d8 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -279,7 +279,7 @@ static void __init omap_2430sdp_init(void)
279 platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices)); 279 platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices));
280 omap_serial_init(); 280 omap_serial_init();
281 omap_sdrc_init(NULL, NULL); 281 omap_sdrc_init(NULL, NULL);
282 omap2_hsmmc_init(mmc); 282 omap_hsmmc_init(mmc);
283 omap2_usbfs_init(&sdp2430_usb_config); 283 omap2_usbfs_init(&sdp2430_usb_config);
284 284
285 omap_mux_init_signal("usb0hs_stp", OMAP_PULL_ENA | OMAP_PULL_UP); 285 omap_mux_init_signal("usb0hs_stp", OMAP_PULL_ENA | OMAP_PULL_UP);
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 383717ba63b9..da75f239873e 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -232,11 +232,13 @@ static struct omap2_hsmmc_info mmc[] = {
232 */ 232 */
233 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, 233 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
234 .gpio_wp = 4, 234 .gpio_wp = 4,
235 .deferred = true,
235 }, 236 },
236 { 237 {
237 .mmc = 2, 238 .mmc = 2,
238 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, 239 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
239 .gpio_wp = 7, 240 .gpio_wp = 7,
241 .deferred = true,
240 }, 242 },
241 {} /* Terminator */ 243 {} /* Terminator */
242}; 244};
@@ -249,7 +251,7 @@ static int sdp3430_twl_gpio_setup(struct device *dev,
249 */ 251 */
250 mmc[0].gpio_cd = gpio + 0; 252 mmc[0].gpio_cd = gpio + 0;
251 mmc[1].gpio_cd = gpio + 1; 253 mmc[1].gpio_cd = gpio + 1;
252 omap2_hsmmc_init(mmc); 254 omap_hsmmc_late_init(mmc);
253 255
254 /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */ 256 /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
255 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl"); 257 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");
@@ -606,6 +608,7 @@ static void __init omap_3430sdp_init(void)
606 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 608 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
607 omap_board_config = sdp3430_config; 609 omap_board_config = sdp3430_config;
608 omap_board_config_size = ARRAY_SIZE(sdp3430_config); 610 omap_board_config_size = ARRAY_SIZE(sdp3430_config);
611 omap_hsmmc_init(mmc);
609 omap3430_i2c_init(); 612 omap3430_i2c_init();
610 omap_display_init(&sdp3430_dss_data); 613 omap_display_init(&sdp3430_dss_data);
611 if (omap_rev() > OMAP3430_REV_ES1_0) 614 if (omap_rev() > OMAP3430_REV_ES1_0)
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 4e9071589bfb..09ae257e86fd 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -491,9 +491,9 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)
491{ 491{
492 struct omap2_hsmmc_info *c; 492 struct omap2_hsmmc_info *c;
493 493
494 omap2_hsmmc_init(controllers); 494 omap_hsmmc_init(controllers);
495 for (c = controllers; c->mmc; c++) 495 for (c = controllers; c->mmc; c++)
496 omap4_twl6030_hsmmc_set_late_init(c->dev); 496 omap4_twl6030_hsmmc_set_late_init(&c->pdev->dev);
497 497
498 return 0; 498 return 0;
499} 499}
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 4b1cfe32e6ba..71138a1271d8 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -504,7 +504,7 @@ static void __init am3517_evm_init(void)
504 am3517_evm_musb_init(); 504 am3517_evm_musb_init();
505 505
506 /* MMC init function */ 506 /* MMC init function */
507 omap2_hsmmc_init(mmc); 507 omap_hsmmc_init(mmc);
508} 508}
509 509
510MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") 510MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index d73316ed4207..49e64057cb67 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -413,7 +413,7 @@ static struct omap2_hsmmc_info mmc[] = {
413 .caps = MMC_CAP_4_BIT_DATA, 413 .caps = MMC_CAP_4_BIT_DATA,
414 .gpio_cd = -EINVAL, 414 .gpio_cd = -EINVAL,
415 .gpio_wp = -EINVAL, 415 .gpio_wp = -EINVAL,
416 416 .deferred = true,
417 }, 417 },
418 { 418 {
419 .mmc = 2, 419 .mmc = 2,
@@ -471,7 +471,7 @@ static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
471 471
472 /* gpio + 0 is "mmc0_cd" (input/IRQ) */ 472 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
473 mmc[0].gpio_cd = gpio + 0; 473 mmc[0].gpio_cd = gpio + 0;
474 omap2_hsmmc_init(mmc); 474 omap_hsmmc_late_init(mmc);
475 475
476 return 0; 476 return 0;
477} 477}
@@ -639,6 +639,7 @@ static void __init cm_t3x_common_init(void)
639 omap_serial_init(); 639 omap_serial_init();
640 omap_sdrc_init(mt46h32m32lf6_sdrc_params, 640 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
641 mt46h32m32lf6_sdrc_params); 641 mt46h32m32lf6_sdrc_params);
642 omap_hsmmc_init(mmc);
642 cm_t35_init_i2c(); 643 cm_t35_init_i2c();
643 omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL); 644 omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL);
644 cm_t35_init_ethernet(); 645 cm_t35_init_ethernet();
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index e873063f4fda..11cd2a806093 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -100,6 +100,7 @@ static struct omap2_hsmmc_info mmc[] = {
100 .mmc = 1, 100 .mmc = 1,
101 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, 101 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
102 .gpio_wp = 29, 102 .gpio_wp = 29,
103 .deferred = true,
103 }, 104 },
104 {} /* Terminator */ 105 {} /* Terminator */
105}; 106};
@@ -228,7 +229,7 @@ static int devkit8000_twl_gpio_setup(struct device *dev,
228 229
229 /* gpio + 0 is "mmc0_cd" (input/IRQ) */ 230 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
230 mmc[0].gpio_cd = gpio + 0; 231 mmc[0].gpio_cd = gpio + 0;
231 omap2_hsmmc_init(mmc); 232 omap_hsmmc_late_init(mmc);
232 233
233 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ 234 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
234 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; 235 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
@@ -636,6 +637,7 @@ static void __init devkit8000_init(void)
636 637
637 omap_dm9000_init(); 638 omap_dm9000_init();
638 639
640 omap_hsmmc_init(mmc);
639 devkit8000_i2c_init(); 641 devkit8000_i2c_init();
640 platform_add_devices(devkit8000_devices, 642 platform_add_devices(devkit8000_devices,
641 ARRAY_SIZE(devkit8000_devices)); 643 ARRAY_SIZE(devkit8000_devices));
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index 30a6f527510c..0349fd2b68d8 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -189,7 +189,7 @@ unmap:
189 * 189 *
190 * @return - void. 190 * @return - void.
191 */ 191 */
192void board_flash_init(struct flash_partitions partition_info[], 192void __init board_flash_init(struct flash_partitions partition_info[],
193 char chip_sel_board[][GPMC_CS_NUM], int nand_type) 193 char chip_sel_board[][GPMC_CS_NUM], int nand_type)
194{ 194{
195 u8 cs = 0; 195 u8 cs = 0;
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index a59ace0ed560..e558800adfdf 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -295,6 +295,7 @@ static struct omap2_hsmmc_info mmc[] = {
295 .caps = MMC_CAP_4_BIT_DATA, 295 .caps = MMC_CAP_4_BIT_DATA,
296 .gpio_cd = -EINVAL, 296 .gpio_cd = -EINVAL,
297 .gpio_wp = -EINVAL, 297 .gpio_wp = -EINVAL,
298 .deferred = true,
298 }, 299 },
299#if defined(CONFIG_LIBERTAS_SDIO) || defined(CONFIG_LIBERTAS_SDIO_MODULE) 300#if defined(CONFIG_LIBERTAS_SDIO) || defined(CONFIG_LIBERTAS_SDIO_MODULE)
300 { 301 {
@@ -402,7 +403,7 @@ static int igep_twl_gpio_setup(struct device *dev,
402 403
403 /* gpio + 0 is "mmc0_cd" (input/IRQ) */ 404 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
404 mmc[0].gpio_cd = gpio + 0; 405 mmc[0].gpio_cd = gpio + 0;
405 omap2_hsmmc_init(mmc); 406 omap_hsmmc_late_init(mmc);
406 407
407 /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */ 408 /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
408#if !defined(CONFIG_LEDS_GPIO) && !defined(CONFIG_LEDS_GPIO_MODULE) 409#if !defined(CONFIG_LEDS_GPIO) && !defined(CONFIG_LEDS_GPIO_MODULE)
@@ -639,6 +640,9 @@ static void __init igep_init(void)
639 640
640 /* Get IGEP2 hardware revision */ 641 /* Get IGEP2 hardware revision */
641 igep2_get_revision(); 642 igep2_get_revision();
643
644 omap_hsmmc_init(mmc);
645
642 /* Register I2C busses and drivers */ 646 /* Register I2C busses and drivers */
643 igep_i2c_init(); 647 igep_i2c_init();
644 platform_add_devices(igep_devices, ARRAY_SIZE(igep_devices)); 648 platform_add_devices(igep_devices, ARRAY_SIZE(igep_devices));
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 2d2a61f7dcbf..d50a562adfa0 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -27,7 +27,6 @@
27#include <linux/io.h> 27#include <linux/io.h>
28#include <linux/smsc911x.h> 28#include <linux/smsc911x.h>
29#include <linux/mmc/host.h> 29#include <linux/mmc/host.h>
30#include <linux/gpio.h>
31 30
32#include <mach/hardware.h> 31#include <mach/hardware.h>
33#include <asm/mach-types.h> 32#include <asm/mach-types.h>
@@ -424,7 +423,7 @@ static void __init omap_ldp_init(void)
424 board_nand_init(ldp_nand_partitions, 423 board_nand_init(ldp_nand_partitions,
425 ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0); 424 ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0);
426 425
427 omap2_hsmmc_init(mmc); 426 omap_hsmmc_init(mmc);
428 ldp_display_init(); 427 ldp_display_init();
429} 428}
430 429
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 672262717601..50e40bc3f8f7 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -36,10 +36,6 @@
36 36
37#include "mux.h" 37#include "mux.h"
38 38
39static int slot1_cover_open;
40static int slot2_cover_open;
41static struct device *mmc_device;
42
43#define TUSB6010_ASYNC_CS 1 39#define TUSB6010_ASYNC_CS 1
44#define TUSB6010_SYNC_CS 4 40#define TUSB6010_SYNC_CS 4
45#define TUSB6010_GPIO_INT 58 41#define TUSB6010_GPIO_INT 58
@@ -211,6 +207,10 @@ static struct omap_onenand_platform_data board_onenand_data[] = {
211#define N810_EMMC_VSD_GPIO 23 207#define N810_EMMC_VSD_GPIO 23
212#define N810_EMMC_VIO_GPIO 9 208#define N810_EMMC_VIO_GPIO 9
213 209
210static int slot1_cover_open;
211static int slot2_cover_open;
212static struct device *mmc_device;
213
214static int n8x0_mmc_switch_slot(struct device *dev, int slot) 214static int n8x0_mmc_switch_slot(struct device *dev, int slot)
215{ 215{
216#ifdef CONFIG_MMC_DEBUG 216#ifdef CONFIG_MMC_DEBUG
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 7ffcd2839e7b..7be8d659d91d 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -253,6 +253,7 @@ static struct omap2_hsmmc_info mmc[] = {
253 .mmc = 1, 253 .mmc = 1,
254 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, 254 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
255 .gpio_wp = -EINVAL, 255 .gpio_wp = -EINVAL,
256 .deferred = true,
256 }, 257 },
257 {} /* Terminator */ 258 {} /* Terminator */
258}; 259};
@@ -272,12 +273,10 @@ static int beagle_twl_gpio_setup(struct device *dev,
272{ 273{
273 int r; 274 int r;
274 275
275 if (beagle_config.mmc1_gpio_wp != -EINVAL)
276 omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT);
277 mmc[0].gpio_wp = beagle_config.mmc1_gpio_wp; 276 mmc[0].gpio_wp = beagle_config.mmc1_gpio_wp;
278 /* gpio + 0 is "mmc0_cd" (input/IRQ) */ 277 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
279 mmc[0].gpio_cd = gpio + 0; 278 mmc[0].gpio_cd = gpio + 0;
280 omap2_hsmmc_init(mmc); 279 omap_hsmmc_late_init(mmc);
281 280
282 /* 281 /*
283 * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active 282 * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active
@@ -521,6 +520,11 @@ static void __init omap3_beagle_init(void)
521{ 520{
522 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 521 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
523 omap3_beagle_init_rev(); 522 omap3_beagle_init_rev();
523
524 if (beagle_config.mmc1_gpio_wp != -EINVAL)
525 omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT);
526 omap_hsmmc_init(mmc);
527
524 omap3_beagle_i2c_init(); 528 omap3_beagle_i2c_init();
525 529
526 gpio_buttons[0].gpio = beagle_config.usr_button_gpio; 530 gpio_buttons[0].gpio = beagle_config.usr_button_gpio;
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index c877236a8442..a659e198892b 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -317,6 +317,7 @@ static struct omap2_hsmmc_info mmc[] = {
317 .caps = MMC_CAP_4_BIT_DATA, 317 .caps = MMC_CAP_4_BIT_DATA,
318 .gpio_cd = -EINVAL, 318 .gpio_cd = -EINVAL,
319 .gpio_wp = 63, 319 .gpio_wp = 63,
320 .deferred = true,
320 }, 321 },
321#ifdef CONFIG_WL12XX_PLATFORM_DATA 322#ifdef CONFIG_WL12XX_PLATFORM_DATA
322 { 323 {
@@ -361,9 +362,8 @@ static int omap3evm_twl_gpio_setup(struct device *dev,
361 int r, lcd_bl_en; 362 int r, lcd_bl_en;
362 363
363 /* gpio + 0 is "mmc0_cd" (input/IRQ) */ 364 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
364 omap_mux_init_gpio(63, OMAP_PIN_INPUT);
365 mmc[0].gpio_cd = gpio + 0; 365 mmc[0].gpio_cd = gpio + 0;
366 omap2_hsmmc_init(mmc); 366 omap_hsmmc_late_init(mmc);
367 367
368 /* 368 /*
369 * Most GPIOs are for USB OTG. Some are mostly sent to 369 * Most GPIOs are for USB OTG. Some are mostly sent to
@@ -644,6 +644,9 @@ static void __init omap3_evm_init(void)
644 omap_board_config = omap3_evm_config; 644 omap_board_config = omap3_evm_config;
645 omap_board_config_size = ARRAY_SIZE(omap3_evm_config); 645 omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
646 646
647 omap_mux_init_gpio(63, OMAP_PIN_INPUT);
648 omap_hsmmc_init(mmc);
649
647 omap3_evm_i2c_init(); 650 omap3_evm_i2c_init();
648 651
649 omap_display_init(&omap3_evm_dss_data); 652 omap_display_init(&omap3_evm_dss_data);
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index 4198dd017d8f..2304ba340e99 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -128,7 +128,7 @@ static void __init board_mmc_init(void)
128 return; 128 return;
129 } 129 }
130 130
131 omap2_hsmmc_init(board_mmc_info); 131 omap_hsmmc_init(board_mmc_info);
132} 132}
133 133
134static struct omap_smsc911x_platform_data __initdata board_smsc911x_data = { 134static struct omap_smsc911x_platform_data __initdata board_smsc911x_data = {
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 1644b73017fc..7184b8b9e38f 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -273,6 +273,7 @@ static struct omap2_hsmmc_info omap3pandora_mmc[] = {
273 .gpio_cd = -EINVAL, 273 .gpio_cd = -EINVAL,
274 .gpio_wp = 126, 274 .gpio_wp = 126,
275 .ext_clock = 0, 275 .ext_clock = 0,
276 .deferred = true,
276 }, 277 },
277 { 278 {
278 .mmc = 2, 279 .mmc = 2,
@@ -281,6 +282,7 @@ static struct omap2_hsmmc_info omap3pandora_mmc[] = {
281 .gpio_wp = 127, 282 .gpio_wp = 127,
282 .ext_clock = 1, 283 .ext_clock = 1,
283 .transceiver = true, 284 .transceiver = true,
285 .deferred = true,
284 }, 286 },
285 { 287 {
286 .mmc = 3, 288 .mmc = 3,
@@ -300,7 +302,7 @@ static int omap3pandora_twl_gpio_setup(struct device *dev,
300 /* gpio + {0,1} is "mmc{0,1}_cd" (input/IRQ) */ 302 /* gpio + {0,1} is "mmc{0,1}_cd" (input/IRQ) */
301 omap3pandora_mmc[0].gpio_cd = gpio + 0; 303 omap3pandora_mmc[0].gpio_cd = gpio + 0;
302 omap3pandora_mmc[1].gpio_cd = gpio + 1; 304 omap3pandora_mmc[1].gpio_cd = gpio + 1;
303 omap2_hsmmc_init(omap3pandora_mmc); 305 omap_hsmmc_late_init(omap3pandora_mmc);
304 306
305 /* gpio + 13 drives 32kHz buffer for wifi module */ 307 /* gpio + 13 drives 32kHz buffer for wifi module */
306 gpio_32khz = gpio + 13; 308 gpio_32khz = gpio + 13;
@@ -343,7 +345,7 @@ static struct regulator_consumer_supply pandora_vcc_lcd_supply[] = {
343}; 345};
344 346
345static struct regulator_consumer_supply pandora_usb_phy_supply[] = { 347static struct regulator_consumer_supply pandora_usb_phy_supply[] = {
346 REGULATOR_SUPPLY("hsusb0", "ehci-omap.0"), 348 REGULATOR_SUPPLY("hsusb1", "ehci-omap.0"),
347}; 349};
348 350
349/* ads7846 on SPI and 2 nub controllers on I2C */ 351/* ads7846 on SPI and 2 nub controllers on I2C */
@@ -561,13 +563,13 @@ static struct platform_device *omap3pandora_devices[] __initdata = {
561 563
562static const struct usbhs_omap_board_data usbhs_bdata __initconst = { 564static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
563 565
564 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, 566 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
565 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED, 567 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
566 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, 568 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
567 569
568 .phy_reset = true, 570 .phy_reset = true,
569 .reset_gpio_port[0] = 16, 571 .reset_gpio_port[0] = -EINVAL,
570 .reset_gpio_port[1] = -EINVAL, 572 .reset_gpio_port[1] = 16,
571 .reset_gpio_port[2] = -EINVAL 573 .reset_gpio_port[2] = -EINVAL
572}; 574};
573 575
@@ -580,6 +582,7 @@ static struct omap_board_mux board_mux[] __initdata = {
580static void __init omap3pandora_init(void) 582static void __init omap3pandora_init(void)
581{ 583{
582 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 584 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
585 omap_hsmmc_init(omap3pandora_mmc);
583 omap3pandora_i2c_init(); 586 omap3pandora_i2c_init();
584 pandora_wl1251_init(); 587 pandora_wl1251_init();
585 platform_add_devices(omap3pandora_devices, 588 platform_add_devices(omap3pandora_devices,
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index cb089a46f62f..641004380795 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -209,10 +209,11 @@ static struct regulator_init_data omap3stalker_vsim = {
209 209
210static struct omap2_hsmmc_info mmc[] = { 210static struct omap2_hsmmc_info mmc[] = {
211 { 211 {
212 .mmc = 1, 212 .mmc = 1,
213 .caps = MMC_CAP_4_BIT_DATA, 213 .caps = MMC_CAP_4_BIT_DATA,
214 .gpio_cd = -EINVAL, 214 .gpio_cd = -EINVAL,
215 .gpio_wp = 23, 215 .gpio_wp = 23,
216 .deferred = true,
216 }, 217 },
217 {} /* Terminator */ 218 {} /* Terminator */
218}; 219};
@@ -282,9 +283,8 @@ omap3stalker_twl_gpio_setup(struct device *dev,
282 unsigned gpio, unsigned ngpio) 283 unsigned gpio, unsigned ngpio)
283{ 284{
284 /* gpio + 0 is "mmc0_cd" (input/IRQ) */ 285 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
285 omap_mux_init_gpio(23, OMAP_PIN_INPUT);
286 mmc[0].gpio_cd = gpio + 0; 286 mmc[0].gpio_cd = gpio + 0;
287 omap2_hsmmc_init(mmc); 287 omap_hsmmc_late_init(mmc);
288 288
289 /* 289 /*
290 * Most GPIOs are for USB OTG. Some are mostly sent to 290 * Most GPIOs are for USB OTG. Some are mostly sent to
@@ -425,6 +425,9 @@ static void __init omap3_stalker_init(void)
425 omap_board_config = omap3_stalker_config; 425 omap_board_config = omap3_stalker_config;
426 omap_board_config_size = ARRAY_SIZE(omap3_stalker_config); 426 omap_board_config_size = ARRAY_SIZE(omap3_stalker_config);
427 427
428 omap_mux_init_gpio(23, OMAP_PIN_INPUT);
429 omap_hsmmc_init(mmc);
430
428 omap3_stalker_i2c_init(); 431 omap3_stalker_i2c_init();
429 432
430 platform_add_devices(omap3_stalker_devices, 433 platform_add_devices(omap3_stalker_devices,
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index a0b851aafcca..8842e04aef01 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -100,6 +100,7 @@ static struct omap2_hsmmc_info mmc[] = {
100 .mmc = 1, 100 .mmc = 1,
101 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, 101 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
102 .gpio_wp = 29, 102 .gpio_wp = 29,
103 .deferred = true,
103 }, 104 },
104 {} /* Terminator */ 105 {} /* Terminator */
105}; 106};
@@ -117,15 +118,9 @@ static struct gpio_led gpio_leds[];
117static int touchbook_twl_gpio_setup(struct device *dev, 118static int touchbook_twl_gpio_setup(struct device *dev,
118 unsigned gpio, unsigned ngpio) 119 unsigned gpio, unsigned ngpio)
119{ 120{
120 if (system_rev >= 0x20 && system_rev <= 0x34301000) {
121 omap_mux_init_gpio(23, OMAP_PIN_INPUT);
122 mmc[0].gpio_wp = 23;
123 } else {
124 omap_mux_init_gpio(29, OMAP_PIN_INPUT);
125 }
126 /* gpio + 0 is "mmc0_cd" (input/IRQ) */ 121 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
127 mmc[0].gpio_cd = gpio + 0; 122 mmc[0].gpio_cd = gpio + 0;
128 omap2_hsmmc_init(mmc); 123 omap_hsmmc_late_init(mmc);
129 124
130 /* REVISIT: need ehci-omap hooks for external VBUS 125 /* REVISIT: need ehci-omap hooks for external VBUS
131 * power switch and overcurrent detect 126 * power switch and overcurrent detect
@@ -351,6 +346,14 @@ static void __init omap3_touchbook_init(void)
351 346
352 pm_power_off = omap3_touchbook_poweroff; 347 pm_power_off = omap3_touchbook_poweroff;
353 348
349 if (system_rev >= 0x20 && system_rev <= 0x34301000) {
350 omap_mux_init_gpio(23, OMAP_PIN_INPUT);
351 mmc[0].gpio_wp = 23;
352 } else {
353 omap_mux_init_gpio(29, OMAP_PIN_INPUT);
354 }
355 omap_hsmmc_init(mmc);
356
354 omap3_touchbook_i2c_init(); 357 omap3_touchbook_i2c_init();
355 platform_add_devices(omap3_touchbook_devices, 358 platform_add_devices(omap3_touchbook_devices,
356 ARRAY_SIZE(omap3_touchbook_devices)); 359 ARRAY_SIZE(omap3_touchbook_devices));
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 28fc271f7031..7ca7a5c474d4 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -245,9 +245,9 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)
245{ 245{
246 struct omap2_hsmmc_info *c; 246 struct omap2_hsmmc_info *c;
247 247
248 omap2_hsmmc_init(controllers); 248 omap_hsmmc_init(controllers);
249 for (c = controllers; c->mmc; c++) 249 for (c = controllers; c->mmc; c++)
250 omap4_twl6030_hsmmc_set_late_init(c->dev); 250 omap4_twl6030_hsmmc_set_late_init(&c->pdev->dev);
251 251
252 return 0; 252 return 0;
253} 253}
@@ -461,7 +461,7 @@ static struct omap_dss_board_info omap4_panda_dss_data = {
461 .default_device = &omap4_panda_dvi_device, 461 .default_device = &omap4_panda_dvi_device,
462}; 462};
463 463
464void omap4_panda_display_init(void) 464void __init omap4_panda_display_init(void)
465{ 465{
466 int r; 466 int r;
467 467
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 52c0cef77165..668533e2a379 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -407,8 +407,6 @@ static inline void __init overo_init_keys(void) { return; }
407static int overo_twl_gpio_setup(struct device *dev, 407static int overo_twl_gpio_setup(struct device *dev,
408 unsigned gpio, unsigned ngpio) 408 unsigned gpio, unsigned ngpio)
409{ 409{
410 omap2_hsmmc_init(mmc);
411
412#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) 410#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
413 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ 411 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
414 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; 412 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
@@ -505,6 +503,7 @@ static void __init overo_init(void)
505 int ret; 503 int ret;
506 504
507 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 505 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
506 omap_hsmmc_init(mmc);
508 overo_i2c_init(); 507 overo_i2c_init();
509 omap_display_init(&overo_dss_data); 508 omap_display_init(&overo_dss_data);
510 omap_serial_init(); 509 omap_serial_init();
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index 8678b386c6a2..2d24c98f3d45 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -120,7 +120,7 @@ static void __init rm680_peripherals_init(void)
120 ARRAY_SIZE(rm680_peripherals_devices)); 120 ARRAY_SIZE(rm680_peripherals_devices));
121 rm680_i2c_init(); 121 rm680_i2c_init();
122 gpmc_onenand_init(board_onenand_data); 122 gpmc_onenand_init(board_onenand_data);
123 omap2_hsmmc_init(mmc); 123 omap_hsmmc_init(mmc);
124} 124}
125 125
126#ifdef CONFIG_OMAP_MUX 126#ifdef CONFIG_OMAP_MUX
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index acb4e77b39ef..0e9d89a2048f 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -1145,7 +1145,7 @@ void __init rx51_peripherals_init(void)
1145 1145
1146 partition = omap_mux_get("core"); 1146 partition = omap_mux_get("core");
1147 if (partition) 1147 if (partition)
1148 omap2_hsmmc_init(mmc); 1148 omap_hsmmc_init(mmc);
1149 1149
1150 rx51_charger_init(); 1150 rx51_charger_init();
1151} 1151}
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index c126461836ac..3d39cdb2e250 100644
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -205,6 +205,7 @@ static struct omap2_hsmmc_info mmc[] = {
205 .caps = MMC_CAP_4_BIT_DATA, 205 .caps = MMC_CAP_4_BIT_DATA,
206 .gpio_wp = -EINVAL, 206 .gpio_wp = -EINVAL,
207 .power_saving = true, 207 .power_saving = true,
208 .deferred = true,
208 }, 209 },
209 { 210 {
210 .name = "internal", 211 .name = "internal",
@@ -233,7 +234,7 @@ static int zoom_twl_gpio_setup(struct device *dev,
233 234
234 /* gpio + 0 is "mmc0_cd" (input/IRQ) */ 235 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
235 mmc[0].gpio_cd = gpio + 0; 236 mmc[0].gpio_cd = gpio + 0;
236 omap2_hsmmc_init(mmc); 237 omap_hsmmc_late_init(mmc);
237 238
238 ret = gpio_request_one(LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, 239 ret = gpio_request_one(LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW,
239 "lcd enable"); 240 "lcd enable");
@@ -301,6 +302,7 @@ void __init zoom_peripherals_init(void)
301 if (ret) 302 if (ret)
302 pr_err("error setting wl12xx data: %d\n", ret); 303 pr_err("error setting wl12xx data: %d\n", ret);
303 304
305 omap_hsmmc_init(mmc);
304 omap_i2c_init(); 306 omap_i2c_init();
305 platform_device_register(&omap_vwlan_device); 307 platform_device_register(&omap_vwlan_device);
306 usb_musb_init(NULL); 308 usb_musb_init(NULL);
diff --git a/arch/arm/mach-omap2/clkt_clksel.c b/arch/arm/mach-omap2/clkt_clksel.c
index e25364de028a..04d551b1f7f7 100644
--- a/arch/arm/mach-omap2/clkt_clksel.c
+++ b/arch/arm/mach-omap2/clkt_clksel.c
@@ -43,6 +43,7 @@
43#include <linux/errno.h> 43#include <linux/errno.h>
44#include <linux/clk.h> 44#include <linux/clk.h>
45#include <linux/io.h> 45#include <linux/io.h>
46#include <linux/bug.h>
46 47
47#include <plat/clock.h> 48#include <plat/clock.h>
48 49
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c
index bcb0c5817167..799a617ade30 100644
--- a/arch/arm/mach-omap2/common-board-devices.c
+++ b/arch/arm/mach-omap2/common-board-devices.c
@@ -76,13 +76,15 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
76 gpio_set_debounce(gpio_pendown, gpio_debounce); 76 gpio_set_debounce(gpio_pendown, gpio_debounce);
77 } 77 }
78 78
79 ads7846_config.gpio_pendown = gpio_pendown;
80
81 spi_bi->bus_num = bus_num; 79 spi_bi->bus_num = bus_num;
82 spi_bi->irq = OMAP_GPIO_IRQ(gpio_pendown); 80 spi_bi->irq = OMAP_GPIO_IRQ(gpio_pendown);
83 81
84 if (board_pdata) 82 if (board_pdata) {
83 board_pdata->gpio_pendown = gpio_pendown;
85 spi_bi->platform_data = board_pdata; 84 spi_bi->platform_data = board_pdata;
85 } else {
86 ads7846_config.gpio_pendown = gpio_pendown;
87 }
86 88
87 spi_register_board_info(&ads7846_spi_board_info, 1); 89 spi_register_board_info(&ads7846_spi_board_info, 1);
88} 90}
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index 0ba68d3764bc..96c4bcc0a75c 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -339,6 +339,11 @@
339#define AM35XX_VPFE_PCLK_SW_RST BIT(4) 339#define AM35XX_VPFE_PCLK_SW_RST BIT(4)
340 340
341/* 341/*
342 * CONTROL AM33XX STATUS register
343 */
344#define AM33XX_CONTROL_STATUS 0x040
345
346/*
342 * CONTROL OMAP STATUS register to identify OMAP3 features 347 * CONTROL OMAP STATUS register to identify OMAP3 features
343 */ 348 */
344#define OMAP3_CONTROL_OMAP_STATUS 0x044c 349#define OMAP3_CONTROL_OMAP_STATUS 0x044c
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 3ffefe275ea0..2bda43629b40 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -276,7 +276,7 @@ int __init omap4_keyboard_init(struct omap4_keypad_platform_data
276} 276}
277 277
278#if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE) 278#if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
279static inline void omap_init_mbox(void) 279static inline void __init omap_init_mbox(void)
280{ 280{
281 struct omap_hwmod *oh; 281 struct omap_hwmod *oh;
282 struct platform_device *pdev; 282 struct platform_device *pdev;
@@ -337,7 +337,7 @@ static inline void omap_init_audio(void) {}
337#if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \ 337#if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \
338 defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE) 338 defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE)
339 339
340static void omap_init_mcpdm(void) 340static void __init omap_init_mcpdm(void)
341{ 341{
342 struct omap_hwmod *oh; 342 struct omap_hwmod *oh;
343 struct platform_device *pdev; 343 struct platform_device *pdev;
@@ -358,7 +358,7 @@ static inline void omap_init_mcpdm(void) {}
358#if defined(CONFIG_SND_OMAP_SOC_DMIC) || \ 358#if defined(CONFIG_SND_OMAP_SOC_DMIC) || \
359 defined(CONFIG_SND_OMAP_SOC_DMIC_MODULE) 359 defined(CONFIG_SND_OMAP_SOC_DMIC_MODULE)
360 360
361static void omap_init_dmic(void) 361static void __init omap_init_dmic(void)
362{ 362{
363 struct omap_hwmod *oh; 363 struct omap_hwmod *oh;
364 struct platform_device *pdev; 364 struct platform_device *pdev;
@@ -380,7 +380,7 @@ static inline void omap_init_dmic(void) {}
380 380
381#include <plat/mcspi.h> 381#include <plat/mcspi.h>
382 382
383static int omap_mcspi_init(struct omap_hwmod *oh, void *unused) 383static int __init omap_mcspi_init(struct omap_hwmod *oh, void *unused)
384{ 384{
385 struct platform_device *pdev; 385 struct platform_device *pdev;
386 char *name = "omap2_mcspi"; 386 char *name = "omap2_mcspi";
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 3677b1f58b85..62e133ca4314 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -124,7 +124,7 @@ static void omap4_hdmi_mux_pads(enum omap_hdmi_flags flags)
124 } 124 }
125} 125}
126 126
127static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes) 127static int __init omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
128{ 128{
129 u32 enable_mask, enable_shift; 129 u32 enable_mask, enable_shift;
130 u32 pipd_mask, pipd_shift; 130 u32 pipd_mask, pipd_shift;
@@ -157,7 +157,7 @@ static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes)
157 return 0; 157 return 0;
158} 158}
159 159
160int omap_hdmi_init(enum omap_hdmi_flags flags) 160int __init omap_hdmi_init(enum omap_hdmi_flags flags)
161{ 161{
162 if (cpu_is_omap44xx()) 162 if (cpu_is_omap44xx())
163 omap4_hdmi_mux_pads(flags); 163 omap4_hdmi_mux_pads(flags);
@@ -165,7 +165,7 @@ int omap_hdmi_init(enum omap_hdmi_flags flags)
165 return 0; 165 return 0;
166} 166}
167 167
168static int omap_dsi_enable_pads(int dsi_id, unsigned lane_mask) 168static int __init omap_dsi_enable_pads(int dsi_id, unsigned lane_mask)
169{ 169{
170 if (cpu_is_omap44xx()) 170 if (cpu_is_omap44xx())
171 return omap4_dsi_mux_pads(dsi_id, lane_mask); 171 return omap4_dsi_mux_pads(dsi_id, lane_mask);
@@ -173,7 +173,7 @@ static int omap_dsi_enable_pads(int dsi_id, unsigned lane_mask)
173 return 0; 173 return 0;
174} 174}
175 175
176static void omap_dsi_disable_pads(int dsi_id, unsigned lane_mask) 176static void __init omap_dsi_disable_pads(int dsi_id, unsigned lane_mask)
177{ 177{
178 if (cpu_is_omap44xx()) 178 if (cpu_is_omap44xx())
179 omap4_dsi_mux_pads(dsi_id, 0); 179 omap4_dsi_mux_pads(dsi_id, 0);
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index a59a45a0096e..b19d8496c16e 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -227,7 +227,7 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
227 227
228 dma_stride = OMAP2_DMA_STRIDE; 228 dma_stride = OMAP2_DMA_STRIDE;
229 dma_common_ch_start = CSDP; 229 dma_common_ch_start = CSDP;
230 if (cpu_is_omap3630() || cpu_is_omap4430()) 230 if (cpu_is_omap3630() || cpu_is_omap44xx())
231 dma_common_ch_end = CCDN; 231 dma_common_ch_end = CCDN;
232 else 232 else
233 dma_common_ch_end = CCFN; 233 dma_common_ch_end = CCFN;
diff --git a/arch/arm/mach-omap2/gpio.c b/arch/arm/mach-omap2/gpio.c
index 8cbfbc2918ce..64c0caed9516 100644
--- a/arch/arm/mach-omap2/gpio.c
+++ b/arch/arm/mach-omap2/gpio.c
@@ -24,7 +24,7 @@
24#include <plat/omap_hwmod.h> 24#include <plat/omap_hwmod.h>
25#include <plat/omap_device.h> 25#include <plat/omap_device.h>
26 26
27static int omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused) 27static int __init omap2_gpio_dev_init(struct omap_hwmod *oh, void *unused)
28{ 28{
29 struct platform_device *pdev; 29 struct platform_device *pdev;
30 struct omap_gpio_platform_data *pdata; 30 struct omap_gpio_platform_data *pdata;
diff --git a/arch/arm/mach-omap2/gpmc-smsc911x.c b/arch/arm/mach-omap2/gpmc-smsc911x.c
index bbb870c04a5e..5e5880d6d099 100644
--- a/arch/arm/mach-omap2/gpmc-smsc911x.c
+++ b/arch/arm/mach-omap2/gpmc-smsc911x.c
@@ -101,10 +101,13 @@ void __init gpmc_smsc911x_init(struct omap_smsc911x_platform_data *board_data)
101 101
102 gpmc_cfg = board_data; 102 gpmc_cfg = board_data;
103 103
104 ret = platform_device_register(&gpmc_smsc911x_regulator); 104 if (!gpmc_cfg->id) {
105 if (ret < 0) { 105 ret = platform_device_register(&gpmc_smsc911x_regulator);
106 pr_err("Unable to register smsc911x regulators: %d\n", ret); 106 if (ret < 0) {
107 return; 107 pr_err("Unable to register smsc911x regulators: %d\n",
108 ret);
109 return;
110 }
108 } 111 }
109 112
110 if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) { 113 if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) {
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index dfffbbf4c009..00d510858e28 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -888,6 +888,7 @@ int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size)
888 gpmc_write_reg(GPMC_ECC_CONFIG, val); 888 gpmc_write_reg(GPMC_ECC_CONFIG, val);
889 return 0; 889 return 0;
890} 890}
891EXPORT_SYMBOL_GPL(gpmc_enable_hwecc);
891 892
892/** 893/**
893 * gpmc_calculate_ecc - generate non-inverted ecc bytes 894 * gpmc_calculate_ecc - generate non-inverted ecc bytes
@@ -918,3 +919,4 @@ int gpmc_calculate_ecc(int cs, const u_char *dat, u_char *ecc_code)
918 gpmc_ecc_used = -EINVAL; 919 gpmc_ecc_used = -EINVAL;
919 return 0; 920 return 0;
920} 921}
922EXPORT_SYMBOL_GPL(gpmc_calculate_ecc);
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 19dd1657245c..8121720e942f 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -293,8 +293,8 @@ static inline void omap_hsmmc_mux(struct omap_mmc_platform_data *mmc_controller,
293 } 293 }
294} 294}
295 295
296static int omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c, 296static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
297 struct omap_mmc_platform_data *mmc) 297 struct omap_mmc_platform_data *mmc)
298{ 298{
299 char *hc_name; 299 char *hc_name;
300 300
@@ -429,66 +429,131 @@ static int omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
429} 429}
430 430
431static int omap_hsmmc_done; 431static int omap_hsmmc_done;
432
433void omap_hsmmc_late_init(struct omap2_hsmmc_info *c)
434{
435 struct platform_device *pdev;
436 struct omap_mmc_platform_data *mmc_pdata;
437 int res;
438
439 if (omap_hsmmc_done != 1)
440 return;
441
442 omap_hsmmc_done++;
443
444 for (; c->mmc; c++) {
445 if (!c->deferred)
446 continue;
447
448 pdev = c->pdev;
449 if (!pdev)
450 continue;
451
452 mmc_pdata = pdev->dev.platform_data;
453 if (!mmc_pdata)
454 continue;
455
456 mmc_pdata->slots[0].switch_pin = c->gpio_cd;
457 mmc_pdata->slots[0].gpio_wp = c->gpio_wp;
458
459 res = omap_device_register(pdev);
460 if (res)
461 pr_err("Could not late init MMC %s\n",
462 c->name);
463 }
464}
465
432#define MAX_OMAP_MMC_HWMOD_NAME_LEN 16 466#define MAX_OMAP_MMC_HWMOD_NAME_LEN 16
433 467
434void omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr) 468static void __init omap_hsmmc_init_one(struct omap2_hsmmc_info *hsmmcinfo,
469 int ctrl_nr)
435{ 470{
436 struct omap_hwmod *oh; 471 struct omap_hwmod *oh;
472 struct omap_hwmod *ohs[1];
473 struct omap_device *od;
437 struct platform_device *pdev; 474 struct platform_device *pdev;
438 char oh_name[MAX_OMAP_MMC_HWMOD_NAME_LEN]; 475 char oh_name[MAX_OMAP_MMC_HWMOD_NAME_LEN];
439 struct omap_mmc_platform_data *mmc_data; 476 struct omap_mmc_platform_data *mmc_data;
440 struct omap_mmc_dev_attr *mmc_dev_attr; 477 struct omap_mmc_dev_attr *mmc_dev_attr;
441 char *name; 478 char *name;
442 int l; 479 int res;
443 480
444 mmc_data = kzalloc(sizeof(struct omap_mmc_platform_data), GFP_KERNEL); 481 mmc_data = kzalloc(sizeof(struct omap_mmc_platform_data), GFP_KERNEL);
445 if (!mmc_data) { 482 if (!mmc_data) {
446 pr_err("Cannot allocate memory for mmc device!\n"); 483 pr_err("Cannot allocate memory for mmc device!\n");
447 goto done; 484 return;
448 } 485 }
449 486
450 if (omap_hsmmc_pdata_init(hsmmcinfo, mmc_data) < 0) { 487 res = omap_hsmmc_pdata_init(hsmmcinfo, mmc_data);
451 pr_err("%s fails!\n", __func__); 488 if (res < 0)
452 goto done; 489 goto free_mmc;
453 } 490
454 omap_hsmmc_mux(mmc_data, (ctrl_nr - 1)); 491 omap_hsmmc_mux(mmc_data, (ctrl_nr - 1));
455 492
456 name = "omap_hsmmc"; 493 name = "omap_hsmmc";
457 494 res = snprintf(oh_name, MAX_OMAP_MMC_HWMOD_NAME_LEN,
458 l = snprintf(oh_name, MAX_OMAP_MMC_HWMOD_NAME_LEN,
459 "mmc%d", ctrl_nr); 495 "mmc%d", ctrl_nr);
460 WARN(l >= MAX_OMAP_MMC_HWMOD_NAME_LEN, 496 WARN(res >= MAX_OMAP_MMC_HWMOD_NAME_LEN,
461 "String buffer overflow in MMC%d device setup\n", ctrl_nr); 497 "String buffer overflow in MMC%d device setup\n", ctrl_nr);
498
462 oh = omap_hwmod_lookup(oh_name); 499 oh = omap_hwmod_lookup(oh_name);
463 if (!oh) { 500 if (!oh) {
464 pr_err("Could not look up %s\n", oh_name); 501 pr_err("Could not look up %s\n", oh_name);
465 kfree(mmc_data->slots[0].name); 502 goto free_name;
466 goto done;
467 } 503 }
468 504 ohs[0] = oh;
469 if (oh->dev_attr != NULL) { 505 if (oh->dev_attr != NULL) {
470 mmc_dev_attr = oh->dev_attr; 506 mmc_dev_attr = oh->dev_attr;
471 mmc_data->controller_flags = mmc_dev_attr->flags; 507 mmc_data->controller_flags = mmc_dev_attr->flags;
472 } 508 }
473 509
474 pdev = omap_device_build(name, ctrl_nr - 1, oh, mmc_data, 510 pdev = platform_device_alloc(name, ctrl_nr - 1);
475 sizeof(struct omap_mmc_platform_data), NULL, 0, false); 511 if (!pdev) {
476 if (IS_ERR(pdev)) { 512 pr_err("Could not allocate pdev for %s\n", name);
477 WARN(1, "Can't build omap_device for %s:%s.\n", name, oh->name); 513 goto free_name;
478 kfree(mmc_data->slots[0].name);
479 goto done;
480 } 514 }
481 /* 515 dev_set_name(&pdev->dev, "%s.%d", pdev->name, pdev->id);
482 * return device handle to board setup code 516
483 * required to populate for regulator framework structure 517 od = omap_device_alloc(pdev, ohs, 1, NULL, 0);
484 */ 518 if (!od) {
485 hsmmcinfo->dev = &pdev->dev; 519 pr_err("Could not allocate od for %s\n", name);
520 goto put_pdev;
521 }
522
523 res = platform_device_add_data(pdev, mmc_data,
524 sizeof(struct omap_mmc_platform_data));
525 if (res) {
526 pr_err("Could not add pdata for %s\n", name);
527 goto put_pdev;
528 }
529
530 hsmmcinfo->pdev = pdev;
531
532 if (hsmmcinfo->deferred)
533 goto free_mmc;
534
535 res = omap_device_register(pdev);
536 if (res) {
537 pr_err("Could not register od for %s\n", name);
538 goto free_od;
539 }
540
541 goto free_mmc;
542
543free_od:
544 omap_device_delete(od);
545
546put_pdev:
547 platform_device_put(pdev);
548
549free_name:
550 kfree(mmc_data->slots[0].name);
486 551
487done: 552free_mmc:
488 kfree(mmc_data); 553 kfree(mmc_data);
489} 554}
490 555
491void omap2_hsmmc_init(struct omap2_hsmmc_info *controllers) 556void __init omap_hsmmc_init(struct omap2_hsmmc_info *controllers)
492{ 557{
493 u32 reg; 558 u32 reg;
494 559
@@ -521,7 +586,7 @@ void omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
521 } 586 }
522 587
523 for (; controllers->mmc; controllers++) 588 for (; controllers->mmc; controllers++)
524 omap_init_hsmmc(controllers, controllers->mmc); 589 omap_hsmmc_init_one(controllers, controllers->mmc);
525 590
526} 591}
527 592
diff --git a/arch/arm/mach-omap2/hsmmc.h b/arch/arm/mach-omap2/hsmmc.h
index c4409730c4bb..07831cc3c171 100644
--- a/arch/arm/mach-omap2/hsmmc.h
+++ b/arch/arm/mach-omap2/hsmmc.h
@@ -21,10 +21,11 @@ struct omap2_hsmmc_info {
21 bool no_off; /* power_saving and power is not to go off */ 21 bool no_off; /* power_saving and power is not to go off */
22 bool no_off_init; /* no power off when not in MMC sleep state */ 22 bool no_off_init; /* no power off when not in MMC sleep state */
23 bool vcc_aux_disable_is_sleep; /* Regulator off remapped to sleep */ 23 bool vcc_aux_disable_is_sleep; /* Regulator off remapped to sleep */
24 bool deferred; /* mmc needs a deferred probe */
24 int gpio_cd; /* or -EINVAL */ 25 int gpio_cd; /* or -EINVAL */
25 int gpio_wp; /* or -EINVAL */ 26 int gpio_wp; /* or -EINVAL */
26 char *name; /* or NULL for default */ 27 char *name; /* or NULL for default */
27 struct device *dev; /* returned: pointer to mmc adapter */ 28 struct platform_device *pdev; /* mmc controller instance */
28 int ocr_mask; /* temporary HACK */ 29 int ocr_mask; /* temporary HACK */
29 /* Remux (pad configuration) when powering on/off */ 30 /* Remux (pad configuration) when powering on/off */
30 void (*remux)(struct device *dev, int slot, int power_on); 31 void (*remux)(struct device *dev, int slot, int power_on);
@@ -34,11 +35,16 @@ struct omap2_hsmmc_info {
34 35
35#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE) 36#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
36 37
37void omap2_hsmmc_init(struct omap2_hsmmc_info *); 38void omap_hsmmc_init(struct omap2_hsmmc_info *);
39void omap_hsmmc_late_init(struct omap2_hsmmc_info *);
38 40
39#else 41#else
40 42
41static inline void omap2_hsmmc_init(struct omap2_hsmmc_info *info) 43static inline void omap_hsmmc_init(struct omap2_hsmmc_info *info)
44{
45}
46
47static inline void omap_hsmmc_late_init(struct omap2_hsmmc_info *info)
42{ 48{
43} 49}
44 50
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 6c5826605eae..613e2c1eeb2f 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -44,6 +44,8 @@ int omap_type(void)
44 44
45 if (cpu_is_omap24xx()) { 45 if (cpu_is_omap24xx()) {
46 val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS); 46 val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
47 } else if (cpu_is_am33xx()) {
48 val = omap_ctrl_readl(AM33XX_CONTROL_STATUS);
47 } else if (cpu_is_omap34xx()) { 49 } else if (cpu_is_omap34xx()) {
48 val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS); 50 val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
49 } else if (cpu_is_omap44xx()) { 51 } else if (cpu_is_omap44xx()) {
@@ -343,6 +345,7 @@ static void __init omap3_check_revision(const char **cpu_rev)
343 case 0xb944: 345 case 0xb944:
344 omap_revision = AM335X_REV_ES1_0; 346 omap_revision = AM335X_REV_ES1_0;
345 *cpu_rev = "1.0"; 347 *cpu_rev = "1.0";
348 break;
346 case 0xb8f2: 349 case 0xb8f2:
347 switch (rev) { 350 switch (rev) {
348 case 0: 351 case 0:
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index fb11b44fbdec..24ad0d154519 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -43,14 +43,13 @@
43#include "clockdomain.h" 43#include "clockdomain.h"
44#include <plat/omap_hwmod.h> 44#include <plat/omap_hwmod.h>
45#include <plat/multi.h> 45#include <plat/multi.h>
46#include "common.h"
47 46
48/* 47/*
49 * The machine specific code may provide the extra mapping besides the 48 * The machine specific code may provide the extra mapping besides the
50 * default mapping provided here. 49 * default mapping provided here.
51 */ 50 */
52 51
53#ifdef CONFIG_ARCH_OMAP2 52#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
54static struct map_desc omap24xx_io_desc[] __initdata = { 53static struct map_desc omap24xx_io_desc[] __initdata = {
55 { 54 {
56 .virtual = L3_24XX_VIRT, 55 .virtual = L3_24XX_VIRT,
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c
index 2cc1aa004b94..415a6f1cf419 100644
--- a/arch/arm/mach-omap2/mailbox.c
+++ b/arch/arm/mach-omap2/mailbox.c
@@ -420,8 +420,7 @@ static void __exit omap2_mbox_exit(void)
420 platform_driver_unregister(&omap2_mbox_driver); 420 platform_driver_unregister(&omap2_mbox_driver);
421} 421}
422 422
423/* must be ready before omap3isp is probed */ 423module_init(omap2_mbox_init);
424subsys_initcall(omap2_mbox_init);
425module_exit(omap2_mbox_exit); 424module_exit(omap2_mbox_exit);
426 425
427MODULE_LICENSE("GPL v2"); 426MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index fb4bcf81a183..5f8a876e4fd2 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -122,7 +122,7 @@ static int omap3_enable_st_clock(unsigned int id, bool enable)
122 return 0; 122 return 0;
123} 123}
124 124
125static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) 125static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
126{ 126{
127 int id, count = 1; 127 int id, count = 1;
128 char *name = "omap-mcbsp"; 128 char *name = "omap-mcbsp";
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 611a0e3d54ca..f26b2faa1694 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -100,8 +100,8 @@ void omap_mux_write_array(struct omap_mux_partition *partition,
100 100
101static char *omap_mux_options; 101static char *omap_mux_options;
102 102
103static int _omap_mux_init_gpio(struct omap_mux_partition *partition, 103static int __init _omap_mux_init_gpio(struct omap_mux_partition *partition,
104 int gpio, int val) 104 int gpio, int val)
105{ 105{
106 struct omap_mux_entry *e; 106 struct omap_mux_entry *e;
107 struct omap_mux *gpio_mux = NULL; 107 struct omap_mux *gpio_mux = NULL;
@@ -145,7 +145,7 @@ static int _omap_mux_init_gpio(struct omap_mux_partition *partition,
145 return 0; 145 return 0;
146} 146}
147 147
148int omap_mux_init_gpio(int gpio, int val) 148int __init omap_mux_init_gpio(int gpio, int val)
149{ 149{
150 struct omap_mux_partition *partition; 150 struct omap_mux_partition *partition;
151 int ret; 151 int ret;
@@ -159,9 +159,9 @@ int omap_mux_init_gpio(int gpio, int val)
159 return -ENODEV; 159 return -ENODEV;
160} 160}
161 161
162static int _omap_mux_get_by_name(struct omap_mux_partition *partition, 162static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition,
163 const char *muxname, 163 const char *muxname,
164 struct omap_mux **found_mux) 164 struct omap_mux **found_mux)
165{ 165{
166 struct omap_mux *mux = NULL; 166 struct omap_mux *mux = NULL;
167 struct omap_mux_entry *e; 167 struct omap_mux_entry *e;
@@ -218,7 +218,7 @@ static int _omap_mux_get_by_name(struct omap_mux_partition *partition,
218 return -ENODEV; 218 return -ENODEV;
219} 219}
220 220
221static int 221static int __init
222omap_mux_get_by_name(const char *muxname, 222omap_mux_get_by_name(const char *muxname,
223 struct omap_mux_partition **found_partition, 223 struct omap_mux_partition **found_partition,
224 struct omap_mux **found_mux) 224 struct omap_mux **found_mux)
@@ -240,7 +240,7 @@ omap_mux_get_by_name(const char *muxname,
240 return -ENODEV; 240 return -ENODEV;
241} 241}
242 242
243int omap_mux_init_signal(const char *muxname, int val) 243int __init omap_mux_init_signal(const char *muxname, int val)
244{ 244{
245 struct omap_mux_partition *partition = NULL; 245 struct omap_mux_partition *partition = NULL;
246 struct omap_mux *mux = NULL; 246 struct omap_mux *mux = NULL;
diff --git a/arch/arm/mach-omap2/omap-hotplug.c b/arch/arm/mach-omap2/omap-hotplug.c
index adbe4d8c7caf..56c345b8b931 100644
--- a/arch/arm/mach-omap2/omap-hotplug.c
+++ b/arch/arm/mach-omap2/omap-hotplug.c
@@ -33,7 +33,7 @@ int platform_cpu_kill(unsigned int cpu)
33 * platform-specific code to shutdown a CPU 33 * platform-specific code to shutdown a CPU
34 * Called with IRQs disabled 34 * Called with IRQs disabled
35 */ 35 */
36void platform_cpu_die(unsigned int cpu) 36void __ref platform_cpu_die(unsigned int cpu)
37{ 37{
38 unsigned int this_cpu; 38 unsigned int this_cpu;
39 39
diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c
index b8822048e409..ac49384d0285 100644
--- a/arch/arm/mach-omap2/omap-iommu.c
+++ b/arch/arm/mach-omap2/omap-iommu.c
@@ -150,7 +150,8 @@ err_out:
150 platform_device_put(omap_iommu_pdev[i]); 150 platform_device_put(omap_iommu_pdev[i]);
151 return err; 151 return err;
152} 152}
153module_init(omap_iommu_init); 153/* must be ready before omap3isp is probed */
154subsys_initcall(omap_iommu_init);
154 155
155static void __exit omap_iommu_exit(void) 156static void __exit omap_iommu_exit(void)
156{ 157{
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index 1d5d01056558..fe9ab7c58fae 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -300,7 +300,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
300 * @cpu : CPU ID 300 * @cpu : CPU ID
301 * @power_state: CPU low power state. 301 * @power_state: CPU low power state.
302 */ 302 */
303int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state) 303int __cpuinit omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
304{ 304{
305 unsigned int cpu_state = 0; 305 unsigned int cpu_state = 0;
306 306
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c
index d3d8971d7f30..42cd7fb52414 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -43,7 +43,6 @@
43 43
44static void __iomem *wakeupgen_base; 44static void __iomem *wakeupgen_base;
45static void __iomem *sar_base; 45static void __iomem *sar_base;
46static DEFINE_PER_CPU(u32 [NR_REG_BANKS], irqmasks);
47static DEFINE_SPINLOCK(wakeupgen_lock); 46static DEFINE_SPINLOCK(wakeupgen_lock);
48static unsigned int irq_target_cpu[NR_IRQS]; 47static unsigned int irq_target_cpu[NR_IRQS];
49 48
@@ -67,14 +66,6 @@ static inline void sar_writel(u32 val, u32 offset, u8 idx)
67 __raw_writel(val, sar_base + offset + (idx * 4)); 66 __raw_writel(val, sar_base + offset + (idx * 4));
68} 67}
69 68
70static void _wakeupgen_set_all(unsigned int cpu, unsigned int reg)
71{
72 u8 i;
73
74 for (i = 0; i < NR_REG_BANKS; i++)
75 wakeupgen_writel(reg, i, cpu);
76}
77
78static inline int _wakeupgen_get_irq_info(u32 irq, u32 *bit_posn, u8 *reg_index) 69static inline int _wakeupgen_get_irq_info(u32 irq, u32 *bit_posn, u8 *reg_index)
79{ 70{
80 unsigned int spi_irq; 71 unsigned int spi_irq;
@@ -130,22 +121,6 @@ static void _wakeupgen_set(unsigned int irq, unsigned int cpu)
130 wakeupgen_writel(val, i, cpu); 121 wakeupgen_writel(val, i, cpu);
131} 122}
132 123
133static void _wakeupgen_save_masks(unsigned int cpu)
134{
135 u8 i;
136
137 for (i = 0; i < NR_REG_BANKS; i++)
138 per_cpu(irqmasks, cpu)[i] = wakeupgen_readl(i, cpu);
139}
140
141static void _wakeupgen_restore_masks(unsigned int cpu)
142{
143 u8 i;
144
145 for (i = 0; i < NR_REG_BANKS; i++)
146 wakeupgen_writel(per_cpu(irqmasks, cpu)[i], i, cpu);
147}
148
149/* 124/*
150 * Architecture specific Mask extension 125 * Architecture specific Mask extension
151 */ 126 */
@@ -170,6 +145,33 @@ static void wakeupgen_unmask(struct irq_data *d)
170 spin_unlock_irqrestore(&wakeupgen_lock, flags); 145 spin_unlock_irqrestore(&wakeupgen_lock, flags);
171} 146}
172 147
148#ifdef CONFIG_HOTPLUG_CPU
149static DEFINE_PER_CPU(u32 [NR_REG_BANKS], irqmasks);
150
151static void _wakeupgen_save_masks(unsigned int cpu)
152{
153 u8 i;
154
155 for (i = 0; i < NR_REG_BANKS; i++)
156 per_cpu(irqmasks, cpu)[i] = wakeupgen_readl(i, cpu);
157}
158
159static void _wakeupgen_restore_masks(unsigned int cpu)
160{
161 u8 i;
162
163 for (i = 0; i < NR_REG_BANKS; i++)
164 wakeupgen_writel(per_cpu(irqmasks, cpu)[i], i, cpu);
165}
166
167static void _wakeupgen_set_all(unsigned int cpu, unsigned int reg)
168{
169 u8 i;
170
171 for (i = 0; i < NR_REG_BANKS; i++)
172 wakeupgen_writel(reg, i, cpu);
173}
174
173/* 175/*
174 * Mask or unmask all interrupts on given CPU. 176 * Mask or unmask all interrupts on given CPU.
175 * 0 = Mask all interrupts on the 'cpu' 177 * 0 = Mask all interrupts on the 'cpu'
@@ -191,6 +193,7 @@ static void wakeupgen_irqmask_all(unsigned int cpu, unsigned int set)
191 } 193 }
192 spin_unlock_irqrestore(&wakeupgen_lock, flags); 194 spin_unlock_irqrestore(&wakeupgen_lock, flags);
193} 195}
196#endif
194 197
195#ifdef CONFIG_CPU_PM 198#ifdef CONFIG_CPU_PM
196/* 199/*
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index ebc595091312..70de277f5c15 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -31,6 +31,7 @@
31 31
32#include "common.h" 32#include "common.h"
33#include "omap4-sar-layout.h" 33#include "omap4-sar-layout.h"
34#include <linux/export.h>
34 35
35#ifdef CONFIG_CACHE_L2X0 36#ifdef CONFIG_CACHE_L2X0
36static void __iomem *l2cache_base; 37static void __iomem *l2cache_base;
@@ -55,6 +56,7 @@ void omap_bus_sync(void)
55 isb(); 56 isb();
56 } 57 }
57} 58}
59EXPORT_SYMBOL(omap_bus_sync);
58 60
59/* Steal one page physical memory for barrier implementation */ 61/* Steal one page physical memory for barrier implementation */
60int __init omap_barrier_reserve_memblock(void) 62int __init omap_barrier_reserve_memblock(void)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index ee3624bd1996..08daa5e0eb5f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -28,7 +28,6 @@
28#include <plat/mcspi.h> 28#include <plat/mcspi.h>
29#include <plat/mcbsp.h> 29#include <plat/mcbsp.h>
30#include <plat/mmc.h> 30#include <plat/mmc.h>
31#include <plat/i2c.h>
32#include <plat/dmtimer.h> 31#include <plat/dmtimer.h>
33#include <plat/common.h> 32#include <plat/common.h>
34 33
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 5a65dd04aa38..184ae21feea7 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -28,7 +28,7 @@
28 28
29static struct omap_device_pm_latency *pm_lats; 29static struct omap_device_pm_latency *pm_lats;
30 30
31static int _init_omap_device(char *name) 31static int __init _init_omap_device(char *name)
32{ 32{
33 struct omap_hwmod *oh; 33 struct omap_hwmod *oh;
34 struct platform_device *pdev; 34 struct platform_device *pdev;
@@ -49,7 +49,7 @@ static int _init_omap_device(char *name)
49/* 49/*
50 * Build omap_devices for processors and bus. 50 * Build omap_devices for processors and bus.
51 */ 51 */
52static void omap2_init_processor_devices(void) 52static void __init omap2_init_processor_devices(void)
53{ 53{
54 _init_omap_device("mpu"); 54 _init_omap_device("mpu");
55 if (omap3_has_iva()) 55 if (omap3_has_iva())
diff --git a/arch/arm/mach-omap2/powerdomain-common.c b/arch/arm/mach-omap2/powerdomain-common.c
index f97afff68d6d..c0aeabfcf009 100644
--- a/arch/arm/mach-omap2/powerdomain-common.c
+++ b/arch/arm/mach-omap2/powerdomain-common.c
@@ -13,6 +13,7 @@
13 13
14#include <linux/errno.h> 14#include <linux/errno.h>
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/bug.h>
16#include "pm.h" 17#include "pm.h"
17#include "cm.h" 18#include "cm.h"
18#include "cm-regbits-34xx.h" 19#include "cm-regbits-34xx.h"
diff --git a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
index 6a17e4ca1d79..0f0a9f1592fe 100644
--- a/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/powerdomain2xxx_3xxx.c
@@ -15,6 +15,7 @@
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/errno.h> 16#include <linux/errno.h>
17#include <linux/delay.h> 17#include <linux/delay.h>
18#include <linux/bug.h>
18 19
19#include <plat/prcm.h> 20#include <plat/prcm.h>
20 21
diff --git a/arch/arm/mach-omap2/powerdomain44xx.c b/arch/arm/mach-omap2/powerdomain44xx.c
index a7880af4b3d9..601325b852a4 100644
--- a/arch/arm/mach-omap2/powerdomain44xx.c
+++ b/arch/arm/mach-omap2/powerdomain44xx.c
@@ -15,6 +15,7 @@
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/errno.h> 16#include <linux/errno.h>
17#include <linux/delay.h> 17#include <linux/delay.h>
18#include <linux/bug.h>
18 19
19#include "powerdomain.h" 20#include "powerdomain.h"
20#include <plat/prcm.h> 21#include <plat/prcm.h>
diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c
index 8ef26daeed68..b7ea468eea32 100644
--- a/arch/arm/mach-omap2/powerdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c
@@ -13,6 +13,7 @@
13 13
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/bug.h>
16 17
17#include <plat/cpu.h> 18#include <plat/cpu.h>
18 19
diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c
index 60293370a2a7..a503e1e8358c 100644
--- a/arch/arm/mach-omap2/sr_device.c
+++ b/arch/arm/mach-omap2/sr_device.c
@@ -69,7 +69,7 @@ static void __init sr_set_nvalues(struct omap_volt_data *volt_data,
69 sr_data->nvalue_count = count; 69 sr_data->nvalue_count = count;
70} 70}
71 71
72static int sr_dev_init(struct omap_hwmod *oh, void *user) 72static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
73{ 73{
74 struct omap_sr_data *sr_data; 74 struct omap_sr_data *sr_data;
75 struct platform_device *pdev; 75 struct platform_device *pdev;
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 10b20c652e5d..4b57757bf9d1 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -270,7 +270,6 @@ static struct regulator_init_data omap4_vusb_idata = {
270 .constraints = { 270 .constraints = {
271 .min_uV = 3300000, 271 .min_uV = 3300000,
272 .max_uV = 3300000, 272 .max_uV = 3300000,
273 .apply_uV = true,
274 .valid_modes_mask = REGULATOR_MODE_NORMAL 273 .valid_modes_mask = REGULATOR_MODE_NORMAL
275 | REGULATOR_MODE_STANDBY, 274 | REGULATOR_MODE_STANDBY,
276 .valid_ops_mask = REGULATOR_CHANGE_MODE 275 .valid_ops_mask = REGULATOR_CHANGE_MODE
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 175b7d86d86a..84da34f9a7cf 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -10,6 +10,7 @@
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/delay.h> 11#include <linux/delay.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/bug.h>
13 14
14#include <plat/cpu.h> 15#include <plat/cpu.h>
15 16
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index 0df88820978d..f95c1bad9dc6 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -61,8 +61,8 @@ void __init omap_vp_init(struct voltagedomain *voltdm)
61 vddmin = voltdm->pmic->vp_vddmin; 61 vddmin = voltdm->pmic->vp_vddmin;
62 vddmax = voltdm->pmic->vp_vddmax; 62 vddmax = voltdm->pmic->vp_vddmax;
63 63
64 waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) * 64 waittime = DIV_ROUND_UP(voltdm->pmic->step_size * sys_clk_rate,
65 sys_clk_rate) / 1000; 65 1000 * voltdm->pmic->slew_rate);
66 vstepmin = voltdm->pmic->vp_vstepmin; 66 vstepmin = voltdm->pmic->vp_vstepmin;
67 vstepmax = voltdm->pmic->vp_vstepmax; 67 vstepmax = voltdm->pmic->vp_vstepmax;
68 68
diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h
index 0d729e6619df..42d5cca66257 100644
--- a/arch/arm/mach-pxa/generic.h
+++ b/arch/arm/mach-pxa/generic.h
@@ -49,7 +49,6 @@ extern unsigned pxa3xx_get_clk_frequency_khz(int);
49#endif 49#endif
50 50
51extern struct syscore_ops pxa_irq_syscore_ops; 51extern struct syscore_ops pxa_irq_syscore_ops;
52extern struct syscore_ops pxa_gpio_syscore_ops;
53extern struct syscore_ops pxa2xx_mfp_syscore_ops; 52extern struct syscore_ops pxa2xx_mfp_syscore_ops;
54extern struct syscore_ops pxa3xx_mfp_syscore_ops; 53extern struct syscore_ops pxa3xx_mfp_syscore_ops;
55 54
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index f14775536b83..29b62afc6f7c 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -226,6 +226,12 @@ static void __init pxa25x_mfp_init(void)
226{ 226{
227 int i; 227 int i;
228 228
229 /* running before pxa_gpio_probe() */
230#ifdef CONFIG_CPU_PXA26x
231 pxa_last_gpio = 89;
232#else
233 pxa_last_gpio = 84;
234#endif
229 for (i = 0; i <= pxa_last_gpio; i++) 235 for (i = 0; i <= pxa_last_gpio; i++)
230 gpio_desc[i].valid = 1; 236 gpio_desc[i].valid = 1;
231 237
@@ -295,6 +301,7 @@ static void __init pxa27x_mfp_init(void)
295{ 301{
296 int i, gpio; 302 int i, gpio;
297 303
304 pxa_last_gpio = 120; /* running before pxa_gpio_probe() */
298 for (i = 0; i <= pxa_last_gpio; i++) { 305 for (i = 0; i <= pxa_last_gpio; i++) {
299 /* skip GPIO2, 5, 6, 7, 8, they are not 306 /* skip GPIO2, 5, 6, 7, 8, they are not
300 * valid pins allow configuration 307 * valid pins allow configuration
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index e48033eb2be8..3352b37b60cf 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -208,7 +208,7 @@ static struct clk_lookup pxa25x_clkregs[] = {
208 INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"), 208 INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
209 INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"), 209 INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
210 INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL), 210 INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
211 INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL), 211 INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
212}; 212};
213 213
214static struct clk_lookup pxa25x_hwuart_clkreg = 214static struct clk_lookup pxa25x_hwuart_clkreg =
@@ -368,7 +368,6 @@ static int __init pxa25x_init(void)
368 368
369 register_syscore_ops(&pxa_irq_syscore_ops); 369 register_syscore_ops(&pxa_irq_syscore_ops);
370 register_syscore_ops(&pxa2xx_mfp_syscore_ops); 370 register_syscore_ops(&pxa2xx_mfp_syscore_ops);
371 register_syscore_ops(&pxa_gpio_syscore_ops);
372 register_syscore_ops(&pxa2xx_clock_syscore_ops); 371 register_syscore_ops(&pxa2xx_clock_syscore_ops);
373 372
374 ret = platform_add_devices(pxa25x_devices, 373 ret = platform_add_devices(pxa25x_devices,
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index a70b7e23fa44..6bce78edce7a 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -229,7 +229,7 @@ static struct clk_lookup pxa27x_clkregs[] = {
229 INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"), 229 INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
230 INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"), 230 INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
231 INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL), 231 INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
232 INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL), 232 INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
233}; 233};
234 234
235#ifdef CONFIG_PM 235#ifdef CONFIG_PM
@@ -456,7 +456,6 @@ static int __init pxa27x_init(void)
456 456
457 register_syscore_ops(&pxa_irq_syscore_ops); 457 register_syscore_ops(&pxa_irq_syscore_ops);
458 register_syscore_ops(&pxa2xx_mfp_syscore_ops); 458 register_syscore_ops(&pxa2xx_mfp_syscore_ops);
459 register_syscore_ops(&pxa_gpio_syscore_ops);
460 register_syscore_ops(&pxa2xx_clock_syscore_ops); 459 register_syscore_ops(&pxa2xx_clock_syscore_ops);
461 460
462 ret = platform_add_devices(devices, ARRAY_SIZE(devices)); 461 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 881934899bda..1570d457fea3 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -463,7 +463,6 @@ static int __init pxa3xx_init(void)
463 463
464 register_syscore_ops(&pxa_irq_syscore_ops); 464 register_syscore_ops(&pxa_irq_syscore_ops);
465 register_syscore_ops(&pxa3xx_mfp_syscore_ops); 465 register_syscore_ops(&pxa3xx_mfp_syscore_ops);
466 register_syscore_ops(&pxa_gpio_syscore_ops);
467 register_syscore_ops(&pxa3xx_clock_syscore_ops); 466 register_syscore_ops(&pxa3xx_clock_syscore_ops);
468 467
469 ret = platform_add_devices(devices, ARRAY_SIZE(devices)); 468 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
index 35023d7d3cd4..47601f80e6e7 100644
--- a/arch/arm/mach-pxa/pxa95x.c
+++ b/arch/arm/mach-pxa/pxa95x.c
@@ -284,7 +284,6 @@ static int __init pxa95x_init(void)
284 return ret; 284 return ret;
285 285
286 register_syscore_ops(&pxa_irq_syscore_ops); 286 register_syscore_ops(&pxa_irq_syscore_ops);
287 register_syscore_ops(&pxa_gpio_syscore_ops);
288 register_syscore_ops(&pxa3xx_clock_syscore_ops); 287 register_syscore_ops(&pxa3xx_clock_syscore_ops);
289 288
290 ret = platform_add_devices(devices, ARRAY_SIZE(devices)); 289 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-s3c2440/common.h b/arch/arm/mach-s3c2440/common.h
index db8a98ac68c5..0c1eb1dfc534 100644
--- a/arch/arm/mach-s3c2440/common.h
+++ b/arch/arm/mach-s3c2440/common.h
@@ -12,6 +12,6 @@
12#ifndef __ARCH_ARM_MACH_S3C2440_COMMON_H 12#ifndef __ARCH_ARM_MACH_S3C2440_COMMON_H
13#define __ARCH_ARM_MACH_S3C2440_COMMON_H 13#define __ARCH_ARM_MACH_S3C2440_COMMON_H
14 14
15void s3c2440_restart(char mode, const char *cmd); 15void s3c244x_restart(char mode, const char *cmd);
16 16
17#endif /* __ARCH_ARM_MACH_S3C2440_COMMON_H */ 17#endif /* __ARCH_ARM_MACH_S3C2440_COMMON_H */
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index 24569550de1a..19b577bc09b8 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -487,5 +487,5 @@ MACHINE_START(ANUBIS, "Simtec-Anubis")
487 .init_machine = anubis_init, 487 .init_machine = anubis_init,
488 .init_irq = s3c24xx_init_irq, 488 .init_irq = s3c24xx_init_irq,
489 .timer = &s3c24xx_timer, 489 .timer = &s3c24xx_timer,
490 .restart = s3c2440_restart, 490 .restart = s3c244x_restart,
491MACHINE_END 491MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c
index d6a9763110cd..d7ae49c90118 100644
--- a/arch/arm/mach-s3c2440/mach-at2440evb.c
+++ b/arch/arm/mach-s3c2440/mach-at2440evb.c
@@ -222,5 +222,5 @@ MACHINE_START(AT2440EVB, "AT2440EVB")
222 .init_machine = at2440evb_init, 222 .init_machine = at2440evb_init,
223 .init_irq = s3c24xx_init_irq, 223 .init_irq = s3c24xx_init_irq,
224 .timer = &s3c24xx_timer, 224 .timer = &s3c24xx_timer,
225 .restart = s3c2440_restart, 225 .restart = s3c244x_restart,
226MACHINE_END 226MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c
index 7365a441cc5c..cfd20202e944 100644
--- a/arch/arm/mach-s3c2440/mach-gta02.c
+++ b/arch/arm/mach-s3c2440/mach-gta02.c
@@ -601,5 +601,5 @@ MACHINE_START(NEO1973_GTA02, "GTA02")
601 .init_irq = s3c24xx_init_irq, 601 .init_irq = s3c24xx_init_irq,
602 .init_machine = gta02_machine_init, 602 .init_machine = gta02_machine_init,
603 .timer = &s3c24xx_timer, 603 .timer = &s3c24xx_timer,
604 .restart = s3c2440_restart, 604 .restart = s3c244x_restart,
605MACHINE_END 605MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-mini2440.c b/arch/arm/mach-s3c2440/mach-mini2440.c
index adbbb85bc4cd..5d66fb218a41 100644
--- a/arch/arm/mach-s3c2440/mach-mini2440.c
+++ b/arch/arm/mach-s3c2440/mach-mini2440.c
@@ -701,5 +701,5 @@ MACHINE_START(MINI2440, "MINI2440")
701 .init_machine = mini2440_init, 701 .init_machine = mini2440_init,
702 .init_irq = s3c24xx_init_irq, 702 .init_irq = s3c24xx_init_irq,
703 .timer = &s3c24xx_timer, 703 .timer = &s3c24xx_timer,
704 .restart = s3c2440_restart, 704 .restart = s3c244x_restart,
705MACHINE_END 705MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-nexcoder.c b/arch/arm/mach-s3c2440/mach-nexcoder.c
index 40eaf844bc1f..5198e3e1c5be 100644
--- a/arch/arm/mach-s3c2440/mach-nexcoder.c
+++ b/arch/arm/mach-s3c2440/mach-nexcoder.c
@@ -158,5 +158,5 @@ MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440")
158 .init_machine = nexcoder_init, 158 .init_machine = nexcoder_init,
159 .init_irq = s3c24xx_init_irq, 159 .init_irq = s3c24xx_init_irq,
160 .timer = &s3c24xx_timer, 160 .timer = &s3c24xx_timer,
161 .restart = s3c2440_restart, 161 .restart = s3c244x_restart,
162MACHINE_END 162MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index 4c480ef734f6..c5daeb612a88 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -436,5 +436,5 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS")
436 .init_irq = s3c24xx_init_irq, 436 .init_irq = s3c24xx_init_irq,
437 .init_machine = osiris_init, 437 .init_machine = osiris_init,
438 .timer = &s3c24xx_timer, 438 .timer = &s3c24xx_timer,
439 .restart = s3c2440_restart, 439 .restart = s3c244x_restart,
440MACHINE_END 440MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-rx1950.c b/arch/arm/mach-s3c2440/mach-rx1950.c
index 4a8e2d34994c..200debb4c72d 100644
--- a/arch/arm/mach-s3c2440/mach-rx1950.c
+++ b/arch/arm/mach-s3c2440/mach-rx1950.c
@@ -822,5 +822,5 @@ MACHINE_START(RX1950, "HP iPAQ RX1950")
822 .init_irq = s3c24xx_init_irq, 822 .init_irq = s3c24xx_init_irq,
823 .init_machine = rx1950_init_machine, 823 .init_machine = rx1950_init_machine,
824 .timer = &s3c24xx_timer, 824 .timer = &s3c24xx_timer,
825 .restart = s3c2440_restart, 825 .restart = s3c244x_restart,
826MACHINE_END 826MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index 20103bafbd4b..56af35447598 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -213,5 +213,5 @@ MACHINE_START(RX3715, "IPAQ-RX3715")
213 .init_irq = rx3715_init_irq, 213 .init_irq = rx3715_init_irq,
214 .init_machine = rx3715_init_machine, 214 .init_machine = rx3715_init_machine,
215 .timer = &s3c24xx_timer, 215 .timer = &s3c24xx_timer,
216 .restart = s3c2440_restart, 216 .restart = s3c244x_restart,
217MACHINE_END 217MACHINE_END
diff --git a/arch/arm/mach-s3c2440/mach-smdk2440.c b/arch/arm/mach-s3c2440/mach-smdk2440.c
index 1deb60d12a60..83a1036d7dcb 100644
--- a/arch/arm/mach-s3c2440/mach-smdk2440.c
+++ b/arch/arm/mach-s3c2440/mach-smdk2440.c
@@ -183,5 +183,5 @@ MACHINE_START(S3C2440, "SMDK2440")
183 .map_io = smdk2440_map_io, 183 .map_io = smdk2440_map_io,
184 .init_machine = smdk2440_machine_init, 184 .init_machine = smdk2440_machine_init,
185 .timer = &s3c24xx_timer, 185 .timer = &s3c24xx_timer,
186 .restart = s3c2440_restart, 186 .restart = s3c244x_restart,
187MACHINE_END 187MACHINE_END
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c
index 517623a09fc5..2b3dddb49af7 100644
--- a/arch/arm/mach-s3c2440/s3c2440.c
+++ b/arch/arm/mach-s3c2440/s3c2440.c
@@ -35,7 +35,6 @@
35#include <plat/cpu.h> 35#include <plat/cpu.h>
36#include <plat/s3c244x.h> 36#include <plat/s3c244x.h>
37#include <plat/pm.h> 37#include <plat/pm.h>
38#include <plat/watchdog-reset.h>
39 38
40#include <plat/gpio-core.h> 39#include <plat/gpio-core.h>
41#include <plat/gpio-cfg.h> 40#include <plat/gpio-cfg.h>
@@ -74,15 +73,3 @@ void __init s3c2440_map_io(void)
74 s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up; 73 s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up;
75 s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up; 74 s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up;
76} 75}
77
78void s3c2440_restart(char mode, const char *cmd)
79{
80 if (mode == 's') {
81 soft_restart(0);
82 }
83
84 arch_wdt_reset();
85
86 /* we'll take a jump through zero as a poor second */
87 soft_restart(0);
88}
diff --git a/arch/arm/mach-s3c2440/s3c244x.c b/arch/arm/mach-s3c2440/s3c244x.c
index 36bc60f61d0a..d15852f642b7 100644
--- a/arch/arm/mach-s3c2440/s3c244x.c
+++ b/arch/arm/mach-s3c2440/s3c244x.c
@@ -46,6 +46,7 @@
46#include <plat/pm.h> 46#include <plat/pm.h>
47#include <plat/pll.h> 47#include <plat/pll.h>
48#include <plat/nand-core.h> 48#include <plat/nand-core.h>
49#include <plat/watchdog-reset.h>
49 50
50static struct map_desc s3c244x_iodesc[] __initdata = { 51static struct map_desc s3c244x_iodesc[] __initdata = {
51 IODESC_ENT(CLKPWR), 52 IODESC_ENT(CLKPWR),
@@ -196,3 +197,14 @@ struct syscore_ops s3c244x_pm_syscore_ops = {
196 .suspend = s3c244x_suspend, 197 .suspend = s3c244x_suspend,
197 .resume = s3c244x_resume, 198 .resume = s3c244x_resume,
198}; 199};
200
201void s3c244x_restart(char mode, const char *cmd)
202{
203 if (mode == 's')
204 soft_restart(0);
205
206 arch_wdt_reset();
207
208 /* we'll take a jump through zero as a poor second */
209 soft_restart(0);
210}
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index 52af00446a63..9ec635812349 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -5,50 +5,58 @@ config UX500_SOC_COMMON
5 default y 5 default y
6 select ARM_GIC 6 select ARM_GIC
7 select HAS_MTU 7 select HAS_MTU
8 select ARM_ERRATA_753970 8 select PL310_ERRATA_753970
9 select ARM_ERRATA_754322 9 select ARM_ERRATA_754322
10 select ARM_ERRATA_764369 10 select ARM_ERRATA_764369
11 11 select CACHE_L2X0
12menu "Ux500 SoC"
13 12
14config UX500_SOC_DB5500 13config UX500_SOC_DB5500
15 bool "DB5500" 14 bool
16 select MFD_DB5500_PRCMU 15 select MFD_DB5500_PRCMU
17 16
18config UX500_SOC_DB8500 17config UX500_SOC_DB8500
19 bool "DB8500" 18 bool
20 select MFD_DB8500_PRCMU 19 select MFD_DB8500_PRCMU
21 select REGULATOR_DB8500_PRCMU 20 select REGULATOR_DB8500_PRCMU
22 21 select CPU_FREQ_TABLE if CPU_FREQ
23endmenu
24 22
25menu "Ux500 target platform (boards)" 23menu "Ux500 target platform (boards)"
26 24
27config MACH_U8500 25config MACH_MOP500
28 bool "U8500 Development platform" 26 bool "U8500 Development platform, MOP500 versions"
29 depends on UX500_SOC_DB8500 27 select UX500_SOC_DB8500
30 select TPS6105X 28 select I2C
29 select I2C_NOMADIK
31 help 30 help
32 Include support for the mop500 development platform. 31 Include support for the MOP500 development platform.
33 32
34config MACH_HREFV60 33config MACH_HREFV60
35 bool "U85000 Development platform, HREFv60 version" 34 bool "U8500 Development platform, HREFv60 version"
36 depends on UX500_SOC_DB8500 35 select MACH_MOP500
37 help 36 help
38 Include support for the HREFv60 new development platform. 37 Include support for the HREFv60 new development platform.
38 Includes HREFv70, v71 etc.
39 39
40config MACH_SNOWBALL 40config MACH_SNOWBALL
41 bool "U8500 Snowball platform" 41 bool "U8500 Snowball platform"
42 depends on UX500_SOC_DB8500 42 select MACH_MOP500
43 select MACH_U8500
44 help 43 help
45 Include support for the snowball development platform. 44 Include support for the snowball development platform.
46 45
47config MACH_U5500 46config MACH_U5500
48 bool "U5500 Development platform" 47 bool "U5500 Development platform"
49 depends on UX500_SOC_DB5500 48 select UX500_SOC_DB5500
50 help 49 help
51 Include support for the U5500 development platform. 50 Include support for the U5500 development platform.
51
52config UX500_AUTO_PLATFORM
53 def_bool y
54 depends on !MACH_U5500
55 select MACH_MOP500
56 help
57 At least one platform needs to be selected in order to build
58 a working kernel. If everything else is disabled, this
59 automatically enables MACH_MOP500.
52endmenu 60endmenu
53 61
54config UX500_DEBUG_UART 62config UX500_DEBUG_UART
diff --git a/arch/arm/mach-ux500/Makefile b/arch/arm/mach-ux500/Makefile
index 6bd2f451c185..8dd75f210d2b 100644
--- a/arch/arm/mach-ux500/Makefile
+++ b/arch/arm/mach-ux500/Makefile
@@ -7,7 +7,7 @@ obj-y := clock.o cpu.o devices.o devices-common.o \
7obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o 7obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
8obj-$(CONFIG_UX500_SOC_DB5500) += cpu-db5500.o dma-db5500.o 8obj-$(CONFIG_UX500_SOC_DB5500) += cpu-db5500.o dma-db5500.o
9obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o devices-db8500.o 9obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o devices-db8500.o
10obj-$(CONFIG_MACH_U8500) += board-mop500.o board-mop500-sdi.o \ 10obj-$(CONFIG_MACH_MOP500) += board-mop500.o board-mop500-sdi.o \
11 board-mop500-regulators.o \ 11 board-mop500-regulators.o \
12 board-mop500-uib.o board-mop500-stuib.o \ 12 board-mop500-uib.o board-mop500-stuib.o \
13 board-mop500-u8500uib.o \ 13 board-mop500-u8500uib.o \
diff --git a/arch/arm/mach-ux500/board-mop500-regulators.c b/arch/arm/mach-ux500/board-mop500-regulators.c
index 2735d03996cf..52426a425787 100644
--- a/arch/arm/mach-ux500/board-mop500-regulators.c
+++ b/arch/arm/mach-ux500/board-mop500-regulators.c
@@ -74,6 +74,26 @@ static struct regulator_consumer_supply ab8500_vtvout_consumers[] = {
74 REGULATOR_SUPPLY("vddadc", "ab8500-gpadc.0"), 74 REGULATOR_SUPPLY("vddadc", "ab8500-gpadc.0"),
75}; 75};
76 76
77static struct regulator_consumer_supply ab8500_vaud_consumers[] = {
78 /* AB8500 audio-codec main supply */
79 REGULATOR_SUPPLY("vaud", "ab8500-codec.0"),
80};
81
82static struct regulator_consumer_supply ab8500_vamic1_consumers[] = {
83 /* AB8500 audio-codec Mic1 supply */
84 REGULATOR_SUPPLY("vamic1", "ab8500-codec.0"),
85};
86
87static struct regulator_consumer_supply ab8500_vamic2_consumers[] = {
88 /* AB8500 audio-codec Mic2 supply */
89 REGULATOR_SUPPLY("vamic2", "ab8500-codec.0"),
90};
91
92static struct regulator_consumer_supply ab8500_vdmic_consumers[] = {
93 /* AB8500 audio-codec DMic supply */
94 REGULATOR_SUPPLY("vdmic", "ab8500-codec.0"),
95};
96
77static struct regulator_consumer_supply ab8500_vintcore_consumers[] = { 97static struct regulator_consumer_supply ab8500_vintcore_consumers[] = {
78 /* SoC core supply, no device */ 98 /* SoC core supply, no device */
79 REGULATOR_SUPPLY("v-intcore", NULL), 99 REGULATOR_SUPPLY("v-intcore", NULL),
@@ -323,6 +343,8 @@ struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
323 .name = "V-AUD", 343 .name = "V-AUD",
324 .valid_ops_mask = REGULATOR_CHANGE_STATUS, 344 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
325 }, 345 },
346 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaud_consumers),
347 .consumer_supplies = ab8500_vaud_consumers,
326 }, 348 },
327 /* supply for v-anamic1 VAMic1-LDO */ 349 /* supply for v-anamic1 VAMic1-LDO */
328 [AB8500_LDO_ANAMIC1] = { 350 [AB8500_LDO_ANAMIC1] = {
@@ -330,6 +352,8 @@ struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
330 .name = "V-AMIC1", 352 .name = "V-AMIC1",
331 .valid_ops_mask = REGULATOR_CHANGE_STATUS, 353 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
332 }, 354 },
355 .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic1_consumers),
356 .consumer_supplies = ab8500_vamic1_consumers,
333 }, 357 },
334 /* supply for v-amic2, VAMIC2 LDO, reuse constants for AMIC1 */ 358 /* supply for v-amic2, VAMIC2 LDO, reuse constants for AMIC1 */
335 [AB8500_LDO_ANAMIC2] = { 359 [AB8500_LDO_ANAMIC2] = {
@@ -337,6 +361,8 @@ struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
337 .name = "V-AMIC2", 361 .name = "V-AMIC2",
338 .valid_ops_mask = REGULATOR_CHANGE_STATUS, 362 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
339 }, 363 },
364 .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic2_consumers),
365 .consumer_supplies = ab8500_vamic2_consumers,
340 }, 366 },
341 /* supply for v-dmic, VDMIC LDO */ 367 /* supply for v-dmic, VDMIC LDO */
342 [AB8500_LDO_DMIC] = { 368 [AB8500_LDO_DMIC] = {
@@ -344,6 +370,8 @@ struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
344 .name = "V-DMIC", 370 .name = "V-DMIC",
345 .valid_ops_mask = REGULATOR_CHANGE_STATUS, 371 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
346 }, 372 },
373 .num_consumer_supplies = ARRAY_SIZE(ab8500_vdmic_consumers),
374 .consumer_supplies = ab8500_vdmic_consumers,
347 }, 375 },
348 /* supply for v-intcore12, VINTCORE12 LDO */ 376 /* supply for v-intcore12, VINTCORE12 LDO */
349 [AB8500_LDO_INTCORE] = { 377 [AB8500_LDO_INTCORE] = {
diff --git a/arch/arm/mach-ux500/board-mop500-u8500uib.c b/arch/arm/mach-ux500/board-mop500-u8500uib.c
index feb5744d98b7..ead91c968ff4 100644
--- a/arch/arm/mach-ux500/board-mop500-u8500uib.c
+++ b/arch/arm/mach-ux500/board-mop500-u8500uib.c
@@ -8,7 +8,6 @@
8#include <linux/kernel.h> 8#include <linux/kernel.h>
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/i2c.h> 10#include <linux/i2c.h>
11#include <linux/gpio.h>
12#include <linux/interrupt.h> 11#include <linux/interrupt.h>
13#include <linux/mfd/tc3589x.h> 12#include <linux/mfd/tc3589x.h>
14#include <linux/input/matrix_keypad.h> 13#include <linux/input/matrix_keypad.h>
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 5c00712907d1..6d672a556df8 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -72,7 +72,7 @@ static struct platform_device snowball_led_dev = {
72}; 72};
73 73
74static struct ab8500_gpio_platform_data ab8500_gpio_pdata = { 74static struct ab8500_gpio_platform_data ab8500_gpio_pdata = {
75 .gpio_base = MOP500_AB8500_GPIO(0), 75 .gpio_base = MOP500_AB8500_PIN_GPIO(1),
76 .irq_base = MOP500_AB8500_VIR_GPIO_IRQ_BASE, 76 .irq_base = MOP500_AB8500_VIR_GPIO_IRQ_BASE,
77 /* config_reg is the initial configuration of ab8500 pins. 77 /* config_reg is the initial configuration of ab8500 pins.
78 * The pins can be configured as GPIO or alt functions based 78 * The pins can be configured as GPIO or alt functions based
diff --git a/arch/arm/mach-ux500/board-mop500.h b/arch/arm/mach-ux500/board-mop500.h
index f926d3db6207..7ff6cbffc104 100644
--- a/arch/arm/mach-ux500/board-mop500.h
+++ b/arch/arm/mach-ux500/board-mop500.h
@@ -63,7 +63,7 @@
63 * because the AB8500 GPIO pins are enumbered starting from 1, so the value in 63 * because the AB8500 GPIO pins are enumbered starting from 1, so the value in
64 * parens matches the GPIO pin number in the data sheet. 64 * parens matches the GPIO pin number in the data sheet.
65 */ 65 */
66#define MOP500_AB8500_GPIO(x) (MOP500_EGPIO_END + (x) - 1) 66#define MOP500_AB8500_PIN_GPIO(x) (MOP500_EGPIO_END + (x) - 1)
67/*Snowball AB8500 GPIO */ 67/*Snowball AB8500 GPIO */
68#define SNOWBALL_VSMPS2_1V8_GPIO MOP500_AB8500_PIN_GPIO(1) /* SYSCLKREQ2/GPIO1 */ 68#define SNOWBALL_VSMPS2_1V8_GPIO MOP500_AB8500_PIN_GPIO(1) /* SYSCLKREQ2/GPIO1 */
69#define SNOWBALL_PM_GPIO1_GPIO MOP500_AB8500_PIN_GPIO(2) /* SYSCLKREQ3/GPIO2 */ 69#define SNOWBALL_PM_GPIO1_GPIO MOP500_AB8500_PIN_GPIO(2) /* SYSCLKREQ3/GPIO2 */
diff --git a/arch/arm/mach-ux500/clock.c b/arch/arm/mach-ux500/clock.c
index 737907537004..ec35f0aa5665 100644
--- a/arch/arm/mach-ux500/clock.c
+++ b/arch/arm/mach-ux500/clock.c
@@ -223,6 +223,13 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
223} 223}
224EXPORT_SYMBOL(clk_set_rate); 224EXPORT_SYMBOL(clk_set_rate);
225 225
226int clk_set_parent(struct clk *clk, struct clk *parent)
227{
228 /*TODO*/
229 return -ENOSYS;
230}
231EXPORT_SYMBOL(clk_set_parent);
232
226static void clk_prcmu_enable(struct clk *clk) 233static void clk_prcmu_enable(struct clk *clk)
227{ 234{
228 void __iomem *cg_set_reg = __io_address(U8500_PRCMU_BASE) 235 void __iomem *cg_set_reg = __io_address(U8500_PRCMU_BASE)
diff --git a/arch/arm/mach-ux500/clock.h b/arch/arm/mach-ux500/clock.h
index 074490705229..d776ada08dbf 100644
--- a/arch/arm/mach-ux500/clock.h
+++ b/arch/arm/mach-ux500/clock.h
@@ -21,6 +21,7 @@ struct clkops {
21 void (*enable) (struct clk *); 21 void (*enable) (struct clk *);
22 void (*disable) (struct clk *); 22 void (*disable) (struct clk *);
23 unsigned long (*get_rate) (struct clk *); 23 unsigned long (*get_rate) (struct clk *);
24 int (*set_parent)(struct clk *, struct clk *);
24}; 25};
25 26
26/** 27/**
diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c
index a7c6cdc9b11e..6e66d3777ed5 100644
--- a/arch/arm/mach-ux500/devices-db8500.c
+++ b/arch/arm/mach-ux500/devices-db8500.c
@@ -101,6 +101,9 @@ static const dma_addr_t dma40_tx_map[DB8500_DMA_NR_DEV] = {
101 [DB8500_DMA_DEV41_SD_MM3_TX] = -1, 101 [DB8500_DMA_DEV41_SD_MM3_TX] = -1,
102 [DB8500_DMA_DEV42_SD_MM4_TX] = -1, 102 [DB8500_DMA_DEV42_SD_MM4_TX] = -1,
103 [DB8500_DMA_DEV43_SD_MM5_TX] = -1, 103 [DB8500_DMA_DEV43_SD_MM5_TX] = -1,
104 [DB8500_DMA_DEV14_MSP2_TX] = U8500_MSP2_BASE + MSP_TX_RX_REG_OFFSET,
105 [DB8500_DMA_DEV30_MSP1_TX] = U8500_MSP1_BASE + MSP_TX_RX_REG_OFFSET,
106 [DB8500_DMA_DEV31_MSP0_TX_SLIM0_CH0_TX] = U8500_MSP0_BASE + MSP_TX_RX_REG_OFFSET,
104}; 107};
105 108
106/* Mapping between source event lines and physical device address */ 109/* Mapping between source event lines and physical device address */
@@ -133,6 +136,9 @@ static const dma_addr_t dma40_rx_map[DB8500_DMA_NR_DEV] = {
133 [DB8500_DMA_DEV41_SD_MM3_RX] = -1, 136 [DB8500_DMA_DEV41_SD_MM3_RX] = -1,
134 [DB8500_DMA_DEV42_SD_MM4_RX] = -1, 137 [DB8500_DMA_DEV42_SD_MM4_RX] = -1,
135 [DB8500_DMA_DEV43_SD_MM5_RX] = -1, 138 [DB8500_DMA_DEV43_SD_MM5_RX] = -1,
139 [DB8500_DMA_DEV14_MSP2_RX] = U8500_MSP2_BASE + MSP_TX_RX_REG_OFFSET,
140 [DB8500_DMA_DEV30_MSP3_RX] = U8500_MSP3_BASE + MSP_TX_RX_REG_OFFSET,
141 [DB8500_DMA_DEV31_MSP0_RX_SLIM0_CH0_RX] = U8500_MSP0_BASE + MSP_TX_RX_REG_OFFSET,
136}; 142};
137 143
138/* Reserved event lines for memcpy only */ 144/* Reserved event lines for memcpy only */
diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h
index b6ba26a1367d..d93d6dbef25b 100644
--- a/arch/arm/mach-ux500/include/mach/hardware.h
+++ b/arch/arm/mach-ux500/include/mach/hardware.h
@@ -30,6 +30,8 @@
30#include <mach/db8500-regs.h> 30#include <mach/db8500-regs.h>
31#include <mach/db5500-regs.h> 31#include <mach/db5500-regs.h>
32 32
33#define MSP_TX_RX_REG_OFFSET 0
34
33#ifndef __ASSEMBLY__ 35#ifndef __ASSEMBLY__
34 36
35#include <mach/id.h> 37#include <mach/id.h>
diff --git a/arch/arm/mach-ux500/include/mach/irqs.h b/arch/arm/mach-ux500/include/mach/irqs.h
index 9db68d264c5f..c23a6b5f0c4e 100644
--- a/arch/arm/mach-ux500/include/mach/irqs.h
+++ b/arch/arm/mach-ux500/include/mach/irqs.h
@@ -43,7 +43,7 @@
43/* This will be overridden by board-specific irq headers */ 43/* This will be overridden by board-specific irq headers */
44#define IRQ_BOARD_END IRQ_BOARD_START 44#define IRQ_BOARD_END IRQ_BOARD_START
45 45
46#ifdef CONFIG_MACH_U8500 46#ifdef CONFIG_MACH_MOP500
47#include <mach/irqs-board-mop500.h> 47#include <mach/irqs-board-mop500.h>
48#endif 48#endif
49 49
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
index 9b3d0fbaee72..88c3ba151e87 100644
--- a/arch/arm/mach-vexpress/Kconfig
+++ b/arch/arm/mach-vexpress/Kconfig
@@ -7,7 +7,7 @@ config ARCH_VEXPRESS_CA9X4
7 select ARM_GIC 7 select ARM_GIC
8 select ARM_ERRATA_720789 8 select ARM_ERRATA_720789
9 select ARM_ERRATA_751472 9 select ARM_ERRATA_751472
10 select ARM_ERRATA_753970 10 select PL310_ERRATA_753970
11 select HAVE_SMP 11 select HAVE_SMP
12 select MIGHT_HAVE_CACHE_L2X0 12 select MIGHT_HAVE_CACHE_L2X0
13 13
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 0404ccbb8aa3..f1c8486f7501 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -230,9 +230,7 @@ __v7_setup:
230 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register 230 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
231#endif 231#endif
232#ifdef CONFIG_ARM_ERRATA_743622 232#ifdef CONFIG_ARM_ERRATA_743622
233 teq r6, #0x20 @ present in r2p0 233 teq r5, #0x00200000 @ only present in r2p*
234 teqne r6, #0x21 @ present in r2p1
235 teqne r6, #0x22 @ present in r2p2
236 mrceq p15, 0, r10, c15, c0, 1 @ read diagnostic register 234 mrceq p15, 0, r10, c15, c0, 1 @ read diagnostic register
237 orreq r10, r10, #1 << 6 @ set bit #6 235 orreq r10, r10, #1 << 6 @ set bit #6
238 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register 236 mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
index f0726d48df22..c61ec0fc10d4 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
@@ -139,15 +139,15 @@
139#define MX25_PAD_NFRB__GPIO_3_31 IOMUX_PAD(0x27c, 0x084, 0x15, 0, 0, NO_PAD_CTRL) 139#define MX25_PAD_NFRB__GPIO_3_31 IOMUX_PAD(0x27c, 0x084, 0x15, 0, 0, NO_PAD_CTRL)
140 140
141#define MX25_PAD_D15__D15 IOMUX_PAD(0x280, 0x088, 0x00, 0, 0, NO_PAD_CTRL) 141#define MX25_PAD_D15__D15 IOMUX_PAD(0x280, 0x088, 0x00, 0, 0, NO_PAD_CTRL)
142#define MX25_PAD_D15__LD16 IOMUX_PAD(0x280, 0x088, 0x01, 0, 0, NO_PAD_CTRL) 142#define MX25_PAD_D15__LD16 IOMUX_PAD(0x280, 0x088, 0x01, 0, 0, PAD_CTL_SRE_FAST)
143#define MX25_PAD_D15__GPIO_4_5 IOMUX_PAD(0x280, 0x088, 0x05, 0, 0, NO_PAD_CTRL) 143#define MX25_PAD_D15__GPIO_4_5 IOMUX_PAD(0x280, 0x088, 0x05, 0, 0, NO_PAD_CTRL)
144 144
145#define MX25_PAD_D14__D14 IOMUX_PAD(0x284, 0x08c, 0x00, 0, 0, NO_PAD_CTRL) 145#define MX25_PAD_D14__D14 IOMUX_PAD(0x284, 0x08c, 0x00, 0, 0, NO_PAD_CTRL)
146#define MX25_PAD_D14__LD17 IOMUX_PAD(0x284, 0x08c, 0x01, 0, 0, NO_PAD_CTRL) 146#define MX25_PAD_D14__LD17 IOMUX_PAD(0x284, 0x08c, 0x01, 0, 0, PAD_CTL_SRE_FAST)
147#define MX25_PAD_D14__GPIO_4_6 IOMUX_PAD(0x284, 0x08c, 0x05, 0, 0, NO_PAD_CTRL) 147#define MX25_PAD_D14__GPIO_4_6 IOMUX_PAD(0x284, 0x08c, 0x05, 0, 0, NO_PAD_CTRL)
148 148
149#define MX25_PAD_D13__D13 IOMUX_PAD(0x288, 0x090, 0x00, 0, 0, NO_PAD_CTRL) 149#define MX25_PAD_D13__D13 IOMUX_PAD(0x288, 0x090, 0x00, 0, 0, NO_PAD_CTRL)
150#define MX25_PAD_D13__LD18 IOMUX_PAD(0x288, 0x090, 0x01, 0, 0, NO_PAD_CTRL) 150#define MX25_PAD_D13__LD18 IOMUX_PAD(0x288, 0x090, 0x01, 0, 0, PAD_CTL_SRE_FAST)
151#define MX25_PAD_D13__GPIO_4_7 IOMUX_PAD(0x288, 0x090, 0x05, 0, 0, NO_PAD_CTRL) 151#define MX25_PAD_D13__GPIO_4_7 IOMUX_PAD(0x288, 0x090, 0x05, 0, 0, NO_PAD_CTRL)
152 152
153#define MX25_PAD_D12__D12 IOMUX_PAD(0x28c, 0x094, 0x00, 0, 0, NO_PAD_CTRL) 153#define MX25_PAD_D12__D12 IOMUX_PAD(0x28c, 0x094, 0x00, 0, 0, NO_PAD_CTRL)
@@ -192,54 +192,54 @@
192#define MX25_PAD_D0__D0 IOMUX_PAD(0x2bc, 0x0c4, 0x00, 0, 0, NO_PAD_CTRL) 192#define MX25_PAD_D0__D0 IOMUX_PAD(0x2bc, 0x0c4, 0x00, 0, 0, NO_PAD_CTRL)
193#define MX25_PAD_D0__GPIO_4_20 IOMUX_PAD(0x2bc, 0x0c4, 0x05, 0, 0, NO_PAD_CTRL) 193#define MX25_PAD_D0__GPIO_4_20 IOMUX_PAD(0x2bc, 0x0c4, 0x05, 0, 0, NO_PAD_CTRL)
194 194
195#define MX25_PAD_LD0__LD0 IOMUX_PAD(0x2c0, 0x0c8, 0x10, 0, 0, NO_PAD_CTRL) 195#define MX25_PAD_LD0__LD0 IOMUX_PAD(0x2c0, 0x0c8, 0x10, 0, 0, PAD_CTL_SRE_FAST)
196#define MX25_PAD_LD0__CSI_D0 IOMUX_PAD(0x2c0, 0x0c8, 0x12, 0x488, 0, NO_PAD_CTRL) 196#define MX25_PAD_LD0__CSI_D0 IOMUX_PAD(0x2c0, 0x0c8, 0x12, 0x488, 0, NO_PAD_CTRL)
197#define MX25_PAD_LD0__GPIO_2_15 IOMUX_PAD(0x2c0, 0x0c8, 0x15, 0, 0, NO_PAD_CTRL) 197#define MX25_PAD_LD0__GPIO_2_15 IOMUX_PAD(0x2c0, 0x0c8, 0x15, 0, 0, NO_PAD_CTRL)
198 198
199#define MX25_PAD_LD1__LD1 IOMUX_PAD(0x2c4, 0x0cc, 0x10, 0, 0, NO_PAD_CTRL) 199#define MX25_PAD_LD1__LD1 IOMUX_PAD(0x2c4, 0x0cc, 0x10, 0, 0, PAD_CTL_SRE_FAST)
200#define MX25_PAD_LD1__CSI_D1 IOMUX_PAD(0x2c4, 0x0cc, 0x12, 0x48c, 0, NO_PAD_CTRL) 200#define MX25_PAD_LD1__CSI_D1 IOMUX_PAD(0x2c4, 0x0cc, 0x12, 0x48c, 0, NO_PAD_CTRL)
201#define MX25_PAD_LD1__GPIO_2_16 IOMUX_PAD(0x2c4, 0x0cc, 0x15, 0, 0, NO_PAD_CTRL) 201#define MX25_PAD_LD1__GPIO_2_16 IOMUX_PAD(0x2c4, 0x0cc, 0x15, 0, 0, NO_PAD_CTRL)
202 202
203#define MX25_PAD_LD2__LD2 IOMUX_PAD(0x2c8, 0x0d0, 0x10, 0, 0, NO_PAD_CTRL) 203#define MX25_PAD_LD2__LD2 IOMUX_PAD(0x2c8, 0x0d0, 0x10, 0, 0, PAD_CTL_SRE_FAST)
204#define MX25_PAD_LD2__GPIO_2_17 IOMUX_PAD(0x2c8, 0x0d0, 0x15, 0, 0, NO_PAD_CTRL) 204#define MX25_PAD_LD2__GPIO_2_17 IOMUX_PAD(0x2c8, 0x0d0, 0x15, 0, 0, NO_PAD_CTRL)
205 205
206#define MX25_PAD_LD3__LD3 IOMUX_PAD(0x2cc, 0x0d4, 0x10, 0, 0, NO_PAD_CTRL) 206#define MX25_PAD_LD3__LD3 IOMUX_PAD(0x2cc, 0x0d4, 0x10, 0, 0, PAD_CTL_SRE_FAST)
207#define MX25_PAD_LD3__GPIO_2_18 IOMUX_PAD(0x2cc, 0x0d4, 0x15, 0, 0, NO_PAD_CTRL) 207#define MX25_PAD_LD3__GPIO_2_18 IOMUX_PAD(0x2cc, 0x0d4, 0x15, 0, 0, NO_PAD_CTRL)
208 208
209#define MX25_PAD_LD4__LD4 IOMUX_PAD(0x2d0, 0x0d8, 0x10, 0, 0, NO_PAD_CTRL) 209#define MX25_PAD_LD4__LD4 IOMUX_PAD(0x2d0, 0x0d8, 0x10, 0, 0, PAD_CTL_SRE_FAST)
210#define MX25_PAD_LD4__GPIO_2_19 IOMUX_PAD(0x2d0, 0x0d8, 0x15, 0, 0, NO_PAD_CTRL) 210#define MX25_PAD_LD4__GPIO_2_19 IOMUX_PAD(0x2d0, 0x0d8, 0x15, 0, 0, NO_PAD_CTRL)
211 211
212#define MX25_PAD_LD5__LD5 IOMUX_PAD(0x2d4, 0x0dc, 0x10, 0, 0, NO_PAD_CTRL) 212#define MX25_PAD_LD5__LD5 IOMUX_PAD(0x2d4, 0x0dc, 0x10, 0, 0, PAD_CTL_SRE_FAST)
213#define MX25_PAD_LD5__GPIO_1_19 IOMUX_PAD(0x2d4, 0x0dc, 0x15, 0, 0, NO_PAD_CTRL) 213#define MX25_PAD_LD5__GPIO_1_19 IOMUX_PAD(0x2d4, 0x0dc, 0x15, 0, 0, NO_PAD_CTRL)
214 214
215#define MX25_PAD_LD6__LD6 IOMUX_PAD(0x2d8, 0x0e0, 0x10, 0, 0, NO_PAD_CTRL) 215#define MX25_PAD_LD6__LD6 IOMUX_PAD(0x2d8, 0x0e0, 0x10, 0, 0, PAD_CTL_SRE_FAST)
216#define MX25_PAD_LD6__GPIO_1_20 IOMUX_PAD(0x2d8, 0x0e0, 0x15, 0, 0, NO_PAD_CTRL) 216#define MX25_PAD_LD6__GPIO_1_20 IOMUX_PAD(0x2d8, 0x0e0, 0x15, 0, 0, NO_PAD_CTRL)
217 217
218#define MX25_PAD_LD7__LD7 IOMUX_PAD(0x2dc, 0x0e4, 0x10, 0, 0, NO_PAD_CTRL) 218#define MX25_PAD_LD7__LD7 IOMUX_PAD(0x2dc, 0x0e4, 0x10, 0, 0, PAD_CTL_SRE_FAST)
219#define MX25_PAD_LD7__GPIO_1_21 IOMUX_PAD(0x2dc, 0x0e4, 0x15, 0, 0, NO_PAD_CTRL) 219#define MX25_PAD_LD7__GPIO_1_21 IOMUX_PAD(0x2dc, 0x0e4, 0x15, 0, 0, NO_PAD_CTRL)
220 220
221#define MX25_PAD_LD8__LD8 IOMUX_PAD(0x2e0, 0x0e8, 0x10, 0, 0, NO_PAD_CTRL) 221#define MX25_PAD_LD8__LD8 IOMUX_PAD(0x2e0, 0x0e8, 0x10, 0, 0, PAD_CTL_SRE_FAST)
222#define MX25_PAD_LD8__FEC_TX_ERR IOMUX_PAD(0x2e0, 0x0e8, 0x15, 0, 0, NO_PAD_CTRL) 222#define MX25_PAD_LD8__FEC_TX_ERR IOMUX_PAD(0x2e0, 0x0e8, 0x15, 0, 0, NO_PAD_CTRL)
223 223
224#define MX25_PAD_LD9__LD9 IOMUX_PAD(0x2e4, 0x0ec, 0x10, 0, 0, NO_PAD_CTRL) 224#define MX25_PAD_LD9__LD9 IOMUX_PAD(0x2e4, 0x0ec, 0x10, 0, 0, PAD_CTL_SRE_FAST)
225#define MX25_PAD_LD9__FEC_COL IOMUX_PAD(0x2e4, 0x0ec, 0x15, 0x504, 1, NO_PAD_CTRL) 225#define MX25_PAD_LD9__FEC_COL IOMUX_PAD(0x2e4, 0x0ec, 0x15, 0x504, 1, NO_PAD_CTRL)
226 226
227#define MX25_PAD_LD10__LD10 IOMUX_PAD(0x2e8, 0x0f0, 0x10, 0, 0, NO_PAD_CTRL) 227#define MX25_PAD_LD10__LD10 IOMUX_PAD(0x2e8, 0x0f0, 0x10, 0, 0, PAD_CTL_SRE_FAST)
228#define MX25_PAD_LD10__FEC_RX_ER IOMUX_PAD(0x2e8, 0x0f0, 0x15, 0x518, 1, NO_PAD_CTRL) 228#define MX25_PAD_LD10__FEC_RX_ER IOMUX_PAD(0x2e8, 0x0f0, 0x15, 0x518, 1, NO_PAD_CTRL)
229 229
230#define MX25_PAD_LD11__LD11 IOMUX_PAD(0x2ec, 0x0f4, 0x10, 0, 0, NO_PAD_CTRL) 230#define MX25_PAD_LD11__LD11 IOMUX_PAD(0x2ec, 0x0f4, 0x10, 0, 0, PAD_CTL_SRE_FAST)
231#define MX25_PAD_LD11__FEC_RDATA2 IOMUX_PAD(0x2ec, 0x0f4, 0x15, 0x50c, 1, NO_PAD_CTRL) 231#define MX25_PAD_LD11__FEC_RDATA2 IOMUX_PAD(0x2ec, 0x0f4, 0x15, 0x50c, 1, NO_PAD_CTRL)
232 232
233#define MX25_PAD_LD12__LD12 IOMUX_PAD(0x2f0, 0x0f8, 0x10, 0, 0, NO_PAD_CTRL) 233#define MX25_PAD_LD12__LD12 IOMUX_PAD(0x2f0, 0x0f8, 0x10, 0, 0, PAD_CTL_SRE_FAST)
234#define MX25_PAD_LD12__FEC_RDATA3 IOMUX_PAD(0x2f0, 0x0f8, 0x15, 0x510, 1, NO_PAD_CTRL) 234#define MX25_PAD_LD12__FEC_RDATA3 IOMUX_PAD(0x2f0, 0x0f8, 0x15, 0x510, 1, NO_PAD_CTRL)
235 235
236#define MX25_PAD_LD13__LD13 IOMUX_PAD(0x2f4, 0x0fc, 0x10, 0, 0, NO_PAD_CTRL) 236#define MX25_PAD_LD13__LD13 IOMUX_PAD(0x2f4, 0x0fc, 0x10, 0, 0, PAD_CTL_SRE_FAST)
237#define MX25_PAD_LD13__FEC_TDATA2 IOMUX_PAD(0x2f4, 0x0fc, 0x15, 0, 0, NO_PAD_CTRL) 237#define MX25_PAD_LD13__FEC_TDATA2 IOMUX_PAD(0x2f4, 0x0fc, 0x15, 0, 0, NO_PAD_CTRL)
238 238
239#define MX25_PAD_LD14__LD14 IOMUX_PAD(0x2f8, 0x100, 0x10, 0, 0, NO_PAD_CTRL) 239#define MX25_PAD_LD14__LD14 IOMUX_PAD(0x2f8, 0x100, 0x10, 0, 0, PAD_CTL_SRE_FAST)
240#define MX25_PAD_LD14__FEC_TDATA3 IOMUX_PAD(0x2f8, 0x100, 0x15, 0, 0, NO_PAD_CTRL) 240#define MX25_PAD_LD14__FEC_TDATA3 IOMUX_PAD(0x2f8, 0x100, 0x15, 0, 0, NO_PAD_CTRL)
241 241
242#define MX25_PAD_LD15__LD15 IOMUX_PAD(0x2fc, 0x104, 0x10, 0, 0, NO_PAD_CTRL) 242#define MX25_PAD_LD15__LD15 IOMUX_PAD(0x2fc, 0x104, 0x10, 0, 0, PAD_CTL_SRE_FAST)
243#define MX25_PAD_LD15__FEC_RX_CLK IOMUX_PAD(0x2fc, 0x104, 0x15, 0x514, 1, NO_PAD_CTRL) 243#define MX25_PAD_LD15__FEC_RX_CLK IOMUX_PAD(0x2fc, 0x104, 0x15, 0x514, 1, NO_PAD_CTRL)
244 244
245#define MX25_PAD_HSYNC__HSYNC IOMUX_PAD(0x300, 0x108, 0x10, 0, 0, NO_PAD_CTRL) 245#define MX25_PAD_HSYNC__HSYNC IOMUX_PAD(0x300, 0x108, 0x10, 0, 0, NO_PAD_CTRL)
@@ -468,11 +468,11 @@
468#define MX25_PAD_GPIO_C__CAN2_TX IOMUX_PAD(0x3f8, 0x1fc, 0x16, 0, 0, PAD_CTL_PUS_22K_UP) 468#define MX25_PAD_GPIO_C__CAN2_TX IOMUX_PAD(0x3f8, 0x1fc, 0x16, 0, 0, PAD_CTL_PUS_22K_UP)
469 469
470#define MX25_PAD_GPIO_D__GPIO_D IOMUX_PAD(0x3fc, 0x200, 0x10, 0, 0, NO_PAD_CTRL) 470#define MX25_PAD_GPIO_D__GPIO_D IOMUX_PAD(0x3fc, 0x200, 0x10, 0, 0, NO_PAD_CTRL)
471#define MX25_PAD_GPIO_E__LD16 IOMUX_PAD(0x400, 0x204, 0x02, 0, 0, NO_PAD_CTRL) 471#define MX25_PAD_GPIO_E__LD16 IOMUX_PAD(0x400, 0x204, 0x02, 0, 0, PAD_CTL_SRE_FAST)
472#define MX25_PAD_GPIO_D__CAN2_RX IOMUX_PAD(0x3fc, 0x200, 0x16, 0x484, 1, PAD_CTL_PUS_22K_UP) 472#define MX25_PAD_GPIO_D__CAN2_RX IOMUX_PAD(0x3fc, 0x200, 0x16, 0x484, 1, PAD_CTL_PUS_22K_UP)
473 473
474#define MX25_PAD_GPIO_E__GPIO_E IOMUX_PAD(0x400, 0x204, 0x10, 0, 0, NO_PAD_CTRL) 474#define MX25_PAD_GPIO_E__GPIO_E IOMUX_PAD(0x400, 0x204, 0x10, 0, 0, NO_PAD_CTRL)
475#define MX25_PAD_GPIO_F__LD17 IOMUX_PAD(0x404, 0x208, 0x02, 0, 0, NO_PAD_CTRL) 475#define MX25_PAD_GPIO_F__LD17 IOMUX_PAD(0x404, 0x208, 0x02, 0, 0, PAD_CTL_SRE_FAST)
476#define MX25_PAD_GPIO_E__AUD7_TXD IOMUX_PAD(0x400, 0x204, 0x14, 0, 0, NO_PAD_CTRL) 476#define MX25_PAD_GPIO_E__AUD7_TXD IOMUX_PAD(0x400, 0x204, 0x14, 0, 0, NO_PAD_CTRL)
477 477
478#define MX25_PAD_GPIO_F__GPIO_F IOMUX_PAD(0x404, 0x208, 0x10, 0, 0, NO_PAD_CTRL) 478#define MX25_PAD_GPIO_F__GPIO_F IOMUX_PAD(0x404, 0x208, 0x10, 0, 0, NO_PAD_CTRL)
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index 567e4b54f245..56b6f8b7053e 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -20,7 +20,6 @@
20#include <linux/clk.h> 20#include <linux/clk.h>
21#include <linux/mutex.h> 21#include <linux/mutex.h>
22#include <linux/cpufreq.h> 22#include <linux/cpufreq.h>
23#include <linux/debugfs.h>
24#include <linux/io.h> 23#include <linux/io.h>
25 24
26#include <plat/clock.h> 25#include <plat/clock.h>
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 002fb4d96bbc..cb856fe0434a 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -2125,7 +2125,7 @@ static int __devexit omap_system_dma_remove(struct platform_device *pdev)
2125 2125
2126static struct platform_driver omap_system_dma_driver = { 2126static struct platform_driver omap_system_dma_driver = {
2127 .probe = omap_system_dma_probe, 2127 .probe = omap_system_dma_probe,
2128 .remove = omap_system_dma_remove, 2128 .remove = __devexit_p(omap_system_dma_remove),
2129 .driver = { 2129 .driver = {
2130 .name = "omap_dma_system" 2130 .name = "omap_dma_system"
2131 }, 2131 },
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index af3b92be8459..0b77fe87e010 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -80,9 +80,9 @@ static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg,
80 80
81static void omap_timer_restore_context(struct omap_dm_timer *timer) 81static void omap_timer_restore_context(struct omap_dm_timer *timer)
82{ 82{
83 omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_OFFSET, 83 __raw_writel(timer->context.tiocp_cfg,
84 timer->context.tiocp_cfg); 84 timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET);
85 if (timer->revision > 1) 85 if (timer->revision == 1)
86 __raw_writel(timer->context.tistat, timer->sys_stat); 86 __raw_writel(timer->context.tistat, timer->sys_stat);
87 87
88 __raw_writel(timer->context.tisr, timer->irq_stat); 88 __raw_writel(timer->context.tisr, timer->irq_stat);
@@ -357,6 +357,19 @@ int omap_dm_timer_stop(struct omap_dm_timer *timer)
357 357
358 __omap_dm_timer_stop(timer, timer->posted, rate); 358 __omap_dm_timer_stop(timer, timer->posted, rate);
359 359
360 if (timer->loses_context && timer->get_context_loss_count)
361 timer->ctx_loss_count =
362 timer->get_context_loss_count(&timer->pdev->dev);
363
364 /*
365 * Since the register values are computed and written within
366 * __omap_dm_timer_stop, we need to use read to retrieve the
367 * context.
368 */
369 timer->context.tclr =
370 omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
371 timer->context.tisr = __raw_readl(timer->irq_stat);
372 omap_dm_timer_disable(timer);
360 return 0; 373 return 0;
361} 374}
362EXPORT_SYMBOL_GPL(omap_dm_timer_stop); 375EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 6b51086fce18..4f18eaed4511 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -250,7 +250,6 @@ IS_AM_SUBCLASS(335x, 0x335)
250 * cpu_is_omap2423(): True for OMAP2423 250 * cpu_is_omap2423(): True for OMAP2423
251 * cpu_is_omap2430(): True for OMAP2430 251 * cpu_is_omap2430(): True for OMAP2430
252 * cpu_is_omap3430(): True for OMAP3430 252 * cpu_is_omap3430(): True for OMAP3430
253 * cpu_is_omap4430(): True for OMAP4430
254 * cpu_is_omap3505(): True for OMAP3505 253 * cpu_is_omap3505(): True for OMAP3505
255 * cpu_is_omap3517(): True for OMAP3517 254 * cpu_is_omap3517(): True for OMAP3517
256 */ 255 */
@@ -299,7 +298,6 @@ IS_OMAP_TYPE(3517, 0x3517)
299#define cpu_is_omap3505() 0 298#define cpu_is_omap3505() 0
300#define cpu_is_omap3517() 0 299#define cpu_is_omap3517() 0
301#define cpu_is_omap3430() 0 300#define cpu_is_omap3430() 0
302#define cpu_is_omap4430() 0
303#define cpu_is_omap3630() 0 301#define cpu_is_omap3630() 0
304 302
305/* 303/*
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index 2efd6454bce0..37bbbbb981b2 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -428,8 +428,16 @@
428#define OMAP_GPMC_NR_IRQS 8 428#define OMAP_GPMC_NR_IRQS 8
429#define OMAP_GPMC_IRQ_END (OMAP_GPMC_IRQ_BASE + OMAP_GPMC_NR_IRQS) 429#define OMAP_GPMC_IRQ_END (OMAP_GPMC_IRQ_BASE + OMAP_GPMC_NR_IRQS)
430 430
431/* PRCM IRQ handler */
432#ifdef CONFIG_ARCH_OMAP2PLUS
433#define OMAP_PRCM_IRQ_BASE (OMAP_GPMC_IRQ_END)
434#define OMAP_PRCM_NR_IRQS 64
435#define OMAP_PRCM_IRQ_END (OMAP_PRCM_IRQ_BASE + OMAP_PRCM_NR_IRQS)
436#else
437#define OMAP_PRCM_IRQ_END OMAP_GPMC_IRQ_END
438#endif
431 439
432#define NR_IRQS OMAP_GPMC_IRQ_END 440#define NR_IRQS OMAP_PRCM_IRQ_END
433 441
434#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32)) 442#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32))
435 443
diff --git a/arch/arm/plat-omap/include/plat/omap_device.h b/arch/arm/plat-omap/include/plat/omap_device.h
index 51423d2727a5..05f7615b61f0 100644
--- a/arch/arm/plat-omap/include/plat/omap_device.h
+++ b/arch/arm/plat-omap/include/plat/omap_device.h
@@ -100,6 +100,13 @@ struct platform_device *omap_device_build_ss(const char *pdev_name, int pdev_id,
100 struct omap_device_pm_latency *pm_lats, 100 struct omap_device_pm_latency *pm_lats,
101 int pm_lats_cnt, int is_early_device); 101 int pm_lats_cnt, int is_early_device);
102 102
103struct omap_device *omap_device_alloc(struct platform_device *pdev,
104 struct omap_hwmod **ohs, int oh_cnt,
105 struct omap_device_pm_latency *pm_lats,
106 int pm_lats_cnt);
107void omap_device_delete(struct omap_device *od);
108int omap_device_register(struct platform_device *pdev);
109
103void __iomem *omap_device_get_rt_va(struct omap_device *od); 110void __iomem *omap_device_get_rt_va(struct omap_device *od);
104struct device *omap_device_get_by_hwmod_name(const char *oh_name); 111struct device *omap_device_get_by_hwmod_name(const char *oh_name);
105 112
diff --git a/arch/arm/plat-omap/include/plat/sram.h b/arch/arm/plat-omap/include/plat/sram.h
index 75aa1b2bef51..227ae2657554 100644
--- a/arch/arm/plat-omap/include/plat/sram.h
+++ b/arch/arm/plat-omap/include/plat/sram.h
@@ -101,4 +101,5 @@ static inline void omap_push_sram_idle(void) {}
101#else 101#else
102#define OMAP4_SRAM_PA 0x40300000 102#define OMAP4_SRAM_PA 0x40300000
103#endif 103#endif
104#define AM33XX_SRAM_PA 0x40300000
104#endif 105#endif
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c
index ad80112c2275..ad32621aa52e 100644
--- a/arch/arm/plat-omap/mailbox.c
+++ b/arch/arm/plat-omap/mailbox.c
@@ -307,7 +307,7 @@ static void omap_mbox_fini(struct omap_mbox *mbox)
307 if (!--mbox->use_count) { 307 if (!--mbox->use_count) {
308 free_irq(mbox->irq, mbox); 308 free_irq(mbox->irq, mbox);
309 tasklet_kill(&mbox->txq->tasklet); 309 tasklet_kill(&mbox->txq->tasklet);
310 flush_work_sync(&mbox->rxq->work); 310 flush_work_sync(&mbox->rxq->work);
311 mbox_queue_free(mbox->txq); 311 mbox_queue_free(mbox->txq);
312 mbox_queue_free(mbox->rxq); 312 mbox_queue_free(mbox->rxq);
313 } 313 }
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
index e8d98693d2dd..2d00ab01d150 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/plat-omap/omap_device.c
@@ -1,3 +1,4 @@
1
1/* 2/*
2 * omap_device implementation 3 * omap_device implementation
3 * 4 *
@@ -97,14 +98,7 @@
97#define USE_WAKEUP_LAT 0 98#define USE_WAKEUP_LAT 0
98#define IGNORE_WAKEUP_LAT 1 99#define IGNORE_WAKEUP_LAT 1
99 100
100static int omap_device_register(struct platform_device *pdev);
101static int omap_early_device_register(struct platform_device *pdev); 101static int omap_early_device_register(struct platform_device *pdev);
102static struct omap_device *omap_device_alloc(struct platform_device *pdev,
103 struct omap_hwmod **ohs, int oh_cnt,
104 struct omap_device_pm_latency *pm_lats,
105 int pm_lats_cnt);
106static void omap_device_delete(struct omap_device *od);
107
108 102
109static struct omap_device_pm_latency omap_default_latency[] = { 103static struct omap_device_pm_latency omap_default_latency[] = {
110 { 104 {
@@ -509,7 +503,7 @@ static int omap_device_fill_resources(struct omap_device *od,
509 * 503 *
510 * Returns an struct omap_device pointer or ERR_PTR() on error; 504 * Returns an struct omap_device pointer or ERR_PTR() on error;
511 */ 505 */
512static struct omap_device *omap_device_alloc(struct platform_device *pdev, 506struct omap_device *omap_device_alloc(struct platform_device *pdev,
513 struct omap_hwmod **ohs, int oh_cnt, 507 struct omap_hwmod **ohs, int oh_cnt,
514 struct omap_device_pm_latency *pm_lats, 508 struct omap_device_pm_latency *pm_lats,
515 int pm_lats_cnt) 509 int pm_lats_cnt)
@@ -591,7 +585,7 @@ oda_exit1:
591 return ERR_PTR(ret); 585 return ERR_PTR(ret);
592} 586}
593 587
594static void omap_device_delete(struct omap_device *od) 588void omap_device_delete(struct omap_device *od)
595{ 589{
596 if (!od) 590 if (!od)
597 return; 591 return;
@@ -619,7 +613,7 @@ static void omap_device_delete(struct omap_device *od)
619 * information. Returns ERR_PTR(-EINVAL) if @oh is NULL; otherwise, 613 * information. Returns ERR_PTR(-EINVAL) if @oh is NULL; otherwise,
620 * passes along the return value of omap_device_build_ss(). 614 * passes along the return value of omap_device_build_ss().
621 */ 615 */
622struct platform_device *omap_device_build(const char *pdev_name, int pdev_id, 616struct platform_device __init *omap_device_build(const char *pdev_name, int pdev_id,
623 struct omap_hwmod *oh, void *pdata, 617 struct omap_hwmod *oh, void *pdata,
624 int pdata_len, 618 int pdata_len,
625 struct omap_device_pm_latency *pm_lats, 619 struct omap_device_pm_latency *pm_lats,
@@ -652,7 +646,7 @@ struct platform_device *omap_device_build(const char *pdev_name, int pdev_id,
652 * platform_device record. Returns an ERR_PTR() on error, or passes 646 * platform_device record. Returns an ERR_PTR() on error, or passes
653 * along the return value of omap_device_register(). 647 * along the return value of omap_device_register().
654 */ 648 */
655struct platform_device *omap_device_build_ss(const char *pdev_name, int pdev_id, 649struct platform_device __init *omap_device_build_ss(const char *pdev_name, int pdev_id,
656 struct omap_hwmod **ohs, int oh_cnt, 650 struct omap_hwmod **ohs, int oh_cnt,
657 void *pdata, int pdata_len, 651 void *pdata, int pdata_len,
658 struct omap_device_pm_latency *pm_lats, 652 struct omap_device_pm_latency *pm_lats,
@@ -717,7 +711,7 @@ odbs_exit:
717 * platform_early_add_device() on the underlying platform_device. 711 * platform_early_add_device() on the underlying platform_device.
718 * Returns 0 by default. 712 * Returns 0 by default.
719 */ 713 */
720static int omap_early_device_register(struct platform_device *pdev) 714static int __init omap_early_device_register(struct platform_device *pdev)
721{ 715{
722 struct platform_device *devices[1]; 716 struct platform_device *devices[1];
723 717
@@ -817,7 +811,7 @@ static struct dev_pm_domain omap_device_pm_domain = {
817 * platform_device_register() on the underlying platform_device. 811 * platform_device_register() on the underlying platform_device.
818 * Returns the return value of platform_device_register(). 812 * Returns the return value of platform_device_register().
819 */ 813 */
820static int omap_device_register(struct platform_device *pdev) 814int omap_device_register(struct platform_device *pdev)
821{ 815{
822 pr_debug("omap_device: %s: registering\n", pdev->name); 816 pr_debug("omap_device: %s: registering\n", pdev->name);
823 817
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 4243bdcc87bc..596f2224e15a 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -86,7 +86,7 @@ static int is_sram_locked(void)
86 __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0); /* all i-read */ 86 __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0); /* all i-read */
87 __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */ 87 __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */
88 } 88 }
89 if (cpu_is_omap34xx()) { 89 if (cpu_is_omap34xx() && !cpu_is_am33xx()) {
90 __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */ 90 __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */
91 __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0); /* all i-read */ 91 __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0); /* all i-read */
92 __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */ 92 __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */
@@ -124,7 +124,10 @@ static void __init omap_detect_sram(void)
124 omap_sram_size = 0x800; /* 2K */ 124 omap_sram_size = 0x800; /* 2K */
125 } 125 }
126 } else { 126 } else {
127 if (cpu_is_omap34xx()) { 127 if (cpu_is_am33xx()) {
128 omap_sram_start = AM33XX_SRAM_PA;
129 omap_sram_size = 0x10000; /* 64K */
130 } else if (cpu_is_omap34xx()) {
128 omap_sram_start = OMAP3_SRAM_PA; 131 omap_sram_start = OMAP3_SRAM_PA;
129 omap_sram_size = 0x10000; /* 64K */ 132 omap_sram_size = 0x10000; /* 64K */
130 } else if (cpu_is_omap44xx()) { 133 } else if (cpu_is_omap44xx()) {
@@ -368,6 +371,11 @@ static inline int omap34xx_sram_init(void)
368 return 0; 371 return 0;
369} 372}
370 373
374static inline int am33xx_sram_init(void)
375{
376 return 0;
377}
378
371int __init omap_sram_init(void) 379int __init omap_sram_init(void)
372{ 380{
373 omap_detect_sram(); 381 omap_detect_sram();
@@ -379,6 +387,8 @@ int __init omap_sram_init(void)
379 omap242x_sram_init(); 387 omap242x_sram_init();
380 else if (cpu_is_omap2430()) 388 else if (cpu_is_omap2430())
381 omap243x_sram_init(); 389 omap243x_sram_init();
390 else if (cpu_is_am33xx())
391 am33xx_sram_init();
382 else if (cpu_is_omap34xx()) 392 else if (cpu_is_omap34xx())
383 omap34xx_sram_init(); 393 omap34xx_sram_init();
384 394
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index 9fe35348e03b..2bab4c99a234 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -1249,7 +1249,7 @@ static void s3c2410_dma_resume(void)
1249 struct s3c2410_dma_chan *cp = s3c2410_chans + dma_channels - 1; 1249 struct s3c2410_dma_chan *cp = s3c2410_chans + dma_channels - 1;
1250 int channel; 1250 int channel;
1251 1251
1252 for (channel = dma_channels - 1; channel >= 0; cp++, channel--) 1252 for (channel = dma_channels - 1; channel >= 0; cp--, channel--)
1253 s3c2410_dma_resume_chan(cp); 1253 s3c2410_dma_resume_chan(cp);
1254} 1254}
1255 1255
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 98b864777a31..d322ba883f2f 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -1398,7 +1398,7 @@ void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1398 1398
1399#ifdef CONFIG_S3C_DEV_USB_HSOTG 1399#ifdef CONFIG_S3C_DEV_USB_HSOTG
1400static struct resource s3c_usb_hsotg_resources[] = { 1400static struct resource s3c_usb_hsotg_resources[] = {
1401 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_16K), 1401 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
1402 [1] = DEFINE_RES_IRQ(IRQ_OTG), 1402 [1] = DEFINE_RES_IRQ(IRQ_OTG),
1403}; 1403};
1404 1404
diff --git a/arch/arm/plat-spear/time.c b/arch/arm/plat-spear/time.c
index 0c77e4298675..abb5bdecd509 100644
--- a/arch/arm/plat-spear/time.c
+++ b/arch/arm/plat-spear/time.c
@@ -145,11 +145,13 @@ static void clockevent_set_mode(enum clock_event_mode mode,
145static int clockevent_next_event(unsigned long cycles, 145static int clockevent_next_event(unsigned long cycles,
146 struct clock_event_device *clk_event_dev) 146 struct clock_event_device *clk_event_dev)
147{ 147{
148 u16 val; 148 u16 val = readw(gpt_base + CR(CLKEVT));
149
150 if (val & CTRL_ENABLE)
151 writew(val & ~CTRL_ENABLE, gpt_base + CR(CLKEVT));
149 152
150 writew(cycles, gpt_base + LOAD(CLKEVT)); 153 writew(cycles, gpt_base + LOAD(CLKEVT));
151 154
152 val = readw(gpt_base + CR(CLKEVT));
153 val |= CTRL_ENABLE | CTRL_INT_ENABLE; 155 val |= CTRL_ENABLE | CTRL_INT_ENABLE;
154 writew(val, gpt_base + CR(CLKEVT)); 156 writew(val, gpt_base + CR(CLKEVT));
155 157