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-rw-r--r--arch/arm/boot/dts/Makefile5
-rw-r--r--arch/arm/boot/dts/am335x-evm.dts51
-rw-r--r--arch/arm/boot/dts/am335x-evmsk.dts11
-rw-r--r--arch/arm/boot/dts/am33xx.dtsi13
-rw-r--r--arch/arm/boot/dts/am4372.dtsi36
-rw-r--r--arch/arm/boot/dts/am43x-epos-evm.dts107
-rw-r--r--arch/arm/boot/dts/dra7.dtsi12
-rw-r--r--arch/arm/boot/dts/omap2420.dtsi2
-rw-r--r--arch/arm/boot/dts/omap2430.dtsi5
-rw-r--r--arch/arm/boot/dts/omap3-beagle-xm.dts4
-rw-r--r--arch/arm/boot/dts/omap3-beagle.dts4
-rw-r--r--arch/arm/boot/dts/omap3-cm-t3517.dts136
-rw-r--r--arch/arm/boot/dts/omap3-cm-t3530.dts12
-rw-r--r--arch/arm/boot/dts/omap3-cm-t3730.dts57
-rw-r--r--arch/arm/boot/dts/omap3-cm-t3x.dtsi110
-rw-r--r--arch/arm/boot/dts/omap3-cm-t3x30.dtsi74
-rw-r--r--arch/arm/boot/dts/omap3-devkit8000.dts16
-rw-r--r--arch/arm/boot/dts/omap3-gta04.dts51
-rw-r--r--arch/arm/boot/dts/omap3-igep.dtsi1
-rw-r--r--arch/arm/boot/dts/omap3-lilly-a83x.dtsi459
-rw-r--r--arch/arm/boot/dts/omap3-lilly-dbb056.dts170
-rw-r--r--arch/arm/boot/dts/omap3-overo.dtsi4
-rw-r--r--arch/arm/boot/dts/omap3-sb-t35.dtsi29
-rw-r--r--arch/arm/boot/dts/omap3-sbc-t3517.dts43
-rw-r--r--arch/arm/boot/dts/omap3-sbc-t3530.dts36
-rw-r--r--arch/arm/boot/dts/omap3-sbc-t3730.dts23
-rw-r--r--arch/arm/boot/dts/omap3.dtsi10
-rw-r--r--arch/arm/boot/dts/omap3430-sdp.dts3
-rw-r--r--arch/arm/boot/dts/omap3430es1-clocks.dtsi10
-rw-r--r--arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi10
-rw-r--r--arch/arm/boot/dts/omap4-panda-common.dtsi23
-rw-r--r--arch/arm/boot/dts/omap4-sdp.dts33
-rw-r--r--arch/arm/boot/dts/omap4.dtsi12
-rw-r--r--arch/arm/boot/dts/omap5.dtsi12
-rw-r--r--arch/arm/boot/dts/tps65910.dtsi5
-rw-r--r--arch/arm/mach-omap2/gpmc-nand.c31
-rw-r--r--arch/arm/mach-omap2/pdata-quirks.c67
37 files changed, 1519 insertions, 168 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index bbe7a45b0b8e..fcce17c14bc2 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -199,6 +199,10 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
199 omap2420-n810-wimax.dtb \ 199 omap2420-n810-wimax.dtb \
200 omap3430-sdp.dtb \ 200 omap3430-sdp.dtb \
201 omap3-beagle.dtb \ 201 omap3-beagle.dtb \
202 omap3-cm-t3517.dtb \
203 omap3-sbc-t3517.dtb \
204 omap3-cm-t3530.dtb \
205 omap3-sbc-t3530.dtb \
202 omap3-cm-t3730.dtb \ 206 omap3-cm-t3730.dtb \
203 omap3-sbc-t3730.dtb \ 207 omap3-sbc-t3730.dtb \
204 omap3-devkit8000.dtb \ 208 omap3-devkit8000.dtb \
@@ -213,6 +217,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
213 omap3-gta04.dtb \ 217 omap3-gta04.dtb \
214 omap3-igep0020.dtb \ 218 omap3-igep0020.dtb \
215 omap3-igep0030.dtb \ 219 omap3-igep0030.dtb \
220 omap3-lilly-dbb056.dtb \
216 omap3-zoom3.dtb \ 221 omap3-zoom3.dtb \
217 omap4-panda.dtb \ 222 omap4-panda.dtb \
218 omap4-panda-a4.dtb \ 223 omap4-panda-a4.dtb \
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index 7e6c64ed966d..07d61bb8d481 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -434,9 +434,9 @@
434 ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */ 434 ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
435 nand@0,0 { 435 nand@0,0 {
436 reg = <0 0 0>; /* CS0, offset 0 */ 436 reg = <0 0 0>; /* CS0, offset 0 */
437 nand-bus-width = <8>;
438 ti,nand-ecc-opt = "bch8"; 437 ti,nand-ecc-opt = "bch8";
439 gpmc,device-nand = "true"; 438 ti,elm-id = <&elm>;
439 nand-bus-width = <8>;
440 gpmc,device-width = <1>; 440 gpmc,device-width = <1>;
441 gpmc,sync-clk-ps = <0>; 441 gpmc,sync-clk-ps = <0>;
442 gpmc,cs-on-ns = <0>; 442 gpmc,cs-on-ns = <0>;
@@ -460,50 +460,51 @@
460 gpmc,wait-monitoring-ns = <0>; 460 gpmc,wait-monitoring-ns = <0>;
461 gpmc,wr-access-ns = <40>; 461 gpmc,wr-access-ns = <40>;
462 gpmc,wr-data-mux-bus-ns = <0>; 462 gpmc,wr-data-mux-bus-ns = <0>;
463 463 /* MTD partition table */
464 /* All SPL-* partitions are sized to minimal length
465 * which can be independently programmable. For
466 * NAND flash this is equal to size of erase-block */
464 #address-cells = <1>; 467 #address-cells = <1>;
465 #size-cells = <1>; 468 #size-cells = <1>;
466 elm_id = <&elm>;
467
468 /* MTD partition table */
469 partition@0 { 469 partition@0 {
470 label = "SPL1"; 470 label = "NAND.SPL";
471 reg = <0x00000000 0x000020000>; 471 reg = <0x00000000 0x000020000>;
472 }; 472 };
473
474 partition@1 { 473 partition@1 {
475 label = "SPL2"; 474 label = "NAND.SPL.backup1";
476 reg = <0x00020000 0x00020000>; 475 reg = <0x00020000 0x00020000>;
477 }; 476 };
478
479 partition@2 { 477 partition@2 {
480 label = "SPL3"; 478 label = "NAND.SPL.backup2";
481 reg = <0x00040000 0x00020000>; 479 reg = <0x00040000 0x00020000>;
482 }; 480 };
483
484 partition@3 { 481 partition@3 {
485 label = "SPL4"; 482 label = "NAND.SPL.backup3";
486 reg = <0x00060000 0x00020000>; 483 reg = <0x00060000 0x00020000>;
487 }; 484 };
488
489 partition@4 { 485 partition@4 {
490 label = "U-boot"; 486 label = "NAND.u-boot-spl";
491 reg = <0x00080000 0x001e0000>; 487 reg = <0x00080000 0x00040000>;
492 }; 488 };
493
494 partition@5 { 489 partition@5 {
495 label = "environment"; 490 label = "NAND.u-boot";
496 reg = <0x00260000 0x00020000>; 491 reg = <0x000C0000 0x00100000>;
497 }; 492 };
498
499 partition@6 { 493 partition@6 {
500 label = "Kernel"; 494 label = "NAND.u-boot-env";
501 reg = <0x00280000 0x00500000>; 495 reg = <0x001C0000 0x00020000>;
502 }; 496 };
503
504 partition@7 { 497 partition@7 {
505 label = "File-System"; 498 label = "NAND.u-boot-env.backup1";
506 reg = <0x00780000 0x0F880000>; 499 reg = <0x001E0000 0x00020000>;
500 };
501 partition@8 {
502 label = "NAND.kernel";
503 reg = <0x00200000 0x00800000>;
504 };
505 partition@9 {
506 label = "NAND.file-system";
507 reg = <0x00A00000 0x0F600000>;
507 }; 508 };
508 }; 509 };
509}; 510};
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts
index 4718ec4a4dbf..413e5e133b3e 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -121,7 +121,7 @@
121 ti,model = "AM335x-EVMSK"; 121 ti,model = "AM335x-EVMSK";
122 ti,audio-codec = <&tlv320aic3106>; 122 ti,audio-codec = <&tlv320aic3106>;
123 ti,mcasp-controller = <&mcasp1>; 123 ti,mcasp-controller = <&mcasp1>;
124 ti,codec-clock-rate = <24576000>; 124 ti,codec-clock-rate = <24000000>;
125 ti,audio-routing = 125 ti,audio-routing =
126 "Headphone Jack", "HPLOUT", 126 "Headphone Jack", "HPLOUT",
127 "Headphone Jack", "HPROUT"; 127 "Headphone Jack", "HPROUT";
@@ -336,9 +336,18 @@
336 status = "okay"; 336 status = "okay";
337 }; 337 };
338 338
339 usb-phy@47401b00 {
340 status = "okay";
341 };
342
339 usb@47401000 { 343 usb@47401000 {
340 status = "okay"; 344 status = "okay";
341 }; 345 };
346
347 usb@47401800 {
348 status = "okay";
349 dr_mode = "host";
350 };
342}; 351};
343 352
344&epwmss2 { 353&epwmss2 {
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 6d95d3df33c7..707342914a6f 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -58,6 +58,10 @@
58 275000 1125000 58 275000 1125000
59 >; 59 >;
60 voltage-tolerance = <2>; /* 2 percentage */ 60 voltage-tolerance = <2>; /* 2 percentage */
61
62 clocks = <&dpll_mpu_ck>;
63 clock-names = "cpu";
64
61 clock-latency = <300000>; /* From omap-cpufreq driver */ 65 clock-latency = <300000>; /* From omap-cpufreq driver */
62 }; 66 };
63 }; 67 };
@@ -318,6 +322,7 @@
318 compatible = "ti,omap4-hwspinlock"; 322 compatible = "ti,omap4-hwspinlock";
319 reg = <0x480ca000 0x1000>; 323 reg = <0x480ca000 0x1000>;
320 ti,hwmods = "spinlock"; 324 ti,hwmods = "spinlock";
325 #hwlock-cells = <1>;
321 }; 326 };
322 327
323 wdt2: wdt@44e35000 { 328 wdt2: wdt@44e35000 {
@@ -399,7 +404,7 @@
399 ti,timer-pwm; 404 ti,timer-pwm;
400 }; 405 };
401 406
402 rtc@44e3e000 { 407 rtc: rtc@44e3e000 {
403 compatible = "ti,da830-rtc"; 408 compatible = "ti,da830-rtc";
404 reg = <0x44e3e000 0x1000>; 409 reg = <0x44e3e000 0x1000>;
405 interrupts = <75 410 interrupts = <75
@@ -582,6 +587,8 @@
582 compatible = "ti,am33xx-ecap"; 587 compatible = "ti,am33xx-ecap";
583 #pwm-cells = <3>; 588 #pwm-cells = <3>;
584 reg = <0x48300100 0x80>; 589 reg = <0x48300100 0x80>;
590 interrupts = <31>;
591 interrupt-names = "ecap0";
585 ti,hwmods = "ecap0"; 592 ti,hwmods = "ecap0";
586 status = "disabled"; 593 status = "disabled";
587 }; 594 };
@@ -610,6 +617,8 @@
610 compatible = "ti,am33xx-ecap"; 617 compatible = "ti,am33xx-ecap";
611 #pwm-cells = <3>; 618 #pwm-cells = <3>;
612 reg = <0x48302100 0x80>; 619 reg = <0x48302100 0x80>;
620 interrupts = <47>;
621 interrupt-names = "ecap1";
613 ti,hwmods = "ecap1"; 622 ti,hwmods = "ecap1";
614 status = "disabled"; 623 status = "disabled";
615 }; 624 };
@@ -638,6 +647,8 @@
638 compatible = "ti,am33xx-ecap"; 647 compatible = "ti,am33xx-ecap";
639 #pwm-cells = <3>; 648 #pwm-cells = <3>;
640 reg = <0x48304100 0x80>; 649 reg = <0x48304100 0x80>;
650 interrupts = <61>;
651 interrupt-names = "ecap2";
641 ti,hwmods = "ecap2"; 652 ti,hwmods = "ecap2";
642 status = "disabled"; 653 status = "disabled";
643 }; 654 };
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 5a7cc38157b0..b687869b8298 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -33,6 +33,11 @@
33 compatible = "arm,cortex-a9"; 33 compatible = "arm,cortex-a9";
34 device_type = "cpu"; 34 device_type = "cpu";
35 reg = <0>; 35 reg = <0>;
36
37 clocks = <&dpll_mpu_ck>;
38 clock-names = "cpu";
39
40 clock-latency = <300000>; /* From omap-cpufreq driver */
36 }; 41 };
37 }; 42 };
38 43
@@ -351,6 +356,13 @@
351 status = "disabled"; 356 status = "disabled";
352 }; 357 };
353 358
359 hwspinlock: spinlock@480ca000 {
360 compatible = "ti,omap4-hwspinlock";
361 reg = <0x480ca000 0x1000>;
362 ti,hwmods = "spinlock";
363 #hwlock-cells = <1>;
364 };
365
354 i2c0: i2c@44e0b000 { 366 i2c0: i2c@44e0b000 {
355 compatible = "ti,am4372-i2c","ti,omap4-i2c"; 367 compatible = "ti,am4372-i2c","ti,omap4-i2c";
356 reg = <0x44e0b000 0x1000>; 368 reg = <0x44e0b000 0x1000>;
@@ -698,6 +710,30 @@
698 <&edma 11>; 710 <&edma 11>;
699 dma-names = "tx", "rx"; 711 dma-names = "tx", "rx";
700 }; 712 };
713
714 elm: elm@48080000 {
715 compatible = "ti,am3352-elm";
716 reg = <0x48080000 0x2000>;
717 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
718 ti,hwmods = "elm";
719 clocks = <&l4ls_gclk>;
720 clock-names = "fck";
721 status = "disabled";
722 };
723
724 gpmc: gpmc@50000000 {
725 compatible = "ti,am3352-gpmc";
726 ti,hwmods = "gpmc";
727 clocks = <&l3s_gclk>;
728 clock-names = "fck";
729 reg = <0x50000000 0x2000>;
730 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
731 gpmc,num-cs = <7>;
732 gpmc,num-waitpins = <2>;
733 #address-cells = <2>;
734 #size-cells = <1>;
735 status = "disabled";
736 };
701 }; 737 };
702}; 738};
703 739
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index a7d0db10a4f4..a3a53ce84f16 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -81,6 +81,27 @@
81 >; 81 >;
82 }; 82 };
83 83
84 nand_flash_x8: nand_flash_x8 {
85 pinctrl-single,pins = <
86 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.SELQSPIorNAND/GPIO */
87 0x0 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
88 0x4 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
89 0x8 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
90 0xc (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
91 0x10 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
92 0x14 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
93 0x18 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
94 0x1c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
95 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
96 0x74 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpmc_wpn */
97 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
98 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
99 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
100 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
101 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
102 >;
103 };
104
84 ecap0_pins: backlight_pins { 105 ecap0_pins: backlight_pins {
85 pinctrl-single,pins = < 106 pinctrl-single,pins = <
86 0x164 MUX_MODE0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */ 107 0x164 MUX_MODE0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
@@ -230,6 +251,92 @@
230 status = "okay"; 251 status = "okay";
231}; 252};
232 253
254&elm {
255 status = "okay";
256};
257
258&gpmc {
259 status = "okay";
260 pinctrl-names = "default";
261 pinctrl-0 = <&nand_flash_x8>;
262 ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
263 nand@0,0 {
264 reg = <0 0 0>; /* CS0, offset 0 */
265 ti,nand-ecc-opt = "bch8";
266 ti,elm-id = <&elm>;
267 nand-bus-width = <8>;
268 gpmc,device-width = <1>;
269 gpmc,sync-clk-ps = <0>;
270 gpmc,cs-on-ns = <0>;
271 gpmc,cs-rd-off-ns = <40>; /* tCEA + tCHZ + 1 */
272 gpmc,cs-wr-off-ns = <40>;
273 gpmc,adv-on-ns = <0>; /* cs-on-ns */
274 gpmc,adv-rd-off-ns = <25>; /* min( tALH + tALS + 1) */
275 gpmc,adv-wr-off-ns = <25>; /* min( tALH + tALS + 1) */
276 gpmc,we-on-ns = <0>; /* cs-on-ns */
277 gpmc,we-off-ns = <20>; /* we-on-time + tWP + 2 */
278 gpmc,oe-on-ns = <3>; /* cs-on-ns + tRR + 2 */
279 gpmc,oe-off-ns = <30>; /* oe-on-ns + tRP + 2 */
280 gpmc,access-ns = <30>; /* tCEA + 4*/
281 gpmc,rd-cycle-ns = <40>;
282 gpmc,wr-cycle-ns = <40>;
283 gpmc,wait-on-read = "true";
284 gpmc,wait-on-write = "true";
285 gpmc,bus-turnaround-ns = <0>;
286 gpmc,cycle2cycle-delay-ns = <0>;
287 gpmc,clk-activation-ns = <0>;
288 gpmc,wait-monitoring-ns = <0>;
289 gpmc,wr-access-ns = <40>;
290 gpmc,wr-data-mux-bus-ns = <0>;
291 /* MTD partition table */
292 /* All SPL-* partitions are sized to minimal length
293 * which can be independently programmable. For
294 * NAND flash this is equal to size of erase-block */
295 #address-cells = <1>;
296 #size-cells = <1>;
297 partition@0 {
298 label = "NAND.SPL";
299 reg = <0x00000000 0x00040000>;
300 };
301 partition@1 {
302 label = "NAND.SPL.backup1";
303 reg = <0x00040000 0x00040000>;
304 };
305 partition@2 {
306 label = "NAND.SPL.backup2";
307 reg = <0x00080000 0x00040000>;
308 };
309 partition@3 {
310 label = "NAND.SPL.backup3";
311 reg = <0x000C0000 0x00040000>;
312 };
313 partition@4 {
314 label = "NAND.u-boot-spl-os";
315 reg = <0x00100000 0x00080000>;
316 };
317 partition@5 {
318 label = "NAND.u-boot";
319 reg = <0x00180000 0x00100000>;
320 };
321 partition@6 {
322 label = "NAND.u-boot-env";
323 reg = <0x00280000 0x00040000>;
324 };
325 partition@7 {
326 label = "NAND.u-boot-env.backup1";
327 reg = <0x002C0000 0x00040000>;
328 };
329 partition@8 {
330 label = "NAND.kernel";
331 reg = <0x00300000 0x00700000>;
332 };
333 partition@9 {
334 label = "NAND.file-system";
335 reg = <0x00800000 0x1F600000>;
336 };
337 };
338};
339
233&epwmss0 { 340&epwmss0 {
234 status = "okay"; 341 status = "okay";
235}; 342};
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 6e89630f8022..499974a50e27 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -47,6 +47,11 @@
47 1000000 1060000 47 1000000 1060000
48 1176000 1160000 48 1176000 1160000
49 >; 49 >;
50
51 clocks = <&dpll_mpu_ck>;
52 clock-names = "cpu";
53
54 clock-latency = <300000>; /* From omap-cpufreq driver */
50 }; 55 };
51 cpu@1 { 56 cpu@1 {
52 device_type = "cpu"; 57 device_type = "cpu";
@@ -464,6 +469,13 @@
464 ti,hwmods = "wd_timer2"; 469 ti,hwmods = "wd_timer2";
465 }; 470 };
466 471
472 hwspinlock: spinlock@4a0f6000 {
473 compatible = "ti,omap4-hwspinlock";
474 reg = <0x4a0f6000 0x1000>;
475 ti,hwmods = "spinlock";
476 #hwlock-cells = <1>;
477 };
478
467 dmm@4e000000 { 479 dmm@4e000000 {
468 compatible = "ti,omap5-dmm"; 480 compatible = "ti,omap5-dmm";
469 reg = <0x4e000000 0x800>; 481 reg = <0x4e000000 0x800>;
diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi
index 60c605de22dd..85b1fb014c43 100644
--- a/arch/arm/boot/dts/omap2420.dtsi
+++ b/arch/arm/boot/dts/omap2420.dtsi
@@ -99,6 +99,7 @@
99 dmas = <&sdma 31>, 99 dmas = <&sdma 31>,
100 <&sdma 32>; 100 <&sdma 32>;
101 dma-names = "tx", "rx"; 101 dma-names = "tx", "rx";
102 status = "disabled";
102 }; 103 };
103 104
104 mcbsp2: mcbsp@48076000 { 105 mcbsp2: mcbsp@48076000 {
@@ -112,6 +113,7 @@
112 dmas = <&sdma 33>, 113 dmas = <&sdma 33>,
113 <&sdma 34>; 114 <&sdma 34>;
114 dma-names = "tx", "rx"; 115 dma-names = "tx", "rx";
116 status = "disabled";
115 }; 117 };
116 118
117 msdi1: mmc@4809c000 { 119 msdi1: mmc@4809c000 {
diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi
index d624345666f5..9d2f028fd687 100644
--- a/arch/arm/boot/dts/omap2430.dtsi
+++ b/arch/arm/boot/dts/omap2430.dtsi
@@ -113,6 +113,7 @@
113 dmas = <&sdma 31>, 113 dmas = <&sdma 31>,
114 <&sdma 32>; 114 <&sdma 32>;
115 dma-names = "tx", "rx"; 115 dma-names = "tx", "rx";
116 status = "disabled";
116 }; 117 };
117 118
118 mcbsp2: mcbsp@48076000 { 119 mcbsp2: mcbsp@48076000 {
@@ -128,6 +129,7 @@
128 dmas = <&sdma 33>, 129 dmas = <&sdma 33>,
129 <&sdma 34>; 130 <&sdma 34>;
130 dma-names = "tx", "rx"; 131 dma-names = "tx", "rx";
132 status = "disabled";
131 }; 133 };
132 134
133 mcbsp3: mcbsp@4808c000 { 135 mcbsp3: mcbsp@4808c000 {
@@ -143,6 +145,7 @@
143 dmas = <&sdma 17>, 145 dmas = <&sdma 17>,
144 <&sdma 18>; 146 <&sdma 18>;
145 dma-names = "tx", "rx"; 147 dma-names = "tx", "rx";
148 status = "disabled";
146 }; 149 };
147 150
148 mcbsp4: mcbsp@4808e000 { 151 mcbsp4: mcbsp@4808e000 {
@@ -158,6 +161,7 @@
158 dmas = <&sdma 19>, 161 dmas = <&sdma 19>,
159 <&sdma 20>; 162 <&sdma 20>;
160 dma-names = "tx", "rx"; 163 dma-names = "tx", "rx";
164 status = "disabled";
161 }; 165 };
162 166
163 mcbsp5: mcbsp@48096000 { 167 mcbsp5: mcbsp@48096000 {
@@ -173,6 +177,7 @@
173 dmas = <&sdma 21>, 177 dmas = <&sdma 21>,
174 <&sdma 22>; 178 <&sdma 22>;
175 dma-names = "tx", "rx"; 179 dma-names = "tx", "rx";
180 status = "disabled";
176 }; 181 };
177 182
178 mmc1: mmc@4809c000 { 183 mmc1: mmc@4809c000 {
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index 447e714d435b..cba357023878 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -234,3 +234,7 @@
234 regulator-max-microvolt = <1800000>; 234 regulator-max-microvolt = <1800000>;
235 regulator-always-on; 235 regulator-always-on;
236}; 236};
237
238&mcbsp2 {
239 status = "okay";
240};
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index 5053766d369b..d01e9a76c5da 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -211,3 +211,7 @@
211 regulator-max-microvolt = <1800000>; 211 regulator-max-microvolt = <1800000>;
212 regulator-always-on; 212 regulator-always-on;
213}; 213};
214
215&mcbsp2 {
216 status = "okay";
217};
diff --git a/arch/arm/boot/dts/omap3-cm-t3517.dts b/arch/arm/boot/dts/omap3-cm-t3517.dts
new file mode 100644
index 000000000000..d00502f4fd9b
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-cm-t3517.dts
@@ -0,0 +1,136 @@
1/*
2 * Support for CompuLab CM-T3517
3 */
4/dts-v1/;
5
6#include "am3517.dtsi"
7#include "omap3-cm-t3x.dtsi"
8
9/ {
10 model = "CompuLab CM-T3517";
11 compatible = "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";
12
13 vmmc: regulator-vmmc {
14 compatible = "regulator-fixed";
15 regulator-name = "vmmc";
16 regulator-min-microvolt = <3300000>;
17 regulator-max-microvolt = <3300000>;
18 };
19
20 wl12xx_vmmc2: wl12xx_vmmc2 {
21 compatible = "regulator-fixed";
22 regulator-name = "vw1271";
23 pinctrl-names = "default";
24 pinctrl-0 = <
25 &wl12xx_wkup_pins
26 &wl12xx_core_pins
27 >;
28 regulator-min-microvolt = <1800000>;
29 regulator-max-microvolt = <1800000>;
30 gpio = <&gpio1 6 GPIO_ACTIVE_HIGH >; /* gpio6 */
31 startup-delay-us = <20000>;
32 enable-active-high;
33 };
34
35 wl12xx_vaux2: wl12xx_vaux2 {
36 compatible = "regulator-fixed";
37 regulator-name = "vwl1271_vaux2";
38 regulator-min-microvolt = <1800000>;
39 regulator-max-microvolt = <1800000>;
40 };
41};
42
43&omap3_pmx_wkup {
44
45 wl12xx_wkup_pins: pinmux_wl12xx_wkup_pins {
46 pinctrl-single,pins = <
47 OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */
48 OMAP3_WKUP_IOPAD(0x2a12, PIN_OUTPUT | MUX_MODE4) /* sys_boot4.gpio_6 */
49 >;
50 };
51};
52
53&omap3_pmx_core {
54
55 phy1_reset_pins: pinmux_hsusb1_phy_reset_pins {
56 pinctrl-single,pins = <
57 OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE4) /* uart2_tx.gpio_146 */
58 >;
59 };
60
61 phy2_reset_pins: pinmux_hsusb2_phy_reset_pins {
62 pinctrl-single,pins = <
63 OMAP3_CORE1_IOPAD(0x217a, PIN_OUTPUT | MUX_MODE4) /* uart2_rx.gpio_147 */
64 >;
65 };
66
67 otg_drv_vbus: pinmux_otg_drv_vbus {
68 pinctrl-single,pins = <
69 OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50Mhz_clk.usb0_drvvbus */
70 >;
71 };
72
73 mmc2_pins: pinmux_mmc2_pins {
74 pinctrl-single,pins = <
75 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
76 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
77 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
78 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
79 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
80 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
81 >;
82 };
83
84 wl12xx_core_pins: pinmux_wl12xx_core_pins {
85 pinctrl-single,pins = <
86 OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs5.gpio_56 */
87 OMAP3_CORE1_IOPAD(0x2176, PIN_INPUT_PULLUP | MUX_MODE4) /* uart2_rts.gpio_145 */
88 >;
89 };
90
91 usb_hub_pins: pinmux_usb_hub_pins {
92 pinctrl-single,pins = <
93 OMAP3_CORE1_IOPAD(0x2184, PIN_OUTPUT | MUX_MODE4) /* mcbsp4_clkx.gpio_152 - USB HUB RST */
94 >;
95 };
96};
97
98&hsusb1_phy {
99 pinctrl-names = "default";
100 pinctrl-0 = <&phy1_reset_pins>;
101 reset-gpios = <&gpio5 18 GPIO_ACTIVE_LOW>;
102};
103
104&hsusb2_phy {
105 pinctrl-names = "default";
106 pinctrl-0 = <&phy2_reset_pins>;
107 reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>;
108};
109
110&davinci_emac {
111 status = "okay";
112};
113
114&davinci_mdio {
115 status = "okay";
116};
117
118&am35x_otg_hs {
119 status = "okay";
120 pinctrl-names = "default";
121 pinctrl-0 = <&otg_drv_vbus>;
122};
123
124&mmc1 {
125 vmmc-supply = <&vmmc>;
126};
127
128&mmc2 {
129 pinctrl-names = "default";
130 pinctrl-0 = <&mmc2_pins>;
131 vmmc-supply = <&wl12xx_vmmc2>;
132 vmmc_aux-supply = <&wl12xx_vaux2>;
133 non-removable;
134 bus-width = <4>;
135 cap-power-off-card;
136};
diff --git a/arch/arm/boot/dts/omap3-cm-t3530.dts b/arch/arm/boot/dts/omap3-cm-t3530.dts
new file mode 100644
index 000000000000..9faf1cd1dcaa
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-cm-t3530.dts
@@ -0,0 +1,12 @@
1/*
2 * Support for CompuLab CM-T3530
3 */
4/dts-v1/;
5
6#include "omap34xx.dtsi"
7#include "omap3-cm-t3x30.dtsi"
8
9/ {
10 model = "CompuLab CM-T3530";
11 compatible = "compulab,omap3-cm-t3530", "ti,omap34xx", "ti,omap3";
12};
diff --git a/arch/arm/boot/dts/omap3-cm-t3730.dts b/arch/arm/boot/dts/omap3-cm-t3730.dts
index 486f4d6c4219..b3f9a50b3bc8 100644
--- a/arch/arm/boot/dts/omap3-cm-t3730.dts
+++ b/arch/arm/boot/dts/omap3-cm-t3730.dts
@@ -32,57 +32,26 @@
32}; 32};
33 33
34&omap3_pmx_core { 34&omap3_pmx_core {
35 mmc1_pins: pinmux_mmc1_pins {
36 pinctrl-single,pins = <
37 0x114 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
38 0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
39 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
40 0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
41 0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
42 0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
43 >;
44 };
45 35
46 mmc2_pins: pinmux_mmc2_pins { 36 mmc2_pins: pinmux_mmc2_pins {
47 pinctrl-single,pins = < 37 pinctrl-single,pins = <
48 0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */ 38 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
49 0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */ 39 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
50 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */ 40 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
51 0x12e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */ 41 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
52 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */ 42 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
53 0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */ 43 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
54 >;
55 };
56
57 smsc1_pins: pinmux_smsc1_pins {
58 pinctrl-single,pins = <
59 0x88 (PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs5.gpmc_ncs5 */
60 0x16a (PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_cts_rctx.gpio_163 */
61 >;
62 };
63
64 uart3_pins: pinmux_uart3_pins {
65 pinctrl-single,pins = <
66 0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
67 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
68 >; 44 >;
69 }; 45 };
70 46
71 wl12xx_gpio: pinmux_wl12xx_gpio { 47 wl12xx_gpio: pinmux_wl12xx_gpio {
72 pinctrl-single,pins = < 48 pinctrl-single,pins = <
73 0xb2 (PIN_OUTPUT | MUX_MODE4) /* dss_data3.gpio_73 */ 49 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4) /* dss_data3.gpio_73 */
74 0x134 (PIN_INPUT | MUX_MODE4) /* sdmmc2_dat4.gpio_136 */ 50 OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT | MUX_MODE4) /* sdmmc2_dat4.gpio_136 */
75 >; 51 >;
76 }; 52 };
77}; 53};
78 54
79&mmc1 {
80 vmmc-supply = <&vmmc1>;
81 bus-width = <4>;
82 pinctrl-names = "default";
83 pinctrl-0 = <&mmc1_pins>;
84};
85
86&mmc2 { 55&mmc2 {
87 pinctrl-names = "default"; 56 pinctrl-names = "default";
88 pinctrl-0 = <&mmc2_pins>; 57 pinctrl-0 = <&mmc2_pins>;
@@ -92,13 +61,3 @@
92 bus-width = <4>; 61 bus-width = <4>;
93 cap-power-off-card; 62 cap-power-off-card;
94}; 63};
95
96&smsc1 {
97 pinctrl-names = "default";
98 pinctrl-0 = <&smsc1_pins>;
99};
100
101&uart3 {
102 pinctrl-names = "default";
103 pinctrl-0 = <&uart3_pins>;
104};
diff --git a/arch/arm/boot/dts/omap3-cm-t3x.dtsi b/arch/arm/boot/dts/omap3-cm-t3x.dtsi
new file mode 100644
index 000000000000..c671a2299ea8
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-cm-t3x.dtsi
@@ -0,0 +1,110 @@
1/*
2 * Common support for CompuLab CM-T3x CoMs
3 */
4
5/ {
6
7 memory {
8 device_type = "memory";
9 reg = <0x80000000 0x10000000>; /* 256 MB */
10 };
11
12 leds {
13 compatible = "gpio-leds";
14 pinctrl-names = "default";
15 pinctrl-0 = <&green_led_pins>;
16 ledb {
17 label = "cm-t3x:green";
18 gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>; /* gpio186 */
19 linux,default-trigger = "heartbeat";
20 };
21 };
22
23 /* HS USB Port 1 Power */
24 hsusb1_power: hsusb1_power_reg {
25 compatible = "regulator-fixed";
26 regulator-name = "hsusb1_vbus";
27 regulator-min-microvolt = <3300000>;
28 regulator-max-microvolt = <3300000>;
29 startup-delay-us = <70000>;
30 };
31
32 /* HS USB Port 2 Power */
33 hsusb2_power: hsusb2_power_reg {
34 compatible = "regulator-fixed";
35 regulator-name = "hsusb2_vbus";
36 regulator-min-microvolt = <3300000>;
37 regulator-max-microvolt = <3300000>;
38 startup-delay-us = <70000>;
39 };
40
41 /* HS USB Host PHY on PORT 1 */
42 hsusb1_phy: hsusb1_phy {
43 compatible = "usb-nop-xceiv";
44 vcc-supply = <&hsusb1_power>;
45 };
46
47 /* HS USB Host PHY on PORT 2 */
48 hsusb2_phy: hsusb2_phy {
49 compatible = "usb-nop-xceiv";
50 vcc-supply = <&hsusb2_power>;
51 };
52};
53
54&omap3_pmx_core {
55
56 uart3_pins: pinmux_uart3_pins {
57 pinctrl-single,pins = <
58 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
59 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
60 >;
61 };
62
63 mmc1_pins: pinmux_mmc1_pins {
64 pinctrl-single,pins = <
65 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
66 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
67 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
68 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
69 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
70 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
71 >;
72 };
73
74 green_led_pins: pinmux_green_led_pins {
75 pinctrl-single,pins = <
76 OMAP3_CORE1_IOPAD(0x21e2, PIN_OUTPUT | MUX_MODE4) /* sys_clkout2.gpio_186 */
77 >;
78 };
79};
80
81&uart3 {
82 pinctrl-names = "default";
83 pinctrl-0 = <&uart3_pins>;
84};
85
86&mmc1 {
87 pinctrl-names = "default";
88 pinctrl-0 = <&mmc1_pins>;
89 bus-width = <4>;
90};
91
92&mmc3 {
93 status = "disabled";
94};
95
96&i2c1 {
97 clock-frequency = <400000>;
98};
99
100&i2c3 {
101 clock-frequency = <400000>;
102};
103&usbhshost {
104 port1-mode = "ehci-phy";
105 port2-mode = "ehci-phy";
106};
107
108&usbhsehci {
109 phys = <&hsusb1_phy &hsusb2_phy>;
110};
diff --git a/arch/arm/boot/dts/omap3-cm-t3x30.dtsi b/arch/arm/boot/dts/omap3-cm-t3x30.dtsi
index 3a9f004d8924..d00055809e31 100644
--- a/arch/arm/boot/dts/omap3-cm-t3x30.dtsi
+++ b/arch/arm/boot/dts/omap3-cm-t3x30.dtsi
@@ -1,28 +1,16 @@
1/* 1/*
2 * Common support for CompuLab CM-T3530 and CM-T3730 2 * Common support for CompuLab CM-T3x30 CoMs
3 */ 3 */
4 4
5/ { 5#include "omap3-cm-t3x.dtsi"
6 memory {
7 device_type = "memory";
8 reg = <0x80000000 0x10000000>; /* 256 MB */
9 };
10 6
7/ {
11 cpus { 8 cpus {
12 cpu@0 { 9 cpu@0 {
13 cpu0-supply = <&vcc>; 10 cpu0-supply = <&vcc>;
14 }; 11 };
15 }; 12 };
16 13
17 leds {
18 compatible = "gpio-leds";
19 ledb {
20 label = "cm-t35:green";
21 gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>; /* gpio186 */
22 linux,default-trigger = "heartbeat";
23 };
24 };
25
26 vddvario: regulator-vddvario { 14 vddvario: regulator-vddvario {
27 compatible = "regulator-fixed"; 15 compatible = "regulator-fixed";
28 regulator-name = "vddvario"; 16 regulator-name = "vddvario";
@@ -36,11 +24,40 @@
36 }; 24 };
37}; 25};
38 26
27&omap3_pmx_core {
28
29 smsc1_pins: pinmux_smsc1_pins {
30 pinctrl-single,pins = <
31 OMAP3_CORE1_IOPAD(0x20b8, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs5.gpmc_ncs5 */
32 OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_cts_rctx.gpio_163 */
33 >;
34 };
35
36 hsusb0_pins: pinmux_hsusb0_pins {
37 pinctrl-single,pins = <
38 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
39 OMAP3_CORE1_IOPAD(0x21a2, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
40 OMAP3_CORE1_IOPAD(0x21a4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
41 OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
42 OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data0.hsusb2_data0 */
43 OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
44 OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
45 OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data3 */
46 OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data4 */
47 OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data5 */
48 OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data6 */
49 OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
50 >;
51 };
52};
53
39&gpmc { 54&gpmc {
40 ranges = <5 0 0x2c000000 0x01000000>; 55 ranges = <5 0 0x2c000000 0x01000000>;
41 56
42 smsc1: ethernet@5,0 { 57 smsc1: ethernet@5,0 {
43 compatible = "smsc,lan9221", "smsc,lan9115"; 58 compatible = "smsc,lan9221", "smsc,lan9115";
59 pinctrl-names = "default";
60 pinctrl-0 = <&smsc1_pins>;
44 interrupt-parent = <&gpio6>; 61 interrupt-parent = <&gpio6>;
45 interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 62 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
46 reg = <5 0 0xff>; 63 reg = <5 0 0xff>;
@@ -74,8 +91,6 @@
74}; 91};
75 92
76&i2c1 { 93&i2c1 {
77 clock-frequency = <400000>;
78
79 twl: twl@48 { 94 twl: twl@48 {
80 reg = <0x48>; 95 reg = <0x48>;
81 interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 96 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
@@ -86,10 +101,31 @@
86#include "twl4030.dtsi" 101#include "twl4030.dtsi"
87#include "twl4030_omap3.dtsi" 102#include "twl4030_omap3.dtsi"
88 103
89&i2c3 { 104&mmc1 {
90 clock-frequency = <400000>; 105 vmmc-supply = <&vmmc1>;
91}; 106};
92 107
93&twl_gpio { 108&twl_gpio {
94 ti,use-leds; 109 ti,use-leds;
110 /* pullups: BIT(0) */
111 ti,pullups = <0x000001>;
112};
113
114&hsusb1_phy {
115 reset-gpios = <&twl_gpio 6 GPIO_ACTIVE_LOW>;
116};
117
118&hsusb2_phy {
119 reset-gpios = <&twl_gpio 7 GPIO_ACTIVE_LOW>;
120};
121
122&usb_otg_hs {
123 pinctrl-names = "default";
124 pinctrl-0 = <&hsusb0_pins>;
125 interface-type = <0>;
126 usb-phy = <&usb2_phy>;
127 phys = <&usb2_phy>;
128 phy-names = "usb2-phy";
129 mode = <3>;
130 power = <50>;
95}; 131};
diff --git a/arch/arm/boot/dts/omap3-devkit8000.dts b/arch/arm/boot/dts/omap3-devkit8000.dts
index 4665421bb7bc..bf5a515a3247 100644
--- a/arch/arm/boot/dts/omap3-devkit8000.dts
+++ b/arch/arm/boot/dts/omap3-devkit8000.dts
@@ -101,20 +101,8 @@
101 status = "disabled"; 101 status = "disabled";
102}; 102};
103 103
104&mcbsp1 { 104&mcbsp2 {
105 status = "disabled"; 105 status = "okay";
106};
107
108&mcbsp3 {
109 status = "disabled";
110};
111
112&mcbsp4 {
113 status = "disabled";
114};
115
116&mcbsp5 {
117 status = "disabled";
118}; 106};
119 107
120&gpmc { 108&gpmc {
diff --git a/arch/arm/boot/dts/omap3-gta04.dts b/arch/arm/boot/dts/omap3-gta04.dts
index b9b55c95a566..3ad9fddf2eb6 100644
--- a/arch/arm/boot/dts/omap3-gta04.dts
+++ b/arch/arm/boot/dts/omap3-gta04.dts
@@ -36,6 +36,14 @@
36 gpio-key,wakeup; 36 gpio-key,wakeup;
37 }; 37 };
38 }; 38 };
39
40 sound {
41 compatible = "ti,omap-twl4030";
42 ti,model = "gta04";
43
44 ti,mcbsp = <&mcbsp2>;
45 ti,codec = <&twl_audio>;
46 };
39}; 47};
40 48
41&omap3_pmx_core { 49&omap3_pmx_core {
@@ -80,6 +88,12 @@
80 interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 88 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
81 interrupt-parent = <&intc>; 89 interrupt-parent = <&intc>;
82 }; 90 };
91
92 twl_audio: audio {
93 compatible = "ti,twl4030-audio";
94 codec {
95 };
96 };
83}; 97};
84 98
85#include "twl4030.dtsi" 99#include "twl4030.dtsi"
@@ -94,6 +108,14 @@
94 reg = <0x77>; 108 reg = <0x77>;
95 }; 109 };
96 110
111 /* accelerometer */
112 bma180@41 {
113 compatible = "bosch,bma180";
114 reg = <0x41>;
115 interrupt-parent = <&gpio3>;
116 interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
117 };
118
97 /* leds */ 119 /* leds */
98 tca6507@45 { 120 tca6507@45 {
99 compatible = "ti,tca6507"; 121 compatible = "ti,tca6507";
@@ -122,6 +144,22 @@
122 reg = <0x4>; 144 reg = <0x4>;
123 }; 145 };
124 }; 146 };
147
148 /* compass aka magnetometer */
149 hmc5843@1e {
150 compatible = "honeywell,hmc5843";
151 reg = <0x1e>;
152 };
153
154 /* touchscreen */
155 tsc2007@48 {
156 compatible = "ti,tsc2007";
157 reg = <0x48>;
158 interrupt-parent = <&gpio6>;
159 interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
160 gpios = <&gpio6 0 GPIO_ACTIVE_LOW>;
161 ti,x-plate-ohms = <600>;
162 };
125}; 163};
126 164
127&i2c3 { 165&i2c3 {
@@ -146,7 +184,9 @@
146}; 184};
147 185
148&mmc2 { 186&mmc2 {
149 status = "disabled"; 187 vmmc-supply = <&vaux4>;
188 bus-width = <4>;
189 ti,non-removable;
150}; 190};
151 191
152&mmc3 { 192&mmc3 {
@@ -168,3 +208,12 @@
168 pinctrl-0 = <&uart3_pins>; 208 pinctrl-0 = <&uart3_pins>;
169}; 209};
170 210
211&charger {
212 bb_uvolt = <3200000>;
213 bb_uamp = <150>;
214};
215
216&vaux4 {
217 regulator-min-microvolt = <2800000>;
218 regulator-max-microvolt = <3150000>;
219};
diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi
index c17009323520..b97736d98a64 100644
--- a/arch/arm/boot/dts/omap3-igep.dtsi
+++ b/arch/arm/boot/dts/omap3-igep.dtsi
@@ -170,6 +170,7 @@
170&mcbsp2 { 170&mcbsp2 {
171 pinctrl-names = "default"; 171 pinctrl-names = "default";
172 pinctrl-0 = <&mcbsp2_pins>; 172 pinctrl-0 = <&mcbsp2_pins>;
173 status = "okay";
173}; 174};
174 175
175&mmc1 { 176&mmc1 {
diff --git a/arch/arm/boot/dts/omap3-lilly-a83x.dtsi b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
new file mode 100644
index 000000000000..6369d9f43ca2
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-lilly-a83x.dtsi
@@ -0,0 +1,459 @@
1/*
2 * Copyright (C) 2014 Christoph Fritz <chf.fritzc@googlemail.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10#include "omap36xx.dtsi"
11
12/ {
13 model = "INCOstartec LILLY-A83X module (DM3730)";
14 compatible = "incostartec,omap3-lilly-a83x", "ti,omap36xx", "ti,omap3";
15
16 chosen {
17 bootargs = "console=ttyO0,115200n8 vt.global_cursor_default=0 consoleblank=0";
18 };
19
20 memory {
21 device_type = "memory";
22 reg = <0x80000000 0x8000000>; /* 128 MB */
23 };
24
25 leds {
26 compatible = "gpio-leds";
27
28 led1 {
29 label = "lilly-a83x::led1";
30 gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
31 linux,default-trigger = "default-on";
32 };
33
34 };
35
36 sound {
37 compatible = "ti,omap-twl4030";
38 ti,model = "lilly-a83x";
39
40 ti,mcbsp = <&mcbsp2>;
41 ti,codec = <&twl_audio>;
42 };
43
44 reg_vcc3: vcc3 {
45 compatible = "regulator-fixed";
46 regulator-name = "VCC3";
47 regulator-min-microvolt = <3300000>;
48 regulator-max-microvolt = <3300000>;
49 regulator-always-on;
50 };
51
52 hsusb1_phy: hsusb1_phy {
53 compatible = "usb-nop-xceiv";
54 vcc-supply = <&reg_vcc3>;
55 };
56};
57
58&omap3_pmx_wkup {
59 pinctrl-names = "default";
60
61 lan9221_pins: pinmux_lan9221_pins {
62 pinctrl-single,pins = <
63 OMAP3_WKUP_IOPAD(0x2a5a, PIN_INPUT | MUX_MODE4) /* reserved.gpio_129 */
64 >;
65 };
66
67 tsc2048_pins: pinmux_tsc2048_pins {
68 pinctrl-single,pins = <
69 OMAP3_WKUP_IOPAD(0x2a16, PIN_INPUT_PULLUP | MUX_MODE4) /* sys_boot6.gpio_8 */
70 >;
71 };
72
73 mmc1cd_pins: pinmux_mmc1cd_pins {
74 pinctrl-single,pins = <
75 OMAP3_WKUP_IOPAD(0x2a56, PIN_INPUT | MUX_MODE4) /* reserved.gpio_126 */
76 >;
77 };
78};
79
80&omap3_pmx_core {
81 pinctrl-names = "default";
82
83 uart1_pins: pinmux_uart1_pins {
84 pinctrl-single,pins = <
85 OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */
86 OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0) /* uart1_rts.uart1_rts */
87 OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0) /* uart1_cts.uart1_cts */
88 OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
89 >;
90 };
91
92 uart2_pins: pinmux_uart2_pins {
93 pinctrl-single,pins = <
94 OMAP3_CORE1_IOPAD(0x2170, PIN_OUTPUT | MUX_MODE1) /* mcbsp3_clkx.uart2_tx */
95 OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE1) /* mcbsp3_fsx.uart2_rx */
96 >;
97 };
98
99 uart3_pins: pinmux_uart3_pins {
100 pinctrl-single,pins = <
101 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
102 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
103 >;
104 };
105
106 i2c1_pins: pinmux_i2c1_pins {
107 pinctrl-single,pins = <
108 OMAP3_CORE1_IOPAD(0x21ba ,PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.i2c1_scl */
109 OMAP3_CORE1_IOPAD(0x21bc ,PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.i2c1_sda */
110 >;
111 };
112
113 i2c2_pins: pinmux_i2c2_pins {
114 pinctrl-single,pins = <
115 OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl.i2c2_scl */
116 OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda.i2c2_sda */
117 >;
118 };
119
120 i2c3_pins: pinmux_i2c3_pins {
121 pinctrl-single,pins = <
122 OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl.i2c3_scl */
123 OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda.i2c3_sda */
124 >;
125 };
126
127 hsusb1_pins: pinmux_hsusb1_pins {
128 pinctrl-single,pins = <
129
130 /* GPIO 182 controls USB-Hub reset. But USB-Phy its
131 * reset can't be controlled. So we clamp this GPIO to
132 * high (PIN_OFF_OUTPUT_HIGH) to always enable USB-Hub.
133 */
134
135 OMAP3_CORE1_IOPAD(0x21de, PIN_OUTPUT_PULLUP | PIN_OFF_OUTPUT_HIGH | MUX_MODE4) /* mcspi2_cs1.gpio_182 */
136 >;
137 };
138
139 hsusb_otg_pins: pinmux_hsusb_otg_pins {
140 pinctrl-single,pins = <
141 OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
142 OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
143 OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
144 OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
145 OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */
146 OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
147 OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
148 OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */
149 OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */
150 OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */
151 OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */
152 OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
153 >;
154 };
155
156 mmc1_pins: pinmux_mmc1_pins {
157 pinctrl-single,pins = <
158 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
159 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
160 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
161 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
162 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
163 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
164 >;
165 };
166
167 spi2_pins: pinmux_spi2_pins {
168 pinctrl-single,pins = <
169 OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi2_clk.mcspi2_clk */
170 OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi2_simo.mcspi2_simo */
171 OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi2_somi.mcspi2_somi */
172 OMAP3_CORE1_IOPAD(0x21dc, PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs0.mcspi2_cs0 */
173 >;
174 };
175};
176
177&omap3_pmx_core2 {
178 pinctrl-names = "default";
179 pinctrl-0 = <
180 &hsusb1_2_pins
181 >;
182
183 hsusb1_2_pins: pinmux_hsusb1_2_pins {
184 pinctrl-single,pins = <
185 OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */
186 OMAP3630_CORE2_IOPAD(0x25da, PIN_INPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */
187 OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT | MUX_MODE3) /* etk_d0.hsusb1_data0 */
188 OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT | MUX_MODE3) /* etk_d1.hsusb1_data1 */
189 OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT | MUX_MODE3) /* etk_d2.hsusb1_data2 */
190 OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT | MUX_MODE3) /* etk_d3.hsusb1_data7 */
191 OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT | MUX_MODE3) /* etk_d4.hsusb1_data4 */
192 OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT | MUX_MODE3) /* etk_d5.hsusb1_data5 */
193 OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT | MUX_MODE3) /* etk_d6.hsusb1_data6 */
194 OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT | MUX_MODE3) /* etk_d7.hsusb1_data3 */
195 OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT | MUX_MODE3) /* etk_d8.hsusb1_dir */
196 OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT | MUX_MODE3) /* etk_d9.hsusb1_nxt */
197 >;
198 };
199
200 gpio1_pins: pinmux_gpio1_pins {
201 pinctrl-single,pins = <
202 OMAP3630_CORE2_IOPAD(0x25fa, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* etk_d15.gpio_29 */
203 >;
204 };
205
206};
207
208&gpio1 {
209 pinctrl-names = "default";
210 pinctrl-0 = <&gpio1_pins>;
211};
212
213&gpio6 {
214 pinctrl-names = "default";
215 pinctrl-0 = <&hsusb1_pins>;
216};
217
218&i2c1 {
219 clock-frequency = <2600000>;
220 pinctrl-names = "default";
221 pinctrl-0 = <&i2c1_pins>;
222
223 twl: twl@48 {
224 reg = <0x48>;
225 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
226 interrupt-parent = <&intc>;
227
228 twl_audio: audio {
229 compatible = "ti,twl4030-audio";
230 codec {
231 };
232 };
233 };
234};
235
236#include "twl4030.dtsi"
237#include "twl4030_omap3.dtsi"
238
239&twl {
240 vmmc1: regulator-vmmc1 {
241 regulator-always-on;
242 };
243
244 vdd1: regulator-vdd1 {
245 regulator-always-on;
246 };
247
248 vdd2: regulator-vdd2 {
249 regulator-always-on;
250 };
251};
252
253&i2c2 {
254 clock-frequency = <2600000>;
255 pinctrl-names = "default";
256 pinctrl-0 = <&i2c2_pins>;
257};
258
259&i2c3 {
260 clock-frequency = <2600000>;
261 pinctrl-names = "default";
262 pinctrl-0 = <&i2c3_pins>;
263 gpiom1: gpio@20 {
264 compatible = "mcp,mcp23017";
265 gpio-controller;
266 #gpio-cells = <2>;
267 reg = <0x20>;
268 };
269};
270
271&uart1 {
272 pinctrl-names = "default";
273 pinctrl-0 = <&uart1_pins>;
274};
275
276&uart2 {
277 pinctrl-names = "default";
278 pinctrl-0 = <&uart2_pins>;
279};
280
281&uart3 {
282 pinctrl-names = "default";
283 pinctrl-0 = <&uart3_pins>;
284};
285
286&uart4 {
287 status = "disabled";
288};
289
290&mmc1 {
291 cd-gpios = <&gpio4 30 IRQ_TYPE_LEVEL_LOW>;
292 cd-inverted;
293 vmmc-supply = <&vmmc1>;
294 bus-width = <4>;
295 pinctrl-names = "default";
296 pinctrl-0 = <&mmc1_pins &mmc1cd_pins>;
297 cap-sdio-irq;
298 cap-sd-highspeed;
299 cap-mmc-highspeed;
300};
301
302&mmc2 {
303 status = "disabled";
304};
305
306&mmc3 {
307 status = "disabled";
308};
309
310&mcspi2 {
311 status = "okay";
312 pinctrl-names = "default";
313 pinctrl-0 = <&spi2_pins>;
314
315 tsc2046@0 {
316 reg = <0>; /* CS0 */
317 compatible = "ti,tsc2046";
318 interrupt-parent = <&gpio1>;
319 interrupts = <8 0>; /* boot6 / gpio_8 */
320 spi-max-frequency = <1000000>;
321 pendown-gpio = <&gpio1 8 0>;
322 vcc-supply = <&reg_vcc3>;
323 pinctrl-names = "default";
324 pinctrl-0 = <&tsc2048_pins>;
325
326 ti,x-min = <300>;
327 ti,x-max = <3000>;
328 ti,y-min = <600>;
329 ti,y-max = <3600>;
330 ti,x-plate-ohms = <80>;
331 ti,pressure-max = <255>;
332 ti,swap-xy;
333
334 linux,wakeup;
335 };
336};
337
338&usbhsehci {
339 phys = <&hsusb1_phy>;
340};
341
342&usbhshost {
343 pinctrl-names = "default";
344 pinctrl-0 = <&hsusb1_2_pins>;
345 num-ports = <2>;
346 port1-mode = "ehci-phy";
347};
348
349&usb_otg_hs {
350 pinctrl-names = "default";
351 pinctrl-0 = <&hsusb_otg_pins>;
352 interface-type = <0>;
353 usb-phy = <&usb2_phy>;
354 phys = <&usb2_phy>;
355 phy-names = "usb2-phy";
356 mode = <3>;
357 power = <50>;
358};
359
360&gpmc {
361 ranges = <0 0 0x30000000 0x1000000>,
362 <7 0 0x15000000 0x01000000>;
363
364 nand@0,0 {
365 reg = <0 0 0x1000000>;
366 nand-bus-width = <16>;
367 ti,nand-ecc-opt = "bch8";
368 /* no elm on omap3 */
369
370 gpmc,mux-add-data = <0>;
371 gpmc,device-nand;
372 gpmc,device-width = <2>;
373 gpmc,wait-pin = <0>;
374 gpmc,wait-monitoring-ns = <0>;
375 gpmc,burst-length= <4>;
376 gpmc,cs-on-ns = <0>;
377 gpmc,cs-rd-off-ns = <100>;
378 gpmc,cs-wr-off-ns = <100>;
379 gpmc,adv-on-ns = <0>;
380 gpmc,adv-rd-off-ns = <100>;
381 gpmc,adv-wr-off-ns = <100>;
382 gpmc,oe-on-ns = <5>;
383 gpmc,oe-off-ns = <75>;
384 gpmc,we-on-ns = <5>;
385 gpmc,we-off-ns = <75>;
386 gpmc,rd-cycle-ns = <100>;
387 gpmc,wr-cycle-ns = <100>;
388 gpmc,access-ns = <60>;
389 gpmc,page-burst-access-ns = <5>;
390 gpmc,bus-turnaround-ns = <0>;
391 gpmc,cycle2cycle-samecsen;
392 gpmc,cycle2cycle-delay-ns = <50>;
393 gpmc,wr-data-mux-bus-ns = <75>;
394 gpmc,wr-access-ns = <155>;
395
396 #address-cells = <1>;
397 #size-cells = <1>;
398
399 partition@0 {
400 label = "MLO";
401 reg = <0 0x80000>;
402 };
403
404 partition@0x80000 {
405 label = "u-boot";
406 reg = <0x80000 0x1e0000>;
407 };
408
409 partition@0x260000 {
410 label = "u-boot-environment";
411 reg = <0x260000 0x20000>;
412 };
413
414 partition@0x280000 {
415 label = "kernel";
416 reg = <0x280000 0x500000>;
417 };
418
419 partition@0x780000 {
420 label = "filesystem";
421 reg = <0x780000 0xf880000>;
422 };
423 };
424
425 ethernet@7,0 {
426 compatible = "smsc,lan9221", "smsc,lan9115";
427 bank-width = <2>;
428 gpmc,mux-add-data = <2>;
429 gpmc,cs-on-ns = <10>;
430 gpmc,cs-rd-off-ns = <60>;
431 gpmc,cs-wr-off-ns = <60>;
432 gpmc,adv-on-ns = <0>;
433 gpmc,adv-rd-off-ns = <10>;
434 gpmc,adv-wr-off-ns = <10>;
435 gpmc,oe-on-ns = <10>;
436 gpmc,oe-off-ns = <60>;
437 gpmc,we-on-ns = <10>;
438 gpmc,we-off-ns = <60>;
439 gpmc,rd-cycle-ns = <100>;
440 gpmc,wr-cycle-ns = <100>;
441 gpmc,access-ns = <50>;
442 gpmc,page-burst-access-ns = <5>;
443 gpmc,bus-turnaround-ns = <0>;
444 gpmc,cycle2cycle-delay-ns = <75>;
445 gpmc,wr-data-mux-bus-ns = <15>;
446 gpmc,wr-access-ns = <75>;
447 gpmc,cycle2cycle-samecsen;
448 gpmc,cycle2cycle-diffcsen;
449 vddvario-supply = <&reg_vcc3>;
450 vdd33a-supply = <&reg_vcc3>;
451 reg-io-width = <4>;
452 interrupt-parent = <&gpio5>;
453 interrupts = <1 0x2>;
454 reg = <7 0 0xff>;
455 pinctrl-names = "default";
456 pinctrl-0 = <&lan9221_pins>;
457 phy-mode = "mii";
458 };
459};
diff --git a/arch/arm/boot/dts/omap3-lilly-dbb056.dts b/arch/arm/boot/dts/omap3-lilly-dbb056.dts
new file mode 100644
index 000000000000..834f7c65f62d
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-lilly-dbb056.dts
@@ -0,0 +1,170 @@
1/*
2 * Copyright (C) 2014 Christoph Fritz <chf.fritzc@googlemail.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9/dts-v1/;
10
11#include "omap3-lilly-a83x.dtsi"
12
13/ {
14 model = "INCOstartec LILLY-DBB056 (DM3730)";
15 compatible = "incostartec,omap3-lilly-dbb056", "incostartec,omap3-lilly-a83x", "ti,omap36xx", "ti,omap3";
16};
17
18&twl {
19 vaux2: regulator-vaux2 {
20 compatible = "ti,twl4030-vaux2";
21 regulator-min-microvolt = <2800000>;
22 regulator-max-microvolt = <2800000>;
23 regulator-always-on;
24 };
25};
26
27&omap3_pmx_core {
28 pinctrl-names = "default";
29 pinctrl-0 = <&lcd_pins>;
30
31 lan9117_pins: pinmux_lan9117_pins {
32 pinctrl-single,pins = <
33 OMAP3_CORE1_IOPAD(0x2114, PIN_INPUT | MUX_MODE4) /* cam_fld.gpio_98 */
34 >;
35 };
36
37 gpio4_pins: pinmux_gpio4_pins {
38 pinctrl-single,pins = <
39 OMAP3_CORE1_IOPAD(0x212e, PIN_INPUT | MUX_MODE4) /* cam_xclkb.gpio_111 -> sja1000 IRQ */
40 >;
41 };
42
43 gpio5_pins: pinmux_gpio5_pins {
44 pinctrl-single,pins = <
45 OMAP3_CORE1_IOPAD(0x218c, PIN_OUTPUT | PIN_OFF_OUTPUT_HIGH | MUX_MODE4) /* mcbsp1_clk.gpio_156 -> enable DSS */
46 >;
47 };
48
49 lcd_pins: pinmux_lcd_pins {
50 pinctrl-single,pins = <
51 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
52 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
53 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
54 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
55 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
56 OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
57 OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
58 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
59 OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
60 OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
61 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
62 OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
63 OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
64 OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
65 OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
66 OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
67 OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
68 OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
69 OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
70 OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
71 OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
72 OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
73 >;
74 };
75
76 mmc2_pins: pinmux_mmc2_pins {
77 pinctrl-single,pins = <
78 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
79 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
80 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
81 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
82 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
83 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
84 OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat4.sdmmc2_dir_dat0 */
85 OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat5.sdmmc2_dir_dat1 */
86 OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat6.sdmmc2_dir_cmd */
87 OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE1) /* sdmmc2_dat7.sdmmc2_clkin */
88 OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_cts_rctx.gpio_163 -> wp */
89 OMAP3_CORE1_IOPAD(0x219c, PIN_INPUT_PULLUP | MUX_MODE4) /* uart3_rts_sd.gpio_164 -> cd */
90 >;
91 };
92
93 spi1_pins: pinmux_spi1_pins {
94 pinctrl-single,pins = <
95 OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
96 OMAP3_CORE1_IOPAD(0x21ca, PIN_INPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
97 OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
98 OMAP3_CORE1_IOPAD(0x21ce, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
99 >;
100 };
101};
102
103&gpio4 {
104 pinctrl-names = "default";
105 pinctrl-0 = <&gpio4_pins>;
106};
107
108&gpio5 {
109 pinctrl-names = "default";
110 pinctrl-0 = <&gpio5_pins>;
111};
112
113&mmc2 {
114 status = "okay";
115 bus-width = <4>;
116 vmmc-supply = <&vmmc1>;
117 cd-gpios = <&gpio6 4 0>; /* gpio_164 */
118 wp-gpios = <&gpio6 3 0>; /* gpio_163 */
119 pinctrl-names = "default";
120 pinctrl-0 = <&mmc2_pins>;
121 ti,dual-volt;
122};
123
124&mcspi1 {
125 status = "okay";
126 pinctrl-names = "default";
127 pinctrl-0 = <&spi1_pins>;
128};
129
130&gpmc {
131 ranges = <0 0 0x30000000 0x1000000>, /* nand assigned by COM a83x */
132 <4 0 0x20000000 0x01000000>,
133 <7 0 0x15000000 0x01000000>; /* eth assigend by COM a83x */
134
135 ethernet@4,0 {
136 compatible = "smsc,lan9117", "smsc,lan9115";
137 bank-width = <2>;
138 gpmc,mux-add-data = <2>;
139 gpmc,cs-on-ns = <10>;
140 gpmc,cs-rd-off-ns = <65>;
141 gpmc,cs-wr-off-ns = <65>;
142 gpmc,adv-on-ns = <0>;
143 gpmc,adv-rd-off-ns = <10>;
144 gpmc,adv-wr-off-ns = <10>;
145 gpmc,oe-on-ns = <10>;
146 gpmc,oe-off-ns = <65>;
147 gpmc,we-on-ns = <10>;
148 gpmc,we-off-ns = <65>;
149 gpmc,rd-cycle-ns = <100>;
150 gpmc,wr-cycle-ns = <100>;
151 gpmc,access-ns = <60>;
152 gpmc,page-burst-access-ns = <5>;
153 gpmc,bus-turnaround-ns = <0>;
154 gpmc,cycle2cycle-delay-ns = <75>;
155 gpmc,wr-data-mux-bus-ns = <15>;
156 gpmc,wr-access-ns = <75>;
157 gpmc,cycle2cycle-samecsen;
158 gpmc,cycle2cycle-diffcsen;
159 vddvario-supply = <&reg_vcc3>;
160 vdd33a-supply = <&reg_vcc3>;
161 reg-io-width = <4>;
162 interrupt-parent = <&gpio4>;
163 interrupts = <2 0x2>;
164 reg = <4 0 0xff>;
165 pinctrl-names = "default";
166 pinctrl-0 = <&lan9117_pins>;
167 phy-mode = "mii";
168 smsc,force-internal-phy;
169 };
170};
diff --git a/arch/arm/boot/dts/omap3-overo.dtsi b/arch/arm/boot/dts/omap3-overo.dtsi
index a461d2fd1fb0..b08142f755fd 100644
--- a/arch/arm/boot/dts/omap3-overo.dtsi
+++ b/arch/arm/boot/dts/omap3-overo.dtsi
@@ -95,3 +95,7 @@
95 pinctrl-names = "default"; 95 pinctrl-names = "default";
96 pinctrl-0 = <&uart3_pins>; 96 pinctrl-0 = <&uart3_pins>;
97}; 97};
98
99&mcbsp2 {
100 status = "okay";
101};
diff --git a/arch/arm/boot/dts/omap3-sb-t35.dtsi b/arch/arm/boot/dts/omap3-sb-t35.dtsi
index b9a2fedce7ee..7909c51b05a5 100644
--- a/arch/arm/boot/dts/omap3-sb-t35.dtsi
+++ b/arch/arm/boot/dts/omap3-sb-t35.dtsi
@@ -2,11 +2,36 @@
2 * Common support for CompuLab SB-T35 used on SBC-T3530, SBC-T3517 and SBC-T3730 2 * Common support for CompuLab SB-T35 used on SBC-T3530, SBC-T3517 and SBC-T3730
3 */ 3 */
4 4
5/ {
6 vddvario_sb_t35: regulator-vddvario-sb-t35 {
7 compatible = "regulator-fixed";
8 regulator-name = "vddvario";
9 regulator-always-on;
10 };
11
12 vdd33a_sb_t35: regulator-vdd33a-sb-t35 {
13 compatible = "regulator-fixed";
14 regulator-name = "vdd33a";
15 regulator-always-on;
16 };
17};
18
19&omap3_pmx_core {
20 smsc2_pins: pinmux_smsc2_pins {
21 pinctrl-single,pins = <
22 OMAP3_CORE1_IOPAD(0x20b6, PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs4.gpmc_ncs4 */
23 OMAP3_CORE1_IOPAD(0x20d2, PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_wait3.gpio_65 */
24 >;
25 };
26};
27
5&gpmc { 28&gpmc {
6 ranges = <4 0 0x2d000000 0x01000000>; 29 ranges = <4 0 0x2d000000 0x01000000>;
7 30
8 smsc2: ethernet@4,0 { 31 smsc2: ethernet@4,0 {
9 compatible = "smsc,lan9221", "smsc,lan9115"; 32 compatible = "smsc,lan9221", "smsc,lan9115";
33 pinctrl-names = "default";
34 pinctrl-0 = <&smsc2_pins>;
10 interrupt-parent = <&gpio3>; 35 interrupt-parent = <&gpio3>;
11 interrupts = <1 IRQ_TYPE_LEVEL_LOW>; 36 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
12 reg = <4 0 0xff>; 37 reg = <4 0 0xff>;
@@ -32,8 +57,8 @@
32 gpmc,wr-access-ns = <186>; 57 gpmc,wr-access-ns = <186>;
33 gpmc,cycle2cycle-samecsen; 58 gpmc,cycle2cycle-samecsen;
34 gpmc,cycle2cycle-diffcsen; 59 gpmc,cycle2cycle-diffcsen;
35 vddvario-supply = <&vddvario>; 60 vddvario-supply = <&vddvario_sb_t35>;
36 vdd33a-supply = <&vdd33a>; 61 vdd33a-supply = <&vdd33a_sb_t35>;
37 reg-io-width = <4>; 62 reg-io-width = <4>;
38 smsc,save-mac-address; 63 smsc,save-mac-address;
39 }; 64 };
diff --git a/arch/arm/boot/dts/omap3-sbc-t3517.dts b/arch/arm/boot/dts/omap3-sbc-t3517.dts
new file mode 100644
index 000000000000..024c9c6c682d
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-sbc-t3517.dts
@@ -0,0 +1,43 @@
1/*
2 * Suppport for CompuLab SBC-T3517 with CM-T3517
3 */
4
5#include "omap3-cm-t3517.dts"
6#include "omap3-sb-t35.dtsi"
7
8/ {
9 model = "CompuLab SBC-T3517 with CM-T3517";
10 compatible = "compulab,omap3-sbc-t3517", "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3";
11};
12
13&omap3_pmx_core {
14 pinctrl-names = "default";
15 pinctrl-0 = <
16 &sb_t35_usb_hub_pins
17 &usb_hub_pins
18 >;
19
20 mmc1_aux_pins: pinmux_mmc1_aux_pins {
21 pinctrl-single,pins = <
22 OMAP3_CORE1_IOPAD(0x20c0, PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_clk.gpio_59 */
23 OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE4) /* uart2_cts.gpio_144 */
24 >;
25 };
26
27 sb_t35_usb_hub_pins: pinmux_sb_t35_usb_hub_pins {
28 pinctrl-single,pins = <
29 OMAP3_CORE1_IOPAD(0x21ec, PIN_OUTPUT | MUX_MODE4) /* ccdc_wen.gpio_98 - SB-T35 USB HUB RST */
30 >;
31 };
32};
33
34&mmc1 {
35 pinctrl-names = "default";
36 pinctrl-0 = <
37 &mmc1_pins
38 &mmc1_aux_pins
39 >;
40
41 wp-gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>; /* gpio_59 */
42 cd-gpios = <&gpio5 16 GPIO_ACTIVE_HIGH>; /* gpio_144 */
43};
diff --git a/arch/arm/boot/dts/omap3-sbc-t3530.dts b/arch/arm/boot/dts/omap3-sbc-t3530.dts
new file mode 100644
index 000000000000..bbbeea6b1988
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-sbc-t3530.dts
@@ -0,0 +1,36 @@
1/*
2 * Suppport for CompuLab SBC-T3530 with CM-T3530
3 */
4
5#include "omap3-cm-t3530.dts"
6#include "omap3-sb-t35.dtsi"
7
8/ {
9 model = "CompuLab SBC-T3530 with CM-T3530";
10 compatible = "compulab,omap3-sbc-t3530", "compulab,omap3-cm-t3530", "ti,omap34xx", "ti,omap3";
11};
12
13&omap3_pmx_core {
14 pinctrl-names = "default";
15 pinctrl-0 = <&sb_t35_usb_hub_pins>;
16
17 sb_t35_usb_hub_pins: pinmux_sb_t35_usb_hub_pins {
18 pinctrl-single,pins = <
19 OMAP3_CORE1_IOPAD(0x2130, PIN_OUTPUT | MUX_MODE4) /* ccdc_wen.gpio_167 - SB-T35 USB HUB RST */
20 >;
21 };
22};
23
24/*
25 * The following ranges correspond to SMSC9x eth chips on CM-T3530 CoM and
26 * SB-T35 baseboard respectively.
27 * This setting includes both chips in SBC-T3530 board device tree.
28 */
29&gpmc {
30 ranges = <5 0 0x2c000000 0x01000000>,
31 <4 0 0x2d000000 0x01000000>;
32};
33
34&mmc1 {
35 cd-gpios = <&twl_gpio 0 GPIO_ACTIVE_HIGH>;
36};
diff --git a/arch/arm/boot/dts/omap3-sbc-t3730.dts b/arch/arm/boot/dts/omap3-sbc-t3730.dts
index c119bd545053..08e4a7086f22 100644
--- a/arch/arm/boot/dts/omap3-sbc-t3730.dts
+++ b/arch/arm/boot/dts/omap3-sbc-t3730.dts
@@ -10,21 +10,18 @@
10 compatible = "compulab,omap3-sbc-t3730", "compulab,omap3-cm-t3730", "ti,omap36xx", "ti,omap3"; 10 compatible = "compulab,omap3-sbc-t3730", "compulab,omap3-cm-t3730", "ti,omap36xx", "ti,omap3";
11}; 11};
12 12
13&gpmc { 13&omap3_pmx_core {
14 ranges = <5 0 0x2c000000 0x01000000>,
15 <4 0 0x2d000000 0x01000000>;
16};
17
18&smsc2 {
19 pinctrl-names = "default"; 14 pinctrl-names = "default";
20 pinctrl-0 = <&smsc2_pins>; 15 pinctrl-0 = <&sb_t35_usb_hub_pins>;
21};
22 16
23&omap3_pmx_core { 17 sb_t35_usb_hub_pins: pinmux_sb_t35_usb_hub_pins {
24 smsc2_pins: pinmux_smsc2_pins {
25 pinctrl-single,pins = < 18 pinctrl-single,pins = <
26 0x86 (PIN_OUTPUT | MUX_MODE0) /* gpmc_ncs4.gpmc_ncs4 */ 19 OMAP3_CORE1_IOPAD(0x2130, PIN_OUTPUT | MUX_MODE4) /* ccdc_wen.gpio_167 - SB-T35 USB HUB RST */
27 0xa2 (PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_wait3.gpio_65 */
28 >; 20 >;
29 }; 21 };
30}; \ No newline at end of file 22};
23
24&gpmc {
25 ranges = <5 0 0x2c000000 0x01000000>,
26 <4 0 0x2d000000 0x01000000>;
27};
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index a5fc83b9c835..d3924198e5fd 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -35,6 +35,11 @@
35 compatible = "arm,cortex-a8"; 35 compatible = "arm,cortex-a8";
36 device_type = "cpu"; 36 device_type = "cpu";
37 reg = <0x0>; 37 reg = <0x0>;
38
39 clocks = <&dpll1_ck>;
40 clock-names = "cpu";
41
42 clock-latency = <300000>; /* From omap-cpufreq driver */
38 }; 43 };
39 }; 44 };
40 45
@@ -436,6 +441,7 @@
436 dmas = <&sdma 31>, 441 dmas = <&sdma 31>,
437 <&sdma 32>; 442 <&sdma 32>;
438 dma-names = "tx", "rx"; 443 dma-names = "tx", "rx";
444 status = "disabled";
439 }; 445 };
440 446
441 mcbsp2: mcbsp@49022000 { 447 mcbsp2: mcbsp@49022000 {
@@ -453,6 +459,7 @@
453 dmas = <&sdma 33>, 459 dmas = <&sdma 33>,
454 <&sdma 34>; 460 <&sdma 34>;
455 dma-names = "tx", "rx"; 461 dma-names = "tx", "rx";
462 status = "disabled";
456 }; 463 };
457 464
458 mcbsp3: mcbsp@49024000 { 465 mcbsp3: mcbsp@49024000 {
@@ -470,6 +477,7 @@
470 dmas = <&sdma 17>, 477 dmas = <&sdma 17>,
471 <&sdma 18>; 478 <&sdma 18>;
472 dma-names = "tx", "rx"; 479 dma-names = "tx", "rx";
480 status = "disabled";
473 }; 481 };
474 482
475 mcbsp4: mcbsp@49026000 { 483 mcbsp4: mcbsp@49026000 {
@@ -485,6 +493,7 @@
485 dmas = <&sdma 19>, 493 dmas = <&sdma 19>,
486 <&sdma 20>; 494 <&sdma 20>;
487 dma-names = "tx", "rx"; 495 dma-names = "tx", "rx";
496 status = "disabled";
488 }; 497 };
489 498
490 mcbsp5: mcbsp@48096000 { 499 mcbsp5: mcbsp@48096000 {
@@ -500,6 +509,7 @@
500 dmas = <&sdma 21>, 509 dmas = <&sdma 21>,
501 <&sdma 22>; 510 <&sdma 22>;
502 dma-names = "tx", "rx"; 511 dma-names = "tx", "rx";
512 status = "disabled";
503 }; 513 };
504 514
505 sham: sham@480c3000 { 515 sham: sham@480c3000 {
diff --git a/arch/arm/boot/dts/omap3430-sdp.dts b/arch/arm/boot/dts/omap3430-sdp.dts
index cd3d0474acc9..02f69f4a8fd3 100644
--- a/arch/arm/boot/dts/omap3430-sdp.dts
+++ b/arch/arm/boot/dts/omap3430-sdp.dts
@@ -107,9 +107,8 @@
107 #address-cells = <1>; 107 #address-cells = <1>;
108 #size-cells = <1>; 108 #size-cells = <1>;
109 reg = <1 0 0x08000000>; 109 reg = <1 0 0x08000000>;
110 ti,nand-ecc-opt = "ham1";
110 nand-bus-width = <8>; 111 nand-bus-width = <8>;
111
112 ti,nand-ecc-opt = "sw";
113 gpmc,cs-on-ns = <0>; 112 gpmc,cs-on-ns = <0>;
114 gpmc,cs-rd-off-ns = <36>; 113 gpmc,cs-rd-off-ns = <36>;
115 gpmc,cs-wr-off-ns = <36>; 114 gpmc,cs-wr-off-ns = <36>;
diff --git a/arch/arm/boot/dts/omap3430es1-clocks.dtsi b/arch/arm/boot/dts/omap3430es1-clocks.dtsi
index 02f6c7fabbec..6f31954636a1 100644
--- a/arch/arm/boot/dts/omap3430es1-clocks.dtsi
+++ b/arch/arm/boot/dts/omap3430es1-clocks.dtsi
@@ -82,16 +82,16 @@
82 ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>; 82 ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>;
83 }; 83 };
84 84
85 ssi_ssr_fck_3430es1: ssi_ssr_fck_3430es1 { 85 ssi_ssr_fck: ssi_ssr_fck_3430es1 {
86 #clock-cells = <0>; 86 #clock-cells = <0>;
87 compatible = "ti,composite-clock"; 87 compatible = "ti,composite-clock";
88 clocks = <&ssi_ssr_gate_fck_3430es1>, <&ssi_ssr_div_fck_3430es1>; 88 clocks = <&ssi_ssr_gate_fck_3430es1>, <&ssi_ssr_div_fck_3430es1>;
89 }; 89 };
90 90
91 ssi_sst_fck_3430es1: ssi_sst_fck_3430es1 { 91 ssi_sst_fck: ssi_sst_fck_3430es1 {
92 #clock-cells = <0>; 92 #clock-cells = <0>;
93 compatible = "fixed-factor-clock"; 93 compatible = "fixed-factor-clock";
94 clocks = <&ssi_ssr_fck_3430es1>; 94 clocks = <&ssi_ssr_fck>;
95 clock-mult = <1>; 95 clock-mult = <1>;
96 clock-div = <2>; 96 clock-div = <2>;
97 }; 97 };
@@ -120,7 +120,7 @@
120 clock-div = <1>; 120 clock-div = <1>;
121 }; 121 };
122 122
123 ssi_ick_3430es1: ssi_ick_3430es1 { 123 ssi_ick: ssi_ick_3430es1 {
124 #clock-cells = <0>; 124 #clock-cells = <0>;
125 compatible = "ti,omap3-no-wait-interface-clock"; 125 compatible = "ti,omap3-no-wait-interface-clock";
126 clocks = <&ssi_l4_ick>; 126 clocks = <&ssi_l4_ick>;
@@ -203,6 +203,6 @@
203 <&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>, 203 <&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>,
204 <&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>, 204 <&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>,
205 <&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>, 205 <&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>,
206 <&fshostusb_fck>, <&fac_ick>, <&ssi_ick_3430es1>; 206 <&fshostusb_fck>, <&fac_ick>, <&ssi_ick>;
207 }; 207 };
208}; 208};
diff --git a/arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi b/arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi
index 8ed475dd63c9..877318c28364 100644
--- a/arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi
+++ b/arch/arm/boot/dts/omap36xx-omap3430es2plus-clocks.dtsi
@@ -25,16 +25,16 @@
25 ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>; 25 ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>;
26 }; 26 };
27 27
28 ssi_ssr_fck_3430es2: ssi_ssr_fck_3430es2 { 28 ssi_ssr_fck: ssi_ssr_fck_3430es2 {
29 #clock-cells = <0>; 29 #clock-cells = <0>;
30 compatible = "ti,composite-clock"; 30 compatible = "ti,composite-clock";
31 clocks = <&ssi_ssr_gate_fck_3430es2>, <&ssi_ssr_div_fck_3430es2>; 31 clocks = <&ssi_ssr_gate_fck_3430es2>, <&ssi_ssr_div_fck_3430es2>;
32 }; 32 };
33 33
34 ssi_sst_fck_3430es2: ssi_sst_fck_3430es2 { 34 ssi_sst_fck: ssi_sst_fck_3430es2 {
35 #clock-cells = <0>; 35 #clock-cells = <0>;
36 compatible = "fixed-factor-clock"; 36 compatible = "fixed-factor-clock";
37 clocks = <&ssi_ssr_fck_3430es2>; 37 clocks = <&ssi_ssr_fck>;
38 clock-mult = <1>; 38 clock-mult = <1>;
39 clock-div = <2>; 39 clock-div = <2>;
40 }; 40 };
@@ -55,7 +55,7 @@
55 clock-div = <1>; 55 clock-div = <1>;
56 }; 56 };
57 57
58 ssi_ick_3430es2: ssi_ick_3430es2 { 58 ssi_ick: ssi_ick_3430es2 {
59 #clock-cells = <0>; 59 #clock-cells = <0>;
60 compatible = "ti,omap3-ssi-interface-clock"; 60 compatible = "ti,omap3-ssi-interface-clock";
61 clocks = <&ssi_l4_ick>; 61 clocks = <&ssi_l4_ick>;
@@ -193,6 +193,6 @@
193 <&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>, 193 <&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>,
194 <&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>, 194 <&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>,
195 <&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>, 195 <&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>,
196 <&ssi_ick_3430es2>; 196 <&ssi_ick>;
197 }; 197 };
198}; 198};
diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi
index 88c6a05cab41..f83dd4c365c7 100644
--- a/arch/arm/boot/dts/omap4-panda-common.dtsi
+++ b/arch/arm/boot/dts/omap4-panda-common.dtsi
@@ -109,9 +109,6 @@
109&omap4_pmx_core { 109&omap4_pmx_core {
110 pinctrl-names = "default"; 110 pinctrl-names = "default";
111 pinctrl-0 = < 111 pinctrl-0 = <
112 &twl6040_pins
113 &mcpdm_pins
114 &mcbsp1_pins
115 &dss_dpi_pins 112 &dss_dpi_pins
116 &tfp410_pins 113 &tfp410_pins
117 &dss_hdmi_pins 114 &dss_hdmi_pins
@@ -300,6 +297,10 @@
300 twl6040: twl@4b { 297 twl6040: twl@4b {
301 compatible = "ti,twl6040"; 298 compatible = "ti,twl6040";
302 reg = <0x4b>; 299 reg = <0x4b>;
300
301 pinctrl-names = "default";
302 pinctrl-0 = <&twl6040_pins>;
303
303 /* IRQ# = 119 */ 304 /* IRQ# = 119 */
304 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */ 305 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
305 interrupt-parent = <&gic>; 306 interrupt-parent = <&gic>;
@@ -380,16 +381,16 @@
380 device-handle = <&elpida_ECB240ABACN>; 381 device-handle = <&elpida_ECB240ABACN>;
381}; 382};
382 383
383&mcbsp2 { 384&mcbsp1 {
384 status = "disabled"; 385 pinctrl-names = "default";
385}; 386 pinctrl-0 = <&mcbsp1_pins>;
386 387 status = "okay";
387&mcbsp3 {
388 status = "disabled";
389}; 388};
390 389
391&dmic { 390&mcpdm {
392 status = "disabled"; 391 pinctrl-names = "default";
392 pinctrl-0 = <&mcpdm_pins>;
393 status = "okay";
393}; 394};
394 395
395&twl_usb_comparator { 396&twl_usb_comparator {
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index dbc81fb6ef03..9bbbbec1d63d 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -158,11 +158,6 @@
158&omap4_pmx_core { 158&omap4_pmx_core {
159 pinctrl-names = "default"; 159 pinctrl-names = "default";
160 pinctrl-0 = < 160 pinctrl-0 = <
161 &twl6040_pins
162 &mcpdm_pins
163 &dmic_pins
164 &mcbsp1_pins
165 &mcbsp2_pins
166 &dss_hdmi_pins 161 &dss_hdmi_pins
167 &tpd12s015_pins 162 &tpd12s015_pins
168 >; 163 >;
@@ -326,6 +321,10 @@
326 twl6040: twl@4b { 321 twl6040: twl@4b {
327 compatible = "ti,twl6040"; 322 compatible = "ti,twl6040";
328 reg = <0x4b>; 323 reg = <0x4b>;
324
325 pinctrl-names = "default";
326 pinctrl-0 = <&twl6040_pins>;
327
329 /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */ 328 /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */
330 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */ 329 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */
331 interrupt-parent = <&gic>; 330 interrupt-parent = <&gic>;
@@ -537,8 +536,28 @@
537 pinctrl-0 = <&uart4_pins>; 536 pinctrl-0 = <&uart4_pins>;
538}; 537};
539 538
540&mcbsp3 { 539&mcbsp1 {
541 status = "disabled"; 540 pinctrl-names = "default";
541 pinctrl-0 = <&mcbsp1_pins>;
542 status = "okay";
543};
544
545&mcbsp2 {
546 pinctrl-names = "default";
547 pinctrl-0 = <&mcbsp2_pins>;
548 status = "okay";
549};
550
551&dmic {
552 pinctrl-names = "default";
553 pinctrl-0 = <&dmic_pins>;
554 status = "okay";
555};
556
557&mcpdm {
558 pinctrl-names = "default";
559 pinctrl-0 = <&mcpdm_pins>;
560 status = "okay";
542}; 561};
543 562
544&twl_usb_comparator { 563&twl_usb_comparator {
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 1b4f59bed0f5..afa23bcf6f44 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -36,6 +36,11 @@
36 device_type = "cpu"; 36 device_type = "cpu";
37 next-level-cache = <&L2>; 37 next-level-cache = <&L2>;
38 reg = <0x0>; 38 reg = <0x0>;
39
40 clocks = <&dpll_mpu_ck>;
41 clock-names = "cpu";
42
43 clock-latency = <300000>; /* From omap-cpufreq driver */
39 }; 44 };
40 cpu@1 { 45 cpu@1 {
41 compatible = "arm,cortex-a9"; 46 compatible = "arm,cortex-a9";
@@ -313,6 +318,7 @@
313 compatible = "ti,omap4-hwspinlock"; 318 compatible = "ti,omap4-hwspinlock";
314 reg = <0x4a0f6000 0x1000>; 319 reg = <0x4a0f6000 0x1000>;
315 ti,hwmods = "spinlock"; 320 ti,hwmods = "spinlock";
321 #hwlock-cells = <1>;
316 }; 322 };
317 323
318 i2c1: i2c@48070000 { 324 i2c1: i2c@48070000 {
@@ -478,6 +484,7 @@
478 dmas = <&sdma 65>, 484 dmas = <&sdma 65>,
479 <&sdma 66>; 485 <&sdma 66>;
480 dma-names = "up_link", "dn_link"; 486 dma-names = "up_link", "dn_link";
487 status = "disabled";
481 }; 488 };
482 489
483 dmic: dmic@4012e000 { 490 dmic: dmic@4012e000 {
@@ -489,6 +496,7 @@
489 ti,hwmods = "dmic"; 496 ti,hwmods = "dmic";
490 dmas = <&sdma 67>; 497 dmas = <&sdma 67>;
491 dma-names = "up_link"; 498 dma-names = "up_link";
499 status = "disabled";
492 }; 500 };
493 501
494 mcbsp1: mcbsp@40122000 { 502 mcbsp1: mcbsp@40122000 {
@@ -503,6 +511,7 @@
503 dmas = <&sdma 33>, 511 dmas = <&sdma 33>,
504 <&sdma 34>; 512 <&sdma 34>;
505 dma-names = "tx", "rx"; 513 dma-names = "tx", "rx";
514 status = "disabled";
506 }; 515 };
507 516
508 mcbsp2: mcbsp@40124000 { 517 mcbsp2: mcbsp@40124000 {
@@ -517,6 +526,7 @@
517 dmas = <&sdma 17>, 526 dmas = <&sdma 17>,
518 <&sdma 18>; 527 <&sdma 18>;
519 dma-names = "tx", "rx"; 528 dma-names = "tx", "rx";
529 status = "disabled";
520 }; 530 };
521 531
522 mcbsp3: mcbsp@40126000 { 532 mcbsp3: mcbsp@40126000 {
@@ -531,6 +541,7 @@
531 dmas = <&sdma 19>, 541 dmas = <&sdma 19>,
532 <&sdma 20>; 542 <&sdma 20>;
533 dma-names = "tx", "rx"; 543 dma-names = "tx", "rx";
544 status = "disabled";
534 }; 545 };
535 546
536 mcbsp4: mcbsp@48096000 { 547 mcbsp4: mcbsp@48096000 {
@@ -544,6 +555,7 @@
544 dmas = <&sdma 31>, 555 dmas = <&sdma 31>,
545 <&sdma 32>; 556 <&sdma 32>;
546 dma-names = "tx", "rx"; 557 dma-names = "tx", "rx";
558 status = "disabled";
547 }; 559 };
548 560
549 keypad: keypad@4a31c000 { 561 keypad: keypad@4a31c000 {
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 4c3e9f125475..7fe682562dad 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -49,6 +49,12 @@
49 1000000 1060000 49 1000000 1060000
50 1500000 1250000 50 1500000 1250000
51 >; 51 >;
52
53 clocks = <&dpll_mpu_ck>;
54 clock-names = "cpu";
55
56 clock-latency = <300000>; /* From omap-cpufreq driver */
57
52 /* cooling options */ 58 /* cooling options */
53 cooling-min-level = <0>; 59 cooling-min-level = <0>;
54 cooling-max-level = <2>; 60 cooling-max-level = <2>;
@@ -353,6 +359,7 @@
353 compatible = "ti,omap4-hwspinlock"; 359 compatible = "ti,omap4-hwspinlock";
354 reg = <0x4a0f6000 0x1000>; 360 reg = <0x4a0f6000 0x1000>;
355 ti,hwmods = "spinlock"; 361 ti,hwmods = "spinlock";
362 #hwlock-cells = <1>;
356 }; 363 };
357 364
358 mcspi1: spi@48098000 { 365 mcspi1: spi@48098000 {
@@ -529,6 +536,7 @@
529 dmas = <&sdma 65>, 536 dmas = <&sdma 65>,
530 <&sdma 66>; 537 <&sdma 66>;
531 dma-names = "up_link", "dn_link"; 538 dma-names = "up_link", "dn_link";
539 status = "disabled";
532 }; 540 };
533 541
534 dmic: dmic@4012e000 { 542 dmic: dmic@4012e000 {
@@ -540,6 +548,7 @@
540 ti,hwmods = "dmic"; 548 ti,hwmods = "dmic";
541 dmas = <&sdma 67>; 549 dmas = <&sdma 67>;
542 dma-names = "up_link"; 550 dma-names = "up_link";
551 status = "disabled";
543 }; 552 };
544 553
545 mcbsp1: mcbsp@40122000 { 554 mcbsp1: mcbsp@40122000 {
@@ -554,6 +563,7 @@
554 dmas = <&sdma 33>, 563 dmas = <&sdma 33>,
555 <&sdma 34>; 564 <&sdma 34>;
556 dma-names = "tx", "rx"; 565 dma-names = "tx", "rx";
566 status = "disabled";
557 }; 567 };
558 568
559 mcbsp2: mcbsp@40124000 { 569 mcbsp2: mcbsp@40124000 {
@@ -568,6 +578,7 @@
568 dmas = <&sdma 17>, 578 dmas = <&sdma 17>,
569 <&sdma 18>; 579 <&sdma 18>;
570 dma-names = "tx", "rx"; 580 dma-names = "tx", "rx";
581 status = "disabled";
571 }; 582 };
572 583
573 mcbsp3: mcbsp@40126000 { 584 mcbsp3: mcbsp@40126000 {
@@ -582,6 +593,7 @@
582 dmas = <&sdma 19>, 593 dmas = <&sdma 19>,
583 <&sdma 20>; 594 <&sdma 20>;
584 dma-names = "tx", "rx"; 595 dma-names = "tx", "rx";
596 status = "disabled";
585 }; 597 };
586 598
587 timer1: timer@4ae18000 { 599 timer1: timer@4ae18000 {
diff --git a/arch/arm/boot/dts/tps65910.dtsi b/arch/arm/boot/dts/tps65910.dtsi
index 92693a89160e..b0ac6657a170 100644
--- a/arch/arm/boot/dts/tps65910.dtsi
+++ b/arch/arm/boot/dts/tps65910.dtsi
@@ -82,5 +82,10 @@
82 reg = <12>; 82 reg = <12>;
83 regulator-compatible = "vmmc"; 83 regulator-compatible = "vmmc";
84 }; 84 };
85
86 vbb_reg: regulator@13 {
87 reg = <13>;
88 regulator-compatible = "vbb";
89 };
85 }; 90 };
86}; 91};
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index 174caecc3186..4349e82debfe 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -45,24 +45,31 @@ static struct platform_device gpmc_nand_device = {
45 45
46static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt) 46static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
47{ 47{
48 /* support only OMAP3 class */ 48 /* platforms which support all ECC schemes */
49 if (!cpu_is_omap34xx() && !soc_is_am33xx()) { 49 if (soc_is_am33xx() || cpu_is_omap44xx() ||
50 pr_err("BCH ecc is not supported on this CPU\n"); 50 soc_is_omap54xx() || soc_is_dra7xx())
51 return 1;
52
53 /* OMAP3xxx do not have ELM engine, so cannot support ECC schemes
54 * which require H/W based ECC error detection */
55 if ((cpu_is_omap34xx() || cpu_is_omap3630()) &&
56 ((ecc_opt == OMAP_ECC_BCH4_CODE_HW) ||
57 (ecc_opt == OMAP_ECC_BCH8_CODE_HW)))
51 return 0; 58 return 0;
52 }
53 59
54 /* 60 /*
55 * For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1 61 * For now, assume 4-bit mode is only supported on OMAP3630 ES1.x, x>=1
56 * and AM33xx derivates. Other chips may be added if confirmed to work. 62 * and AM33xx derivates. Other chips may be added if confirmed to work.
57 */ 63 */
58 if ((ecc_opt == OMAP_ECC_BCH4_CODE_HW) && 64 if ((ecc_opt == OMAP_ECC_BCH4_CODE_HW_DETECTION_SW) &&
59 (!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0)) && 65 (!cpu_is_omap3630() || (GET_OMAP_REVISION() == 0)))
60 (!soc_is_am33xx())) {
61 pr_err("BCH 4-bit mode is not supported on this CPU\n");
62 return 0; 66 return 0;
63 }
64 67
65 return 1; 68 /* legacy platforms support only HAM1 (1-bit Hamming) ECC scheme */
69 if (ecc_opt == OMAP_ECC_HAM1_CODE_HW)
70 return 1;
71 else
72 return 0;
66} 73}
67 74
68/* This function will go away once the device-tree convertion is complete */ 75/* This function will go away once the device-tree convertion is complete */
@@ -133,8 +140,10 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
133 140
134 gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs); 141 gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs);
135 142
136 if (!gpmc_hwecc_bch_capable(gpmc_nand_data->ecc_opt)) 143 if (!gpmc_hwecc_bch_capable(gpmc_nand_data->ecc_opt)) {
144 dev_err(dev, "Unsupported NAND ECC scheme selected\n");
137 return -EINVAL; 145 return -EINVAL;
146 }
138 147
139 err = platform_device_register(&gpmc_nand_device); 148 err = platform_device_register(&gpmc_nand_device);
140 if (err < 0) { 149 if (err < 0) {
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index 3d5b24dcd9a4..3e1407c909f7 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -99,7 +99,7 @@ static int omap3_sbc_t3730_twl_callback(struct device *dev,
99 int res; 99 int res;
100 100
101 res = gpio_request_one(gpio + 2, GPIOF_OUT_INIT_HIGH, 101 res = gpio_request_one(gpio + 2, GPIOF_OUT_INIT_HIGH,
102 "wlan rst"); 102 "wlan pwr");
103 if (res) 103 if (res)
104 return res; 104 return res;
105 105
@@ -108,6 +108,23 @@ static int omap3_sbc_t3730_twl_callback(struct device *dev,
108 return 0; 108 return 0;
109} 109}
110 110
111static void __init omap3_sbc_t3x_usb_hub_init(int gpio, char *hub_name)
112{
113 int err = gpio_request_one(gpio, GPIOF_OUT_INIT_LOW, hub_name);
114
115 if (err) {
116 pr_err("SBC-T3x: %s reset gpio request failed: %d\n",
117 hub_name, err);
118 return;
119 }
120
121 gpio_export(gpio, 0);
122
123 udelay(10);
124 gpio_set_value(gpio, 1);
125 msleep(1);
126}
127
111static void __init omap3_sbc_t3730_twl_init(void) 128static void __init omap3_sbc_t3730_twl_init(void)
112{ 129{
113 twl_gpio_auxdata.setup = omap3_sbc_t3730_twl_callback; 130 twl_gpio_auxdata.setup = omap3_sbc_t3730_twl_callback;
@@ -115,10 +132,17 @@ static void __init omap3_sbc_t3730_twl_init(void)
115 132
116static void __init omap3_sbc_t3730_legacy_init(void) 133static void __init omap3_sbc_t3730_legacy_init(void)
117{ 134{
135 omap3_sbc_t3x_usb_hub_init(167, "sb-t35 usb hub");
118 legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 136); 136 legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 136);
119 omap_ads7846_init(1, 57, 0, NULL); 137 omap_ads7846_init(1, 57, 0, NULL);
120} 138}
121 139
140static void __init omap3_sbc_t3530_legacy_init(void)
141{
142 omap3_sbc_t3x_usb_hub_init(167, "sb-t35 usb hub");
143 omap_ads7846_init(1, 57, 0, NULL);
144}
145
122static void __init omap3_igep0020_legacy_init(void) 146static void __init omap3_igep0020_legacy_init(void)
123{ 147{
124 omap3_igep2_display_init_of(); 148 omap3_igep2_display_init_of();
@@ -160,7 +184,7 @@ static struct emac_platform_data am35xx_emac_pdata = {
160 .interrupt_disable = am35xx_disable_emac_int, 184 .interrupt_disable = am35xx_disable_emac_int,
161}; 185};
162 186
163static void __init am3517_evm_legacy_init(void) 187static void __init am35xx_emac_reset(void)
164{ 188{
165 u32 v; 189 u32 v;
166 190
@@ -169,6 +193,43 @@ static void __init am3517_evm_legacy_init(void)
169 omap_ctrl_writel(v, AM35XX_CONTROL_IP_SW_RESET); 193 omap_ctrl_writel(v, AM35XX_CONTROL_IP_SW_RESET);
170 omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */ 194 omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */
171} 195}
196
197static struct gpio cm_t3517_wlan_gpios[] __initdata = {
198 { 56, GPIOF_OUT_INIT_HIGH, "wlan pwr" },
199 { 4, GPIOF_OUT_INIT_HIGH, "xcvr noe" },
200};
201
202static void __init omap3_sbc_t3517_wifi_init(void)
203{
204 int err = gpio_request_array(cm_t3517_wlan_gpios,
205 ARRAY_SIZE(cm_t3517_wlan_gpios));
206 if (err) {
207 pr_err("SBC-T3517: wl12xx gpios request failed: %d\n", err);
208 return;
209 }
210
211 gpio_export(cm_t3517_wlan_gpios[0].gpio, 0);
212 gpio_export(cm_t3517_wlan_gpios[1].gpio, 0);
213
214 msleep(100);
215 gpio_set_value(cm_t3517_wlan_gpios[1].gpio, 0);
216}
217
218static void __init omap3_sbc_t3517_legacy_init(void)
219{
220 omap3_sbc_t3x_usb_hub_init(152, "cm-t3517 usb hub");
221 omap3_sbc_t3x_usb_hub_init(98, "sb-t35 usb hub");
222 am35xx_emac_reset();
223 hsmmc2_internal_input_clk();
224 omap3_sbc_t3517_wifi_init();
225 legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 145);
226 omap_ads7846_init(1, 57, 0, NULL);
227}
228
229static void __init am3517_evm_legacy_init(void)
230{
231 am35xx_emac_reset();
232}
172#endif /* CONFIG_ARCH_OMAP3 */ 233#endif /* CONFIG_ARCH_OMAP3 */
173 234
174#ifdef CONFIG_ARCH_OMAP4 235#ifdef CONFIG_ARCH_OMAP4
@@ -258,6 +319,8 @@ struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
258 */ 319 */
259static struct pdata_init pdata_quirks[] __initdata = { 320static struct pdata_init pdata_quirks[] __initdata = {
260#ifdef CONFIG_ARCH_OMAP3 321#ifdef CONFIG_ARCH_OMAP3
322 { "compulab,omap3-sbc-t3517", omap3_sbc_t3517_legacy_init, },
323 { "compulab,omap3-sbc-t3530", omap3_sbc_t3530_legacy_init, },
261 { "compulab,omap3-sbc-t3730", omap3_sbc_t3730_legacy_init, }, 324 { "compulab,omap3-sbc-t3730", omap3_sbc_t3730_legacy_init, },
262 { "nokia,omap3-n900", hsmmc2_internal_input_clk, }, 325 { "nokia,omap3-n900", hsmmc2_internal_input_clk, },
263 { "nokia,omap3-n9", hsmmc2_internal_input_clk, }, 326 { "nokia,omap3-n9", hsmmc2_internal_input_clk, },
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-08 01:18:33 -0400