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-rw-r--r--arch/arm/Kconfig20
-rw-r--r--arch/arm/boot/dts/Makefile2
-rw-r--r--arch/arm/boot/dts/am335x-evm.dts4
-rw-r--r--arch/arm/boot/dts/am335x-evmsk.dts4
-rw-r--r--arch/arm/boot/dts/am335x-igep0033.dtsi6
-rw-r--r--arch/arm/boot/dts/am43x-epos-evm.dts4
-rw-r--r--arch/arm/boot/dts/armada-375-db.dts2
-rw-r--r--arch/arm/boot/dts/armada-380.dtsi2
-rw-r--r--arch/arm/boot/dts/armada-385-db.dts4
-rw-r--r--arch/arm/boot/dts/armada-385-rd.dts2
-rw-r--r--arch/arm/boot/dts/armada-385.dtsi2
-rw-r--r--arch/arm/boot/dts/armada-38x.dtsi2
-rw-r--r--arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts2
-rw-r--r--arch/arm/boot/dts/at91sam9261.dtsi21
-rw-r--r--arch/arm/boot/dts/at91sam9261ek.dts4
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi4
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi6
-rw-r--r--arch/arm/boot/dts/dra7-evm.dts1
-rw-r--r--arch/arm/boot/dts/dra7.dtsi12
-rw-r--r--arch/arm/boot/dts/dra7xx-clocks.dtsi26
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi4
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi5
-rw-r--r--arch/arm/boot/dts/imx51-babbage.dts10
-rw-r--r--arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts4
-rw-r--r--arch/arm/boot/dts/imx53-m53evk.dts40
-rw-r--r--arch/arm/boot/dts/imx6dl-hummingboard.dts10
-rw-r--r--arch/arm/boot/dts/imx6q-gw51xx.dts2
-rw-r--r--arch/arm/boot/dts/imx6qdl-cubox-i.dtsi27
-rw-r--r--arch/arm/boot/dts/imx6qdl-gw51xx.dtsi2
-rw-r--r--arch/arm/boot/dts/imx6qdl-gw52xx.dtsi4
-rw-r--r--arch/arm/boot/dts/imx6qdl-gw53xx.dtsi2
-rw-r--r--arch/arm/boot/dts/imx6qdl-microsom.dtsi13
-rw-r--r--arch/arm/boot/dts/imx6sl.dtsi2
-rw-r--r--arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts4
-rw-r--r--arch/arm/boot/dts/omap3-beagle-xm.dts6
-rw-r--r--arch/arm/boot/dts/omap3-evm-common.dtsi7
-rw-r--r--arch/arm/boot/dts/omap3-n900.dts5
-rw-r--r--arch/arm/boot/dts/omap5.dtsi1
-rw-r--r--arch/arm/boot/dts/stih415.dtsi8
-rw-r--r--arch/arm/boot/dts/stih416-b2020e.dts (renamed from arch/arm/boot/dts/stih416-b2020-revE.dts)0
-rw-r--r--arch/arm/boot/dts/stih416.dtsi8
-rw-r--r--arch/arm/common/scoop.c1
-rw-r--r--arch/arm/configs/bcm_defconfig2
-rw-r--r--arch/arm/configs/imx_v6_v7_defconfig1
-rw-r--r--arch/arm/configs/multi_v7_defconfig5
-rw-r--r--arch/arm/configs/mvebu_v7_defconfig2
-rw-r--r--arch/arm/configs/omap2plus_defconfig1
-rw-r--r--arch/arm/include/asm/ftrace.h2
-rw-r--r--arch/arm/include/asm/mcpm.h2
-rw-r--r--arch/arm/include/asm/thread_info.h6
-rw-r--r--arch/arm/kernel/kprobes-test-arm.c30
-rw-r--r--arch/arm/kernel/kprobes-test.c10
-rw-r--r--arch/arm/kernel/perf_event_v7.c4
-rw-r--r--arch/arm/kernel/probes-arm.c6
-rw-r--r--arch/arm/kernel/ptrace.c7
-rw-r--r--arch/arm/mach-bcm/Kconfig7
-rw-r--r--arch/arm/mach-berlin/Kconfig6
-rw-r--r--arch/arm/mach-cns3xxx/Kconfig7
-rw-r--r--arch/arm/mach-davinci/Kconfig1
-rw-r--r--arch/arm/mach-exynos/Kconfig7
-rw-r--r--arch/arm/mach-exynos/common.h1
-rw-r--r--arch/arm/mach-exynos/exynos.c37
-rw-r--r--arch/arm/mach-exynos/firmware.c9
-rw-r--r--arch/arm/mach-exynos/hotplug.c8
-rw-r--r--arch/arm/mach-exynos/mcpm-exynos.c11
-rw-r--r--arch/arm/mach-exynos/platsmp.c26
-rw-r--r--arch/arm/mach-exynos/pm.c15
-rw-r--r--arch/arm/mach-exynos/pm_domains.c61
-rw-r--r--arch/arm/mach-highbank/Kconfig1
-rw-r--r--arch/arm/mach-imx/Kconfig22
-rw-r--r--arch/arm/mach-imx/clk-gate2.c31
-rw-r--r--arch/arm/mach-imx/clk-imx6sl.c1
-rw-r--r--arch/arm/mach-integrator/Kconfig2
-rw-r--r--arch/arm/mach-integrator/impd1.c12
-rw-r--r--arch/arm/mach-integrator/integrator_ap.c26
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c23
-rw-r--r--arch/arm/mach-keystone/Kconfig1
-rw-r--r--arch/arm/mach-moxart/Kconfig2
-rw-r--r--arch/arm/mach-mvebu/Kconfig9
-rw-r--r--arch/arm/mach-mvebu/Makefile2
-rw-r--r--arch/arm/mach-mvebu/board-v7.c29
-rw-r--r--arch/arm/mach-mvebu/pmsu.c9
-rw-r--r--arch/arm/mach-mvebu/pmsu_ll.S25
-rw-r--r--arch/arm/mach-nomadik/Kconfig4
-rw-r--r--arch/arm/mach-omap2/Kconfig11
-rw-r--r--arch/arm/mach-omap2/Makefile6
-rw-r--r--arch/arm/mach-omap2/clkt_dpll.c2
-rw-r--r--arch/arm/mach-omap2/cm-regbits-34xx.h3
-rw-r--r--arch/arm/mach-omap2/cm33xx.h2
-rw-r--r--arch/arm/mach-omap2/common.h11
-rw-r--r--arch/arm/mach-omap2/devices.c28
-rw-r--r--arch/arm/mach-omap2/dsp.c10
-rw-r--r--arch/arm/mach-omap2/gpmc.c2
-rw-r--r--arch/arm/mach-omap2/id.c12
-rw-r--r--arch/arm/mach-omap2/mux.c6
-rw-r--r--arch/arm/mach-omap2/omap4-common.c20
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c6
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_54xx_data.c73
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_7xx_data.c18
-rw-r--r--arch/arm/mach-omap2/prm-regbits-34xx.h6
-rw-r--r--arch/arm/mach-omap2/soc.h1
-rw-r--r--arch/arm/mach-prima2/Kconfig6
-rw-r--r--arch/arm/mach-qcom/Kconfig6
-rw-r--r--arch/arm/mach-s3c24xx/Kconfig2
-rw-r--r--arch/arm/mach-s3c64xx/Kconfig4
-rw-r--r--arch/arm/mach-s5p64x0/Kconfig6
-rw-r--r--arch/arm/mach-s5pc100/Kconfig3
-rw-r--r--arch/arm/mach-s5pv210/Kconfig3
-rw-r--r--arch/arm/mach-sa1100/collie.c7
-rw-r--r--arch/arm/mach-shmobile/Kconfig6
-rw-r--r--arch/arm/mach-spear/Kconfig1
-rw-r--r--arch/arm/mach-sti/Kconfig6
-rw-r--r--arch/arm/mach-sunxi/sunxi.c77
-rw-r--r--arch/arm/mach-tegra/Kconfig8
-rw-r--r--arch/arm/mach-u300/Kconfig6
-rw-r--r--arch/arm/mach-ux500/Kconfig9
-rw-r--r--arch/arm/mach-vexpress/Kconfig10
-rw-r--r--arch/arm/mach-vt8500/Kconfig1
-rw-r--r--arch/arm/mach-zynq/Kconfig1
-rw-r--r--arch/arm/mm/Kconfig9
-rw-r--r--arch/arm/mm/cache-l2x0.c33
-rw-r--r--arch/arm/mm/nommu.c1
-rw-r--r--arch/arm/mm/proc-arm925.S1
-rw-r--r--arch/arm/plat-samsung/Kconfig28
124 files changed, 770 insertions, 449 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 87b63fde06d7..245058b3b0ef 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -175,13 +175,6 @@ config ARCH_HAS_ILOG2_U32
175config ARCH_HAS_ILOG2_U64 175config ARCH_HAS_ILOG2_U64
176 bool 176 bool
177 177
178config ARCH_HAS_CPUFREQ
179 bool
180 help
181 Internal node to signify that the ARCH has CPUFREQ support
182 and that the relevant menu configurations are displayed for
183 it.
184
185config ARCH_HAS_BANDGAP 178config ARCH_HAS_BANDGAP
186 bool 179 bool
187 180
@@ -318,7 +311,6 @@ config ARCH_MULTIPLATFORM
318 311
319config ARCH_INTEGRATOR 312config ARCH_INTEGRATOR
320 bool "ARM Ltd. Integrator family" 313 bool "ARM Ltd. Integrator family"
321 select ARCH_HAS_CPUFREQ
322 select ARM_AMBA 314 select ARM_AMBA
323 select ARM_PATCH_PHYS_VIRT 315 select ARM_PATCH_PHYS_VIRT
324 select AUTO_ZRELADDR 316 select AUTO_ZRELADDR
@@ -538,7 +530,6 @@ config ARCH_DOVE
538 530
539config ARCH_KIRKWOOD 531config ARCH_KIRKWOOD
540 bool "Marvell Kirkwood" 532 bool "Marvell Kirkwood"
541 select ARCH_HAS_CPUFREQ
542 select ARCH_REQUIRE_GPIOLIB 533 select ARCH_REQUIRE_GPIOLIB
543 select CPU_FEROCEON 534 select CPU_FEROCEON
544 select GENERIC_CLOCKEVENTS 535 select GENERIC_CLOCKEVENTS
@@ -637,7 +628,6 @@ config ARCH_LPC32XX
637config ARCH_PXA 628config ARCH_PXA
638 bool "PXA2xx/PXA3xx-based" 629 bool "PXA2xx/PXA3xx-based"
639 depends on MMU 630 depends on MMU
640 select ARCH_HAS_CPUFREQ
641 select ARCH_MTD_XIP 631 select ARCH_MTD_XIP
642 select ARCH_REQUIRE_GPIOLIB 632 select ARCH_REQUIRE_GPIOLIB
643 select ARM_CPU_SUSPEND if PM 633 select ARM_CPU_SUSPEND if PM
@@ -707,7 +697,6 @@ config ARCH_RPC
707 697
708config ARCH_SA1100 698config ARCH_SA1100
709 bool "SA1100-based" 699 bool "SA1100-based"
710 select ARCH_HAS_CPUFREQ
711 select ARCH_MTD_XIP 700 select ARCH_MTD_XIP
712 select ARCH_REQUIRE_GPIOLIB 701 select ARCH_REQUIRE_GPIOLIB
713 select ARCH_SPARSEMEM_ENABLE 702 select ARCH_SPARSEMEM_ENABLE
@@ -725,7 +714,6 @@ config ARCH_SA1100
725 714
726config ARCH_S3C24XX 715config ARCH_S3C24XX
727 bool "Samsung S3C24XX SoCs" 716 bool "Samsung S3C24XX SoCs"
728 select ARCH_HAS_CPUFREQ
729 select ARCH_REQUIRE_GPIOLIB 717 select ARCH_REQUIRE_GPIOLIB
730 select ATAGS 718 select ATAGS
731 select CLKDEV_LOOKUP 719 select CLKDEV_LOOKUP
@@ -746,7 +734,6 @@ config ARCH_S3C24XX
746 734
747config ARCH_S3C64XX 735config ARCH_S3C64XX
748 bool "Samsung S3C64XX" 736 bool "Samsung S3C64XX"
749 select ARCH_HAS_CPUFREQ
750 select ARCH_REQUIRE_GPIOLIB 737 select ARCH_REQUIRE_GPIOLIB
751 select ARM_AMBA 738 select ARM_AMBA
752 select ARM_VIC 739 select ARM_VIC
@@ -809,7 +796,6 @@ config ARCH_S5PC100
809 796
810config ARCH_S5PV210 797config ARCH_S5PV210
811 bool "Samsung S5PV210/S5PC110" 798 bool "Samsung S5PV210/S5PC110"
812 select ARCH_HAS_CPUFREQ
813 select ARCH_HAS_HOLES_MEMORYMODEL 799 select ARCH_HAS_HOLES_MEMORYMODEL
814 select ARCH_SPARSEMEM_ENABLE 800 select ARCH_SPARSEMEM_ENABLE
815 select ATAGS 801 select ATAGS
@@ -845,7 +831,6 @@ config ARCH_DAVINCI
845config ARCH_OMAP1 831config ARCH_OMAP1
846 bool "TI OMAP1" 832 bool "TI OMAP1"
847 depends on MMU 833 depends on MMU
848 select ARCH_HAS_CPUFREQ
849 select ARCH_HAS_HOLES_MEMORYMODEL 834 select ARCH_HAS_HOLES_MEMORYMODEL
850 select ARCH_OMAP 835 select ARCH_OMAP
851 select ARCH_REQUIRE_GPIOLIB 836 select ARCH_REQUIRE_GPIOLIB
@@ -1009,8 +994,6 @@ source "arch/arm/mach-rockchip/Kconfig"
1009 994
1010source "arch/arm/mach-sa1100/Kconfig" 995source "arch/arm/mach-sa1100/Kconfig"
1011 996
1012source "arch/arm/plat-samsung/Kconfig"
1013
1014source "arch/arm/mach-socfpga/Kconfig" 997source "arch/arm/mach-socfpga/Kconfig"
1015 998
1016source "arch/arm/mach-spear/Kconfig" 999source "arch/arm/mach-spear/Kconfig"
@@ -1028,6 +1011,7 @@ source "arch/arm/mach-s5pc100/Kconfig"
1028source "arch/arm/mach-s5pv210/Kconfig" 1011source "arch/arm/mach-s5pv210/Kconfig"
1029 1012
1030source "arch/arm/mach-exynos/Kconfig" 1013source "arch/arm/mach-exynos/Kconfig"
1014source "arch/arm/plat-samsung/Kconfig"
1031 1015
1032source "arch/arm/mach-shmobile/Kconfig" 1016source "arch/arm/mach-shmobile/Kconfig"
1033 1017
@@ -2109,9 +2093,7 @@ endmenu
2109 2093
2110menu "CPU Power Management" 2094menu "CPU Power Management"
2111 2095
2112if ARCH_HAS_CPUFREQ
2113source "drivers/cpufreq/Kconfig" 2096source "drivers/cpufreq/Kconfig"
2114endif
2115 2097
2116source "drivers/cpuidle/Kconfig" 2098source "drivers/cpuidle/Kconfig"
2117 2099
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 5986ff63b901..adb5ed9e269e 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -357,7 +357,7 @@ dtb-$(CONFIG_ARCH_STI)+= stih407-b2120.dtb \
357 stih415-b2020.dtb \ 357 stih415-b2020.dtb \
358 stih416-b2000.dtb \ 358 stih416-b2000.dtb \
359 stih416-b2020.dtb \ 359 stih416-b2020.dtb \
360 stih416-b2020-revE.dtb 360 stih416-b2020e.dtb
361dtb-$(CONFIG_MACH_SUN4I) += \ 361dtb-$(CONFIG_MACH_SUN4I) += \
362 sun4i-a10-a1000.dtb \ 362 sun4i-a10-a1000.dtb \
363 sun4i-a10-cubieboard.dtb \ 363 sun4i-a10-cubieboard.dtb \
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index ecb267767cf5..e2156a583de7 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -529,8 +529,8 @@
529 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 529 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
530 0 0 1 2 530 0 0 1 2
531 >; 531 >;
532 tx-num-evt = <1>; 532 tx-num-evt = <32>;
533 rx-num-evt = <1>; 533 rx-num-evt = <32>;
534}; 534};
535 535
536&tps { 536&tps {
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts
index ab9a34ce524c..80a3b215e7d6 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -560,8 +560,8 @@
560 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 560 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
561 0 0 1 2 561 0 0 1 2
562 >; 562 >;
563 tx-num-evt = <1>; 563 tx-num-evt = <32>;
564 rx-num-evt = <1>; 564 rx-num-evt = <32>;
565}; 565};
566 566
567&tscadc { 567&tscadc {
diff --git a/arch/arm/boot/dts/am335x-igep0033.dtsi b/arch/arm/boot/dts/am335x-igep0033.dtsi
index 8a0a72dc7dd7..a1a0cc5eb35c 100644
--- a/arch/arm/boot/dts/am335x-igep0033.dtsi
+++ b/arch/arm/boot/dts/am335x-igep0033.dtsi
@@ -105,10 +105,16 @@
105 105
106&cpsw_emac0 { 106&cpsw_emac0 {
107 phy_id = <&davinci_mdio>, <0>; 107 phy_id = <&davinci_mdio>, <0>;
108 phy-mode = "rmii";
108}; 109};
109 110
110&cpsw_emac1 { 111&cpsw_emac1 {
111 phy_id = <&davinci_mdio>, <1>; 112 phy_id = <&davinci_mdio>, <1>;
113 phy-mode = "rmii";
114};
115
116&phy_sel {
117 rmii-clock-ext;
112}; 118};
113 119
114&elm { 120&elm {
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index 19f1f7e87597..90098f98a5c8 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -319,6 +319,10 @@
319 phy-mode = "rmii"; 319 phy-mode = "rmii";
320}; 320};
321 321
322&phy_sel {
323 rmii-clock-ext;
324};
325
322&i2c0 { 326&i2c0 {
323 status = "okay"; 327 status = "okay";
324 pinctrl-names = "default"; 328 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/armada-375-db.dts b/arch/arm/boot/dts/armada-375-db.dts
index 772fec2d26ce..1e2919d43d78 100644
--- a/arch/arm/boot/dts/armada-375-db.dts
+++ b/arch/arm/boot/dts/armada-375-db.dts
@@ -91,6 +91,8 @@
91 marvell,nand-keep-config; 91 marvell,nand-keep-config;
92 marvell,nand-enable-arbiter; 92 marvell,nand-enable-arbiter;
93 nand-on-flash-bbt; 93 nand-on-flash-bbt;
94 nand-ecc-strength = <4>;
95 nand-ecc-step-size = <512>;
94 96
95 partition@0 { 97 partition@0 {
96 label = "U-Boot"; 98 label = "U-Boot";
diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi
index e69bc6759c39..4173a8ab34e7 100644
--- a/arch/arm/boot/dts/armada-380.dtsi
+++ b/arch/arm/boot/dts/armada-380.dtsi
@@ -16,7 +16,7 @@
16 16
17/ { 17/ {
18 model = "Marvell Armada 380 family SoC"; 18 model = "Marvell Armada 380 family SoC";
19 compatible = "marvell,armada380", "marvell,armada38x"; 19 compatible = "marvell,armada380";
20 20
21 cpus { 21 cpus {
22 #address-cells = <1>; 22 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/armada-385-db.dts b/arch/arm/boot/dts/armada-385-db.dts
index ff9637dd8d0f..1af886f1e486 100644
--- a/arch/arm/boot/dts/armada-385-db.dts
+++ b/arch/arm/boot/dts/armada-385-db.dts
@@ -16,7 +16,7 @@
16 16
17/ { 17/ {
18 model = "Marvell Armada 385 Development Board"; 18 model = "Marvell Armada 385 Development Board";
19 compatible = "marvell,a385-db", "marvell,armada385", "marvell,armada38x"; 19 compatible = "marvell,a385-db", "marvell,armada385", "marvell,armada380";
20 20
21 chosen { 21 chosen {
22 bootargs = "console=ttyS0,115200 earlyprintk"; 22 bootargs = "console=ttyS0,115200 earlyprintk";
@@ -98,6 +98,8 @@
98 marvell,nand-keep-config; 98 marvell,nand-keep-config;
99 marvell,nand-enable-arbiter; 99 marvell,nand-enable-arbiter;
100 nand-on-flash-bbt; 100 nand-on-flash-bbt;
101 nand-ecc-strength = <4>;
102 nand-ecc-step-size = <512>;
101 103
102 partition@0 { 104 partition@0 {
103 label = "U-Boot"; 105 label = "U-Boot";
diff --git a/arch/arm/boot/dts/armada-385-rd.dts b/arch/arm/boot/dts/armada-385-rd.dts
index 40893255a3f0..aaca2861dc87 100644
--- a/arch/arm/boot/dts/armada-385-rd.dts
+++ b/arch/arm/boot/dts/armada-385-rd.dts
@@ -17,7 +17,7 @@
17 17
18/ { 18/ {
19 model = "Marvell Armada 385 Reference Design"; 19 model = "Marvell Armada 385 Reference Design";
20 compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada38x"; 20 compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada380";
21 21
22 chosen { 22 chosen {
23 bootargs = "console=ttyS0,115200 earlyprintk"; 23 bootargs = "console=ttyS0,115200 earlyprintk";
diff --git a/arch/arm/boot/dts/armada-385.dtsi b/arch/arm/boot/dts/armada-385.dtsi
index f011009bf4cf..6283d7912f71 100644
--- a/arch/arm/boot/dts/armada-385.dtsi
+++ b/arch/arm/boot/dts/armada-385.dtsi
@@ -16,7 +16,7 @@
16 16
17/ { 17/ {
18 model = "Marvell Armada 385 family SoC"; 18 model = "Marvell Armada 385 family SoC";
19 compatible = "marvell,armada385", "marvell,armada38x"; 19 compatible = "marvell,armada385", "marvell,armada380";
20 20
21 cpus { 21 cpus {
22 #address-cells = <1>; 22 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index 3de364e81b52..689fa1a46728 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -20,7 +20,7 @@
20 20
21/ { 21/ {
22 model = "Marvell Armada 38x family SoC"; 22 model = "Marvell Armada 38x family SoC";
23 compatible = "marvell,armada38x"; 23 compatible = "marvell,armada380";
24 24
25 aliases { 25 aliases {
26 gpio0 = &gpio0; 26 gpio0 = &gpio0;
diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
index e5c6a0492ca0..4e5a59ee1501 100644
--- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
+++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
@@ -25,7 +25,7 @@
25 25
26 memory { 26 memory {
27 device_type = "memory"; 27 device_type = "memory";
28 reg = <0 0x00000000 0 0xC0000000>; /* 3 GB */ 28 reg = <0 0x00000000 0 0x40000000>; /* 1 GB soldered on */
29 }; 29 };
30 30
31 soc { 31 soc {
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index b309c1c6e848..04927db1d6bf 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -568,24 +568,17 @@
568 #size-cells = <0>; 568 #size-cells = <0>;
569 #interrupt-cells = <1>; 569 #interrupt-cells = <1>;
570 570
571 slow_rc_osc: slow_rc_osc { 571 main_osc: main_osc {
572 compatible = "fixed-clock"; 572 compatible = "atmel,at91rm9200-clk-main-osc";
573 #clock-cells = <0>; 573 #clock-cells = <0>;
574 clock-frequency = <32768>; 574 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
575 clock-accuracy = <50000000>; 575 clocks = <&main_xtal>;
576 };
577
578 clk32k: slck {
579 compatible = "atmel,at91sam9260-clk-slow";
580 #clock-cells = <0>;
581 clocks = <&slow_rc_osc &slow_xtal>;
582 }; 576 };
583 577
584 main: mainck { 578 main: mainck {
585 compatible = "atmel,at91rm9200-clk-main"; 579 compatible = "atmel,at91rm9200-clk-main";
586 #clock-cells = <0>; 580 #clock-cells = <0>;
587 interrupts-extended = <&pmc AT91_PMC_MOSCS>; 581 clocks = <&main_osc>;
588 clocks = <&main_xtal>;
589 }; 582 };
590 583
591 plla: pllack { 584 plla: pllack {
@@ -615,7 +608,7 @@
615 compatible = "atmel,at91rm9200-clk-master"; 608 compatible = "atmel,at91rm9200-clk-master";
616 #clock-cells = <0>; 609 #clock-cells = <0>;
617 interrupts-extended = <&pmc AT91_PMC_MCKRDY>; 610 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
618 clocks = <&clk32k>, <&main>, <&plla>, <&pllb>; 611 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
619 atmel,clk-output-range = <0 94000000>; 612 atmel,clk-output-range = <0 94000000>;
620 atmel,clk-divisors = <1 2 4 0>; 613 atmel,clk-divisors = <1 2 4 0>;
621 }; 614 };
@@ -632,7 +625,7 @@
632 #address-cells = <1>; 625 #address-cells = <1>;
633 #size-cells = <0>; 626 #size-cells = <0>;
634 interrupt-parent = <&pmc>; 627 interrupt-parent = <&pmc>;
635 clocks = <&clk32k>, <&main>, <&plla>, <&pllb>; 628 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
636 629
637 prog0: prog0 { 630 prog0: prog0 {
638 #clock-cells = <0>; 631 #clock-cells = <0>;
diff --git a/arch/arm/boot/dts/at91sam9261ek.dts b/arch/arm/boot/dts/at91sam9261ek.dts
index c6683ea8b743..aa35a7aec9a8 100644
--- a/arch/arm/boot/dts/at91sam9261ek.dts
+++ b/arch/arm/boot/dts/at91sam9261ek.dts
@@ -20,6 +20,10 @@
20 reg = <0x20000000 0x4000000>; 20 reg = <0x20000000 0x4000000>;
21 }; 21 };
22 22
23 slow_xtal {
24 clock-frequency = <32768>;
25 };
26
23 main_xtal { 27 main_xtal {
24 clock-frequency = <18432000>; 28 clock-frequency = <18432000>;
25 }; 29 };
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index d1b82e6635d5..287795985e32 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -132,8 +132,8 @@
132 <595000000 650000000 3 0>, 132 <595000000 650000000 3 0>,
133 <545000000 600000000 0 1>, 133 <545000000 600000000 0 1>,
134 <495000000 555000000 1 1>, 134 <495000000 555000000 1 1>,
135 <445000000 500000000 1 2>, 135 <445000000 500000000 2 1>,
136 <400000000 450000000 1 3>; 136 <400000000 450000000 3 1>;
137 }; 137 };
138 138
139 plladiv: plladivck { 139 plladiv: plladivck {
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 1a57298636a5..2ebc42140ea6 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -140,8 +140,8 @@
140 595000000 650000000 3 0 140 595000000 650000000 3 0
141 545000000 600000000 0 1 141 545000000 600000000 0 1
142 495000000 555000000 1 1 142 495000000 555000000 1 1
143 445000000 500000000 1 2 143 445000000 500000000 2 1
144 400000000 450000000 1 3>; 144 400000000 450000000 3 1>;
145 }; 145 };
146 146
147 plladiv: plladivck { 147 plladiv: plladivck {
@@ -1045,6 +1045,8 @@
1045 reg = <0x00500000 0x80000 1045 reg = <0x00500000 0x80000
1046 0xf803c000 0x400>; 1046 0xf803c000 0x400>;
1047 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>; 1047 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
1048 clocks = <&usb>, <&udphs_clk>;
1049 clock-names = "hclk", "pclk";
1048 status = "disabled"; 1050 status = "disabled";
1049 1051
1050 ep0 { 1052 ep0 {
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 4adc28039c30..83089540e324 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -240,6 +240,7 @@
240 regulator-name = "ldo3"; 240 regulator-name = "ldo3";
241 regulator-min-microvolt = <1800000>; 241 regulator-min-microvolt = <1800000>;
242 regulator-max-microvolt = <1800000>; 242 regulator-max-microvolt = <1800000>;
243 regulator-always-on;
243 regulator-boot-on; 244 regulator-boot-on;
244 }; 245 };
245 246
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index c29945e07c5a..80127638b379 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -773,7 +773,6 @@
773 clocks = <&qspi_gfclk_div>; 773 clocks = <&qspi_gfclk_div>;
774 clock-names = "fck"; 774 clock-names = "fck";
775 num-cs = <4>; 775 num-cs = <4>;
776 interrupts = <0 343 0x4>;
777 status = "disabled"; 776 status = "disabled";
778 }; 777 };
779 778
@@ -984,6 +983,17 @@
984 #size-cells = <1>; 983 #size-cells = <1>;
985 status = "disabled"; 984 status = "disabled";
986 }; 985 };
986
987 atl: atl@4843c000 {
988 compatible = "ti,dra7-atl";
989 reg = <0x4843c000 0x3ff>;
990 ti,hwmods = "atl";
991 ti,provided-clocks = <&atl_clkin0_ck>, <&atl_clkin1_ck>,
992 <&atl_clkin2_ck>, <&atl_clkin3_ck>;
993 clocks = <&atl_gfclk_mux>;
994 clock-names = "fck";
995 status = "disabled";
996 };
987 }; 997 };
988}; 998};
989 999
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index b03cfe49d22b..dc7a292fe939 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -10,26 +10,26 @@
10&cm_core_aon_clocks { 10&cm_core_aon_clocks {
11 atl_clkin0_ck: atl_clkin0_ck { 11 atl_clkin0_ck: atl_clkin0_ck {
12 #clock-cells = <0>; 12 #clock-cells = <0>;
13 compatible = "fixed-clock"; 13 compatible = "ti,dra7-atl-clock";
14 clock-frequency = <0>; 14 clocks = <&atl_gfclk_mux>;
15 }; 15 };
16 16
17 atl_clkin1_ck: atl_clkin1_ck { 17 atl_clkin1_ck: atl_clkin1_ck {
18 #clock-cells = <0>; 18 #clock-cells = <0>;
19 compatible = "fixed-clock"; 19 compatible = "ti,dra7-atl-clock";
20 clock-frequency = <0>; 20 clocks = <&atl_gfclk_mux>;
21 }; 21 };
22 22
23 atl_clkin2_ck: atl_clkin2_ck { 23 atl_clkin2_ck: atl_clkin2_ck {
24 #clock-cells = <0>; 24 #clock-cells = <0>;
25 compatible = "fixed-clock"; 25 compatible = "ti,dra7-atl-clock";
26 clock-frequency = <0>; 26 clocks = <&atl_gfclk_mux>;
27 }; 27 };
28 28
29 atl_clkin3_ck: atl_clkin3_ck { 29 atl_clkin3_ck: atl_clkin3_ck {
30 #clock-cells = <0>; 30 #clock-cells = <0>;
31 compatible = "fixed-clock"; 31 compatible = "ti,dra7-atl-clock";
32 clock-frequency = <0>; 32 clocks = <&atl_gfclk_mux>;
33 }; 33 };
34 34
35 hdmi_clkin_ck: hdmi_clkin_ck { 35 hdmi_clkin_ck: hdmi_clkin_ck {
@@ -673,10 +673,12 @@
673 673
674 l3_iclk_div: l3_iclk_div { 674 l3_iclk_div: l3_iclk_div {
675 #clock-cells = <0>; 675 #clock-cells = <0>;
676 compatible = "fixed-factor-clock"; 676 compatible = "ti,divider-clock";
677 ti,max-div = <2>;
678 ti,bit-shift = <4>;
679 reg = <0x0100>;
677 clocks = <&dpll_core_h12x2_ck>; 680 clocks = <&dpll_core_h12x2_ck>;
678 clock-mult = <1>; 681 ti,index-power-of-two;
679 clock-div = <1>;
680 }; 682 };
681 683
682 l4_root_clk_div: l4_root_clk_div { 684 l4_root_clk_div: l4_root_clk_div {
@@ -684,7 +686,7 @@
684 compatible = "fixed-factor-clock"; 686 compatible = "fixed-factor-clock";
685 clocks = <&l3_iclk_div>; 687 clocks = <&l3_iclk_div>;
686 clock-mult = <1>; 688 clock-mult = <1>;
687 clock-div = <1>; 689 clock-div = <2>;
688 }; 690 };
689 691
690 video1_clk2_div: video1_clk2_div { 692 video1_clk2_div: video1_clk2_div {
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index b8ece4be41ca..17b22e9cc2aa 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -113,7 +113,7 @@
113 compatible = "arm,cortex-a9-gic"; 113 compatible = "arm,cortex-a9-gic";
114 #interrupt-cells = <3>; 114 #interrupt-cells = <3>;
115 interrupt-controller; 115 interrupt-controller;
116 reg = <0x10490000 0x1000>, <0x10480000 0x100>; 116 reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
117 }; 117 };
118 118
119 combiner: interrupt-controller@10440000 { 119 combiner: interrupt-controller@10440000 {
@@ -554,7 +554,7 @@
554 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>; 554 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
555 clocks = <&clock CLK_PWM>; 555 clocks = <&clock CLK_PWM>;
556 clock-names = "timers"; 556 clock-names = "timers";
557 #pwm-cells = <2>; 557 #pwm-cells = <3>;
558 status = "disabled"; 558 status = "disabled";
559 }; 559 };
560 560
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index e38532271ef9..15957227ffda 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -167,7 +167,7 @@
167 compatible = "samsung,exynos5420-audss-clock"; 167 compatible = "samsung,exynos5420-audss-clock";
168 reg = <0x03810000 0x0C>; 168 reg = <0x03810000 0x0C>;
169 #clock-cells = <1>; 169 #clock-cells = <1>;
170 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>, 170 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MAU_EPLL>,
171 <&clock CLK_SCLK_MAUDIO0>, <&clock CLK_SCLK_MAUPCM0>; 171 <&clock CLK_SCLK_MAUDIO0>, <&clock CLK_SCLK_MAUPCM0>;
172 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in"; 172 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
173 }; 173 };
@@ -260,6 +260,9 @@
260 mfc_pd: power-domain@10044060 { 260 mfc_pd: power-domain@10044060 {
261 compatible = "samsung,exynos4210-pd"; 261 compatible = "samsung,exynos4210-pd";
262 reg = <0x10044060 0x20>; 262 reg = <0x10044060 0x20>;
263 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK333>,
264 <&clock CLK_MOUT_USER_ACLK333>;
265 clock-names = "oscclk", "pclk0", "clk0";
263 }; 266 };
264 267
265 disp_pd: power-domain@100440C0 { 268 disp_pd: power-domain@100440C0 {
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index 6bc3243a80d3..181d77fa2fa6 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -315,15 +315,15 @@
315&esdhc1 { 315&esdhc1 {
316 pinctrl-names = "default"; 316 pinctrl-names = "default";
317 pinctrl-0 = <&pinctrl_esdhc1>; 317 pinctrl-0 = <&pinctrl_esdhc1>;
318 fsl,cd-controller; 318 cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
319 fsl,wp-controller; 319 wp-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
320 status = "okay"; 320 status = "okay";
321}; 321};
322 322
323&esdhc2 { 323&esdhc2 {
324 pinctrl-names = "default"; 324 pinctrl-names = "default";
325 pinctrl-0 = <&pinctrl_esdhc2>; 325 pinctrl-0 = <&pinctrl_esdhc2>;
326 cd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; 326 cd-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
327 wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; 327 wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
328 status = "okay"; 328 status = "okay";
329}; 329};
@@ -468,8 +468,8 @@
468 MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5 468 MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
469 MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5 469 MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
470 MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5 470 MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
471 MX51_PAD_GPIO1_0__SD1_CD 0x20d5 471 MX51_PAD_GPIO1_0__GPIO1_0 0x100
472 MX51_PAD_GPIO1_1__SD1_WP 0x20d5 472 MX51_PAD_GPIO1_1__GPIO1_1 0x100
473 >; 473 >;
474 }; 474 };
475 475
diff --git a/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
index 75e66c9c6144..31cfb7f2b02e 100644
--- a/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
+++ b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
@@ -107,7 +107,7 @@
107&esdhc1 { 107&esdhc1 {
108 pinctrl-names = "default"; 108 pinctrl-names = "default";
109 pinctrl-0 = <&pinctrl_esdhc1 &pinctrl_esdhc1_cd>; 109 pinctrl-0 = <&pinctrl_esdhc1 &pinctrl_esdhc1_cd>;
110 fsl,cd-controller; 110 cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
111 status = "okay"; 111 status = "okay";
112}; 112};
113 113
@@ -206,7 +206,7 @@
206 206
207 pinctrl_esdhc1_cd: esdhc1_cd { 207 pinctrl_esdhc1_cd: esdhc1_cd {
208 fsl,pins = < 208 fsl,pins = <
209 MX51_PAD_GPIO1_0__SD1_CD 0x20d5 209 MX51_PAD_GPIO1_0__GPIO1_0 0xd5
210 >; 210 >;
211 }; 211 };
212 212
diff --git a/arch/arm/boot/dts/imx53-m53evk.dts b/arch/arm/boot/dts/imx53-m53evk.dts
index d5d146a8b149..c4956b0ffb35 100644
--- a/arch/arm/boot/dts/imx53-m53evk.dts
+++ b/arch/arm/boot/dts/imx53-m53evk.dts
@@ -21,27 +21,25 @@
21 <0xb0000000 0x20000000>; 21 <0xb0000000 0x20000000>;
22 }; 22 };
23 23
24 soc { 24 display1: display@di1 {
25 display1: display@di1 { 25 compatible = "fsl,imx-parallel-display";
26 compatible = "fsl,imx-parallel-display"; 26 interface-pix-fmt = "bgr666";
27 interface-pix-fmt = "bgr666"; 27 pinctrl-names = "default";
28 pinctrl-names = "default"; 28 pinctrl-0 = <&pinctrl_ipu_disp1>;
29 pinctrl-0 = <&pinctrl_ipu_disp1>; 29
30 30 display-timings {
31 display-timings { 31 800x480p60 {
32 800x480p60 { 32 native-mode;
33 native-mode; 33 clock-frequency = <31500000>;
34 clock-frequency = <31500000>; 34 hactive = <800>;
35 hactive = <800>; 35 vactive = <480>;
36 vactive = <480>; 36 hfront-porch = <40>;
37 hfront-porch = <40>; 37 hback-porch = <88>;
38 hback-porch = <88>; 38 hsync-len = <128>;
39 hsync-len = <128>; 39 vback-porch = <33>;
40 vback-porch = <33>; 40 vfront-porch = <9>;
41 vfront-porch = <9>; 41 vsync-len = <3>;
42 vsync-len = <3>; 42 vsync-active = <1>;
43 vsync-active = <1>;
44 };
45 }; 43 };
46 }; 44 };
47 45
diff --git a/arch/arm/boot/dts/imx6dl-hummingboard.dts b/arch/arm/boot/dts/imx6dl-hummingboard.dts
index 5373a5f2782b..c8e51dd41b8f 100644
--- a/arch/arm/boot/dts/imx6dl-hummingboard.dts
+++ b/arch/arm/boot/dts/imx6dl-hummingboard.dts
@@ -143,6 +143,14 @@
143 fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>; 143 fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>;
144 }; 144 };
145 145
146 pinctrl_hummingboard_usbotg_id: hummingboard-usbotg-id {
147 /*
148 * Similar to pinctrl_usbotg_2, but we want it
149 * pulled down for a fixed host connection.
150 */
151 fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
152 };
153
146 pinctrl_hummingboard_usbotg_vbus: hummingboard-usbotg-vbus { 154 pinctrl_hummingboard_usbotg_vbus: hummingboard-usbotg-vbus {
147 fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>; 155 fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>;
148 }; 156 };
@@ -178,6 +186,8 @@
178}; 186};
179 187
180&usbotg { 188&usbotg {
189 pinctrl-names = "default";
190 pinctrl-0 = <&pinctrl_hummingboard_usbotg_id>;
181 vbus-supply = <&reg_usbotg_vbus>; 191 vbus-supply = <&reg_usbotg_vbus>;
182 status = "okay"; 192 status = "okay";
183}; 193};
diff --git a/arch/arm/boot/dts/imx6q-gw51xx.dts b/arch/arm/boot/dts/imx6q-gw51xx.dts
index af4929aee075..0e1406e58eff 100644
--- a/arch/arm/boot/dts/imx6q-gw51xx.dts
+++ b/arch/arm/boot/dts/imx6q-gw51xx.dts
@@ -11,7 +11,7 @@
11 11
12/dts-v1/; 12/dts-v1/;
13#include "imx6q.dtsi" 13#include "imx6q.dtsi"
14#include "imx6qdl-gw54xx.dtsi" 14#include "imx6qdl-gw51xx.dtsi"
15 15
16/ { 16/ {
17 model = "Gateworks Ventana i.MX6 Quad GW51XX"; 17 model = "Gateworks Ventana i.MX6 Quad GW51XX";
diff --git a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
index 25da82a03110..e8e781656b3f 100644
--- a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
@@ -12,6 +12,19 @@
12 pinctrl-0 = <&pinctrl_cubox_i_ir>; 12 pinctrl-0 = <&pinctrl_cubox_i_ir>;
13 }; 13 };
14 14
15 pwmleds {
16 compatible = "pwm-leds";
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_cubox_i_pwm1>;
19
20 front {
21 active-low;
22 label = "imx6:red:front";
23 max-brightness = <248>;
24 pwms = <&pwm1 0 50000>;
25 };
26 };
27
15 regulators { 28 regulators {
16 compatible = "simple-bus"; 29 compatible = "simple-bus";
17 30
@@ -109,6 +122,10 @@
109 >; 122 >;
110 }; 123 };
111 124
125 pinctrl_cubox_i_pwm1: cubox-i-pwm1-front-led {
126 fsl,pins = <MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0>;
127 };
128
112 pinctrl_cubox_i_spdif: cubox-i-spdif { 129 pinctrl_cubox_i_spdif: cubox-i-spdif {
113 fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>; 130 fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>;
114 }; 131 };
@@ -117,6 +134,14 @@
117 fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x4001b0b0>; 134 fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x4001b0b0>;
118 }; 135 };
119 136
137 pinctrl_cubox_i_usbotg_id: cubox-i-usbotg-id {
138 /*
139 * The Cubox-i pulls this low, but as it's pointless
140 * leaving it as a pull-up, even if it is just 10uA.
141 */
142 fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
143 };
144
120 pinctrl_cubox_i_usbotg_vbus: cubox-i-usbotg-vbus { 145 pinctrl_cubox_i_usbotg_vbus: cubox-i-usbotg-vbus {
121 fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x4001b0b0>; 146 fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x4001b0b0>;
122 }; 147 };
@@ -153,6 +178,8 @@
153}; 178};
154 179
155&usbotg { 180&usbotg {
181 pinctrl-names = "default";
182 pinctrl-0 = <&pinctrl_cubox_i_usbotg_id>;
156 vbus-supply = <&reg_usbotg_vbus>; 183 vbus-supply = <&reg_usbotg_vbus>;
157 status = "okay"; 184 status = "okay";
158}; 185};
diff --git a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
index 31665adcbf39..0db15af41cb1 100644
--- a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
@@ -161,7 +161,7 @@
161 status = "okay"; 161 status = "okay";
162 162
163 pmic: ltc3676@3c { 163 pmic: ltc3676@3c {
164 compatible = "ltc,ltc3676"; 164 compatible = "lltc,ltc3676";
165 reg = <0x3c>; 165 reg = <0x3c>;
166 166
167 regulators { 167 regulators {
diff --git a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
index 367af3ec9435..744c8a2d81f6 100644
--- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
@@ -220,7 +220,7 @@
220 }; 220 };
221 221
222 pmic: ltc3676@3c { 222 pmic: ltc3676@3c {
223 compatible = "ltc,ltc3676"; 223 compatible = "lltc,ltc3676";
224 reg = <0x3c>; 224 reg = <0x3c>;
225 225
226 regulators { 226 regulators {
@@ -288,7 +288,7 @@
288 codec: sgtl5000@0a { 288 codec: sgtl5000@0a {
289 compatible = "fsl,sgtl5000"; 289 compatible = "fsl,sgtl5000";
290 reg = <0x0a>; 290 reg = <0x0a>;
291 clocks = <&clks 169>; 291 clocks = <&clks 201>;
292 VDDA-supply = <&reg_1p8v>; 292 VDDA-supply = <&reg_1p8v>;
293 VDDIO-supply = <&reg_3p3v>; 293 VDDIO-supply = <&reg_3p3v>;
294 }; 294 };
diff --git a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
index c91b5a6c769b..adf150c1be90 100644
--- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
@@ -234,7 +234,7 @@
234 }; 234 };
235 235
236 pmic: ltc3676@3c { 236 pmic: ltc3676@3c {
237 compatible = "ltc,ltc3676"; 237 compatible = "lltc,ltc3676";
238 reg = <0x3c>; 238 reg = <0x3c>;
239 239
240 regulators { 240 regulators {
diff --git a/arch/arm/boot/dts/imx6qdl-microsom.dtsi b/arch/arm/boot/dts/imx6qdl-microsom.dtsi
index d729d0b15f25..79eac6849d4c 100644
--- a/arch/arm/boot/dts/imx6qdl-microsom.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-microsom.dtsi
@@ -10,14 +10,6 @@
10 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 10 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
11 >; 11 >;
12 }; 12 };
13
14 pinctrl_microsom_usbotg: microsom-usbotg {
15 /*
16 * Similar to pinctrl_usbotg_2, but we want it
17 * pulled down for a fixed host connection.
18 */
19 fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
20 };
21 }; 13 };
22}; 14};
23 15
@@ -26,8 +18,3 @@
26 pinctrl-0 = <&pinctrl_microsom_uart1>; 18 pinctrl-0 = <&pinctrl_microsom_uart1>;
27 status = "okay"; 19 status = "okay";
28}; 20};
29
30&usbotg {
31 pinctrl-names = "default";
32 pinctrl-0 = <&pinctrl_microsom_usbotg>;
33};
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 2d4e5285f3f3..57d4abe03a94 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -686,7 +686,7 @@
686 compatible = "fsl,imx6sl-fec", "fsl,imx25-fec"; 686 compatible = "fsl,imx6sl-fec", "fsl,imx25-fec";
687 reg = <0x02188000 0x4000>; 687 reg = <0x02188000 0x4000>;
688 interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>; 688 interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>;
689 clocks = <&clks IMX6SL_CLK_ENET_REF>, 689 clocks = <&clks IMX6SL_CLK_ENET>,
690 <&clks IMX6SL_CLK_ENET_REF>; 690 <&clks IMX6SL_CLK_ENET_REF>;
691 clock-names = "ipg", "ahb"; 691 clock-names = "ipg", "ahb";
692 status = "disabled"; 692 status = "disabled";
diff --git a/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts b/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts
index c5a1fc75c7a3..b2d9834bf458 100644
--- a/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts
+++ b/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts
@@ -105,7 +105,6 @@
105 compatible = "ethernet-phy-id0141.0cb0", 105 compatible = "ethernet-phy-id0141.0cb0",
106 "ethernet-phy-ieee802.3-c22"; 106 "ethernet-phy-ieee802.3-c22";
107 reg = <0>; 107 reg = <0>;
108 phy-connection-type = "rgmii-id";
109 }; 108 };
110 109
111 ethphy1: ethernet-phy@1 { 110 ethphy1: ethernet-phy@1 {
@@ -113,7 +112,6 @@
113 compatible = "ethernet-phy-id0141.0cb0", 112 compatible = "ethernet-phy-id0141.0cb0",
114 "ethernet-phy-ieee802.3-c22"; 113 "ethernet-phy-ieee802.3-c22";
115 reg = <1>; 114 reg = <1>;
116 phy-connection-type = "rgmii-id";
117 }; 115 };
118}; 116};
119 117
@@ -121,6 +119,7 @@
121 status = "okay"; 119 status = "okay";
122 ethernet0-port@0 { 120 ethernet0-port@0 {
123 phy-handle = <&ethphy0>; 121 phy-handle = <&ethphy0>;
122 phy-connection-type = "rgmii-id";
124 }; 123 };
125}; 124};
126 125
@@ -128,5 +127,6 @@
128 status = "okay"; 127 status = "okay";
129 ethernet1-port@0 { 128 ethernet1-port@0 {
130 phy-handle = <&ethphy1>; 129 phy-handle = <&ethphy1>;
130 phy-connection-type = "rgmii-id";
131 }; 131 };
132}; 132};
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index cf0be662297e..1becefce821b 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -251,6 +251,11 @@
251 codec { 251 codec {
252 }; 252 };
253 }; 253 };
254
255 twl_power: power {
256 compatible = "ti,twl4030-power-beagleboard-xm", "ti,twl4030-power-idle-osc-off";
257 ti,use_poweroff;
258 };
254 }; 259 };
255}; 260};
256 261
@@ -301,6 +306,7 @@
301}; 306};
302 307
303&uart3 { 308&uart3 {
309 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
304 pinctrl-names = "default"; 310 pinctrl-names = "default";
305 pinctrl-0 = <&uart3_pins>; 311 pinctrl-0 = <&uart3_pins>;
306}; 312};
diff --git a/arch/arm/boot/dts/omap3-evm-common.dtsi b/arch/arm/boot/dts/omap3-evm-common.dtsi
index 8ae8f007c8ad..c8747c7f1cc8 100644
--- a/arch/arm/boot/dts/omap3-evm-common.dtsi
+++ b/arch/arm/boot/dts/omap3-evm-common.dtsi
@@ -50,6 +50,13 @@
50 gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>; 50 gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>;
51}; 51};
52 52
53&twl {
54 twl_power: power {
55 compatible = "ti,twl4030-power-omap3-evm", "ti,twl4030-power-idle";
56 ti,use_poweroff;
57 };
58};
59
53&i2c2 { 60&i2c2 {
54 clock-frequency = <400000>; 61 clock-frequency = <400000>;
55}; 62};
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index ae8ae3f4f9bf..1fe45d1f75ec 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -351,6 +351,11 @@
351 compatible = "ti,twl4030-audio"; 351 compatible = "ti,twl4030-audio";
352 ti,enable-vibra = <1>; 352 ti,enable-vibra = <1>;
353 }; 353 };
354
355 twl_power: power {
356 compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
357 ti,use_poweroff;
358 };
354}; 359};
355 360
356&twl_keypad { 361&twl_keypad {
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 3bfda16c8b52..a4ed54988866 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -45,7 +45,6 @@
45 45
46 operating-points = < 46 operating-points = <
47 /* kHz uV */ 47 /* kHz uV */
48 500000 880000
49 1000000 1060000 48 1000000 1060000
50 1500000 1250000 49 1500000 1250000
51 >; 50 >;
diff --git a/arch/arm/boot/dts/stih415.dtsi b/arch/arm/boot/dts/stih415.dtsi
index d6f254f302fe..a0f6f75fe3b5 100644
--- a/arch/arm/boot/dts/stih415.dtsi
+++ b/arch/arm/boot/dts/stih415.dtsi
@@ -169,8 +169,8 @@
169 169
170 pinctrl-names = "default"; 170 pinctrl-names = "default";
171 pinctrl-0 = <&pinctrl_mii0>; 171 pinctrl-0 = <&pinctrl_mii0>;
172 clock-names = "stmmaceth"; 172 clock-names = "stmmaceth", "sti-ethclk";
173 clocks = <&clk_s_a1_ls CLK_GMAC0_PHY>; 173 clocks = <&clk_s_a1_ls CLK_ICN_IF_2>, <&clk_s_a1_ls CLK_GMAC0_PHY>;
174 }; 174 };
175 175
176 ethernet1: dwmac@fef08000 { 176 ethernet1: dwmac@fef08000 {
@@ -192,8 +192,8 @@
192 reset-names = "stmmaceth"; 192 reset-names = "stmmaceth";
193 pinctrl-names = "default"; 193 pinctrl-names = "default";
194 pinctrl-0 = <&pinctrl_mii1>; 194 pinctrl-0 = <&pinctrl_mii1>;
195 clock-names = "stmmaceth"; 195 clock-names = "stmmaceth", "sti-ethclk";
196 clocks = <&clk_s_a0_ls CLK_ETH1_PHY>; 196 clocks = <&clk_s_a0_ls CLK_ICN_REG>, <&clk_s_a0_ls CLK_ETH1_PHY>;
197 }; 197 };
198 198
199 rc: rc@fe518000 { 199 rc: rc@fe518000 {
diff --git a/arch/arm/boot/dts/stih416-b2020-revE.dts b/arch/arm/boot/dts/stih416-b2020e.dts
index ba0fa2caaf18..ba0fa2caaf18 100644
--- a/arch/arm/boot/dts/stih416-b2020-revE.dts
+++ b/arch/arm/boot/dts/stih416-b2020e.dts
diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi
index 06473c5d9ea9..84758d76d064 100644
--- a/arch/arm/boot/dts/stih416.dtsi
+++ b/arch/arm/boot/dts/stih416.dtsi
@@ -175,8 +175,8 @@
175 reset-names = "stmmaceth"; 175 reset-names = "stmmaceth";
176 pinctrl-names = "default"; 176 pinctrl-names = "default";
177 pinctrl-0 = <&pinctrl_mii0>; 177 pinctrl-0 = <&pinctrl_mii0>;
178 clock-names = "stmmaceth"; 178 clock-names = "stmmaceth", "sti-ethclk";
179 clocks = <&clk_s_a1_ls CLK_GMAC0_PHY>; 179 clocks = <&clk_s_a1_ls CLK_ICN_IF_2>, <&clk_s_a1_ls CLK_GMAC0_PHY>;
180 }; 180 };
181 181
182 ethernet1: dwmac@fef08000 { 182 ethernet1: dwmac@fef08000 {
@@ -197,8 +197,8 @@
197 reset-names = "stmmaceth"; 197 reset-names = "stmmaceth";
198 pinctrl-names = "default"; 198 pinctrl-names = "default";
199 pinctrl-0 = <&pinctrl_mii1>; 199 pinctrl-0 = <&pinctrl_mii1>;
200 clock-names = "stmmaceth"; 200 clock-names = "stmmaceth", "sti-ethclk";
201 clocks = <&clk_s_a0_ls CLK_ETH1_PHY>; 201 clocks = <&clk_s_a0_ls CLK_ICN_REG>, <&clk_s_a0_ls CLK_ETH1_PHY>;
202 }; 202 };
203 203
204 rc: rc@fe518000 { 204 rc: rc@fe518000 {
diff --git a/arch/arm/common/scoop.c b/arch/arm/common/scoop.c
index 6ef146edd0cd..a20fa80776d3 100644
--- a/arch/arm/common/scoop.c
+++ b/arch/arm/common/scoop.c
@@ -182,7 +182,6 @@ static int scoop_probe(struct platform_device *pdev)
182 struct scoop_config *inf; 182 struct scoop_config *inf;
183 struct resource *mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 183 struct resource *mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
184 int ret; 184 int ret;
185 int temp;
186 185
187 if (!mem) 186 if (!mem)
188 return -EINVAL; 187 return -EINVAL;
diff --git a/arch/arm/configs/bcm_defconfig b/arch/arm/configs/bcm_defconfig
index 9d13dae99125..4bf72264b175 100644
--- a/arch/arm/configs/bcm_defconfig
+++ b/arch/arm/configs/bcm_defconfig
@@ -94,10 +94,10 @@ CONFIG_BACKLIGHT_CLASS_DEVICE=y
94CONFIG_BACKLIGHT_PWM=y 94CONFIG_BACKLIGHT_PWM=y
95# CONFIG_USB_SUPPORT is not set 95# CONFIG_USB_SUPPORT is not set
96CONFIG_MMC=y 96CONFIG_MMC=y
97CONFIG_MMC_UNSAFE_RESUME=y
98CONFIG_MMC_BLOCK_MINORS=32 97CONFIG_MMC_BLOCK_MINORS=32
99CONFIG_MMC_TEST=y 98CONFIG_MMC_TEST=y
100CONFIG_MMC_SDHCI=y 99CONFIG_MMC_SDHCI=y
100CONFIG_MMC_SDHCI_PLTFM=y
101CONFIG_MMC_SDHCI_BCM_KONA=y 101CONFIG_MMC_SDHCI_BCM_KONA=y
102CONFIG_NEW_LEDS=y 102CONFIG_NEW_LEDS=y
103CONFIG_LEDS_CLASS=y 103CONFIG_LEDS_CLASS=y
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index ef8815327e5b..59b7e45142d8 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -186,6 +186,7 @@ CONFIG_VIDEO_MX3=y
186CONFIG_V4L_MEM2MEM_DRIVERS=y 186CONFIG_V4L_MEM2MEM_DRIVERS=y
187CONFIG_VIDEO_CODA=y 187CONFIG_VIDEO_CODA=y
188CONFIG_SOC_CAMERA_OV2640=y 188CONFIG_SOC_CAMERA_OV2640=y
189CONFIG_IMX_IPUV3_CORE=y
189CONFIG_DRM=y 190CONFIG_DRM=y
190CONFIG_DRM_PANEL_SIMPLE=y 191CONFIG_DRM_PANEL_SIMPLE=y
191CONFIG_BACKLIGHT_LCD_SUPPORT=y 192CONFIG_BACKLIGHT_LCD_SUPPORT=y
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index e2d62048e198..534836497998 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -223,12 +223,12 @@ CONFIG_POWER_RESET_GPIO=y
223CONFIG_POWER_RESET_SUN6I=y 223CONFIG_POWER_RESET_SUN6I=y
224CONFIG_SENSORS_LM90=y 224CONFIG_SENSORS_LM90=y
225CONFIG_THERMAL=y 225CONFIG_THERMAL=y
226CONFIG_DOVE_THERMAL=y
227CONFIG_ARMADA_THERMAL=y 226CONFIG_ARMADA_THERMAL=y
228CONFIG_WATCHDOG=y 227CONFIG_WATCHDOG=y
229CONFIG_ORION_WATCHDOG=y 228CONFIG_ORION_WATCHDOG=y
230CONFIG_SUNXI_WATCHDOG=y 229CONFIG_SUNXI_WATCHDOG=y
231CONFIG_MFD_AS3722=y 230CONFIG_MFD_AS3722=y
231CONFIG_MFD_BCM590XX=y
232CONFIG_MFD_CROS_EC=y 232CONFIG_MFD_CROS_EC=y
233CONFIG_MFD_CROS_EC_SPI=y 233CONFIG_MFD_CROS_EC_SPI=y
234CONFIG_MFD_MAX8907=y 234CONFIG_MFD_MAX8907=y
@@ -240,6 +240,7 @@ CONFIG_MFD_TPS65910=y
240CONFIG_REGULATOR_VIRTUAL_CONSUMER=y 240CONFIG_REGULATOR_VIRTUAL_CONSUMER=y
241CONFIG_REGULATOR_AB8500=y 241CONFIG_REGULATOR_AB8500=y
242CONFIG_REGULATOR_AS3722=y 242CONFIG_REGULATOR_AS3722=y
243CONFIG_REGULATOR_BCM590XX=y
243CONFIG_REGULATOR_GPIO=y 244CONFIG_REGULATOR_GPIO=y
244CONFIG_REGULATOR_MAX8907=y 245CONFIG_REGULATOR_MAX8907=y
245CONFIG_REGULATOR_PALMAS=y 246CONFIG_REGULATOR_PALMAS=y
@@ -300,6 +301,7 @@ CONFIG_MMC=y
300CONFIG_MMC_BLOCK_MINORS=16 301CONFIG_MMC_BLOCK_MINORS=16
301CONFIG_MMC_ARMMMCI=y 302CONFIG_MMC_ARMMMCI=y
302CONFIG_MMC_SDHCI=y 303CONFIG_MMC_SDHCI=y
304CONFIG_MMC_SDHCI_PLTFM=y
303CONFIG_MMC_SDHCI_OF_ARASAN=y 305CONFIG_MMC_SDHCI_OF_ARASAN=y
304CONFIG_MMC_SDHCI_ESDHC_IMX=y 306CONFIG_MMC_SDHCI_ESDHC_IMX=y
305CONFIG_MMC_SDHCI_DOVE=y 307CONFIG_MMC_SDHCI_DOVE=y
@@ -352,6 +354,7 @@ CONFIG_MFD_NVEC=y
352CONFIG_KEYBOARD_NVEC=y 354CONFIG_KEYBOARD_NVEC=y
353CONFIG_SERIO_NVEC_PS2=y 355CONFIG_SERIO_NVEC_PS2=y
354CONFIG_NVEC_POWER=y 356CONFIG_NVEC_POWER=y
357CONFIG_QCOM_GSBI=y
355CONFIG_COMMON_CLK_QCOM=y 358CONFIG_COMMON_CLK_QCOM=y
356CONFIG_MSM_GCC_8660=y 359CONFIG_MSM_GCC_8660=y
357CONFIG_MSM_MMCC_8960=y 360CONFIG_MSM_MMCC_8960=y
diff --git a/arch/arm/configs/mvebu_v7_defconfig b/arch/arm/configs/mvebu_v7_defconfig
index e11170e37442..b0bfefa23902 100644
--- a/arch/arm/configs/mvebu_v7_defconfig
+++ b/arch/arm/configs/mvebu_v7_defconfig
@@ -14,6 +14,7 @@ CONFIG_MACH_ARMADA_370=y
14CONFIG_MACH_ARMADA_375=y 14CONFIG_MACH_ARMADA_375=y
15CONFIG_MACH_ARMADA_38X=y 15CONFIG_MACH_ARMADA_38X=y
16CONFIG_MACH_ARMADA_XP=y 16CONFIG_MACH_ARMADA_XP=y
17CONFIG_MACH_DOVE=y
17CONFIG_NEON=y 18CONFIG_NEON=y
18# CONFIG_CACHE_L2X0 is not set 19# CONFIG_CACHE_L2X0 is not set
19# CONFIG_SWP_EMULATE is not set 20# CONFIG_SWP_EMULATE is not set
@@ -52,6 +53,7 @@ CONFIG_INPUT_EVDEV=y
52CONFIG_KEYBOARD_GPIO=y 53CONFIG_KEYBOARD_GPIO=y
53CONFIG_SERIAL_8250=y 54CONFIG_SERIAL_8250=y
54CONFIG_SERIAL_8250_CONSOLE=y 55CONFIG_SERIAL_8250_CONSOLE=y
56CONFIG_SERIAL_OF_PLATFORM=y
55CONFIG_I2C=y 57CONFIG_I2C=y
56CONFIG_SPI=y 58CONFIG_SPI=y
57CONFIG_SPI_ORION=y 59CONFIG_SPI_ORION=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 59066cf0271a..536a137863cb 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -32,6 +32,7 @@ CONFIG_SOC_OMAP5=y
32CONFIG_SOC_AM33XX=y 32CONFIG_SOC_AM33XX=y
33CONFIG_SOC_AM43XX=y 33CONFIG_SOC_AM43XX=y
34CONFIG_SOC_DRA7XX=y 34CONFIG_SOC_DRA7XX=y
35CONFIG_CACHE_L2X0=y
35CONFIG_ARM_THUMBEE=y 36CONFIG_ARM_THUMBEE=y
36CONFIG_ARM_ERRATA_411920=y 37CONFIG_ARM_ERRATA_411920=y
37CONFIG_SMP=y 38CONFIG_SMP=y
diff --git a/arch/arm/include/asm/ftrace.h b/arch/arm/include/asm/ftrace.h
index eb577f4f5f70..39eb16b0066f 100644
--- a/arch/arm/include/asm/ftrace.h
+++ b/arch/arm/include/asm/ftrace.h
@@ -52,7 +52,7 @@ extern inline void *return_address(unsigned int level)
52 52
53#endif 53#endif
54 54
55#define ftrace_return_addr(n) return_address(n) 55#define ftrace_return_address(n) return_address(n)
56 56
57#endif /* ifndef __ASSEMBLY__ */ 57#endif /* ifndef __ASSEMBLY__ */
58 58
diff --git a/arch/arm/include/asm/mcpm.h b/arch/arm/include/asm/mcpm.h
index d9702eb0b02b..94060adba174 100644
--- a/arch/arm/include/asm/mcpm.h
+++ b/arch/arm/include/asm/mcpm.h
@@ -208,8 +208,6 @@ struct sync_struct {
208 struct mcpm_sync_struct clusters[MAX_NR_CLUSTERS]; 208 struct mcpm_sync_struct clusters[MAX_NR_CLUSTERS];
209}; 209};
210 210
211extern unsigned long sync_phys; /* physical address of *mcpm_sync */
212
213void __mcpm_cpu_going_down(unsigned int cpu, unsigned int cluster); 211void __mcpm_cpu_going_down(unsigned int cpu, unsigned int cluster);
214void __mcpm_cpu_down(unsigned int cpu, unsigned int cluster); 212void __mcpm_cpu_down(unsigned int cpu, unsigned int cluster);
215void __mcpm_outbound_leave_critical(unsigned int cluster, int state); 213void __mcpm_outbound_leave_critical(unsigned int cluster, int state);
diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h
index f989d7c22dc5..e4e4208a9130 100644
--- a/arch/arm/include/asm/thread_info.h
+++ b/arch/arm/include/asm/thread_info.h
@@ -114,8 +114,14 @@ static inline struct thread_info *current_thread_info(void)
114 ((unsigned long)(task_thread_info(tsk)->cpu_context.pc)) 114 ((unsigned long)(task_thread_info(tsk)->cpu_context.pc))
115#define thread_saved_sp(tsk) \ 115#define thread_saved_sp(tsk) \
116 ((unsigned long)(task_thread_info(tsk)->cpu_context.sp)) 116 ((unsigned long)(task_thread_info(tsk)->cpu_context.sp))
117
118#ifndef CONFIG_THUMB2_KERNEL
117#define thread_saved_fp(tsk) \ 119#define thread_saved_fp(tsk) \
118 ((unsigned long)(task_thread_info(tsk)->cpu_context.fp)) 120 ((unsigned long)(task_thread_info(tsk)->cpu_context.fp))
121#else
122#define thread_saved_fp(tsk) \
123 ((unsigned long)(task_thread_info(tsk)->cpu_context.r7))
124#endif
119 125
120extern void crunch_task_disable(struct thread_info *); 126extern void crunch_task_disable(struct thread_info *);
121extern void crunch_task_copy(struct thread_info *, void *); 127extern void crunch_task_copy(struct thread_info *, void *);
diff --git a/arch/arm/kernel/kprobes-test-arm.c b/arch/arm/kernel/kprobes-test-arm.c
index 9db4b659d03e..cb1424240ff6 100644
--- a/arch/arm/kernel/kprobes-test-arm.c
+++ b/arch/arm/kernel/kprobes-test-arm.c
@@ -74,8 +74,6 @@ void kprobe_arm_test_cases(void)
74 TEST_RRR( op "lt" s " r11, r",11,VAL1,", r",14,N(val),", asr r",7, 6,"")\ 74 TEST_RRR( op "lt" s " r11, r",11,VAL1,", r",14,N(val),", asr r",7, 6,"")\
75 TEST_RR( op "gt" s " r12, r13" ", r",14,val, ", ror r",14,7,"")\ 75 TEST_RR( op "gt" s " r12, r13" ", r",14,val, ", ror r",14,7,"")\
76 TEST_RR( op "le" s " r14, r",0, val, ", r13" ", lsl r",14,8,"")\ 76 TEST_RR( op "le" s " r14, r",0, val, ", r13" ", lsl r",14,8,"")\
77 TEST_RR( op s " r12, pc" ", r",14,val, ", ror r",14,7,"")\
78 TEST_RR( op s " r14, r",0, val, ", pc" ", lsl r",14,8,"")\
79 TEST_R( op "eq" s " r0, r",11,VAL1,", #0xf5") \ 77 TEST_R( op "eq" s " r0, r",11,VAL1,", #0xf5") \
80 TEST_R( op "ne" s " r11, r",0, VAL1,", #0xf5000000") \ 78 TEST_R( op "ne" s " r11, r",0, VAL1,", #0xf5000000") \
81 TEST_R( op s " r7, r",8, VAL2,", #0x000af000") \ 79 TEST_R( op s " r7, r",8, VAL2,", #0x000af000") \
@@ -103,8 +101,6 @@ void kprobe_arm_test_cases(void)
103 TEST_RRR( op "ge r",11,VAL1,", r",14,N(val),", asr r",7, 6,"") \ 101 TEST_RRR( op "ge r",11,VAL1,", r",14,N(val),", asr r",7, 6,"") \
104 TEST_RR( op "le r13" ", r",14,val, ", ror r",14,7,"") \ 102 TEST_RR( op "le r13" ", r",14,val, ", ror r",14,7,"") \
105 TEST_RR( op "gt r",0, val, ", r13" ", lsl r",14,8,"") \ 103 TEST_RR( op "gt r",0, val, ", r13" ", lsl r",14,8,"") \
106 TEST_RR( op " pc" ", r",14,val, ", ror r",14,7,"") \
107 TEST_RR( op " r",0, val, ", pc" ", lsl r",14,8,"") \
108 TEST_R( op "eq r",11,VAL1,", #0xf5") \ 104 TEST_R( op "eq r",11,VAL1,", #0xf5") \
109 TEST_R( op "ne r",0, VAL1,", #0xf5000000") \ 105 TEST_R( op "ne r",0, VAL1,", #0xf5000000") \
110 TEST_R( op " r",8, VAL2,", #0x000af000") 106 TEST_R( op " r",8, VAL2,", #0x000af000")
@@ -125,7 +121,6 @@ void kprobe_arm_test_cases(void)
125 TEST_RR( op "ge" s " r11, r",11,N(val),", asr r",7, 6,"") \ 121 TEST_RR( op "ge" s " r11, r",11,N(val),", asr r",7, 6,"") \
126 TEST_RR( op "lt" s " r12, r",11,val, ", ror r",14,7,"") \ 122 TEST_RR( op "lt" s " r12, r",11,val, ", ror r",14,7,"") \
127 TEST_R( op "gt" s " r14, r13" ", lsl r",14,8,"") \ 123 TEST_R( op "gt" s " r14, r13" ", lsl r",14,8,"") \
128 TEST_R( op "le" s " r14, pc" ", lsl r",14,8,"") \
129 TEST( op "eq" s " r0, #0xf5") \ 124 TEST( op "eq" s " r0, #0xf5") \
130 TEST( op "ne" s " r11, #0xf5000000") \ 125 TEST( op "ne" s " r11, #0xf5000000") \
131 TEST( op s " r7, #0x000af000") \ 126 TEST( op s " r7, #0x000af000") \
@@ -159,12 +154,19 @@ void kprobe_arm_test_cases(void)
159 TEST_SUPPORTED("cmp pc, #0x1000"); 154 TEST_SUPPORTED("cmp pc, #0x1000");
160 TEST_SUPPORTED("cmp sp, #0x1000"); 155 TEST_SUPPORTED("cmp sp, #0x1000");
161 156
162 /* Data-processing with PC as shift*/ 157 /* Data-processing with PC and a shift count in a register */
163 TEST_UNSUPPORTED(__inst_arm(0xe15c0f1e) " @ cmp r12, r14, asl pc") 158 TEST_UNSUPPORTED(__inst_arm(0xe15c0f1e) " @ cmp r12, r14, asl pc")
164 TEST_UNSUPPORTED(__inst_arm(0xe1a0cf1e) " @ mov r12, r14, asl pc") 159 TEST_UNSUPPORTED(__inst_arm(0xe1a0cf1e) " @ mov r12, r14, asl pc")
165 TEST_UNSUPPORTED(__inst_arm(0xe08caf1e) " @ add r10, r12, r14, asl pc") 160 TEST_UNSUPPORTED(__inst_arm(0xe08caf1e) " @ add r10, r12, r14, asl pc")
166 161 TEST_UNSUPPORTED(__inst_arm(0xe151021f) " @ cmp r1, pc, lsl r2")
167 /* Data-processing with PC as shift*/ 162 TEST_UNSUPPORTED(__inst_arm(0xe17f0211) " @ cmn pc, r1, lsl r2")
163 TEST_UNSUPPORTED(__inst_arm(0xe1a0121f) " @ mov r1, pc, lsl r2")
164 TEST_UNSUPPORTED(__inst_arm(0xe1a0f211) " @ mov pc, r1, lsl r2")
165 TEST_UNSUPPORTED(__inst_arm(0xe042131f) " @ sub r1, r2, pc, lsl r3")
166 TEST_UNSUPPORTED(__inst_arm(0xe1cf1312) " @ bic r1, pc, r2, lsl r3")
167 TEST_UNSUPPORTED(__inst_arm(0xe081f312) " @ add pc, r1, r2, lsl r3")
168
169 /* Data-processing with PC as a target and status registers updated */
168 TEST_UNSUPPORTED("movs pc, r1") 170 TEST_UNSUPPORTED("movs pc, r1")
169 TEST_UNSUPPORTED("movs pc, r1, lsl r2") 171 TEST_UNSUPPORTED("movs pc, r1, lsl r2")
170 TEST_UNSUPPORTED("movs pc, #0x10000") 172 TEST_UNSUPPORTED("movs pc, #0x10000")
@@ -187,14 +189,14 @@ void kprobe_arm_test_cases(void)
187 TEST_BF_R ("add pc, pc, r",14,2f-1f-8,"") 189 TEST_BF_R ("add pc, pc, r",14,2f-1f-8,"")
188 TEST_BF_R ("add pc, r",14,2f-1f-8,", pc") 190 TEST_BF_R ("add pc, r",14,2f-1f-8,", pc")
189 TEST_BF_R ("mov pc, r",0,2f,"") 191 TEST_BF_R ("mov pc, r",0,2f,"")
190 TEST_BF_RR("mov pc, r",0,2f,", asl r",1,0,"") 192 TEST_BF_R ("add pc, pc, r",14,(2f-1f-8)*2,", asr #1")
191 TEST_BB( "sub pc, pc, #1b-2b+8") 193 TEST_BB( "sub pc, pc, #1b-2b+8")
192#if __LINUX_ARM_ARCH__ == 6 && !defined(CONFIG_CPU_V7) 194#if __LINUX_ARM_ARCH__ == 6 && !defined(CONFIG_CPU_V7)
193 TEST_BB( "sub pc, pc, #1b-2b+8-2") /* UNPREDICTABLE before and after ARMv6 */ 195 TEST_BB( "sub pc, pc, #1b-2b+8-2") /* UNPREDICTABLE before and after ARMv6 */
194#endif 196#endif
195 TEST_BB_R( "sub pc, pc, r",14, 1f-2f+8,"") 197 TEST_BB_R( "sub pc, pc, r",14, 1f-2f+8,"")
196 TEST_BB_R( "rsb pc, r",14,1f-2f+8,", pc") 198 TEST_BB_R( "rsb pc, r",14,1f-2f+8,", pc")
197 TEST_RR( "add pc, pc, r",10,-2,", asl r",11,1,"") 199 TEST_R( "add pc, pc, r",10,-2,", asl #1")
198#ifdef CONFIG_THUMB2_KERNEL 200#ifdef CONFIG_THUMB2_KERNEL
199 TEST_ARM_TO_THUMB_INTERWORK_R("add pc, pc, r",0,3f-1f-8+1,"") 201 TEST_ARM_TO_THUMB_INTERWORK_R("add pc, pc, r",0,3f-1f-8+1,"")
200 TEST_ARM_TO_THUMB_INTERWORK_R("sub pc, r",0,3f+8+1,", #8") 202 TEST_ARM_TO_THUMB_INTERWORK_R("sub pc, r",0,3f+8+1,", #8")
@@ -216,6 +218,7 @@ void kprobe_arm_test_cases(void)
216 TEST_BB_R("bx r",7,2f,"") 218 TEST_BB_R("bx r",7,2f,"")
217 TEST_BF_R("bxeq r",14,2f,"") 219 TEST_BF_R("bxeq r",14,2f,"")
218 220
221#if __LINUX_ARM_ARCH__ >= 5
219 TEST_R("clz r0, r",0, 0x0,"") 222 TEST_R("clz r0, r",0, 0x0,"")
220 TEST_R("clzeq r7, r",14,0x1,"") 223 TEST_R("clzeq r7, r",14,0x1,"")
221 TEST_R("clz lr, r",7, 0xffffffff,"") 224 TEST_R("clz lr, r",7, 0xffffffff,"")
@@ -337,6 +340,7 @@ void kprobe_arm_test_cases(void)
337 TEST_UNSUPPORTED(__inst_arm(0xe16f02e1) " @ smultt pc, r1, r2") 340 TEST_UNSUPPORTED(__inst_arm(0xe16f02e1) " @ smultt pc, r1, r2")
338 TEST_UNSUPPORTED(__inst_arm(0xe16002ef) " @ smultt r0, pc, r2") 341 TEST_UNSUPPORTED(__inst_arm(0xe16002ef) " @ smultt r0, pc, r2")
339 TEST_UNSUPPORTED(__inst_arm(0xe1600fe1) " @ smultt r0, r1, pc") 342 TEST_UNSUPPORTED(__inst_arm(0xe1600fe1) " @ smultt r0, r1, pc")
343#endif
340 344
341 TEST_GROUP("Multiply and multiply-accumulate") 345 TEST_GROUP("Multiply and multiply-accumulate")
342 346
@@ -559,6 +563,7 @@ void kprobe_arm_test_cases(void)
559 TEST_UNSUPPORTED("ldrsht r1, [r2], #48") 563 TEST_UNSUPPORTED("ldrsht r1, [r2], #48")
560#endif 564#endif
561 565
566#if __LINUX_ARM_ARCH__ >= 5
562 TEST_RPR( "strd r",0, VAL1,", [r",1, 48,", -r",2,24,"]") 567 TEST_RPR( "strd r",0, VAL1,", [r",1, 48,", -r",2,24,"]")
563 TEST_RPR( "strccd r",8, VAL2,", [r",13,0, ", r",12,48,"]") 568 TEST_RPR( "strccd r",8, VAL2,", [r",13,0, ", r",12,48,"]")
564 TEST_RPR( "strd r",4, VAL1,", [r",2, 24,", r",3, 48,"]!") 569 TEST_RPR( "strd r",4, VAL1,", [r",2, 24,", r",3, 48,"]!")
@@ -595,6 +600,7 @@ void kprobe_arm_test_cases(void)
595 TEST_UNSUPPORTED(__inst_arm(0xe1efc3d0) " @ ldrd r12, [pc, #48]!") 600 TEST_UNSUPPORTED(__inst_arm(0xe1efc3d0) " @ ldrd r12, [pc, #48]!")
596 TEST_UNSUPPORTED(__inst_arm(0xe0c9f3d0) " @ ldrd pc, [r9], #48") 601 TEST_UNSUPPORTED(__inst_arm(0xe0c9f3d0) " @ ldrd pc, [r9], #48")
597 TEST_UNSUPPORTED(__inst_arm(0xe0c9e3d0) " @ ldrd lr, [r9], #48") 602 TEST_UNSUPPORTED(__inst_arm(0xe0c9e3d0) " @ ldrd lr, [r9], #48")
603#endif
598 604
599 TEST_GROUP("Miscellaneous") 605 TEST_GROUP("Miscellaneous")
600 606
@@ -1227,7 +1233,9 @@ void kprobe_arm_test_cases(void)
1227 TEST_COPROCESSOR( "mrc"two" 0, 0, r0, cr0, cr0, 0") 1233 TEST_COPROCESSOR( "mrc"two" 0, 0, r0, cr0, cr0, 0")
1228 1234
1229 COPROCESSOR_INSTRUCTIONS_ST_LD("",e) 1235 COPROCESSOR_INSTRUCTIONS_ST_LD("",e)
1236#if __LINUX_ARM_ARCH__ >= 5
1230 COPROCESSOR_INSTRUCTIONS_MC_MR("",e) 1237 COPROCESSOR_INSTRUCTIONS_MC_MR("",e)
1238#endif
1231 TEST_UNSUPPORTED("svc 0") 1239 TEST_UNSUPPORTED("svc 0")
1232 TEST_UNSUPPORTED("svc 0xffffff") 1240 TEST_UNSUPPORTED("svc 0xffffff")
1233 1241
@@ -1287,7 +1295,9 @@ void kprobe_arm_test_cases(void)
1287 TEST( "blx __dummy_thumb_subroutine_odd") 1295 TEST( "blx __dummy_thumb_subroutine_odd")
1288#endif /* __LINUX_ARM_ARCH__ >= 6 */ 1296#endif /* __LINUX_ARM_ARCH__ >= 6 */
1289 1297
1298#if __LINUX_ARM_ARCH__ >= 5
1290 COPROCESSOR_INSTRUCTIONS_ST_LD("2",f) 1299 COPROCESSOR_INSTRUCTIONS_ST_LD("2",f)
1300#endif
1291#if __LINUX_ARM_ARCH__ >= 6 1301#if __LINUX_ARM_ARCH__ >= 6
1292 COPROCESSOR_INSTRUCTIONS_MC_MR("2",f) 1302 COPROCESSOR_INSTRUCTIONS_MC_MR("2",f)
1293#endif 1303#endif
diff --git a/arch/arm/kernel/kprobes-test.c b/arch/arm/kernel/kprobes-test.c
index 379639998d5a..08d731294bcd 100644
--- a/arch/arm/kernel/kprobes-test.c
+++ b/arch/arm/kernel/kprobes-test.c
@@ -225,6 +225,7 @@ static int pre_handler_called;
225static int post_handler_called; 225static int post_handler_called;
226static int jprobe_func_called; 226static int jprobe_func_called;
227static int kretprobe_handler_called; 227static int kretprobe_handler_called;
228static int tests_failed;
228 229
229#define FUNC_ARG1 0x12345678 230#define FUNC_ARG1 0x12345678
230#define FUNC_ARG2 0xabcdef 231#define FUNC_ARG2 0xabcdef
@@ -461,6 +462,13 @@ static int run_api_tests(long (*func)(long, long))
461 462
462 pr_info(" jprobe\n"); 463 pr_info(" jprobe\n");
463 ret = test_jprobe(func); 464 ret = test_jprobe(func);
465#if defined(CONFIG_THUMB2_KERNEL) && !defined(MODULE)
466 if (ret == -EINVAL) {
467 pr_err("FAIL: Known longtime bug with jprobe on Thumb kernels\n");
468 tests_failed = ret;
469 ret = 0;
470 }
471#endif
464 if (ret < 0) 472 if (ret < 0)
465 return ret; 473 return ret;
466 474
@@ -1672,6 +1680,8 @@ static int __init run_all_tests(void)
1672 1680
1673out: 1681out:
1674 if (ret == 0) 1682 if (ret == 0)
1683 ret = tests_failed;
1684 if (ret == 0)
1675 pr_info("Finished kprobe tests OK\n"); 1685 pr_info("Finished kprobe tests OK\n");
1676 else 1686 else
1677 pr_err("kprobe tests failed\n"); 1687 pr_err("kprobe tests failed\n");
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 2037f7205987..1d37568c547a 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -1924,7 +1924,7 @@ static int krait_pmu_get_event_idx(struct pmu_hw_events *cpuc,
1924 struct perf_event *event) 1924 struct perf_event *event)
1925{ 1925{
1926 int idx; 1926 int idx;
1927 int bit; 1927 int bit = -1;
1928 unsigned int prefix; 1928 unsigned int prefix;
1929 unsigned int region; 1929 unsigned int region;
1930 unsigned int code; 1930 unsigned int code;
@@ -1953,7 +1953,7 @@ static int krait_pmu_get_event_idx(struct pmu_hw_events *cpuc,
1953 } 1953 }
1954 1954
1955 idx = armv7pmu_get_event_idx(cpuc, event); 1955 idx = armv7pmu_get_event_idx(cpuc, event);
1956 if (idx < 0 && krait_event) 1956 if (idx < 0 && bit >= 0)
1957 clear_bit(bit, cpuc->used_mask); 1957 clear_bit(bit, cpuc->used_mask);
1958 1958
1959 return idx; 1959 return idx;
diff --git a/arch/arm/kernel/probes-arm.c b/arch/arm/kernel/probes-arm.c
index 51a13a027989..8eaef81d8344 100644
--- a/arch/arm/kernel/probes-arm.c
+++ b/arch/arm/kernel/probes-arm.c
@@ -341,12 +341,12 @@ static const union decode_item arm_cccc_000x_table[] = {
341 /* CMP (reg-shift reg) cccc 0001 0101 xxxx xxxx xxxx 0xx1 xxxx */ 341 /* CMP (reg-shift reg) cccc 0001 0101 xxxx xxxx xxxx 0xx1 xxxx */
342 /* CMN (reg-shift reg) cccc 0001 0111 xxxx xxxx xxxx 0xx1 xxxx */ 342 /* CMN (reg-shift reg) cccc 0001 0111 xxxx xxxx xxxx 0xx1 xxxx */
343 DECODE_EMULATEX (0x0f900090, 0x01100010, PROBES_DATA_PROCESSING_REG, 343 DECODE_EMULATEX (0x0f900090, 0x01100010, PROBES_DATA_PROCESSING_REG,
344 REGS(ANY, 0, NOPC, 0, ANY)), 344 REGS(NOPC, 0, NOPC, 0, NOPC)),
345 345
346 /* MOV (reg-shift reg) cccc 0001 101x xxxx xxxx xxxx 0xx1 xxxx */ 346 /* MOV (reg-shift reg) cccc 0001 101x xxxx xxxx xxxx 0xx1 xxxx */
347 /* MVN (reg-shift reg) cccc 0001 111x xxxx xxxx xxxx 0xx1 xxxx */ 347 /* MVN (reg-shift reg) cccc 0001 111x xxxx xxxx xxxx 0xx1 xxxx */
348 DECODE_EMULATEX (0x0fa00090, 0x01a00010, PROBES_DATA_PROCESSING_REG, 348 DECODE_EMULATEX (0x0fa00090, 0x01a00010, PROBES_DATA_PROCESSING_REG,
349 REGS(0, ANY, NOPC, 0, ANY)), 349 REGS(0, NOPC, NOPC, 0, NOPC)),
350 350
351 /* AND (reg-shift reg) cccc 0000 000x xxxx xxxx xxxx 0xx1 xxxx */ 351 /* AND (reg-shift reg) cccc 0000 000x xxxx xxxx xxxx 0xx1 xxxx */
352 /* EOR (reg-shift reg) cccc 0000 001x xxxx xxxx xxxx 0xx1 xxxx */ 352 /* EOR (reg-shift reg) cccc 0000 001x xxxx xxxx xxxx 0xx1 xxxx */
@@ -359,7 +359,7 @@ static const union decode_item arm_cccc_000x_table[] = {
359 /* ORR (reg-shift reg) cccc 0001 100x xxxx xxxx xxxx 0xx1 xxxx */ 359 /* ORR (reg-shift reg) cccc 0001 100x xxxx xxxx xxxx 0xx1 xxxx */
360 /* BIC (reg-shift reg) cccc 0001 110x xxxx xxxx xxxx 0xx1 xxxx */ 360 /* BIC (reg-shift reg) cccc 0001 110x xxxx xxxx xxxx 0xx1 xxxx */
361 DECODE_EMULATEX (0x0e000090, 0x00000010, PROBES_DATA_PROCESSING_REG, 361 DECODE_EMULATEX (0x0e000090, 0x00000010, PROBES_DATA_PROCESSING_REG,
362 REGS(ANY, ANY, NOPC, 0, ANY)), 362 REGS(NOPC, NOPC, NOPC, 0, NOPC)),
363 363
364 DECODE_END 364 DECODE_END
365}; 365};
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 0dd3b79b15c3..0c27ed6f3f23 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -908,7 +908,7 @@ enum ptrace_syscall_dir {
908 PTRACE_SYSCALL_EXIT, 908 PTRACE_SYSCALL_EXIT,
909}; 909};
910 910
911static int tracehook_report_syscall(struct pt_regs *regs, 911static void tracehook_report_syscall(struct pt_regs *regs,
912 enum ptrace_syscall_dir dir) 912 enum ptrace_syscall_dir dir)
913{ 913{
914 unsigned long ip; 914 unsigned long ip;
@@ -926,7 +926,6 @@ static int tracehook_report_syscall(struct pt_regs *regs,
926 current_thread_info()->syscall = -1; 926 current_thread_info()->syscall = -1;
927 927
928 regs->ARM_ip = ip; 928 regs->ARM_ip = ip;
929 return current_thread_info()->syscall;
930} 929}
931 930
932asmlinkage int syscall_trace_enter(struct pt_regs *regs, int scno) 931asmlinkage int syscall_trace_enter(struct pt_regs *regs, int scno)
@@ -938,7 +937,9 @@ asmlinkage int syscall_trace_enter(struct pt_regs *regs, int scno)
938 return -1; 937 return -1;
939 938
940 if (test_thread_flag(TIF_SYSCALL_TRACE)) 939 if (test_thread_flag(TIF_SYSCALL_TRACE))
941 scno = tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER); 940 tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER);
941
942 scno = current_thread_info()->syscall;
942 943
943 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT)) 944 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
944 trace_sys_enter(regs, scno); 945 trace_sys_enter(regs, scno);
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index 9bc6db1c1348..41c839167e87 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -1,10 +1,9 @@
1config ARCH_BCM 1menuconfig ARCH_BCM
2 bool "Broadcom SoC Support" if ARCH_MULTI_V6_V7 2 bool "Broadcom SoC Support" if ARCH_MULTI_V6_V7
3 help 3 help
4 This enables support for Broadcom ARM based SoC chips 4 This enables support for Broadcom ARM based SoC chips
5 5
6menu "Broadcom SoC Selection" 6if ARCH_BCM
7 depends on ARCH_BCM
8 7
9config ARCH_BCM_MOBILE 8config ARCH_BCM_MOBILE
10 bool "Broadcom Mobile SoC Support" if ARCH_MULTI_V7 9 bool "Broadcom Mobile SoC Support" if ARCH_MULTI_V7
@@ -88,4 +87,4 @@ config ARCH_BCM_5301X
88 different SoC or with the older BCM47XX and BCM53XX based 87 different SoC or with the older BCM47XX and BCM53XX based
89 network SoC using a MIPS CPU, they are supported by arch/mips/bcm47xx 88 network SoC using a MIPS CPU, they are supported by arch/mips/bcm47xx
90 89
91endmenu 90endif
diff --git a/arch/arm/mach-berlin/Kconfig b/arch/arm/mach-berlin/Kconfig
index 101e0f356730..2631cfc5ab0d 100644
--- a/arch/arm/mach-berlin/Kconfig
+++ b/arch/arm/mach-berlin/Kconfig
@@ -1,4 +1,4 @@
1config ARCH_BERLIN 1menuconfig ARCH_BERLIN
2 bool "Marvell Berlin SoCs" if ARCH_MULTI_V7 2 bool "Marvell Berlin SoCs" if ARCH_MULTI_V7
3 select ARCH_REQUIRE_GPIOLIB 3 select ARCH_REQUIRE_GPIOLIB
4 select ARM_GIC 4 select ARM_GIC
@@ -9,8 +9,6 @@ config ARCH_BERLIN
9 9
10if ARCH_BERLIN 10if ARCH_BERLIN
11 11
12menu "Marvell Berlin SoC variants"
13
14config MACH_BERLIN_BG2 12config MACH_BERLIN_BG2
15 bool "Marvell Armada 1500 (BG2)" 13 bool "Marvell Armada 1500 (BG2)"
16 select CACHE_L2X0 14 select CACHE_L2X0
@@ -30,6 +28,4 @@ config MACH_BERLIN_BG2Q
30 select HAVE_ARM_TWD if SMP 28 select HAVE_ARM_TWD if SMP
31 select PINCTRL_BERLIN_BG2Q 29 select PINCTRL_BERLIN_BG2Q
32 30
33endmenu
34
35endif 31endif
diff --git a/arch/arm/mach-cns3xxx/Kconfig b/arch/arm/mach-cns3xxx/Kconfig
index 66838f42037f..3c22a1990ecd 100644
--- a/arch/arm/mach-cns3xxx/Kconfig
+++ b/arch/arm/mach-cns3xxx/Kconfig
@@ -1,12 +1,11 @@
1config ARCH_CNS3XXX 1menuconfig ARCH_CNS3XXX
2 bool "Cavium Networks CNS3XXX family" if ARCH_MULTI_V6 2 bool "Cavium Networks CNS3XXX family" if ARCH_MULTI_V6
3 select ARM_GIC 3 select ARM_GIC
4 select PCI_DOMAINS if PCI 4 select PCI_DOMAINS if PCI
5 help 5 help
6 Support for Cavium Networks CNS3XXX platform. 6 Support for Cavium Networks CNS3XXX platform.
7 7
8menu "CNS3XXX platform type" 8if ARCH_CNS3XXX
9 depends on ARCH_CNS3XXX
10 9
11config MACH_CNS3420VB 10config MACH_CNS3420VB
12 bool "Support for CNS3420 Validation Board" 11 bool "Support for CNS3420 Validation Board"
@@ -17,4 +16,4 @@ config MACH_CNS3420VB
17 This is a platform with an on-board ARM11 MPCore and has support 16 This is a platform with an on-board ARM11 MPCore and has support
18 for USB, USB-OTG, MMC/SD/SDIO, SATA, PCI-E, etc. 17 for USB, USB-OTG, MMC/SD/SDIO, SATA, PCI-E, etc.
19 18
20endmenu 19endif
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index db18ef866593..584e8d4e2892 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -39,7 +39,6 @@ config ARCH_DAVINCI_DA830
39config ARCH_DAVINCI_DA850 39config ARCH_DAVINCI_DA850
40 bool "DA850/OMAP-L138/AM18x based system" 40 bool "DA850/OMAP-L138/AM18x based system"
41 select ARCH_DAVINCI_DA8XX 41 select ARCH_DAVINCI_DA8XX
42 select ARCH_HAS_CPUFREQ
43 select CP_INTC 42 select CP_INTC
44 43
45config ARCH_DAVINCI_DA8XX 44config ARCH_DAVINCI_DA8XX
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index d58995c9a95a..8f9b66c4ac78 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -7,10 +7,9 @@
7 7
8# Configuration options for the EXYNOS4 8# Configuration options for the EXYNOS4
9 9
10config ARCH_EXYNOS 10menuconfig ARCH_EXYNOS
11 bool "Samsung EXYNOS" if ARCH_MULTI_V7 11 bool "Samsung EXYNOS" if ARCH_MULTI_V7
12 select ARCH_HAS_BANDGAP 12 select ARCH_HAS_BANDGAP
13 select ARCH_HAS_CPUFREQ
14 select ARCH_HAS_HOLES_MEMORYMODEL 13 select ARCH_HAS_HOLES_MEMORYMODEL
15 select ARCH_REQUIRE_GPIOLIB 14 select ARCH_REQUIRE_GPIOLIB
16 select ARM_AMBA 15 select ARM_AMBA
@@ -30,8 +29,6 @@ config ARCH_EXYNOS
30 29
31if ARCH_EXYNOS 30if ARCH_EXYNOS
32 31
33menu "SAMSUNG EXYNOS SoCs Support"
34
35config ARCH_EXYNOS3 32config ARCH_EXYNOS3
36 bool "SAMSUNG EXYNOS3" 33 bool "SAMSUNG EXYNOS3"
37 select ARM_CPU_SUSPEND if PM 34 select ARM_CPU_SUSPEND if PM
@@ -118,8 +115,6 @@ config SOC_EXYNOS5800
118 default y 115 default y
119 depends on SOC_EXYNOS5420 116 depends on SOC_EXYNOS5420
120 117
121endmenu
122
123config EXYNOS5420_MCPM 118config EXYNOS5420_MCPM
124 bool "Exynos5420 Multi-Cluster PM support" 119 bool "Exynos5420 Multi-Cluster PM support"
125 depends on MCPM && SOC_EXYNOS5420 120 depends on MCPM && SOC_EXYNOS5420
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 16617bdb37a9..1ee91763fa7c 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -118,6 +118,7 @@ extern void __iomem *sysram_ns_base_addr;
118extern void __iomem *sysram_base_addr; 118extern void __iomem *sysram_base_addr;
119void exynos_init_io(void); 119void exynos_init_io(void);
120void exynos_restart(enum reboot_mode mode, const char *cmd); 120void exynos_restart(enum reboot_mode mode, const char *cmd);
121void exynos_sysram_init(void);
121void exynos_cpuidle_init(void); 122void exynos_cpuidle_init(void);
122void exynos_cpufreq_init(void); 123void exynos_cpufreq_init(void);
123void exynos_init_late(void); 124void exynos_init_late(void);
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 90aab4d75d08..46d893fcbe85 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -173,10 +173,8 @@ static struct platform_device exynos_cpuidle = {
173 173
174void __init exynos_cpuidle_init(void) 174void __init exynos_cpuidle_init(void)
175{ 175{
176 if (soc_is_exynos5440()) 176 if (soc_is_exynos4210() || soc_is_exynos5250())
177 return; 177 platform_device_register(&exynos_cpuidle);
178
179 platform_device_register(&exynos_cpuidle);
180} 178}
181 179
182void __init exynos_cpufreq_init(void) 180void __init exynos_cpufreq_init(void)
@@ -184,6 +182,28 @@ void __init exynos_cpufreq_init(void)
184 platform_device_register_simple("exynos-cpufreq", -1, NULL, 0); 182 platform_device_register_simple("exynos-cpufreq", -1, NULL, 0);
185} 183}
186 184
185void __iomem *sysram_base_addr;
186void __iomem *sysram_ns_base_addr;
187
188void __init exynos_sysram_init(void)
189{
190 struct device_node *node;
191
192 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") {
193 if (!of_device_is_available(node))
194 continue;
195 sysram_base_addr = of_iomap(node, 0);
196 break;
197 }
198
199 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") {
200 if (!of_device_is_available(node))
201 continue;
202 sysram_ns_base_addr = of_iomap(node, 0);
203 break;
204 }
205}
206
187void __init exynos_init_late(void) 207void __init exynos_init_late(void)
188{ 208{
189 if (of_machine_is_compatible("samsung,exynos5440")) 209 if (of_machine_is_compatible("samsung,exynos5440"))
@@ -198,7 +218,7 @@ static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
198 int depth, void *data) 218 int depth, void *data)
199{ 219{
200 struct map_desc iodesc; 220 struct map_desc iodesc;
201 __be32 *reg; 221 const __be32 *reg;
202 int len; 222 int len;
203 223
204 if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid") && 224 if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid") &&
@@ -271,6 +291,13 @@ static void __init exynos_dt_machine_init(void)
271 } 291 }
272 } 292 }
273 293
294 /*
295 * This is called from smp_prepare_cpus if we've built for SMP, but
296 * we still need to set it up for PM and firmware ops if not.
297 */
298 if (!IS_ENABLED(CONFIG_SMP))
299 exynos_sysram_init();
300
274 exynos_cpuidle_init(); 301 exynos_cpuidle_init();
275 exynos_cpufreq_init(); 302 exynos_cpufreq_init();
276 303
diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
index eb91d2350f8c..e8797bb78871 100644
--- a/arch/arm/mach-exynos/firmware.c
+++ b/arch/arm/mach-exynos/firmware.c
@@ -57,8 +57,13 @@ static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
57 57
58 boot_reg = sysram_ns_base_addr + 0x1c; 58 boot_reg = sysram_ns_base_addr + 0x1c;
59 59
60 if (!soc_is_exynos4212() && !soc_is_exynos3250()) 60 /*
61 boot_reg += 4*cpu; 61 * Almost all Exynos-series of SoCs that run in secure mode don't need
62 * additional offset for every CPU, with Exynos4412 being the only
63 * exception.
64 */
65 if (soc_is_exynos4412())
66 boot_reg += 4 * cpu;
62 67
63 __raw_writel(boot_addr, boot_reg); 68 __raw_writel(boot_addr, boot_reg);
64 return 0; 69 return 0;
diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
index 69fa48397394..8a134d019cb3 100644
--- a/arch/arm/mach-exynos/hotplug.c
+++ b/arch/arm/mach-exynos/hotplug.c
@@ -46,13 +46,7 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
46 if (cpu == 1) 46 if (cpu == 1)
47 exynos_cpu_power_down(cpu); 47 exynos_cpu_power_down(cpu);
48 48
49 /* 49 wfi();
50 * here's the WFI
51 */
52 asm(".word 0xe320f003\n"
53 :
54 :
55 : "memory", "cc");
56 50
57 if (pen_release == cpu_logical_map(cpu)) { 51 if (pen_release == cpu_logical_map(cpu)) {
58 /* 52 /*
diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c
index 0498d0b887ef..ace0ed617476 100644
--- a/arch/arm/mach-exynos/mcpm-exynos.c
+++ b/arch/arm/mach-exynos/mcpm-exynos.c
@@ -25,7 +25,6 @@
25 25
26#define EXYNOS5420_CPUS_PER_CLUSTER 4 26#define EXYNOS5420_CPUS_PER_CLUSTER 4
27#define EXYNOS5420_NR_CLUSTERS 2 27#define EXYNOS5420_NR_CLUSTERS 2
28#define MCPM_BOOT_ADDR_OFFSET 0x1c
29 28
30/* 29/*
31 * The common v7_exit_coherency_flush API could not be used because of the 30 * The common v7_exit_coherency_flush API could not be used because of the
@@ -343,11 +342,13 @@ static int __init exynos_mcpm_init(void)
343 pr_info("Exynos MCPM support installed\n"); 342 pr_info("Exynos MCPM support installed\n");
344 343
345 /* 344 /*
346 * Future entries into the kernel can now go 345 * U-Boot SPL is hardcoded to jump to the start of ns_sram_base_addr
347 * through the cluster entry vectors. 346 * as part of secondary_cpu_start(). Let's redirect it to the
347 * mcpm_entry_point().
348 */ 348 */
349 __raw_writel(virt_to_phys(mcpm_entry_point), 349 __raw_writel(0xe59f0000, ns_sram_base_addr); /* ldr r0, [pc, #0] */
350 ns_sram_base_addr + MCPM_BOOT_ADDR_OFFSET); 350 __raw_writel(0xe12fff10, ns_sram_base_addr + 4); /* bx r0 */
351 __raw_writel(virt_to_phys(mcpm_entry_point), ns_sram_base_addr + 8);
351 352
352 iounmap(ns_sram_base_addr); 353 iounmap(ns_sram_base_addr);
353 354
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index ec02422e8499..1c8d31e39520 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -32,28 +32,6 @@
32 32
33extern void exynos4_secondary_startup(void); 33extern void exynos4_secondary_startup(void);
34 34
35void __iomem *sysram_base_addr;
36void __iomem *sysram_ns_base_addr;
37
38static void __init exynos_smp_prepare_sysram(void)
39{
40 struct device_node *node;
41
42 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") {
43 if (!of_device_is_available(node))
44 continue;
45 sysram_base_addr = of_iomap(node, 0);
46 break;
47 }
48
49 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") {
50 if (!of_device_is_available(node))
51 continue;
52 sysram_ns_base_addr = of_iomap(node, 0);
53 break;
54 }
55}
56
57static inline void __iomem *cpu_boot_reg_base(void) 35static inline void __iomem *cpu_boot_reg_base(void)
58{ 36{
59 if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1) 37 if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
@@ -234,11 +212,11 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
234{ 212{
235 int i; 213 int i;
236 214
215 exynos_sysram_init();
216
237 if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9) 217 if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
238 scu_enable(scu_base_addr()); 218 scu_enable(scu_base_addr());
239 219
240 exynos_smp_prepare_sysram();
241
242 /* 220 /*
243 * Write the address of secondary startup into the 221 * Write the address of secondary startup into the
244 * system-wide flags register. The boot monitor waits 222 * system-wide flags register. The boot monitor waits
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 87c0d34c7fba..202ca73e49c4 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -300,7 +300,7 @@ static int exynos_pm_suspend(void)
300 tmp = (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0); 300 tmp = (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0);
301 __raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION); 301 __raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION);
302 302
303 if (!soc_is_exynos5250()) 303 if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
304 exynos_cpu_save_register(); 304 exynos_cpu_save_register();
305 305
306 return 0; 306 return 0;
@@ -334,7 +334,7 @@ static void exynos_pm_resume(void)
334 if (exynos_pm_central_resume()) 334 if (exynos_pm_central_resume())
335 goto early_wakeup; 335 goto early_wakeup;
336 336
337 if (!soc_is_exynos5250()) 337 if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
338 exynos_cpu_restore_register(); 338 exynos_cpu_restore_register();
339 339
340 /* For release retention */ 340 /* For release retention */
@@ -353,7 +353,7 @@ static void exynos_pm_resume(void)
353 353
354 s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save)); 354 s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save));
355 355
356 if (!soc_is_exynos5250()) 356 if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
357 scu_enable(S5P_VA_SCU); 357 scu_enable(S5P_VA_SCU);
358 358
359early_wakeup: 359early_wakeup:
@@ -440,15 +440,18 @@ static int exynos_cpu_pm_notifier(struct notifier_block *self,
440 case CPU_PM_ENTER: 440 case CPU_PM_ENTER:
441 if (cpu == 0) { 441 if (cpu == 0) {
442 exynos_pm_central_suspend(); 442 exynos_pm_central_suspend();
443 exynos_cpu_save_register(); 443 if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
444 exynos_cpu_save_register();
444 } 445 }
445 break; 446 break;
446 447
447 case CPU_PM_EXIT: 448 case CPU_PM_EXIT:
448 if (cpu == 0) { 449 if (cpu == 0) {
449 if (!soc_is_exynos5250()) 450 if (read_cpuid_part_number() ==
451 ARM_CPU_PART_CORTEX_A9) {
450 scu_enable(S5P_VA_SCU); 452 scu_enable(S5P_VA_SCU);
451 exynos_cpu_restore_register(); 453 exynos_cpu_restore_register();
454 }
452 exynos_pm_central_resume(); 455 exynos_pm_central_resume();
453 } 456 }
454 break; 457 break;
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
index fe6570ebbdde..797cb134bfff 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -17,6 +17,7 @@
17#include <linux/err.h> 17#include <linux/err.h>
18#include <linux/slab.h> 18#include <linux/slab.h>
19#include <linux/pm_domain.h> 19#include <linux/pm_domain.h>
20#include <linux/clk.h>
20#include <linux/delay.h> 21#include <linux/delay.h>
21#include <linux/of_address.h> 22#include <linux/of_address.h>
22#include <linux/of_platform.h> 23#include <linux/of_platform.h>
@@ -24,6 +25,8 @@
24 25
25#include "regs-pmu.h" 26#include "regs-pmu.h"
26 27
28#define MAX_CLK_PER_DOMAIN 4
29
27/* 30/*
28 * Exynos specific wrapper around the generic power domain 31 * Exynos specific wrapper around the generic power domain
29 */ 32 */
@@ -32,6 +35,9 @@ struct exynos_pm_domain {
32 char const *name; 35 char const *name;
33 bool is_off; 36 bool is_off;
34 struct generic_pm_domain pd; 37 struct generic_pm_domain pd;
38 struct clk *oscclk;
39 struct clk *clk[MAX_CLK_PER_DOMAIN];
40 struct clk *pclk[MAX_CLK_PER_DOMAIN];
35}; 41};
36 42
37static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on) 43static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on)
@@ -44,6 +50,19 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on)
44 pd = container_of(domain, struct exynos_pm_domain, pd); 50 pd = container_of(domain, struct exynos_pm_domain, pd);
45 base = pd->base; 51 base = pd->base;
46 52
53 /* Set oscclk before powering off a domain*/
54 if (!power_on) {
55 int i;
56
57 for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) {
58 if (IS_ERR(pd->clk[i]))
59 break;
60 if (clk_set_parent(pd->clk[i], pd->oscclk))
61 pr_err("%s: error setting oscclk as parent to clock %d\n",
62 pd->name, i);
63 }
64 }
65
47 pwr = power_on ? S5P_INT_LOCAL_PWR_EN : 0; 66 pwr = power_on ? S5P_INT_LOCAL_PWR_EN : 0;
48 __raw_writel(pwr, base); 67 __raw_writel(pwr, base);
49 68
@@ -60,6 +79,20 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on)
60 cpu_relax(); 79 cpu_relax();
61 usleep_range(80, 100); 80 usleep_range(80, 100);
62 } 81 }
82
83 /* Restore clocks after powering on a domain*/
84 if (power_on) {
85 int i;
86
87 for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) {
88 if (IS_ERR(pd->clk[i]))
89 break;
90 if (clk_set_parent(pd->clk[i], pd->pclk[i]))
91 pr_err("%s: error setting parent to clock%d\n",
92 pd->name, i);
93 }
94 }
95
63 return 0; 96 return 0;
64} 97}
65 98
@@ -152,9 +185,11 @@ static __init int exynos4_pm_init_power_domain(void)
152 185
153 for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") { 186 for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") {
154 struct exynos_pm_domain *pd; 187 struct exynos_pm_domain *pd;
155 int on; 188 int on, i;
189 struct device *dev;
156 190
157 pdev = of_find_device_by_node(np); 191 pdev = of_find_device_by_node(np);
192 dev = &pdev->dev;
158 193
159 pd = kzalloc(sizeof(*pd), GFP_KERNEL); 194 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
160 if (!pd) { 195 if (!pd) {
@@ -170,6 +205,30 @@ static __init int exynos4_pm_init_power_domain(void)
170 pd->pd.power_on = exynos_pd_power_on; 205 pd->pd.power_on = exynos_pd_power_on;
171 pd->pd.of_node = np; 206 pd->pd.of_node = np;
172 207
208 pd->oscclk = clk_get(dev, "oscclk");
209 if (IS_ERR(pd->oscclk))
210 goto no_clk;
211
212 for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) {
213 char clk_name[8];
214
215 snprintf(clk_name, sizeof(clk_name), "clk%d", i);
216 pd->clk[i] = clk_get(dev, clk_name);
217 if (IS_ERR(pd->clk[i]))
218 break;
219 snprintf(clk_name, sizeof(clk_name), "pclk%d", i);
220 pd->pclk[i] = clk_get(dev, clk_name);
221 if (IS_ERR(pd->pclk[i])) {
222 clk_put(pd->clk[i]);
223 pd->clk[i] = ERR_PTR(-EINVAL);
224 break;
225 }
226 }
227
228 if (IS_ERR(pd->clk[0]))
229 clk_put(pd->oscclk);
230
231no_clk:
173 platform_set_drvdata(pdev, pd); 232 platform_set_drvdata(pdev, pd);
174 233
175 on = __raw_readl(pd->base + 0x4) & S5P_INT_LOCAL_PWR_EN; 234 on = __raw_readl(pd->base + 0x4) & S5P_INT_LOCAL_PWR_EN;
diff --git a/arch/arm/mach-highbank/Kconfig b/arch/arm/mach-highbank/Kconfig
index 830b76e70250..a5960e2ac090 100644
--- a/arch/arm/mach-highbank/Kconfig
+++ b/arch/arm/mach-highbank/Kconfig
@@ -1,7 +1,6 @@
1config ARCH_HIGHBANK 1config ARCH_HIGHBANK
2 bool "Calxeda ECX-1000/2000 (Highbank/Midway)" if ARCH_MULTI_V7 2 bool "Calxeda ECX-1000/2000 (Highbank/Midway)" if ARCH_MULTI_V7
3 select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE 3 select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
4 select ARCH_HAS_CPUFREQ
5 select ARCH_HAS_HOLES_MEMORYMODEL 4 select ARCH_HAS_HOLES_MEMORYMODEL
6 select ARCH_HAS_OPP 5 select ARCH_HAS_OPP
7 select ARCH_SUPPORTS_BIG_ENDIAN 6 select ARCH_SUPPORTS_BIG_ENDIAN
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 8d42eab76d53..4b5185748f74 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -1,6 +1,5 @@
1config ARCH_MXC 1menuconfig ARCH_MXC
2 bool "Freescale i.MX family" if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7 2 bool "Freescale i.MX family" if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7
3 select ARCH_HAS_CPUFREQ
4 select ARCH_HAS_OPP 3 select ARCH_HAS_OPP
5 select ARCH_REQUIRE_GPIOLIB 4 select ARCH_REQUIRE_GPIOLIB
6 select ARM_CPU_SUSPEND if PM 5 select ARM_CPU_SUSPEND if PM
@@ -13,8 +12,7 @@ config ARCH_MXC
13 help 12 help
14 Support for Freescale MXC/iMX-based family of processors 13 Support for Freescale MXC/iMX-based family of processors
15 14
16menu "Freescale i.MX support" 15if ARCH_MXC
17 depends on ARCH_MXC
18 16
19config MXC_TZIC 17config MXC_TZIC
20 bool 18 bool
@@ -99,7 +97,6 @@ config SOC_IMX25
99 97
100config SOC_IMX27 98config SOC_IMX27
101 bool 99 bool
102 select ARCH_HAS_CPUFREQ
103 select ARCH_HAS_OPP 100 select ARCH_HAS_OPP
104 select CPU_ARM926T 101 select CPU_ARM926T
105 select IMX_HAVE_IOMUX_V1 102 select IMX_HAVE_IOMUX_V1
@@ -124,7 +121,6 @@ config SOC_IMX35
124 121
125config SOC_IMX5 122config SOC_IMX5
126 bool 123 bool
127 select ARCH_HAS_CPUFREQ
128 select ARCH_HAS_OPP 124 select ARCH_HAS_OPP
129 select ARCH_MXC_IOMUX_V3 125 select ARCH_MXC_IOMUX_V3
130 select MXC_TZIC 126 select MXC_TZIC
@@ -738,9 +734,9 @@ config SOC_IMX6
738 select HAVE_IMX_MMDC 734 select HAVE_IMX_MMDC
739 select HAVE_IMX_SRC 735 select HAVE_IMX_SRC
740 select MFD_SYSCON 736 select MFD_SYSCON
741 select PL310_ERRATA_588369 if CACHE_PL310 737 select PL310_ERRATA_588369 if CACHE_L2X0
742 select PL310_ERRATA_727915 if CACHE_PL310 738 select PL310_ERRATA_727915 if CACHE_L2X0
743 select PL310_ERRATA_769419 if CACHE_PL310 739 select PL310_ERRATA_769419 if CACHE_L2X0
744 740
745config SOC_IMX6Q 741config SOC_IMX6Q
746 bool "i.MX6 Quad/DualLite support" 742 bool "i.MX6 Quad/DualLite support"
@@ -775,9 +771,9 @@ config SOC_VF610
775 select ARM_GIC 771 select ARM_GIC
776 select PINCTRL_VF610 772 select PINCTRL_VF610
777 select VF_PIT_TIMER 773 select VF_PIT_TIMER
778 select PL310_ERRATA_588369 if CACHE_PL310 774 select PL310_ERRATA_588369 if CACHE_L2X0
779 select PL310_ERRATA_727915 if CACHE_PL310 775 select PL310_ERRATA_727915 if CACHE_L2X0
780 select PL310_ERRATA_769419 if CACHE_PL310 776 select PL310_ERRATA_769419 if CACHE_L2X0
781 777
782 help 778 help
783 This enable support for Freescale Vybrid VF610 processor. 779 This enable support for Freescale Vybrid VF610 processor.
@@ -786,4 +782,4 @@ endif
786 782
787source "arch/arm/mach-imx/devices/Kconfig" 783source "arch/arm/mach-imx/devices/Kconfig"
788 784
789endmenu 785endif
diff --git a/arch/arm/mach-imx/clk-gate2.c b/arch/arm/mach-imx/clk-gate2.c
index 4ba587da89d2..84acdfd1d715 100644
--- a/arch/arm/mach-imx/clk-gate2.c
+++ b/arch/arm/mach-imx/clk-gate2.c
@@ -67,8 +67,12 @@ static void clk_gate2_disable(struct clk_hw *hw)
67 67
68 spin_lock_irqsave(gate->lock, flags); 68 spin_lock_irqsave(gate->lock, flags);
69 69
70 if (gate->share_count && --(*gate->share_count) > 0) 70 if (gate->share_count) {
71 goto out; 71 if (WARN_ON(*gate->share_count == 0))
72 goto out;
73 else if (--(*gate->share_count) > 0)
74 goto out;
75 }
72 76
73 reg = readl(gate->reg); 77 reg = readl(gate->reg);
74 reg &= ~(3 << gate->bit_idx); 78 reg &= ~(3 << gate->bit_idx);
@@ -78,19 +82,26 @@ out:
78 spin_unlock_irqrestore(gate->lock, flags); 82 spin_unlock_irqrestore(gate->lock, flags);
79} 83}
80 84
81static int clk_gate2_is_enabled(struct clk_hw *hw) 85static int clk_gate2_reg_is_enabled(void __iomem *reg, u8 bit_idx)
82{ 86{
83 u32 reg; 87 u32 val = readl(reg);
84 struct clk_gate2 *gate = to_clk_gate2(hw);
85 88
86 reg = readl(gate->reg); 89 if (((val >> bit_idx) & 1) == 1)
87
88 if (((reg >> gate->bit_idx) & 1) == 1)
89 return 1; 90 return 1;
90 91
91 return 0; 92 return 0;
92} 93}
93 94
95static int clk_gate2_is_enabled(struct clk_hw *hw)
96{
97 struct clk_gate2 *gate = to_clk_gate2(hw);
98
99 if (gate->share_count)
100 return !!(*gate->share_count);
101 else
102 return clk_gate2_reg_is_enabled(gate->reg, gate->bit_idx);
103}
104
94static struct clk_ops clk_gate2_ops = { 105static struct clk_ops clk_gate2_ops = {
95 .enable = clk_gate2_enable, 106 .enable = clk_gate2_enable,
96 .disable = clk_gate2_disable, 107 .disable = clk_gate2_disable,
@@ -116,6 +127,10 @@ struct clk *clk_register_gate2(struct device *dev, const char *name,
116 gate->bit_idx = bit_idx; 127 gate->bit_idx = bit_idx;
117 gate->flags = clk_gate2_flags; 128 gate->flags = clk_gate2_flags;
118 gate->lock = lock; 129 gate->lock = lock;
130
131 /* Initialize share_count per hardware state */
132 if (share_count)
133 *share_count = clk_gate2_reg_is_enabled(reg, bit_idx) ? 1 : 0;
119 gate->share_count = share_count; 134 gate->share_count = share_count;
120 135
121 init.name = name; 136 init.name = name;
diff --git a/arch/arm/mach-imx/clk-imx6sl.c b/arch/arm/mach-imx/clk-imx6sl.c
index 21cf06cebade..5408ca70c8d6 100644
--- a/arch/arm/mach-imx/clk-imx6sl.c
+++ b/arch/arm/mach-imx/clk-imx6sl.c
@@ -312,6 +312,7 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
312 clks[IMX6SL_CLK_ECSPI2] = imx_clk_gate2("ecspi2", "ecspi_root", base + 0x6c, 2); 312 clks[IMX6SL_CLK_ECSPI2] = imx_clk_gate2("ecspi2", "ecspi_root", base + 0x6c, 2);
313 clks[IMX6SL_CLK_ECSPI3] = imx_clk_gate2("ecspi3", "ecspi_root", base + 0x6c, 4); 313 clks[IMX6SL_CLK_ECSPI3] = imx_clk_gate2("ecspi3", "ecspi_root", base + 0x6c, 4);
314 clks[IMX6SL_CLK_ECSPI4] = imx_clk_gate2("ecspi4", "ecspi_root", base + 0x6c, 6); 314 clks[IMX6SL_CLK_ECSPI4] = imx_clk_gate2("ecspi4", "ecspi_root", base + 0x6c, 6);
315 clks[IMX6SL_CLK_ENET] = imx_clk_gate2("enet", "ipg", base + 0x6c, 10);
315 clks[IMX6SL_CLK_EPIT1] = imx_clk_gate2("epit1", "perclk", base + 0x6c, 12); 316 clks[IMX6SL_CLK_EPIT1] = imx_clk_gate2("epit1", "perclk", base + 0x6c, 12);
316 clks[IMX6SL_CLK_EPIT2] = imx_clk_gate2("epit2", "perclk", base + 0x6c, 14); 317 clks[IMX6SL_CLK_EPIT2] = imx_clk_gate2("epit2", "perclk", base + 0x6c, 14);
317 clks[IMX6SL_CLK_EXTERN_AUDIO] = imx_clk_gate2("extern_audio", "extern_audio_podf", base + 0x6c, 16); 318 clks[IMX6SL_CLK_EXTERN_AUDIO] = imx_clk_gate2("extern_audio", "extern_audio_podf", base + 0x6c, 16);
diff --git a/arch/arm/mach-integrator/Kconfig b/arch/arm/mach-integrator/Kconfig
index ba43321001d8..64f8e2564a37 100644
--- a/arch/arm/mach-integrator/Kconfig
+++ b/arch/arm/mach-integrator/Kconfig
@@ -28,7 +28,7 @@ config ARCH_CINTEGRATOR
28 bool 28 bool
29 29
30config INTEGRATOR_IMPD1 30config INTEGRATOR_IMPD1
31 tristate "Include support for Integrator/IM-PD1" 31 bool "Include support for Integrator/IM-PD1"
32 depends on ARCH_INTEGRATOR_AP 32 depends on ARCH_INTEGRATOR_AP
33 select ARCH_REQUIRE_GPIOLIB 33 select ARCH_REQUIRE_GPIOLIB
34 select ARM_VIC 34 select ARM_VIC
diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c
index 0e870ea818c4..3ce880729cff 100644
--- a/arch/arm/mach-integrator/impd1.c
+++ b/arch/arm/mach-integrator/impd1.c
@@ -308,7 +308,12 @@ static struct impd1_device impd1_devs[] = {
308 */ 308 */
309#define IMPD1_VALID_IRQS 0x00000bffU 309#define IMPD1_VALID_IRQS 0x00000bffU
310 310
311static int __init impd1_probe(struct lm_device *dev) 311/*
312 * As this module is bool, it is OK to have this as __init_refok() - no
313 * probe calls will be done after the initial system bootup, as devices
314 * are discovered as part of the machine startup.
315 */
316static int __init_refok impd1_probe(struct lm_device *dev)
312{ 317{
313 struct impd1_module *impd1; 318 struct impd1_module *impd1;
314 int irq_base; 319 int irq_base;
@@ -397,6 +402,11 @@ static void impd1_remove(struct lm_device *dev)
397static struct lm_driver impd1_driver = { 402static struct lm_driver impd1_driver = {
398 .drv = { 403 .drv = {
399 .name = "impd1", 404 .name = "impd1",
405 /*
406 * As we're dropping the probe() function, suppress driver
407 * binding from sysfs.
408 */
409 .suppress_bind_attrs = true,
400 }, 410 },
401 .probe = impd1_probe, 411 .probe = impd1_probe,
402 .remove = impd1_remove, 412 .remove = impd1_remove,
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index dd0cc677d596..660ca6feff40 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -480,25 +480,18 @@ static const struct of_device_id ebi_match[] = {
480static void __init ap_init_of(void) 480static void __init ap_init_of(void)
481{ 481{
482 unsigned long sc_dec; 482 unsigned long sc_dec;
483 struct device_node *root;
484 struct device_node *syscon; 483 struct device_node *syscon;
485 struct device_node *ebi; 484 struct device_node *ebi;
486 struct device *parent; 485 struct device *parent;
487 struct soc_device *soc_dev; 486 struct soc_device *soc_dev;
488 struct soc_device_attribute *soc_dev_attr; 487 struct soc_device_attribute *soc_dev_attr;
489 u32 ap_sc_id; 488 u32 ap_sc_id;
490 int err;
491 int i; 489 int i;
492 490
493 /* Here we create an SoC device for the root node */ 491 syscon = of_find_matching_node(NULL, ap_syscon_match);
494 root = of_find_node_by_path("/");
495 if (!root)
496 return;
497
498 syscon = of_find_matching_node(root, ap_syscon_match);
499 if (!syscon) 492 if (!syscon)
500 return; 493 return;
501 ebi = of_find_matching_node(root, ebi_match); 494 ebi = of_find_matching_node(NULL, ebi_match);
502 if (!ebi) 495 if (!ebi)
503 return; 496 return;
504 497
@@ -509,19 +502,17 @@ static void __init ap_init_of(void)
509 if (!ebi_base) 502 if (!ebi_base)
510 return; 503 return;
511 504
505 of_platform_populate(NULL, of_default_bus_match_table,
506 ap_auxdata_lookup, NULL);
507
512 ap_sc_id = readl(ap_syscon_base); 508 ap_sc_id = readl(ap_syscon_base);
513 509
514 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); 510 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
515 if (!soc_dev_attr) 511 if (!soc_dev_attr)
516 return; 512 return;
517 513
518 err = of_property_read_string(root, "compatible", 514 soc_dev_attr->soc_id = "XVC";
519 &soc_dev_attr->soc_id); 515 soc_dev_attr->machine = "Integrator/AP";
520 if (err)
521 return;
522 err = of_property_read_string(root, "model", &soc_dev_attr->machine);
523 if (err)
524 return;
525 soc_dev_attr->family = "Integrator"; 516 soc_dev_attr->family = "Integrator";
526 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c", 517 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c",
527 'A' + (ap_sc_id & 0x0f)); 518 'A' + (ap_sc_id & 0x0f));
@@ -536,9 +527,6 @@ static void __init ap_init_of(void)
536 parent = soc_device_to_device(soc_dev); 527 parent = soc_device_to_device(soc_dev);
537 integrator_init_sysfs(parent, ap_sc_id); 528 integrator_init_sysfs(parent, ap_sc_id);
538 529
539 of_platform_populate(root, of_default_bus_match_table,
540 ap_auxdata_lookup, parent);
541
542 sc_dec = readl(ap_syscon_base + INTEGRATOR_SC_DEC_OFFSET); 530 sc_dec = readl(ap_syscon_base + INTEGRATOR_SC_DEC_OFFSET);
543 for (i = 0; i < 4; i++) { 531 for (i = 0; i < 4; i++) {
544 struct lm_device *lmdev; 532 struct lm_device *lmdev;
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index a938242b0c95..0e57f8f820a5 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -279,20 +279,13 @@ static const struct of_device_id intcp_syscon_match[] = {
279 279
280static void __init intcp_init_of(void) 280static void __init intcp_init_of(void)
281{ 281{
282 struct device_node *root;
283 struct device_node *cpcon; 282 struct device_node *cpcon;
284 struct device *parent; 283 struct device *parent;
285 struct soc_device *soc_dev; 284 struct soc_device *soc_dev;
286 struct soc_device_attribute *soc_dev_attr; 285 struct soc_device_attribute *soc_dev_attr;
287 u32 intcp_sc_id; 286 u32 intcp_sc_id;
288 int err;
289 287
290 /* Here we create an SoC device for the root node */ 288 cpcon = of_find_matching_node(NULL, intcp_syscon_match);
291 root = of_find_node_by_path("/");
292 if (!root)
293 return;
294
295 cpcon = of_find_matching_node(root, intcp_syscon_match);
296 if (!cpcon) 289 if (!cpcon)
297 return; 290 return;
298 291
@@ -300,19 +293,17 @@ static void __init intcp_init_of(void)
300 if (!intcp_con_base) 293 if (!intcp_con_base)
301 return; 294 return;
302 295
296 of_platform_populate(NULL, of_default_bus_match_table,
297 intcp_auxdata_lookup, NULL);
298
303 intcp_sc_id = readl(intcp_con_base); 299 intcp_sc_id = readl(intcp_con_base);
304 300
305 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); 301 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
306 if (!soc_dev_attr) 302 if (!soc_dev_attr)
307 return; 303 return;
308 304
309 err = of_property_read_string(root, "compatible", 305 soc_dev_attr->soc_id = "XCV";
310 &soc_dev_attr->soc_id); 306 soc_dev_attr->machine = "Integrator/CP";
311 if (err)
312 return;
313 err = of_property_read_string(root, "model", &soc_dev_attr->machine);
314 if (err)
315 return;
316 soc_dev_attr->family = "Integrator"; 307 soc_dev_attr->family = "Integrator";
317 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c", 308 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c",
318 'A' + (intcp_sc_id & 0x0f)); 309 'A' + (intcp_sc_id & 0x0f));
@@ -326,8 +317,6 @@ static void __init intcp_init_of(void)
326 317
327 parent = soc_device_to_device(soc_dev); 318 parent = soc_device_to_device(soc_dev);
328 integrator_init_sysfs(parent, intcp_sc_id); 319 integrator_init_sysfs(parent, intcp_sc_id);
329 of_platform_populate(root, of_default_bus_match_table,
330 intcp_auxdata_lookup, parent);
331} 320}
332 321
333static const char * intcp_dt_board_compat[] = { 322static const char * intcp_dt_board_compat[] = {
diff --git a/arch/arm/mach-keystone/Kconfig b/arch/arm/mach-keystone/Kconfig
index f50bc936cb84..98a156afaa94 100644
--- a/arch/arm/mach-keystone/Kconfig
+++ b/arch/arm/mach-keystone/Kconfig
@@ -1,6 +1,7 @@
1config ARCH_KEYSTONE 1config ARCH_KEYSTONE
2 bool "Texas Instruments Keystone Devices" 2 bool "Texas Instruments Keystone Devices"
3 depends on ARCH_MULTI_V7 3 depends on ARCH_MULTI_V7
4 depends on ARM_PATCH_PHYS_VIRT
4 select ARM_GIC 5 select ARM_GIC
5 select HAVE_ARM_ARCH_TIMER 6 select HAVE_ARM_ARCH_TIMER
6 select CLKSRC_MMIO 7 select CLKSRC_MMIO
diff --git a/arch/arm/mach-moxart/Kconfig b/arch/arm/mach-moxart/Kconfig
index 82a4ba8578a2..f49328c39bef 100644
--- a/arch/arm/mach-moxart/Kconfig
+++ b/arch/arm/mach-moxart/Kconfig
@@ -1,4 +1,4 @@
1config ARCH_MOXART 1menuconfig ARCH_MOXART
2 bool "MOXA ART SoC" if ARCH_MULTI_V4 2 bool "MOXA ART SoC" if ARCH_MULTI_V4
3 select CPU_FA526 3 select CPU_FA526
4 select ARM_DMA_MEM_BUFFERABLE 4 select ARM_DMA_MEM_BUFFERABLE
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 6090b9eb00c8..b9bc599a5fd0 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -1,4 +1,4 @@
1config ARCH_MVEBU 1menuconfig ARCH_MVEBU
2 bool "Marvell Engineering Business Unit (MVEBU) SoCs" if (ARCH_MULTI_V7 || ARCH_MULTI_V5) 2 bool "Marvell Engineering Business Unit (MVEBU) SoCs" if (ARCH_MULTI_V7 || ARCH_MULTI_V5)
3 select ARCH_SUPPORTS_BIG_ENDIAN 3 select ARCH_SUPPORTS_BIG_ENDIAN
4 select CLKSRC_MMIO 4 select CLKSRC_MMIO
@@ -10,15 +10,15 @@ config ARCH_MVEBU
10 select ZONE_DMA if ARM_LPAE 10 select ZONE_DMA if ARM_LPAE
11 select ARCH_REQUIRE_GPIOLIB 11 select ARCH_REQUIRE_GPIOLIB
12 select PCI_QUIRKS if PCI 12 select PCI_QUIRKS if PCI
13 select OF_ADDRESS_PCI
13 14
14if ARCH_MVEBU 15if ARCH_MVEBU
15 16
16menu "Marvell EBU SoC variants"
17
18config MACH_MVEBU_V7 17config MACH_MVEBU_V7
19 bool 18 bool
20 select ARMADA_370_XP_TIMER 19 select ARMADA_370_XP_TIMER
21 select CACHE_L2X0 20 select CACHE_L2X0
21 select ARM_CPU_SUSPEND
22 22
23config MACH_ARMADA_370 23config MACH_ARMADA_370
24 bool "Marvell Armada 370 boards" if ARCH_MULTI_V7 24 bool "Marvell Armada 370 boards" if ARCH_MULTI_V7
@@ -84,7 +84,6 @@ config MACH_DOVE
84 84
85config MACH_KIRKWOOD 85config MACH_KIRKWOOD
86 bool "Marvell Kirkwood boards" if ARCH_MULTI_V5 86 bool "Marvell Kirkwood boards" if ARCH_MULTI_V5
87 select ARCH_HAS_CPUFREQ
88 select ARCH_REQUIRE_GPIOLIB 87 select ARCH_REQUIRE_GPIOLIB
89 select CPU_FEROCEON 88 select CPU_FEROCEON
90 select KIRKWOOD_CLK 89 select KIRKWOOD_CLK
@@ -97,6 +96,4 @@ config MACH_KIRKWOOD
97 Say 'Y' here if you want your kernel to support boards based 96 Say 'Y' here if you want your kernel to support boards based
98 on the Marvell Kirkwood device tree. 97 on the Marvell Kirkwood device tree.
99 98
100endmenu
101
102endif 99endif
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index 2ecb828e4a8b..1636cdbef01a 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -7,7 +7,7 @@ CFLAGS_pmsu.o := -march=armv7-a
7obj-y += system-controller.o mvebu-soc-id.o 7obj-y += system-controller.o mvebu-soc-id.o
8 8
9ifeq ($(CONFIG_MACH_MVEBU_V7),y) 9ifeq ($(CONFIG_MACH_MVEBU_V7),y)
10obj-y += cpu-reset.o board-v7.o coherency.o coherency_ll.o pmsu.o 10obj-y += cpu-reset.o board-v7.o coherency.o coherency_ll.o pmsu.o pmsu_ll.o
11obj-$(CONFIG_SMP) += platsmp.o headsmp.o platsmp-a9.o headsmp-a9.o 11obj-$(CONFIG_SMP) += platsmp.o headsmp.o platsmp-a9.o headsmp-a9.o
12obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o 12obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
13endif 13endif
diff --git a/arch/arm/mach-mvebu/board-v7.c b/arch/arm/mach-mvebu/board-v7.c
index 8bb742fdf5ca..b2524d689f21 100644
--- a/arch/arm/mach-mvebu/board-v7.c
+++ b/arch/arm/mach-mvebu/board-v7.c
@@ -23,6 +23,7 @@
23#include <linux/mbus.h> 23#include <linux/mbus.h>
24#include <linux/signal.h> 24#include <linux/signal.h>
25#include <linux/slab.h> 25#include <linux/slab.h>
26#include <linux/irqchip.h>
26#include <asm/hardware/cache-l2x0.h> 27#include <asm/hardware/cache-l2x0.h>
27#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
28#include <asm/mach/map.h> 29#include <asm/mach/map.h>
@@ -71,17 +72,23 @@ static int armada_375_external_abort_wa(unsigned long addr, unsigned int fsr,
71 return 1; 72 return 1;
72} 73}
73 74
74static void __init mvebu_timer_and_clk_init(void) 75static void __init mvebu_init_irq(void)
75{ 76{
76 of_clk_init(NULL); 77 irqchip_init();
77 clocksource_of_init();
78 mvebu_scu_enable(); 78 mvebu_scu_enable();
79 coherency_init(); 79 coherency_init();
80 BUG_ON(mvebu_mbus_dt_init(coherency_available())); 80 BUG_ON(mvebu_mbus_dt_init(coherency_available()));
81}
82
83static void __init external_abort_quirk(void)
84{
85 u32 dev, rev;
81 86
82 if (of_machine_is_compatible("marvell,armada375")) 87 if (mvebu_get_soc_id(&dev, &rev) == 0 && rev > ARMADA_375_Z1_REV)
83 hook_fault_code(16 + 6, armada_375_external_abort_wa, SIGBUS, 0, 88 return;
84 "imprecise external abort"); 89
90 hook_fault_code(16 + 6, armada_375_external_abort_wa, SIGBUS, 0,
91 "imprecise external abort");
85} 92}
86 93
87static void __init i2c_quirk(void) 94static void __init i2c_quirk(void)
@@ -169,8 +176,10 @@ static void __init mvebu_dt_init(void)
169{ 176{
170 if (of_machine_is_compatible("plathome,openblocks-ax3-4")) 177 if (of_machine_is_compatible("plathome,openblocks-ax3-4"))
171 i2c_quirk(); 178 i2c_quirk();
172 if (of_machine_is_compatible("marvell,a375-db")) 179 if (of_machine_is_compatible("marvell,a375-db")) {
180 external_abort_quirk();
173 thermal_quirk(); 181 thermal_quirk();
182 }
174 183
175 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 184 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
176} 185}
@@ -185,7 +194,7 @@ DT_MACHINE_START(ARMADA_370_XP_DT, "Marvell Armada 370/XP (Device Tree)")
185 .l2c_aux_mask = ~0, 194 .l2c_aux_mask = ~0,
186 .smp = smp_ops(armada_xp_smp_ops), 195 .smp = smp_ops(armada_xp_smp_ops),
187 .init_machine = mvebu_dt_init, 196 .init_machine = mvebu_dt_init,
188 .init_time = mvebu_timer_and_clk_init, 197 .init_irq = mvebu_init_irq,
189 .restart = mvebu_restart, 198 .restart = mvebu_restart,
190 .dt_compat = armada_370_xp_dt_compat, 199 .dt_compat = armada_370_xp_dt_compat,
191MACHINE_END 200MACHINE_END
@@ -198,7 +207,7 @@ static const char * const armada_375_dt_compat[] = {
198DT_MACHINE_START(ARMADA_375_DT, "Marvell Armada 375 (Device Tree)") 207DT_MACHINE_START(ARMADA_375_DT, "Marvell Armada 375 (Device Tree)")
199 .l2c_aux_val = 0, 208 .l2c_aux_val = 0,
200 .l2c_aux_mask = ~0, 209 .l2c_aux_mask = ~0,
201 .init_time = mvebu_timer_and_clk_init, 210 .init_irq = mvebu_init_irq,
202 .init_machine = mvebu_dt_init, 211 .init_machine = mvebu_dt_init,
203 .restart = mvebu_restart, 212 .restart = mvebu_restart,
204 .dt_compat = armada_375_dt_compat, 213 .dt_compat = armada_375_dt_compat,
@@ -213,7 +222,7 @@ static const char * const armada_38x_dt_compat[] = {
213DT_MACHINE_START(ARMADA_38X_DT, "Marvell Armada 380/385 (Device Tree)") 222DT_MACHINE_START(ARMADA_38X_DT, "Marvell Armada 380/385 (Device Tree)")
214 .l2c_aux_val = 0, 223 .l2c_aux_val = 0,
215 .l2c_aux_mask = ~0, 224 .l2c_aux_mask = ~0,
216 .init_time = mvebu_timer_and_clk_init, 225 .init_irq = mvebu_init_irq,
217 .restart = mvebu_restart, 226 .restart = mvebu_restart,
218 .dt_compat = armada_38x_dt_compat, 227 .dt_compat = armada_38x_dt_compat,
219MACHINE_END 228MACHINE_END
diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c
index 53a55c8520bf..a1d407c0febe 100644
--- a/arch/arm/mach-mvebu/pmsu.c
+++ b/arch/arm/mach-mvebu/pmsu.c
@@ -66,6 +66,8 @@ static void __iomem *pmsu_mp_base;
66extern void ll_disable_coherency(void); 66extern void ll_disable_coherency(void);
67extern void ll_enable_coherency(void); 67extern void ll_enable_coherency(void);
68 68
69extern void armada_370_xp_cpu_resume(void);
70
69static struct platform_device armada_xp_cpuidle_device = { 71static struct platform_device armada_xp_cpuidle_device = {
70 .name = "cpuidle-armada-370-xp", 72 .name = "cpuidle-armada-370-xp",
71}; 73};
@@ -140,13 +142,6 @@ static void armada_370_xp_pmsu_enable_l2_powerdown_onidle(void)
140 writel(reg, pmsu_mp_base + L2C_NFABRIC_PM_CTL); 142 writel(reg, pmsu_mp_base + L2C_NFABRIC_PM_CTL);
141} 143}
142 144
143static void armada_370_xp_cpu_resume(void)
144{
145 asm volatile("bl ll_add_cpu_to_smp_group\n\t"
146 "bl ll_enable_coherency\n\t"
147 "b cpu_resume\n\t");
148}
149
150/* No locking is needed because we only access per-CPU registers */ 145/* No locking is needed because we only access per-CPU registers */
151void armada_370_xp_pmsu_idle_prepare(bool deepidle) 146void armada_370_xp_pmsu_idle_prepare(bool deepidle)
152{ 147{
diff --git a/arch/arm/mach-mvebu/pmsu_ll.S b/arch/arm/mach-mvebu/pmsu_ll.S
new file mode 100644
index 000000000000..fc3de68d8c54
--- /dev/null
+++ b/arch/arm/mach-mvebu/pmsu_ll.S
@@ -0,0 +1,25 @@
1/*
2 * Copyright (C) 2014 Marvell
3 *
4 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
5 * Gregory Clement <gregory.clement@free-electrons.com>
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12#include <linux/linkage.h>
13#include <asm/assembler.h>
14
15/*
16 * This is the entry point through which CPUs exiting cpuidle deep
17 * idle state are going.
18 */
19ENTRY(armada_370_xp_cpu_resume)
20ARM_BE8(setend be ) @ go BE8 if entered LE
21 bl ll_add_cpu_to_smp_group
22 bl ll_enable_coherency
23 b cpu_resume
24ENDPROC(armada_370_xp_cpu_resume)
25
diff --git a/arch/arm/mach-nomadik/Kconfig b/arch/arm/mach-nomadik/Kconfig
index 486d301f43fd..3c61096c8627 100644
--- a/arch/arm/mach-nomadik/Kconfig
+++ b/arch/arm/mach-nomadik/Kconfig
@@ -1,4 +1,4 @@
1config ARCH_NOMADIK 1menuconfig ARCH_NOMADIK
2 bool "ST-Ericsson Nomadik" 2 bool "ST-Ericsson Nomadik"
3 depends on ARCH_MULTI_V5 3 depends on ARCH_MULTI_V5
4 select ARCH_REQUIRE_GPIOLIB 4 select ARCH_REQUIRE_GPIOLIB
@@ -15,7 +15,6 @@ config ARCH_NOMADIK
15 Support for the Nomadik platform by ST-Ericsson 15 Support for the Nomadik platform by ST-Ericsson
16 16
17if ARCH_NOMADIK 17if ARCH_NOMADIK
18menu "Nomadik boards"
19 18
20config MACH_NOMADIK_8815NHK 19config MACH_NOMADIK_8815NHK
21 bool "ST 8815 Nomadik Hardware Kit (evaluation board)" 20 bool "ST 8815 Nomadik Hardware Kit (evaluation board)"
@@ -24,7 +23,6 @@ config MACH_NOMADIK_8815NHK
24 select I2C_ALGOBIT 23 select I2C_ALGOBIT
25 select I2C_NOMADIK 24 select I2C_NOMADIK
26 25
27endmenu
28endif 26endif
29 27
30config NOMADIK_8815 28config NOMADIK_8815
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 0ba482638ebf..1c1ed737f7ab 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -1,3 +1,6 @@
1menu "TI OMAP/AM/DM/DRA Family"
2 depends on ARCH_MULTI_V6 || ARCH_MULTI_V7
3
1config ARCH_OMAP 4config ARCH_OMAP
2 bool 5 bool
3 6
@@ -28,12 +31,11 @@ config ARCH_OMAP4
28 select ARM_CPU_SUSPEND if PM 31 select ARM_CPU_SUSPEND if PM
29 select ARM_ERRATA_720789 32 select ARM_ERRATA_720789
30 select ARM_GIC 33 select ARM_GIC
31 select CACHE_L2X0
32 select HAVE_ARM_SCU if SMP 34 select HAVE_ARM_SCU if SMP
33 select HAVE_ARM_TWD if SMP 35 select HAVE_ARM_TWD if SMP
34 select OMAP_INTERCONNECT 36 select OMAP_INTERCONNECT
35 select PL310_ERRATA_588369 37 select PL310_ERRATA_588369 if CACHE_L2X0
36 select PL310_ERRATA_727915 38 select PL310_ERRATA_727915 if CACHE_L2X0
37 select PM_OPP if PM 39 select PM_OPP if PM
38 select PM_RUNTIME if CPU_IDLE 40 select PM_RUNTIME if CPU_IDLE
39 select ARM_ERRATA_754322 41 select ARM_ERRATA_754322
@@ -80,7 +82,6 @@ config SOC_DRA7XX
80config ARCH_OMAP2PLUS 82config ARCH_OMAP2PLUS
81 bool 83 bool
82 select ARCH_HAS_BANDGAP 84 select ARCH_HAS_BANDGAP
83 select ARCH_HAS_CPUFREQ
84 select ARCH_HAS_HOLES_MEMORYMODEL 85 select ARCH_HAS_HOLES_MEMORYMODEL
85 select ARCH_OMAP 86 select ARCH_OMAP
86 select ARCH_REQUIRE_GPIOLIB 87 select ARCH_REQUIRE_GPIOLIB
@@ -343,3 +344,5 @@ config OMAP4_ERRATA_I688
343endmenu 344endmenu
344 345
345endif 346endif
347
348endmenu
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 8421f38cf445..8ca99e9321e3 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -110,14 +110,16 @@ obj-y += prm_common.o cm_common.o
110obj-$(CONFIG_ARCH_OMAP2) += prm2xxx_3xxx.o prm2xxx.o cm2xxx.o 110obj-$(CONFIG_ARCH_OMAP2) += prm2xxx_3xxx.o prm2xxx.o cm2xxx.o
111obj-$(CONFIG_ARCH_OMAP3) += prm2xxx_3xxx.o prm3xxx.o cm3xxx.o 111obj-$(CONFIG_ARCH_OMAP3) += prm2xxx_3xxx.o prm3xxx.o cm3xxx.o
112obj-$(CONFIG_ARCH_OMAP3) += vc3xxx_data.o vp3xxx_data.o 112obj-$(CONFIG_ARCH_OMAP3) += vc3xxx_data.o vp3xxx_data.o
113obj-$(CONFIG_SOC_AM33XX) += prm33xx.o cm33xx.o
114omap-prcm-4-5-common = cminst44xx.o cm44xx.o prm44xx.o \ 113omap-prcm-4-5-common = cminst44xx.o cm44xx.o prm44xx.o \
115 prcm_mpu44xx.o prminst44xx.o \ 114 prcm_mpu44xx.o prminst44xx.o \
116 vc44xx_data.o vp44xx_data.o 115 vc44xx_data.o vp44xx_data.o
117obj-$(CONFIG_ARCH_OMAP4) += $(omap-prcm-4-5-common) 116obj-$(CONFIG_ARCH_OMAP4) += $(omap-prcm-4-5-common)
118obj-$(CONFIG_SOC_OMAP5) += $(omap-prcm-4-5-common) 117obj-$(CONFIG_SOC_OMAP5) += $(omap-prcm-4-5-common)
119obj-$(CONFIG_SOC_DRA7XX) += $(omap-prcm-4-5-common) 118obj-$(CONFIG_SOC_DRA7XX) += $(omap-prcm-4-5-common)
120obj-$(CONFIG_SOC_AM43XX) += $(omap-prcm-4-5-common) 119am33xx-43xx-prcm-common += prm33xx.o cm33xx.o
120obj-$(CONFIG_SOC_AM33XX) += $(am33xx-43xx-prcm-common)
121obj-$(CONFIG_SOC_AM43XX) += $(omap-prcm-4-5-common) \
122 $(am33xx-43xx-prcm-common)
121 123
122# OMAP voltage domains 124# OMAP voltage domains
123voltagedomain-common := voltage.o vc.o vp.o 125voltagedomain-common := voltage.o vc.o vp.o
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index 332af927f4d3..67fd26a18441 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -76,7 +76,7 @@
76 * (assuming that it is counting N upwards), or -2 if the enclosing loop 76 * (assuming that it is counting N upwards), or -2 if the enclosing loop
77 * should skip to the next iteration (again assuming N is increasing). 77 * should skip to the next iteration (again assuming N is increasing).
78 */ 78 */
79static int _dpll_test_fint(struct clk_hw_omap *clk, u8 n) 79static int _dpll_test_fint(struct clk_hw_omap *clk, unsigned int n)
80{ 80{
81 struct dpll_data *dd; 81 struct dpll_data *dd;
82 long fint, fint_min, fint_max; 82 long fint, fint_min, fint_max;
diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h
index 04dab2fcf862..ee6c784cd6b7 100644
--- a/arch/arm/mach-omap2/cm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-34xx.h
@@ -26,11 +26,14 @@
26#define OMAP3430_EN_WDT3_SHIFT 12 26#define OMAP3430_EN_WDT3_SHIFT 12
27#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_MASK (1 << 0) 27#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_MASK (1 << 0)
28#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT 0 28#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT 0
29#define OMAP3430_IVA2_DPLL_FREQSEL_SHIFT 4
29#define OMAP3430_IVA2_DPLL_FREQSEL_MASK (0xf << 4) 30#define OMAP3430_IVA2_DPLL_FREQSEL_MASK (0xf << 4)
30#define OMAP3430_EN_IVA2_DPLL_DRIFTGUARD_SHIFT 3 31#define OMAP3430_EN_IVA2_DPLL_DRIFTGUARD_SHIFT 3
32#define OMAP3430_EN_IVA2_DPLL_SHIFT 0
31#define OMAP3430_EN_IVA2_DPLL_MASK (0x7 << 0) 33#define OMAP3430_EN_IVA2_DPLL_MASK (0x7 << 0)
32#define OMAP3430_ST_IVA2_SHIFT 0 34#define OMAP3430_ST_IVA2_SHIFT 0
33#define OMAP3430_ST_IVA2_CLK_MASK (1 << 0) 35#define OMAP3430_ST_IVA2_CLK_MASK (1 << 0)
36#define OMAP3430_AUTO_IVA2_DPLL_SHIFT 0
34#define OMAP3430_AUTO_IVA2_DPLL_MASK (0x7 << 0) 37#define OMAP3430_AUTO_IVA2_DPLL_MASK (0x7 << 0)
35#define OMAP3430_IVA2_CLK_SRC_SHIFT 19 38#define OMAP3430_IVA2_CLK_SRC_SHIFT 19
36#define OMAP3430_IVA2_CLK_SRC_WIDTH 3 39#define OMAP3430_IVA2_CLK_SRC_WIDTH 3
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index 15a778ce7707..bd2441790779 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -380,7 +380,7 @@ void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs);
380void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs); 380void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs);
381void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs); 381void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs);
382 382
383#ifdef CONFIG_SOC_AM33XX 383#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
384extern int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs, 384extern int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs,
385 u16 clkctrl_offs); 385 u16 clkctrl_offs);
386extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs, 386extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index ff029737c8f0..dc571f1d3b8a 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -91,7 +91,14 @@ extern void omap3_sync32k_timer_init(void);
91extern void omap3_secure_sync32k_timer_init(void); 91extern void omap3_secure_sync32k_timer_init(void);
92extern void omap3_gptimer_timer_init(void); 92extern void omap3_gptimer_timer_init(void);
93extern void omap4_local_timer_init(void); 93extern void omap4_local_timer_init(void);
94#ifdef CONFIG_CACHE_L2X0
94int omap_l2_cache_init(void); 95int omap_l2_cache_init(void);
96#else
97static inline int omap_l2_cache_init(void)
98{
99 return 0;
100}
101#endif
95extern void omap5_realtime_timer_init(void); 102extern void omap5_realtime_timer_init(void);
96 103
97void omap2420_init_early(void); 104void omap2420_init_early(void);
@@ -155,7 +162,8 @@ static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
155} 162}
156#endif 163#endif
157 164
158#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) 165#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
166 defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
159void omap44xx_restart(enum reboot_mode mode, const char *cmd); 167void omap44xx_restart(enum reboot_mode mode, const char *cmd);
160#else 168#else
161static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd) 169static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd)
@@ -241,7 +249,6 @@ static inline void __iomem *omap4_get_scu_base(void)
241} 249}
242#endif 250#endif
243 251
244extern void __init gic_init_irq(void);
245extern void gic_dist_disable(void); 252extern void gic_dist_disable(void);
246extern void gic_dist_enable(void); 253extern void gic_dist_enable(void);
247extern bool gic_dist_disabled(void); 254extern bool gic_dist_disabled(void);
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 592ba0a0ecf3..b6f8f348296e 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -297,33 +297,6 @@ static void omap_init_audio(void)
297static inline void omap_init_audio(void) {} 297static inline void omap_init_audio(void) {}
298#endif 298#endif
299 299
300#if defined(CONFIG_SND_OMAP_SOC_OMAP_HDMI) || \
301 defined(CONFIG_SND_OMAP_SOC_OMAP_HDMI_MODULE)
302
303static struct platform_device omap_hdmi_audio = {
304 .name = "omap-hdmi-audio",
305 .id = -1,
306};
307
308static void __init omap_init_hdmi_audio(void)
309{
310 struct omap_hwmod *oh;
311 struct platform_device *pdev;
312
313 oh = omap_hwmod_lookup("dss_hdmi");
314 if (!oh)
315 return;
316
317 pdev = omap_device_build("omap-hdmi-audio-dai", -1, oh, NULL, 0);
318 WARN(IS_ERR(pdev),
319 "Can't build omap_device for omap-hdmi-audio-dai.\n");
320
321 platform_device_register(&omap_hdmi_audio);
322}
323#else
324static inline void omap_init_hdmi_audio(void) {}
325#endif
326
327#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) 300#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
328 301
329#include <linux/platform_data/spi-omap2-mcspi.h> 302#include <linux/platform_data/spi-omap2-mcspi.h>
@@ -459,7 +432,6 @@ static int __init omap2_init_devices(void)
459 */ 432 */
460 omap_init_audio(); 433 omap_init_audio();
461 omap_init_camera(); 434 omap_init_camera();
462 omap_init_hdmi_audio();
463 omap_init_mbox(); 435 omap_init_mbox();
464 /* If dtb is there, the devices will be created dynamically */ 436 /* If dtb is there, the devices will be created dynamically */
465 if (!of_have_populated_dt()) { 437 if (!of_have_populated_dt()) {
diff --git a/arch/arm/mach-omap2/dsp.c b/arch/arm/mach-omap2/dsp.c
index b8208b4b1bd9..f7492df1cbba 100644
--- a/arch/arm/mach-omap2/dsp.c
+++ b/arch/arm/mach-omap2/dsp.c
@@ -29,6 +29,7 @@
29#ifdef CONFIG_TIDSPBRIDGE_DVFS 29#ifdef CONFIG_TIDSPBRIDGE_DVFS
30#include "omap-pm.h" 30#include "omap-pm.h"
31#endif 31#endif
32#include "soc.h"
32 33
33#include <linux/platform_data/dsp-omap.h> 34#include <linux/platform_data/dsp-omap.h>
34 35
@@ -59,6 +60,9 @@ void __init omap_dsp_reserve_sdram_memblock(void)
59 phys_addr_t size = CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE; 60 phys_addr_t size = CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE;
60 phys_addr_t paddr; 61 phys_addr_t paddr;
61 62
63 if (!cpu_is_omap34xx())
64 return;
65
62 if (!size) 66 if (!size)
63 return; 67 return;
64 68
@@ -83,6 +87,9 @@ static int __init omap_dsp_init(void)
83 int err = -ENOMEM; 87 int err = -ENOMEM;
84 struct omap_dsp_platform_data *pdata = &omap_dsp_pdata; 88 struct omap_dsp_platform_data *pdata = &omap_dsp_pdata;
85 89
90 if (!cpu_is_omap34xx())
91 return 0;
92
86 pdata->phys_mempool_base = omap_dsp_get_mempool_base(); 93 pdata->phys_mempool_base = omap_dsp_get_mempool_base();
87 94
88 if (pdata->phys_mempool_base) { 95 if (pdata->phys_mempool_base) {
@@ -115,6 +122,9 @@ module_init(omap_dsp_init);
115 122
116static void __exit omap_dsp_exit(void) 123static void __exit omap_dsp_exit(void)
117{ 124{
125 if (!cpu_is_omap34xx())
126 return;
127
118 platform_device_unregister(omap_dsp_pdev); 128 platform_device_unregister(omap_dsp_pdev);
119} 129}
120module_exit(omap_dsp_exit); 130module_exit(omap_dsp_exit);
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 2c0c2816900f..8bc13380f0a0 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -1615,7 +1615,7 @@ static int gpmc_probe_dt(struct platform_device *pdev)
1615 return ret; 1615 return ret;
1616 } 1616 }
1617 1617
1618 for_each_child_of_node(pdev->dev.of_node, child) { 1618 for_each_available_child_of_node(pdev->dev.of_node, child) {
1619 1619
1620 if (!child->name) 1620 if (!child->name)
1621 continue; 1621 continue;
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 43969da5d50b..d42022f2a71e 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -649,6 +649,18 @@ void __init dra7xxx_check_revision(void)
649 } 649 }
650 break; 650 break;
651 651
652 case 0xb9bc:
653 switch (rev) {
654 case 0:
655 omap_revision = DRA722_REV_ES1_0;
656 break;
657 default:
658 /* If we have no new revisions */
659 omap_revision = DRA722_REV_ES1_0;
660 break;
661 }
662 break;
663
652 default: 664 default:
653 /* Unknown default to latest silicon rev as default*/ 665 /* Unknown default to latest silicon rev as default*/
654 pr_warn("%s: unknown idcode=0x%08x (hawkeye=0x%08x,rev=0x%d)\n", 666 pr_warn("%s: unknown idcode=0x%08x (hawkeye=0x%08x,rev=0x%d)\n",
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index fd88edeb027f..f62f7537d899 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -183,8 +183,10 @@ static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition,
183 m0_entry = mux->muxnames[0]; 183 m0_entry = mux->muxnames[0];
184 184
185 /* First check for full name in mode0.muxmode format */ 185 /* First check for full name in mode0.muxmode format */
186 if (mode0_len && strncmp(muxname, m0_entry, mode0_len)) 186 if (mode0_len)
187 continue; 187 if (strncmp(muxname, m0_entry, mode0_len) ||
188 (strlen(m0_entry) != mode0_len))
189 continue;
188 190
189 /* Then check for muxmode only */ 191 /* Then check for muxmode only */
190 for (i = 0; i < OMAP_MUX_NR_MODES; i++) { 192 for (i = 0; i < OMAP_MUX_NR_MODES; i++) {
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 326cd982a3cb..539e8106eb96 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -102,26 +102,6 @@ void __init omap_barriers_init(void)
102{} 102{}
103#endif 103#endif
104 104
105void __init gic_init_irq(void)
106{
107 void __iomem *omap_irq_base;
108
109 /* Static mapping, never released */
110 gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
111 BUG_ON(!gic_dist_base_addr);
112
113 twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_4K);
114 BUG_ON(!twd_base);
115
116 /* Static mapping, never released */
117 omap_irq_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
118 BUG_ON(!omap_irq_base);
119
120 omap_wakeupgen_init();
121
122 gic_init(0, 29, gic_dist_base_addr, omap_irq_base);
123}
124
125void gic_dist_disable(void) 105void gic_dist_disable(void)
126{ 106{
127 if (gic_dist_base_addr) 107 if (gic_dist_base_addr)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index f7bb435bb543..6c074f37cdd2 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -4251,9 +4251,9 @@ void __init omap_hwmod_init(void)
4251 soc_ops.enable_module = _omap4_enable_module; 4251 soc_ops.enable_module = _omap4_enable_module;
4252 soc_ops.disable_module = _omap4_disable_module; 4252 soc_ops.disable_module = _omap4_disable_module;
4253 soc_ops.wait_target_ready = _omap4_wait_target_ready; 4253 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4254 soc_ops.assert_hardreset = _omap4_assert_hardreset; 4254 soc_ops.assert_hardreset = _am33xx_assert_hardreset;
4255 soc_ops.deassert_hardreset = _omap4_deassert_hardreset; 4255 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
4256 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted; 4256 soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
4257 soc_ops.init_clkdm = _init_clkdm; 4257 soc_ops.init_clkdm = _init_clkdm;
4258 } else if (soc_is_am33xx()) { 4258 } else if (soc_is_am33xx()) {
4259 soc_ops.enable_module = _am33xx_enable_module; 4259 soc_ops.enable_module = _am33xx_enable_module;
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
index 290213f2cbe3..1103aa0e0d29 100644
--- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
@@ -2020,6 +2020,77 @@ static struct omap_hwmod omap54xx_wd_timer2_hwmod = {
2020 }, 2020 },
2021}; 2021};
2022 2022
2023/*
2024 * 'ocp2scp' class
2025 * bridge to transform ocp interface protocol to scp (serial control port)
2026 * protocol
2027 */
2028/* ocp2scp3 */
2029static struct omap_hwmod omap54xx_ocp2scp3_hwmod;
2030/* l4_cfg -> ocp2scp3 */
2031static struct omap_hwmod_ocp_if omap54xx_l4_cfg__ocp2scp3 = {
2032 .master = &omap54xx_l4_cfg_hwmod,
2033 .slave = &omap54xx_ocp2scp3_hwmod,
2034 .clk = "l4_root_clk_div",
2035 .user = OCP_USER_MPU | OCP_USER_SDMA,
2036};
2037
2038static struct omap_hwmod omap54xx_ocp2scp3_hwmod = {
2039 .name = "ocp2scp3",
2040 .class = &omap54xx_ocp2scp_hwmod_class,
2041 .clkdm_name = "l3init_clkdm",
2042 .prcm = {
2043 .omap4 = {
2044 .clkctrl_offs = OMAP54XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
2045 .context_offs = OMAP54XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
2046 .modulemode = MODULEMODE_HWCTRL,
2047 },
2048 },
2049};
2050
2051/*
2052 * 'sata' class
2053 * sata: serial ata interface gen2 compliant ( 1 rx/ 1 tx)
2054 */
2055
2056static struct omap_hwmod_class_sysconfig omap54xx_sata_sysc = {
2057 .sysc_offs = 0x0000,
2058 .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
2059 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
2060 SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
2061 MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
2062 .sysc_fields = &omap_hwmod_sysc_type2,
2063};
2064
2065static struct omap_hwmod_class omap54xx_sata_hwmod_class = {
2066 .name = "sata",
2067 .sysc = &omap54xx_sata_sysc,
2068};
2069
2070/* sata */
2071static struct omap_hwmod omap54xx_sata_hwmod = {
2072 .name = "sata",
2073 .class = &omap54xx_sata_hwmod_class,
2074 .clkdm_name = "l3init_clkdm",
2075 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
2076 .main_clk = "func_48m_fclk",
2077 .mpu_rt_idx = 1,
2078 .prcm = {
2079 .omap4 = {
2080 .clkctrl_offs = OMAP54XX_CM_L3INIT_SATA_CLKCTRL_OFFSET,
2081 .context_offs = OMAP54XX_RM_L3INIT_SATA_CONTEXT_OFFSET,
2082 .modulemode = MODULEMODE_SWCTRL,
2083 },
2084 },
2085};
2086
2087/* l4_cfg -> sata */
2088static struct omap_hwmod_ocp_if omap54xx_l4_cfg__sata = {
2089 .master = &omap54xx_l4_cfg_hwmod,
2090 .slave = &omap54xx_sata_hwmod,
2091 .clk = "l3_iclk_div",
2092 .user = OCP_USER_MPU | OCP_USER_SDMA,
2093};
2023 2094
2024/* 2095/*
2025 * Interfaces 2096 * Interfaces
@@ -2765,6 +2836,8 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
2765 &omap54xx_l4_cfg__usb_tll_hs, 2836 &omap54xx_l4_cfg__usb_tll_hs,
2766 &omap54xx_l4_cfg__usb_otg_ss, 2837 &omap54xx_l4_cfg__usb_otg_ss,
2767 &omap54xx_l4_wkup__wd_timer2, 2838 &omap54xx_l4_wkup__wd_timer2,
2839 &omap54xx_l4_cfg__ocp2scp3,
2840 &omap54xx_l4_cfg__sata,
2768 NULL, 2841 NULL,
2769}; 2842};
2770 2843
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 20b4398cec05..284324f2b98a 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1268,9 +1268,6 @@ static struct omap_hwmod_class dra7xx_sata_hwmod_class = {
1268}; 1268};
1269 1269
1270/* sata */ 1270/* sata */
1271static struct omap_hwmod_opt_clk sata_opt_clks[] = {
1272 { .role = "ref_clk", .clk = "sata_ref_clk" },
1273};
1274 1271
1275static struct omap_hwmod dra7xx_sata_hwmod = { 1272static struct omap_hwmod dra7xx_sata_hwmod = {
1276 .name = "sata", 1273 .name = "sata",
@@ -1278,6 +1275,7 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
1278 .clkdm_name = "l3init_clkdm", 1275 .clkdm_name = "l3init_clkdm",
1279 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, 1276 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
1280 .main_clk = "func_48m_fclk", 1277 .main_clk = "func_48m_fclk",
1278 .mpu_rt_idx = 1,
1281 .prcm = { 1279 .prcm = {
1282 .omap4 = { 1280 .omap4 = {
1283 .clkctrl_offs = DRA7XX_CM_L3INIT_SATA_CLKCTRL_OFFSET, 1281 .clkctrl_offs = DRA7XX_CM_L3INIT_SATA_CLKCTRL_OFFSET,
@@ -1285,8 +1283,6 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
1285 .modulemode = MODULEMODE_SWCTRL, 1283 .modulemode = MODULEMODE_SWCTRL,
1286 }, 1284 },
1287 }, 1285 },
1288 .opt_clks = sata_opt_clks,
1289 .opt_clks_cnt = ARRAY_SIZE(sata_opt_clks),
1290}; 1286};
1291 1287
1292/* 1288/*
@@ -1731,8 +1727,20 @@ static struct omap_hwmod dra7xx_uart6_hwmod = {
1731 * 1727 *
1732 */ 1728 */
1733 1729
1730static struct omap_hwmod_class_sysconfig dra7xx_usb_otg_ss_sysc = {
1731 .rev_offs = 0x0000,
1732 .sysc_offs = 0x0010,
1733 .sysc_flags = (SYSC_HAS_DMADISABLE | SYSC_HAS_MIDLEMODE |
1734 SYSC_HAS_SIDLEMODE),
1735 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
1736 SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
1737 MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
1738 .sysc_fields = &omap_hwmod_sysc_type2,
1739};
1740
1734static struct omap_hwmod_class dra7xx_usb_otg_ss_hwmod_class = { 1741static struct omap_hwmod_class dra7xx_usb_otg_ss_hwmod_class = {
1735 .name = "usb_otg_ss", 1742 .name = "usb_otg_ss",
1743 .sysc = &dra7xx_usb_otg_ss_sysc,
1736}; 1744};
1737 1745
1738/* usb_otg_ss1 */ 1746/* usb_otg_ss1 */
diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h
index 106132db532b..cbefbd7cfdb5 100644
--- a/arch/arm/mach-omap2/prm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/prm-regbits-34xx.h
@@ -35,6 +35,8 @@
35#define OMAP3430_LOGICSTATEST_MASK (1 << 2) 35#define OMAP3430_LOGICSTATEST_MASK (1 << 2)
36#define OMAP3430_LASTLOGICSTATEENTERED_MASK (1 << 2) 36#define OMAP3430_LASTLOGICSTATEENTERED_MASK (1 << 2)
37#define OMAP3430_LASTPOWERSTATEENTERED_MASK (0x3 << 0) 37#define OMAP3430_LASTPOWERSTATEENTERED_MASK (0x3 << 0)
38#define OMAP3430_GRPSEL_MCBSP5_MASK (1 << 10)
39#define OMAP3430_GRPSEL_MCBSP1_MASK (1 << 9)
38#define OMAP3630_GRPSEL_UART4_MASK (1 << 18) 40#define OMAP3630_GRPSEL_UART4_MASK (1 << 18)
39#define OMAP3430_GRPSEL_GPIO6_MASK (1 << 17) 41#define OMAP3430_GRPSEL_GPIO6_MASK (1 << 17)
40#define OMAP3430_GRPSEL_GPIO5_MASK (1 << 16) 42#define OMAP3430_GRPSEL_GPIO5_MASK (1 << 16)
@@ -42,6 +44,10 @@
42#define OMAP3430_GRPSEL_GPIO3_MASK (1 << 14) 44#define OMAP3430_GRPSEL_GPIO3_MASK (1 << 14)
43#define OMAP3430_GRPSEL_GPIO2_MASK (1 << 13) 45#define OMAP3430_GRPSEL_GPIO2_MASK (1 << 13)
44#define OMAP3430_GRPSEL_UART3_MASK (1 << 11) 46#define OMAP3430_GRPSEL_UART3_MASK (1 << 11)
47#define OMAP3430_GRPSEL_GPT8_MASK (1 << 9)
48#define OMAP3430_GRPSEL_GPT7_MASK (1 << 8)
49#define OMAP3430_GRPSEL_GPT6_MASK (1 << 7)
50#define OMAP3430_GRPSEL_GPT5_MASK (1 << 6)
45#define OMAP3430_GRPSEL_MCBSP4_MASK (1 << 2) 51#define OMAP3430_GRPSEL_MCBSP4_MASK (1 << 2)
46#define OMAP3430_GRPSEL_MCBSP3_MASK (1 << 1) 52#define OMAP3430_GRPSEL_MCBSP3_MASK (1 << 1)
47#define OMAP3430_GRPSEL_MCBSP2_MASK (1 << 0) 53#define OMAP3430_GRPSEL_MCBSP2_MASK (1 << 0)
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index de2a34c423a7..01ca8086fb6c 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -462,6 +462,7 @@ IS_OMAP_TYPE(3430, 0x3430)
462#define DRA7XX_CLASS 0x07000000 462#define DRA7XX_CLASS 0x07000000
463#define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8)) 463#define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8))
464#define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8)) 464#define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8))
465#define DRA722_REV_ES1_0 (DRA7XX_CLASS | (0x22 << 16) | (0x10 << 8))
465 466
466void omap2xxx_check_revision(void); 467void omap2xxx_check_revision(void);
467void omap3xxx_check_revision(void); 468void omap3xxx_check_revision(void);
diff --git a/arch/arm/mach-prima2/Kconfig b/arch/arm/mach-prima2/Kconfig
index e4e505f52ba0..042f693ef423 100644
--- a/arch/arm/mach-prima2/Kconfig
+++ b/arch/arm/mach-prima2/Kconfig
@@ -1,4 +1,4 @@
1config ARCH_SIRF 1menuconfig ARCH_SIRF
2 bool "CSR SiRF" if ARCH_MULTI_V7 2 bool "CSR SiRF" if ARCH_MULTI_V7
3 select ARCH_HAS_RESET_CONTROLLER 3 select ARCH_HAS_RESET_CONTROLLER
4 select ARCH_REQUIRE_GPIOLIB 4 select ARCH_REQUIRE_GPIOLIB
@@ -11,7 +11,7 @@ config ARCH_SIRF
11 11
12if ARCH_SIRF 12if ARCH_SIRF
13 13
14menu "CSR SiRF atlas6/primaII/Marco/Polo Specific Features" 14comment "CSR SiRF atlas6/primaII/Marco/Polo Specific Features"
15 15
16config ARCH_ATLAS6 16config ARCH_ATLAS6
17 bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform" 17 bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform"
@@ -37,8 +37,6 @@ config ARCH_MARCO
37 help 37 help
38 Support for CSR SiRFSoC ARM Cortex A9 Platform 38 Support for CSR SiRFSoC ARM Cortex A9 Platform
39 39
40endmenu
41
42config SIRF_IRQ 40config SIRF_IRQ
43 bool 41 bool
44 42
diff --git a/arch/arm/mach-qcom/Kconfig b/arch/arm/mach-qcom/Kconfig
index fd2b99dceb89..ee5697ba05bc 100644
--- a/arch/arm/mach-qcom/Kconfig
+++ b/arch/arm/mach-qcom/Kconfig
@@ -1,4 +1,4 @@
1config ARCH_QCOM 1menuconfig ARCH_QCOM
2 bool "Qualcomm Support" if ARCH_MULTI_V7 2 bool "Qualcomm Support" if ARCH_MULTI_V7
3 select ARCH_REQUIRE_GPIOLIB 3 select ARCH_REQUIRE_GPIOLIB
4 select ARM_GIC 4 select ARM_GIC
@@ -11,8 +11,6 @@ config ARCH_QCOM
11 11
12if ARCH_QCOM 12if ARCH_QCOM
13 13
14menu "Qualcomm SoC Selection"
15
16config ARCH_MSM8X60 14config ARCH_MSM8X60
17 bool "Enable support for MSM8X60" 15 bool "Enable support for MSM8X60"
18 select CLKSRC_QCOM 16 select CLKSRC_QCOM
@@ -25,8 +23,6 @@ config ARCH_MSM8974
25 bool "Enable support for MSM8974" 23 bool "Enable support for MSM8974"
26 select HAVE_ARM_ARCH_TIMER 24 select HAVE_ARM_ARCH_TIMER
27 25
28endmenu
29
30config QCOM_SCM 26config QCOM_SCM
31 bool 27 bool
32 28
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index 04284de7aca5..ad5316ae524e 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -117,7 +117,7 @@ config S3C24XX_SETUP_TS
117 Compile in platform device definition for Samsung TouchScreen. 117 Compile in platform device definition for Samsung TouchScreen.
118 118
119config S3C24XX_DMA 119config S3C24XX_DMA
120 bool "S3C2410 DMA support" 120 bool "S3C2410 DMA support (deprecated)"
121 select S3C_DMA 121 select S3C_DMA
122 help 122 help
123 S3C2410 DMA support. This is needed for drivers like sound which 123 S3C2410 DMA support. This is needed for drivers like sound which
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index 3136d86b0d6e..26ca2427e53d 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -18,9 +18,9 @@ config CPU_S3C6410
18 Enable S3C6410 CPU support 18 Enable S3C6410 CPU support
19 19
20config S3C64XX_PL080 20config S3C64XX_PL080
21 bool "S3C64XX DMA using generic PL08x driver" 21 def_bool DMADEVICES
22 select ARM_AMBA
22 select AMBA_PL08X 23 select AMBA_PL08X
23 select SAMSUNG_DMADEV
24 24
25config S3C64XX_SETUP_SDHCI 25config S3C64XX_SETUP_SDHCI
26 bool 26 bool
diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig
index bb2111b3751e..26003e23796d 100644
--- a/arch/arm/mach-s5p64x0/Kconfig
+++ b/arch/arm/mach-s5p64x0/Kconfig
@@ -9,16 +9,18 @@ if ARCH_S5P64X0
9 9
10config CPU_S5P6440 10config CPU_S5P6440
11 bool 11 bool
12 select ARM_AMBA
13 select PL330_DMA if DMADEVICES
12 select S5P_SLEEP if PM 14 select S5P_SLEEP if PM
13 select SAMSUNG_DMADEV
14 select SAMSUNG_WAKEMASK if PM 15 select SAMSUNG_WAKEMASK if PM
15 help 16 help
16 Enable S5P6440 CPU support 17 Enable S5P6440 CPU support
17 18
18config CPU_S5P6450 19config CPU_S5P6450
19 bool 20 bool
21 select ARM_AMBA
22 select PL330_DMA if DMADEVICES
20 select S5P_SLEEP if PM 23 select S5P_SLEEP if PM
21 select SAMSUNG_DMADEV
22 select SAMSUNG_WAKEMASK if PM 24 select SAMSUNG_WAKEMASK if PM
23 help 25 help
24 Enable S5P6450 CPU support 26 Enable S5P6450 CPU support
diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig
index 15170be97a74..c5e3a969b063 100644
--- a/arch/arm/mach-s5pc100/Kconfig
+++ b/arch/arm/mach-s5pc100/Kconfig
@@ -9,8 +9,9 @@ if ARCH_S5PC100
9 9
10config CPU_S5PC100 10config CPU_S5PC100
11 bool 11 bool
12 select ARM_AMBA
13 select PL330_DMA if DMADEVICES
12 select S5P_EXT_INT 14 select S5P_EXT_INT
13 select SAMSUNG_DMADEV
14 help 15 help
15 Enable S5PC100 CPU support 16 Enable S5PC100 CPU support
16 17
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index 8c3abe521757..f60f2862856d 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -11,10 +11,11 @@ if ARCH_S5PV210
11 11
12config CPU_S5PV210 12config CPU_S5PV210
13 bool 13 bool
14 select ARM_AMBA
15 select PL330_DMA if DMADEVICES
14 select S5P_EXT_INT 16 select S5P_EXT_INT
15 select S5P_PM if PM 17 select S5P_PM if PM
16 select S5P_SLEEP if PM 18 select S5P_SLEEP if PM
17 select SAMSUNG_DMADEV
18 help 19 help
19 Enable S5PV210 CPU support 20 Enable S5PV210 CPU support
20 21
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index f9874ba60cc8..108939f8d053 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -329,6 +329,11 @@ static struct mtd_partition collie_partitions[] = {
329 .name = "rootfs", 329 .name = "rootfs",
330 .offset = MTDPART_OFS_APPEND, 330 .offset = MTDPART_OFS_APPEND,
331 .size = 0x00e20000, 331 .size = 0x00e20000,
332 }, {
333 .name = "bootblock",
334 .offset = MTDPART_OFS_APPEND,
335 .size = 0x00020000,
336 .mask_flags = MTD_WRITEABLE
332 } 337 }
333}; 338};
334 339
@@ -356,7 +361,7 @@ static void collie_flash_exit(void)
356} 361}
357 362
358static struct flash_platform_data collie_flash_data = { 363static struct flash_platform_data collie_flash_data = {
359 .map_name = "jedec_probe", 364 .map_name = "cfi_probe",
360 .init = collie_flash_init, 365 .init = collie_flash_init,
361 .set_vpp = collie_set_vpp, 366 .set_vpp = collie_set_vpp,
362 .exit = collie_flash_exit, 367 .exit = collie_flash_exit,
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index dbd954e61aa7..798073057e51 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -1,7 +1,7 @@
1config ARCH_SHMOBILE 1config ARCH_SHMOBILE
2 bool 2 bool
3 3
4config ARCH_SHMOBILE_MULTI 4menuconfig ARCH_SHMOBILE_MULTI
5 bool "Renesas ARM SoCs" if ARCH_MULTI_V7 5 bool "Renesas ARM SoCs" if ARCH_MULTI_V7
6 depends on MMU 6 depends on MMU
7 select ARCH_SHMOBILE 7 select ARCH_SHMOBILE
@@ -15,7 +15,7 @@ config ARCH_SHMOBILE_MULTI
15 15
16if ARCH_SHMOBILE_MULTI 16if ARCH_SHMOBILE_MULTI
17 17
18comment "Renesas ARM SoCs System Type" 18#comment "Renesas ARM SoCs System Type"
19 19
20config ARCH_EMEV2 20config ARCH_EMEV2
21 bool "Emma Mobile EV2" 21 bool "Emma Mobile EV2"
@@ -85,7 +85,6 @@ config ARCH_R8A73A4
85 select CPU_V7 85 select CPU_V7
86 select SH_CLK_CPG 86 select SH_CLK_CPG
87 select RENESAS_IRQC 87 select RENESAS_IRQC
88 select ARCH_HAS_CPUFREQ
89 select ARCH_HAS_OPP 88 select ARCH_HAS_OPP
90 select SYS_SUPPORTS_SH_CMT 89 select SYS_SUPPORTS_SH_CMT
91 select SYS_SUPPORTS_SH_TMU 90 select SYS_SUPPORTS_SH_TMU
@@ -264,7 +263,6 @@ config MACH_KOELSCH
264config MACH_KZM9G 263config MACH_KZM9G
265 bool "KZM-A9-GT board" 264 bool "KZM-A9-GT board"
266 depends on ARCH_SH73A0 265 depends on ARCH_SH73A0
267 select ARCH_HAS_CPUFREQ
268 select ARCH_HAS_OPP 266 select ARCH_HAS_OPP
269 select ARCH_REQUIRE_GPIOLIB 267 select ARCH_REQUIRE_GPIOLIB
270 select REGULATOR_FIXED_VOLTAGE if REGULATOR 268 select REGULATOR_FIXED_VOLTAGE if REGULATOR
diff --git a/arch/arm/mach-spear/Kconfig b/arch/arm/mach-spear/Kconfig
index 0786249b2832..90df2022276a 100644
--- a/arch/arm/mach-spear/Kconfig
+++ b/arch/arm/mach-spear/Kconfig
@@ -14,7 +14,6 @@ if PLAT_SPEAR
14config ARCH_SPEAR13XX 14config ARCH_SPEAR13XX
15 bool "ST SPEAr13xx" 15 bool "ST SPEAr13xx"
16 depends on ARCH_MULTI_V7 || PLAT_SPEAR_SINGLE 16 depends on ARCH_MULTI_V7 || PLAT_SPEAR_SINGLE
17 select ARCH_HAS_CPUFREQ
18 select ARM_GIC 17 select ARM_GIC
19 select GPIO_SPEAR_SPICS 18 select GPIO_SPEAR_SPICS
20 select HAVE_ARM_SCU if SMP 19 select HAVE_ARM_SCU if SMP
diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig
index abf9ee9bbc3f..878e9ec97d0f 100644
--- a/arch/arm/mach-sti/Kconfig
+++ b/arch/arm/mach-sti/Kconfig
@@ -1,5 +1,5 @@
1menuconfig ARCH_STI 1menuconfig ARCH_STI
2 bool "STMicroelectronics Consumer Electronics SOCs with Device Trees" if ARCH_MULTI_V7 2 bool "STMicroelectronics Consumer Electronics SOCs" if ARCH_MULTI_V7
3 select ARM_GIC 3 select ARM_GIC
4 select ARM_GLOBAL_TIMER 4 select ARM_GLOBAL_TIMER
5 select PINCTRL 5 select PINCTRL
@@ -11,8 +11,8 @@ menuconfig ARCH_STI
11 select ARM_ERRATA_754322 11 select ARM_ERRATA_754322
12 select ARM_ERRATA_764369 if SMP 12 select ARM_ERRATA_764369 if SMP
13 select ARM_ERRATA_775420 13 select ARM_ERRATA_775420
14 select PL310_ERRATA_753970 if CACHE_PL310 14 select PL310_ERRATA_753970 if CACHE_L2X0
15 select PL310_ERRATA_769419 if CACHE_PL310 15 select PL310_ERRATA_769419 if CACHE_L2X0
16 help 16 help
17 Include support for STiH41x SOCs like STiH415/416 using the device tree 17 Include support for STiH41x SOCs like STiH415/416 using the device tree
18 for discovery 18 for discovery
diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c
index 3f9587bb51f6..b6085084e0ff 100644
--- a/arch/arm/mach-sunxi/sunxi.c
+++ b/arch/arm/mach-sunxi/sunxi.c
@@ -12,8 +12,81 @@
12 12
13#include <linux/clk-provider.h> 13#include <linux/clk-provider.h>
14#include <linux/clocksource.h> 14#include <linux/clocksource.h>
15#include <linux/delay.h>
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/of_address.h>
19#include <linux/of_irq.h>
20#include <linux/of_platform.h>
21#include <linux/io.h>
22#include <linux/reboot.h>
15 23
16#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
25#include <asm/mach/map.h>
26#include <asm/system_misc.h>
27
28#define SUN4I_WATCHDOG_CTRL_REG 0x00
29#define SUN4I_WATCHDOG_CTRL_RESTART BIT(0)
30#define SUN4I_WATCHDOG_MODE_REG 0x04
31#define SUN4I_WATCHDOG_MODE_ENABLE BIT(0)
32#define SUN4I_WATCHDOG_MODE_RESET_ENABLE BIT(1)
33
34#define SUN6I_WATCHDOG1_IRQ_REG 0x00
35#define SUN6I_WATCHDOG1_CTRL_REG 0x10
36#define SUN6I_WATCHDOG1_CTRL_RESTART BIT(0)
37#define SUN6I_WATCHDOG1_CONFIG_REG 0x14
38#define SUN6I_WATCHDOG1_CONFIG_RESTART BIT(0)
39#define SUN6I_WATCHDOG1_CONFIG_IRQ BIT(1)
40#define SUN6I_WATCHDOG1_MODE_REG 0x18
41#define SUN6I_WATCHDOG1_MODE_ENABLE BIT(0)
42
43static void __iomem *wdt_base;
44
45static void sun4i_restart(enum reboot_mode mode, const char *cmd)
46{
47 if (!wdt_base)
48 return;
49
50 /* Enable timer and set reset bit in the watchdog */
51 writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
52 wdt_base + SUN4I_WATCHDOG_MODE_REG);
53
54 /*
55 * Restart the watchdog. The default (and lowest) interval
56 * value for the watchdog is 0.5s.
57 */
58 writel(SUN4I_WATCHDOG_CTRL_RESTART, wdt_base + SUN4I_WATCHDOG_CTRL_REG);
59
60 while (1) {
61 mdelay(5);
62 writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
63 wdt_base + SUN4I_WATCHDOG_MODE_REG);
64 }
65}
66
67static struct of_device_id sunxi_restart_ids[] = {
68 { .compatible = "allwinner,sun4i-a10-wdt" },
69 { /*sentinel*/ }
70};
71
72static void sunxi_setup_restart(void)
73{
74 struct device_node *np;
75
76 np = of_find_matching_node(NULL, sunxi_restart_ids);
77 if (WARN(!np, "unable to setup watchdog restart"))
78 return;
79
80 wdt_base = of_iomap(np, 0);
81 WARN(!wdt_base, "failed to map watchdog base address");
82}
83
84static void __init sunxi_dt_init(void)
85{
86 sunxi_setup_restart();
87
88 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
89}
17 90
18static const char * const sunxi_board_dt_compat[] = { 91static const char * const sunxi_board_dt_compat[] = {
19 "allwinner,sun4i-a10", 92 "allwinner,sun4i-a10",
@@ -23,7 +96,9 @@ static const char * const sunxi_board_dt_compat[] = {
23}; 96};
24 97
25DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)") 98DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")
99 .init_machine = sunxi_dt_init,
26 .dt_compat = sunxi_board_dt_compat, 100 .dt_compat = sunxi_board_dt_compat,
101 .restart = sun4i_restart,
27MACHINE_END 102MACHINE_END
28 103
29static const char * const sun6i_board_dt_compat[] = { 104static const char * const sun6i_board_dt_compat[] = {
@@ -51,5 +126,7 @@ static const char * const sun7i_board_dt_compat[] = {
51}; 126};
52 127
53DT_MACHINE_START(SUN7I_DT, "Allwinner sun7i (A20) Family") 128DT_MACHINE_START(SUN7I_DT, "Allwinner sun7i (A20) Family")
129 .init_machine = sunxi_dt_init,
54 .dt_compat = sun7i_board_dt_compat, 130 .dt_compat = sun7i_board_dt_compat,
131 .restart = sun4i_restart,
55MACHINE_END 132MACHINE_END
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index e16999e5b735..095399618ca5 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -1,6 +1,5 @@
1config ARCH_TEGRA 1menuconfig ARCH_TEGRA
2 bool "NVIDIA Tegra" if ARCH_MULTI_V7 2 bool "NVIDIA Tegra" if ARCH_MULTI_V7
3 select ARCH_HAS_CPUFREQ
4 select ARCH_REQUIRE_GPIOLIB 3 select ARCH_REQUIRE_GPIOLIB
5 select ARCH_SUPPORTS_TRUSTED_FOUNDATIONS 4 select ARCH_SUPPORTS_TRUSTED_FOUNDATIONS
6 select ARM_GIC 5 select ARM_GIC
@@ -16,8 +15,7 @@ config ARCH_TEGRA
16 help 15 help
17 This enables support for NVIDIA Tegra based systems. 16 This enables support for NVIDIA Tegra based systems.
18 17
19menu "NVIDIA Tegra options" 18if ARCH_TEGRA
20 depends on ARCH_TEGRA
21 19
22config ARCH_TEGRA_2x_SOC 20config ARCH_TEGRA_2x_SOC
23 bool "Enable support for Tegra20 family" 21 bool "Enable support for Tegra20 family"
@@ -69,4 +67,4 @@ config TEGRA_AHB
69 which controls AHB bus master arbitration and some 67 which controls AHB bus master arbitration and some
70 performance parameters(priority, prefech size). 68 performance parameters(priority, prefech size).
71 69
72endmenu 70endif
diff --git a/arch/arm/mach-u300/Kconfig b/arch/arm/mach-u300/Kconfig
index e3a96d7302e9..bc51a71394af 100644
--- a/arch/arm/mach-u300/Kconfig
+++ b/arch/arm/mach-u300/Kconfig
@@ -1,4 +1,4 @@
1config ARCH_U300 1menuconfig ARCH_U300
2 bool "ST-Ericsson U300 Series" if ARCH_MULTI_V5 2 bool "ST-Ericsson U300 Series" if ARCH_MULTI_V5
3 depends on MMU 3 depends on MMU
4 select ARCH_REQUIRE_GPIOLIB 4 select ARCH_REQUIRE_GPIOLIB
@@ -16,8 +16,6 @@ config ARCH_U300
16 16
17if ARCH_U300 17if ARCH_U300
18 18
19menu "ST-Ericsson AB U300/U335 Platform"
20
21config MACH_U300 19config MACH_U300
22 depends on ARCH_U300 20 depends on ARCH_U300
23 bool "U300" 21 bool "U300"
@@ -43,6 +41,4 @@ config MACH_U300_SPIDUMMY
43 you don't need it. Selecting this will activate the 41 you don't need it. Selecting this will activate the
44 SPI framework and ARM PL022 support. 42 SPI framework and ARM PL022 support.
45 43
46endmenu
47
48endif 44endif
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index b41a42da1505..699e8601dbf0 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -1,9 +1,8 @@
1config ARCH_U8500 1menuconfig ARCH_U8500
2 bool "ST-Ericsson U8500 Series" if ARCH_MULTI_V7 2 bool "ST-Ericsson U8500 Series" if ARCH_MULTI_V7
3 depends on MMU 3 depends on MMU
4 select AB8500_CORE 4 select AB8500_CORE
5 select ABX500_CORE 5 select ABX500_CORE
6 select ARCH_HAS_CPUFREQ
7 select ARCH_REQUIRE_GPIOLIB 6 select ARCH_REQUIRE_GPIOLIB
8 select ARM_AMBA 7 select ARM_AMBA
9 select ARM_ERRATA_754322 8 select ARM_ERRATA_754322
@@ -16,7 +15,7 @@ config ARCH_U8500
16 select PINCTRL 15 select PINCTRL
17 select PINCTRL_ABX500 16 select PINCTRL_ABX500
18 select PINCTRL_NOMADIK 17 select PINCTRL_NOMADIK
19 select PL310_ERRATA_753970 if CACHE_PL310 18 select PL310_ERRATA_753970 if CACHE_L2X0
20 help 19 help
21 Support for ST-Ericsson's Ux500 architecture 20 Support for ST-Ericsson's Ux500 architecture
22 21
@@ -34,8 +33,6 @@ config UX500_SOC_DB8500
34 select REGULATOR 33 select REGULATOR
35 select REGULATOR_DB8500_PRCMU 34 select REGULATOR_DB8500_PRCMU
36 35
37menu "Ux500 target platform (boards)"
38
39config MACH_MOP500 36config MACH_MOP500
40 bool "U8500 Development platform, MOP500 versions" 37 bool "U8500 Development platform, MOP500 versions"
41 select I2C 38 select I2C
@@ -68,8 +65,6 @@ config UX500_AUTO_PLATFORM
68 a working kernel. If everything else is disabled, this 65 a working kernel. If everything else is disabled, this
69 automatically enables MACH_MOP500. 66 automatically enables MACH_MOP500.
70 67
71endmenu
72
73config UX500_DEBUG_UART 68config UX500_DEBUG_UART
74 int "Ux500 UART to use for low-level debug" 69 int "Ux500 UART to use for low-level debug"
75 default 2 70 default 2
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
index 90249cfc37b3..d8b9330f896a 100644
--- a/arch/arm/mach-vexpress/Kconfig
+++ b/arch/arm/mach-vexpress/Kconfig
@@ -1,4 +1,4 @@
1config ARCH_VEXPRESS 1menuconfig ARCH_VEXPRESS
2 bool "ARM Ltd. Versatile Express family" if ARCH_MULTI_V7 2 bool "ARM Ltd. Versatile Express family" if ARCH_MULTI_V7
3 select ARCH_REQUIRE_GPIOLIB 3 select ARCH_REQUIRE_GPIOLIB
4 select ARCH_SUPPORTS_BIG_ENDIAN 4 select ARCH_SUPPORTS_BIG_ENDIAN
@@ -37,14 +37,13 @@ config ARCH_VEXPRESS
37 platforms. The traditional (ATAGs) boot method is not usable on 37 platforms. The traditional (ATAGs) boot method is not usable on
38 these boards with this option. 38 these boards with this option.
39 39
40menu "Versatile Express platform type" 40if ARCH_VEXPRESS
41 depends on ARCH_VEXPRESS
42 41
43config ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA 42config ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA
44 bool "Enable A5 and A9 only errata work-arounds" 43 bool "Enable A5 and A9 only errata work-arounds"
45 default y 44 default y
46 select ARM_ERRATA_720789 45 select ARM_ERRATA_720789
47 select PL310_ERRATA_753970 if CACHE_PL310 46 select PL310_ERRATA_753970 if CACHE_L2X0
48 help 47 help
49 Provides common dependencies for Versatile Express platforms 48 Provides common dependencies for Versatile Express platforms
50 based on Cortex-A5 and Cortex-A9 processors. In order to 49 based on Cortex-A5 and Cortex-A9 processors. In order to
@@ -65,7 +64,6 @@ config ARCH_VEXPRESS_DCSCB
65 64
66config ARCH_VEXPRESS_SPC 65config ARCH_VEXPRESS_SPC
67 bool "Versatile Express Serial Power Controller (SPC)" 66 bool "Versatile Express Serial Power Controller (SPC)"
68 select ARCH_HAS_CPUFREQ
69 select ARCH_HAS_OPP 67 select ARCH_HAS_OPP
70 select PM_OPP 68 select PM_OPP
71 help 69 help
@@ -83,4 +81,4 @@ config ARCH_VEXPRESS_TC2_PM
83 Support for CPU and cluster power management on Versatile Express 81 Support for CPU and cluster power management on Versatile Express
84 with a TC2 (A15x2 A7x3) big.LITTLE core tile. 82 with a TC2 (A15x2 A7x3) big.LITTLE core tile.
85 83
86endmenu 84endif
diff --git a/arch/arm/mach-vt8500/Kconfig b/arch/arm/mach-vt8500/Kconfig
index 08f56a41cb55..aaaa24fe4d71 100644
--- a/arch/arm/mach-vt8500/Kconfig
+++ b/arch/arm/mach-vt8500/Kconfig
@@ -1,6 +1,5 @@
1config ARCH_VT8500 1config ARCH_VT8500
2 bool 2 bool
3 select ARCH_HAS_CPUFREQ
4 select ARCH_REQUIRE_GPIOLIB 3 select ARCH_REQUIRE_GPIOLIB
5 select CLKDEV_LOOKUP 4 select CLKDEV_LOOKUP
6 select VT8500_TIMER 5 select VT8500_TIMER
diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig
index 573e0db1d0f0..0c164f81e72d 100644
--- a/arch/arm/mach-zynq/Kconfig
+++ b/arch/arm/mach-zynq/Kconfig
@@ -1,6 +1,5 @@
1config ARCH_ZYNQ 1config ARCH_ZYNQ
2 bool "Xilinx Zynq ARM Cortex A9 Platform" if ARCH_MULTI_V7 2 bool "Xilinx Zynq ARM Cortex A9 Platform" if ARCH_MULTI_V7
3 select ARCH_HAS_CPUFREQ
4 select ARCH_HAS_OPP 3 select ARCH_HAS_OPP
5 select ARCH_SUPPORTS_BIG_ENDIAN 4 select ARCH_SUPPORTS_BIG_ENDIAN
6 select ARM_AMBA 5 select ARM_AMBA
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index eda0dd0ab97b..c348eaee7ee2 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -889,9 +889,10 @@ config CACHE_L2X0
889 help 889 help
890 This option enables the L2x0 PrimeCell. 890 This option enables the L2x0 PrimeCell.
891 891
892if CACHE_L2X0
893
892config CACHE_PL310 894config CACHE_PL310
893 bool 895 bool
894 depends on CACHE_L2X0
895 default y if CPU_V7 && !(CPU_V6 || CPU_V6K) 896 default y if CPU_V7 && !(CPU_V6 || CPU_V6K)
896 help 897 help
897 This option enables optimisations for the PL310 cache 898 This option enables optimisations for the PL310 cache
@@ -899,7 +900,6 @@ config CACHE_PL310
899 900
900config PL310_ERRATA_588369 901config PL310_ERRATA_588369
901 bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines" 902 bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
902 depends on CACHE_L2X0
903 help 903 help
904 The PL310 L2 cache controller implements three types of Clean & 904 The PL310 L2 cache controller implements three types of Clean &
905 Invalidate maintenance operations: by Physical Address 905 Invalidate maintenance operations: by Physical Address
@@ -912,7 +912,6 @@ config PL310_ERRATA_588369
912 912
913config PL310_ERRATA_727915 913config PL310_ERRATA_727915
914 bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption" 914 bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
915 depends on CACHE_L2X0
916 help 915 help
917 PL310 implements the Clean & Invalidate by Way L2 cache maintenance 916 PL310 implements the Clean & Invalidate by Way L2 cache maintenance
918 operation (offset 0x7FC). This operation runs in background so that 917 operation (offset 0x7FC). This operation runs in background so that
@@ -923,7 +922,6 @@ config PL310_ERRATA_727915
923 922
924config PL310_ERRATA_753970 923config PL310_ERRATA_753970
925 bool "PL310 errata: cache sync operation may be faulty" 924 bool "PL310 errata: cache sync operation may be faulty"
926 depends on CACHE_PL310
927 help 925 help
928 This option enables the workaround for the 753970 PL310 (r3p0) erratum. 926 This option enables the workaround for the 753970 PL310 (r3p0) erratum.
929 927
@@ -938,7 +936,6 @@ config PL310_ERRATA_753970
938 936
939config PL310_ERRATA_769419 937config PL310_ERRATA_769419
940 bool "PL310 errata: no automatic Store Buffer drain" 938 bool "PL310 errata: no automatic Store Buffer drain"
941 depends on CACHE_L2X0
942 help 939 help
943 On revisions of the PL310 prior to r3p2, the Store Buffer does 940 On revisions of the PL310 prior to r3p2, the Store Buffer does
944 not automatically drain. This can cause normal, non-cacheable 941 not automatically drain. This can cause normal, non-cacheable
@@ -948,6 +945,8 @@ config PL310_ERRATA_769419
948 on systems with an outer cache, the store buffer is drained 945 on systems with an outer cache, the store buffer is drained
949 explicitly. 946 explicitly.
950 947
948endif
949
951config CACHE_TAUROS2 950config CACHE_TAUROS2
952 bool "Enable the Tauros2 L2 cache controller" 951 bool "Enable the Tauros2 L2 cache controller"
953 depends on (ARCH_DOVE || ARCH_MMP || CPU_PJ4) 952 depends on (ARCH_DOVE || ARCH_MMP || CPU_PJ4)
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index efc5cabf70e0..7c3fb41a462e 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -664,7 +664,7 @@ static int l2c310_cpu_enable_flz(struct notifier_block *nb, unsigned long act, v
664 664
665static void __init l2c310_enable(void __iomem *base, u32 aux, unsigned num_lock) 665static void __init l2c310_enable(void __iomem *base, u32 aux, unsigned num_lock)
666{ 666{
667 unsigned rev = readl_relaxed(base + L2X0_CACHE_ID) & L2X0_CACHE_ID_PART_MASK; 667 unsigned rev = readl_relaxed(base + L2X0_CACHE_ID) & L2X0_CACHE_ID_RTL_MASK;
668 bool cortex_a9 = read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9; 668 bool cortex_a9 = read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9;
669 669
670 if (rev >= L310_CACHE_ID_RTL_R2P0) { 670 if (rev >= L310_CACHE_ID_RTL_R2P0) {
@@ -1069,6 +1069,33 @@ static const struct l2c_init_data of_l2c310_data __initconst = {
1069}; 1069};
1070 1070
1071/* 1071/*
1072 * This is a variant of the of_l2c310_data with .sync set to
1073 * NULL. Outer sync operations are not needed when the system is I/O
1074 * coherent, and potentially harmful in certain situations (PCIe/PL310
1075 * deadlock on Armada 375/38x due to hardware I/O coherency). The
1076 * other operations are kept because they are infrequent (therefore do
1077 * not cause the deadlock in practice) and needed for secondary CPU
1078 * boot and other power management activities.
1079 */
1080static const struct l2c_init_data of_l2c310_coherent_data __initconst = {
1081 .type = "L2C-310 Coherent",
1082 .way_size_0 = SZ_8K,
1083 .num_lock = 8,
1084 .of_parse = l2c310_of_parse,
1085 .enable = l2c310_enable,
1086 .fixup = l2c310_fixup,
1087 .save = l2c310_save,
1088 .outer_cache = {
1089 .inv_range = l2c210_inv_range,
1090 .clean_range = l2c210_clean_range,
1091 .flush_range = l2c210_flush_range,
1092 .flush_all = l2c210_flush_all,
1093 .disable = l2c310_disable,
1094 .resume = l2c310_resume,
1095 },
1096};
1097
1098/*
1072 * Note that the end addresses passed to Linux primitives are 1099 * Note that the end addresses passed to Linux primitives are
1073 * noninclusive, while the hardware cache range operations use 1100 * noninclusive, while the hardware cache range operations use
1074 * inclusive start and end addresses. 1101 * inclusive start and end addresses.
@@ -1487,6 +1514,10 @@ int __init l2x0_of_init(u32 aux_val, u32 aux_mask)
1487 1514
1488 data = of_match_node(l2x0_ids, np)->data; 1515 data = of_match_node(l2x0_ids, np)->data;
1489 1516
1517 if (of_device_is_compatible(np, "arm,pl310-cache") &&
1518 of_property_read_bool(np, "arm,io-coherent"))
1519 data = &of_l2c310_coherent_data;
1520
1490 old_aux = readl_relaxed(l2x0_base + L2X0_AUX_CTRL); 1521 old_aux = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
1491 if (old_aux != ((old_aux & aux_mask) | aux_val)) { 1522 if (old_aux != ((old_aux & aux_mask) | aux_val)) {
1492 pr_warn("L2C: platform modifies aux control register: 0x%08x -> 0x%08x\n", 1523 pr_warn("L2C: platform modifies aux control register: 0x%08x -> 0x%08x\n",
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index da1874f9f8cf..a014dfacd5ca 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -300,6 +300,7 @@ void __init sanity_check_meminfo(void)
300 sanity_check_meminfo_mpu(); 300 sanity_check_meminfo_mpu();
301 end = memblock_end_of_DRAM(); 301 end = memblock_end_of_DRAM();
302 high_memory = __va(end - 1) + 1; 302 high_memory = __va(end - 1) + 1;
303 memblock_set_current_limit(end);
303} 304}
304 305
305/* 306/*
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index 97448c3acf38..ba0d58e1a2a2 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -502,6 +502,7 @@ __\name\()_proc_info:
502 .long \cpu_val 502 .long \cpu_val
503 .long \cpu_mask 503 .long \cpu_mask
504 .long PMD_TYPE_SECT | \ 504 .long PMD_TYPE_SECT | \
505 PMD_SECT_CACHEABLE | \
505 PMD_BIT4 | \ 506 PMD_BIT4 | \
506 PMD_SECT_AP_WRITE | \ 507 PMD_SECT_AP_WRITE | \
507 PMD_SECT_AP_READ 508 PMD_SECT_AP_READ
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 243dfcb2ca0e..301b892d97d9 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -35,27 +35,15 @@ config SAMSUNG_PM
35 Base platform power management code for samsung code 35 Base platform power management code for samsung code
36 36
37if PLAT_SAMSUNG 37if PLAT_SAMSUNG
38menu "Samsung Common options"
38 39
39# boot configurations 40# boot configurations
40 41
41comment "Boot options" 42comment "Boot options"
42 43
43config S3C_BOOT_ERROR_RESET
44 bool "S3C Reboot on decompression error"
45 help
46 Say y here to use the watchdog to reset the system if the
47 kernel decompressor detects an error during decompression.
48
49config S3C_BOOT_UART_FORCE_FIFO
50 bool "Force UART FIFO on during boot process"
51 default y
52 help
53 Say Y here to force the UART FIFOs on during the kernel
54 uncompressor
55
56
57config S3C_LOWLEVEL_UART_PORT 44config S3C_LOWLEVEL_UART_PORT
58 int "S3C UART to use for low-level messages" 45 int "S3C UART to use for low-level messages"
46 depends on ARCH_S3C64XX
59 default 0 47 default 0
60 help 48 help
61 Choice of which UART port to use for the low-level messages, 49 Choice of which UART port to use for the low-level messages,
@@ -407,17 +395,16 @@ config SAMSUNG_PM_GPIO
407 Include legacy GPIO power management code for platforms not using 395 Include legacy GPIO power management code for platforms not using
408 pinctrl-samsung driver. 396 pinctrl-samsung driver.
409 397
410endif
411
412config SAMSUNG_DMADEV 398config SAMSUNG_DMADEV
413 bool 399 bool "Use legacy Samsung DMA abstraction"
414 select ARM_AMBA 400 depends on CPU_S5PV210 || CPU_S5PC100 || ARCH_S5P64X0 || ARCH_S3C64XX
415 select DMADEVICES 401 select DMADEVICES
416 select PL330_DMA if (ARCH_EXYNOS5 || ARCH_EXYNOS4 || CPU_S5PV210 || CPU_S5PC100 || \ 402 default y
417 CPU_S5P6450 || CPU_S5P6440)
418 help 403 help
419 Use DMA device engine for PL330 DMAC. 404 Use DMA device engine for PL330 DMAC.
420 405
406endif
407
421config S5P_DEV_MFC 408config S5P_DEV_MFC
422 bool 409 bool
423 help 410 help
@@ -503,4 +490,5 @@ config DEBUG_S3C_UART
503 default "2" if DEBUG_S3C_UART2 490 default "2" if DEBUG_S3C_UART2
504 default "3" if DEBUG_S3C_UART3 491 default "3" if DEBUG_S3C_UART3
505 492
493endmenu
506endif 494endif