382 files changed, 3652 insertions, 3065 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 05589e85c180..e91cec43f2c0 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -3,7 +3,7 @@ config ARM
         default y
         select HAVE_AOUT
         select HAVE_DMA_API_DEBUG
-        select HAVE_IDE
+        select HAVE_IDE if PCI || ISA || PCMCIA
         select HAVE_MEMBLOCK
         select RTC_LIB
         select SYS_SUPPORTS_APM_EMULATION
@@ -195,8 +195,8 @@ config VECTORS_BASE
           The base address of exception vectors.
 
 config ARM_PATCH_PHYS_VIRT
-        bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)"
-        depends on EXPERIMENTAL
+        bool "Patch physical to virtual translations at runtime" if EMBEDDED
+        default y
         depends on !XIP_KERNEL && MMU
         depends on !ARCH_REALVIEW || !SPARSEMEM
         help
@@ -205,16 +205,16 @@ config ARM_PATCH_PHYS_VIRT
           kernel in system memory.
 
           This can only be used with non-XIP MMU kernels where the base
-          of physical memory is at a 16MB boundary, or theoretically 64K
-          for the MSM machine class.
+          of physical memory is at a 16MB boundary.
 
-config ARM_PATCH_PHYS_VIRT_16BIT
+          Only disable this option if you know that you do not require
+          this feature (eg, building a kernel for a single machine) and
+          you need to shrink the kernel to the minimal size.
+
+
+config GENERIC_BUG
         def_bool y
-        depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
-        help
-          This option extends the physical to virtual translation patching
-          to allow physical memory down to a theoretical minimum of 64K
-          boundaries.
+        depends on BUG
 
 source "init/Kconfig"
 
@@ -302,7 +302,6 @@ config ARCH_AT91
         select ARCH_REQUIRE_GPIOLIB
         select HAVE_CLK
         select CLKDEV_LOOKUP
-        select ARM_PATCH_PHYS_VIRT if MMU
         help
           This enables support for systems based on the Atmel AT91RM9200,
           AT91SAM9 and AT91CAP9 processors.
@@ -347,7 +346,6 @@ config ARCH_GEMINI
 config ARCH_PRIMA2
         bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
         select CPU_V7
-        select GENERIC_TIME
         select NO_IOPORT
         select GENERIC_CLOCKEVENTS
         select CLKDEV_LOOKUP
@@ -386,6 +384,7 @@ config ARCH_FOOTBRIDGE
         select CPU_SA110
         select FOOTBRIDGE
         select GENERIC_CLOCKEVENTS
+        select HAVE_IDE
         help
           Support for systems based on the DC21285 companion chip
           ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
@@ -520,7 +519,6 @@ config ARCH_LPC32XX
         select ARM_AMBA
         select USB_ARCH_HAS_OHCI
         select CLKDEV_LOOKUP
-        select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
         help
           Support for the NXP LPC32XX family of processors
@@ -599,7 +597,6 @@ config ARCH_TEGRA
         bool "NVIDIA Tegra"
         select CLKDEV_LOOKUP
         select CLKSRC_MMIO
-        select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
         select GENERIC_GPIO
         select HAVE_CLK
@@ -632,6 +629,8 @@ config ARCH_PXA
         select SPARSE_IRQ
         select AUTO_ZRELADDR
         select MULTI_IRQ_HANDLER
+        select ARM_CPU_SUSPEND if PM
+        select HAVE_IDE
         help
           Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
 
@@ -672,6 +671,7 @@ config ARCH_RPC
         select NO_IOPORT
         select ARCH_SPARSEMEM_ENABLE
         select ARCH_USES_GETTIMEOFFSET
+        select HAVE_IDE
         help
           On the Acorn Risc-PC, Linux can support the internal IDE disk and
           CD-ROM interface, serial and parallel port, and the floppy drive.
@@ -690,6 +690,7 @@ config ARCH_SA1100
         select HAVE_SCHED_CLOCK
         select TICK_ONESHOT
         select ARCH_REQUIRE_GPIOLIB
+        select HAVE_IDE
         help
           Support for StrongARM 11x0 based boards.
 
@@ -723,7 +724,6 @@ config ARCH_S3C64XX
         select ARCH_REQUIRE_GPIOLIB
         select SAMSUNG_CLKSRC
         select SAMSUNG_IRQ_VIC_TIMER
-        select SAMSUNG_IRQ_UART
         select S3C_GPIO_TRACK
         select S3C_GPIO_PULL_UPDOWN
         select S3C_GPIO_CFG_S3C24XX
@@ -912,7 +912,6 @@ config ARCH_VT8500
 config ARCH_ZYNQ
         bool "Xilinx Zynq ARM Cortex A9 Platform"
         select CPU_V7
-        select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
         select CLKDEV_LOOKUP
         select ARM_GIC
@@ -1273,6 +1272,32 @@ config ARM_ERRATA_754327
           This workaround defines cpu_relax() as smp_mb(), preventing correctly
           written polling loops from denying visibility of updates to memory.
 
+config ARM_ERRATA_364296
+        bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
+        depends on CPU_V6 && !SMP
+        help
+          This options enables the workaround for the 364296 ARM1136
+          r0p2 erratum (possible cache data corruption with
+          hit-under-miss enabled). It sets the undocumented bit 31 in
+          the auxiliary control register and the FI bit in the control
+          register, thus disabling hit-under-miss without putting the
+          processor into full low interrupt latency mode. ARM11MPCore
+          is not affected.
+
+config ARM_ERRATA_764369
+        bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
+        depends on CPU_V7 && SMP
+        help
+          This option enables the workaround for erratum 764369
+          affecting Cortex-A9 MPCore with two or more processors (all
+          current revisions). Under certain timing circumstances, a data
+          cache line maintenance operation by MVA targeting an Inner
+          Shareable memory region may fail to proceed up to either the
+          Point of Coherency or to the Point of Unification of the
+          system. This workaround adds a DSB instruction before the
+          relevant cache maintenance functions and sets a specific bit
+          in the diagnostic control register of the SCU.
+
 endmenu
 
 source "arch/arm/common/Kconfig"
@@ -1351,6 +1376,7 @@ config SMP
                  MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
                  ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
                  ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
+        depends on MMU
         select USE_GENERIC_SMP_HELPERS
         select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
         help
@@ -1364,7 +1390,7 @@ config SMP
           processor machines. On a single processor machine, the kernel will
           run faster if you say N here.
 
-          See also <file:Documentation/i386/IO-APIC.txt>,
+          See also <file:Documentation/x86/i386/IO-APIC.txt>,
           <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
           <http://tldp.org/HOWTO/SMP-HOWTO.html>.
 
@@ -1383,6 +1409,31 @@ config SMP_ON_UP
 
           If you don't know what to do here, say Y.
 
+config ARM_CPU_TOPOLOGY
+        bool "Support cpu topology definition"
+        depends on SMP && CPU_V7
+        default y
+        help
+          Support ARM cpu topology definition. The MPIDR register defines
+          affinity between processors which is then used to describe the cpu
+          topology of an ARM System.
+
+config SCHED_MC
+        bool "Multi-core scheduler support"
+        depends on ARM_CPU_TOPOLOGY
+        help
+          Multi-core scheduler support improves the CPU scheduler's decision
+          making when dealing with multi-core CPU chips at a cost of slightly
+          increased overhead in some places. If unsure say N here.
+
+config SCHED_SMT
+        bool "SMT scheduler support"
+        depends on ARM_CPU_TOPOLOGY
+        help
+          Improves the CPU scheduler's decision making when dealing with
+          MultiThreading at a cost of slightly increased overhead in some
+          places. If unsure say N here.
+
 config HAVE_ARM_SCU
         bool
         help
@@ -1458,6 +1509,7 @@ config THUMB2_KERNEL
         depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
         select AEABI
         select ARM_ASM_UNIFIED
+        select ARM_UNWIND
         help
           By enabling this option, the kernel will be compiled in
           Thumb-2 mode. A compiler/assembler that understand the unified
@@ -2077,6 +2129,9 @@ config ARCH_SUSPEND_POSSIBLE
                 CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE
         def_bool y
 
+config ARM_CPU_SUSPEND
+        def_bool PM_SLEEP
+
 endmenu
 
 source "net/Kconfig"
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 81cbe40c159c..df3eb3ccd769 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -65,13 +65,71 @@ config DEBUG_USER
 
 # These options are only for real kernel hackers who want to get their hands dirty.
 config DEBUG_LL
-        bool "Kernel low-level debugging functions"
+        bool "Kernel low-level debugging functions (read help!)"
         depends on DEBUG_KERNEL
         help
           Say Y here to include definitions of printascii, printch, printhex
           in the kernel.  This is helpful if you are debugging code that
           executes before the console is initialized.
 
+          Note that selecting this option will limit the kernel to a single
+          UART definition, as specified below. Attempting to boot the kernel
+          image on a different platform *will not work*, so this option should
+          not be enabled for kernels that are intended to be portable.
+
+choice
+        prompt "Kernel low-level debugging port"
+        depends on DEBUG_LL
+
+        config DEBUG_LL_UART_NONE
+                bool "No low-level debugging UART"
+                help
+                  Say Y here if your platform doesn't provide a UART option
+                  below. This relies on your platform choosing the right UART
+                  definition internally in order for low-level debugging to
+                  work.
+
+        config DEBUG_ICEDCC
+                bool "Kernel low-level debugging via EmbeddedICE DCC channel"
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to the EmbeddedICE macrocell's DCC channel using
+                  co-processor 14. This is known to work on the ARM9 style ICE
+                  channel and on the XScale with the PEEDI.
+
+                  Note that the system will appear to hang during boot if there
+                  is nothing connected to read from the DCC.
+
+        config DEBUG_FOOTBRIDGE_COM1
+                bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1"
+                depends on FOOTBRIDGE
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to the 8250 at PCI COM1.
+
+        config DEBUG_DC21285_PORT
+                bool "Kernel low-level debugging messages via footbridge serial port"
+                depends on FOOTBRIDGE
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to the serial port in the DC21285 (Footbridge).
+
+        config DEBUG_CLPS711X_UART1
+                bool "Kernel low-level debugging messages via UART1"
+                depends on ARCH_CLPS711X
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to the first serial port on these devices.
+
+        config DEBUG_CLPS711X_UART2
+                bool "Kernel low-level debugging messages via UART2"
+                depends on ARCH_CLPS711X
+                help
+                  Say Y here if you want the debug print routines to direct
+                  their output to the second serial port on these devices.
+
+endchoice
+
 config EARLY_PRINTK
         bool "Early printk"
         depends on DEBUG_LL
@@ -80,43 +138,14 @@ config EARLY_PRINTK
           kernel low-level debugging functions. Add earlyprintk to your
           kernel parameters to enable this console.
 
-config DEBUG_ICEDCC
-        bool "Kernel low-level debugging via EmbeddedICE DCC channel"
-        depends on DEBUG_LL
-        help
-          Say Y here if you want the debug print routines to direct their
-          output to the EmbeddedICE macrocell's DCC channel using
-          co-processor 14. This is known to work on the ARM9 style ICE
-          channel and on the XScale with the PEEDI.
-
-          It does include a timeout to ensure that the system does not
-          totally freeze when there is nothing connected to read.
-
 config OC_ETM
         bool "On-chip ETM and ETB"
-        select ARM_AMBA
+        depends on ARM_AMBA
         help
           Enables the on-chip embedded trace macrocell and embedded trace
           buffer driver that will allow you to collect traces of the
           kernel code.
 
-config DEBUG_DC21285_PORT
-        bool "Kernel low-level debugging messages via footbridge serial port"
-        depends on DEBUG_LL && FOOTBRIDGE
-        help
-          Say Y here if you want the debug print routines to direct their
-          output to the serial port in the DC21285 (Footbridge). Saying N
-          will cause the debug messages to appear on the first 16550
-          serial port.
-
-config DEBUG_CLPS711X_UART2
-        bool "Kernel low-level debugging messages via UART2"
-        depends on DEBUG_LL && ARCH_CLPS711X
-        help
-          Say Y here if you want the debug print routines to direct their
-          output to the second serial port on these devices.  Saying N will
-          cause the debug messages to appear on the first serial port.
-
 config DEBUG_S3C_UART
         depends on PLAT_SAMSUNG
         int "S3C UART to use for low-level debug"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 70c424eaf7b0..5665c2a3b652 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -128,6 +128,9 @@ textofs-$(CONFIG_PM_H1940)      := 0x00108000
 ifeq ($(CONFIG_ARCH_SA1100),y)
 textofs-$(CONFIG_SA1111) := 0x00208000
 endif
+textofs-$(CONFIG_ARCH_MSM7X30) := 0x00208000
+textofs-$(CONFIG_ARCH_MSM8X60) := 0x00208000
+textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000
 
 # Machine directory name.  This list is sorted alphanumerically
 # by CONFIG_* macro name.
diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile
index a1edfd5a129a..176062ac7f07 100644
--- a/arch/arm/boot/Makefile
+++ b/arch/arm/boot/Makefile
@@ -78,7 +78,16 @@ endif
 
 $(obj)/uImage: STARTADDR=$(LOADADDR)
 
+check_for_multiple_loadaddr = \
+if [ $(words $(LOADADDR)) -gt 1 ]; then \
+        echo 'multiple load addresses: $(LOADADDR)'; \
+        echo 'This is incompatible with uImages'; \
+        echo 'Specify LOADADDR on the commandline to build an uImage'; \
+        false; \
+fi
+
 $(obj)/uImage:  $(obj)/zImage FORCE
+        @$(check_for_multiple_loadaddr)
         $(call if_changed,uimage)
         @echo '  Image $@ is ready'
 
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 0c74a6fab952..a6b30b35ca65 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -139,8 +139,16 @@ bad_syms=$$($(CROSS_COMPILE)nm $@ | sed -n 's/^.\{8\} [bc] \(.*\)/\1/p') && \
   ( echo "following symbols must have non local/private scope:" >&2; \
     echo "$$bad_syms" >&2; rm -f $@; false )
 
+check_for_multiple_zreladdr = \
+if [ $(words $(ZRELADDR)) -gt 1 -a "$(CONFIG_AUTO_ZRELADDR)" = "" ]; then \
+        echo 'multiple zreladdrs: $(ZRELADDR)'; \
+        echo 'This needs CONFIG_AUTO_ZRELADDR to be set'; \
+        false; \
+fi
+
 $(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/$(HEAD) $(obj)/piggy.$(suffix_y).o \
                 $(addprefix $(obj)/, $(OBJS)) $(lib1funcs) FORCE
+        @$(check_for_multiple_zreladdr)
         $(call if_changed,ld)
         @$(check_for_bad_syms)
 
diff --git a/arch/arm/boot/compressed/mmcif-sh7372.c b/arch/arm/boot/compressed/mmcif-sh7372.c
index b6f61d9a5a1b..672ae95db5c3 100644
--- a/arch/arm/boot/compressed/mmcif-sh7372.c
+++ b/arch/arm/boot/compressed/mmcif-sh7372.c
@@ -82,7 +82,7 @@ asmlinkage void mmc_loader(unsigned char *buf, unsigned long len)
 
 
         /* Disable clock to MMC hardware block */
-        __raw_writel(__raw_readl(SMSTPCR3) & (1 << 12), SMSTPCR3);
+        __raw_writel(__raw_readl(SMSTPCR3) | (1 << 12), SMSTPCR3);
 
         mmc_update_progress(MMC_PROGRESS_DONE);
 }
diff --git a/arch/arm/boot/compressed/sdhi-sh7372.c b/arch/arm/boot/compressed/sdhi-sh7372.c
index d403a8b24d7f..d279294f2381 100644
--- a/arch/arm/boot/compressed/sdhi-sh7372.c
+++ b/arch/arm/boot/compressed/sdhi-sh7372.c
@@ -85,7 +85,7 @@ asmlinkage void mmc_loader(unsigned short *buf, unsigned long len)
                 goto err;
 
         /* Disable clock to SDHI1 hardware block */
-        __raw_writel(__raw_readl(SMSTPCR3) & (1 << 13), SMSTPCR3);
+        __raw_writel(__raw_readl(SMSTPCR3) | (1 << 13), SMSTPCR3);
 
         mmc_update_progress(MMC_PROGRESS_DONE);
 
diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts
index 4c053340ce33..e5818668d091 100644
--- a/arch/arm/boot/dts/tegra-harmony.dts
+++ b/arch/arm/boot/dts/tegra-harmony.dts
@@ -57,14 +57,14 @@
         };
 
         sdhci@c8000200 {
-                gpios = <&gpio 69 0>, /* cd, gpio PI5 */
-                        <&gpio 57 0>, /* wp, gpio PH1 */
-                        <&gpio 155 0>; /* power, gpio PT3 */
+                cd-gpios = <&gpio 69 0>; /* gpio PI5 */
+                wp-gpios = <&gpio 57 0>; /* gpio PH1 */
+                power-gpios = <&gpio 155 0>; /* gpio PT3 */
         };
 
         sdhci@c8000600 {
-                gpios = <&gpio 58 0>, /* cd, gpio PH2 */
-                        <&gpio 59 0>, /* wp, gpio PH3 */
-                        <&gpio 70 0>; /* power, gpio PI6 */
+                cd-gpios = <&gpio 58 0>; /* gpio PH2 */
+                wp-gpios = <&gpio 59 0>; /* gpio PH3 */
+                power-gpios = <&gpio 70 0>; /* gpio PI6 */
         };
 };
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts
index 1940cae00748..64cedca6fc79 100644
--- a/arch/arm/boot/dts/tegra-seaboard.dts
+++ b/arch/arm/boot/dts/tegra-seaboard.dts
@@ -21,8 +21,8 @@
         };
 
         sdhci@c8000400 {
-                gpios = <&gpio 69 0>, /* cd, gpio PI5 */
-                        <&gpio 57 0>, /* wp, gpio PH1 */
-                        <&gpio 70 0>; /* power, gpio PI6 */
+                cd-gpios = <&gpio 69 0>; /* gpio PI5 */
+                wp-gpios = <&gpio 57 0>; /* gpio PH1 */
+                power-gpios = <&gpio 70 0>; /* gpio PI6 */
         };
 };
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 3227ca952a12..bdbb3f74f0fe 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -33,7 +33,7 @@
 #include <asm/mach/irq.h>
 #include <asm/hardware/gic.h>
 
-static DEFINE_SPINLOCK(irq_controller_lock);
+static DEFINE_RAW_SPINLOCK(irq_controller_lock);
 
 /* Address of GIC 0 CPU interface */
 void __iomem *gic_cpu_base_addr __read_mostly;
@@ -82,30 +82,30 @@ static void gic_mask_irq(struct irq_data *d)
 {
         u32 mask = 1 << (d->irq % 32);
 
-        spin_lock(&irq_controller_lock);
+        raw_spin_lock(&irq_controller_lock);
         writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_CLEAR + (gic_irq(d) / 32) * 4);
         if (gic_arch_extn.irq_mask)
                 gic_arch_extn.irq_mask(d);
-        spin_unlock(&irq_controller_lock);
+        raw_spin_unlock(&irq_controller_lock);
 }
 
 static void gic_unmask_irq(struct irq_data *d)
 {
         u32 mask = 1 << (d->irq % 32);
 
-        spin_lock(&irq_controller_lock);
+        raw_spin_lock(&irq_controller_lock);
         if (gic_arch_extn.irq_unmask)
                 gic_arch_extn.irq_unmask(d);
         writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_SET + (gic_irq(d) / 32) * 4);
-        spin_unlock(&irq_controller_lock);
+        raw_spin_unlock(&irq_controller_lock);
 }
 
 static void gic_eoi_irq(struct irq_data *d)
 {
         if (gic_arch_extn.irq_eoi) {
-                spin_lock(&irq_controller_lock);
+                raw_spin_lock(&irq_controller_lock);
                 gic_arch_extn.irq_eoi(d);
-                spin_unlock(&irq_controller_lock);
+                raw_spin_unlock(&irq_controller_lock);
         }
 
         writel_relaxed(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI);
@@ -129,7 +129,7 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
         if (type != IRQ_TYPE_LEVEL_HIGH && type != IRQ_TYPE_EDGE_RISING)
                 return -EINVAL;
 
-        spin_lock(&irq_controller_lock);
+        raw_spin_lock(&irq_controller_lock);
 
         if (gic_arch_extn.irq_set_type)
                 gic_arch_extn.irq_set_type(d, type);
@@ -154,7 +154,7 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
         if (enabled)
                 writel_relaxed(enablemask, base + GIC_DIST_ENABLE_SET + enableoff);
 
-        spin_unlock(&irq_controller_lock);
+        raw_spin_unlock(&irq_controller_lock);
 
         return 0;
 }
@@ -180,12 +180,12 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
                 return -EINVAL;
 
         mask = 0xff << shift;
-        bit = 1 << (cpu + shift);
+        bit = 1 << (cpu_logical_map(cpu) + shift);
 
-        spin_lock(&irq_controller_lock);
+        raw_spin_lock(&irq_controller_lock);
         val = readl_relaxed(reg) & ~mask;
         writel_relaxed(val | bit, reg);
-        spin_unlock(&irq_controller_lock);
+        raw_spin_unlock(&irq_controller_lock);
 
         return IRQ_SET_MASK_OK;
 }
@@ -215,9 +215,9 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
 
         chained_irq_enter(chip, desc);
 
-        spin_lock(&irq_controller_lock);
+        raw_spin_lock(&irq_controller_lock);
         status = readl_relaxed(chip_data->cpu_base + GIC_CPU_INTACK);
-        spin_unlock(&irq_controller_lock);
+        raw_spin_unlock(&irq_controller_lock);
 
         gic_irq = (status & 0x3ff);
         if (gic_irq == 1023)
@@ -259,9 +259,15 @@ static void __init gic_dist_init(struct gic_chip_data *gic,
         unsigned int irq_start)
 {
         unsigned int gic_irqs, irq_limit, i;
+        u32 cpumask;
         void __iomem *base = gic->dist_base;
-        u32 cpumask = 1 << smp_processor_id();
+        u32 cpu = 0;
 
+#ifdef CONFIG_SMP
+        cpu = cpu_logical_map(smp_processor_id());
+#endif
+
+        cpumask = 1 << cpu;
         cpumask |= cpumask << 8;
         cpumask |= cpumask << 16;
 
@@ -382,7 +388,12 @@ void __cpuinit gic_enable_ppi(unsigned int irq)
 #ifdef CONFIG_SMP
 void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
 {
-        unsigned long map = *cpus_addr(*mask);
+        int cpu;
+        unsigned long map = 0;
+
+        /* Convert our logical CPU mask into a physical one. */
+        for_each_cpu(cpu, mask)
+                map |= 1 << cpu_logical_map(cpu);
 
         /*
          * Ensure that stores to Normal memory are visible to the
diff --git a/arch/arm/common/pl330.c b/arch/arm/common/pl330.c
index 97912fa48782..7129cfbdacd6 100644
--- a/arch/arm/common/pl330.c
+++ b/arch/arm/common/pl330.c
@@ -1546,7 +1546,7 @@ int pl330_chan_ctrl(void *ch_id, enum pl330_chan_op op)
 
                 /* Start the next */
         case PL330_OP_START:
-                if (!_start(thrd))
+                if (!_thrd_active(thrd) && !_start(thrd))
                         ret = -EIO;
                 break;
 
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index 7aa4262ada7a..01f18a421b17 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -259,7 +259,6 @@ static void __init vic_disable(void __iomem *base)
         writel(0, base + VIC_INT_SELECT);
         writel(0, base + VIC_INT_ENABLE);
         writel(~0, base + VIC_INT_ENABLE_CLEAR);
-        writel(0, base + VIC_IRQ_STATUS);
         writel(0, base + VIC_ITCR);
         writel(~0, base + VIC_INT_SOFT_CLEAR);
 }
@@ -347,7 +346,8 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
 
         /* Identify which VIC cell this one is, by reading the ID */
         for (i = 0; i < 4; i++) {
-                u32 addr = ((u32)base & PAGE_MASK) + 0xfe0 + (i * 4);
+                void __iomem *addr;
+                addr = (void __iomem *)((u32)base & PAGE_MASK) + 0xfe0 + (i * 4);
                 cellid |= (readl(addr) & 0xff) << (8 * i);
         }
         vendor = (cellid >> 12) & 0xff;
diff --git a/arch/arm/configs/integrator_defconfig b/arch/arm/configs/integrator_defconfig
index 7196ade07e27..1103f62a1964 100644
--- a/arch/arm/configs/integrator_defconfig
+++ b/arch/arm/configs/integrator_defconfig
@@ -1,5 +1,6 @@
 CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
+CONFIG_TINY_RCU=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -8,20 +9,29 @@ CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 CONFIG_ARCH_INTEGRATOR=y
 CONFIG_ARCH_INTEGRATOR_AP=y
+CONFIG_ARCH_INTEGRATOR_CP=y
 CONFIG_CPU_ARM720T=y
 CONFIG_CPU_ARM920T=y
+CONFIG_CPU_ARM922T=y
+CONFIG_CPU_ARM926T=y
+CONFIG_CPU_ARM1020=y
+CONFIG_CPU_ARM1022=y
+CONFIG_CPU_ARM1026=y
 CONFIG_PCI=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
 CONFIG_LEDS=y
 CONFIG_LEDS_CPU=y
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=ttyAM0,38400n8 root=/dev/nfs ip=bootp mem=32M"
+CONFIG_CMDLINE="console=ttyAM0,38400n8 root=/dev/nfs ip=bootp"
 CONFIG_CPU_FREQ=y
 CONFIG_CPU_FREQ_GOV_POWERSAVE=y
 CONFIG_CPU_FREQ_GOV_USERSPACE=y
 CONFIG_CPU_FREQ_GOV_ONDEMAND=y
 CONFIG_FPE_NWFPE=y
-CONFIG_PM=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
@@ -32,7 +42,6 @@ CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
 # CONFIG_IPV6 is not set
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_AFS_PARTS=y
 CONFIG_MTD_CHAR=y
@@ -40,6 +49,7 @@ CONFIG_MTD_BLOCK=y
 CONFIG_MTD_CFI=y
 CONFIG_MTD_CFI_ADV_OPTIONS=y
 CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_PHYSMAP=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=8192
@@ -56,6 +66,8 @@ CONFIG_FB_MODE_HELPERS=y
 CONFIG_FB_MATROX=y
 CONFIG_FB_MATROX_MILLENIUM=y
 CONFIG_FB_MATROX_MYSTIQUE=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_PL030=y
 CONFIG_EXT2_FS=y
 CONFIG_TMPFS=y
 CONFIG_JFFS2_FS=y
@@ -68,4 +80,3 @@ CONFIG_NFSD_V3=y
 CONFIG_PARTITION_ADVANCED=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_ERRORS=y
diff --git a/arch/arm/include/asm/Kbuild b/arch/arm/include/asm/Kbuild
index 6550db3aa5c7..960abceb8e14 100644
--- a/arch/arm/include/asm/Kbuild
+++ b/arch/arm/include/asm/Kbuild
@@ -1,3 +1,20 @@
 include include/asm-generic/Kbuild.asm
 
 header-y += hwcap.h
+
+generic-y += auxvec.h
+generic-y += bitsperlong.h
+generic-y += cputime.h
+generic-y += emergency-restart.h
+generic-y += errno.h
+generic-y += ioctl.h
+generic-y += irq_regs.h
+generic-y += kdebug.h
+generic-y += local.h
+generic-y += local64.h
+generic-y += percpu.h
+generic-y += poll.h
+generic-y += resource.h
+generic-y += sections.h
+generic-y += siginfo.h
+generic-y += sizes.h
diff --git a/arch/arm/include/asm/auxvec.h b/arch/arm/include/asm/auxvec.h
deleted file mode 100644
index c0536f6b29a7..000000000000
--- a/arch/arm/include/asm/auxvec.h
+++ /dev/null
@@ -1,4 +0,0 @@
-#ifndef __ASMARM_AUXVEC_H
-#define __ASMARM_AUXVEC_H
-
-#endif
diff --git a/arch/arm/include/asm/bitsperlong.h b/arch/arm/include/asm/bitsperlong.h
deleted file mode 100644
index 6dc0bb0c13b2..000000000000
--- a/arch/arm/include/asm/bitsperlong.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/bitsperlong.h>
diff --git a/arch/arm/include/asm/bug.h b/arch/arm/include/asm/bug.h
index 4d88425a4169..9abe7a07d5ac 100644
--- a/arch/arm/include/asm/bug.h
+++ b/arch/arm/include/asm/bug.h
@@ -3,21 +3,58 @@
 
 
 #ifdef CONFIG_BUG
-#ifdef CONFIG_DEBUG_BUGVERBOSE
-extern void __bug(const char *file, int line) __attribute__((noreturn));
-
-/* give file/line information */
-#define BUG()           __bug(__FILE__, __LINE__)
 
+/*
+ * Use a suitable undefined instruction to use for ARM/Thumb2 bug handling.
+ * We need to be careful not to conflict with those used by other modules and
+ * the register_undef_hook() system.
+ */
+#ifdef CONFIG_THUMB2_KERNEL
+#define BUG_INSTR_VALUE 0xde02
+#define BUG_INSTR_TYPE ".hword "
 #else
+#define BUG_INSTR_VALUE 0xe7f001f2
+#define BUG_INSTR_TYPE ".word "
+#endif
 
-/* this just causes an oops */
-#define BUG()           do { *(int *)0 = 0; } while (1)
 
-#endif
+#define BUG() _BUG(__FILE__, __LINE__, BUG_INSTR_VALUE)
+#define _BUG(file, line, value) __BUG(file, line, value)
+
+#ifdef CONFIG_DEBUG_BUGVERBOSE
+
+/*
+ * The extra indirection is to ensure that the __FILE__ string comes through
+ * OK. Many version of gcc do not support the asm %c parameter which would be
+ * preferable to this unpleasantness. We use mergeable string sections to
+ * avoid multiple copies of the string appearing in the kernel image.
+ */
+
+#define __BUG(__file, __line, __value)                          \
+do {                                                            \
+        BUILD_BUG_ON(sizeof(struct bug_entry) != 12);           \
+        asm volatile("1:\t" BUG_INSTR_TYPE #__value "\n"        \
+                ".pushsection .rodata.str, \"aMS\", %progbits, 1\n" \
+                "2:\t.asciz " #__file "\n"                      \
+                ".popsection\n"                                 \
+                ".pushsection __bug_table,\"a\"\n"              \
+                "3:\t.word 1b, 2b\n"                            \
+                "\t.hword " #__line ", 0\n"                     \
+                ".popsection");                                 \
+        unreachable();                                          \
+} while (0)
+
+#else  /* not CONFIG_DEBUG_BUGVERBOSE */
+
+#define __BUG(__file, __line, __value)                          \
+do {                                                            \
+        asm volatile(BUG_INSTR_TYPE #__value);                  \
+        unreachable();                                          \
+} while (0)
+#endif  /* CONFIG_DEBUG_BUGVERBOSE */
 
 #define HAVE_ARCH_BUG
-#endif
+#endif  /* CONFIG_BUG */
 
 #include <asm-generic/bug.h>
 
diff --git a/arch/arm/include/asm/cachetype.h b/arch/arm/include/asm/cachetype.h
index c023db09fcc1..7ea78144ae22 100644
--- a/arch/arm/include/asm/cachetype.h
+++ b/arch/arm/include/asm/cachetype.h
@@ -7,6 +7,7 @@
 #define CACHEID_VIPT                    (CACHEID_VIPT_ALIASING|CACHEID_VIPT_NONALIASING)
 #define CACHEID_ASID_TAGGED             (1 << 3)
 #define CACHEID_VIPT_I_ALIASING         (1 << 4)
+#define CACHEID_PIPT                    (1 << 5)
 
 extern unsigned int cacheid;
 
@@ -16,6 +17,7 @@ extern unsigned int cacheid;
 #define cache_is_vipt_aliasing()        cacheid_is(CACHEID_VIPT_ALIASING)
 #define icache_is_vivt_asid_tagged()    cacheid_is(CACHEID_ASID_TAGGED)
 #define icache_is_vipt_aliasing()       cacheid_is(CACHEID_VIPT_I_ALIASING)
+#define icache_is_pipt()                cacheid_is(CACHEID_PIPT)
 
 /*
  * __LINUX_ARM_ARCH__ is the minimum supported CPU architecture
@@ -26,7 +28,8 @@ extern unsigned int cacheid;
 #if __LINUX_ARM_ARCH__ >= 7
 #define __CACHEID_ARCH_MIN      (CACHEID_VIPT_NONALIASING |\
                                  CACHEID_ASID_TAGGED |\
-                                 CACHEID_VIPT_I_ALIASING)
+                                 CACHEID_VIPT_I_ALIASING |\
+                                 CACHEID_PIPT)
 #elif __LINUX_ARM_ARCH__ >= 6
 #define __CACHEID_ARCH_MIN      (~CACHEID_VIVT)
 #else
diff --git a/arch/arm/include/asm/cputime.h b/arch/arm/include/asm/cputime.h
deleted file mode 100644
index 3a8002a5fec7..000000000000
--- a/arch/arm/include/asm/cputime.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef __ARM_CPUTIME_H
-#define __ARM_CPUTIME_H
-
-#include <asm-generic/cputime.h>
-
-#endif /* __ARM_CPUTIME_H */
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
index cd4458f64171..cb47d28cbe1f 100644
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@ -8,6 +8,7 @@
 #define CPUID_CACHETYPE 1
 #define CPUID_TCM       2
 #define CPUID_TLBTYPE   3
+#define CPUID_MPIDR     5
 
 #define CPUID_EXT_PFR0  "c1, 0"
 #define CPUID_EXT_PFR1  "c1, 1"
@@ -70,6 +71,11 @@ static inline unsigned int __attribute_const__ read_cpuid_tcmstatus(void)
         return read_cpuid(CPUID_TCM);
 }
 
+static inline unsigned int __attribute_const__ read_cpuid_mpidr(void)
+{
+        return read_cpuid(CPUID_MPIDR);
+}
+
 /*
  * Intel's XScale3 core supports some v6 features (supersections, L2)
  * but advertises itself as v5 as it does not support the v6 ISA.  For
diff --git a/arch/arm/include/asm/device.h b/arch/arm/include/asm/device.h
index 9f390ce335cb..6615f03f56a5 100644
--- a/arch/arm/include/asm/device.h
+++ b/arch/arm/include/asm/device.h
@@ -10,6 +10,9 @@ struct dev_archdata {
 #ifdef CONFIG_DMABOUNCE
         struct dmabounce_device_info *dmabounce;
 #endif
+#ifdef CONFIG_IOMMU_API
+        void *iommu; /* private IOMMU data */
+#endif
 };
 
 struct pdev_archdata {
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 7a21d0bf7134..28b7ee8d7398 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -32,7 +32,7 @@ static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)
 
 static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
 {
-        return (void *)__bus_to_virt(addr);
+        return (void *)__bus_to_virt((unsigned long)addr);
 }
 
 static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
diff --git a/arch/arm/include/asm/dma.h b/arch/arm/include/asm/dma.h
index 628670e9d7c9..69a5b0b6455c 100644
--- a/arch/arm/include/asm/dma.h
+++ b/arch/arm/include/asm/dma.h
@@ -34,18 +34,18 @@
 #define DMA_MODE_CASCADE 0xc0
 #define DMA_AUTOINIT     0x10
 
-extern spinlock_t  dma_spin_lock;
+extern raw_spinlock_t  dma_spin_lock;
 
 static inline unsigned long claim_dma_lock(void)
 {
         unsigned long flags;
-        spin_lock_irqsave(&dma_spin_lock, flags);
+        raw_spin_lock_irqsave(&dma_spin_lock, flags);
         return flags;
 }
 
 static inline void release_dma_lock(unsigned long flags)
 {
-        spin_unlock_irqrestore(&dma_spin_lock, flags);
+        raw_spin_unlock_irqrestore(&dma_spin_lock, flags);
 }
 
 /* Clear the 'DMA Pointer Flip Flop'.
diff --git a/arch/arm/include/asm/ecard.h b/arch/arm/include/asm/ecard.h
index 29f2610efc70..eaea14676d57 100644
--- a/arch/arm/include/asm/ecard.h
+++ b/arch/arm/include/asm/ecard.h
@@ -161,7 +161,6 @@ struct expansion_card {
 
         /* Private internal data */
         const char              *card_desc;     /* Card description             */
-        CONST unsigned int      podaddr;        /* Base Linux address for card  */
         CONST loader_t          loader;         /* loader program */
         u64                     dma_mask;
 };
diff --git a/arch/arm/include/asm/emergency-restart.h b/arch/arm/include/asm/emergency-restart.h
deleted file mode 100644
index 108d8c48e42e..000000000000
--- a/arch/arm/include/asm/emergency-restart.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_EMERGENCY_RESTART_H
-#define _ASM_EMERGENCY_RESTART_H
-
-#include <asm-generic/emergency-restart.h>
-
-#endif /* _ASM_EMERGENCY_RESTART_H */
diff --git a/arch/arm/include/asm/errno.h b/arch/arm/include/asm/errno.h
deleted file mode 100644
index 6e60f0612bb6..000000000000
--- a/arch/arm/include/asm/errno.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ARM_ERRNO_H
-#define _ARM_ERRNO_H
-
-#include <asm-generic/errno.h>
-
-#endif
diff --git a/arch/arm/include/asm/exception.h b/arch/arm/include/asm/exception.h
new file mode 100644
index 000000000000..5abaf5bbd985
--- /dev/null
+++ b/arch/arm/include/asm/exception.h
@@ -0,0 +1,19 @@
+/*
+ * Annotations for marking C functions as exception handlers.
+ *
+ * These should only be used for C functions that are called from the low
+ * level exception entry code and not any intervening C code.
+ */
+#ifndef __ASM_ARM_EXCEPTION_H
+#define __ASM_ARM_EXCEPTION_H
+
+#include <linux/ftrace.h>
+
+#define __exception     __attribute__((section(".exception.text")))
+#ifdef CONFIG_FUNCTION_GRAPH_TRACER
+#define __exception_irq_entry   __irq_entry
+#else
+#define __exception_irq_entry   __exception
+#endif
+
+#endif /* __ASM_ARM_EXCEPTION_H */
diff --git a/arch/arm/include/asm/futex.h b/arch/arm/include/asm/futex.h
index 8c73900da9ed..253cc86318bf 100644
--- a/arch/arm/include/asm/futex.h
+++ b/arch/arm/include/asm/futex.h
@@ -25,17 +25,17 @@
 
 #ifdef CONFIG_SMP
 
-#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg)      \
+#define __futex_atomic_op(insn, ret, oldval, tmp, uaddr, oparg) \
         smp_mb();                                               \
         __asm__ __volatile__(                                   \
-        "1:     ldrex   %1, [%2]\n"                             \
+        "1:     ldrex   %1, [%3]\n"                             \
         "       " insn "\n"                                     \
-        "2:     strex   %1, %0, [%2]\n"                         \
-        "       teq     %1, #0\n"                               \
+        "2:     strex   %2, %0, [%3]\n"                         \
+        "       teq     %2, #0\n"                               \
         "       bne     1b\n"                                   \
         "       mov     %0, #0\n"                               \
-        __futex_atomic_ex_table("%4")                           \
-        : "=&r" (ret), "=&r" (oldval)                           \
+        __futex_atomic_ex_table("%5")                           \
+        : "=&r" (ret), "=&r" (oldval), "=&r" (tmp)              \
         : "r" (uaddr), "r" (oparg), "Ir" (-EFAULT)              \
         : "cc", "memory")
 
@@ -73,14 +73,14 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
 #include <linux/preempt.h>
 #include <asm/domain.h>
 
-#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg)      \
+#define __futex_atomic_op(insn, ret, oldval, tmp, uaddr, oparg) \
         __asm__ __volatile__(                                   \
-        "1:     " T(ldr) "      %1, [%2]\n"                     \
+        "1:     " T(ldr) "      %1, [%3]\n"                     \
         "       " insn "\n"                                     \
-        "2:     " T(str) "      %0, [%2]\n"                     \
+        "2:     " T(str) "      %0, [%3]\n"                     \
         "       mov     %0, #0\n"                               \
-        __futex_atomic_ex_table("%4")                           \
-        : "=&r" (ret), "=&r" (oldval)                           \
+        __futex_atomic_ex_table("%5")                           \
+        : "=&r" (ret), "=&r" (oldval), "=&r" (tmp)              \
         : "r" (uaddr), "r" (oparg), "Ir" (-EFAULT)              \
         : "cc", "memory")
 
@@ -117,7 +117,7 @@ futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
         int cmp = (encoded_op >> 24) & 15;
         int oparg = (encoded_op << 8) >> 20;
         int cmparg = (encoded_op << 20) >> 20;
-        int oldval = 0, ret;
+        int oldval = 0, ret, tmp;
 
         if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
                 oparg = 1 << oparg;
@@ -129,19 +129,19 @@ futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
 
         switch (op) {
         case FUTEX_OP_SET:
-                __futex_atomic_op("mov  %0, %3", ret, oldval, uaddr, oparg);
+                __futex_atomic_op("mov  %0, %4", ret, oldval, tmp, uaddr, oparg);
                 break;
         case FUTEX_OP_ADD:
-                __futex_atomic_op("add  %0, %1, %3", ret, oldval, uaddr, oparg);
+                __futex_atomic_op("add  %0, %1, %4", ret, oldval, tmp, uaddr, oparg);
                 break;
         case FUTEX_OP_OR:
-                __futex_atomic_op("orr  %0, %1, %3", ret, oldval, uaddr, oparg);
+                __futex_atomic_op("orr  %0, %1, %4", ret, oldval, tmp, uaddr, oparg);
                 break;
         case FUTEX_OP_ANDN:
-                __futex_atomic_op("and  %0, %1, %3", ret, oldval, uaddr, ~oparg);
+                __futex_atomic_op("and  %0, %1, %4", ret, oldval, tmp, uaddr, ~oparg);
                 break;
         case FUTEX_OP_XOR:
-                __futex_atomic_op("eor  %0, %1, %3", ret, oldval, uaddr, oparg);
+                __futex_atomic_op("eor  %0, %1, %4", ret, oldval, tmp, uaddr, oparg);
                 break;
         default:
                 ret = -ENOSYS;
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h
index 16bd48031583..434edccdf7f3 100644
--- a/arch/arm/include/asm/hardware/cache-l2x0.h
+++ b/arch/arm/include/asm/hardware/cache-l2x0.h
@@ -45,8 +45,15 @@
 #define L2X0_CLEAN_INV_LINE_PA          0x7F0
 #define L2X0_CLEAN_INV_LINE_IDX         0x7F8
 #define L2X0_CLEAN_INV_WAY              0x7FC
-#define L2X0_LOCKDOWN_WAY_D             0x900
-#define L2X0_LOCKDOWN_WAY_I             0x904
+/*
+ * The lockdown registers repeat 8 times for L310, the L210 has only one
+ * D and one I lockdown register at 0x0900 and 0x0904.
+ */
+#define L2X0_LOCKDOWN_WAY_D_BASE        0x900
+#define L2X0_LOCKDOWN_WAY_I_BASE        0x904
+#define L2X0_LOCKDOWN_STRIDE            0x08
+#define L2X0_ADDR_FILTER_START          0xC00
+#define L2X0_ADDR_FILTER_END            0xC04
 #define L2X0_TEST_OPERATION             0xF00
 #define L2X0_LINE_DATA                  0xF10
 #define L2X0_LINE_TAG                   0xF30
@@ -60,11 +67,26 @@
 #define L2X0_CACHE_ID_PART_MASK         (0xf << 6)
 #define L2X0_CACHE_ID_PART_L210         (1 << 6)
 #define L2X0_CACHE_ID_PART_L310         (3 << 6)
+#define L2X0_CACHE_ID_RTL_MASK          0x3f
+#define L2X0_CACHE_ID_RTL_R0P0          0x0
+#define L2X0_CACHE_ID_RTL_R1P0          0x2
+#define L2X0_CACHE_ID_RTL_R2P0          0x4
+#define L2X0_CACHE_ID_RTL_R3P0          0x5
+#define L2X0_CACHE_ID_RTL_R3P1          0x6
+#define L2X0_CACHE_ID_RTL_R3P2          0x8
 
 #define L2X0_AUX_CTRL_MASK                      0xc0000fff
+#define L2X0_AUX_CTRL_DATA_RD_LATENCY_SHIFT     0
+#define L2X0_AUX_CTRL_DATA_RD_LATENCY_MASK      0x7
+#define L2X0_AUX_CTRL_DATA_WR_LATENCY_SHIFT     3
+#define L2X0_AUX_CTRL_DATA_WR_LATENCY_MASK      (0x7 << 3)
+#define L2X0_AUX_CTRL_TAG_LATENCY_SHIFT         6
+#define L2X0_AUX_CTRL_TAG_LATENCY_MASK          (0x7 << 6)
+#define L2X0_AUX_CTRL_DIRTY_LATENCY_SHIFT       9
+#define L2X0_AUX_CTRL_DIRTY_LATENCY_MASK        (0x7 << 9)
 #define L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT       16
 #define L2X0_AUX_CTRL_WAY_SIZE_SHIFT            17
-#define L2X0_AUX_CTRL_WAY_SIZE_MASK             (0x3 << 17)
+#define L2X0_AUX_CTRL_WAY_SIZE_MASK             (0x7 << 17)
 #define L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT      22
 #define L2X0_AUX_CTRL_NS_LOCKDOWN_SHIFT         26
 #define L2X0_AUX_CTRL_NS_INT_CTRL_SHIFT         27
@@ -72,8 +94,33 @@
 #define L2X0_AUX_CTRL_INSTR_PREFETCH_SHIFT      29
 #define L2X0_AUX_CTRL_EARLY_BRESP_SHIFT         30
 
+#define L2X0_LATENCY_CTRL_SETUP_SHIFT   0
+#define L2X0_LATENCY_CTRL_RD_SHIFT      4
+#define L2X0_LATENCY_CTRL_WR_SHIFT      8
+
+#define L2X0_ADDR_FILTER_EN             1
+
 #ifndef __ASSEMBLY__
 extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask);
+extern int l2x0_of_init(__u32 aux_val, __u32 aux_mask);
+
+struct l2x0_regs {
+        unsigned long phy_base;
+        unsigned long aux_ctrl;
+        /*
+         * Whether the following registers need to be saved/restored
+         * depends on platform
+         */
+        unsigned long tag_latency;
+        unsigned long data_latency;
+        unsigned long filter_start;
+        unsigned long filter_end;
+        unsigned long prefetch_ctrl;
+        unsigned long pwr_ctrl;
+};
+
+extern struct l2x0_regs l2x0_saved_regs;
+
 #endif
 
 #endif
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index d66605dea55a..065d100fa63e 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -80,6 +80,7 @@ extern void __iomem *__arm_ioremap_caller(unsigned long, size_t, unsigned int,
 
 extern void __iomem *__arm_ioremap_pfn(unsigned long, unsigned long, size_t, unsigned int);
 extern void __iomem *__arm_ioremap(unsigned long, size_t, unsigned int);
+extern void __iomem *__arm_ioremap_exec(unsigned long, size_t, bool cached);
 extern void __iounmap(volatile void __iomem *addr);
 
 /*
@@ -110,6 +111,27 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
 #include <mach/io.h>
 
 /*
+ * This is the limit of PC card/PCI/ISA IO space, which is by default
+ * 64K if we have PC card, PCI or ISA support.  Otherwise, default to
+ * zero to prevent ISA/PCI drivers claiming IO space (and potentially
+ * oopsing.)
+ *
+ * Only set this larger if you really need inb() et.al. to operate over
+ * a larger address space.  Note that SOC_COMMON ioremaps each sockets
+ * IO space area, and so inb() et.al. must be defined to operate as per
+ * readb() et.al. on such platforms.
+ */
+#ifndef IO_SPACE_LIMIT
+#if defined(CONFIG_PCMCIA_SOC_COMMON) || defined(CONFIG_PCMCIA_SOC_COMMON_MODULE)
+#define IO_SPACE_LIMIT ((resource_size_t)0xffffffff)
+#elif defined(CONFIG_PCI) || defined(CONFIG_ISA) || defined(CONFIG_PCCARD)
+#define IO_SPACE_LIMIT ((resource_size_t)0xffff)
+#else
+#define IO_SPACE_LIMIT ((resource_size_t)0)
+#endif
+#endif
+
+/*
  *  IO port access primitives
  *  -------------------------
  *
@@ -189,11 +211,11 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
  * IO port primitives for more information.
  */
 #ifdef __mem_pci
-#define readb_relaxed(c) ({ u8  __v = __raw_readb(__mem_pci(c)); __v; })
-#define readw_relaxed(c) ({ u16 __v = le16_to_cpu((__force __le16) \
-                                        __raw_readw(__mem_pci(c))); __v; })
-#define readl_relaxed(c) ({ u32 __v = le32_to_cpu((__force __le32) \
-                                        __raw_readl(__mem_pci(c))); __v; })
+#define readb_relaxed(c) ({ u8  __r = __raw_readb(__mem_pci(c)); __r; })
+#define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \
+                                        __raw_readw(__mem_pci(c))); __r; })
+#define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \
+                                        __raw_readl(__mem_pci(c))); __r; })
 
 #define writeb_relaxed(v,c)     ((void)__raw_writeb(v,__mem_pci(c)))
 #define writew_relaxed(v,c)     ((void)__raw_writew((__force u16) \
@@ -238,7 +260,7 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
  * ioremap and friends.
  *
  * ioremap takes a PCI memory address, as specified in
- * Documentation/IO-mapping.txt.
+ * Documentation/io-mapping.txt.
  *
  */
 #ifndef __arch_ioremap
@@ -260,10 +282,16 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
 #define ioread16(p)     ({ unsigned int __v = le16_to_cpu((__force __le16)__raw_readw(p)); __iormb(); __v; })
 #define ioread32(p)     ({ unsigned int __v = le32_to_cpu((__force __le32)__raw_readl(p)); __iormb(); __v; })
 
+#define ioread16be(p)   ({ unsigned int __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; })
+#define ioread32be(p)   ({ unsigned int __v = be32_to_cpu((__force __be32)__raw_readl(p)); __iormb(); __v; })
+
 #define iowrite8(v,p)   ({ __iowmb(); (void)__raw_writeb(v, p); })
 #define iowrite16(v,p)  ({ __iowmb(); (void)__raw_writew((__force __u16)cpu_to_le16(v), p); })
 #define iowrite32(v,p)  ({ __iowmb(); (void)__raw_writel((__force __u32)cpu_to_le32(v), p); })
 
+#define iowrite16be(v,p) ({ __iowmb(); (void)__raw_writew((__force __u16)cpu_to_be16(v), p); })
+#define iowrite32be(v,p) ({ __iowmb(); (void)__raw_writel((__force __u32)cpu_to_be32(v), p); })
+
 #define ioread8_rep(p,d,c)      __raw_readsb(p,d,c)
 #define ioread16_rep(p,d,c)     __raw_readsw(p,d,c)
 #define ioread32_rep(p,d,c)     __raw_readsl(p,d,c)
diff --git a/arch/arm/include/asm/ioctl.h b/arch/arm/include/asm/ioctl.h
deleted file mode 100644
index b279fe06dfe5..000000000000
--- a/arch/arm/include/asm/ioctl.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/ioctl.h>
diff --git a/arch/arm/include/asm/irq_regs.h b/arch/arm/include/asm/irq_regs.h
deleted file mode 100644
index 3dd9c0b70270..000000000000
--- a/arch/arm/include/asm/irq_regs.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/irq_regs.h>
diff --git a/arch/arm/include/asm/kdebug.h b/arch/arm/include/asm/kdebug.h
deleted file mode 100644
index 6ece1b037665..000000000000
--- a/arch/arm/include/asm/kdebug.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/kdebug.h>
diff --git a/arch/arm/include/asm/local.h b/arch/arm/include/asm/local.h
deleted file mode 100644
index c11c530f74d0..000000000000
--- a/arch/arm/include/asm/local.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/local.h>
diff --git a/arch/arm/include/asm/local64.h b/arch/arm/include/asm/local64.h
deleted file mode 100644
index 36c93b5cc239..000000000000
--- a/arch/arm/include/asm/local64.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/local64.h>
diff --git a/arch/arm/include/asm/localtimer.h b/arch/arm/include/asm/localtimer.h
index 080d74f8128d..6fd955d34c65 100644
--- a/arch/arm/include/asm/localtimer.h
+++ b/arch/arm/include/asm/localtimer.h
@@ -10,6 +10,8 @@
 #ifndef __ASM_ARM_LOCALTIMER_H
 #define __ASM_ARM_LOCALTIMER_H
 
+#include <linux/errno.h>
+
 struct clock_event_device;
 
 /*
@@ -22,6 +24,10 @@ void percpu_timer_setup(void);
  */
 asmlinkage void do_local_timer(struct pt_regs *);
 
+/*
+ * Called from C code
+ */
+void handle_local_timer(struct pt_regs *);
 
 #ifdef CONFIG_LOCAL_TIMERS
 
diff --git a/arch/arm/include/asm/mach/arch.h b/arch/arm/include/asm/mach/arch.h
index 217aa1911dd7..c5699987fa98 100644
--- a/arch/arm/include/asm/mach/arch.h
+++ b/arch/arm/include/asm/mach/arch.h
@@ -34,8 +34,7 @@ struct machine_desc {
         unsigned int            reserve_lp1 :1; /* never has lp1        */
         unsigned int            reserve_lp2 :1; /* never has lp2        */
         unsigned int            soft_reboot :1; /* soft reboot          */
-        void                    (*fixup)(struct machine_desc *,
-                                         struct tag *, char **,
+        void                    (*fixup)(struct tag *, char **,
                                          struct meminfo *);
         void                    (*reserve)(void);/* reserve mem blocks  */
         void                    (*map_io)(void);/* IO mapping function  */
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index b8de516e600e..441fc4fe8263 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -160,7 +160,6 @@
  * so that all we need to do is modify the 8-bit constant field.
  */
 #define __PV_BITS_31_24 0x81000000
-#define __PV_BITS_23_16 0x00810000
 
 extern unsigned long __pv_phys_offset;
 #define PHYS_OFFSET __pv_phys_offset
@@ -178,9 +177,6 @@ static inline unsigned long __virt_to_phys(unsigned long x)
 {
         unsigned long t;
         __pv_stub(x, t, "add", __PV_BITS_31_24);
-#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
-        __pv_stub(t, t, "add", __PV_BITS_23_16);
-#endif
         return t;
 }
 
@@ -188,9 +184,6 @@ static inline unsigned long __phys_to_virt(unsigned long x)
 {
         unsigned long t;
         __pv_stub(x, t, "sub", __PV_BITS_31_24);
-#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
-        __pv_stub(t, t, "sub", __PV_BITS_23_16);
-#endif
         return t;
 }
 #else
diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h
index b4ffe9d5b526..14965658a923 100644
--- a/arch/arm/include/asm/mmu.h
+++ b/arch/arm/include/asm/mmu.h
@@ -6,7 +6,7 @@
 typedef struct {
 #ifdef CONFIG_CPU_HAS_ASID
         unsigned int id;
-        spinlock_t id_lock;
+        raw_spinlock_t id_lock;
 #endif
         unsigned int kvm_seq;
 } mm_context_t;
@@ -16,7 +16,7 @@ typedef struct {
 
 /* init_mm.context.id_lock should be initialized. */
 #define INIT_MM_CONTEXT(name)                                                 \
-        .context.id_lock    = __SPIN_LOCK_UNLOCKED(name.context.id_lock),
+        .context.id_lock    = __RAW_SPIN_LOCK_UNLOCKED(name.context.id_lock),
 #else
 #define ASID(mm)        (0)
 #endif
diff --git a/arch/arm/include/asm/module.h b/arch/arm/include/asm/module.h
index 543b44916d2c..6c6809f982f1 100644
--- a/arch/arm/include/asm/module.h
+++ b/arch/arm/include/asm/module.h
@@ -31,11 +31,7 @@ struct mod_arch_specific {
 
 /* Add __virt_to_phys patching state as well */
 #ifdef CONFIG_ARM_PATCH_PHYS_VIRT
-#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
-#define MODULE_ARCH_VERMAGIC_P2V "p2v16 "
-#else
 #define MODULE_ARCH_VERMAGIC_P2V "p2v8 "
-#endif
 #else
 #define MODULE_ARCH_VERMAGIC_P2V ""
 #endif
diff --git a/arch/arm/include/asm/outercache.h b/arch/arm/include/asm/outercache.h
index d8387437ec5a..53426c66352a 100644
--- a/arch/arm/include/asm/outercache.h
+++ b/arch/arm/include/asm/outercache.h
@@ -34,6 +34,7 @@ struct outer_cache_fns {
         void (*sync)(void);
 #endif
         void (*set_debug)(unsigned long);
+        void (*resume)(void);
 };
 
 #ifdef CONFIG_OUTER_CACHE
@@ -74,6 +75,12 @@ static inline void outer_disable(void)
                 outer_cache.disable();
 }
 
+static inline void outer_resume(void)
+{
+        if (outer_cache.resume)
+                outer_cache.resume();
+}
+
 #else
 
 static inline void outer_inv_range(phys_addr_t start, phys_addr_t end)
diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h
index ac75d0848889..ca94653f1ecb 100644
--- a/arch/arm/include/asm/page.h
+++ b/arch/arm/include/asm/page.h
@@ -151,47 +151,7 @@ extern void __cpu_copy_user_highpage(struct page *to, struct page *from,
 #define clear_page(page)        memset((void *)(page), 0, PAGE_SIZE)
 extern void copy_page(void *to, const void *from);
 
-typedef unsigned long pteval_t;
-
-#undef STRICT_MM_TYPECHECKS
-
-#ifdef STRICT_MM_TYPECHECKS
-/*
- * These are used to make use of C type-checking..
- */
-typedef struct { pteval_t pte; } pte_t;
-typedef struct { unsigned long pmd; } pmd_t;
-typedef struct { unsigned long pgd[2]; } pgd_t;
-typedef struct { unsigned long pgprot; } pgprot_t;
-
-#define pte_val(x)      ((x).pte)
-#define pmd_val(x)      ((x).pmd)
-#define pgd_val(x)      ((x).pgd[0])
-#define pgprot_val(x)   ((x).pgprot)
-
-#define __pte(x)        ((pte_t) { (x) } )
-#define __pmd(x)        ((pmd_t) { (x) } )
-#define __pgprot(x)     ((pgprot_t) { (x) } )
-
-#else
-/*
- * .. while these make it easier on the compiler
- */
-typedef pteval_t pte_t;
-typedef unsigned long pmd_t;
-typedef unsigned long pgd_t[2];
-typedef unsigned long pgprot_t;
-
-#define pte_val(x)      (x)
-#define pmd_val(x)      (x)
-#define pgd_val(x)      ((x)[0])
-#define pgprot_val(x)   (x)
-
-#define __pte(x)        (x)
-#define __pmd(x)        (x)
-#define __pgprot(x)     (x)
-
-#endif /* STRICT_MM_TYPECHECKS */
+#include <asm/pgtable-2level-types.h>
 
 #endif /* CONFIG_MMU */
 
diff --git a/arch/arm/include/asm/percpu.h b/arch/arm/include/asm/percpu.h
deleted file mode 100644
index b4e32d8ec072..000000000000
--- a/arch/arm/include/asm/percpu.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef __ARM_PERCPU
-#define __ARM_PERCPU
-
-#include <asm-generic/percpu.h>
-
-#endif
diff --git a/arch/arm/include/asm/pgalloc.h b/arch/arm/include/asm/pgalloc.h
index 22de005f159c..3e08fd3fbb6b 100644
--- a/arch/arm/include/asm/pgalloc.h
+++ b/arch/arm/include/asm/pgalloc.h
@@ -105,9 +105,9 @@ static inline void pte_free(struct mm_struct *mm, pgtable_t pte)
 }
 
 static inline void __pmd_populate(pmd_t *pmdp, phys_addr_t pte,
-        unsigned long prot)
+                                  pmdval_t prot)
 {
-        unsigned long pmdval = (pte + PTE_HWTABLE_OFF) | prot;
+        pmdval_t pmdval = (pte + PTE_HWTABLE_OFF) | prot;
         pmdp[0] = __pmd(pmdval);
         pmdp[1] = __pmd(pmdval + 256 * sizeof(pte_t));
         flush_pmd_entry(pmdp);
diff --git a/arch/arm/include/asm/pgtable-2level-hwdef.h b/arch/arm/include/asm/pgtable-2level-hwdef.h
new file mode 100644
index 000000000000..5cfba15cb401
--- /dev/null
+++ b/arch/arm/include/asm/pgtable-2level-hwdef.h
@@ -0,0 +1,93 @@
+/*
+ *  arch/arm/include/asm/pgtable-2level-hwdef.h
+ *
+ *  Copyright (C) 1995-2002 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef _ASM_PGTABLE_2LEVEL_HWDEF_H
+#define _ASM_PGTABLE_2LEVEL_HWDEF_H
+
+/*
+ * Hardware page table definitions.
+ *
+ * + Level 1 descriptor (PMD)
+ *   - common
+ */
+#define PMD_TYPE_MASK           (_AT(pmdval_t, 3) << 0)
+#define PMD_TYPE_FAULT          (_AT(pmdval_t, 0) << 0)
+#define PMD_TYPE_TABLE          (_AT(pmdval_t, 1) << 0)
+#define PMD_TYPE_SECT           (_AT(pmdval_t, 2) << 0)
+#define PMD_BIT4                (_AT(pmdval_t, 1) << 4)
+#define PMD_DOMAIN(x)           (_AT(pmdval_t, (x)) << 5)
+#define PMD_PROTECTION          (_AT(pmdval_t, 1) << 9)         /* v5 */
+/*
+ *   - section
+ */
+#define PMD_SECT_BUFFERABLE     (_AT(pmdval_t, 1) << 2)
+#define PMD_SECT_CACHEABLE      (_AT(pmdval_t, 1) << 3)
+#define PMD_SECT_XN             (_AT(pmdval_t, 1) << 4)         /* v6 */
+#define PMD_SECT_AP_WRITE       (_AT(pmdval_t, 1) << 10)
+#define PMD_SECT_AP_READ        (_AT(pmdval_t, 1) << 11)
+#define PMD_SECT_TEX(x)         (_AT(pmdval_t, (x)) << 12)      /* v5 */
+#define PMD_SECT_APX            (_AT(pmdval_t, 1) << 15)        /* v6 */
+#define PMD_SECT_S              (_AT(pmdval_t, 1) << 16)        /* v6 */
+#define PMD_SECT_nG             (_AT(pmdval_t, 1) << 17)        /* v6 */
+#define PMD_SECT_SUPER          (_AT(pmdval_t, 1) << 18)        /* v6 */
+#define PMD_SECT_AF             (_AT(pmdval_t, 0))
+
+#define PMD_SECT_UNCACHED       (_AT(pmdval_t, 0))
+#define PMD_SECT_BUFFERED       (PMD_SECT_BUFFERABLE)
+#define PMD_SECT_WT             (PMD_SECT_CACHEABLE)
+#define PMD_SECT_WB             (PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE)
+#define PMD_SECT_MINICACHE      (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE)
+#define PMD_SECT_WBWA           (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE)
+#define PMD_SECT_NONSHARED_DEV  (PMD_SECT_TEX(2))
+
+/*
+ *   - coarse table (not used)
+ */
+
+/*
+ * + Level 2 descriptor (PTE)
+ *   - common
+ */
+#define PTE_TYPE_MASK           (_AT(pteval_t, 3) << 0)
+#define PTE_TYPE_FAULT          (_AT(pteval_t, 0) << 0)
+#define PTE_TYPE_LARGE          (_AT(pteval_t, 1) << 0)
+#define PTE_TYPE_SMALL          (_AT(pteval_t, 2) << 0)
+#define PTE_TYPE_EXT            (_AT(pteval_t, 3) << 0)         /* v5 */
+#define PTE_BUFFERABLE          (_AT(pteval_t, 1) << 2)
+#define PTE_CACHEABLE           (_AT(pteval_t, 1) << 3)
+
+/*
+ *   - extended small page/tiny page
+ */
+#define PTE_EXT_XN              (_AT(pteval_t, 1) << 0)         /* v6 */
+#define PTE_EXT_AP_MASK         (_AT(pteval_t, 3) << 4)
+#define PTE_EXT_AP0             (_AT(pteval_t, 1) << 4)
+#define PTE_EXT_AP1             (_AT(pteval_t, 2) << 4)
+#define PTE_EXT_AP_UNO_SRO      (_AT(pteval_t, 0) << 4)
+#define PTE_EXT_AP_UNO_SRW      (PTE_EXT_AP0)
+#define PTE_EXT_AP_URO_SRW      (PTE_EXT_AP1)
+#define PTE_EXT_AP_URW_SRW      (PTE_EXT_AP1|PTE_EXT_AP0)
+#define PTE_EXT_TEX(x)          (_AT(pteval_t, (x)) << 6)       /* v5 */
+#define PTE_EXT_APX             (_AT(pteval_t, 1) << 9)         /* v6 */
+#define PTE_EXT_COHERENT        (_AT(pteval_t, 1) << 9)         /* XScale3 */
+#define PTE_EXT_SHARED          (_AT(pteval_t, 1) << 10)        /* v6 */
+#define PTE_EXT_NG              (_AT(pteval_t, 1) << 11)        /* v6 */
+
+/*
+ *   - small page
+ */
+#define PTE_SMALL_AP_MASK       (_AT(pteval_t, 0xff) << 4)
+#define PTE_SMALL_AP_UNO_SRO    (_AT(pteval_t, 0x00) << 4)
+#define PTE_SMALL_AP_UNO_SRW    (_AT(pteval_t, 0x55) << 4)
+#define PTE_SMALL_AP_URO_SRW    (_AT(pteval_t, 0xaa) << 4)
+#define PTE_SMALL_AP_URW_SRW    (_AT(pteval_t, 0xff) << 4)
+
+#define PHYS_MASK               (~0UL)
+
+#endif
diff --git a/arch/arm/include/asm/pgtable-2level-types.h b/arch/arm/include/asm/pgtable-2level-types.h
new file mode 100644
index 000000000000..66cb5b0e89c5
--- /dev/null
+++ b/arch/arm/include/asm/pgtable-2level-types.h
@@ -0,0 +1,67 @@
+/*
+ * arch/arm/include/asm/pgtable-2level-types.h
+ *
+ * Copyright (C) 1995-2003 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef _ASM_PGTABLE_2LEVEL_TYPES_H
+#define _ASM_PGTABLE_2LEVEL_TYPES_H
+
+#include <asm/types.h>
+
+typedef u32 pteval_t;
+typedef u32 pmdval_t;
+
+#undef STRICT_MM_TYPECHECKS
+
+#ifdef STRICT_MM_TYPECHECKS
+/*
+ * These are used to make use of C type-checking..
+ */
+typedef struct { pteval_t pte; } pte_t;
+typedef struct { pmdval_t pmd; } pmd_t;
+typedef struct { pmdval_t pgd[2]; } pgd_t;
+typedef struct { pteval_t pgprot; } pgprot_t;
+
+#define pte_val(x)      ((x).pte)
+#define pmd_val(x)      ((x).pmd)
+#define pgd_val(x)      ((x).pgd[0])
+#define pgprot_val(x)   ((x).pgprot)
+
+#define __pte(x)        ((pte_t) { (x) } )
+#define __pmd(x)        ((pmd_t) { (x) } )
+#define __pgprot(x)     ((pgprot_t) { (x) } )
+
+#else
+/*
+ * .. while these make it easier on the compiler
+ */
+typedef pteval_t pte_t;
+typedef pmdval_t pmd_t;
+typedef pmdval_t pgd_t[2];
+typedef pteval_t pgprot_t;
+
+#define pte_val(x)      (x)
+#define pmd_val(x)      (x)
+#define pgd_val(x)      ((x)[0])
+#define pgprot_val(x)   (x)
+
+#define __pte(x)        (x)
+#define __pmd(x)        (x)
+#define __pgprot(x)     (x)
+
+#endif /* STRICT_MM_TYPECHECKS */
+
+#endif  /* _ASM_PGTABLE_2LEVEL_TYPES_H */
diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h
new file mode 100644
index 000000000000..470457e1cfc5
--- /dev/null
+++ b/arch/arm/include/asm/pgtable-2level.h
@@ -0,0 +1,143 @@
+/*
+ *  arch/arm/include/asm/pgtable-2level.h
+ *
+ *  Copyright (C) 1995-2002 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef _ASM_PGTABLE_2LEVEL_H
+#define _ASM_PGTABLE_2LEVEL_H
+
+/*
+ * Hardware-wise, we have a two level page table structure, where the first
+ * level has 4096 entries, and the second level has 256 entries.  Each entry
+ * is one 32-bit word.  Most of the bits in the second level entry are used
+ * by hardware, and there aren't any "accessed" and "dirty" bits.
+ *
+ * Linux on the other hand has a three level page table structure, which can
+ * be wrapped to fit a two level page table structure easily - using the PGD
+ * and PTE only.  However, Linux also expects one "PTE" table per page, and
+ * at least a "dirty" bit.
+ *
+ * Therefore, we tweak the implementation slightly - we tell Linux that we
+ * have 2048 entries in the first level, each of which is 8 bytes (iow, two
+ * hardware pointers to the second level.)  The second level contains two
+ * hardware PTE tables arranged contiguously, preceded by Linux versions
+ * which contain the state information Linux needs.  We, therefore, end up
+ * with 512 entries in the "PTE" level.
+ *
+ * This leads to the page tables having the following layout:
+ *
+ *    pgd             pte
+ * |        |
+ * +--------+
+ * |        |       +------------+ +0
+ * +- - - - +       | Linux pt 0 |
+ * |        |       +------------+ +1024
+ * +--------+ +0    | Linux pt 1 |
+ * |        |-----> +------------+ +2048
+ * +- - - - + +4    |  h/w pt 0  |
+ * |        |-----> +------------+ +3072
+ * +--------+ +8    |  h/w pt 1  |
+ * |        |       +------------+ +4096
+ *
+ * See L_PTE_xxx below for definitions of bits in the "Linux pt", and
+ * PTE_xxx for definitions of bits appearing in the "h/w pt".
+ *
+ * PMD_xxx definitions refer to bits in the first level page table.
+ *
+ * The "dirty" bit is emulated by only granting hardware write permission
+ * iff the page is marked "writable" and "dirty" in the Linux PTE.  This
+ * means that a write to a clean page will cause a permission fault, and
+ * the Linux MM layer will mark the page dirty via handle_pte_fault().
+ * For the hardware to notice the permission change, the TLB entry must
+ * be flushed, and ptep_set_access_flags() does that for us.
+ *
+ * The "accessed" or "young" bit is emulated by a similar method; we only
+ * allow accesses to the page if the "young" bit is set.  Accesses to the
+ * page will cause a fault, and handle_pte_fault() will set the young bit
+ * for us as long as the page is marked present in the corresponding Linux
+ * PTE entry.  Again, ptep_set_access_flags() will ensure that the TLB is
+ * up to date.
+ *
+ * However, when the "young" bit is cleared, we deny access to the page
+ * by clearing the hardware PTE.  Currently Linux does not flush the TLB
+ * for us in this case, which means the TLB will retain the transation
+ * until either the TLB entry is evicted under pressure, or a context
+ * switch which changes the user space mapping occurs.
+ */
+#define PTRS_PER_PTE            512
+#define PTRS_PER_PMD            1
+#define PTRS_PER_PGD            2048
+
+#define PTE_HWTABLE_PTRS        (PTRS_PER_PTE)
+#define PTE_HWTABLE_OFF         (PTE_HWTABLE_PTRS * sizeof(pte_t))
+#define PTE_HWTABLE_SIZE        (PTRS_PER_PTE * sizeof(u32))
+
+/*
+ * PMD_SHIFT determines the size of the area a second-level page table can map
+ * PGDIR_SHIFT determines what a third-level page table entry can map
+ */
+#define PMD_SHIFT               21
+#define PGDIR_SHIFT             21
+
+#define PMD_SIZE                (1UL << PMD_SHIFT)
+#define PMD_MASK                (~(PMD_SIZE-1))
+#define PGDIR_SIZE              (1UL << PGDIR_SHIFT)
+#define PGDIR_MASK              (~(PGDIR_SIZE-1))
+
+/*
+ * section address mask and size definitions.
+ */
+#define SECTION_SHIFT           20
+#define SECTION_SIZE            (1UL << SECTION_SHIFT)
+#define SECTION_MASK            (~(SECTION_SIZE-1))
+
+/*
+ * ARMv6 supersection address mask and size definitions.
+ */
+#define SUPERSECTION_SHIFT      24
+#define SUPERSECTION_SIZE       (1UL << SUPERSECTION_SHIFT)
+#define SUPERSECTION_MASK       (~(SUPERSECTION_SIZE-1))
+
+#define USER_PTRS_PER_PGD       (TASK_SIZE / PGDIR_SIZE)
+
+/*
+ * "Linux" PTE definitions.
+ *
+ * We keep two sets of PTEs - the hardware and the linux version.
+ * This allows greater flexibility in the way we map the Linux bits
+ * onto the hardware tables, and allows us to have YOUNG and DIRTY
+ * bits.
+ *
+ * The PTE table pointer refers to the hardware entries; the "Linux"
+ * entries are stored 1024 bytes below.
+ */
+#define L_PTE_PRESENT           (_AT(pteval_t, 1) << 0)
+#define L_PTE_YOUNG             (_AT(pteval_t, 1) << 1)
+#define L_PTE_FILE              (_AT(pteval_t, 1) << 2) /* only when !PRESENT */
+#define L_PTE_DIRTY             (_AT(pteval_t, 1) << 6)
+#define L_PTE_RDONLY            (_AT(pteval_t, 1) << 7)
+#define L_PTE_USER              (_AT(pteval_t, 1) << 8)
+#define L_PTE_XN                (_AT(pteval_t, 1) << 9)
+#define L_PTE_SHARED            (_AT(pteval_t, 1) << 10)        /* shared(v6), coherent(xsc3) */
+
+/*
+ * These are the memory types, defined to be compatible with
+ * pre-ARMv6 CPUs cacheable and bufferable bits:   XXCB
+ */
+#define L_PTE_MT_UNCACHED       (_AT(pteval_t, 0x00) << 2)      /* 0000 */
+#define L_PTE_MT_BUFFERABLE     (_AT(pteval_t, 0x01) << 2)      /* 0001 */
+#define L_PTE_MT_WRITETHROUGH   (_AT(pteval_t, 0x02) << 2)      /* 0010 */
+#define L_PTE_MT_WRITEBACK      (_AT(pteval_t, 0x03) << 2)      /* 0011 */
+#define L_PTE_MT_MINICACHE      (_AT(pteval_t, 0x06) << 2)      /* 0110 (sa1100, xscale) */
+#define L_PTE_MT_WRITEALLOC     (_AT(pteval_t, 0x07) << 2)      /* 0111 */
+#define L_PTE_MT_DEV_SHARED     (_AT(pteval_t, 0x04) << 2)      /* 0100 */
+#define L_PTE_MT_DEV_NONSHARED  (_AT(pteval_t, 0x0c) << 2)      /* 1100 */
+#define L_PTE_MT_DEV_WC         (_AT(pteval_t, 0x09) << 2)      /* 1001 */
+#define L_PTE_MT_DEV_CACHED     (_AT(pteval_t, 0x0b) << 2)      /* 1011 */
+#define L_PTE_MT_MASK           (_AT(pteval_t, 0x0f) << 2)
+
+#endif /* _ASM_PGTABLE_2LEVEL_H */
diff --git a/arch/arm/include/asm/pgtable-hwdef.h b/arch/arm/include/asm/pgtable-hwdef.h
index fd1521d5cb9d..183111164ce9 100644
--- a/arch/arm/include/asm/pgtable-hwdef.h
+++ b/arch/arm/include/asm/pgtable-hwdef.h
@@ -10,81 +10,6 @@
 #ifndef _ASMARM_PGTABLE_HWDEF_H
 #define _ASMARM_PGTABLE_HWDEF_H
 
-/*
- * Hardware page table definitions.
- *
- * + Level 1 descriptor (PMD)
- *   - common
- */
-#define PMD_TYPE_MASK           (3 << 0)
-#define PMD_TYPE_FAULT          (0 << 0)
-#define PMD_TYPE_TABLE          (1 << 0)
-#define PMD_TYPE_SECT           (2 << 0)
-#define PMD_BIT4                (1 << 4)
-#define PMD_DOMAIN(x)           ((x) << 5)
-#define PMD_PROTECTION          (1 << 9)        /* v5 */
-/*
- *   - section
- */
-#define PMD_SECT_BUFFERABLE     (1 << 2)
-#define PMD_SECT_CACHEABLE      (1 << 3)
-#define PMD_SECT_XN             (1 << 4)        /* v6 */
-#define PMD_SECT_AP_WRITE       (1 << 10)
-#define PMD_SECT_AP_READ        (1 << 11)
-#define PMD_SECT_TEX(x)         ((x) << 12)     /* v5 */
-#define PMD_SECT_APX            (1 << 15)       /* v6 */
-#define PMD_SECT_S              (1 << 16)       /* v6 */
-#define PMD_SECT_nG             (1 << 17)       /* v6 */
-#define PMD_SECT_SUPER          (1 << 18)       /* v6 */
-
-#define PMD_SECT_UNCACHED       (0)
-#define PMD_SECT_BUFFERED       (PMD_SECT_BUFFERABLE)
-#define PMD_SECT_WT             (PMD_SECT_CACHEABLE)
-#define PMD_SECT_WB             (PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE)
-#define PMD_SECT_MINICACHE      (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE)
-#define PMD_SECT_WBWA           (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE)
-#define PMD_SECT_NONSHARED_DEV  (PMD_SECT_TEX(2))
-
-/*
- *   - coarse table (not used)
- */
-
-/*
- * + Level 2 descriptor (PTE)
- *   - common
- */
-#define PTE_TYPE_MASK           (3 << 0)
-#define PTE_TYPE_FAULT          (0 << 0)
-#define PTE_TYPE_LARGE          (1 << 0)
-#define PTE_TYPE_SMALL          (2 << 0)
-#define PTE_TYPE_EXT            (3 << 0)        /* v5 */
-#define PTE_BUFFERABLE          (1 << 2)
-#define PTE_CACHEABLE           (1 << 3)
-
-/*
- *   - extended small page/tiny page
- */
-#define PTE_EXT_XN              (1 << 0)        /* v6 */
-#define PTE_EXT_AP_MASK         (3 << 4)
-#define PTE_EXT_AP0             (1 << 4)
-#define PTE_EXT_AP1             (2 << 4)
-#define PTE_EXT_AP_UNO_SRO      (0 << 4)
-#define PTE_EXT_AP_UNO_SRW      (PTE_EXT_AP0)
-#define PTE_EXT_AP_URO_SRW      (PTE_EXT_AP1)
-#define PTE_EXT_AP_URW_SRW      (PTE_EXT_AP1|PTE_EXT_AP0)
-#define PTE_EXT_TEX(x)          ((x) << 6)      /* v5 */
-#define PTE_EXT_APX             (1 << 9)        /* v6 */
-#define PTE_EXT_COHERENT        (1 << 9)        /* XScale3 */
-#define PTE_EXT_SHARED          (1 << 10)       /* v6 */
-#define PTE_EXT_NG              (1 << 11)       /* v6 */
-
-/*
- *   - small page
- */
-#define PTE_SMALL_AP_MASK       (0xff << 4)
-#define PTE_SMALL_AP_UNO_SRO    (0x00 << 4)
-#define PTE_SMALL_AP_UNO_SRW    (0x55 << 4)
-#define PTE_SMALL_AP_URO_SRW    (0xaa << 4)
-#define PTE_SMALL_AP_URW_SRW    (0xff << 4)
+#include <asm/pgtable-2level-hwdef.h>
 
 #endif
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index 5750704e0271..8ade1840c6f2 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -24,6 +24,8 @@
 #include <mach/vmalloc.h>
 #include <asm/pgtable-hwdef.h>
 
+#include <asm/pgtable-2level.h>
+
 /*
  * Just any arbitrary offset to the start of the vmalloc VM area: the
  * current 8MB value just means that there will be a 8MB "hole" after the
@@ -41,79 +43,6 @@
 #define VMALLOC_START           (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
 #endif
 
-/*
- * Hardware-wise, we have a two level page table structure, where the first
- * level has 4096 entries, and the second level has 256 entries.  Each entry
- * is one 32-bit word.  Most of the bits in the second level entry are used
- * by hardware, and there aren't any "accessed" and "dirty" bits.
- *
- * Linux on the other hand has a three level page table structure, which can
- * be wrapped to fit a two level page table structure easily - using the PGD
- * and PTE only.  However, Linux also expects one "PTE" table per page, and
- * at least a "dirty" bit.
- *
- * Therefore, we tweak the implementation slightly - we tell Linux that we
- * have 2048 entries in the first level, each of which is 8 bytes (iow, two
- * hardware pointers to the second level.)  The second level contains two
- * hardware PTE tables arranged contiguously, preceded by Linux versions
- * which contain the state information Linux needs.  We, therefore, end up
- * with 512 entries in the "PTE" level.
- *
- * This leads to the page tables having the following layout:
- *
- *    pgd             pte
- * |        |
- * +--------+
- * |        |       +------------+ +0
- * +- - - - +       | Linux pt 0 |
- * |        |       +------------+ +1024
- * +--------+ +0    | Linux pt 1 |
- * |        |-----> +------------+ +2048
- * +- - - - + +4    |  h/w pt 0  |
- * |        |-----> +------------+ +3072
- * +--------+ +8    |  h/w pt 1  |
- * |        |       +------------+ +4096
- *
- * See L_PTE_xxx below for definitions of bits in the "Linux pt", and
- * PTE_xxx for definitions of bits appearing in the "h/w pt".
- *
- * PMD_xxx definitions refer to bits in the first level page table.
- *
- * The "dirty" bit is emulated by only granting hardware write permission
- * iff the page is marked "writable" and "dirty" in the Linux PTE.  This
- * means that a write to a clean page will cause a permission fault, and
- * the Linux MM layer will mark the page dirty via handle_pte_fault().
- * For the hardware to notice the permission change, the TLB entry must
- * be flushed, and ptep_set_access_flags() does that for us.
- *
- * The "accessed" or "young" bit is emulated by a similar method; we only
- * allow accesses to the page if the "young" bit is set.  Accesses to the
- * page will cause a fault, and handle_pte_fault() will set the young bit
- * for us as long as the page is marked present in the corresponding Linux
- * PTE entry.  Again, ptep_set_access_flags() will ensure that the TLB is
- * up to date.
- *
- * However, when the "young" bit is cleared, we deny access to the page
- * by clearing the hardware PTE.  Currently Linux does not flush the TLB
- * for us in this case, which means the TLB will retain the transation
- * until either the TLB entry is evicted under pressure, or a context
- * switch which changes the user space mapping occurs.
- */
-#define PTRS_PER_PTE            512
-#define PTRS_PER_PMD            1
-#define PTRS_PER_PGD            2048
-
-#define PTE_HWTABLE_PTRS        (PTRS_PER_PTE)
-#define PTE_HWTABLE_OFF         (PTE_HWTABLE_PTRS * sizeof(pte_t))
-#define PTE_HWTABLE_SIZE        (PTRS_PER_PTE * sizeof(u32))
-
-/*
- * PMD_SHIFT determines the size of the area a second-level page table can map
- * PGDIR_SHIFT determines what a third-level page table entry can map
- */
-#define PMD_SHIFT               21
-#define PGDIR_SHIFT             21
-
 #define LIBRARY_TEXT_START      0x0c000000
 
 #ifndef __ASSEMBLY__
@@ -124,12 +53,6 @@ extern void __pgd_error(const char *file, int line, pgd_t);
 #define pte_ERROR(pte)          __pte_error(__FILE__, __LINE__, pte)
 #define pmd_ERROR(pmd)          __pmd_error(__FILE__, __LINE__, pmd)
 #define pgd_ERROR(pgd)          __pgd_error(__FILE__, __LINE__, pgd)
-#endif /* !__ASSEMBLY__ */
-
-#define PMD_SIZE                (1UL << PMD_SHIFT)
-#define PMD_MASK                (~(PMD_SIZE-1))
-#define PGDIR_SIZE              (1UL << PGDIR_SHIFT)
-#define PGDIR_MASK              (~(PGDIR_SIZE-1))
 
 /*
  * This is the lowest virtual address we can permit any user space
@@ -138,60 +61,6 @@ extern void __pgd_error(const char *file, int line, pgd_t);
  */
 #define FIRST_USER_ADDRESS      PAGE_SIZE
 
-#define USER_PTRS_PER_PGD       (TASK_SIZE / PGDIR_SIZE)
-
-/*
- * section address mask and size definitions.
- */
-#define SECTION_SHIFT           20
-#define SECTION_SIZE            (1UL << SECTION_SHIFT)
-#define SECTION_MASK            (~(SECTION_SIZE-1))
-
-/*
- * ARMv6 supersection address mask and size definitions.
- */
-#define SUPERSECTION_SHIFT      24
-#define SUPERSECTION_SIZE       (1UL << SUPERSECTION_SHIFT)
-#define SUPERSECTION_MASK       (~(SUPERSECTION_SIZE-1))
-
-/*
- * "Linux" PTE definitions.
- *
- * We keep two sets of PTEs - the hardware and the linux version.
- * This allows greater flexibility in the way we map the Linux bits
- * onto the hardware tables, and allows us to have YOUNG and DIRTY
- * bits.
- *
- * The PTE table pointer refers to the hardware entries; the "Linux"
- * entries are stored 1024 bytes below.
- */
-#define L_PTE_PRESENT           (_AT(pteval_t, 1) << 0)
-#define L_PTE_YOUNG             (_AT(pteval_t, 1) << 1)
-#define L_PTE_FILE              (_AT(pteval_t, 1) << 2) /* only when !PRESENT */
-#define L_PTE_DIRTY             (_AT(pteval_t, 1) << 6)
-#define L_PTE_RDONLY            (_AT(pteval_t, 1) << 7)
-#define L_PTE_USER              (_AT(pteval_t, 1) << 8)
-#define L_PTE_XN                (_AT(pteval_t, 1) << 9)
-#define L_PTE_SHARED            (_AT(pteval_t, 1) << 10)        /* shared(v6), coherent(xsc3) */
-
-/*
- * These are the memory types, defined to be compatible with
- * pre-ARMv6 CPUs cacheable and bufferable bits:   XXCB
- */
-#define L_PTE_MT_UNCACHED       (_AT(pteval_t, 0x00) << 2)      /* 0000 */
-#define L_PTE_MT_BUFFERABLE     (_AT(pteval_t, 0x01) << 2)      /* 0001 */
-#define L_PTE_MT_WRITETHROUGH   (_AT(pteval_t, 0x02) << 2)      /* 0010 */
-#define L_PTE_MT_WRITEBACK      (_AT(pteval_t, 0x03) << 2)      /* 0011 */
-#define L_PTE_MT_MINICACHE      (_AT(pteval_t, 0x06) << 2)      /* 0110 (sa1100, xscale) */
-#define L_PTE_MT_WRITEALLOC     (_AT(pteval_t, 0x07) << 2)      /* 0111 */
-#define L_PTE_MT_DEV_SHARED     (_AT(pteval_t, 0x04) << 2)      /* 0100 */
-#define L_PTE_MT_DEV_NONSHARED  (_AT(pteval_t, 0x0c) << 2)      /* 1100 */
-#define L_PTE_MT_DEV_WC         (_AT(pteval_t, 0x09) << 2)      /* 1001 */
-#define L_PTE_MT_DEV_CACHED     (_AT(pteval_t, 0x0b) << 2)      /* 1011 */
-#define L_PTE_MT_MASK           (_AT(pteval_t, 0x0f) << 2)
-
-#ifndef __ASSEMBLY__
-
 /*
  * The pgprot_* and protection_map entries will be fixed up in runtime
  * to include the cachable and bufferable bits based on memory policy,
@@ -327,10 +196,10 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
 
 static inline pte_t *pmd_page_vaddr(pmd_t pmd)
 {
-        return __va(pmd_val(pmd) & PAGE_MASK);
+        return __va(pmd_val(pmd) & PHYS_MASK & (s32)PAGE_MASK);
 }
 
-#define pmd_page(pmd)           pfn_to_page(__phys_to_pfn(pmd_val(pmd)))
+#define pmd_page(pmd)           pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))
 
 /* we don't need complex calculations here as the pmd is folded into the pgd */
 #define pmd_addr_end(addr,end)  (end)
@@ -351,7 +220,7 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd)
 #define pte_offset_map(pmd,addr)        (__pte_map(pmd) + pte_index(addr))
 #define pte_unmap(pte)                  __pte_unmap(pte)
 
-#define pte_pfn(pte)            (pte_val(pte) >> PAGE_SHIFT)
+#define pte_pfn(pte)            ((pte_val(pte) & PHYS_MASK) >> PAGE_SHIFT)
 #define pfn_pte(pfn,prot)       __pte(__pfn_to_phys(pfn) | pgprot_val(prot))
 
 #define pte_page(pte)           pfn_to_page(pte_pfn(pte))
diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h
index 67c70a31a1be..b7e82c4aced6 100644
--- a/arch/arm/include/asm/pmu.h
+++ b/arch/arm/include/asm/pmu.h
@@ -41,7 +41,7 @@ struct arm_pmu_platdata {
  * encoded error on failure.
  */
 extern struct platform_device *
-reserve_pmu(enum arm_pmu_type device);
+reserve_pmu(enum arm_pmu_type type);
 
 /**
  * release_pmu() - Relinquish control of the performance counters
@@ -62,26 +62,26 @@ release_pmu(enum arm_pmu_type type);
  * the actual hardware initialisation.
  */
 extern int
-init_pmu(enum arm_pmu_type device);
+init_pmu(enum arm_pmu_type type);
 
 #else /* CONFIG_CPU_HAS_PMU */
 
 #include <linux/err.h>
 
 static inline struct platform_device *
-reserve_pmu(enum arm_pmu_type device)
+reserve_pmu(enum arm_pmu_type type)
 {
         return ERR_PTR(-ENODEV);
 }
 
 static inline int
-release_pmu(struct platform_device *pdev)
+release_pmu(enum arm_pmu_type type)
 {
         return -ENODEV;
 }
 
 static inline int
-init_pmu(enum arm_pmu_type device)
+init_pmu(enum arm_pmu_type type)
 {
         return -ENODEV;
 }
diff --git a/arch/arm/include/asm/poll.h b/arch/arm/include/asm/poll.h
deleted file mode 100644
index c98509d3149e..000000000000
--- a/arch/arm/include/asm/poll.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/poll.h>
diff --git a/arch/arm/include/asm/resource.h b/arch/arm/include/asm/resource.h
deleted file mode 100644
index 734b581b5b6a..000000000000
--- a/arch/arm/include/asm/resource.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ARM_RESOURCE_H
-#define _ARM_RESOURCE_H
-
-#include <asm-generic/resource.h>
-
-#endif
diff --git a/arch/arm/include/asm/sections.h b/arch/arm/include/asm/sections.h
deleted file mode 100644
index 2b8c5160388f..000000000000
--- a/arch/arm/include/asm/sections.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/sections.h>
diff --git a/arch/arm/include/asm/siginfo.h b/arch/arm/include/asm/siginfo.h
deleted file mode 100644
index 5e21852e6039..000000000000
--- a/arch/arm/include/asm/siginfo.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASMARM_SIGINFO_H
-#define _ASMARM_SIGINFO_H
-
-#include <asm-generic/siginfo.h>
-
-#endif
diff --git a/arch/arm/include/asm/sizes.h b/arch/arm/include/asm/sizes.h
deleted file mode 100644
index 154b89b81d3e..000000000000
--- a/arch/arm/include/asm/sizes.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-/*  Size definitions
- *  Copyright (C) ARM Limited 1998. All rights reserved.
- */
-#include <asm-generic/sizes.h>
-
-#define SZ_48M  (SZ_32M + SZ_16M)
diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h
index e42d96a45d3e..0a17b62538c2 100644
--- a/arch/arm/include/asm/smp.h
+++ b/arch/arm/include/asm/smp.h
@@ -33,6 +33,11 @@ extern void show_ipi_list(struct seq_file *, int);
 asmlinkage void do_IPI(int ipinr, struct pt_regs *regs);
 
 /*
+ * Called from C code, this handles an IPI.
+ */
+void handle_IPI(int ipinr, struct pt_regs *regs);
+
+/*
  * Setup the set of possible CPUs (via set_cpu_possible)
  */
 extern void smp_init_cpus(void);
@@ -66,6 +71,12 @@ extern void platform_secondary_init(unsigned int cpu);
 extern void platform_smp_prepare_cpus(unsigned int);
 
 /*
+ * Logical CPU mapping.
+ */
+extern int __cpu_logical_map[NR_CPUS];
+#define cpu_logical_map(cpu)    __cpu_logical_map[cpu]
+
+/*
  * Initial data for bringing up a secondary CPU.
  */
 struct secondary_data {
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 832888d0c20c..984014b92647 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -57,18 +57,12 @@
 
 #ifndef __ASSEMBLY__
 
+#include <linux/compiler.h>
 #include <linux/linkage.h>
 #include <linux/irqflags.h>
 
 #include <asm/outercache.h>
 
-#define __exception     __attribute__((section(".exception.text")))
-#ifdef CONFIG_FUNCTION_GRAPH_TRACER
-#define __exception_irq_entry   __irq_entry
-#else
-#define __exception_irq_entry   __exception
-#endif
-
 struct thread_info;
 struct task_struct;
 
@@ -97,14 +91,13 @@ void hook_ifault_code(int nr, int (*fn)(unsigned long, unsigned int,
 #define xchg(ptr,x) \
         ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
 
-extern asmlinkage void __backtrace(void);
 extern asmlinkage void c_backtrace(unsigned long fp, int pmode);
 
 struct mm_struct;
 extern void show_pte(struct mm_struct *mm, unsigned long addr);
 extern void __show_regs(struct pt_regs *);
 
-extern int cpu_architecture(void);
+extern int __pure cpu_architecture(void);
 extern void cpu_init(void);
 
 void arm_machine_restart(char mode, const char *cmd);
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index 8077145698ff..02b2f8203982 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -471,7 +471,7 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
  *      these operations.  This is typically used when we are removing
  *      PMD entries.
  */
-static inline void flush_pmd_entry(pmd_t *pmd)
+static inline void flush_pmd_entry(void *pmd)
 {
         const unsigned int __tlb_flag = __cpu_tlb_flags;
 
@@ -487,7 +487,7 @@ static inline void flush_pmd_entry(pmd_t *pmd)
                 dsb();
 }
 
-static inline void clean_pmd_entry(pmd_t *pmd)
+static inline void clean_pmd_entry(void *pmd)
 {
         const unsigned int __tlb_flag = __cpu_tlb_flags;
 
diff --git a/arch/arm/include/asm/topology.h b/arch/arm/include/asm/topology.h
index accbd7cad9b5..a7e457ed27c3 100644
--- a/arch/arm/include/asm/topology.h
+++ b/arch/arm/include/asm/topology.h
@@ -1,6 +1,39 @@
 #ifndef _ASM_ARM_TOPOLOGY_H
 #define _ASM_ARM_TOPOLOGY_H
 
+#ifdef CONFIG_ARM_CPU_TOPOLOGY
+
+#include <linux/cpumask.h>
+
+struct cputopo_arm {
+        int thread_id;
+        int core_id;
+        int socket_id;
+        cpumask_t thread_sibling;
+        cpumask_t core_sibling;
+};
+
+extern struct cputopo_arm cpu_topology[NR_CPUS];
+
+#define topology_physical_package_id(cpu)       (cpu_topology[cpu].socket_id)
+#define topology_core_id(cpu)           (cpu_topology[cpu].core_id)
+#define topology_core_cpumask(cpu)      (&cpu_topology[cpu].core_sibling)
+#define topology_thread_cpumask(cpu)    (&cpu_topology[cpu].thread_sibling)
+
+#define mc_capable()    (cpu_topology[0].socket_id != -1)
+#define smt_capable()   (cpu_topology[0].thread_id != -1)
+
+void init_cpu_topology(void);
+void store_cpu_topology(unsigned int cpuid);
+const struct cpumask *cpu_coregroup_mask(unsigned int cpu);
+
+#else
+
+static inline void init_cpu_topology(void) { }
+static inline void store_cpu_topology(unsigned int cpuid) { }
+
+#endif
+
 #include <asm-generic/topology.h>
 
 #endif /* _ASM_ARM_TOPOLOGY_H */
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index 2c04ed5efeb5..c60a2944f95b 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -478,8 +478,8 @@
 /*
  * Unimplemented (or alternatively implemented) syscalls
  */
-#define __IGNORE_fadvise64_64           1
-#define __IGNORE_migrate_pages          1
+#define __IGNORE_fadvise64_64
+#define __IGNORE_migrate_pages
 
 #endif /* __KERNEL__ */
 #endif /* __ASM_ARM_UNISTD_H */
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index f7887dc53c1f..68036eece340 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -29,7 +29,7 @@ obj-$(CONFIG_MODULES)		+= armksyms.o module.o
 obj-$(CONFIG_ARTHUR)            += arthur.o
 obj-$(CONFIG_ISA_DMA)           += dma-isa.o
 obj-$(CONFIG_PCI)               += bios32.o isa.o
-obj-$(CONFIG_PM_SLEEP)          += sleep.o
+obj-$(CONFIG_ARM_CPU_SUSPEND)   += sleep.o
 obj-$(CONFIG_HAVE_SCHED_CLOCK)  += sched_clock.o
 obj-$(CONFIG_SMP)               += smp.o smp_tlb.o
 obj-$(CONFIG_HAVE_ARM_SCU)      += smp_scu.o
@@ -66,6 +66,7 @@ obj-$(CONFIG_IWMMXT)		+= iwmmxt.o
 obj-$(CONFIG_CPU_HAS_PMU)       += pmu.o
 obj-$(CONFIG_HW_PERF_EVENTS)    += perf_event.o
 AFLAGS_iwmmxt.o                 := -Wa,-mcpu=iwmmxt
+obj-$(CONFIG_ARM_CPU_TOPOLOGY)  += topology.o
 
 ifneq ($(CONFIG_ARCH_EBSA110),y)
   obj-y         += io.o
diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c
index aeef960ff795..8e3c6f11b0a1 100644
--- a/arch/arm/kernel/armksyms.c
+++ b/arch/arm/kernel/armksyms.c
@@ -49,9 +49,6 @@ extern void __aeabi_ulcmp(void);
 
 extern void fpundefinstr(void);
 
-
-EXPORT_SYMBOL(__backtrace);
-
         /* platform dependent support */
 EXPORT_SYMBOL(__udelay);
 EXPORT_SYMBOL(__const_udelay);
diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c
index 16baba2e4369..1429d8989fb9 100644
--- a/arch/arm/kernel/asm-offsets.c
+++ b/arch/arm/kernel/asm-offsets.c
@@ -20,6 +20,7 @@
 #include <asm/thread_info.h>
 #include <asm/memory.h>
 #include <asm/procinfo.h>
+#include <asm/hardware/cache-l2x0.h>
 #include <linux/kbuild.h>
 
 /*
@@ -92,6 +93,17 @@ int main(void)
   DEFINE(S_OLD_R0,              offsetof(struct pt_regs, ARM_ORIG_r0));
   DEFINE(S_FRAME_SIZE,          sizeof(struct pt_regs));
   BLANK();
+#ifdef CONFIG_CACHE_L2X0
+  DEFINE(L2X0_R_PHY_BASE,       offsetof(struct l2x0_regs, phy_base));
+  DEFINE(L2X0_R_AUX_CTRL,       offsetof(struct l2x0_regs, aux_ctrl));
+  DEFINE(L2X0_R_TAG_LATENCY,    offsetof(struct l2x0_regs, tag_latency));
+  DEFINE(L2X0_R_DATA_LATENCY,   offsetof(struct l2x0_regs, data_latency));
+  DEFINE(L2X0_R_FILTER_START,   offsetof(struct l2x0_regs, filter_start));
+  DEFINE(L2X0_R_FILTER_END,     offsetof(struct l2x0_regs, filter_end));
+  DEFINE(L2X0_R_PREFETCH_CTRL,  offsetof(struct l2x0_regs, prefetch_ctrl));
+  DEFINE(L2X0_R_PWR_CTRL,       offsetof(struct l2x0_regs, pwr_ctrl));
+  BLANK();
+#endif
 #ifdef CONFIG_CPU_HAS_ASID
   DEFINE(MM_CONTEXT_ID,         offsetof(struct mm_struct, context.id));
   BLANK();
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index d6df359408f0..c0d9203fc75e 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -412,6 +412,9 @@ void pcibios_fixup_bus(struct pci_bus *bus)
         printk(KERN_INFO "PCI: bus%d: Fast back to back transfers %sabled\n",
                 bus->number, (features & PCI_COMMAND_FAST_BACK) ? "en" : "dis");
 }
+#ifdef CONFIG_HOTPLUG
+EXPORT_SYMBOL(pcibios_fixup_bus);
+#endif
 
 /*
  * Convert from Linux-centric to bus-centric addresses for bridge devices.
@@ -431,6 +434,7 @@ pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
         region->start = res->start - offset;
         region->end   = res->end - offset;
 }
+EXPORT_SYMBOL(pcibios_resource_to_bus);
 
 void __devinit
 pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
@@ -447,12 +451,7 @@ pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
         res->start = region->start + offset;
         res->end   = region->end + offset;
 }
-
-#ifdef CONFIG_HOTPLUG
-EXPORT_SYMBOL(pcibios_fixup_bus);
-EXPORT_SYMBOL(pcibios_resource_to_bus);
 EXPORT_SYMBOL(pcibios_bus_to_resource);
-#endif
 
 /*
  * Swizzle the device pin each time we cross a bridge.
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 80f7896cc016..9943e9e74a1b 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -178,7 +178,7 @@
                 CALL(sys_ni_syscall)            /* vm86 */
                 CALL(sys_ni_syscall)            /* was sys_query_module */
                 CALL(sys_poll)
-                CALL(sys_nfsservctl)
+                CALL(sys_ni_syscall)            /* was nfsservctl */
 /* 170 */       CALL(sys_setresgid16)
                 CALL(sys_getresgid16)
                 CALL(sys_prctl)
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S
index bcd66e00bdbe..0f852d082fcf 100644
--- a/arch/arm/kernel/debug.S
+++ b/arch/arm/kernel/debug.S
@@ -151,6 +151,8 @@ printhex:	adr	r2, hexbuf
                 b       printascii
 ENDPROC(printhex2)
 
+hexbuf:         .space 16
+
                 .ltorg
 
 ENTRY(printascii)
@@ -175,5 +177,3 @@ ENTRY(printch)
                 mov     r0, #0
                 b       1b
 ENDPROC(printch)
-
-hexbuf:         .space 16
diff --git a/arch/arm/kernel/dma.c b/arch/arm/kernel/dma.c
index 2c4a185f92cd..7b829d9663b1 100644
--- a/arch/arm/kernel/dma.c
+++ b/arch/arm/kernel/dma.c
@@ -23,7 +23,7 @@
 
 #include <asm/mach/dma.h>
 
-DEFINE_SPINLOCK(dma_spin_lock);
+DEFINE_RAW_SPINLOCK(dma_spin_lock);
 EXPORT_SYMBOL(dma_spin_lock);
 
 static dma_t *dma_chan[MAX_DMA_CHANNELS];
diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c
index d16500110ee9..4dd0edab6a65 100644
--- a/arch/arm/kernel/ecard.c
+++ b/arch/arm/kernel/ecard.c
@@ -237,7 +237,7 @@ static void ecard_init_pgtables(struct mm_struct *mm)
 
         memcpy(dst_pgd, src_pgd, sizeof(pgd_t) * (IO_SIZE / PGDIR_SIZE));
 
-        src_pgd = pgd_offset(mm, EASI_BASE);
+        src_pgd = pgd_offset(mm, (unsigned long)EASI_BASE);
         dst_pgd = pgd_offset(mm, EASI_START);
 
         memcpy(dst_pgd, src_pgd, sizeof(pgd_t) * (EASI_SIZE / PGDIR_SIZE));
@@ -674,44 +674,37 @@ static int __init ecard_probeirqhw(void)
 #define ecard_probeirqhw() (0)
 #endif
 
-#ifndef IO_EC_MEMC8_BASE
-#define IO_EC_MEMC8_BASE 0
-#endif
-
-static unsigned int __ecard_address(ecard_t *ec, card_type_t type, card_speed_t speed)
+static void __iomem *__ecard_address(ecard_t *ec, card_type_t type, card_speed_t speed)
 {
-        unsigned long address = 0;
+        void __iomem *address = NULL;
         int slot = ec->slot_no;
 
         if (ec->slot_no == 8)
-                return IO_EC_MEMC8_BASE;
+                return ECARD_MEMC8_BASE;
 
         ectcr &= ~(1 << slot);
 
         switch (type) {
         case ECARD_MEMC:
                 if (slot < 4)
-                        address = IO_EC_MEMC_BASE + (slot << 12);
+                        address = ECARD_MEMC_BASE + (slot << 14);
                 break;
 
         case ECARD_IOC:
                 if (slot < 4)
-                        address = IO_EC_IOC_BASE + (slot << 12);
-#ifdef IO_EC_IOC4_BASE
+                        address = ECARD_IOC_BASE + (slot << 14);
                 else
-                        address = IO_EC_IOC4_BASE + ((slot - 4) << 12);
-#endif
+                        address = ECARD_IOC4_BASE + ((slot - 4) << 14);
                 if (address)
-                        address +=  speed << 17;
+                        address += speed << 19;
                 break;
 
-#ifdef IO_EC_EASI_BASE
         case ECARD_EASI:
-                address = IO_EC_EASI_BASE + (slot << 22);
+                address = ECARD_EASI_BASE + (slot << 24);
                 if (speed == ECARD_FAST)
                         ectcr |= 1 << slot;
                 break;
-#endif
+
         default:
                 break;
         }
@@ -990,6 +983,7 @@ ecard_probe(int slot, card_type_t type)
         ecard_t **ecp;
         ecard_t *ec;
         struct ex_ecid cid;
+        void __iomem *addr;
         int i, rc;
 
         ec = ecard_alloc_card(type, slot);
@@ -999,7 +993,7 @@ ecard_probe(int slot, card_type_t type)
         }
 
         rc = -ENODEV;
-        if ((ec->podaddr = __ecard_address(ec, type, ECARD_SYNC)) == 0)
+        if ((addr = __ecard_address(ec, type, ECARD_SYNC)) == NULL)
                 goto nodev;
 
         cid.r_zero = 1;
@@ -1019,7 +1013,7 @@ ecard_probe(int slot, card_type_t type)
         ec->cid.fiqmask = cid.r_fiqmask;
         ec->cid.fiqoff  = ecard_gets24(cid.r_fiqoff);
         ec->fiqaddr     =
-        ec->irqaddr     = (void __iomem *)ioaddr(ec->podaddr);
+        ec->irqaddr     = addr;
 
         if (ec->cid.is) {
                 ec->irqmask = ec->cid.irqmask;
@@ -1048,10 +1042,8 @@ ecard_probe(int slot, card_type_t type)
                 set_irq_flags(ec->irq, IRQF_VALID);
         }
 
-#ifdef IO_EC_MEMC8_BASE
         if (slot == 8)
                 ec->irq = 11;
-#endif
 #ifdef CONFIG_ARCH_RPC
         /* On RiscPC, only first two slots have DMA capability */
         if (slot < 2)
@@ -1097,9 +1089,7 @@ static int __init ecard_init(void)
                         ecard_probe(slot, ECARD_IOC);
         }
 
-#ifdef IO_EC_MEMC8_BASE
         ecard_probe(8, ECARD_IOC);
-#endif
 
         irqhw = ecard_probeirqhw();
 
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index a87cbf889ff4..9ad50c4208ae 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -24,6 +24,7 @@
 #include <asm/unwind.h>
 #include <asm/unistd.h>
 #include <asm/tls.h>
+#include <asm/system.h>
 
 #include "entry-header.S"
 #include <asm/entry-macro-multi.S>
@@ -262,8 +263,7 @@ __und_svc:
         ldr     r0, [r4, #-4]
 #else
         ldrh    r0, [r4, #-2]                   @ Thumb instruction at LR - 2
-        and     r9, r0, #0xf800
-        cmp     r9, #0xe800                     @ 32-bit instruction if xx >= 0
+        cmp     r0, #0xe800                     @ 32-bit instruction if xx >= 0
         ldrhhs  r9, [r4]                        @ bottom 16 bits
         orrhs   r0, r9, r0, lsl #16
 #endif
@@ -440,18 +440,46 @@ __und_usr:
 #endif
         beq     call_fpe
         @ Thumb instruction
-#if __LINUX_ARM_ARCH__ >= 7
+#if CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7
+/*
+ * Thumb-2 instruction handling.  Note that because pre-v6 and >= v6 platforms
+ * can never be supported in a single kernel, this code is not applicable at
+ * all when __LINUX_ARM_ARCH__ < 6.  This allows simplifying assumptions to be
+ * made about .arch directives.
+ */
+#if __LINUX_ARM_ARCH__ < 7
+/* If the target CPU may not be Thumb-2-capable, a run-time check is needed: */
+#define NEED_CPU_ARCHITECTURE
+        ldr     r5, .LCcpu_architecture
+        ldr     r5, [r5]
+        cmp     r5, #CPU_ARCH_ARMv7
+        blo     __und_usr_unknown
+/*
+ * The following code won't get run unless the running CPU really is v7, so
+ * coding round the lack of ldrht on older arches is pointless.  Temporarily
+ * override the assembler target arch with the minimum required instead:
+ */
+        .arch   armv6t2
+#endif
 2:
  ARM(   ldrht   r5, [r4], #2    )
  THUMB( ldrht   r5, [r4]        )
  THUMB( add     r4, r4, #2      )
-        and     r0, r5, #0xf800                 @ mask bits 111x x... .... ....
-        cmp     r0, #0xe800                     @ 32bit instruction if xx != 0
+        cmp     r5, #0xe800                     @ 32bit instruction if xx != 0
         blo     __und_usr_unknown
 3:      ldrht   r0, [r4]
         add     r2, r2, #2                      @ r2 is PC + 2, make it PC + 4
         orr     r0, r0, r5, lsl #16
+
+#if __LINUX_ARM_ARCH__ < 7
+/* If the target arch was overridden, change it back: */
+#ifdef CONFIG_CPU_32v6K
+        .arch   armv6k
 #else
+        .arch   armv6
+#endif
+#endif /* __LINUX_ARM_ARCH__ < 7 */
+#else /* !(CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7) */
         b       __und_usr_unknown
 #endif
  UNWIND(.fnend          )
@@ -578,6 +606,12 @@ call_fpe:
         movw_pc lr                              @ CP#14 (Debug)
         movw_pc lr                              @ CP#15 (Control)
 
+#ifdef NEED_CPU_ARCHITECTURE
+        .align  2
+.LCcpu_architecture:
+        .word   __cpu_architecture
+#endif
+
 #ifdef CONFIG_NEON
         .align  6
 
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 742b6108a001..239703dbdf4f 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -21,6 +21,7 @@
 #include <asm/memory.h>
 #include <asm/thread_info.h>
 #include <asm/system.h>
+#include <asm/pgtable.h>
 
 #ifdef CONFIG_DEBUG_LL
 #include <mach/debug-macro.S>
@@ -38,11 +39,14 @@
 #error KERNEL_RAM_VADDR must start at 0xXXXX8000
 #endif
 
+#define PG_DIR_SIZE     0x4000
+#define PMD_ORDER       2
+
         .globl  swapper_pg_dir
-        .equ    swapper_pg_dir, KERNEL_RAM_VADDR - 0x4000
+        .equ    swapper_pg_dir, KERNEL_RAM_VADDR - PG_DIR_SIZE
 
         .macro  pgtbl, rd, phys
-        add     \rd, \phys, #TEXT_OFFSET - 0x4000
+        add     \rd, \phys, #TEXT_OFFSET - PG_DIR_SIZE
         .endm
 
 #ifdef CONFIG_XIP_KERNEL
@@ -148,11 +152,11 @@ __create_page_tables:
         pgtbl   r4, r8                          @ page table address
 
         /*
-         * Clear the 16K level 1 swapper page table
+         * Clear the swapper page table
          */
         mov     r0, r4
         mov     r3, #0
-        add     r6, r0, #0x4000
+        add     r6, r0, #PG_DIR_SIZE
 1:      str     r3, [r0], #4
         str     r3, [r0], #4
         str     r3, [r0], #4
@@ -171,30 +175,30 @@ __create_page_tables:
         sub     r0, r0, r3                      @ virt->phys offset
         add     r5, r5, r0                      @ phys __enable_mmu
         add     r6, r6, r0                      @ phys __enable_mmu_end
-        mov     r5, r5, lsr #20
-        mov     r6, r6, lsr #20
+        mov     r5, r5, lsr #SECTION_SHIFT
+        mov     r6, r6, lsr #SECTION_SHIFT
 
-1:      orr     r3, r7, r5, lsl #20             @ flags + kernel base
-        str     r3, [r4, r5, lsl #2]            @ identity mapping
-        teq     r5, r6
-        addne   r5, r5, #1                      @ next section
-        bne     1b
+1:      orr     r3, r7, r5, lsl #SECTION_SHIFT  @ flags + kernel base
+        str     r3, [r4, r5, lsl #PMD_ORDER]    @ identity mapping
+        cmp     r5, r6
+        addlo   r5, r5, #1                      @ next section
+        blo     1b
 
         /*
          * Now setup the pagetables for our kernel direct
          * mapped region.
          */
         mov     r3, pc
-        mov     r3, r3, lsr #20
-        orr     r3, r7, r3, lsl #20
-        add     r0, r4,  #(KERNEL_START & 0xff000000) >> 18
-        str     r3, [r0, #(KERNEL_START & 0x00f00000) >> 18]!
+        mov     r3, r3, lsr #SECTION_SHIFT
+        orr     r3, r7, r3, lsl #SECTION_SHIFT
+        add     r0, r4,  #(KERNEL_START & 0xff000000) >> (SECTION_SHIFT - PMD_ORDER)
+        str     r3, [r0, #((KERNEL_START & 0x00f00000) >> SECTION_SHIFT) << PMD_ORDER]!
         ldr     r6, =(KERNEL_END - 1)
-        add     r0, r0, #4
-        add     r6, r4, r6, lsr #18
+        add     r0, r0, #1 << PMD_ORDER
+        add     r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER)
 1:      cmp     r0, r6
-        add     r3, r3, #1 << 20
-        strls   r3, [r0], #4
+        add     r3, r3, #1 << SECTION_SHIFT
+        strls   r3, [r0], #1 << PMD_ORDER
         bls     1b
 
 #ifdef CONFIG_XIP_KERNEL
@@ -203,11 +207,11 @@ __create_page_tables:
          */
         add     r3, r8, #TEXT_OFFSET
         orr     r3, r3, r7
-        add     r0, r4,  #(KERNEL_RAM_VADDR & 0xff000000) >> 18
-        str     r3, [r0, #(KERNEL_RAM_VADDR & 0x00f00000) >> 18]!
+        add     r0, r4,  #(KERNEL_RAM_VADDR & 0xff000000) >> (SECTION_SHIFT - PMD_ORDER)
+        str     r3, [r0, #(KERNEL_RAM_VADDR & 0x00f00000) >> (SECTION_SHIFT - PMD_ORDER)]!
         ldr     r6, =(_end - 1)
         add     r0, r0, #4
-        add     r6, r4, r6, lsr #18
+        add     r6, r4, r6, lsr #(SECTION_SHIFT - PMD_ORDER)
 1:      cmp     r0, r6
         add     r3, r3, #1 << 20
         strls   r3, [r0], #4
@@ -218,12 +222,12 @@ __create_page_tables:
          * Then map boot params address in r2 or
          * the first 1MB of ram if boot params address is not specified.
          */
-        mov     r0, r2, lsr #20
-        movs    r0, r0, lsl #20
+        mov     r0, r2, lsr #SECTION_SHIFT
+        movs    r0, r0, lsl #SECTION_SHIFT
         moveq   r0, r8
         sub     r3, r0, r8
         add     r3, r3, #PAGE_OFFSET
-        add     r3, r4, r3, lsr #18
+        add     r3, r4, r3, lsr #(SECTION_SHIFT - PMD_ORDER)
         orr     r6, r7, r0
         str     r6, [r3]
 
@@ -236,21 +240,21 @@ __create_page_tables:
          */
         addruart r7, r3
 
-        mov     r3, r3, lsr #20
-        mov     r3, r3, lsl #2
+        mov     r3, r3, lsr #SECTION_SHIFT
+        mov     r3, r3, lsl #PMD_ORDER
 
         add     r0, r4, r3
         rsb     r3, r3, #0x4000                 @ PTRS_PER_PGD*sizeof(long)
         cmp     r3, #0x0800                     @ limit to 512MB
         movhi   r3, #0x0800
         add     r6, r0, r3
-        mov     r3, r7, lsr #20
+        mov     r3, r7, lsr #SECTION_SHIFT
         ldr     r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags
-        orr     r3, r7, r3, lsl #20
+        orr     r3, r7, r3, lsl #SECTION_SHIFT
 1:      str     r3, [r0], #4
-        add     r3, r3, #1 << 20
-        teq     r0, r6
-        bne     1b
+        add     r3, r3, #1 << SECTION_SHIFT
+        cmp     r0, r6
+        blo     1b
 
 #else /* CONFIG_DEBUG_ICEDCC */
         /* we don't need any serial debugging mappings for ICEDCC */
@@ -262,7 +266,7 @@ __create_page_tables:
          * If we're using the NetWinder or CATS, we also need to map
          * in the 16550-type serial port for the debug messages
          */
-        add     r0, r4, #0xff000000 >> 18
+        add     r0, r4, #0xff000000 >> (SECTION_SHIFT - PMD_ORDER)
         orr     r3, r7, #0x7c000000
         str     r3, [r0]
 #endif
@@ -272,10 +276,10 @@ __create_page_tables:
          * Similar reasons here - for debug.  This is
          * only for Acorn RiscPC architectures.
          */
-        add     r0, r4, #0x02000000 >> 18
+        add     r0, r4, #0x02000000 >> (SECTION_SHIFT - PMD_ORDER)
         orr     r3, r7, #0x02000000
         str     r3, [r0]
-        add     r0, r4, #0xd8000000 >> 18
+        add     r0, r4, #0xd8000000 >> (SECTION_SHIFT - PMD_ORDER)
         str     r3, [r0]
 #endif
 #endif
@@ -488,13 +492,8 @@ __fixup_pv_table:
         add     r5, r5, r3      @ adjust table end address
         add     r7, r7, r3      @ adjust __pv_phys_offset address
         str     r8, [r7]        @ save computed PHYS_OFFSET to __pv_phys_offset
-#ifndef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
         mov     r6, r3, lsr #24 @ constant for add/sub instructions
         teq     r3, r6, lsl #24 @ must be 16MiB aligned
-#else
-        mov     r6, r3, lsr #16 @ constant for add/sub instructions
-        teq     r3, r6, lsl #16 @ must be 64kiB aligned
-#endif
 THUMB(  it      ne              @ cross section branch )
         bne     __error
         str     r6, [r7, #4]    @ save to __pv_offset
@@ -510,20 +509,8 @@ ENDPROC(__fixup_pv_table)
         .text
 __fixup_a_pv_table:
 #ifdef CONFIG_THUMB2_KERNEL
-#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
-        lsls    r0, r6, #24
-        lsr     r6, #8
-        beq     1f
-        clz     r7, r0
-        lsr     r0, #24
-        lsl     r0, r7
-        bic     r0, 0x0080
-        lsrs    r7, #1
-        orrcs   r0, #0x0080
-        orr     r0, r0, r7, lsl #12
-#endif
-1:      lsls    r6, #24
-        beq     4f
+        lsls    r6, #24
+        beq     2f
         clz     r7, r6
         lsr     r6, #24
         lsl     r6, r7
@@ -532,43 +519,25 @@ __fixup_a_pv_table:
         orrcs   r6, #0x0080
         orr     r6, r6, r7, lsl #12
         orr     r6, #0x4000
-        b       4f
-2:      @ at this point the C flag is always clear
-        add     r7, r3
-#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
-        ldrh    ip, [r7]
-        tst     ip, 0x0400      @ the i bit tells us LS or MS byte
-        beq     3f
-        cmp     r0, #0          @ set C flag, and ...
-        biceq   ip, 0x0400      @ immediate zero value has a special encoding
-        streqh  ip, [r7]        @ that requires the i bit cleared
-#endif
-3:      ldrh    ip, [r7, #2]
+        b       2f
+1:      add     r7, r3
+        ldrh    ip, [r7, #2]
         and     ip, 0x8f00
-        orrcc   ip, r6  @ mask in offset bits 31-24
-        orrcs   ip, r0  @ mask in offset bits 23-16
+        orr     ip, r6  @ mask in offset bits 31-24
         strh    ip, [r7, #2]
-4:      cmp     r4, r5
+2:      cmp     r4, r5
         ldrcc   r7, [r4], #4    @ use branch for delay slot
-        bcc     2b
+        bcc     1b
         bx      lr
 #else
-#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
-        and     r0, r6, #255    @ offset bits 23-16
-        mov     r6, r6, lsr #8  @ offset bits 31-24
-#else
-        mov     r0, #0          @ just in case...
-#endif
-        b       3f
-2:      ldr     ip, [r7, r3]
+        b       2f
+1:      ldr     ip, [r7, r3]
         bic     ip, ip, #0x000000ff
-        tst     ip, #0x400      @ rotate shift tells us LS or MS byte
-        orrne   ip, ip, r6      @ mask in offset bits 31-24
-        orreq   ip, ip, r0      @ mask in offset bits 23-16
+        orr     ip, ip, r6      @ mask in offset bits 31-24
         str     ip, [r7, r3]
-3:      cmp     r4, r5
+2:      cmp     r4, r5
         ldrcc   r7, [r4], #4    @ use branch for delay slot
-        bcc     2b
+        bcc     1b
         mov     pc, lr
 #endif
 ENDPROC(__fixup_a_pv_table)
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index de3dcab8610b..53919b230e8b 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -35,8 +35,8 @@
 #include <linux/list.h>
 #include <linux/kallsyms.h>
 #include <linux/proc_fs.h>
-#include <linux/ftrace.h>
 
+#include <asm/exception.h>
 #include <asm/system.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/irq.h>
diff --git a/arch/arm/kernel/iwmmxt.S b/arch/arm/kernel/iwmmxt.S
index 7fa3bb0d2397..a08783823b32 100644
--- a/arch/arm/kernel/iwmmxt.S
+++ b/arch/arm/kernel/iwmmxt.S
@@ -195,10 +195,10 @@ ENTRY(iwmmxt_task_disable)
 
         @ enable access to CP0 and CP1
         XSC(mrc p15, 0, r4, c15, c1, 0)
-        XSC(orr r4, r4, #0xf)
+        XSC(orr r4, r4, #0x3)
         XSC(mcr p15, 0, r4, c15, c1, 0)
         PJ4(mrc p15, 0, r4, c1, c0, 2)
-        PJ4(orr r4, r4, #0x3)
+        PJ4(orr r4, r4, #0xf)
         PJ4(mcr p15, 0, r4, c1, c0, 2)
 
         mov     r0, #0                          @ nothing to load
@@ -313,7 +313,7 @@ ENTRY(iwmmxt_task_switch)
         teq     r2, r3                          @ next task owns it?
         movne   pc, lr                          @ no: leave Concan disabled
 
-1:      @ flip Conan access
+1:      @ flip Concan access
         XSC(eor r1, r1, #0x3)
         XSC(mcr p15, 0, r1, c15, c1, 0)
         PJ4(eor r1, r1, #0xf)
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index e59bbd496c39..c1b4463dcc83 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -32,6 +32,24 @@ static atomic_t waiting_for_crash_ipi;
 
 int machine_kexec_prepare(struct kimage *image)
 {
+        unsigned long page_list;
+        void *reboot_code_buffer;
+        page_list = image->head & PAGE_MASK;
+
+        reboot_code_buffer = page_address(image->control_code_page);
+
+        /* Prepare parameters for reboot_code_buffer*/
+        kexec_start_address = image->start;
+        kexec_indirection_page = page_list;
+        kexec_mach_type = machine_arch_type;
+        kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET;
+
+        /* copy our kernel relocation code to the control code page */
+        memcpy(reboot_code_buffer,
+               relocate_new_kernel, relocate_new_kernel_size);
+
+        flush_icache_range((unsigned long) reboot_code_buffer,
+                           (unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE);
         return 0;
 }
 
@@ -82,31 +100,14 @@ void (*kexec_reinit)(void);
 
 void machine_kexec(struct kimage *image)
 {
-        unsigned long page_list;
         unsigned long reboot_code_buffer_phys;
         void *reboot_code_buffer;
 
-
-        page_list = image->head & PAGE_MASK;
-
         /* we need both effective and real address here */
         reboot_code_buffer_phys =
             page_to_pfn(image->control_code_page) << PAGE_SHIFT;
         reboot_code_buffer = page_address(image->control_code_page);
 
-        /* Prepare parameters for reboot_code_buffer*/
-        kexec_start_address = image->start;
-        kexec_indirection_page = page_list;
-        kexec_mach_type = machine_arch_type;
-        kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET;
-
-        /* copy our kernel relocation code to the control code page */
-        memcpy(reboot_code_buffer,
-               relocate_new_kernel, relocate_new_kernel_size);
-
-
-        flush_icache_range((unsigned long) reboot_code_buffer,
-                           (unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE);
         printk(KERN_INFO "Bye!\n");
 
         if (kexec_reinit)
diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c
index 05b377616fd5..1e9be5d25e56 100644
--- a/arch/arm/kernel/module.c
+++ b/arch/arm/kernel/module.c
@@ -33,7 +33,7 @@
  * recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off.
  */
 #undef MODULES_VADDR
-#define MODULES_VADDR   (((unsigned long)_etext + ~PGDIR_MASK) & PGDIR_MASK)
+#define MODULES_VADDR   (((unsigned long)_etext + ~PMD_MASK) & PMD_MASK)
 #endif
 
 #ifdef CONFIG_MMU
@@ -323,7 +323,11 @@ int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs,
 #endif
         s = find_mod_section(hdr, sechdrs, ".alt.smp.init");
         if (s && !is_smp())
+#ifdef CONFIG_SMP_ON_UP
                 fixup_smp((void *)s->sh_addr, s->sh_size);
+#else
+                return -EINVAL;
+#endif
         return 0;
 }
 
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 4c851834f68e..6be3e2e4d838 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -321,8 +321,8 @@ static const unsigned armv7_a9_perf_map[PERF_COUNT_HW_MAX] = {
         [PERF_COUNT_HW_CPU_CYCLES]          = ARMV7_PERFCTR_CPU_CYCLES,
         [PERF_COUNT_HW_INSTRUCTIONS]        =
                                         ARMV7_PERFCTR_INST_OUT_OF_RENAME_STAGE,
-        [PERF_COUNT_HW_CACHE_REFERENCES]    = ARMV7_PERFCTR_COHERENT_LINE_HIT,
-        [PERF_COUNT_HW_CACHE_MISSES]        = ARMV7_PERFCTR_COHERENT_LINE_MISS,
+        [PERF_COUNT_HW_CACHE_REFERENCES]    = ARMV7_PERFCTR_DCACHE_ACCESS,
+        [PERF_COUNT_HW_CACHE_MISSES]        = ARMV7_PERFCTR_DCACHE_REFILL,
         [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE,
         [PERF_COUNT_HW_BRANCH_MISSES]       = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED,
         [PERF_COUNT_HW_BUS_CYCLES]          = ARMV7_PERFCTR_CLOCK_CYCLES,
diff --git a/arch/arm/kernel/pmu.c b/arch/arm/kernel/pmu.c
index 2b70709376c3..c53474fe84df 100644
--- a/arch/arm/kernel/pmu.c
+++ b/arch/arm/kernel/pmu.c
@@ -31,7 +31,7 @@ static int __devinit pmu_register(struct platform_device *pdev,
 {
         if (type < 0 || type >= ARM_NUM_PMU_DEVICES) {
                 pr_warning("received registration request for unknown "
-                                "device %d\n", type);
+                                "PMU device type %d\n", type);
                 return -EINVAL;
         }
 
@@ -112,17 +112,17 @@ static int __init register_pmu_driver(void)
 device_initcall(register_pmu_driver);
 
 struct platform_device *
-reserve_pmu(enum arm_pmu_type device)
+reserve_pmu(enum arm_pmu_type type)
 {
         struct platform_device *pdev;
 
-        if (test_and_set_bit_lock(device, &pmu_lock)) {
+        if (test_and_set_bit_lock(type, &pmu_lock)) {
                 pdev = ERR_PTR(-EBUSY);
-        } else if (pmu_devices[device] == NULL) {
-                clear_bit_unlock(device, &pmu_lock);
+        } else if (pmu_devices[type] == NULL) {
+                clear_bit_unlock(type, &pmu_lock);
                 pdev = ERR_PTR(-ENODEV);
         } else {
-                pdev = pmu_devices[device];
+                pdev = pmu_devices[type];
         }
 
         return pdev;
@@ -130,11 +130,11 @@ reserve_pmu(enum arm_pmu_type device)
 EXPORT_SYMBOL_GPL(reserve_pmu);
 
 int
-release_pmu(enum arm_pmu_type device)
+release_pmu(enum arm_pmu_type type)
 {
-        if (WARN_ON(!pmu_devices[device]))
+        if (WARN_ON(!pmu_devices[type]))
                 return -EINVAL;
-        clear_bit_unlock(device, &pmu_lock);
+        clear_bit_unlock(type, &pmu_lock);
         return 0;
 }
 EXPORT_SYMBOL_GPL(release_pmu);
@@ -182,17 +182,17 @@ init_cpu_pmu(void)
 }
 
 int
-init_pmu(enum arm_pmu_type device)
+init_pmu(enum arm_pmu_type type)
 {
         int err = 0;
 
-        switch (device) {
+        switch (type) {
         case ARM_PMU_DEVICE_CPU:
                 err = init_cpu_pmu();
                 break;
         default:
-                pr_warning("attempt to initialise unknown device %d\n",
-                                device);
+                pr_warning("attempt to initialise PMU of unknown "
+                           "type %d\n", type);
                 err = -EINVAL;
         }
 
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 1a347f481e5e..fd0814076ff6 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -319,7 +319,7 @@ void show_regs(struct pt_regs * regs)
         printk("\n");
         printk("Pid: %d, comm: %20s\n", task_pid_nr(current), current->comm);
         __show_regs(regs);
-        __backtrace();
+        dump_stack();
 }
 
 ATOMIC_NOTIFIER_HEAD(thread_notify_head);
diff --git a/arch/arm/kernel/relocate_kernel.S b/arch/arm/kernel/relocate_kernel.S
index 9cf4cbf8f95b..d0cdedf4864d 100644
--- a/arch/arm/kernel/relocate_kernel.S
+++ b/arch/arm/kernel/relocate_kernel.S
@@ -57,7 +57,8 @@ relocate_new_kernel:
         mov r0,#0
         ldr r1,kexec_mach_type
         ldr r2,kexec_boot_atags
-        mov pc,lr
+ ARM(   mov pc, lr      )
+ THUMB( bx lr           )
 
         .align
 
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 70bca649e925..3fe93f75b55a 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -29,6 +29,8 @@
 #include <linux/fs.h>
 #include <linux/proc_fs.h>
 #include <linux/memblock.h>
+#include <linux/bug.h>
+#include <linux/compiler.h>
 
 #include <asm/unified.h>
 #include <asm/cpu.h>
@@ -42,6 +44,7 @@
 #include <asm/cacheflush.h>
 #include <asm/cachetype.h>
 #include <asm/tlbflush.h>
+#include <asm/system.h>
 
 #include <asm/prom.h>
 #include <asm/mach/arch.h>
@@ -115,6 +118,13 @@ struct outer_cache_fns outer_cache __read_mostly;
 EXPORT_SYMBOL(outer_cache);
 #endif
 
+/*
+ * Cached cpu_architecture() result for use by assembler code.
+ * C code should use the cpu_architecture() function instead of accessing this
+ * variable directly.
+ */
+int __cpu_architecture __read_mostly = CPU_ARCH_UNKNOWN;
+
 struct stack {
         u32 irq[3];
         u32 abt[3];
@@ -210,7 +220,7 @@ static const char *proc_arch[] = {
         "?(17)",
 };
 
-int cpu_architecture(void)
+static int __get_cpu_architecture(void)
 {
         int cpu_arch;
 
@@ -243,11 +253,22 @@ int cpu_architecture(void)
         return cpu_arch;
 }
 
+int __pure cpu_architecture(void)
+{
+        BUG_ON(__cpu_architecture == CPU_ARCH_UNKNOWN);
+
+        return __cpu_architecture;
+}
+
 static int cpu_has_aliasing_icache(unsigned int arch)
 {
         int aliasing_icache;
         unsigned int id_reg, num_sets, line_size;
 
+        /* PIPT caches never alias. */
+        if (icache_is_pipt())
+                return 0;
+
         /* arch specifies the register format */
         switch (arch) {
         case CPU_ARCH_ARMv7:
@@ -280,18 +301,25 @@ static void __init cacheid_init(void)
         if (arch >= CPU_ARCH_ARMv6) {
                 if ((cachetype & (7 << 29)) == 4 << 29) {
                         /* ARMv7 register format */
+                        arch = CPU_ARCH_ARMv7;
                         cacheid = CACHEID_VIPT_NONALIASING;
-                        if ((cachetype & (3 << 14)) == 1 << 14)
+                        switch (cachetype & (3 << 14)) {
+                        case (1 << 14):
                                 cacheid |= CACHEID_ASID_TAGGED;
-                        else if (cpu_has_aliasing_icache(CPU_ARCH_ARMv7))
-                                cacheid |= CACHEID_VIPT_I_ALIASING;
-                } else if (cachetype & (1 << 23)) {
-                        cacheid = CACHEID_VIPT_ALIASING;
+                                break;
+                        case (3 << 14):
+                                cacheid |= CACHEID_PIPT;
+                                break;
+                        }
                 } else {
-                        cacheid = CACHEID_VIPT_NONALIASING;
-                        if (cpu_has_aliasing_icache(CPU_ARCH_ARMv6))
-                                cacheid |= CACHEID_VIPT_I_ALIASING;
+                        arch = CPU_ARCH_ARMv6;
+                        if (cachetype & (1 << 23))
+                                cacheid = CACHEID_VIPT_ALIASING;
+                        else
+                                cacheid = CACHEID_VIPT_NONALIASING;
                 }
+                if (cpu_has_aliasing_icache(arch))
+                        cacheid |= CACHEID_VIPT_I_ALIASING;
         } else {
                 cacheid = CACHEID_VIVT;
         }
@@ -299,10 +327,11 @@ static void __init cacheid_init(void)
         printk("CPU: %s data cache, %s instruction cache\n",
                 cache_is_vivt() ? "VIVT" :
                 cache_is_vipt_aliasing() ? "VIPT aliasing" :
-                cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown",
+                cache_is_vipt_nonaliasing() ? "PIPT / VIPT nonaliasing" : "unknown",
                 cache_is_vivt() ? "VIVT" :
                 icache_is_vivt_asid_tagged() ? "VIVT ASID tagged" :
                 icache_is_vipt_aliasing() ? "VIPT aliasing" :
+                icache_is_pipt() ? "PIPT" :
                 cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown");
 }
 
@@ -413,6 +442,7 @@ static void __init setup_processor(void)
         }
 
         cpu_name = list->cpu_name;
+        __cpu_architecture = __get_cpu_architecture();
 
 #ifdef MULTI_CPU
         processor = *list->proc;
@@ -860,7 +890,7 @@ static struct machine_desc * __init setup_machine_tags(unsigned int nr)
         }
 
         if (mdesc->fixup)
-                mdesc->fixup(mdesc, tags, &from, &meminfo);
+                mdesc->fixup(tags, &from, &meminfo);
 
         if (tags->hdr.tag == ATAG_CORE) {
                 if (meminfo.nr_banks != 0)
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index d88ff0230e82..94f34a6c8610 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -16,7 +16,6 @@
 #include <linux/cache.h>
 #include <linux/profile.h>
 #include <linux/errno.h>
-#include <linux/ftrace.h>
 #include <linux/mm.h>
 #include <linux/err.h>
 #include <linux/cpu.h>
@@ -31,6 +30,8 @@
 #include <asm/cacheflush.h>
 #include <asm/cpu.h>
 #include <asm/cputype.h>
+#include <asm/exception.h>
+#include <asm/topology.h>
 #include <asm/mmu_context.h>
 #include <asm/pgtable.h>
 #include <asm/pgalloc.h>
@@ -39,6 +40,7 @@
 #include <asm/tlbflush.h>
 #include <asm/ptrace.h>
 #include <asm/localtimer.h>
+#include <asm/smp_plat.h>
 
 /*
  * as from 2.5, kernels no longer have an init_tasks structure
@@ -259,6 +261,20 @@ void __ref cpu_die(void)
 }
 #endif /* CONFIG_HOTPLUG_CPU */
 
+int __cpu_logical_map[NR_CPUS];
+
+void __init smp_setup_processor_id(void)
+{
+        int i;
+        u32 cpu = is_smp() ? read_cpuid_mpidr() & 0xff : 0;
+
+        cpu_logical_map(0) = cpu;
+        for (i = 1; i < NR_CPUS; ++i)
+                cpu_logical_map(i) = i == cpu ? 0 : i;
+
+        printk(KERN_INFO "Booting Linux on physical CPU %d\n", cpu);
+}
+
 /*
  * Called by both boot and secondaries to move global data into
  * per-processor storage.
@@ -268,6 +284,8 @@ static void __cpuinit smp_store_cpu_info(unsigned int cpuid)
         struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
 
         cpu_info->loops_per_jiffy = loops_per_jiffy;
+
+        store_cpu_topology(cpuid);
 }
 
 /*
@@ -301,17 +319,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
          */
         platform_secondary_init(cpu);
 
-        /*
-         * Enable local interrupts.
-         */
         notify_cpu_starting(cpu);
-        local_irq_enable();
-        local_fiq_enable();
-
-        /*
-         * Setup the percpu timer for this CPU.
-         */
-        percpu_timer_setup();
 
         calibrate_delay();
 
@@ -323,10 +331,23 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
          * before we continue.
          */
         set_cpu_online(cpu, true);
+
+        /*
+         * Setup the percpu timer for this CPU.
+         */
+        percpu_timer_setup();
+
         while (!cpu_active(cpu))
                 cpu_relax();
 
         /*
+         * cpu_active bit is set, so it's safe to enalbe interrupts
+         * now.
+         */
+        local_irq_enable();
+        local_fiq_enable();
+
+        /*
          * OK, it's off to the idle thread for us
          */
         cpu_idle();
@@ -358,6 +379,8 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
 {
         unsigned int ncores = num_possible_cpus();
 
+        init_cpu_topology();
+
         smp_store_cpu_info(smp_processor_id());
 
         /*
@@ -460,6 +483,11 @@ static void ipi_timer(void)
 #ifdef CONFIG_LOCAL_TIMERS
 asmlinkage void __exception_irq_entry do_local_timer(struct pt_regs *regs)
 {
+        handle_local_timer(regs);
+}
+
+void handle_local_timer(struct pt_regs *regs)
+{
         struct pt_regs *old_regs = set_irq_regs(regs);
         int cpu = smp_processor_id();
 
@@ -538,7 +566,7 @@ static void percpu_timer_stop(void)
 }
 #endif
 
-static DEFINE_SPINLOCK(stop_lock);
+static DEFINE_RAW_SPINLOCK(stop_lock);
 
 /*
  * ipi_cpu_stop - handle IPI from smp_send_stop()
@@ -547,10 +575,10 @@ static void ipi_cpu_stop(unsigned int cpu)
 {
         if (system_state == SYSTEM_BOOTING ||
             system_state == SYSTEM_RUNNING) {
-                spin_lock(&stop_lock);
+                raw_spin_lock(&stop_lock);
                 printk(KERN_CRIT "CPU%u: stopping\n", cpu);
                 dump_stack();
-                spin_unlock(&stop_lock);
+                raw_spin_unlock(&stop_lock);
         }
 
         set_cpu_online(cpu, false);
@@ -567,6 +595,11 @@ static void ipi_cpu_stop(unsigned int cpu)
  */
 asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs)
 {
+        handle_IPI(ipinr, regs);
+}
+
+void handle_IPI(int ipinr, struct pt_regs *regs)
+{
         unsigned int cpu = smp_processor_id();
         struct pt_regs *old_regs = set_irq_regs(regs);
 
diff --git a/arch/arm/kernel/smp_scu.c b/arch/arm/kernel/smp_scu.c
index 79ed5e7f204a..8f5dd7963356 100644
--- a/arch/arm/kernel/smp_scu.c
+++ b/arch/arm/kernel/smp_scu.c
@@ -13,6 +13,7 @@
 
 #include <asm/smp_scu.h>
 #include <asm/cacheflush.h>
+#include <asm/cputype.h>
 
 #define SCU_CTRL                0x00
 #define SCU_CONFIG              0x04
@@ -33,10 +34,19 @@ unsigned int __init scu_get_core_count(void __iomem *scu_base)
 /*
  * Enable the SCU
  */
-void __init scu_enable(void __iomem *scu_base)
+void scu_enable(void __iomem *scu_base)
 {
         u32 scu_ctrl;
 
+#ifdef CONFIG_ARM_ERRATA_764369
+        /* Cortex-A9 only */
+        if ((read_cpuid(CPUID_ID) & 0xff0ffff0) == 0x410fc090) {
+                scu_ctrl = __raw_readl(scu_base + 0x30);
+                if (!(scu_ctrl & 1))
+                        __raw_writel(scu_ctrl | 0x1, scu_base + 0x30);
+        }
+#endif
+
         scu_ctrl = __raw_readl(scu_base + SCU_CTRL);
         /* already enabled? */
         if (scu_ctrl & 1)
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index 2c277d40cee6..01c186222f3b 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -137,8 +137,8 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk)
         clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk);
         clk->min_delta_ns = clockevent_delta2ns(0xf, clk);
 
+        clockevents_register_device(clk);
+
         /* Make sure our local interrupt controller has this enabled */
         gic_enable_ppi(clk->irq);
-
-        clockevents_register_device(clk);
 }
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c
index cb634c3e28e9..5a54b95d6bd2 100644
--- a/arch/arm/kernel/time.c
+++ b/arch/arm/kernel/time.c
@@ -39,13 +39,11 @@
  */
 static struct sys_timer *system_timer;
 
-#if defined(CONFIG_RTC_DRV_CMOS) || defined(CONFIG_RTC_DRV_CMOS_MODULE)
+#if defined(CONFIG_RTC_DRV_CMOS) || defined(CONFIG_RTC_DRV_CMOS_MODULE) || \
+    defined(CONFIG_NVRAM) || defined(CONFIG_NVRAM_MODULE)
 /* this needs a better home */
 DEFINE_SPINLOCK(rtc_lock);
-
-#ifdef CONFIG_RTC_DRV_CMOS_MODULE
 EXPORT_SYMBOL(rtc_lock);
-#endif
 #endif  /* pc-style 'CMOS' RTC support */
 
 /* change this if you have some constant time drift */
diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c
new file mode 100644
index 000000000000..1040c00405d0
--- /dev/null
+++ b/arch/arm/kernel/topology.c
@@ -0,0 +1,148 @@
+/*
+ * arch/arm/kernel/topology.c
+ *
+ * Copyright (C) 2011 Linaro Limited.
+ * Written by: Vincent Guittot
+ *
+ * based on arch/sh/kernel/topology.c
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/cpu.h>
+#include <linux/cpumask.h>
+#include <linux/init.h>
+#include <linux/percpu.h>
+#include <linux/node.h>
+#include <linux/nodemask.h>
+#include <linux/sched.h>
+
+#include <asm/cputype.h>
+#include <asm/topology.h>
+
+#define MPIDR_SMP_BITMASK (0x3 << 30)
+#define MPIDR_SMP_VALUE (0x2 << 30)
+
+#define MPIDR_MT_BITMASK (0x1 << 24)
+
+/*
+ * These masks reflect the current use of the affinity levels.
+ * The affinity level can be up to 16 bits according to ARM ARM
+ */
+
+#define MPIDR_LEVEL0_MASK 0x3
+#define MPIDR_LEVEL0_SHIFT 0
+
+#define MPIDR_LEVEL1_MASK 0xF
+#define MPIDR_LEVEL1_SHIFT 8
+
+#define MPIDR_LEVEL2_MASK 0xFF
+#define MPIDR_LEVEL2_SHIFT 16
+
+struct cputopo_arm cpu_topology[NR_CPUS];
+
+const struct cpumask *cpu_coregroup_mask(unsigned int cpu)
+{
+        return &cpu_topology[cpu].core_sibling;
+}
+
+/*
+ * store_cpu_topology is called at boot when only one cpu is running
+ * and with the mutex cpu_hotplug.lock locked, when several cpus have booted,
+ * which prevents simultaneous write access to cpu_topology array
+ */
+void store_cpu_topology(unsigned int cpuid)
+{
+        struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid];
+        unsigned int mpidr;
+        unsigned int cpu;
+
+        /* If the cpu topology has been already set, just return */
+        if (cpuid_topo->core_id != -1)
+                return;
+
+        mpidr = read_cpuid_mpidr();
+
+        /* create cpu topology mapping */
+        if ((mpidr & MPIDR_SMP_BITMASK) == MPIDR_SMP_VALUE) {
+                /*
+                 * This is a multiprocessor system
+                 * multiprocessor format & multiprocessor mode field are set
+                 */
+
+                if (mpidr & MPIDR_MT_BITMASK) {
+                        /* core performance interdependency */
+                        cpuid_topo->thread_id = (mpidr >> MPIDR_LEVEL0_SHIFT)
+                                & MPIDR_LEVEL0_MASK;
+                        cpuid_topo->core_id = (mpidr >> MPIDR_LEVEL1_SHIFT)
+                                & MPIDR_LEVEL1_MASK;
+                        cpuid_topo->socket_id = (mpidr >> MPIDR_LEVEL2_SHIFT)
+                                & MPIDR_LEVEL2_MASK;
+                } else {
+                        /* largely independent cores */
+                        cpuid_topo->thread_id = -1;
+                        cpuid_topo->core_id = (mpidr >> MPIDR_LEVEL0_SHIFT)
+                                & MPIDR_LEVEL0_MASK;
+                        cpuid_topo->socket_id = (mpidr >> MPIDR_LEVEL1_SHIFT)
+                                & MPIDR_LEVEL1_MASK;
+                }
+        } else {
+                /*
+                 * This is an uniprocessor system
+                 * we are in multiprocessor format but uniprocessor system
+                 * or in the old uniprocessor format
+                 */
+                cpuid_topo->thread_id = -1;
+                cpuid_topo->core_id = 0;
+                cpuid_topo->socket_id = -1;
+        }
+
+        /* update core and thread sibling masks */
+        for_each_possible_cpu(cpu) {
+                struct cputopo_arm *cpu_topo = &cpu_topology[cpu];
+
+                if (cpuid_topo->socket_id == cpu_topo->socket_id) {
+                        cpumask_set_cpu(cpuid, &cpu_topo->core_sibling);
+                        if (cpu != cpuid)
+                                cpumask_set_cpu(cpu,
+                                        &cpuid_topo->core_sibling);
+
+                        if (cpuid_topo->core_id == cpu_topo->core_id) {
+                                cpumask_set_cpu(cpuid,
+                                        &cpu_topo->thread_sibling);
+                                if (cpu != cpuid)
+                                        cpumask_set_cpu(cpu,
+                                                &cpuid_topo->thread_sibling);
+                        }
+                }
+        }
+        smp_wmb();
+
+        printk(KERN_INFO "CPU%u: thread %d, cpu %d, socket %d, mpidr %x\n",
+                cpuid, cpu_topology[cpuid].thread_id,
+                cpu_topology[cpuid].core_id,
+                cpu_topology[cpuid].socket_id, mpidr);
+}
+
+/*
+ * init_cpu_topology is called at boot when only one cpu is running
+ * which prevent simultaneous write access to cpu_topology array
+ */
+void init_cpu_topology(void)
+{
+        unsigned int cpu;
+
+        /* init core mask */
+        for_each_possible_cpu(cpu) {
+                struct cputopo_arm *cpu_topo = &(cpu_topology[cpu]);
+
+                cpu_topo->thread_id = -1;
+                cpu_topo->core_id =  -1;
+                cpu_topo->socket_id = -1;
+                cpumask_clear(&cpu_topo->core_sibling);
+                cpumask_clear(&cpu_topo->thread_sibling);
+        }
+        smp_wmb();
+}
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index bc9f9da782cb..99a572702509 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -21,12 +21,14 @@
 #include <linux/kdebug.h>
 #include <linux/module.h>
 #include <linux/kexec.h>
+#include <linux/bug.h>
 #include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/sched.h>
 
 #include <linux/atomic.h>
 #include <asm/cacheflush.h>
+#include <asm/exception.h>
 #include <asm/system.h>
 #include <asm/unistd.h>
 #include <asm/traps.h>
@@ -255,7 +257,7 @@ static int __die(const char *str, int err, struct thread_info *thread, struct pt
         return ret;
 }
 
-static DEFINE_SPINLOCK(die_lock);
+static DEFINE_RAW_SPINLOCK(die_lock);
 
 /*
  * This function is protected against re-entrancy.
@@ -267,9 +269,11 @@ void die(const char *str, struct pt_regs *regs, int err)
 
         oops_enter();
 
-        spin_lock_irq(&die_lock);
+        raw_spin_lock_irq(&die_lock);
         console_verbose();
         bust_spinlocks(1);
+        if (!user_mode(regs))
+                report_bug(regs->ARM_pc, regs);
         ret = __die(str, err, thread, regs);
 
         if (regs && kexec_should_crash(thread->task))
@@ -277,7 +281,7 @@ void die(const char *str, struct pt_regs *regs, int err)
 
         bust_spinlocks(0);
         add_taint(TAINT_DIE);
-        spin_unlock_irq(&die_lock);
+        raw_spin_unlock_irq(&die_lock);
         oops_exit();
 
         if (in_interrupt())
@@ -301,25 +305,43 @@ void arm_notify_die(const char *str, struct pt_regs *regs,
         }
 }
 
+#ifdef CONFIG_GENERIC_BUG
+
+int is_valid_bugaddr(unsigned long pc)
+{
+#ifdef CONFIG_THUMB2_KERNEL
+        unsigned short bkpt;
+#else
+        unsigned long bkpt;
+#endif
+
+        if (probe_kernel_address((unsigned *)pc, bkpt))
+                return 0;
+
+        return bkpt == BUG_INSTR_VALUE;
+}
+
+#endif
+
 static LIST_HEAD(undef_hook);
-static DEFINE_SPINLOCK(undef_lock);
+static DEFINE_RAW_SPINLOCK(undef_lock);
 
 void register_undef_hook(struct undef_hook *hook)
 {
         unsigned long flags;
 
-        spin_lock_irqsave(&undef_lock, flags);
+        raw_spin_lock_irqsave(&undef_lock, flags);
         list_add(&hook->node, &undef_hook);
-        spin_unlock_irqrestore(&undef_lock, flags);
+        raw_spin_unlock_irqrestore(&undef_lock, flags);
 }
 
 void unregister_undef_hook(struct undef_hook *hook)
 {
         unsigned long flags;
 
-        spin_lock_irqsave(&undef_lock, flags);
+        raw_spin_lock_irqsave(&undef_lock, flags);
         list_del(&hook->node);
-        spin_unlock_irqrestore(&undef_lock, flags);
+        raw_spin_unlock_irqrestore(&undef_lock, flags);
 }
 
 static int call_undef_hook(struct pt_regs *regs, unsigned int instr)
@@ -328,12 +350,12 @@ static int call_undef_hook(struct pt_regs *regs, unsigned int instr)
         unsigned long flags;
         int (*fn)(struct pt_regs *regs, unsigned int instr) = NULL;
 
-        spin_lock_irqsave(&undef_lock, flags);
+        raw_spin_lock_irqsave(&undef_lock, flags);
         list_for_each_entry(hook, &undef_hook, node)
                 if ((instr & hook->instr_mask) == hook->instr_val &&
                     (regs->ARM_cpsr & hook->cpsr_mask) == hook->cpsr_val)
                         fn = hook->fn;
-        spin_unlock_irqrestore(&undef_lock, flags);
+        raw_spin_unlock_irqrestore(&undef_lock, flags);
 
         return fn ? fn(regs, instr) : 1;
 }
@@ -706,16 +728,6 @@ baddataabort(int code, unsigned long instr, struct pt_regs *regs)
         arm_notify_die("unknown data abort code", regs, &info, instr, 0);
 }
 
-void __attribute__((noreturn)) __bug(const char *file, int line)
-{
-        printk(KERN_CRIT"kernel BUG at %s:%d!\n", file, line);
-        *(int *)0 = 0;
-
-        /* Avoid "noreturn function does return" */
-        for (;;);
-}
-EXPORT_SYMBOL(__bug);
-
 void __readwrite_bug(const char *fn)
 {
         printk("%s called, but not implemented\n", fn);
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index bf977f8514f6..20b3041e0860 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -21,10 +21,13 @@
 #define ARM_CPU_KEEP(x)
 #endif
 
-#if defined(CONFIG_SMP_ON_UP) && !defined(CONFIG_DEBUG_SPINLOCK)
+#if (defined(CONFIG_SMP_ON_UP) && !defined(CONFIG_DEBUG_SPINLOCK)) || \
+        defined(CONFIG_GENERIC_BUG)
 #define ARM_EXIT_KEEP(x)        x
+#define ARM_EXIT_DISCARD(x)
 #else
 #define ARM_EXIT_KEEP(x)
+#define ARM_EXIT_DISCARD(x)     x
 #endif
 
 OUTPUT_ARCH(arm)
@@ -39,6 +42,11 @@ jiffies = jiffies_64 + 4;
 SECTIONS
 {
         /*
+         * XXX: The linker does not define how output sections are
+         * assigned to input sections when there are multiple statements
+         * matching the same input section name.  There is no documented
+         * order of matching.
+         *
          * unwind exit sections must be discarded before the rest of the
          * unwind sections get included.
          */
@@ -47,6 +55,9 @@ SECTIONS
                 *(.ARM.extab.exit.text)
                 ARM_CPU_DISCARD(*(.ARM.exidx.cpuexit.text))
                 ARM_CPU_DISCARD(*(.ARM.extab.cpuexit.text))
+                ARM_EXIT_DISCARD(EXIT_TEXT)
+                ARM_EXIT_DISCARD(EXIT_DATA)
+                EXIT_CALL
 #ifndef CONFIG_HOTPLUG
                 *(.ARM.exidx.devexit.text)
                 *(.ARM.extab.devexit.text)
@@ -58,6 +69,8 @@ SECTIONS
 #ifndef CONFIG_SMP_ON_UP
                 *(.alt.smp.init)
 #endif
+                *(.discard)
+                *(.discard.*)
         }
 
 #ifdef CONFIG_XIP_KERNEL
@@ -279,9 +292,6 @@ SECTIONS
 
         STABS_DEBUG
         .comment 0 : { *(.comment) }
-
-        /* Default discards */
-        DISCARDS
 }
 
 /*
diff --git a/arch/arm/lib/backtrace.S b/arch/arm/lib/backtrace.S
index a673297b0cf1..cd07b5814c23 100644
--- a/arch/arm/lib/backtrace.S
+++ b/arch/arm/lib/backtrace.S
@@ -22,15 +22,10 @@
 #define mask    r7
 #define offset  r8
 
-ENTRY(__backtrace)
-                mov     r1, #0x10
-                mov     r0, fp
-
 ENTRY(c_backtrace)
 
 #if !defined(CONFIG_FRAME_POINTER) || !defined(CONFIG_PRINTK)
                 mov     pc, lr
-ENDPROC(__backtrace)
 ENDPROC(c_backtrace)
 #else
                 stmfd   sp!, {r4 - r8, lr}      @ Save an extra register so we have a location...
@@ -107,7 +102,6 @@ for_each_frame:	tst	frame, mask		@ Check for address exceptions
                 mov     r1, frame
                 bl      printk
 no_frame:       ldmfd   sp!, {r4 - r8, pc}
-ENDPROC(__backtrace)
 ENDPROC(c_backtrace)
                 
                 .pushsection __ex_table,"a"
diff --git a/arch/arm/lib/div64.S b/arch/arm/lib/div64.S
index faa7748142da..e55c4842c290 100644
--- a/arch/arm/lib/div64.S
+++ b/arch/arm/lib/div64.S
@@ -13,6 +13,7 @@
  */
 
 #include <linux/linkage.h>
+#include <asm/unwind.h>
 
 #ifdef __ARMEB__
 #define xh r0
@@ -44,6 +45,7 @@
  */
 
 ENTRY(__do_div64)
+UNWIND(.fnstart)
 
         @ Test for easy paths first.
         subs    ip, r4, #1
@@ -189,7 +191,12 @@ ENTRY(__do_div64)
         moveq   yh, xh
         moveq   xh, #0
         moveq   pc, lr
+UNWIND(.fnend)
 
+UNWIND(.fnstart)
+UNWIND(.pad #4)
+UNWIND(.save {lr})
+Ldiv0_64:
         @ Division by 0:
         str     lr, [sp, #-8]!
         bl      __div0
@@ -200,4 +207,5 @@ ENTRY(__do_div64)
         mov     xh, #0
         ldr     pc, [sp], #8
 
+UNWIND(.fnend)
 ENDPROC(__do_div64)
diff --git a/arch/arm/lib/uaccess_with_memcpy.c b/arch/arm/lib/uaccess_with_memcpy.c
index 8b9b13649f81..025f742dd4df 100644
--- a/arch/arm/lib/uaccess_with_memcpy.c
+++ b/arch/arm/lib/uaccess_with_memcpy.c
@@ -17,6 +17,7 @@
 #include <linux/sched.h>
 #include <linux/hardirq.h> /* for in_atomic() */
 #include <linux/gfp.h>
+#include <linux/highmem.h>
 #include <asm/current.h>
 #include <asm/page.h>
 
diff --git a/arch/arm/mach-at91/Makefile.boot b/arch/arm/mach-at91/Makefile.boot
index 3462b815054a..9ab5a3e5f4f1 100644
--- a/arch/arm/mach-at91/Makefile.boot
+++ b/arch/arm/mach-at91/Makefile.boot
@@ -4,15 +4,15 @@
 #   INITRD_PHYS must be in RAM
 
 ifeq ($(CONFIG_ARCH_AT91CAP9),y)
-   zreladdr-y   := 0x70008000
+   zreladdr-y   += 0x70008000
 params_phys-y   := 0x70000100
 initrd_phys-y   := 0x70410000
 else ifeq ($(CONFIG_ARCH_AT91SAM9G45),y)
-   zreladdr-y   := 0x70008000
+   zreladdr-y   += 0x70008000
 params_phys-y   := 0x70000100
 initrd_phys-y   := 0x70410000
 else
-   zreladdr-y   := 0x20008000
+   zreladdr-y   += 0x20008000
 params_phys-y   := 0x20000100
 initrd_phys-y   := 0x20410000
 endif
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index d522b47e30b5..6c8e3b5f669f 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -157,7 +157,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
         CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
         CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
         CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
-        CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc1_clk),
+        CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
         CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
         CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
         CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
diff --git a/arch/arm/mach-bcmring/Kconfig b/arch/arm/mach-bcmring/Kconfig
index 457b4384913e..9170d16dca50 100644
--- a/arch/arm/mach-bcmring/Kconfig
+++ b/arch/arm/mach-bcmring/Kconfig
@@ -17,5 +17,3 @@ config BCM_ZRELADDR
         hex "Compressed ZREL ADDR"
 
 endmenu
-
-# source "drivers/char/bcmring/Kconfig"
diff --git a/arch/arm/mach-bcmring/Makefile.boot b/arch/arm/mach-bcmring/Makefile.boot
index fb53b283bebb..aef2467757fa 100644
--- a/arch/arm/mach-bcmring/Makefile.boot
+++ b/arch/arm/mach-bcmring/Makefile.boot
@@ -1,6 +1,6 @@
 # Address where decompressor will be written and eventually executed.
 #
 # default to SDRAM
-zreladdr-y      := $(CONFIG_BCM_ZRELADDR)
+zreladdr-y      += $(CONFIG_BCM_ZRELADDR)
 params_phys-y   := 0x00000800
 
diff --git a/arch/arm/mach-bcmring/arch.c b/arch/arm/mach-bcmring/arch.c
index a604b9ebb501..31a143592c81 100644
--- a/arch/arm/mach-bcmring/arch.c
+++ b/arch/arm/mach-bcmring/arch.c
@@ -136,8 +136,8 @@ static void __init bcmring_init_machine(void)
 *
 *****************************************************************************/
 
-static void __init bcmring_fixup(struct machine_desc *desc,
-     struct tag *t, char **cmdline, struct meminfo *mi) {
+static void __init bcmring_fixup(struct tag *t, char **cmdline,
+        struct meminfo *mi) {
 #ifdef CONFIG_BLK_DEV_INITRD
         printk(KERN_NOTICE "bcmring_fixup\n");
         t->hdr.tag = ATAG_CORE;
diff --git a/arch/arm/mach-bcmring/irq.c b/arch/arm/mach-bcmring/irq.c
index c48feaf4e8e9..437fa683bcb2 100644
--- a/arch/arm/mach-bcmring/irq.c
+++ b/arch/arm/mach-bcmring/irq.c
@@ -20,7 +20,6 @@
 #include <linux/stddef.h>
 #include <linux/list.h>
 #include <linux/timer.h>
-#include <linux/version.h>
 #include <linux/io.h>
 
 #include <mach/hardware.h>
diff --git a/arch/arm/mach-bcmring/timer.c b/arch/arm/mach-bcmring/timer.c
index 2d415d2a8e68..af9c3d7e2a0c 100644
--- a/arch/arm/mach-bcmring/timer.c
+++ b/arch/arm/mach-bcmring/timer.c
@@ -12,7 +12,6 @@
 * consent.
 *****************************************************************************/
 
-#include <linux/version.h>
 #include <linux/types.h>
 #include <linux/module.h>
 #include <csp/tmrHw.h>
diff --git a/arch/arm/mach-clps711x/Makefile.boot b/arch/arm/mach-clps711x/Makefile.boot
index a51fcef64fe0..9398e859b5af 100644
--- a/arch/arm/mach-clps711x/Makefile.boot
+++ b/arch/arm/mach-clps711x/Makefile.boot
@@ -1,5 +1,5 @@
 # The standard locations for stuff on CLPS711x type processors
-   zreladdr-y                           := 0xc0028000
+   zreladdr-y                           += 0xc0028000
 params_phys-y                           := 0xc0000100
 # Should probably have some agreement on these...
 initrd_phys-$(CONFIG_ARCH_P720T)        := 0xc0400000
diff --git a/arch/arm/mach-clps711x/clep7312.c b/arch/arm/mach-clps711x/clep7312.c
index 67b5abb4a60a..0a2e74feb24a 100644
--- a/arch/arm/mach-clps711x/clep7312.c
+++ b/arch/arm/mach-clps711x/clep7312.c
@@ -26,8 +26,7 @@
 #include "common.h"
 
 static void __init
-fixup_clep7312(struct machine_desc *desc, struct tag *tags,
-            char **cmdline, struct meminfo *mi)
+fixup_clep7312(struct tag *tags, char **cmdline, struct meminfo *mi)
 {
         mi->nr_banks=1;
         mi->bank[0].start = 0xc0000000;
diff --git a/arch/arm/mach-clps711x/edb7211-arch.c b/arch/arm/mach-clps711x/edb7211-arch.c
index 98ca5b2e940d..725a7a54ba42 100644
--- a/arch/arm/mach-clps711x/edb7211-arch.c
+++ b/arch/arm/mach-clps711x/edb7211-arch.c
@@ -37,8 +37,7 @@ static void __init edb7211_reserve(void)
 }
 
 static void __init
-fixup_edb7211(struct machine_desc *desc, struct tag *tags,
-              char **cmdline, struct meminfo *mi)
+fixup_edb7211(struct tag *tags, char **cmdline, struct meminfo *mi)
 {
         /*
          * Bank start addresses are not present in the information
diff --git a/arch/arm/mach-clps711x/fortunet.c b/arch/arm/mach-clps711x/fortunet.c
index b1cb479e71e9..1947b30f9b8c 100644
--- a/arch/arm/mach-clps711x/fortunet.c
+++ b/arch/arm/mach-clps711x/fortunet.c
@@ -57,8 +57,7 @@ typedef struct tag_IMAGE_PARAMS
 #define IMAGE_PARAMS_PHYS       0xC01F0000
 
 static void __init
-fortunet_fixup(struct machine_desc *desc, struct tag *tags,
-                 char **cmdline, struct meminfo *mi)
+fortunet_fixup(struct tag *tags, char **cmdline, struct meminfo *mi)
 {
         IMAGE_PARAMS *ip = phys_to_virt(IMAGE_PARAMS_PHYS);
         *cmdline = phys_to_virt(ip->command_line);
diff --git a/arch/arm/mach-clps711x/p720t.c b/arch/arm/mach-clps711x/p720t.c
index cefbce0480b9..3f796e0d3284 100644
--- a/arch/arm/mach-clps711x/p720t.c
+++ b/arch/arm/mach-clps711x/p720t.c
@@ -56,8 +56,7 @@ static struct map_desc p720t_io_desc[] __initdata = {
 };
 
 static void __init
-fixup_p720t(struct machine_desc *desc, struct tag *tag,
-            char **cmdline, struct meminfo *mi)
+fixup_p720t(struct tag *tag, char **cmdline, struct meminfo *mi)
 {
         /*
          * Our bootloader doesn't setup any tags (yet).
diff --git a/arch/arm/mach-cns3xxx/Makefile.boot b/arch/arm/mach-cns3xxx/Makefile.boot
index 777012865220..d079de0b6e3b 100644
--- a/arch/arm/mach-cns3xxx/Makefile.boot
+++ b/arch/arm/mach-cns3xxx/Makefile.boot
@@ -1,3 +1,3 @@
-   zreladdr-y   := 0x00008000
+   zreladdr-y   += 0x00008000
 params_phys-y   := 0x00000100
 initrd_phys-y   := 0x00C00000
diff --git a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
index 6bd83ed90afe..d87bfc397d39 100644
--- a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
+++ b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
@@ -8,7 +8,6 @@
  * published by the Free Software Foundation.
  */
 
-#include <mach/hardware.h>
 #include <asm/hardware/entry-macro-gic.S>
 
                 .macro  disable_fiq
diff --git a/arch/arm/mach-cns3xxx/include/mach/system.h b/arch/arm/mach-cns3xxx/include/mach/system.h
index 58bb03ae3cf4..4f16c9b79f78 100644
--- a/arch/arm/mach-cns3xxx/include/mach/system.h
+++ b/arch/arm/mach-cns3xxx/include/mach/system.h
@@ -13,7 +13,6 @@
 
 #include <linux/io.h>
 #include <asm/proc-fns.h>
-#include <mach/hardware.h>
 
 static inline void arch_idle(void)
 {
diff --git a/arch/arm/mach-cns3xxx/include/mach/uncompress.h b/arch/arm/mach-cns3xxx/include/mach/uncompress.h
index de8ead9b91f7..a91b6058ab4f 100644
--- a/arch/arm/mach-cns3xxx/include/mach/uncompress.h
+++ b/arch/arm/mach-cns3xxx/include/mach/uncompress.h
@@ -8,7 +8,6 @@
  */
 
 #include <asm/mach-types.h>
-#include <mach/hardware.h>
 #include <mach/cns3xxx.h>
 
 #define AMBA_UART_DR(base)      (*(volatile unsigned char *)((base) + 0x00))
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c
index 06fd25d70aec..0f8fca48a5ed 100644
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -49,7 +49,7 @@ static struct cns3xxx_pcie *sysdata_to_cnspci(void *sysdata)
         return &cns3xxx_pcie[root->domain];
 }
 
-static struct cns3xxx_pcie *pdev_to_cnspci(struct pci_dev *dev)
+static struct cns3xxx_pcie *pdev_to_cnspci(const struct pci_dev *dev)
 {
         return sysdata_to_cnspci(dev->sysdata);
 }
diff --git a/arch/arm/mach-davinci/Makefile.boot b/arch/arm/mach-davinci/Makefile.boot
index db97ef2c6477..04a6c4e67b14 100644
--- a/arch/arm/mach-davinci/Makefile.boot
+++ b/arch/arm/mach-davinci/Makefile.boot
@@ -2,12 +2,12 @@ ifeq ($(CONFIG_ARCH_DAVINCI_DA8XX),y)
 ifeq ($(CONFIG_ARCH_DAVINCI_DMx),y)
 $(error Cannot enable DaVinci and DA8XX platforms concurrently)
 else
-   zreladdr-y   := 0xc0008000
+   zreladdr-y   += 0xc0008000
 params_phys-y   := 0xc0000100
 initrd_phys-y   := 0xc0800000
 endif
 else
-   zreladdr-y   := 0x80008000
+   zreladdr-y   += 0x80008000
 params_phys-y   := 0x80000100
 initrd_phys-y   := 0x80800000
 endif
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index bd5394537c88..008d51407cd7 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -115,6 +115,32 @@ static struct spi_board_info da850evm_spi_info[] = {
         },
 };
 
+#ifdef CONFIG_MTD
+static void da850_evm_m25p80_notify_add(struct mtd_info *mtd)
+{
+        char *mac_addr = davinci_soc_info.emac_pdata->mac_addr;
+        size_t retlen;
+
+        if (!strcmp(mtd->name, "MAC-Address")) {
+                mtd->read(mtd, 0, ETH_ALEN, &retlen, mac_addr);
+                if (retlen == ETH_ALEN)
+                        pr_info("Read MAC addr from SPI Flash: %pM\n",
+                                mac_addr);
+        }
+}
+
+static struct mtd_notifier da850evm_spi_notifier = {
+        .add    = da850_evm_m25p80_notify_add,
+};
+
+static void da850_evm_setup_mac_addr(void)
+{
+        register_mtd_user(&da850evm_spi_notifier);
+}
+#else
+static void da850_evm_setup_mac_addr(void) { }
+#endif
+
 static struct mtd_partition da850_evm_norflash_partition[] = {
         {
                 .name           = "bootloaders + env",
@@ -1244,6 +1270,8 @@ static __init void da850_evm_init(void)
         if (ret)
                 pr_warning("da850_evm_init: sata registration failed: %d\n",
                                 ret);
+
+        da850_evm_setup_mac_addr();
 }
 
 #ifdef CONFIG_SERIAL_8250_CONSOLE
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index 47fd0bc3d3e7..fa59c097223d 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -243,7 +243,7 @@
 #define PSC_STATE_DISABLE       2
 #define PSC_STATE_ENABLE        3
 
-#define MDSTAT_STATE_MASK       0x1f
+#define MDSTAT_STATE_MASK       0x3f
 #define MDCTL_FORCE             BIT(31)
 
 #ifndef __ASSEMBLER__
diff --git a/arch/arm/mach-davinci/sleep.S b/arch/arm/mach-davinci/sleep.S
index fb5e72b532b0..5f1e045a3ad1 100644
--- a/arch/arm/mach-davinci/sleep.S
+++ b/arch/arm/mach-davinci/sleep.S
@@ -217,7 +217,11 @@ ddr2clk_stop_done:
 ENDPROC(davinci_ddr_psc_config)
 
 CACHE_FLUSH:
-        .word   arm926_flush_kern_cache_all
+#ifdef CONFIG_CPU_V6
+        .word   v6_flush_kern_cache_all
+#else
+        .word   arm926_flush_kern_cache_all
+#endif
 
 ENTRY(davinci_cpu_suspend_sz)
         .word   . - davinci_cpu_suspend
diff --git a/arch/arm/mach-dove/Makefile.boot b/arch/arm/mach-dove/Makefile.boot
index 67039c3e0c48..760a0efe7580 100644
--- a/arch/arm/mach-dove/Makefile.boot
+++ b/arch/arm/mach-dove/Makefile.boot
@@ -1,3 +1,3 @@
-   zreladdr-y   := 0x00008000
+   zreladdr-y   += 0x00008000
 params_phys-y   := 0x00000100
 initrd_phys-y   := 0x00800000
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index 83dce859886d..a9e0dae86a26 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -158,7 +158,7 @@ void __init dove_spi0_init(void)
 
 void __init dove_spi1_init(void)
 {
-        orion_spi_init(DOVE_SPI1_PHYS_BASE, get_tclk());
+        orion_spi_1_init(DOVE_SPI1_PHYS_BASE, get_tclk());
 }
 
 /*****************************************************************************
diff --git a/arch/arm/mach-ebsa110/Makefile.boot b/arch/arm/mach-ebsa110/Makefile.boot
index 232126044935..83cf07c38ada 100644
--- a/arch/arm/mach-ebsa110/Makefile.boot
+++ b/arch/arm/mach-ebsa110/Makefile.boot
@@ -1,4 +1,4 @@
-   zreladdr-y   := 0x00008000
+   zreladdr-y   += 0x00008000
 params_phys-y   := 0x00000400
 initrd_phys-y   := 0x00800000
 
diff --git a/arch/arm/mach-ebsa110/include/mach/io.h b/arch/arm/mach-ebsa110/include/mach/io.h
index f68daa632af0..44679db672fb 100644
--- a/arch/arm/mach-ebsa110/include/mach/io.h
+++ b/arch/arm/mach-ebsa110/include/mach/io.h
@@ -13,8 +13,6 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-#define IO_SPACE_LIMIT 0xffff
-
 u8 __inb8(unsigned int port);
 void __outb8(u8  val, unsigned int port);
 
diff --git a/arch/arm/mach-ep93xx/Makefile.boot b/arch/arm/mach-ep93xx/Makefile.boot
index 0ad33f15c622..d3113a71cb40 100644
--- a/arch/arm/mach-ep93xx/Makefile.boot
+++ b/arch/arm/mach-ep93xx/Makefile.boot
@@ -1,14 +1,14 @@
-   zreladdr-$(CONFIG_EP93XX_SDCE3_SYNC_PHYS_OFFSET)     := 0x00008000
+   zreladdr-$(CONFIG_EP93XX_SDCE3_SYNC_PHYS_OFFSET)     += 0x00008000
 params_phys-$(CONFIG_EP93XX_SDCE3_SYNC_PHYS_OFFSET)     := 0x00000100
 
-   zreladdr-$(CONFIG_EP93XX_SDCE0_PHYS_OFFSET)          := 0xc0008000
+   zreladdr-$(CONFIG_EP93XX_SDCE0_PHYS_OFFSET)          += 0xc0008000
 params_phys-$(CONFIG_EP93XX_SDCE0_PHYS_OFFSET)          := 0xc0000100
 
-   zreladdr-$(CONFIG_EP93XX_SDCE1_PHYS_OFFSET)          := 0xd0008000
+   zreladdr-$(CONFIG_EP93XX_SDCE1_PHYS_OFFSET)          += 0xd0008000
 params_phys-$(CONFIG_EP93XX_SDCE1_PHYS_OFFSET)          := 0xd0000100
 
-   zreladdr-$(CONFIG_EP93XX_SDCE2_PHYS_OFFSET)          := 0xe0008000
+   zreladdr-$(CONFIG_EP93XX_SDCE2_PHYS_OFFSET)          += 0xe0008000
 params_phys-$(CONFIG_EP93XX_SDCE2_PHYS_OFFSET)          := 0xe0000100
 
-   zreladdr-$(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET)    := 0xf0008000
+   zreladdr-$(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET)    += 0xf0008000
 params_phys-$(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET)    := 0xf0000100
diff --git a/arch/arm/mach-ep93xx/include/mach/ts72xx.h b/arch/arm/mach-ep93xx/include/mach/ts72xx.h
index 0eabec62cd9d..f1397a13e76b 100644
--- a/arch/arm/mach-ep93xx/include/mach/ts72xx.h
+++ b/arch/arm/mach-ep93xx/include/mach/ts72xx.h
@@ -6,7 +6,7 @@
  * TS72xx memory map:
  *
  * virt         phys            size
- * febff000     22000000        4K      model number register
+ * febff000     22000000        4K      model number register (bits 0-2)
  * febfe000     22400000        4K      options register
  * febfd000     22800000        4K      options register #2
  * febf9000     10800000        4K      TS-5620 RTC index register
@@ -20,6 +20,9 @@
 #define TS72XX_MODEL_TS7200             0x00
 #define TS72XX_MODEL_TS7250             0x01
 #define TS72XX_MODEL_TS7260             0x02
+#define TS72XX_MODEL_TS7300             0x03
+#define TS72XX_MODEL_TS7400             0x04
+#define TS72XX_MODEL_MASK               0x07
 
 
 #define TS72XX_OPTIONS_PHYS_BASE        0x22400000
@@ -51,19 +54,34 @@
 
 #ifndef __ASSEMBLY__
 
+static inline int ts72xx_model(void)
+{
+        return __raw_readb(TS72XX_MODEL_VIRT_BASE) & TS72XX_MODEL_MASK;
+}
+
 static inline int board_is_ts7200(void)
 {
-        return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7200;
+        return ts72xx_model() == TS72XX_MODEL_TS7200;
 }
 
 static inline int board_is_ts7250(void)
 {
-        return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7250;
+        return ts72xx_model() == TS72XX_MODEL_TS7250;
 }
 
 static inline int board_is_ts7260(void)
 {
-        return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7260;
+        return ts72xx_model() == TS72XX_MODEL_TS7260;
+}
+
+static inline int board_is_ts7300(void)
+{
+        return ts72xx_model()  == TS72XX_MODEL_TS7300;
+}
+
+static inline int board_is_ts7400(void)
+{
+        return ts72xx_model() == TS72XX_MODEL_TS7400;
 }
 
 static inline int is_max197_installed(void)
diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
index 0c77ab99fa16..fc1f92dfbea8 100644
--- a/arch/arm/mach-exynos4/Kconfig
+++ b/arch/arm/mach-exynos4/Kconfig
@@ -12,6 +12,7 @@ if ARCH_EXYNOS4
 config CPU_EXYNOS4210
         bool
         select S3C_PL330_DMA
+        select ARM_CPU_SUSPEND if PM
         help
           Enable EXYNOS4210 CPU support
 
diff --git a/arch/arm/mach-exynos4/Makefile.boot b/arch/arm/mach-exynos4/Makefile.boot
index d65956ffb43d..b9862e22bf10 100644
--- a/arch/arm/mach-exynos4/Makefile.boot
+++ b/arch/arm/mach-exynos4/Makefile.boot
@@ -1,2 +1,2 @@
-   zreladdr-y   := 0x40008000
+   zreladdr-y   += 0x40008000
 params_phys-y   := 0x40000100
diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
index 851dea018578..86964d2e9e1b 100644
--- a/arch/arm/mach-exynos4/clock.c
+++ b/arch/arm/mach-exynos4/clock.c
@@ -520,7 +520,7 @@ static struct clk init_clocks_off[] = {
                 .ctrlbit        = (1 << 21),
         }, {
                 .name           = "ac97",
-                .id             = -1,
+                .devname        = "samsung-ac97",
                 .enable         = exynos4_clk_ip_peril_ctrl,
                 .ctrlbit        = (1 << 27),
         }, {
@@ -899,8 +899,7 @@ static struct clksrc_clk clksrcs[] = {
                 .reg_div = { .reg = S5P_CLKDIV_CAM, .shift = 28, .size = 4 },
         }, {
                 .clk            = {
-                        .name           = "sclk_cam",
-                        .devname        = "exynos4-fimc.0",
+                        .name           = "sclk_cam0",
                         .enable         = exynos4_clksrc_mask_cam_ctrl,
                         .ctrlbit        = (1 << 16),
                 },
@@ -909,8 +908,7 @@ static struct clksrc_clk clksrcs[] = {
                 .reg_div = { .reg = S5P_CLKDIV_CAM, .shift = 16, .size = 4 },
         }, {
                 .clk            = {
-                        .name           = "sclk_cam",
-                        .devname        = "exynos4-fimc.1",
+                        .name           = "sclk_cam1",
                         .enable         = exynos4_clksrc_mask_cam_ctrl,
                         .ctrlbit        = (1 << 20),
                 },
@@ -1160,7 +1158,7 @@ void __init_or_cpufreq exynos4_setup_clocks(void)
 
         vpllsrc = clk_get_rate(&clk_vpllsrc.clk);
         vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0),
-                                __raw_readl(S5P_VPLL_CON1), pll_4650);
+                                __raw_readl(S5P_VPLL_CON1), pll_4650c);
 
         clk_fout_apll.ops = &exynos4_fout_apll_ops;
         clk_fout_mpll.rate = mpll;
diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c
index 2d8a40c9e6e5..746d6fc6d397 100644
--- a/arch/arm/mach-exynos4/cpu.c
+++ b/arch/arm/mach-exynos4/cpu.c
@@ -24,12 +24,13 @@
 #include <plat/exynos4.h>
 #include <plat/adc-core.h>
 #include <plat/sdhci.h>
-#include <plat/devs.h>
 #include <plat/fb-core.h>
 #include <plat/fimc-core.h>
 #include <plat/iic-core.h>
+#include <plat/reset.h>
 
 #include <mach/regs-irq.h>
+#include <mach/regs-pmu.h>
 
 extern int combiner_init(unsigned int combiner_nr, void __iomem *base,
                          unsigned int irq_start);
@@ -128,6 +129,11 @@ static void exynos4_idle(void)
         local_irq_enable();
 }
 
+static void exynos4_sw_reset(void)
+{
+        __raw_writel(0x1, S5P_SWRESET);
+}
+
 /*
  * exynos4_map_io
  *
@@ -241,5 +247,8 @@ int __init exynos4_init(void)
         /* set idle function */
         pm_idle = exynos4_idle;
 
+        /* set sw_reset function */
+        s5p_reset_hook = exynos4_sw_reset;
+
         return sysdev_register(&exynos4_sysdev);
 }
diff --git a/arch/arm/mach-exynos4/include/mach/irqs.h b/arch/arm/mach-exynos4/include/mach/irqs.h
index 934d2a493982..f8952f8f3757 100644
--- a/arch/arm/mach-exynos4/include/mach/irqs.h
+++ b/arch/arm/mach-exynos4/include/mach/irqs.h
@@ -80,9 +80,8 @@
 #define IRQ_HSMMC3              IRQ_SPI(76)
 #define IRQ_DWMCI               IRQ_SPI(77)
 
-#define IRQ_MIPICSI0            IRQ_SPI(78)
-
-#define IRQ_MIPICSI1            IRQ_SPI(80)
+#define IRQ_MIPI_CSIS0          IRQ_SPI(78)
+#define IRQ_MIPI_CSIS1          IRQ_SPI(80)
 
 #define IRQ_ONENAND_AUDI        IRQ_SPI(82)
 #define IRQ_ROTATOR             IRQ_SPI(83)
diff --git a/arch/arm/mach-exynos4/include/mach/regs-pmu.h b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
index fa49bbb8e7b0..cdf9b47c303c 100644
--- a/arch/arm/mach-exynos4/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
@@ -29,6 +29,8 @@
 #define S5P_USE_STANDBY_WFE1                    (1 << 25)
 #define S5P_USE_MASK                            ((0x3 << 16) | (0x3 << 24))
 
+#define S5P_SWRESET                             S5P_PMUREG(0x0400)
+
 #define S5P_WAKEUP_STAT                         S5P_PMUREG(0x0600)
 #define S5P_EINT_WAKEUP_MASK                    S5P_PMUREG(0x0604)
 #define S5P_WAKEUP_MASK                         S5P_PMUREG(0x0608)
diff --git a/arch/arm/mach-exynos4/irq-eint.c b/arch/arm/mach-exynos4/irq-eint.c
index 9d87d2ac7f68..badb8c66fc9b 100644
--- a/arch/arm/mach-exynos4/irq-eint.c
+++ b/arch/arm/mach-exynos4/irq-eint.c
@@ -23,6 +23,8 @@
 
 #include <mach/regs-gpio.h>
 
+#include <asm/mach/irq.h>
+
 static DEFINE_SPINLOCK(eint_lock);
 
 static unsigned int eint0_15_data[16];
@@ -184,8 +186,11 @@ static inline void exynos4_irq_demux_eint(unsigned int start)
 
 static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
 {
+        struct irq_chip *chip = irq_get_chip(irq);
+        chained_irq_enter(chip, desc);
         exynos4_irq_demux_eint(IRQ_EINT(16));
         exynos4_irq_demux_eint(IRQ_EINT(24));
+        chained_irq_exit(chip, desc);
 }
 
 static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
@@ -193,6 +198,7 @@ static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
         u32 *irq_data = irq_get_handler_data(irq);
         struct irq_chip *chip = irq_get_chip(irq);
 
+        chained_irq_enter(chip, desc);
         chip->irq_mask(&desc->irq_data);
 
         if (chip->irq_ack)
@@ -201,6 +207,7 @@ static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
         generic_handle_irq(*irq_data);
 
         chip->irq_unmask(&desc->irq_data);
+        chained_irq_exit(chip, desc);
 }
 
 int __init exynos4_init_irq_eint(void)
diff --git a/arch/arm/mach-exynos4/mach-universal_c210.c b/arch/arm/mach-exynos4/mach-universal_c210.c
index 0e280d12301e..b3b5d8911004 100644
--- a/arch/arm/mach-exynos4/mach-universal_c210.c
+++ b/arch/arm/mach-exynos4/mach-universal_c210.c
@@ -79,7 +79,7 @@ static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
 };
 
 static struct regulator_consumer_supply max8952_consumer =
-        REGULATOR_SUPPLY("vddarm", NULL);
+        REGULATOR_SUPPLY("vdd_arm", NULL);
 
 static struct max8952_platform_data universal_max8952_pdata __initdata = {
         .gpio_vid0      = EXYNOS4_GPX0(3),
@@ -105,7 +105,7 @@ static struct max8952_platform_data universal_max8952_pdata __initdata = {
 };
 
 static struct regulator_consumer_supply lp3974_buck1_consumer =
-        REGULATOR_SUPPLY("vddint", NULL);
+        REGULATOR_SUPPLY("vdd_int", NULL);
 
 static struct regulator_consumer_supply lp3974_buck2_consumer =
         REGULATOR_SUPPLY("vddg3d", NULL);
diff --git a/arch/arm/mach-exynos4/mct.c b/arch/arm/mach-exynos4/mct.c
index 1ae059b7ad7b..ddd86864fb83 100644
--- a/arch/arm/mach-exynos4/mct.c
+++ b/arch/arm/mach-exynos4/mct.c
@@ -132,12 +132,18 @@ static cycle_t exynos4_frc_read(struct clocksource *cs)
         return ((cycle_t)hi << 32) | lo;
 }
 
+static void exynos4_frc_resume(struct clocksource *cs)
+{
+        exynos4_mct_frc_start(0, 0);
+}
+
 struct clocksource mct_frc = {
         .name           = "mct-frc",
         .rating         = 400,
         .read           = exynos4_frc_read,
         .mask           = CLOCKSOURCE_MASK(64),
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
+        .resume         = exynos4_frc_resume,
 };
 
 static void __init exynos4_clocksource_init(void)
@@ -389,9 +395,11 @@ static void exynos4_mct_tick_init(struct clock_event_device *evt)
 }
 
 /* Setup the local clock events for a CPU */
-void __cpuinit local_timer_setup(struct clock_event_device *evt)
+int __cpuinit local_timer_setup(struct clock_event_device *evt)
 {
         exynos4_mct_tick_init(evt);
+
+        return 0;
 }
 
 int local_timer_ack(void)
diff --git a/arch/arm/mach-exynos4/platsmp.c b/arch/arm/mach-exynos4/platsmp.c
index 7c2282c6ba81..0c90896ad9a0 100644
--- a/arch/arm/mach-exynos4/platsmp.c
+++ b/arch/arm/mach-exynos4/platsmp.c
@@ -106,6 +106,8 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
          */
         spin_lock(&boot_lock);
         spin_unlock(&boot_lock);
+
+        set_cpu_online(cpu, true);
 }
 
 int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
@@ -191,12 +193,10 @@ void __init smp_init_cpus(void)
         ncores = scu_base ? scu_get_core_count(scu_base) : 1;
 
         /* sanity check */
-        if (ncores > NR_CPUS) {
-                printk(KERN_WARNING
-                       "EXYNOS4: no. of cores (%d) greater than configured "
-                       "maximum of %d - clipping\n",
-                       ncores, NR_CPUS);
-                ncores = NR_CPUS;
+        if (ncores > nr_cpu_ids) {
+                pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",
+                        ncores, nr_cpu_ids);
+                ncores = nr_cpu_ids;
         }
 
         for (i = 0; i < ncores; i++)
diff --git a/arch/arm/mach-exynos4/setup-keypad.c b/arch/arm/mach-exynos4/setup-keypad.c
index 1ee0ebff111f..7862bfb5933d 100644
--- a/arch/arm/mach-exynos4/setup-keypad.c
+++ b/arch/arm/mach-exynos4/setup-keypad.c
@@ -19,15 +19,16 @@ void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
 
         if (rows > 8) {
                 /* Set all the necessary GPX2 pins: KP_ROW[0~7] */
-                s3c_gpio_cfgrange_nopull(EXYNOS4_GPX2(0), 8, S3C_GPIO_SFN(3));
+                s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), 8, S3C_GPIO_SFN(3),
+                                        S3C_GPIO_PULL_UP);
 
                 /* Set all the necessary GPX3 pins: KP_ROW[8~] */
-                s3c_gpio_cfgrange_nopull(EXYNOS4_GPX3(0), (rows - 8),
-                                         S3C_GPIO_SFN(3));
+                s3c_gpio_cfgall_range(EXYNOS4_GPX3(0), (rows - 8),
+                                         S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
         } else {
                 /* Set all the necessary GPX2 pins: KP_ROW[x] */
-                s3c_gpio_cfgrange_nopull(EXYNOS4_GPX2(0), rows,
-                                         S3C_GPIO_SFN(3));
+                s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), rows, S3C_GPIO_SFN(3),
+                                        S3C_GPIO_PULL_UP);
         }
 
         /* Set all the necessary GPX1 pins to special-function 3: KP_COL[x] */
diff --git a/arch/arm/mach-exynos4/setup-usb-phy.c b/arch/arm/mach-exynos4/setup-usb-phy.c
index 0883c1b824b9..39aca045f660 100644
--- a/arch/arm/mach-exynos4/setup-usb-phy.c
+++ b/arch/arm/mach-exynos4/setup-usb-phy.c
@@ -82,7 +82,7 @@ static int exynos4_usb_phy1_init(struct platform_device *pdev)
 
         rstcon &= ~(HOST_LINK_PORT_SWRST_MASK | PHY1_SWRST_MASK);
         writel(rstcon, EXYNOS4_RSTCON);
-        udelay(50);
+        udelay(80);
 
         clk_disable(otg_clk);
         clk_put(otg_clk);
diff --git a/arch/arm/mach-footbridge/Kconfig b/arch/arm/mach-footbridge/Kconfig
index dc26fff22cf0..f643ef819da6 100644
--- a/arch/arm/mach-footbridge/Kconfig
+++ b/arch/arm/mach-footbridge/Kconfig
@@ -4,8 +4,8 @@ menu "Footbridge Implementations"
 
 config ARCH_CATS
         bool "CATS"
-        select CLKSRC_I8253
         select CLKEVT_I8253
+        select CLKSRC_I8253
         select FOOTBRIDGE_HOST
         select ISA
         select ISA_DMA
@@ -61,6 +61,7 @@ config ARCH_EBSA285_HOST
 
 config ARCH_NETWINDER
         bool "NetWinder"
+        select CLKEVT_I8253
         select CLKSRC_I8253
         select FOOTBRIDGE_HOST
         select ISA
diff --git a/arch/arm/mach-footbridge/Makefile.boot b/arch/arm/mach-footbridge/Makefile.boot
index c7e75acfe6c9..ff0a4b5b0a82 100644
--- a/arch/arm/mach-footbridge/Makefile.boot
+++ b/arch/arm/mach-footbridge/Makefile.boot
@@ -1,4 +1,4 @@
-   zreladdr-y   := 0x00008000
+   zreladdr-y   += 0x00008000
 params_phys-y   := 0x00000100
 initrd_phys-y   := 0x00800000
 
diff --git a/arch/arm/mach-footbridge/cats-hw.c b/arch/arm/mach-footbridge/cats-hw.c
index 5b1a8db779be..206ff2f39d6c 100644
--- a/arch/arm/mach-footbridge/cats-hw.c
+++ b/arch/arm/mach-footbridge/cats-hw.c
@@ -76,8 +76,7 @@ __initcall(cats_hw_init);
  * hard reboots fail on early boards.
  */
 static void __init
-fixup_cats(struct machine_desc *desc, struct tag *tags,
-           char **cmdline, struct meminfo *mi)
+fixup_cats(struct tag *tags, char **cmdline, struct meminfo *mi)
 {
         screen_info.orig_video_lines  = 25;
         screen_info.orig_video_points = 16;
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index 1331fff51ae2..18c32a5541d9 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -18,6 +18,7 @@
 #include <linux/irq.h>
 #include <linux/io.h>
 #include <linux/spinlock.h>
+#include <video/vga.h>
 
 #include <asm/irq.h>
 #include <asm/system.h>
diff --git a/arch/arm/mach-footbridge/include/mach/hardware.h b/arch/arm/mach-footbridge/include/mach/hardware.h
index 15d54981674c..e3d6ccac2162 100644
--- a/arch/arm/mach-footbridge/include/mach/hardware.h
+++ b/arch/arm/mach-footbridge/include/mach/hardware.h
@@ -93,7 +93,7 @@
 #define CPLD_FLASH_WR_ENABLE    1
 
 #ifndef __ASSEMBLY__
-extern spinlock_t nw_gpio_lock;
+extern raw_spinlock_t nw_gpio_lock;
 extern void nw_gpio_modify_op(unsigned int mask, unsigned int set);
 extern void nw_gpio_modify_io(unsigned int mask, unsigned int in);
 extern unsigned int nw_gpio_read(void);
diff --git a/arch/arm/mach-footbridge/include/mach/io.h b/arch/arm/mach-footbridge/include/mach/io.h
index 32e4cc397c28..15a70396c27d 100644
--- a/arch/arm/mach-footbridge/include/mach/io.h
+++ b/arch/arm/mach-footbridge/include/mach/io.h
@@ -23,8 +23,6 @@
 #define PCIO_SIZE       0x00100000
 #define PCIO_BASE       MMU_IO(0xff000000, 0x7c000000)
 
-#define IO_SPACE_LIMIT 0xffff
-
 /*
  * Translation of various region addresses to virtual addresses
  */
diff --git a/arch/arm/mach-footbridge/netwinder-hw.c b/arch/arm/mach-footbridge/netwinder-hw.c
index 06e514f372d0..0f7aeff486c9 100644
--- a/arch/arm/mach-footbridge/netwinder-hw.c
+++ b/arch/arm/mach-footbridge/netwinder-hw.c
@@ -68,7 +68,7 @@ static inline void wb977_ww(int reg, int val)
 /*
  * This is a lock for accessing ports GP1_IO_BASE and GP2_IO_BASE
  */
-DEFINE_SPINLOCK(nw_gpio_lock);
+DEFINE_RAW_SPINLOCK(nw_gpio_lock);
 EXPORT_SYMBOL(nw_gpio_lock);
 
 static unsigned int current_gpio_op;
@@ -327,9 +327,9 @@ static inline void wb977_init_gpio(void)
         /*
          * Set Group1/Group2 outputs
          */
-        spin_lock_irqsave(&nw_gpio_lock, flags);
+        raw_spin_lock_irqsave(&nw_gpio_lock, flags);
         nw_gpio_modify_op(-1, GPIO_RED_LED | GPIO_FAN);
-        spin_unlock_irqrestore(&nw_gpio_lock, flags);
+        raw_spin_unlock_irqrestore(&nw_gpio_lock, flags);
 }
 
 /*
@@ -390,9 +390,9 @@ static void __init cpld_init(void)
 {
         unsigned long flags;
 
-        spin_lock_irqsave(&nw_gpio_lock, flags);
+        raw_spin_lock_irqsave(&nw_gpio_lock, flags);
         nw_cpld_modify(-1, CPLD_UNMUTE | CPLD_7111_DISABLE);
-        spin_unlock_irqrestore(&nw_gpio_lock, flags);
+        raw_spin_unlock_irqrestore(&nw_gpio_lock, flags);
 }
 
 static unsigned char rwa_unlock[] __initdata =
@@ -616,9 +616,9 @@ static int __init nw_hw_init(void)
                 cpld_init();
                 rwa010_init();
 
-                spin_lock_irqsave(&nw_gpio_lock, flags);
+                raw_spin_lock_irqsave(&nw_gpio_lock, flags);
                 nw_gpio_modify_op(GPIO_RED_LED|GPIO_GREEN_LED, DEFAULT_LEDS);
-                spin_unlock_irqrestore(&nw_gpio_lock, flags);
+                raw_spin_unlock_irqrestore(&nw_gpio_lock, flags);
         }
         return 0;
 }
@@ -631,8 +631,7 @@ __initcall(nw_hw_init);
  * the parameter page.
  */
 static void __init
-fixup_netwinder(struct machine_desc *desc, struct tag *tags,
-                char **cmdline, struct meminfo *mi)
+fixup_netwinder(struct tag *tags, char **cmdline, struct meminfo *mi)
 {
 #ifdef CONFIG_ISAPNP
         extern int isapnp_disable;
diff --git a/arch/arm/mach-footbridge/netwinder-leds.c b/arch/arm/mach-footbridge/netwinder-leds.c
index 00269fe0be8a..e57102e871fc 100644
--- a/arch/arm/mach-footbridge/netwinder-leds.c
+++ b/arch/arm/mach-footbridge/netwinder-leds.c
@@ -31,13 +31,13 @@
 static char led_state;
 static char hw_led_state;
 
-static DEFINE_SPINLOCK(leds_lock);
+static DEFINE_RAW_SPINLOCK(leds_lock);
 
 static void netwinder_leds_event(led_event_t evt)
 {
         unsigned long flags;
 
-        spin_lock_irqsave(&leds_lock, flags);
+        raw_spin_lock_irqsave(&leds_lock, flags);
 
         switch (evt) {
         case led_start:
@@ -117,12 +117,12 @@ static void netwinder_leds_event(led_event_t evt)
                 break;
         }
 
-        spin_unlock_irqrestore(&leds_lock, flags);
+        raw_spin_unlock_irqrestore(&leds_lock, flags);
 
         if  (led_state & LED_STATE_ENABLED) {
-                spin_lock_irqsave(&nw_gpio_lock, flags);
+                raw_spin_lock_irqsave(&nw_gpio_lock, flags);
                 nw_gpio_modify_op(GPIO_RED_LED | GPIO_GREEN_LED, hw_led_state);
-                spin_unlock_irqrestore(&nw_gpio_lock, flags);
+                raw_spin_unlock_irqrestore(&nw_gpio_lock, flags);
         }
 }
 
diff --git a/arch/arm/mach-gemini/Makefile.boot b/arch/arm/mach-gemini/Makefile.boot
index 22a52c228d93..683f52b20e3d 100644
--- a/arch/arm/mach-gemini/Makefile.boot
+++ b/arch/arm/mach-gemini/Makefile.boot
@@ -1,9 +1,9 @@
 ifeq ($(CONFIG_GEMINI_MEM_SWAP),y)
-   zreladdr-y   := 0x00008000
+   zreladdr-y   += 0x00008000
 params_phys-y   := 0x00000100
 initrd_phys-y   := 0x00800000
 else
-   zreladdr-y   := 0x10008000
+   zreladdr-y   += 0x10008000
 params_phys-y   := 0x10000100
 initrd_phys-y   := 0x10800000
 endif
diff --git a/arch/arm/mach-h720x/Makefile.boot b/arch/arm/mach-h720x/Makefile.boot
index 52984017bd91..d875a7094dfe 100644
--- a/arch/arm/mach-h720x/Makefile.boot
+++ b/arch/arm/mach-h720x/Makefile.boot
@@ -1,2 +1,2 @@
-   zreladdr-$(CONFIG_ARCH_H720X)        := 0x40008000
+   zreladdr-$(CONFIG_ARCH_H720X)        += 0x40008000
 
diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot
index ebee18b3884c..dbe61201bcd8 100644
--- a/arch/arm/mach-imx/Makefile.boot
+++ b/arch/arm/mach-imx/Makefile.boot
@@ -1,19 +1,19 @@
-zreladdr-$(CONFIG_ARCH_MX1)     := 0x08008000
+zreladdr-$(CONFIG_ARCH_MX1)     += 0x08008000
 params_phys-$(CONFIG_ARCH_MX1)  := 0x08000100
 initrd_phys-$(CONFIG_ARCH_MX1)  := 0x08800000
 
-zreladdr-$(CONFIG_MACH_MX21)    := 0xC0008000
+zreladdr-$(CONFIG_MACH_MX21)    += 0xC0008000
 params_phys-$(CONFIG_MACH_MX21) := 0xC0000100
 initrd_phys-$(CONFIG_MACH_MX21) := 0xC0800000
 
-zreladdr-$(CONFIG_ARCH_MX25)    := 0x80008000
+zreladdr-$(CONFIG_ARCH_MX25)    += 0x80008000
 params_phys-$(CONFIG_ARCH_MX25) := 0x80000100
 initrd_phys-$(CONFIG_ARCH_MX25) := 0x80800000
 
-zreladdr-$(CONFIG_MACH_MX27)    := 0xA0008000
+zreladdr-$(CONFIG_MACH_MX27)    += 0xA0008000
 params_phys-$(CONFIG_MACH_MX27) := 0xA0000100
 initrd_phys-$(CONFIG_MACH_MX27) := 0xA0800000
 
-zreladdr-$(CONFIG_ARCH_MX3)     := 0x80008000
+zreladdr-$(CONFIG_ARCH_MX3)     += 0x80008000
 params_phys-$(CONFIG_ARCH_MX3)  := 0x80000100
 initrd_phys-$(CONFIG_ARCH_MX3)  := 0x80800000
diff --git a/arch/arm/mach-imx/clock-imx25.c b/arch/arm/mach-imx/clock-imx25.c
index 0fc7ba56d616..e63e23504fe5 100644
--- a/arch/arm/mach-imx/clock-imx25.c
+++ b/arch/arm/mach-imx/clock-imx25.c
@@ -331,6 +331,9 @@ int __init mx25_clocks_init(void)
         __raw_writel(__raw_readl(CRM_BASE+0x64) | (1 << 7) | (1 << 0),
                         CRM_BASE + 0x64);
 
+        /* Clock source for gpt is ahb_div */
+        __raw_writel(__raw_readl(CRM_BASE+0x64) & ~(1 << 5), CRM_BASE + 0x64);
+
         mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);
 
         return 0;
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c
index 87887ac5806b..f851fe903687 100644
--- a/arch/arm/mach-imx/mach-cpuimx27.c
+++ b/arch/arm/mach-imx/mach-cpuimx27.c
@@ -310,7 +310,7 @@ static struct sys_timer eukrea_cpuimx27_timer = {
         .init = eukrea_cpuimx27_timer_init,
 };
 
-MACHINE_START(CPUIMX27, "EUKREA CPUIMX27")
+MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27")
         .boot_params = MX27_PHYS_OFFSET + 0x100,
         .map_io = mx27_map_io,
         .init_early = imx27_init_early,
diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c
index f39a478ba1a6..4bd083ba9af2 100644
--- a/arch/arm/mach-imx/mach-cpuimx35.c
+++ b/arch/arm/mach-imx/mach-cpuimx35.c
@@ -192,7 +192,7 @@ struct sys_timer eukrea_cpuimx35_timer = {
         .init   = eukrea_cpuimx35_timer_init,
 };
 
-MACHINE_START(EUKREA_CPUIMX35, "Eukrea CPUIMX35")
+MACHINE_START(EUKREA_CPUIMX35SD, "Eukrea CPUIMX35")
         /* Maintainer: Eukrea Electromatique */
         .boot_params = MX3x_PHYS_OFFSET + 0x100,
         .map_io = mx35_map_io,
diff --git a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
index da36da52969d..2442d5da883d 100644
--- a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
+++ b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
@@ -161,7 +161,7 @@ static struct sys_timer eukrea_cpuimx25_timer = {
         .init   = eukrea_cpuimx25_timer_init,
 };
 
-MACHINE_START(EUKREA_CPUIMX25, "Eukrea CPUIMX25")
+MACHINE_START(EUKREA_CPUIMX25SD, "Eukrea CPUIMX25")
         /* Maintainer: Eukrea Electromatique */
         .boot_params = MX25_PHYS_OFFSET + 0x100,
         .map_io = mx25_map_io,
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index 6707de0ab716..6778f8193bc6 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -30,6 +30,7 @@
 #include <linux/input.h>
 #include <linux/gpio.h>
 #include <linux/delay.h>
+#include <sound/tlv320aic32x4.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
@@ -196,6 +197,17 @@ static struct pca953x_platform_data visstrim_m10_pca9555_pdata = {
         .invert = 0,
 };
 
+static struct aic32x4_pdata visstrim_m10_aic32x4_pdata = {
+        .power_cfg = AIC32X4_PWR_MICBIAS_2075_LDOIN |
+                     AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE |
+                     AIC32X4_PWR_AIC32X4_LDO_ENABLE |
+                     AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36 |
+                     AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED,
+        .micpga_routing = AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K |
+                         AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K,
+        .swapdacs = false,
+};
+
 static struct i2c_board_info visstrim_m10_i2c_devices[] = {
         {
                 I2C_BOARD_INFO("pca9555", 0x20),
@@ -203,6 +215,7 @@ static struct i2c_board_info visstrim_m10_i2c_devices[] = {
         },
         {
                 I2C_BOARD_INFO("tlv320aic32x4", 0x18),
+                .platform_data = &visstrim_m10_aic32x4_pdata,
         }
 };
 
diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c
index 0ce49478a479..29ca8907a780 100644
--- a/arch/arm/mach-imx/mach-mx31ads.c
+++ b/arch/arm/mach-imx/mach-mx31ads.c
@@ -468,7 +468,7 @@ static struct i2c_board_info __initdata mx31ads_i2c1_devices[] = {
 #endif
 };
 
-static void mxc_init_i2c(void)
+static void __init mxc_init_i2c(void)
 {
         i2c_register_board_info(1, mx31ads_i2c1_devices,
                                 ARRAY_SIZE(mx31ads_i2c1_devices));
@@ -486,7 +486,7 @@ static unsigned int ssi_pins[] = {
         MX31_PIN_STXD5__STXD5,
 };
 
-static void mxc_init_audio(void)
+static void __init mxc_init_audio(void)
 {
         imx31_add_imx_ssi(0, NULL);
         mxc_iomux_setup_multiple_pins(ssi_pins, ARRAY_SIZE(ssi_pins), "ssi");
diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c
index 750368ddf0f9..126913ad106a 100644
--- a/arch/arm/mach-imx/mach-mx31lilly.c
+++ b/arch/arm/mach-imx/mach-mx31lilly.c
@@ -192,7 +192,7 @@ static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
         .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
 };
 
-static void lilly1131_usb_init(void)
+static void __init lilly1131_usb_init(void)
 {
         imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
 
diff --git a/arch/arm/mach-integrator/Makefile.boot b/arch/arm/mach-integrator/Makefile.boot
index c7e75acfe6c9..ff0a4b5b0a82 100644
--- a/arch/arm/mach-integrator/Makefile.boot
+++ b/arch/arm/mach-integrator/Makefile.boot
@@ -1,4 +1,4 @@
-   zreladdr-y   := 0x00008000
+   zreladdr-y   += 0x00008000
 params_phys-y   := 0x00000100
 initrd_phys-y   := 0x00800000
 
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 77315b995681..4b38e13667ac 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -126,6 +126,10 @@ static struct clk_lookup lookups[] = {
         {       /* Bus clock */
                 .con_id         = "apb_pclk",
                 .clk            = &dummy_apb_pclk,
+        }, {
+                /* Integrator/AP timer frequency */
+                .dev_id         = "ap_timer",
+                .clk            = &clk24mhz,
         }, {    /* UART0 */
                 .dev_id         = "mb:16",
                 .clk            = &uartclk,
@@ -205,7 +209,7 @@ static struct amba_pl010_data integrator_uart_data = {
 
 #define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_CTRL)
 
-static DEFINE_SPINLOCK(cm_lock);
+static DEFINE_RAW_SPINLOCK(cm_lock);
 
 /**
  * cm_control - update the CM_CTRL register.
@@ -217,10 +221,10 @@ void cm_control(u32 mask, u32 set)
         unsigned long flags;
         u32 val;
 
-        spin_lock_irqsave(&cm_lock, flags);
+        raw_spin_lock_irqsave(&cm_lock, flags);
         val = readl(CM_CTRL) & ~mask;
         writel(val | set, CM_CTRL);
-        spin_unlock_irqrestore(&cm_lock, flags);
+        raw_spin_unlock_irqrestore(&cm_lock, flags);
 }
 
 EXPORT_SYMBOL(cm_control);
diff --git a/arch/arm/mach-integrator/include/mach/io.h b/arch/arm/mach-integrator/include/mach/io.h
index f21bb5493dd9..37beed3fa3ed 100644
--- a/arch/arm/mach-integrator/include/mach/io.h
+++ b/arch/arm/mach-integrator/include/mach/io.h
@@ -20,8 +20,6 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-#define IO_SPACE_LIMIT 0xffff
-
 /*
  * WARNING: this has to mirror definitions in platform.h
  */
diff --git a/arch/arm/mach-integrator/include/mach/platform.h b/arch/arm/mach-integrator/include/mach/platform.h
index 5e6ea5cfea6e..ec467baade09 100644
--- a/arch/arm/mach-integrator/include/mach/platform.h
+++ b/arch/arm/mach-integrator/include/mach/platform.h
@@ -13,9 +13,6 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
-/* DO NOT EDIT!! - this file automatically generated
- *                 from .s file by awk -f s2h.awk
- */
 /**************************************************************************
  * * Copyright © ARM Limited 1998.  All rights reserved.
  * ***********************************************************************/
@@ -399,15 +396,6 @@
 #define INTEGRATOR_TIMER1_BASE          (INTEGRATOR_CT_BASE + 0x100)
 #define INTEGRATOR_TIMER2_BASE          (INTEGRATOR_CT_BASE + 0x200)
 
-#define TICKS_PER_uSEC                  24
-
-/*
- *  These are useconds NOT ticks.
- *
- */
-#define mSEC_1                          1000
-#define mSEC_10                         (mSEC_1 * 10)
-
 #define INTEGRATOR_CSR_BASE             0x10000000
 #define INTEGRATOR_CSR_SIZE             0x10000000
 
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 2fbbdd5eac35..f2119908a0b3 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -32,6 +32,8 @@
 #include <linux/interrupt.h>
 #include <linux/io.h>
 #include <linux/mtd/physmap.h>
+#include <linux/clk.h>
+#include <video/vga.h>
 
 #include <mach/hardware.h>
 #include <mach/platform.h>
@@ -154,6 +156,7 @@ static struct map_desc ap_io_desc[] __initdata = {
 static void __init ap_map_io(void)
 {
         iotable_init(ap_io_desc, ARRAY_SIZE(ap_io_desc));
+        vga_base = PCI_MEMORY_VADDR;
 }
 
 #define INTEGRATOR_SC_VALID_INT 0x003fffff
@@ -320,35 +323,24 @@ static void __init ap_init(void)
 #define TIMER1_VA_BASE IO_ADDRESS(INTEGRATOR_TIMER1_BASE)
 #define TIMER2_VA_BASE IO_ADDRESS(INTEGRATOR_TIMER2_BASE)
 
-/*
- * How long is the timer interval?
- */
-#define TIMER_INTERVAL  (TICKS_PER_uSEC * mSEC_10)
-#if TIMER_INTERVAL >= 0x100000
-#define TICKS2USECS(x)  (256 * (x) / TICKS_PER_uSEC)
-#elif TIMER_INTERVAL >= 0x10000
-#define TICKS2USECS(x)  (16 * (x) / TICKS_PER_uSEC)
-#else
-#define TICKS2USECS(x)  ((x) / TICKS_PER_uSEC)
-#endif
-
 static unsigned long timer_reload;
 
-static void integrator_clocksource_init(u32 khz)
+static void integrator_clocksource_init(unsigned long inrate)
 {
         void __iomem *base = (void __iomem *)TIMER2_VA_BASE;
-        u32 ctrl = TIMER_CTRL_ENABLE;
+        u32 ctrl = TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC;
+        unsigned long rate = inrate;
 
-        if (khz >= 1500) {
-                khz /= 16;
-                ctrl = TIMER_CTRL_DIV16;
+        if (rate >= 1500000) {
+                rate /= 16;
+                ctrl |= TIMER_CTRL_DIV16;
         }
 
-        writel(ctrl, base + TIMER_CTRL);
         writel(0xffff, base + TIMER_LOAD);
+        writel(ctrl, base + TIMER_CTRL);
 
         clocksource_mmio_init(base + TIMER_VALUE, "timer2",
-                khz * 1000, 200, 16, clocksource_mmio_readl_down);
+                        rate, 200, 16, clocksource_mmio_readl_down);
 }
 
 static void __iomem * const clkevt_base = (void __iomem *)TIMER1_VA_BASE;
@@ -372,15 +364,29 @@ static void clkevt_set_mode(enum clock_event_mode mode, struct clock_event_devic
 {
         u32 ctrl = readl(clkevt_base + TIMER_CTRL) & ~TIMER_CTRL_ENABLE;
 
-        BUG_ON(mode == CLOCK_EVT_MODE_ONESHOT);
+        /* Disable timer */
+        writel(ctrl, clkevt_base + TIMER_CTRL);
 
-        if (mode == CLOCK_EVT_MODE_PERIODIC) {
-                writel(ctrl, clkevt_base + TIMER_CTRL);
+        switch (mode) {
+        case CLOCK_EVT_MODE_PERIODIC:
+                /* Enable the timer and start the periodic tick */
                 writel(timer_reload, clkevt_base + TIMER_LOAD);
                 ctrl |= TIMER_CTRL_PERIODIC | TIMER_CTRL_ENABLE;
+                writel(ctrl, clkevt_base + TIMER_CTRL);
+                break;
+        case CLOCK_EVT_MODE_ONESHOT:
+                /* Leave the timer disabled, .set_next_event will enable it */
+                ctrl &= ~TIMER_CTRL_PERIODIC;
+                writel(ctrl, clkevt_base + TIMER_CTRL);
+                break;
+        case CLOCK_EVT_MODE_UNUSED:
+        case CLOCK_EVT_MODE_SHUTDOWN:
+        case CLOCK_EVT_MODE_RESUME:
+        default:
+                /* Just leave in disabled state */
+                break;
         }
 
-        writel(ctrl, clkevt_base + TIMER_CTRL);
 }
 
 static int clkevt_set_next_event(unsigned long next, struct clock_event_device *evt)
@@ -396,12 +402,10 @@ static int clkevt_set_next_event(unsigned long next, struct clock_event_device *
 
 static struct clock_event_device integrator_clockevent = {
         .name           = "timer1",
-        .shift          = 34,
-        .features       = CLOCK_EVT_FEAT_PERIODIC,
+        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
         .set_mode       = clkevt_set_mode,
         .set_next_event = clkevt_set_next_event,
         .rating         = 300,
-        .cpumask        = cpu_all_mask,
 };
 
 static struct irqaction integrator_timer_irq = {
@@ -411,29 +415,27 @@ static struct irqaction integrator_timer_irq = {
         .dev_id         = &integrator_clockevent,
 };
 
-static void integrator_clockevent_init(u32 khz)
+static void integrator_clockevent_init(unsigned long inrate)
 {
-        struct clock_event_device *evt = &integrator_clockevent;
+        unsigned long rate = inrate;
         unsigned int ctrl = 0;
 
-        if (khz * 1000 > 0x100000 * HZ) {
-                khz /= 256;
+        /* Calculate and program a divisor */
+        if (rate > 0x100000 * HZ) {
+                rate /= 256;
                 ctrl |= TIMER_CTRL_DIV256;
-        } else if (khz * 1000 > 0x10000 * HZ) {
-                khz /= 16;
+        } else if (rate > 0x10000 * HZ) {
+                rate /= 16;
                 ctrl |= TIMER_CTRL_DIV16;
         }
-
-        timer_reload = khz * 1000 / HZ;
+        timer_reload = rate / HZ;
         writel(ctrl, clkevt_base + TIMER_CTRL);
 
-        evt->irq = IRQ_TIMERINT1;
-        evt->mult = div_sc(khz, NSEC_PER_MSEC, evt->shift);
-        evt->max_delta_ns = clockevent_delta2ns(0xffff, evt);
-        evt->min_delta_ns = clockevent_delta2ns(0xf, evt);
-
         setup_irq(IRQ_TIMERINT1, &integrator_timer_irq);
-        clockevents_register_device(evt);
+        clockevents_config_and_register(&integrator_clockevent,
+                                        rate,
+                                        1,
+                                        0xffffU);
 }
 
 /*
@@ -441,14 +443,20 @@ static void integrator_clockevent_init(u32 khz)
  */
 static void __init ap_init_timer(void)
 {
-        u32 khz = TICKS_PER_uSEC * 1000;
+        struct clk *clk;
+        unsigned long rate;
+
+        clk = clk_get_sys("ap_timer", NULL);
+        BUG_ON(IS_ERR(clk));
+        clk_enable(clk);
+        rate = clk_get_rate(clk);
 
         writel(0, TIMER0_VA_BASE + TIMER_CTRL);
         writel(0, TIMER1_VA_BASE + TIMER_CTRL);
         writel(0, TIMER2_VA_BASE + TIMER_CTRL);
 
-        integrator_clocksource_init(khz);
-        integrator_clockevent_init(khz);
+        integrator_clocksource_init(rate);
+        integrator_clockevent_init(rate);
 }
 
 static struct sys_timer ap_timer = {
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index dd56bfb351e3..b4d8f8b8a085 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -27,7 +27,6 @@
 #include <linux/spinlock.h>
 #include <linux/init.h>
 #include <linux/io.h>
-#include <video/vga.h>
 
 #include <mach/hardware.h>
 #include <mach/platform.h>
@@ -164,7 +163,7 @@
  *       7:2    register number
  *  
  */
-static DEFINE_SPINLOCK(v3_lock);
+static DEFINE_RAW_SPINLOCK(v3_lock);
 
 #define PCI_BUS_NONMEM_START    0x00000000
 #define PCI_BUS_NONMEM_SIZE     SZ_256M
@@ -285,7 +284,7 @@ static int v3_read_config(struct pci_bus *bus, unsigned int devfn, int where,
         unsigned long flags;
         u32 v;
 
-        spin_lock_irqsave(&v3_lock, flags);
+        raw_spin_lock_irqsave(&v3_lock, flags);
         addr = v3_open_config_window(bus, devfn, where);
 
         switch (size) {
@@ -303,7 +302,7 @@ static int v3_read_config(struct pci_bus *bus, unsigned int devfn, int where,
         }
 
         v3_close_config_window();
-        spin_unlock_irqrestore(&v3_lock, flags);
+        raw_spin_unlock_irqrestore(&v3_lock, flags);
 
         *val = v;
         return PCIBIOS_SUCCESSFUL;
@@ -315,7 +314,7 @@ static int v3_write_config(struct pci_bus *bus, unsigned int devfn, int where,
         unsigned long addr;
         unsigned long flags;
 
-        spin_lock_irqsave(&v3_lock, flags);
+        raw_spin_lock_irqsave(&v3_lock, flags);
         addr = v3_open_config_window(bus, devfn, where);
 
         switch (size) {
@@ -336,7 +335,7 @@ static int v3_write_config(struct pci_bus *bus, unsigned int devfn, int where,
         }
 
         v3_close_config_window();
-        spin_unlock_irqrestore(&v3_lock, flags);
+        raw_spin_unlock_irqrestore(&v3_lock, flags);
 
         return PCIBIOS_SUCCESSFUL;
 }
@@ -505,7 +504,6 @@ void __init pci_v3_preinit(void)
 
         pcibios_min_io = 0x6000;
         pcibios_min_mem = 0x00100000;
-        vga_base = PCI_MEMORY_VADDR;
 
         /*
          * Hook in our fault handler for PCI errors
@@ -515,7 +513,7 @@ void __init pci_v3_preinit(void)
         hook_fault_code(8, v3_pci_fault, SIGBUS, 0, "external abort on non-linefetch");
         hook_fault_code(10, v3_pci_fault, SIGBUS, 0, "external abort on non-linefetch");
 
-        spin_lock_irqsave(&v3_lock, flags);
+        raw_spin_lock_irqsave(&v3_lock, flags);
 
         /*
          * Unlock V3 registers, but only if they were previously locked.
@@ -588,7 +586,7 @@ void __init pci_v3_preinit(void)
                 printk(KERN_ERR "PCI: unable to grab PCI error "
                        "interrupt: %d\n", ret);
 
-        spin_unlock_irqrestore(&v3_lock, flags);
+        raw_spin_unlock_irqrestore(&v3_lock, flags);
 }
 
 void __init pci_v3_postinit(void)
diff --git a/arch/arm/mach-iop13xx/Makefile.boot b/arch/arm/mach-iop13xx/Makefile.boot
index 0b0e19fdfe6c..3a8c38c3189c 100644
--- a/arch/arm/mach-iop13xx/Makefile.boot
+++ b/arch/arm/mach-iop13xx/Makefile.boot
@@ -1,3 +1,3 @@
-   zreladdr-y   := 0x00008000
+   zreladdr-y   += 0x00008000
 params_phys-y   := 0x00000100
 initrd_phys-y   := 0x00800000
diff --git a/arch/arm/mach-iop32x/Makefile.boot b/arch/arm/mach-iop32x/Makefile.boot
index 47000dccd61f..0a833b11e38c 100644
--- a/arch/arm/mach-iop32x/Makefile.boot
+++ b/arch/arm/mach-iop32x/Makefile.boot
@@ -1,3 +1,3 @@
-   zreladdr-y   := 0xa0008000
+   zreladdr-y   += 0xa0008000
 params_phys-y   := 0xa0000100
 initrd_phys-y   := 0xa0800000
diff --git a/arch/arm/mach-iop33x/Makefile.boot b/arch/arm/mach-iop33x/Makefile.boot
index 67039c3e0c48..760a0efe7580 100644
--- a/arch/arm/mach-iop33x/Makefile.boot
+++ b/arch/arm/mach-iop33x/Makefile.boot
@@ -1,3 +1,3 @@
-   zreladdr-y   := 0x00008000
+   zreladdr-y   += 0x00008000
 params_phys-y   := 0x00000100
 initrd_phys-y   := 0x00800000
diff --git a/arch/arm/mach-ixp2000/Makefile.boot b/arch/arm/mach-ixp2000/Makefile.boot
index d84c5807a43d..9c7af91d93da 100644
--- a/arch/arm/mach-ixp2000/Makefile.boot
+++ b/arch/arm/mach-ixp2000/Makefile.boot
@@ -1,3 +1,3 @@
-   zreladdr-y   := 0x00008000
+   zreladdr-y   += 0x00008000
 params_phys-y   := 0x00000100
 
diff --git a/arch/arm/mach-ixp23xx/Makefile.boot b/arch/arm/mach-ixp23xx/Makefile.boot
index d5561ad15bad..44fb4a717c3f 100644
--- a/arch/arm/mach-ixp23xx/Makefile.boot
+++ b/arch/arm/mach-ixp23xx/Makefile.boot
@@ -1,2 +1,2 @@
-   zreladdr-y   := 0x00008000
+   zreladdr-y   += 0x00008000
 params_phys-y   := 0x00000100
diff --git a/arch/arm/mach-ixp4xx/Makefile.boot b/arch/arm/mach-ixp4xx/Makefile.boot
index d84c5807a43d..9c7af91d93da 100644
--- a/arch/arm/mach-ixp4xx/Makefile.boot
+++ b/arch/arm/mach-ixp4xx/Makefile.boot
@@ -1,3 +1,3 @@
-   zreladdr-y   := 0x00008000
+   zreladdr-y   += 0x00008000
 params_phys-y   := 0x00000100
 
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index 2131832ee6ba..f72a3a893c47 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -54,7 +54,7 @@ unsigned long ixp4xx_pci_reg_base = 0;
  * these transactions are atomic or we will end up
  * with corrupt data on the bus or in a driver.
  */
-static DEFINE_SPINLOCK(ixp4xx_pci_lock);
+static DEFINE_RAW_SPINLOCK(ixp4xx_pci_lock);
 
 /*
  * Read from PCI config space
@@ -62,10 +62,10 @@ static DEFINE_SPINLOCK(ixp4xx_pci_lock);
 static void crp_read(u32 ad_cbe, u32 *data)
 {
         unsigned long flags;
-        spin_lock_irqsave(&ixp4xx_pci_lock, flags);
+        raw_spin_lock_irqsave(&ixp4xx_pci_lock, flags);
         *PCI_CRP_AD_CBE = ad_cbe;
         *data = *PCI_CRP_RDATA;
-        spin_unlock_irqrestore(&ixp4xx_pci_lock, flags);
+        raw_spin_unlock_irqrestore(&ixp4xx_pci_lock, flags);
 }
 
 /*
@@ -74,10 +74,10 @@ static void crp_read(u32 ad_cbe, u32 *data)
 static void crp_write(u32 ad_cbe, u32 data)
 { 
         unsigned long flags;
-        spin_lock_irqsave(&ixp4xx_pci_lock, flags);
+        raw_spin_lock_irqsave(&ixp4xx_pci_lock, flags);
         *PCI_CRP_AD_CBE = CRP_AD_CBE_WRITE | ad_cbe;
         *PCI_CRP_WDATA = data;
-        spin_unlock_irqrestore(&ixp4xx_pci_lock, flags);
+        raw_spin_unlock_irqrestore(&ixp4xx_pci_lock, flags);
 }
 
 static inline int check_master_abort(void)
@@ -101,7 +101,7 @@ int ixp4xx_pci_read_errata(u32 addr, u32 cmd, u32* data)
         int retval = 0;
         int i;
 
-        spin_lock_irqsave(&ixp4xx_pci_lock, flags);
+        raw_spin_lock_irqsave(&ixp4xx_pci_lock, flags);
 
         *PCI_NP_AD = addr;
 
@@ -118,7 +118,7 @@ int ixp4xx_pci_read_errata(u32 addr, u32 cmd, u32* data)
         if(check_master_abort())
                 retval = 1;
 
-        spin_unlock_irqrestore(&ixp4xx_pci_lock, flags);
+        raw_spin_unlock_irqrestore(&ixp4xx_pci_lock, flags);
         return retval;
 }
 
@@ -127,7 +127,7 @@ int ixp4xx_pci_read_no_errata(u32 addr, u32 cmd, u32* data)
         unsigned long flags;
         int retval = 0;
 
-        spin_lock_irqsave(&ixp4xx_pci_lock, flags);
+        raw_spin_lock_irqsave(&ixp4xx_pci_lock, flags);
 
         *PCI_NP_AD = addr;
 
@@ -140,7 +140,7 @@ int ixp4xx_pci_read_no_errata(u32 addr, u32 cmd, u32* data)
         if(check_master_abort())
                 retval = 1;
 
-        spin_unlock_irqrestore(&ixp4xx_pci_lock, flags);
+        raw_spin_unlock_irqrestore(&ixp4xx_pci_lock, flags);
         return retval;
 }
 
@@ -149,7 +149,7 @@ int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data)
         unsigned long flags;
         int retval = 0;
 
-        spin_lock_irqsave(&ixp4xx_pci_lock, flags);
+        raw_spin_lock_irqsave(&ixp4xx_pci_lock, flags);
 
         *PCI_NP_AD = addr;
 
@@ -162,7 +162,7 @@ int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data)
         if(check_master_abort())
                 retval = 1;
 
-        spin_unlock_irqrestore(&ixp4xx_pci_lock, flags);
+        raw_spin_unlock_irqrestore(&ixp4xx_pci_lock, flags);
         return retval;
 }
 
@@ -397,7 +397,8 @@ void __init ixp4xx_pci_preinit(void)
                 local_write_config(PCI_BASE_ADDRESS_0, 4, PHYS_OFFSET);
                 local_write_config(PCI_BASE_ADDRESS_1, 4, PHYS_OFFSET + SZ_16M);
                 local_write_config(PCI_BASE_ADDRESS_2, 4, PHYS_OFFSET + SZ_32M);
-                local_write_config(PCI_BASE_ADDRESS_3, 4, PHYS_OFFSET + SZ_48M);
+                local_write_config(PCI_BASE_ADDRESS_3, 4,
+                                        PHYS_OFFSET + SZ_32M + SZ_16M);
 
                 /*
                  * Enable CSR window at 64 MiB to allow PCI masters
diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h
index 57b5410c31f4..ffb9d6afb89f 100644
--- a/arch/arm/mach-ixp4xx/include/mach/io.h
+++ b/arch/arm/mach-ixp4xx/include/mach/io.h
@@ -17,8 +17,6 @@
 
 #include <mach/hardware.h>
 
-#define IO_SPACE_LIMIT 0x0000ffff
-
 extern int (*ixp4xx_pci_read)(u32 addr, u32 cmd, u32* data);
 extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
 
diff --git a/arch/arm/mach-kirkwood/Makefile.boot b/arch/arm/mach-kirkwood/Makefile.boot
index 67039c3e0c48..760a0efe7580 100644
--- a/arch/arm/mach-kirkwood/Makefile.boot
+++ b/arch/arm/mach-kirkwood/Makefile.boot
@@ -1,3 +1,3 @@
-   zreladdr-y   := 0x00008000
+   zreladdr-y   += 0x00008000
 params_phys-y   := 0x00000100
 initrd_phys-y   := 0x00800000
diff --git a/arch/arm/mach-ks8695/Makefile.boot b/arch/arm/mach-ks8695/Makefile.boot
index 48eb2cb3ac77..c9b0bebcf237 100644
--- a/arch/arm/mach-ks8695/Makefile.boot
+++ b/arch/arm/mach-ks8695/Makefile.boot
@@ -3,6 +3,6 @@
 #   PARAMS_PHYS must be within 4MB of ZRELADDR
 #   INITRD_PHYS must be in RAM
 
-   zreladdr-y   := 0x00008000
+   zreladdr-y   += 0x00008000
 params_phys-y   := 0x00000100
 initrd_phys-y   := 0x00800000
diff --git a/arch/arm/mach-lpc32xx/Makefile.boot b/arch/arm/mach-lpc32xx/Makefile.boot
index b796b41ebf8f..2cfe0ee635c5 100644
--- a/arch/arm/mach-lpc32xx/Makefile.boot
+++ b/arch/arm/mach-lpc32xx/Makefile.boot
@@ -1,4 +1,4 @@
-   zreladdr-y   := 0x80008000
+   zreladdr-y   += 0x80008000
 params_phys-y   := 0x80000100
 initrd_phys-y   := 0x82000000
 
diff --git a/arch/arm/mach-mmp/Makefile.boot b/arch/arm/mach-mmp/Makefile.boot
index 574a4aa8321a..5edf03e2beed 100644
--- a/arch/arm/mach-mmp/Makefile.boot
+++ b/arch/arm/mach-mmp/Makefile.boot
@@ -1 +1 @@
-   zreladdr-y   := 0x00008000
+   zreladdr-y   += 0x00008000
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index 833c3a2784aa..06b5ad774604 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -160,7 +160,7 @@ static struct mtd_partition aspenite_nand_partitions[] = {
         }, {
                 .name           = "filesystem",
                 .offset         = MTDPART_OFS_APPEND,
-                .size           = SZ_48M,
+                .size           = SZ_32M + SZ_16M,
                 .mask_flags     = 0,
         }
 };
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index ef738deb20b5..32776f3739f1 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -16,16 +16,18 @@
 
 #include <mach/pxa168.h>
 #include <mach/mfp-pxa168.h>
-#include <mach/mfp-gplugd.h>
 
 #include "common.h"
 
 static unsigned long gplugd_pin_config[] __initdata = {
         /* UART3 */
-        GPIO8_UART3_SOUT,
-        GPIO9_UART3_SIN,
-        GPI1O_UART3_CTS,
-        GPI11_UART3_RTS,
+        GPIO8_UART3_TXD,
+        GPIO9_UART3_RXD,
+        GPIO1O_UART3_CTS,
+        GPIO11_UART3_RTS,
+
+        /* USB OTG PEN */
+        GPIO18_GPIO,
 
         /* MMC2 */
         GPIO28_MMC2_CMD,
@@ -109,6 +111,12 @@ static unsigned long gplugd_pin_config[] __initdata = {
         GPIO105_CI2C_SDA,
         GPIO106_CI2C_SCL,
 
+        /* SPI NOR Flash on SSP2 */
+        GPIO107_SSP2_RXD,
+        GPIO108_SSP2_TXD,
+        GPIO110_GPIO,     /* SPI_CSn */
+        GPIO111_SSP2_CLK,
+
         /* Select JTAG */
         GPIO109_GPIO,
 
@@ -154,7 +162,7 @@ static void __init select_disp_freq(void)
                                 "frequency\n");
         } else {
                 gpio_direction_output(35, 1);
-                gpio_free(104);
+                gpio_free(35);
         }
 
         if (unlikely(gpio_request(85, "DISP_FREQ_SEL_2"))) {
@@ -162,7 +170,7 @@ static void __init select_disp_freq(void)
                                 "frequency\n");
         } else {
                 gpio_direction_output(85, 0);
-                gpio_free(104);
+                gpio_free(85);
         }
 }
 
diff --git a/arch/arm/mach-mmp/include/mach/mfp-gplugd.h b/arch/arm/mach-mmp/include/mach/mfp-gplugd.h
deleted file mode 100644
index b8cf38d85600..000000000000
--- a/arch/arm/mach-mmp/include/mach/mfp-gplugd.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * linux/arch/arm/mach-mmp/include/mach/mfp-gplugd.h
- *
- *   MFP definitions used in gplugD
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __MACH_MFP_GPLUGD_H
-#define __MACH_MFP_GPLUGD_H
-
-#include <plat/mfp.h>
-#include <mach/mfp.h>
-
-/* UART3 */
-#define GPIO8_UART3_SOUT       MFP_CFG(GPIO8, AF2)
-#define GPIO9_UART3_SIN        MFP_CFG(GPIO9, AF2)
-#define GPI1O_UART3_CTS        MFP_CFG(GPIO10, AF2)
-#define GPI11_UART3_RTS        MFP_CFG(GPIO11, AF2)
-
-/* MMC2 */
-#define GPIO28_MMC2_CMD         MFP_CFG_DRV(GPIO28, AF6, FAST)
-#define GPIO29_MMC2_CLK         MFP_CFG_DRV(GPIO29, AF6, FAST)
-#define GPIO30_MMC2_DAT0        MFP_CFG_DRV(GPIO30, AF6, FAST)
-#define GPIO31_MMC2_DAT1        MFP_CFG_DRV(GPIO31, AF6, FAST)
-#define GPIO32_MMC2_DAT2        MFP_CFG_DRV(GPIO32, AF6, FAST)
-#define GPIO33_MMC2_DAT3        MFP_CFG_DRV(GPIO33, AF6, FAST)
-
-/* I2S */
-#undef GPIO114_I2S_FRM
-#undef GPIO115_I2S_BCLK
-
-#define GPIO114_I2S_FRM         MFP_CFG_DRV(GPIO114, AF1, FAST)
-#define GPIO115_I2S_BCLK        MFP_CFG_DRV(GPIO115, AF1, FAST)
-#define GPIO116_I2S_TXD         MFP_CFG_DRV(GPIO116, AF1, FAST)
-
-/* MMC4 */
-#define GPIO125_MMC4_DAT3       MFP_CFG_DRV(GPIO125, AF7, FAST)
-#define GPIO126_MMC4_DAT2       MFP_CFG_DRV(GPIO126, AF7, FAST)
-#define GPIO127_MMC4_DAT1       MFP_CFG_DRV(GPIO127, AF7, FAST)
-#define GPIO0_2_MMC4_DAT0       MFP_CFG_DRV(GPIO0_2, AF7, FAST)
-#define GPIO1_2_MMC4_CMD        MFP_CFG_DRV(GPIO1_2, AF7, FAST)
-#define GPIO2_2_MMC4_CLK        MFP_CFG_DRV(GPIO2_2, AF7, FAST)
-
-/* OTG GPIO */
-#define GPIO_USB_OTG_PEN        18
-#define GPIO_USB_OIDIR          20
-
-/* Other GPIOs are 35, 84, 85 */
-#endif /* __MACH_MFP_GPLUGD_H */
diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
index 8c782328b21c..92aaa3c19d61 100644
--- a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
@@ -203,6 +203,10 @@
 #define GPIO33_CF_nCD2          MFP_CFG(GPIO33, AF3)
 
 /* UART */
+#define GPIO8_UART3_TXD         MFP_CFG(GPIO8, AF2)
+#define GPIO9_UART3_RXD         MFP_CFG(GPIO9, AF2)
+#define GPIO1O_UART3_CTS        MFP_CFG(GPIO10, AF2)
+#define GPIO11_UART3_RTS        MFP_CFG(GPIO11, AF2)
 #define GPIO88_UART2_TXD        MFP_CFG(GPIO88, AF2)
 #define GPIO89_UART2_RXD        MFP_CFG(GPIO89, AF2)
 #define GPIO107_UART1_TXD       MFP_CFG_DRV(GPIO107, AF1, FAST)
@@ -232,6 +236,22 @@
 #define GPIO53_MMC1_CD          MFP_CFG(GPIO53, AF1)
 #define GPIO46_MMC1_WP          MFP_CFG(GPIO46, AF1)
 
+/* MMC2 */
+#define GPIO28_MMC2_CMD         MFP_CFG_DRV(GPIO28, AF6, FAST)
+#define GPIO29_MMC2_CLK         MFP_CFG_DRV(GPIO29, AF6, FAST)
+#define GPIO30_MMC2_DAT0        MFP_CFG_DRV(GPIO30, AF6, FAST)
+#define GPIO31_MMC2_DAT1        MFP_CFG_DRV(GPIO31, AF6, FAST)
+#define GPIO32_MMC2_DAT2        MFP_CFG_DRV(GPIO32, AF6, FAST)
+#define GPIO33_MMC2_DAT3        MFP_CFG_DRV(GPIO33, AF6, FAST)
+
+/* MMC4 */
+#define GPIO125_MMC4_DAT3       MFP_CFG_DRV(GPIO125, AF7, FAST)
+#define GPIO126_MMC4_DAT2       MFP_CFG_DRV(GPIO126, AF7, FAST)
+#define GPIO127_MMC4_DAT1       MFP_CFG_DRV(GPIO127, AF7, FAST)
+#define GPIO0_2_MMC4_DAT0       MFP_CFG_DRV(GPIO0_2, AF7, FAST)
+#define GPIO1_2_MMC4_CMD        MFP_CFG_DRV(GPIO1_2, AF7, FAST)
+#define GPIO2_2_MMC4_CLK        MFP_CFG_DRV(GPIO2_2, AF7, FAST)
+
 /* LCD */
 #define GPIO84_LCD_CS           MFP_CFG(GPIO84, AF1)
 #define GPIO60_LCD_DD0          MFP_CFG(GPIO60, AF1)
@@ -269,11 +289,12 @@
 #define GPIO106_CI2C_SCL        MFP_CFG(GPIO106, AF1)
 
 /* I2S */
-#define GPIO113_I2S_MCLK        MFP_CFG(GPIO113,AF6)
-#define GPIO114_I2S_FRM         MFP_CFG(GPIO114,AF1)
-#define GPIO115_I2S_BCLK        MFP_CFG(GPIO115,AF1)
-#define GPIO116_I2S_RXD         MFP_CFG(GPIO116,AF2)
-#define GPIO117_I2S_TXD         MFP_CFG(GPIO117,AF2)
+#define GPIO113_I2S_MCLK        MFP_CFG(GPIO113, AF6)
+#define GPIO114_I2S_FRM         MFP_CFG(GPIO114, AF1)
+#define GPIO115_I2S_BCLK        MFP_CFG(GPIO115, AF1)
+#define GPIO116_I2S_RXD         MFP_CFG(GPIO116, AF2)
+#define GPIO116_I2S_TXD         MFP_CFG(GPIO116, AF1)
+#define GPIO117_I2S_TXD         MFP_CFG(GPIO117, AF2)
 
 /* PWM */
 #define GPIO96_PWM3_OUT         MFP_CFG(GPIO96, AF1)
@@ -324,4 +345,10 @@
 #define GPIO101_MII_MDIO        MFP_CFG(GPIO101, AF5)
 #define GPIO103_RX_DV           MFP_CFG(GPIO103, AF5)
 
+/* SSP2 */
+#define GPIO107_SSP2_RXD        MFP_CFG(GPIO107, AF4)
+#define GPIO108_SSP2_TXD        MFP_CFG(GPIO108, AF4)
+#define GPIO111_SSP2_CLK        MFP_CFG(GPIO111, AF4)
+#define GPIO112_SSP2_FRM        MFP_CFG(GPIO112, AF4)
+
 #endif /* __ASM_MACH_MFP_PXA168_H */
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index 7f005843a707..7fb568d2845b 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -35,6 +35,13 @@ extern struct pxa_device_desc pxa168_device_fb;
 extern struct pxa_device_desc pxa168_device_keypad;
 extern struct pxa_device_desc pxa168_device_eth;
 
+struct pxa168_usb_pdata {
+        /* If NULL, default phy init routine for PXA168 would be called */
+        int (*phy_init)(void __iomem *usb_phy_reg_base);
+};
+/* pdata can be NULL */
+int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata);
+
 static inline int pxa168_add_uart(int id)
 {
         struct pxa_device_desc *d = NULL;
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 50c1763911ff..76ca15c00e45 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -24,6 +24,9 @@
 #include <mach/dma.h>
 #include <mach/devices.h>
 #include <mach/mfp.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <mach/pxa168.h>
 
 #include "common.h"
 #include "clock.h"
@@ -82,6 +85,7 @@ static APBC_CLK(keypad, PXA168_KPC, 0, 32000);
 static APMU_CLK(nand, NAND, 0x19b, 156000000);
 static APMU_CLK(lcd, LCD, 0x7f, 312000000);
 static APMU_CLK(eth, ETH, 0x09, 0);
+static APMU_CLK(usb, USB, 0x12, 0);
 
 /* device and clock bindings */
 static struct clk_lookup pxa168_clkregs[] = {
@@ -103,6 +107,7 @@ static struct clk_lookup pxa168_clkregs[] = {
         INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL),
         INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL),
         INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"),
+        INIT_CLKREG(&clk_usb, "pxa168-ehci", "PXA168-USBCLK"),
 };
 
 static int __init pxa168_init(void)
@@ -168,3 +173,44 @@ PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61);
 PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8);
 PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c);
 PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff);
+
+struct resource pxa168_usb_host_resources[] = {
+        /* USB Host conroller register base */
+        [0] = {
+                .start  = 0xd4209000,
+                .end    = 0xd4209000 + 0x200,
+                .flags  = IORESOURCE_MEM,
+                .name   = "pxa168-usb-host",
+        },
+        /* USB PHY register base */
+        [1] = {
+                .start  = 0xd4206000,
+                .end    = 0xd4206000 + 0xff,
+                .flags  = IORESOURCE_MEM,
+                .name   = "pxa168-usb-phy",
+        },
+        [2] = {
+                .start  = IRQ_PXA168_USB2,
+                .end    = IRQ_PXA168_USB2,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static u64 pxa168_usb_host_dmamask = DMA_BIT_MASK(32);
+struct platform_device pxa168_device_usb_host = {
+        .name = "pxa168-ehci",
+        .id   = -1,
+        .dev  = {
+                .dma_mask = &pxa168_usb_host_dmamask,
+                .coherent_dma_mask = DMA_BIT_MASK(32),
+        },
+
+        .num_resources = ARRAY_SIZE(pxa168_usb_host_resources),
+        .resource      = pxa168_usb_host_resources,
+};
+
+int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata)
+{
+        pxa168_device_usb_host.dev.platform_data = pdata;
+        return platform_device_register(&pxa168_device_usb_host);
+}
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index 99833b9485cf..4e91ee6e27c8 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -51,12 +51,12 @@ static inline uint32_t timer_read(void)
 {
         int delay = 100;
 
-        __raw_writel(1, TIMERS_VIRT_BASE + TMR_CVWR(0));
+        __raw_writel(1, TIMERS_VIRT_BASE + TMR_CVWR(1));
 
         while (delay--)
                 cpu_relax();
 
-        return __raw_readl(TIMERS_VIRT_BASE + TMR_CVWR(0));
+        return __raw_readl(TIMERS_VIRT_BASE + TMR_CVWR(1));
 }
 
 unsigned long long notrace sched_clock(void)
@@ -75,28 +75,51 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id)
 {
         struct clock_event_device *c = dev_id;
 
-        /* disable and clear pending interrupt status */
-        __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_IER(0));
-        __raw_writel(0x1, TIMERS_VIRT_BASE + TMR_ICR(0));
+        /*
+         * Clear pending interrupt status.
+         */
+        __raw_writel(0x01, TIMERS_VIRT_BASE + TMR_ICR(0));
+
+        /*
+         * Disable timer 0.
+         */
+        __raw_writel(0x02, TIMERS_VIRT_BASE + TMR_CER);
+
         c->event_handler(c);
+
         return IRQ_HANDLED;
 }
 
 static int timer_set_next_event(unsigned long delta,
                                 struct clock_event_device *dev)
 {
-        unsigned long flags, next;
+        unsigned long flags;
 
         local_irq_save(flags);
 
-        /* clear pending interrupt status and enable */
+        /*
+         * Disable timer 0.
+         */
+        __raw_writel(0x02, TIMERS_VIRT_BASE + TMR_CER);
+
+        /*
+         * Clear and enable timer match 0 interrupt.
+         */
         __raw_writel(0x01, TIMERS_VIRT_BASE + TMR_ICR(0));
         __raw_writel(0x01, TIMERS_VIRT_BASE + TMR_IER(0));
 
-        next = timer_read() + delta;
-        __raw_writel(next, TIMERS_VIRT_BASE + TMR_TN_MM(0, 0));
+        /*
+         * Setup new clockevent timer value.
+         */
+        __raw_writel(delta - 1, TIMERS_VIRT_BASE + TMR_TN_MM(0, 0));
+
+        /*
+         * Enable timer 0.
+         */
+        __raw_writel(0x03, TIMERS_VIRT_BASE + TMR_CER);
 
         local_irq_restore(flags);
+
         return 0;
 }
 
@@ -145,23 +168,26 @@ static struct clocksource cksrc = {
 static void __init timer_config(void)
 {
         uint32_t ccr = __raw_readl(TIMERS_VIRT_BASE + TMR_CCR);
-        uint32_t cer = __raw_readl(TIMERS_VIRT_BASE + TMR_CER);
-        uint32_t cmr = __raw_readl(TIMERS_VIRT_BASE + TMR_CMR);
 
-        __raw_writel(cer & ~0x1, TIMERS_VIRT_BASE + TMR_CER); /* disable */
+        __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_CER); /* disable */
 
-        ccr &= (cpu_is_mmp2()) ? TMR_CCR_CS_0(0) : TMR_CCR_CS_0(3);
+        ccr &= (cpu_is_mmp2()) ? (TMR_CCR_CS_0(0) | TMR_CCR_CS_1(0)) :
+                (TMR_CCR_CS_0(3) | TMR_CCR_CS_1(3));
         __raw_writel(ccr, TIMERS_VIRT_BASE + TMR_CCR);
 
-        /* free-running mode */
-        __raw_writel(cmr | 0x01, TIMERS_VIRT_BASE + TMR_CMR);
+        /* set timer 0 to periodic mode, and timer 1 to free-running mode */
+        __raw_writel(0x2, TIMERS_VIRT_BASE + TMR_CMR);
 
-        __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_PLCR(0)); /* free-running */
+        __raw_writel(0x1, TIMERS_VIRT_BASE + TMR_PLCR(0)); /* periodic */
         __raw_writel(0x7, TIMERS_VIRT_BASE + TMR_ICR(0));  /* clear status */
         __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_IER(0));
 
-        /* enable timer counter */
-        __raw_writel(cer | 0x01, TIMERS_VIRT_BASE + TMR_CER);
+        __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_PLCR(1)); /* free-running */
+        __raw_writel(0x7, TIMERS_VIRT_BASE + TMR_ICR(1));  /* clear status */
+        __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_IER(1));
+
+        /* enable timer 1 counter */
+        __raw_writel(0x2, TIMERS_VIRT_BASE + TMR_CER);
 }
 
 static struct irqaction timer_irq = {
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index 6bd37a27e5fc..176515a76989 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -93,7 +93,7 @@ static struct mtd_partition ttc_dkb_onenand_partitions[] = {
         }, {
                 .name           = "filesystem",
                 .offset         = MTDPART_OFS_APPEND,
-                .size           = SZ_48M,
+                .size           = SZ_32M + SZ_16M,
                 .mask_flags     = 0,
         }
 };
diff --git a/arch/arm/mach-msm/Makefile.boot b/arch/arm/mach-msm/Makefile.boot
index 24dfbf8c07c4..9b803a578b4d 100644
--- a/arch/arm/mach-msm/Makefile.boot
+++ b/arch/arm/mach-msm/Makefile.boot
@@ -1,3 +1,3 @@
-  zreladdr-y            := 0x10008000
+  zreladdr-y            += 0x10008000
 params_phys-y           := 0x10000100
 initrd_phys-y           := 0x10800000
diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c
index 18a3c97bc863..f81ef1f9d46f 100644
--- a/arch/arm/mach-msm/board-halibut.c
+++ b/arch/arm/mach-msm/board-halibut.c
@@ -78,8 +78,8 @@ static void __init halibut_init(void)
         platform_add_devices(devices, ARRAY_SIZE(devices));
 }
 
-static void __init halibut_fixup(struct machine_desc *desc, struct tag *tags,
-                                 char **cmdline, struct meminfo *mi)
+static void __init halibut_fixup(struct tag *tags, char **cmdline,
+                                 struct meminfo *mi)
 {
         mi->nr_banks=1;
         mi->bank[0].start = PHYS_OFFSET;
diff --git a/arch/arm/mach-msm/board-mahimahi.c b/arch/arm/mach-msm/board-mahimahi.c
index 7a9a03eb189c..1df15aa3c66d 100644
--- a/arch/arm/mach-msm/board-mahimahi.c
+++ b/arch/arm/mach-msm/board-mahimahi.c
@@ -53,8 +53,8 @@ static void __init mahimahi_init(void)
         platform_add_devices(devices, ARRAY_SIZE(devices));
 }
 
-static void __init mahimahi_fixup(struct machine_desc *desc, struct tag *tags,
-                                 char **cmdline, struct meminfo *mi)
+static void __init mahimahi_fixup(struct tag *tags, char **cmdline,
+                                  struct meminfo *mi)
 {
         mi->nr_banks = 2;
         mi->bank[0].start = PHYS_OFFSET;
diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c
index 92afaf6583ea..9043417ea52f 100644
--- a/arch/arm/mach-msm/board-msm7x30.c
+++ b/arch/arm/mach-msm/board-msm7x30.c
@@ -24,6 +24,7 @@
 #include <linux/smsc911x.h>
 #include <linux/usb/msm_hsusb.h>
 #include <linux/clkdev.h>
+#include <linux/memblock.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -41,6 +42,21 @@
 
 extern struct sys_timer msm_timer;
 
+static void __init msm7x30_fixup(struct machine_desc *desc, struct tag *tag,
+                         char **cmdline, struct meminfo *mi)
+{
+        for (; tag->hdr.size; tag = tag_next(tag))
+                if (tag->hdr.tag == ATAG_MEM && tag->u.mem.start == 0x200000) {
+                        tag->u.mem.start = 0;
+                        tag->u.mem.size += SZ_2M;
+                }
+}
+
+static void __init msm7x30_reserve(void)
+{
+        memblock_remove(0x0, SZ_2M);
+}
+
 static int hsusb_phy_init_seq[] = {
         0x30, 0x32,     /* Enable and set Pre-Emphasis Depth to 20% */
         0x02, 0x36,     /* Disable CDR Auto Reset feature */
@@ -106,6 +122,8 @@ static void __init msm7x30_map_io(void)
 
 MACHINE_START(MSM7X30_SURF, "QCT MSM7X30 SURF")
         .boot_params = PLAT_PHYS_OFFSET + 0x100,
+        .fixup = msm7x30_fixup,
+        .reserve = msm7x30_reserve,
         .map_io = msm7x30_map_io,
         .init_irq = msm7x30_init_irq,
         .init_machine = msm7x30_init,
@@ -114,6 +132,8 @@ MACHINE_END
 
 MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA")
         .boot_params = PLAT_PHYS_OFFSET + 0x100,
+        .fixup = msm7x30_fixup,
+        .reserve = msm7x30_reserve,
         .map_io = msm7x30_map_io,
         .init_irq = msm7x30_init_irq,
         .init_machine = msm7x30_init,
@@ -122,6 +142,8 @@ MACHINE_END
 
 MACHINE_START(MSM7X30_FLUID, "QCT MSM7X30 FLUID")
         .boot_params = PLAT_PHYS_OFFSET + 0x100,
+        .fixup = msm7x30_fixup,
+        .reserve = msm7x30_reserve,
         .map_io = msm7x30_map_io,
         .init_irq = msm7x30_init_irq,
         .init_machine = msm7x30_init,
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c
index 35c7ceeb3f29..b04468e7d00e 100644
--- a/arch/arm/mach-msm/board-msm8960.c
+++ b/arch/arm/mach-msm/board-msm8960.c
@@ -20,16 +20,34 @@
 #include <linux/io.h>
 #include <linux/irq.h>
 #include <linux/clkdev.h>
+#include <linux/memblock.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/hardware/gic.h>
+#include <asm/setup.h>
 
 #include <mach/board.h>
 #include <mach/msm_iomap.h>
 
 #include "devices.h"
 
+static void __init msm8960_fixup(struct machine_desc *desc, struct tag *tag,
+                         char **cmdline, struct meminfo *mi)
+{
+        for (; tag->hdr.size; tag = tag_next(tag))
+                if (tag->hdr.tag == ATAG_MEM &&
+                                tag->u.mem.start == 0x40200000) {
+                        tag->u.mem.start = 0x40000000;
+                        tag->u.mem.size += SZ_2M;
+                }
+}
+
+static void __init msm8960_reserve(void)
+{
+        memblock_remove(0x40000000, SZ_2M);
+}
+
 static void __init msm8960_map_io(void)
 {
         msm_map_msm8960_io();
@@ -76,6 +94,8 @@ static void __init msm8960_rumi3_init(void)
 }
 
 MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")
+        .fixup = msm8960_fixup,
+        .reserve = msm8960_reserve,
         .map_io = msm8960_map_io,
         .init_irq = msm8960_init_irq,
         .timer = &msm_timer,
@@ -83,6 +103,8 @@ MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")
 MACHINE_END
 
 MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3")
+        .fixup = msm8960_fixup,
+        .reserve = msm8960_reserve,
         .map_io = msm8960_map_io,
         .init_irq = msm8960_init_irq,
         .timer = &msm_timer,
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 1163b6fd05d2..9221f54778be 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -20,14 +20,31 @@
 #include <linux/platform_device.h>
 #include <linux/io.h>
 #include <linux/irq.h>
+#include <linux/memblock.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/hardware/gic.h>
+#include <asm/setup.h>
 
 #include <mach/board.h>
 #include <mach/msm_iomap.h>
 
+static void __init msm8x60_fixup(struct machine_desc *desc, struct tag *tag,
+                         char **cmdline, struct meminfo *mi)
+{
+        for (; tag->hdr.size; tag = tag_next(tag))
+                if (tag->hdr.tag == ATAG_MEM &&
+                                tag->u.mem.start == 0x40200000) {
+                        tag->u.mem.start = 0x40000000;
+                        tag->u.mem.size += SZ_2M;
+                }
+}
+
+static void __init msm8x60_reserve(void)
+{
+        memblock_remove(0x40000000, SZ_2M);
+}
 
 static void __init msm8x60_map_io(void)
 {
@@ -65,6 +82,8 @@ static void __init msm8x60_init(void)
 }
 
 MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
+        .fixup = msm8x60_fixup,
+        .reserve = msm8x60_reserve,
         .map_io = msm8x60_map_io,
         .init_irq = msm8x60_init_irq,
         .init_machine = msm8x60_init,
@@ -72,6 +91,8 @@ MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
 MACHINE_END
 
 MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
+        .fixup = msm8x60_fixup,
+        .reserve = msm8x60_reserve,
         .map_io = msm8x60_map_io,
         .init_irq = msm8x60_init_irq,
         .init_machine = msm8x60_init,
@@ -79,6 +100,8 @@ MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
 MACHINE_END
 
 MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
+        .fixup = msm8x60_fixup,
+        .reserve = msm8x60_reserve,
         .map_io = msm8x60_map_io,
         .init_irq = msm8x60_init_irq,
         .init_machine = msm8x60_init,
@@ -86,6 +109,8 @@ MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
 MACHINE_END
 
 MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
+        .fixup = msm8x60_fixup,
+        .reserve = msm8x60_reserve,
         .map_io = msm8x60_map_io,
         .init_irq = msm8x60_init_irq,
         .init_machine = msm8x60_init,
diff --git a/arch/arm/mach-msm/board-sapphire.c b/arch/arm/mach-msm/board-sapphire.c
index 863394c59e86..11c1e75ebb1b 100644
--- a/arch/arm/mach-msm/board-sapphire.c
+++ b/arch/arm/mach-msm/board-sapphire.c
@@ -76,8 +76,8 @@ static struct map_desc sapphire_io_desc[] __initdata = {
         }
 };
 
-static void __init sapphire_fixup(struct machine_desc *desc, struct tag *tags,
-                                  char **cmdline, struct meminfo *mi)
+static void __init sapphire_fixup(struct tag *tags, char **cmdline,
+                                  struct meminfo *mi)
 {
         int smi_sz = parse_tag_smi((const struct tag *)tags);
 
diff --git a/arch/arm/mach-msm/board-trout.c b/arch/arm/mach-msm/board-trout.c
index 814386772c66..7acd2021ada9 100644
--- a/arch/arm/mach-msm/board-trout.c
+++ b/arch/arm/mach-msm/board-trout.c
@@ -48,8 +48,8 @@ static void __init trout_init_irq(void)
         msm_init_irq();
 }
 
-static void __init trout_fixup(struct machine_desc *desc, struct tag *tags,
-                                char **cmdline, struct meminfo *mi)
+static void __init trout_fixup(struct tag *tags, char **cmdline,
+                               struct meminfo *mi)
 {
         mi->nr_banks = 1;
         mi->bank[0].start = PHYS_OFFSET;
diff --git a/arch/arm/mach-msm/clock.c b/arch/arm/mach-msm/clock.c
index 22a537669624..d9145dfc2a3b 100644
--- a/arch/arm/mach-msm/clock.c
+++ b/arch/arm/mach-msm/clock.c
@@ -18,7 +18,7 @@
 #include <linux/list.h>
 #include <linux/err.h>
 #include <linux/spinlock.h>
-#include <linux/pm_qos_params.h>
+#include <linux/pm_qos.h>
 #include <linux/mutex.h>
 #include <linux/clk.h>
 #include <linux/string.h>
diff --git a/arch/arm/mach-msm/include/mach/memory.h b/arch/arm/mach-msm/include/mach/memory.h
index f2f8d299ba95..58d5e7eec431 100644
--- a/arch/arm/mach-msm/include/mach/memory.h
+++ b/arch/arm/mach-msm/include/mach/memory.h
@@ -22,11 +22,11 @@
 #elif defined(CONFIG_ARCH_QSD8X50)
 #define PLAT_PHYS_OFFSET                UL(0x20000000)
 #elif defined(CONFIG_ARCH_MSM7X30)
-#define PLAT_PHYS_OFFSET                UL(0x00200000)
+#define PLAT_PHYS_OFFSET                UL(0x00000000)
 #elif defined(CONFIG_ARCH_MSM8X60)
-#define PLAT_PHYS_OFFSET                UL(0x40200000)
+#define PLAT_PHYS_OFFSET                UL(0x40000000)
 #elif defined(CONFIG_ARCH_MSM8960)
-#define PLAT_PHYS_OFFSET                UL(0x40200000)
+#define PLAT_PHYS_OFFSET                UL(0x40000000)
 #else
 #define PLAT_PHYS_OFFSET                UL(0x10000000)
 #endif
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index 1a1af9e56250..727659520912 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -156,6 +156,12 @@ void __init smp_init_cpus(void)
 {
         unsigned int i, ncores = get_core_count();
 
+        if (ncores > nr_cpu_ids) {
+                pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",
+                        ncores, nr_cpu_ids);
+                ncores = nr_cpu_ids;
+        }
+
         for (i = 0; i < ncores; i++)
                 set_cpu_possible(i, true);
 
diff --git a/arch/arm/mach-mv78xx0/Makefile.boot b/arch/arm/mach-mv78xx0/Makefile.boot
index 67039c3e0c48..760a0efe7580 100644
--- a/arch/arm/mach-mv78xx0/Makefile.boot
+++ b/arch/arm/mach-mv78xx0/Makefile.boot
@@ -1,3 +1,3 @@
-   zreladdr-y   := 0x00008000
+   zreladdr-y   += 0x00008000
 params_phys-y   := 0x00000100
 initrd_phys-y   := 0x00800000
diff --git a/arch/arm/mach-mx5/Makefile.boot b/arch/arm/mach-mx5/Makefile.boot
index e928be1b6757..ca207ca305ec 100644
--- a/arch/arm/mach-mx5/Makefile.boot
+++ b/arch/arm/mach-mx5/Makefile.boot
@@ -1,9 +1,9 @@
-   zreladdr-$(CONFIG_ARCH_MX50) := 0x70008000
+   zreladdr-$(CONFIG_ARCH_MX50) += 0x70008000
 params_phys-$(CONFIG_ARCH_MX50) := 0x70000100
 initrd_phys-$(CONFIG_ARCH_MX50) := 0x70800000
-   zreladdr-$(CONFIG_ARCH_MX51) := 0x90008000
+   zreladdr-$(CONFIG_ARCH_MX51) += 0x90008000
 params_phys-$(CONFIG_ARCH_MX51) := 0x90000100
 initrd_phys-$(CONFIG_ARCH_MX51) := 0x90800000
-   zreladdr-$(CONFIG_ARCH_MX53) := 0x70008000
+   zreladdr-$(CONFIG_ARCH_MX53) += 0x70008000
 params_phys-$(CONFIG_ARCH_MX53) := 0x70000100
 initrd_phys-$(CONFIG_ARCH_MX53) := 0x70800000
diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c
index 7c893fa70266..68934ea8725a 100644
--- a/arch/arm/mach-mx5/board-cpuimx51.c
+++ b/arch/arm/mach-mx5/board-cpuimx51.c
@@ -81,7 +81,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
                 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
         }, {
                 .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000),
-                .irq = irq_to_gpio(CPUIMX51_QUARTD_GPIO),
+                .irq = gpio_to_irq(CPUIMX51_QUARTD_GPIO),
                 .irqflags = IRQF_TRIGGER_HIGH,
                 .uartclk = CPUIMX51_QUART_XTAL,
                 .regshift = CPUIMX51_QUART_REGSHIFT,
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index e400b09109ce..11b0ff67f89d 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -369,7 +369,7 @@ static void __init mx51_babbage_init(void)
                                         ARRAY_SIZE(mx51babbage_pads));
 
         imx51_add_imx_uart(0, &uart_pdata);
-        imx51_add_imx_uart(1, &uart_pdata);
+        imx51_add_imx_uart(1, NULL);
         imx51_add_imx_uart(2, &uart_pdata);
 
         babbage_fec_reset();
diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c
index f70700dc0ec1..551daf85ff8c 100644
--- a/arch/arm/mach-mx5/board-mx51_efikamx.c
+++ b/arch/arm/mach-mx5/board-mx51_efikamx.c
@@ -108,9 +108,9 @@ static void __init mx51_efikamx_board_id(void)
         gpio_request(EFIKAMX_PCBID2, "pcbid2");
         gpio_direction_input(EFIKAMX_PCBID2);
 
-        id = gpio_get_value(EFIKAMX_PCBID0);
-        id |= gpio_get_value(EFIKAMX_PCBID1) << 1;
-        id |= gpio_get_value(EFIKAMX_PCBID2) << 2;
+        id = gpio_get_value(EFIKAMX_PCBID0) ? 1 : 0;
+        id |= (gpio_get_value(EFIKAMX_PCBID1) ? 1 : 0) << 1;
+        id |= (gpio_get_value(EFIKAMX_PCBID2) ? 1 : 0) << 2;
 
         switch (id) {
         case 7:
diff --git a/arch/arm/mach-mx5/board-mx51_efikasb.c b/arch/arm/mach-mx5/board-mx51_efikasb.c
index 2e4d9d32a87c..8a9bca22beb5 100644
--- a/arch/arm/mach-mx5/board-mx51_efikasb.c
+++ b/arch/arm/mach-mx5/board-mx51_efikasb.c
@@ -156,23 +156,24 @@ static struct gpio_keys_button mx51_efikasb_keys[] = {
         {
                 .code = KEY_POWER,
                 .gpio = EFIKASB_PWRKEY,
-                .type = EV_PWR,
+                .type = EV_KEY,
                 .desc = "Power Button",
                 .wakeup = 1,
-                .debounce_interval = 10, /* ms */
+                .active_low = 1,
         },
         {
                 .code = SW_LID,
                 .gpio = EFIKASB_LID,
                 .type = EV_SW,
                 .desc = "Lid Switch",
+                .active_low = 1,
         },
         {
-                /* SW_RFKILLALL vs KEY_RFKILL ? */
-                .code = SW_RFKILL_ALL,
+                .code = KEY_RFKILL,
                 .gpio = EFIKASB_RFKILL,
-                .type = EV_SW,
+                .type = EV_KEY,
                 .desc = "rfkill",
+                .active_low = 1,
         },
 };
 
@@ -224,8 +225,8 @@ static void __init mx51_efikasb_board_id(void)
         gpio_request(EFIKASB_PCBID1, "pcb id1");
         gpio_direction_input(EFIKASB_PCBID1);
 
-        id = gpio_get_value(EFIKASB_PCBID0);
-        id |= gpio_get_value(EFIKASB_PCBID1) << 1;
+        id = gpio_get_value(EFIKASB_PCBID0) ? 1 : 0;
+        id |= (gpio_get_value(EFIKASB_PCBID1) ? 1 : 0) << 1;
 
         switch (id) {
         default:
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
index 7f20308c4dbd..f7bf996f463b 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -271,7 +271,11 @@ static int _clk_pll_enable(struct clk *clk)
         int i = 0;
 
         pllbase = _get_pll_base(clk);
-        reg = __raw_readl(pllbase + MXC_PLL_DP_CTL) | MXC_PLL_DP_CTL_UPEN;
+        reg = __raw_readl(pllbase + MXC_PLL_DP_CTL);
+        if (reg & MXC_PLL_DP_CTL_UPEN)
+                return 0;
+
+        reg |= MXC_PLL_DP_CTL_UPEN;
         __raw_writel(reg, pllbase + MXC_PLL_DP_CTL);
 
         /* Wait for lock */
diff --git a/arch/arm/mach-mx5/mx51_efika.c b/arch/arm/mach-mx5/mx51_efika.c
index 4435e03cea5d..c9209454807a 100644
--- a/arch/arm/mach-mx5/mx51_efika.c
+++ b/arch/arm/mach-mx5/mx51_efika.c
@@ -186,7 +186,7 @@ static int initialize_usbh1_port(struct platform_device *pdev)
 
         mdelay(10);
 
-        return mx51_initialize_usb_hw(0, MXC_EHCI_ITC_NO_THRESHOLD);
+        return mx51_initialize_usb_hw(pdev->id, MXC_EHCI_ITC_NO_THRESHOLD);
 }
 
 static struct mxc_usbh_platform_data usbh1_config = {
diff --git a/arch/arm/mach-mxs/Makefile.boot b/arch/arm/mach-mxs/Makefile.boot
index eb541e0291da..07b11fe6453f 100644
--- a/arch/arm/mach-mxs/Makefile.boot
+++ b/arch/arm/mach-mxs/Makefile.boot
@@ -1 +1 @@
-zreladdr-y := 0x40008000
+zreladdr-y += 0x40008000
diff --git a/arch/arm/mach-netx/Makefile.boot b/arch/arm/mach-netx/Makefile.boot
index b81cf6aff0ac..534a4d27055e 100644
--- a/arch/arm/mach-netx/Makefile.boot
+++ b/arch/arm/mach-netx/Makefile.boot
@@ -1,2 +1,2 @@
-    zreladdr-y                  := 0x80008000
+    zreladdr-y                  += 0x80008000
 
diff --git a/arch/arm/mach-nomadik/Makefile.boot b/arch/arm/mach-nomadik/Makefile.boot
index c7e75acfe6c9..ff0a4b5b0a82 100644
--- a/arch/arm/mach-nomadik/Makefile.boot
+++ b/arch/arm/mach-nomadik/Makefile.boot
@@ -1,4 +1,4 @@
-   zreladdr-y   := 0x00008000
+   zreladdr-y   += 0x00008000
 params_phys-y   := 0x00000100
 initrd_phys-y   := 0x00800000
 
diff --git a/arch/arm/mach-nuc93x/Makefile.boot b/arch/arm/mach-nuc93x/Makefile.boot
index a057b546b6e5..6c3d421c2d11 100644
--- a/arch/arm/mach-nuc93x/Makefile.boot
+++ b/arch/arm/mach-nuc93x/Makefile.boot
@@ -1,3 +1,3 @@
-zreladdr-y      := 0x00008000
+zreladdr-y      += 0x00008000
 params_phys-y   := 0x00000100
 
diff --git a/arch/arm/mach-nuc93x/time.c b/arch/arm/mach-nuc93x/time.c
index 2f90f9dc6e30..f9807c029ec5 100644
--- a/arch/arm/mach-nuc93x/time.c
+++ b/arch/arm/mach-nuc93x/time.c
@@ -82,7 +82,7 @@ static void nuc93x_timer_setup(void)
         timer0_load = (rate / TICKS_PER_SEC);
         __raw_writel(timer0_load, REG_TICR0);
 
-        val |= (PERIOD | COUNTEN | INTEN | PRESCALE);;
+        val |= (PERIOD | COUNTEN | INTEN | PRESCALE);
         __raw_writel(val, REG_TCSR0);
 
 }
diff --git a/arch/arm/mach-omap1/Makefile.boot b/arch/arm/mach-omap1/Makefile.boot
index 292d56c5a888..13bda8dbd604 100644
--- a/arch/arm/mach-omap1/Makefile.boot
+++ b/arch/arm/mach-omap1/Makefile.boot
@@ -1,3 +1,3 @@
-   zreladdr-y           := 0x10008000
+   zreladdr-y           += 0x10008000
 params_phys-y           := 0x10000100
 initrd_phys-y           := 0x10800000
diff --git a/arch/arm/mach-omap1/pm_bus.c b/arch/arm/mach-omap1/pm_bus.c
index 943072d5a1d5..7868e75ad077 100644
--- a/arch/arm/mach-omap1/pm_bus.c
+++ b/arch/arm/mach-omap1/pm_bus.c
@@ -13,6 +13,7 @@
 #include <linux/kernel.h>
 #include <linux/io.h>
 #include <linux/pm_runtime.h>
+#include <linux/pm_clock.h>
 #include <linux/platform_device.h>
 #include <linux/mutex.h>
 #include <linux/clk.h>
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 4ae6257b39a4..89bfb49389f2 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -7,7 +7,6 @@ config ARCH_OMAP2PLUS_TYPICAL
         default y
         select AEABI
         select REGULATOR
-        select PM
         select PM_RUNTIME
         select VFP
         select NEON if ARCH_OMAP3 || ARCH_OMAP4
@@ -37,6 +36,7 @@ config ARCH_OMAP3
         select ARM_L1_CACHE_SHIFT_6 if !ARCH_OMAP4
         select ARCH_HAS_OPP
         select PM_OPP if PM
+        select ARM_CPU_SUSPEND if PM
 
 config ARCH_OMAP4
         bool "TI OMAP4"
@@ -51,6 +51,7 @@ config ARCH_OMAP4
         select ARCH_HAS_OPP
         select PM_OPP if PM
         select USB_ARCH_HAS_EHCI
+        select ARM_CPU_SUSPEND if PM
 
 comment "OMAP Core Type"
         depends on ARCH_OMAP2
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index f34336560437..7317a2b39dd1 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -242,14 +242,11 @@ obj-$(CONFIG_MACH_IGEP0020)		+= board-igep0020.o \
 obj-$(CONFIG_MACH_OMAP3_TOUCHBOOK)      += board-omap3touchbook.o \
                                            hsmmc.o
 obj-$(CONFIG_MACH_OMAP_4430SDP)         += board-4430sdp.o \
-                                           hsmmc.o \
-                                           omap_phy_internal.o
+                                           hsmmc.o
 obj-$(CONFIG_MACH_OMAP4_PANDA)          += board-omap4panda.o \
-                                           hsmmc.o \
-                                           omap_phy_internal.o
+                                           hsmmc.o
 
-obj-$(CONFIG_MACH_OMAP3517EVM)          += board-am3517evm.o \
-                                           omap_phy_internal.o \
+obj-$(CONFIG_MACH_OMAP3517EVM)          += board-am3517evm.o
 
 obj-$(CONFIG_MACH_CRANEBOARD)           += board-am3517crane.o
 
@@ -260,6 +257,8 @@ obj-$(CONFIG_MACH_TI8168EVM)		+= board-ti8168evm.o
 usbfs-$(CONFIG_ARCH_OMAP_OTG)           := usb-fs.o
 obj-y                                   += $(usbfs-m) $(usbfs-y)
 obj-y                                   += usb-musb.o
+obj-y                                   += omap_phy_internal.o
+
 obj-$(CONFIG_MACH_OMAP2_TUSB6010)       += usb-tusb6010.o
 obj-y                                   += usb-host.o
 
diff --git a/arch/arm/mach-omap2/Makefile.boot b/arch/arm/mach-omap2/Makefile.boot
index 565aff7f37a9..b03e562acc60 100644
--- a/arch/arm/mach-omap2/Makefile.boot
+++ b/arch/arm/mach-omap2/Makefile.boot
@@ -1,3 +1,3 @@
-  zreladdr-y            := 0x80008000
+  zreladdr-y            += 0x80008000
 params_phys-y           := 0x80000100
 initrd_phys-y           := 0x80800000
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 2028464cf5b9..f79b7d2a8ed4 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -193,7 +193,8 @@ static int __init omap2430_i2c_init(void)
 {
         omap_register_i2c_bus(1, 100, sdp2430_i2c1_boardinfo,
                         ARRAY_SIZE(sdp2430_i2c1_boardinfo));
-        omap2_pmic_init("twl4030", &sdp2430_twldata);
+        omap_pmic_init(2, 100, "twl4030", INT_24XX_SYS_NIRQ,
+                        &sdp2430_twldata);
         return 0;
 }
 
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index 5f2b55ff04ff..933e9353cb37 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -45,8 +45,6 @@ static struct omap_board_config_kernel am3517_crane_config[] __initdata = {
 static struct omap_board_mux board_mux[] __initdata = {
         { .reg_offset = OMAP_MUX_TERMINATOR },
 };
-#else
-#define board_mux       NULL
 #endif
 
 static void __init am3517_crane_init_early(void)
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 32f5f895568a..3ae16b4e3f52 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -491,23 +491,22 @@ static void __init beagle_opp_init(void)
 
         /* Custom OPP enabled for all xM versions */
         if (cpu_is_omap3630()) {
-                struct omap_hwmod *mh = omap_hwmod_lookup("mpu");
-                struct omap_hwmod *dh = omap_hwmod_lookup("iva");
-                struct device *dev;
+                struct device *mpu_dev, *iva_dev;
 
-                if (!mh || !dh) {
+                mpu_dev = omap2_get_mpuss_device();
+                iva_dev = omap2_get_iva_device();
+
+                if (!mpu_dev || !iva_dev) {
                         pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n",
-                                __func__, mh, dh);
+                                __func__, mpu_dev, iva_dev);
                         return;
                 }
                 /* Enable MPU 1GHz and lower opps */
-                dev = &mh->od->pdev.dev;
-                r = opp_enable(dev, 800000000);
+                r = opp_enable(mpu_dev, 800000000);
                 /* TODO: MPU 1GHz needs SR and ABB */
 
                 /* Enable IVA 800MHz and lower opps */
-                dev = &dh->od->pdev.dev;
-                r |= opp_enable(dev, 660000000);
+                r |= opp_enable(iva_dev, 660000000);
                 /* TODO: DSP 800MHz needs SR and ABB */
                 if (r) {
                         pr_err("%s: failed to enable higher opp %d\n",
@@ -516,10 +515,8 @@ static void __init beagle_opp_init(void)
                          * Cleanup - disable the higher freqs - we dont care
                          * about the results
                          */
-                        dev = &mh->od->pdev.dev;
-                        opp_disable(dev, 800000000);
-                        dev = &dh->od->pdev.dev;
-                        opp_disable(dev, 660000000);
+                        opp_disable(mpu_dev, 800000000);
+                        opp_disable(iva_dev, 660000000);
                 }
         }
         return;
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index ffd55b1c4396..b9b844683147 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3078,6 +3078,7 @@ static struct clk gpt12_fck = {
         .name           = "gpt12_fck",
         .ops            = &clkops_null,
         .parent         = &secure_32k_fck,
+        .clkdm_name     = "wkup_clkdm",
         .recalc         = &followparent_recalc,
 };
 
@@ -3085,6 +3086,7 @@ static struct clk wdt1_fck = {
         .name           = "wdt1_fck",
         .ops            = &clkops_null,
         .parent         = &secure_32k_fck,
+        .clkdm_name     = "wkup_clkdm",
         .recalc         = &followparent_recalc,
 };
 
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 2af0e3f00ce1..c0b6fbda3408 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -3376,10 +3376,18 @@ int __init omap4xxx_clk_init(void)
         } else if (cpu_is_omap446x()) {
                 cpu_mask = RATE_IN_4460;
                 cpu_clkflg = CK_446X;
+        } else {
+                return 0;
         }
 
         clk_init(&omap2_clk_functions);
-        omap2_clk_disable_clkdm_control();
+
+        /*
+         * Must stay commented until all OMAP SoC drivers are
+         * converted to runtime PM, or drivers may start crashing
+         *
+         * omap2_clk_disable_clkdm_control();
+         */
 
         for (c = omap44xx_clks; c < omap44xx_clks + ARRAY_SIZE(omap44xx_clks);
                                                                           c++)
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index ab7db083f97f..8f0890685d7b 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -747,6 +747,7 @@ int clkdm_wakeup(struct clockdomain *clkdm)
         spin_lock_irqsave(&clkdm->lock, flags);
         clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED;
         ret = arch_clkdm->clkdm_wakeup(clkdm);
+        ret |= pwrdm_state_switch(clkdm->pwrdm.ptr);
         spin_unlock_irqrestore(&clkdm->lock, flags);
         return ret;
 }
@@ -818,6 +819,7 @@ void clkdm_deny_idle(struct clockdomain *clkdm)
         spin_lock_irqsave(&clkdm->lock, flags);
         clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED;
         arch_clkdm->clkdm_deny_idle(clkdm);
+        pwrdm_state_switch(clkdm->pwrdm.ptr);
         spin_unlock_irqrestore(&clkdm->lock, flags);
 }
 
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
index f2ea6453ade0..a018a7327879 100644
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ b/arch/arm/mach-omap2/cminst44xx.h
@@ -18,13 +18,36 @@ extern void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs);
 extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs);
 
 extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs);
-extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs);
+
+# ifdef CONFIG_ARCH_OMAP4
+extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs,
+                                         u16 clkctrl_offs);
 
 extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
                                        u16 clkctrl_offs);
 extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
                                         u16 clkctrl_offs);
 
+# else
+
+static inline int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs,
+                                        u16 clkctrl_offs)
+{
+        return 0;
+}
+
+static inline void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst,
+                                s16 cdoffs, u16 clkctrl_offs)
+{
+}
+
+static inline void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs,
+                                 u16 clkctrl_offs)
+{
+}
+
+# endif
+
 /*
  * In an ideal world, we would not export these low-level functions,
  * but this will probably take some time to fix properly
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index a9b45c76e1d3..097a42d81e59 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -137,8 +137,7 @@ static void omap4_hsmmc1_before_set_reg(struct device *dev, int slot,
          */
         reg = omap4_ctrl_pad_readl(control_pbias_offset);
         reg &= ~(OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK |
-                OMAP4_MMC1_PWRDNZ_MASK |
-                OMAP4_USBC1_ICUSB_PWRDNZ_MASK);
+                OMAP4_MMC1_PWRDNZ_MASK);
         omap4_ctrl_pad_writel(reg, control_pbias_offset);
 }
 
@@ -156,8 +155,7 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot,
                 else
                         reg |= OMAP4_MMC1_PBIASLITE_VMODE_MASK;
                 reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK |
-                        OMAP4_MMC1_PWRDNZ_MASK |
-                        OMAP4_USBC1_ICUSB_PWRDNZ_MASK);
+                        OMAP4_MMC1_PWRDNZ_MASK);
                 omap4_ctrl_pad_writel(reg, control_pbias_offset);
 
                 timeout = jiffies + msecs_to_jiffies(5);
@@ -171,16 +169,14 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot,
                 if (reg & OMAP4_MMC1_PBIASLITE_VMODE_ERROR_MASK) {
                         pr_err("Pbias Voltage is not same as LDO\n");
                         /* Caution : On VMODE_ERROR Power Down MMC IO */
-                        reg &= ~(OMAP4_MMC1_PWRDNZ_MASK |
-                                OMAP4_USBC1_ICUSB_PWRDNZ_MASK);
+                        reg &= ~(OMAP4_MMC1_PWRDNZ_MASK);
                         omap4_ctrl_pad_writel(reg, control_pbias_offset);
                 }
         } else {
                 reg = omap4_ctrl_pad_readl(control_pbias_offset);
                 reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK |
                         OMAP4_MMC1_PWRDNZ_MASK |
-                        OMAP4_MMC1_PBIASLITE_VMODE_MASK |
-                        OMAP4_USBC1_ICUSB_PWRDNZ_MASK);
+                        OMAP4_MMC1_PBIASLITE_VMODE_MASK);
                 omap4_ctrl_pad_writel(reg, control_pbias_offset);
         }
 }
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index c7fb22abc219..655e9480eb98 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -821,11 +821,10 @@ static void __init omap_mux_set_cmdline_signals(void)
         if (!omap_mux_options)
                 return;
 
-        options = kmalloc(strlen(omap_mux_options) + 1, GFP_KERNEL);
+        options = kstrdup(omap_mux_options, GFP_KERNEL);
         if (!options)
                 return;
 
-        strcpy(options, omap_mux_options);
         next_opt = options;
 
         while ((token = strsep(&next_opt, ",")) != NULL) {
@@ -855,24 +854,19 @@ static int __init omap_mux_copy_names(struct omap_mux *src,
 
         for (i = 0; i < OMAP_MUX_NR_MODES; i++) {
                 if (src->muxnames[i]) {
-                        dst->muxnames[i] =
-                                kmalloc(strlen(src->muxnames[i]) + 1,
-                                        GFP_KERNEL);
+                        dst->muxnames[i] = kstrdup(src->muxnames[i],
+                                                   GFP_KERNEL);
                         if (!dst->muxnames[i])
                                 goto free;
-                        strcpy(dst->muxnames[i], src->muxnames[i]);
                 }
         }
 
 #ifdef CONFIG_DEBUG_FS
         for (i = 0; i < OMAP_MUX_NR_SIDES; i++) {
                 if (src->balls[i]) {
-                        dst->balls[i] =
-                                kmalloc(strlen(src->balls[i]) + 1,
-                                        GFP_KERNEL);
+                        dst->balls[i] = kstrdup(src->balls[i], GFP_KERNEL);
                         if (!dst->balls[i])
                                 goto free;
-                        strcpy(dst->balls[i], src->balls[i]);
                 }
         }
 #endif
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index ce65e9329c7b..889464dc7b2d 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -109,12 +109,10 @@ void __init smp_init_cpus(void)
         ncores = scu_get_core_count(scu_base);
 
         /* sanity check */
-        if (ncores > NR_CPUS) {
-                printk(KERN_WARNING
-                       "OMAP4: no. of cores (%d) greater than configured "
-                       "maximum of %d - clipping\n",
-                       ncores, NR_CPUS);
-                ncores = NR_CPUS;
+        if (ncores > nr_cpu_ids) {
+                pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",
+                        ncores, nr_cpu_ids);
+                ncores = nr_cpu_ids;
         }
 
         for (i = 0; i < ncores; i++)
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 16743c7d6e8e..408193d8e044 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -192,6 +192,7 @@ static struct omap_hwmod_addr_space omap2430_usbhsotg_addrs[] = {
                 .pa_end         = OMAP243X_HS_BASE + SZ_4K - 1,
                 .flags          = ADDR_TYPE_RT
         },
+        { }
 };
 
 /*  l4_core ->usbhsotg  interface */
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 3feb35911a32..472bf22d5e84 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -130,7 +130,6 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
                 } else {
                         hwsup = clkdm_in_hwsup(pwrdm->pwrdm_clkdms[0]);
                         clkdm_wakeup(pwrdm->pwrdm_clkdms[0]);
-                        pwrdm_wait_transition(pwrdm);
                         sleep_switch = FORCEWAKEUP_SWITCH;
                 }
         }
@@ -156,7 +155,6 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
                 return ret;
         }
 
-        pwrdm_wait_transition(pwrdm);
         pwrdm_state_switch(pwrdm);
 err:
         return ret;
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 9af08473bf10..ef71fdd40fc4 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -195,28 +195,35 @@ static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused)
 
 /**
  * pwrdm_init - set up the powerdomain layer
- * @pwrdm_list: array of struct powerdomain pointers to register
+ * @pwrdms: array of struct powerdomain pointers to register
  * @custom_funcs: func pointers for arch specific implementations
  *
- * Loop through the array of powerdomains @pwrdm_list, registering all
- * that are available on the current CPU. If pwrdm_list is supplied
- * and not null, all of the referenced powerdomains will be
- * registered.  No return value.  XXX pwrdm_list is not really a
- * "list"; it is an array.  Rename appropriately.
+ * Loop through the array of powerdomains @pwrdms, registering all
+ * that are available on the current CPU.  Also, program all
+ * powerdomain target state as ON; this is to prevent domains from
+ * hitting low power states (if bootloader has target states set to
+ * something other than ON) and potentially even losing context while
+ * PM is not fully initialized.  The PM late init code can then program
+ * the desired target state for all the power domains.  No return
+ * value.
  */
-void pwrdm_init(struct powerdomain **pwrdm_list, struct pwrdm_ops *custom_funcs)
+void pwrdm_init(struct powerdomain **pwrdms, struct pwrdm_ops *custom_funcs)
 {
         struct powerdomain **p = NULL;
+        struct powerdomain *temp_p;
 
         if (!custom_funcs)
                 WARN(1, "powerdomain: No custom pwrdm functions registered\n");
         else
                 arch_pwrdm = custom_funcs;
 
-        if (pwrdm_list) {
-                for (p = pwrdm_list; *p; p++)
+        if (pwrdms) {
+                for (p = pwrdms; *p; p++)
                         _pwrdm_register(*p);
         }
+
+        list_for_each_entry(temp_p, &pwrdm_list, node)
+                pwrdm_set_next_pwrst(temp_p, PWRDM_POWER_ON);
 }
 
 /**
diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c
index 2ce2fb7664bc..f49804f181d4 100644
--- a/arch/arm/mach-omap2/smartreflex.c
+++ b/arch/arm/mach-omap2/smartreflex.c
@@ -247,7 +247,7 @@ static void sr_stop_vddautocomp(struct omap_sr *sr)
  * driver register and sr device intializtion API's. Only one call
  * will ultimately succeed.
  *
- * Currently this function registers interrrupt handler for a particular SR
+ * Currently this function registers interrupt handler for a particular SR
  * if smartreflex class driver is already registered and has
  * requested for interrupts and the SR interrupt line in present.
  */
@@ -621,7 +621,7 @@ void sr_disable(struct voltagedomain *voltdm)
                         sr_v2_disable(sr);
         }
 
-        pm_runtime_put_sync(&sr->pdev->dev);
+        pm_runtime_put_sync_suspend(&sr->pdev->dev);
 }
 
 /**
@@ -860,6 +860,7 @@ static int __init omap_sr_probe(struct platform_device *pdev)
         irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 
         pm_runtime_enable(&pdev->dev);
+        pm_runtime_irq_safe(&pdev->dev);
 
         sr_info->pdev = pdev;
         sr_info->srid = pdev->id;
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index e9640728239b..cf1de7d2630d 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -293,7 +293,8 @@ static void __init omap2_gp_clocksource_init(int gptimer_id,
         pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n",
                 gptimer_id, clksrc.rate);
 
-        __omap_dm_timer_load_start(clksrc.io_base, OMAP_TIMER_CTRL_ST, 0, 1);
+        __omap_dm_timer_load_start(clksrc.io_base,
+                        OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1);
         init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate);
 
         if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 2543342dbccb..daa056ed8738 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -48,14 +48,7 @@ void __init omap_pmic_init(int bus, u32 clkrate,
         omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
 }
 
-static struct twl4030_usb_data omap4_usb_pdata = {
-        .phy_init       = omap4430_phy_init,
-        .phy_exit       = omap4430_phy_exit,
-        .phy_power      = omap4430_phy_power,
-        .phy_set_clock  = omap4430_phy_set_clk,
-        .phy_suspend    = omap4430_phy_suspend,
-};
-
+#if defined(CONFIG_ARCH_OMAP3)
 static struct twl4030_usb_data omap3_usb_pdata = {
         .usb_mode       = T2_USB_MODE_ULPI,
 };
@@ -122,6 +115,45 @@ static struct regulator_init_data omap3_vpll2_idata = {
         .consumer_supplies              = omap3_vpll2_supplies,
 };
 
+void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
+                                  u32 pdata_flags, u32 regulators_flags)
+{
+        if (!pmic_data->irq_base)
+                pmic_data->irq_base = TWL4030_IRQ_BASE;
+        if (!pmic_data->irq_end)
+                pmic_data->irq_end = TWL4030_IRQ_END;
+
+        /* Common platform data configurations */
+        if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
+                pmic_data->usb = &omap3_usb_pdata;
+
+        if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci)
+                pmic_data->bci = &omap3_bci_pdata;
+
+        if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc)
+                pmic_data->madc = &omap3_madc_pdata;
+
+        if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->audio)
+                pmic_data->audio = &omap3_audio_pdata;
+
+        /* Common regulator configurations */
+        if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac)
+                pmic_data->vdac = &omap3_vdac_idata;
+
+        if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2)
+                pmic_data->vpll2 = &omap3_vpll2_idata;
+}
+#endif /* CONFIG_ARCH_OMAP3 */
+
+#if defined(CONFIG_ARCH_OMAP4)
+static struct twl4030_usb_data omap4_usb_pdata = {
+        .phy_init       = omap4430_phy_init,
+        .phy_exit       = omap4430_phy_exit,
+        .phy_power      = omap4430_phy_power,
+        .phy_set_clock  = omap4430_phy_set_clk,
+        .phy_suspend    = omap4430_phy_suspend,
+};
+
 static struct regulator_init_data omap4_vdac_idata = {
         .constraints = {
                 .min_uV                 = 1800000,
@@ -273,32 +305,4 @@ void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,
             !pmic_data->clk32kg)
                 pmic_data->clk32kg = &omap4_clk32kg_idata;
 }
-
-void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
-                                  u32 pdata_flags, u32 regulators_flags)
-{
-        if (!pmic_data->irq_base)
-                pmic_data->irq_base = TWL4030_IRQ_BASE;
-        if (!pmic_data->irq_end)
-                pmic_data->irq_end = TWL4030_IRQ_END;
-
-        /* Common platform data configurations */
-        if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
-                pmic_data->usb = &omap3_usb_pdata;
-
-        if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci)
-                pmic_data->bci = &omap3_bci_pdata;
-
-        if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc)
-                pmic_data->madc = &omap3_madc_pdata;
-
-        if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->audio)
-                pmic_data->audio = &omap3_audio_pdata;
-
-        /* Common regulator configurations */
-        if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac)
-                pmic_data->vdac = &omap3_vdac_idata;
-
-        if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2)
-                pmic_data->vpll2 = &omap3_vpll2_idata;
-}
+#endif /* CONFIG_ARCH_OMAP4 */
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index a65145b02a55..19e4dac62a8c 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -137,9 +137,6 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data)
         musb_plat.mode = board_data->mode;
         musb_plat.extvbus = board_data->extvbus;
 
-        if (cpu_is_omap44xx())
-                omap4430_phy_init(dev);
-
         if (cpu_is_omap3517() || cpu_is_omap3505()) {
                 oh_name = "am35x_otg_hs";
                 name = "musb-am35x";
diff --git a/arch/arm/mach-orion5x/Makefile.boot b/arch/arm/mach-orion5x/Makefile.boot
index 67039c3e0c48..760a0efe7580 100644
--- a/arch/arm/mach-orion5x/Makefile.boot
+++ b/arch/arm/mach-orion5x/Makefile.boot
@@ -1,3 +1,3 @@
-   zreladdr-y   := 0x00008000
+   zreladdr-y   += 0x00008000
 params_phys-y   := 0x00000100
 initrd_phys-y   := 0x00800000
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 0ab531d047fc..22ace0bf2f92 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -308,8 +308,8 @@ void __init orion5x_init(void)
  * Many orion-based systems have buggy bootloader implementations.
  * This is a common fixup for bogus memory tags.
  */
-void __init tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t,
-                            char **from, struct meminfo *meminfo)
+void __init tag_fixup_mem32(struct tag *t, char **from,
+                            struct meminfo *meminfo)
 {
         for (; t->hdr.size; t = tag_next(t))
                 if (t->hdr.tag == ATAG_MEM &&
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index 3e5499dda49a..909489f4d23e 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -53,11 +53,9 @@ int orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys);
 struct pci_bus *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys);
 int orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
 
-struct machine_desc;
 struct meminfo;
 struct tag;
-extern void __init tag_fixup_mem32(struct machine_desc *, struct tag *,
-                                   char **, struct meminfo *);
+extern void __init tag_fixup_mem32(struct tag *, char **, struct meminfo *);
 
 
 #endif
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index 64e68fa85b0e..6fb4908e998b 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -76,7 +76,7 @@ static int __init dns323_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
         /*
          * Check for devices with hard-wired IRQs.
          */
-        irq = orion5x_pci_map_irq(const dev, slot, pin);
+        irq = orion5x_pci_map_irq(dev, slot, pin);
         if (irq != -1)
                 return irq;
 
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index 28b8760ab9fa..bc4a920e26ee 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -14,6 +14,7 @@
 #include <linux/pci.h>
 #include <linux/slab.h>
 #include <linux/mbus.h>
+#include <video/vga.h>
 #include <asm/irq.h>
 #include <asm/mach/pci.h>
 #include <plat/pcie.h>
diff --git a/arch/arm/mach-pnx4008/Makefile.boot b/arch/arm/mach-pnx4008/Makefile.boot
index 44c7117e20dd..9fa19baa7f2e 100644
--- a/arch/arm/mach-pnx4008/Makefile.boot
+++ b/arch/arm/mach-pnx4008/Makefile.boot
@@ -1,4 +1,4 @@
-   zreladdr-y           := 0x80008000
+   zreladdr-y           += 0x80008000
 params_phys-y           := 0x80000100
 initrd_phys-y           := 0x80800000
 
diff --git a/arch/arm/mach-prima2/Makefile.boot b/arch/arm/mach-prima2/Makefile.boot
index d023db3ae4ff..c77a4883a4ee 100644
--- a/arch/arm/mach-prima2/Makefile.boot
+++ b/arch/arm/mach-prima2/Makefile.boot
@@ -1,3 +1,3 @@
-zreladdr-y              := 0x00008000
+zreladdr-y              += 0x00008000
 params_phys-y           := 0x00000100
 initrd_phys-y           := 0x00800000
diff --git a/arch/arm/mach-prima2/clock.c b/arch/arm/mach-prima2/clock.c
index f9a2aaf63f71..615a4e75ceab 100644
--- a/arch/arm/mach-prima2/clock.c
+++ b/arch/arm/mach-prima2/clock.c
@@ -481,6 +481,7 @@ static void __init sirfsoc_clk_init(void)
 
 static struct of_device_id clkc_ids[] = {
         { .compatible = "sirf,prima2-clkc" },
+        {},
 };
 
 void __init sirfsoc_of_clk_init(void)
diff --git a/arch/arm/mach-prima2/irq.c b/arch/arm/mach-prima2/irq.c
index c3404cbb6ff7..7af254d046ba 100644
--- a/arch/arm/mach-prima2/irq.c
+++ b/arch/arm/mach-prima2/irq.c
@@ -51,6 +51,7 @@ static __init void sirfsoc_irq_init(void)
 
 static struct of_device_id intc_ids[]  = {
         { .compatible = "sirf,prima2-intc" },
+        {},
 };
 
 void __init sirfsoc_of_irq_init(void)
diff --git a/arch/arm/mach-prima2/rstc.c b/arch/arm/mach-prima2/rstc.c
index d074786e83d4..492cfa8d2610 100644
--- a/arch/arm/mach-prima2/rstc.c
+++ b/arch/arm/mach-prima2/rstc.c
@@ -19,6 +19,7 @@ static DEFINE_MUTEX(rstc_lock);
 
 static struct of_device_id rstc_ids[]  = {
         { .compatible = "sirf,prima2-rstc" },
+        {},
 };
 
 static int __init sirfsoc_of_rstc_init(void)
diff --git a/arch/arm/mach-prima2/timer.c b/arch/arm/mach-prima2/timer.c
index 44027f34a88a..ed7ec48d11da 100644
--- a/arch/arm/mach-prima2/timer.c
+++ b/arch/arm/mach-prima2/timer.c
@@ -190,6 +190,7 @@ static void __init sirfsoc_timer_init(void)
 
 static struct of_device_id timer_ids[] = {
         { .compatible = "sirf,prima2-tick" },
+        {},
 };
 
 static void __init sirfsoc_of_timer_map(void)
diff --git a/arch/arm/mach-pxa/Makefile.boot b/arch/arm/mach-pxa/Makefile.boot
index 1ead67178eca..2c1ae92f2106 100644
--- a/arch/arm/mach-pxa/Makefile.boot
+++ b/arch/arm/mach-pxa/Makefile.boot
@@ -1,2 +1,2 @@
-   zreladdr-y   := 0xa0008000
+   zreladdr-y   += 0xa0008000
 
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index b6a51340270b..d940e8a72270 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -839,8 +839,8 @@ static void __init cm_x300_init(void)
         cm_x300_init_bl();
 }
 
-static void __init cm_x300_fixup(struct machine_desc *mdesc, struct tag *tags,
-                                 char **cmdline, struct meminfo *mi)
+static void __init cm_x300_fixup(struct tag *tags, char **cmdline,
+                                 struct meminfo *mi)
 {
         /* Make sure that mi->bank[0].start = PHYS_ADDR */
         for (; tags->hdr.size; tags = tag_next(tags))
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 185a37cad254..3e9483b06053 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -705,8 +705,8 @@ static void __init corgi_init(void)
         platform_add_devices(devices, ARRAY_SIZE(devices));
 }
 
-static void __init fixup_corgi(struct machine_desc *desc,
-                struct tag *tags, char **cmdline, struct meminfo *mi)
+static void __init fixup_corgi(struct tag *tags, char **cmdline,
+                               struct meminfo *mi)
 {
         sharpsl_save_param();
         mi->nr_banks=1;
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index b4599ec9d619..e4a1f4dc89ff 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -41,8 +41,7 @@
 #include "clock.h"
 
 /* Only e800 has 128MB RAM */
-void __init eseries_fixup(struct machine_desc *desc,
-        struct tag *tags, char **cmdline, struct meminfo *mi)
+void __init eseries_fixup(struct tag *tags, char **cmdline, struct meminfo *mi)
 {
         mi->nr_banks=1;
         mi->bank[0].start = 0xa0000000;
diff --git a/arch/arm/mach-pxa/eseries.h b/arch/arm/mach-pxa/eseries.h
index 5930f5e2a123..be921965e91a 100644
--- a/arch/arm/mach-pxa/eseries.h
+++ b/arch/arm/mach-pxa/eseries.h
@@ -1,5 +1,4 @@
-void __init eseries_fixup(struct machine_desc *desc,
-        struct tag *tags, char **cmdline, struct meminfo *mi);
+void __init eseries_fixup(struct tag *tags, char **cmdline, struct meminfo *mi);
 
 extern struct pxa2xx_udc_mach_info e7xx_udc_mach_info;
 extern struct pxaficp_platform_data e7xx_ficp_platform_data;
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index d493a230addf..8d9200f92268 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -18,6 +18,8 @@
 #include <linux/io.h>
 #include <linux/irq.h>
 
+#include <asm/exception.h>
+
 #include <mach/hardware.h>
 #include <mach/irqs.h>
 #include <mach/gpio-pxa.h>
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index a113ea9ab4ab..948ce3e729fa 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -454,8 +454,8 @@ static void __init poodle_init(void)
         poodle_init_spi();
 }
 
-static void __init fixup_poodle(struct machine_desc *desc,
-                struct tag *tags, char **cmdline, struct meminfo *mi)
+static void __init fixup_poodle(struct tag *tags, char **cmdline,
+                                struct meminfo *mi)
 {
         sharpsl_save_param();
         mi->nr_banks=1;
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
index df4356e8acae..72001ec6e7b5 100644
--- a/arch/arm/mach-pxa/saar.c
+++ b/arch/arm/mach-pxa/saar.c
@@ -540,7 +540,7 @@ static struct mtd_partition saar_onenand_partitions[] = {
         }, {
                 .name           = "filesystem",
                 .offset         = MTDPART_OFS_APPEND,
-                .size           = SZ_48M,
+                .size           = SZ_32M + SZ_16M,
                 .mask_flags     = 0,
         }
 };
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 438c7b5e451f..d8dec9113aad 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -970,8 +970,8 @@ static void __init spitz_init(void)
         spitz_i2c_init();
 }
 
-static void __init spitz_fixup(struct machine_desc *desc,
-                struct tag *tags, char **cmdline, struct meminfo *mi)
+static void __init spitz_fixup(struct tag *tags, char **cmdline,
+                               struct meminfo *mi)
 {
         sharpsl_save_param();
         mi->nr_banks = 1;
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 9f69a2682693..402b0c96613b 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -960,8 +960,8 @@ static void __init tosa_init(void)
         platform_add_devices(devices, ARRAY_SIZE(devices));
 }
 
-static void __init fixup_tosa(struct machine_desc *desc,
-                struct tag *tags, char **cmdline, struct meminfo *mi)
+static void __init fixup_tosa(struct tag *tags, char **cmdline,
+                              struct meminfo *mi)
 {
         sharpsl_save_param();
         mi->nr_banks=1;
diff --git a/arch/arm/mach-pxa/xcep.c b/arch/arm/mach-pxa/xcep.c
index acc600f5e72f..937c42845df9 100644
--- a/arch/arm/mach-pxa/xcep.c
+++ b/arch/arm/mach-pxa/xcep.c
@@ -142,8 +142,7 @@ static struct platform_device *devices[] __initdata = {
 
 /* We have to state that there are HWMON devices on the I2C bus on XCEP.
  * Drivers for HWMON verify capabilities of the adapter when loading and
- * refuse to attach if the adapter doesn't support HWMON class of devices.
- * See also Documentation/i2c/porting-clients. */
+ * refuse to attach if the adapter doesn't support HWMON class of devices. */
 static struct i2c_pxa_platform_data xcep_i2c_platform_data  = {
         .class = I2C_CLASS_HWMON
 };
diff --git a/arch/arm/mach-realview/Makefile.boot b/arch/arm/mach-realview/Makefile.boot
index d97e003d3df4..d2c3d788f688 100644
--- a/arch/arm/mach-realview/Makefile.boot
+++ b/arch/arm/mach-realview/Makefile.boot
@@ -1,9 +1,9 @@
 ifeq ($(CONFIG_REALVIEW_HIGH_PHYS_OFFSET),y)
-   zreladdr-y   := 0x70008000
+   zreladdr-y   += 0x70008000
 params_phys-y   := 0x70000100
 initrd_phys-y   := 0x70800000
 else
-   zreladdr-y   := 0x00008000
+   zreladdr-y   += 0x00008000
 params_phys-y   := 0x00000100
 initrd_phys-y   := 0x00800000
 endif
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 5c23450d2d1d..d5ed5d4f77d6 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -517,8 +517,7 @@ void __init realview_timer_init(unsigned int timer_irq)
 /*
  * Setup the memory banks.
  */
-void realview_fixup(struct machine_desc *mdesc, struct tag *tags, char **from,
-                    struct meminfo *meminfo)
+void realview_fixup(struct tag *tags, char **from, struct meminfo *meminfo)
 {
         /*
          * Most RealView platforms have 512MB contiguous RAM at 0x70000000.
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 5c83d1e87a03..47259c89a75e 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -63,8 +63,8 @@ extern int realview_flash_register(struct resource *res, u32 num);
 extern int realview_eth_register(const char *name, struct resource *res);
 extern int realview_usb_register(struct resource *res);
 extern void realview_init_early(void);
-extern void realview_fixup(struct machine_desc *mdesc, struct tag *tags,
-                           char **from, struct meminfo *meminfo);
+extern void realview_fixup(struct tag *tags, char **from,
+                           struct meminfo *meminfo);
 extern void (*realview_reset)(char);
 
 #endif
diff --git a/arch/arm/mach-realview/include/mach/board-pb1176.h b/arch/arm/mach-realview/include/mach/board-pb1176.h
index 002ab5d8c11c..2a15fef94730 100644
--- a/arch/arm/mach-realview/include/mach/board-pb1176.h
+++ b/arch/arm/mach-realview/include/mach/board-pb1176.h
@@ -70,6 +70,7 @@
 
 #define REALVIEW_DC1176_GIC_CPU_BASE            0x10120000 /* GIC CPU interface, on devchip */
 #define REALVIEW_DC1176_GIC_DIST_BASE           0x10121000 /* GIC distributor, on devchip */
+#define REALVIEW_DC1176_ROM_BASE                0x10200000 /* 16KiB NRAM preudo-ROM, on devchip */
 #define REALVIEW_PB1176_GIC_CPU_BASE            0x10040000 /* GIC CPU interface, on FPGA */
 #define REALVIEW_PB1176_GIC_DIST_BASE           0x10041000 /* GIC distributor, on FPGA */
 #define REALVIEW_PB1176_L220_BASE               0x10110000 /* L220 registers */
diff --git a/arch/arm/mach-realview/include/mach/system.h b/arch/arm/mach-realview/include/mach/system.h
index a30f2e3ec178..6657ff231161 100644
--- a/arch/arm/mach-realview/include/mach/system.h
+++ b/arch/arm/mach-realview/include/mach/system.h
@@ -44,6 +44,7 @@ static inline void arch_reset(char mode, const char *cmd)
          */
         if (realview_reset)
                 realview_reset(mode);
+        dsb();
 }
 
 #endif
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index 4ae943bafa92..e83c654a58d0 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -52,12 +52,10 @@ void __init smp_init_cpus(void)
         ncores = scu_base ? scu_get_core_count(scu_base) : 1;
 
         /* sanity check */
-        if (ncores > NR_CPUS) {
-                printk(KERN_WARNING
-                       "Realview: no. of cores (%d) greater than configured "
-                       "maximum of %d - clipping\n",
-                       ncores, NR_CPUS);
-                ncores = NR_CPUS;
+        if (ncores > nr_cpu_ids) {
+                pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",
+                        ncores, nr_cpu_ids);
+                ncores = nr_cpu_ids;
         }
 
         for (i = 0; i < ncores; i++)
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index ad5671acb66a..865d440fcf58 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -26,6 +26,8 @@
 #include <linux/amba/pl061.h>
 #include <linux/amba/mmci.h>
 #include <linux/amba/pl022.h>
+#include <linux/mtd/physmap.h>
+#include <linux/mtd/partitions.h>
 #include <linux/io.h>
 
 #include <mach/hardware.h>
@@ -204,22 +206,48 @@ static struct amba_device *amba_devs[] __initdata = {
  * RealView PB1176 platform devices
  */
 static struct resource realview_pb1176_flash_resources[] = {
-        [0] = {
+        {
                 .start          = REALVIEW_PB1176_FLASH_BASE,
                 .end            = REALVIEW_PB1176_FLASH_BASE + REALVIEW_PB1176_FLASH_SIZE - 1,
                 .flags          = IORESOURCE_MEM,
         },
-        [1] = {
+#ifdef CONFIG_REALVIEW_PB1176_SECURE_FLASH
+        {
                 .start          = REALVIEW_PB1176_SEC_FLASH_BASE,
                 .end            = REALVIEW_PB1176_SEC_FLASH_BASE + REALVIEW_PB1176_SEC_FLASH_SIZE - 1,
                 .flags          = IORESOURCE_MEM,
         },
-};
-#ifdef CONFIG_REALVIEW_PB1176_SECURE_FLASH
-#define PB1176_FLASH_BLOCKS     2
-#else
-#define PB1176_FLASH_BLOCKS     1
 #endif
+};
+
+static struct physmap_flash_data pb1176_rom_pdata = {
+        .probe_type     = "map_rom",
+        .width          = 4,
+        .nr_parts       = 0,
+};
+
+static struct resource pb1176_rom_resources[] = {
+        /*
+         * This exposes the PB1176 DevChip ROM as an MTD ROM mapping.
+         * The reference manual states that this is actually a pseudo-ROM
+         * programmed in NVRAM.
+         */
+        {
+                .start          = REALVIEW_DC1176_ROM_BASE,
+                .end            = REALVIEW_DC1176_ROM_BASE + SZ_16K - 1,
+                .flags          = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device pb1176_rom_device = {
+        .name           = "physmap-flash",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(pb1176_rom_resources),
+        .resource       = pb1176_rom_resources,
+        .dev = {
+                .platform_data = &pb1176_rom_pdata,
+        },
+};
 
 static struct resource realview_pb1176_smsc911x_resources[] = {
         [0] = {
@@ -316,8 +344,7 @@ static void realview_pb1176_reset(char mode)
         __raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl);
 }
 
-static void realview_pb1176_fixup(struct machine_desc *mdesc,
-                                  struct tag *tags, char **from,
+static void realview_pb1176_fixup(struct tag *tags, char **from,
                                   struct meminfo *meminfo)
 {
         /*
@@ -338,7 +365,8 @@ static void __init realview_pb1176_init(void)
 #endif
 
         realview_flash_register(realview_pb1176_flash_resources,
-                                PB1176_FLASH_BLOCKS);
+                                ARRAY_SIZE(realview_pb1176_flash_resources));
+        platform_device_register(&pb1176_rom_device);
         realview_eth_register(NULL, realview_pb1176_smsc911x_resources);
         platform_device_register(&realview_i2c_device);
         realview_usb_register(realview_pb1176_isp1761_resources);
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index 363b0ab56150..3e1eb2eb8132 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -319,8 +319,8 @@ static struct sys_timer realview_pbx_timer = {
         .init           = realview_pbx_timer_init,
 };
 
-static void realview_pbx_fixup(struct machine_desc *mdesc, struct tag *tags,
-                               char **from, struct meminfo *meminfo)
+static void realview_pbx_fixup(struct tag *tags, char **from,
+                               struct meminfo *meminfo)
 {
 #ifdef CONFIG_SPARSEMEM
         /*
@@ -335,7 +335,7 @@ static void realview_pbx_fixup(struct machine_desc *mdesc, struct tag *tags,
         meminfo->bank[2].size = SZ_256M;
         meminfo->nr_banks = 3;
 #else
-        realview_fixup(mdesc, tags, from, meminfo);
+        realview_fixup(tags, from, meminfo);
 #endif
 }
 
diff --git a/arch/arm/mach-rpc/Makefile.boot b/arch/arm/mach-rpc/Makefile.boot
index 9c9e7685ec7c..ae2df0d7d037 100644
--- a/arch/arm/mach-rpc/Makefile.boot
+++ b/arch/arm/mach-rpc/Makefile.boot
@@ -1,4 +1,4 @@
-   zreladdr-y   := 0x10008000
+   zreladdr-y   += 0x10008000
 params_phys-y   := 0x10000100
 initrd_phys-y   := 0x18000000
 
diff --git a/arch/arm/mach-rpc/include/mach/hardware.h b/arch/arm/mach-rpc/include/mach/hardware.h
index dde6b3c0e299..050d63c74cc1 100644
--- a/arch/arm/mach-rpc/include/mach/hardware.h
+++ b/arch/arm/mach-rpc/include/mach/hardware.h
@@ -36,7 +36,7 @@
 
 #define EASI_SIZE               0x08000000      /* EASI I/O */
 #define EASI_START              0x08000000
-#define EASI_BASE               0xe5000000
+#define EASI_BASE               IOMEM(0xe5000000)
 
 #define IO_START                0x03000000      /* I/O */
 #define IO_SIZE                 0x01000000
@@ -51,21 +51,20 @@
 /*
  * IO Addresses
  */
-#define VIDC_BASE               IOMEM(0xe0400000)
-#define EXPMASK_BASE            0xe0360000
-#define IOMD_BASE               IOMEM(0xe0200000)
-#define IOC_BASE                IOMEM(0xe0200000)
-#define PCIO_BASE               IOMEM(0xe0010000)
-#define FLOPPYDMA_BASE          IOMEM(0xe002a000)
+#define ECARD_EASI_BASE         (EASI_BASE)
+#define VIDC_BASE               (IO_BASE + 0x00400000)
+#define EXPMASK_BASE            (IO_BASE + 0x00360000)
+#define ECARD_IOC4_BASE         (IO_BASE + 0x00270000)
+#define ECARD_IOC_BASE          (IO_BASE + 0x00240000)
+#define IOMD_BASE               (IO_BASE + 0x00200000)
+#define IOC_BASE                (IO_BASE + 0x00200000)
+#define ECARD_MEMC8_BASE        (IO_BASE + 0x0002b000)
+#define FLOPPYDMA_BASE          (IO_BASE + 0x0002a000)
+#define PCIO_BASE               (IO_BASE + 0x00010000)
+#define ECARD_MEMC_BASE         (IO_BASE + 0x00000000)
 
 #define vidc_writel(val)        __raw_writel(val, VIDC_BASE)
 
-#define IO_EC_EASI_BASE         0x81400000
-#define IO_EC_IOC4_BASE         0x8009c000
-#define IO_EC_IOC_BASE          0x80090000
-#define IO_EC_MEMC8_BASE        0x8000ac00
-#define IO_EC_MEMC_BASE         0x80000000
-
 #define NETSLOT_BASE            0x0302b000
 #define NETSLOT_SIZE            0x00001000
 
diff --git a/arch/arm/mach-rpc/include/mach/io.h b/arch/arm/mach-rpc/include/mach/io.h
index 20da7f486e51..695f4ed2e11b 100644
--- a/arch/arm/mach-rpc/include/mach/io.h
+++ b/arch/arm/mach-rpc/include/mach/io.h
@@ -15,195 +15,18 @@
 
 #include <mach/hardware.h>
 
-#define IO_SPACE_LIMIT 0xffffffff
+#define IO_SPACE_LIMIT 0xffff
 
 /*
- * We use two different types of addressing - PC style addresses, and ARM
- * addresses.  PC style accesses the PC hardware with the normal PC IO
- * addresses, eg 0x3f8 for serial#1.  ARM addresses are 0x80000000+
- * and are translated to the start of IO.  Note that all addresses are
- * shifted left!
- */
-#define __PORT_PCIO(x)  (!((x) & 0x80000000))
-
-/*
- * Dynamic IO functions.
- */
-static inline void __outb (unsigned int value, unsigned int port)
-{
-        unsigned long temp;
-        __asm__ __volatile__(
-        "tst    %2, #0x80000000\n\t"
-        "mov    %0, %4\n\t"
-        "addeq  %0, %0, %3\n\t"
-        "strb   %1, [%0, %2, lsl #2]    @ outb"
-        : "=&r" (temp)
-        : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
-        : "cc");
-}
-
-static inline void __outw (unsigned int value, unsigned int port)
-{
-        unsigned long temp;
-        __asm__ __volatile__(
-        "tst    %2, #0x80000000\n\t"
-        "mov    %0, %4\n\t"
-        "addeq  %0, %0, %3\n\t"
-        "str    %1, [%0, %2, lsl #2]    @ outw"
-        : "=&r" (temp)
-        : "r" (value|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
-        : "cc");
-}
-
-static inline void __outl (unsigned int value, unsigned int port)
-{
-        unsigned long temp;
-        __asm__ __volatile__(
-        "tst    %2, #0x80000000\n\t"
-        "mov    %0, %4\n\t"
-        "addeq  %0, %0, %3\n\t"
-        "str    %1, [%0, %2, lsl #2]    @ outl"
-        : "=&r" (temp)
-        : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
-        : "cc");
-}
-
-#define DECLARE_DYN_IN(sz,fnsuffix,instr)                                       \
-static inline unsigned sz __in##fnsuffix (unsigned int port)            \
-{                                                                               \
-        unsigned long temp, value;                                              \
-        __asm__ __volatile__(                                                   \
-        "tst    %2, #0x80000000\n\t"                                            \
-        "mov    %0, %4\n\t"                                                     \
-        "addeq  %0, %0, %3\n\t"                                                 \
-        "ldr" instr "   %1, [%0, %2, lsl #2]    @ in" #fnsuffix                 \
-        : "=&r" (temp), "=r" (value)                                            \
-        : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)                \
-        : "cc");                                                                \
-        return (unsigned sz)value;                                              \
-}
-
-static inline void __iomem *__deprecated __ioaddr(unsigned int port)
-{
-        void __iomem *ret;
-        if (__PORT_PCIO(port))
-                ret = PCIO_BASE;
-        else
-                ret = IO_BASE;
-        return ret + (port << 2);
-}
-
-#define DECLARE_IO(sz,fnsuffix,instr)   \
-        DECLARE_DYN_IN(sz,fnsuffix,instr)
-
-DECLARE_IO(char,b,"b")
-DECLARE_IO(short,w,"")
-DECLARE_IO(int,l,"")
-
-#undef DECLARE_IO
-#undef DECLARE_DYN_IN
-
-/*
- * Constant address IO functions
+ * We need PC style IO addressing for:
+ *  - floppy (at 0x3f2,0x3f4,0x3f5,0x3f7)
+ *  - parport (at 0x278-0x27a, 0x27b-0x27f, 0x778-0x77a)
+ *  - 8250 serial (only for compile)
  *
- * These have to be macros for the 'J' constraint to work -
- * +/-4096 immediate operand.
+ * These peripherals are found in an area of MMIO which looks very much
+ * like an ISA bus, but with registers at the low byte of each word.
  */
-#define __outbc(value,port)                                                     \
-({                                                                              \
-        if (__PORT_PCIO((port)))                                                \
-                __asm__ __volatile__(                                           \
-                "strb   %0, [%1, %2]    @ outbc"                                \
-                : : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2));          \
-        else                                                                    \
-                __asm__ __volatile__(                                           \
-                "strb   %0, [%1, %2]    @ outbc"                                \
-                : : "r" (value), "r" (IO_BASE), "r" ((port) << 2));             \
-})
-
-#define __inbc(port)                                                            \
-({                                                                              \
-        unsigned char result;                                                   \
-        if (__PORT_PCIO((port)))                                                \
-                __asm__ __volatile__(                                           \
-                "ldrb   %0, [%1, %2]    @ inbc"                                 \
-                : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2));         \
-        else                                                                    \
-                __asm__ __volatile__(                                           \
-                "ldrb   %0, [%1, %2]    @ inbc"                                 \
-                : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2));            \
-        result;                                                                 \
-})
-
-#define __outwc(value,port)                                                     \
-({                                                                              \
-        unsigned long __v = value;                                              \
-        if (__PORT_PCIO((port)))                                                \
-                __asm__ __volatile__(                                           \
-                "str    %0, [%1, %2]    @ outwc"                                \
-                : : "r" (__v|__v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2));    \
-        else                                                                    \
-                __asm__ __volatile__(                                           \
-                "str    %0, [%1, %2]    @ outwc"                                \
-                : : "r" (__v|__v<<16), "r" (IO_BASE), "r" ((port) << 2));               \
-})
-
-#define __inwc(port)                                                            \
-({                                                                              \
-        unsigned short result;                                                  \
-        if (__PORT_PCIO((port)))                                                \
-                __asm__ __volatile__(                                           \
-                "ldr    %0, [%1, %2]    @ inwc"                                 \
-                : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2));         \
-        else                                                                    \
-                __asm__ __volatile__(                                           \
-                "ldr    %0, [%1, %2]    @ inwc"                                 \
-                : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2));            \
-        result & 0xffff;                                                        \
-})
-
-#define __outlc(value,port)                                                     \
-({                                                                              \
-        unsigned long __v = value;                                              \
-        if (__PORT_PCIO((port)))                                                \
-                __asm__ __volatile__(                                           \
-                "str    %0, [%1, %2]    @ outlc"                                \
-                : : "r" (__v), "r" (PCIO_BASE), "Jr" ((port) << 2));            \
-        else                                                                    \
-                __asm__ __volatile__(                                           \
-                "str    %0, [%1, %2]    @ outlc"                                \
-                : : "r" (__v), "r" (IO_BASE), "r" ((port) << 2));               \
-})
-
-#define __inlc(port)                                                            \
-({                                                                              \
-        unsigned long result;                                                   \
-        if (__PORT_PCIO((port)))                                                \
-                __asm__ __volatile__(                                           \
-                "ldr    %0, [%1, %2]    @ inlc"                                 \
-                : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2));         \
-        else                                                                    \
-                __asm__ __volatile__(                                           \
-                "ldr    %0, [%1, %2]    @ inlc"                                 \
-                : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2));            \
-        result;                                                                 \
-})
-
-#define inb(p)          (__builtin_constant_p((p)) ? __inbc(p)    : __inb(p))
-#define inw(p)          (__builtin_constant_p((p)) ? __inwc(p)    : __inw(p))
-#define inl(p)          (__builtin_constant_p((p)) ? __inlc(p)    : __inl(p))
-#define outb(v,p)       (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))
-#define outw(v,p)       (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
-#define outl(v,p)       (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
-
-/* the following macro is deprecated */
-#define ioaddr(port)    ((unsigned long)__ioaddr((port)))
-
-#define insb(p,d,l)     __raw_readsb(__ioaddr(p),d,l)
-#define insw(p,d,l)     __raw_readsw(__ioaddr(p),d,l)
-
-#define outsb(p,d,l)    __raw_writesb(__ioaddr(p),d,l)
-#define outsw(p,d,l)    __raw_writesw(__ioaddr(p),d,l)
+#define __io(a)         (PCIO_BASE + ((a) << 2))
 
 /*
  * 1:1 mapping for ioremapped regions.
diff --git a/arch/arm/mach-rpc/riscpc.c b/arch/arm/mach-rpc/riscpc.c
index 580b3c73d2c7..1e0e60d04622 100644
--- a/arch/arm/mach-rpc/riscpc.c
+++ b/arch/arm/mach-rpc/riscpc.c
@@ -74,7 +74,7 @@ static struct map_desc rpc_io_desc[] __initdata = {
                 .length         =       IO_SIZE  ,
                 .type           = MT_DEVICE
         }, {    /* EASI space   */
-                .virtual        = EASI_BASE,
+                .virtual        = (unsigned long)EASI_BASE,
                 .pfn            = __phys_to_pfn(EASI_START),
                 .length         = EASI_SIZE,
                 .type           = MT_DEVICE
diff --git a/arch/arm/mach-s3c2410/Makefile.boot b/arch/arm/mach-s3c2410/Makefile.boot
index 58c1dd7f8e1d..4457605ba04a 100644
--- a/arch/arm/mach-s3c2410/Makefile.boot
+++ b/arch/arm/mach-s3c2410/Makefile.boot
@@ -1,7 +1,7 @@
 ifeq ($(CONFIG_PM_H1940),y)
-        zreladdr-y              := 0x30108000
+        zreladdr-y      += 0x30108000
         params_phys-y   := 0x30100100
 else
-        zreladdr-y              := 0x30008000
+        zreladdr-y      += 0x30008000
         params_phys-y   := 0x30000100
 endif
diff --git a/arch/arm/mach-s3c2410/include/mach/io.h b/arch/arm/mach-s3c2410/include/mach/io.h
index 9813dbf2ae4f..118749f37c4c 100644
--- a/arch/arm/mach-s3c2410/include/mach/io.h
+++ b/arch/arm/mach-s3c2410/include/mach/io.h
@@ -199,8 +199,6 @@ DECLARE_IO(int,l,"")
 #define outw(v,p)       (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
 #define outl(v,p)       (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
 #define __ioaddr(p)     (__builtin_constant_p((p)) ? __ioaddr(p)  : __ioaddrc(p))
-/* the following macro is deprecated */
-#define ioaddr(port)    __ioaddr((port))
 
 #define insb(p,d,l)     __raw_readsb(__ioaddr(p),d,l)
 #define insw(p,d,l)     __raw_readsw(__ioaddr(p),d,l)
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c
index f1d3bd8f6f17..343a540d86a9 100644
--- a/arch/arm/mach-s3c2410/s3c2410.c
+++ b/arch/arm/mach-s3c2410/s3c2410.c
@@ -170,7 +170,9 @@ int __init s3c2410_init(void)
 {
         printk("S3C2410: Initialising architecture\n");
 
+#ifdef CONFIG_PM
         register_syscore_ops(&s3c2410_pm_syscore_ops);
+#endif
         register_syscore_ops(&s3c24xx_irq_syscore_ops);
 
         return sysdev_register(&s3c2410_sysdev);
diff --git a/arch/arm/mach-s3c2412/mach-smdk2413.c b/arch/arm/mach-s3c2412/mach-smdk2413.c
index 834cfb61bcfe..3391713e0c92 100644
--- a/arch/arm/mach-s3c2412/mach-smdk2413.c
+++ b/arch/arm/mach-s3c2412/mach-smdk2413.c
@@ -92,8 +92,7 @@ static struct platform_device *smdk2413_devices[] __initdata = {
         &s3c_device_usbgadget,
 };
 
-static void __init smdk2413_fixup(struct machine_desc *desc,
-                                  struct tag *tags, char **cmdline,
+static void __init smdk2413_fixup(struct tag *tags, char **cmdline,
                                   struct meminfo *mi)
 {
         if (tags != phys_to_virt(S3C2410_SDRAM_PA + 0x100)) {
diff --git a/arch/arm/mach-s3c2412/mach-vstms.c b/arch/arm/mach-s3c2412/mach-vstms.c
index 83544ebe20ac..b6ed4573553a 100644
--- a/arch/arm/mach-s3c2412/mach-vstms.c
+++ b/arch/arm/mach-s3c2412/mach-vstms.c
@@ -129,9 +129,8 @@ static struct platform_device *vstms_devices[] __initdata = {
         &s3c_device_nand,
 };
 
-static void __init vstms_fixup(struct machine_desc *desc,
-                                  struct tag *tags, char **cmdline,
-                                  struct meminfo *mi)
+static void __init vstms_fixup(struct tag *tags, char **cmdline,
+                               struct meminfo *mi)
 {
         if (tags != phys_to_virt(S3C2410_SDRAM_PA + 0x100)) {
                 mi->nr_banks=1;
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c
index ef0958d3e5c6..57a1e01e4e50 100644
--- a/arch/arm/mach-s3c2412/s3c2412.c
+++ b/arch/arm/mach-s3c2412/s3c2412.c
@@ -245,7 +245,9 @@ int __init s3c2412_init(void)
 {
         printk("S3C2412: Initialising architecture\n");
 
+#ifdef CONFIG_PM
         register_syscore_ops(&s3c2412_pm_syscore_ops);
+#endif
         register_syscore_ops(&s3c24xx_irq_syscore_ops);
 
         return sysdev_register(&s3c2412_sysdev);
diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c
index 494ce913dc95..20b3fdfb3051 100644
--- a/arch/arm/mach-s3c2416/s3c2416.c
+++ b/arch/arm/mach-s3c2416/s3c2416.c
@@ -97,7 +97,9 @@ int __init s3c2416_init(void)
 
         s3c_fb_setname("s3c2443-fb");
 
+#ifdef CONFIG_PM
         register_syscore_ops(&s3c2416_pm_syscore_ops);
+#endif
         register_syscore_ops(&s3c24xx_irq_syscore_ops);
 
         return sysdev_register(&s3c2416_sysdev);
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c
index ce99ff72838d..2270d3360216 100644
--- a/arch/arm/mach-s3c2440/s3c2440.c
+++ b/arch/arm/mach-s3c2440/s3c2440.c
@@ -55,7 +55,9 @@ int __init s3c2440_init(void)
 
         /* register suspend/resume handlers */
 
+#ifdef CONFIG_PM
         register_syscore_ops(&s3c2410_pm_syscore_ops);
+#endif
         register_syscore_ops(&s3c244x_pm_syscore_ops);
         register_syscore_ops(&s3c24xx_irq_syscore_ops);
 
diff --git a/arch/arm/mach-s3c2440/s3c2442.c b/arch/arm/mach-s3c2440/s3c2442.c
index 9ad99f8016a1..6f2b65e6e068 100644
--- a/arch/arm/mach-s3c2440/s3c2442.c
+++ b/arch/arm/mach-s3c2440/s3c2442.c
@@ -169,7 +169,9 @@ int __init s3c2442_init(void)
 {
         printk("S3C2442: Initialising architecture\n");
 
+#ifdef CONFIG_PM
         register_syscore_ops(&s3c2410_pm_syscore_ops);
+#endif
         register_syscore_ops(&s3c244x_pm_syscore_ops);
         register_syscore_ops(&s3c24xx_irq_syscore_ops);
 
diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c
index a1a7176675b9..38058af48972 100644
--- a/arch/arm/mach-s3c2443/clock.c
+++ b/arch/arm/mach-s3c2443/clock.c
@@ -128,7 +128,7 @@ static int s3c2443_armclk_setrate(struct clk *clk, unsigned long rate)
                 unsigned long clkcon0;
 
                 clkcon0 = __raw_readl(S3C2443_CLKDIV0);
-                clkcon0 &= S3C2443_CLKDIV0_ARMDIV_MASK;
+                clkcon0 &= ~S3C2443_CLKDIV0_ARMDIV_MASK;
                 clkcon0 |= val << S3C2443_CLKDIV0_ARMDIV_SHIFT;
                 __raw_writel(clkcon0, S3C2443_CLKDIV0);
         }
diff --git a/arch/arm/mach-s3c64xx/Makefile.boot b/arch/arm/mach-s3c64xx/Makefile.boot
index ba41fdc0a586..c642333af3ed 100644
--- a/arch/arm/mach-s3c64xx/Makefile.boot
+++ b/arch/arm/mach-s3c64xx/Makefile.boot
@@ -1,2 +1,2 @@
-   zreladdr-y   := 0x50008000
+   zreladdr-y   += 0x50008000
 params_phys-y   := 0x50000100
diff --git a/arch/arm/mach-s3c64xx/dev-uart.c b/arch/arm/mach-s3c64xx/dev-uart.c
index f797f748b999..c681b99eda08 100644
--- a/arch/arm/mach-s3c64xx/dev-uart.c
+++ b/arch/arm/mach-s3c64xx/dev-uart.c
@@ -37,21 +37,10 @@ static struct resource s3c64xx_uart0_resource[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = IRQ_S3CUART_RX0,
-                .end    = IRQ_S3CUART_RX0,
+                .start  = IRQ_UART0,
+                .end    = IRQ_UART0,
                 .flags  = IORESOURCE_IRQ,
         },
-        [2] = {
-                .start  = IRQ_S3CUART_TX0,
-                .end    = IRQ_S3CUART_TX0,
-                .flags  = IORESOURCE_IRQ,
-
-        },
-        [3] = {
-                .start  = IRQ_S3CUART_ERR0,
-                .end    = IRQ_S3CUART_ERR0,
-                .flags  = IORESOURCE_IRQ,
-        }
 };
 
 static struct resource s3c64xx_uart1_resource[] = {
@@ -61,19 +50,8 @@ static struct resource s3c64xx_uart1_resource[] = {
                 .flags = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = IRQ_S3CUART_RX1,
-                .end    = IRQ_S3CUART_RX1,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                .start  = IRQ_S3CUART_TX1,
-                .end    = IRQ_S3CUART_TX1,
-                .flags  = IORESOURCE_IRQ,
-
-        },
-        [3] = {
-                .start  = IRQ_S3CUART_ERR1,
-                .end    = IRQ_S3CUART_ERR1,
+                .start  = IRQ_UART1,
+                .end    = IRQ_UART1,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -85,19 +63,8 @@ static struct resource s3c6xx_uart2_resource[] = {
                 .flags = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = IRQ_S3CUART_RX2,
-                .end    = IRQ_S3CUART_RX2,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                .start  = IRQ_S3CUART_TX2,
-                .end    = IRQ_S3CUART_TX2,
-                .flags  = IORESOURCE_IRQ,
-
-        },
-        [3] = {
-                .start  = IRQ_S3CUART_ERR2,
-                .end    = IRQ_S3CUART_ERR2,
+                .start  = IRQ_UART2,
+                .end    = IRQ_UART2,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -109,19 +76,8 @@ static struct resource s3c64xx_uart3_resource[] = {
                 .flags = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = IRQ_S3CUART_RX3,
-                .end    = IRQ_S3CUART_RX3,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                .start  = IRQ_S3CUART_TX3,
-                .end    = IRQ_S3CUART_TX3,
-                .flags  = IORESOURCE_IRQ,
-
-        },
-        [3] = {
-                .start  = IRQ_S3CUART_ERR3,
-                .end    = IRQ_S3CUART_ERR3,
+                .start  = IRQ_UART3,
+                .end    = IRQ_UART3,
                 .flags  = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/arm/mach-s3c64xx/include/mach/irqs.h b/arch/arm/mach-s3c64xx/include/mach/irqs.h
index c026f67a80de..443f85b3c203 100644
--- a/arch/arm/mach-s3c64xx/include/mach/irqs.h
+++ b/arch/arm/mach-s3c64xx/include/mach/irqs.h
@@ -27,36 +27,6 @@
 #define IRQ_VIC0_BASE   S3C_IRQ(0)
 #define IRQ_VIC1_BASE   S3C_IRQ(32)
 
-/* UART interrupts, each UART has 4 intterupts per channel so
- * use the space between the ISA and S3C main interrupts. Note, these
- * are not in the same order as the S3C24XX series! */
-
-#define IRQ_S3CUART_BASE0       (16)
-#define IRQ_S3CUART_BASE1       (20)
-#define IRQ_S3CUART_BASE2       (24)
-#define IRQ_S3CUART_BASE3       (28)
-
-#define UART_IRQ_RXD            (0)
-#define UART_IRQ_ERR            (1)
-#define UART_IRQ_TXD            (2)
-#define UART_IRQ_MODEM          (3)
-
-#define IRQ_S3CUART_RX0         (IRQ_S3CUART_BASE0 + UART_IRQ_RXD)
-#define IRQ_S3CUART_TX0         (IRQ_S3CUART_BASE0 + UART_IRQ_TXD)
-#define IRQ_S3CUART_ERR0        (IRQ_S3CUART_BASE0 + UART_IRQ_ERR)
-
-#define IRQ_S3CUART_RX1         (IRQ_S3CUART_BASE1 + UART_IRQ_RXD)
-#define IRQ_S3CUART_TX1         (IRQ_S3CUART_BASE1 + UART_IRQ_TXD)
-#define IRQ_S3CUART_ERR1        (IRQ_S3CUART_BASE1 + UART_IRQ_ERR)
-
-#define IRQ_S3CUART_RX2         (IRQ_S3CUART_BASE2 + UART_IRQ_RXD)
-#define IRQ_S3CUART_TX2         (IRQ_S3CUART_BASE2 + UART_IRQ_TXD)
-#define IRQ_S3CUART_ERR2        (IRQ_S3CUART_BASE2 + UART_IRQ_ERR)
-
-#define IRQ_S3CUART_RX3         (IRQ_S3CUART_BASE3 + UART_IRQ_RXD)
-#define IRQ_S3CUART_TX3         (IRQ_S3CUART_BASE3 + UART_IRQ_TXD)
-#define IRQ_S3CUART_ERR3        (IRQ_S3CUART_BASE3 + UART_IRQ_ERR)
-
 /* VIC based IRQs */
 
 #define S3C64XX_IRQ_VIC0(x)     (IRQ_VIC0_BASE + (x))
diff --git a/arch/arm/mach-s3c64xx/irq.c b/arch/arm/mach-s3c64xx/irq.c
index 75d9a0e49193..b07357e94958 100644
--- a/arch/arm/mach-s3c64xx/irq.c
+++ b/arch/arm/mach-s3c64xx/irq.c
@@ -25,29 +25,6 @@
 #include <plat/irq-uart.h>
 #include <plat/cpu.h>
 
-static struct s3c_uart_irq uart_irqs[] = {
-        [0] = {
-                .regs           = S3C_VA_UART0,
-                .base_irq       = IRQ_S3CUART_BASE0,
-                .parent_irq     = IRQ_UART0,
-        },
-        [1] = {
-                .regs           = S3C_VA_UART1,
-                .base_irq       = IRQ_S3CUART_BASE1,
-                .parent_irq     = IRQ_UART1,
-        },
-        [2] = {
-                .regs           = S3C_VA_UART2,
-                .base_irq       = IRQ_S3CUART_BASE2,
-                .parent_irq     = IRQ_UART2,
-        },
-        [3] = {
-                .regs           = S3C_VA_UART3,
-                .base_irq       = IRQ_S3CUART_BASE3,
-                .parent_irq     = IRQ_UART3,
-        },
-};
-
 /* setup the sources the vic should advertise resume for, even though it
  * is not doing the wake (set_irq_wake needs to be valid) */
 #define IRQ_VIC0_RESUME (1 << (IRQ_RTC_TIC - IRQ_VIC0_BASE))
@@ -67,6 +44,4 @@ void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
 
         /* add the timer sub-irqs */
         s3c_init_vic_timer_irq(5, IRQ_TIMER0);
-
-        s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs));
 }
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index 9026249233ad..af0c2fe1ea37 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -65,7 +65,7 @@
 #include <plat/iic.h>
 #include <plat/pm.h>
 
-#include <sound/wm8915.h>
+#include <sound/wm8996.h>
 #include <sound/wm8962.h>
 #include <sound/wm9081.h>
 
@@ -614,7 +614,7 @@ static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
         .disable_touch = true,
 };
 
-static struct wm8915_retune_mobile_config wm8915_retune[] = {
+static struct wm8996_retune_mobile_config wm8996_retune[] = {
         {
                 .name = "Sub LPF",
                 .rate = 48000,
@@ -635,12 +635,12 @@ static struct wm8915_retune_mobile_config wm8915_retune[] = {
         },
 };
 
-static struct wm8915_pdata wm8915_pdata __initdata = {
+static struct wm8996_pdata wm8996_pdata __initdata = {
         .ldo_ena = S3C64XX_GPN(7),
         .gpio_base = CODEC_GPIO_BASE,
         .micdet_def = 1,
-        .inl_mode = WM8915_DIFFERRENTIAL_1,
-        .inr_mode = WM8915_DIFFERRENTIAL_1,
+        .inl_mode = WM8996_DIFFERRENTIAL_1,
+        .inr_mode = WM8996_DIFFERRENTIAL_1,
 
         .irq_flags = IRQF_TRIGGER_RISING,
 
@@ -652,8 +652,8 @@ static struct wm8915_pdata wm8915_pdata __initdata = {
                 0x020e, /* GPIO5 == CLKOUT */
         },
 
-        .retune_mobile_cfgs = wm8915_retune,
-        .num_retune_mobile_cfgs = ARRAY_SIZE(wm8915_retune),
+        .retune_mobile_cfgs = wm8996_retune,
+        .num_retune_mobile_cfgs = ARRAY_SIZE(wm8996_retune),
 };
 
 static struct wm8962_pdata wm8962_pdata __initdata = {
@@ -679,8 +679,8 @@ static struct i2c_board_info i2c_devs1[] __initdata = {
           .platform_data = &glenfarclas_pmic_pdata },
 
         { I2C_BOARD_INFO("wm1250-ev1", 0x27) },
-        { I2C_BOARD_INFO("wm8915", 0x1a),
-          .platform_data = &wm8915_pdata,
+        { I2C_BOARD_INFO("wm8996", 0x1a),
+          .platform_data = &wm8996_pdata,
           .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
         },
         { I2C_BOARD_INFO("wm9081", 0x6c),
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index ecbea92bf83b..a9f3183e0290 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -262,45 +262,6 @@ static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = {
         .cols           = 8,
 };
 
-static int smdk6410_backlight_init(struct device *dev)
-{
-        int ret;
-
-        ret = gpio_request(S3C64XX_GPF(15), "Backlight");
-        if (ret) {
-                printk(KERN_ERR "failed to request GPF for PWM-OUT1\n");
-                return ret;
-        }
-
-        /* Configure GPIO pin with S3C64XX_GPF15_PWM_TOUT1 */
-        s3c_gpio_cfgpin(S3C64XX_GPF(15), S3C_GPIO_SFN(2));
-
-        return 0;
-}
-
-static void smdk6410_backlight_exit(struct device *dev)
-{
-        s3c_gpio_cfgpin(S3C64XX_GPF(15), S3C_GPIO_OUTPUT);
-        gpio_free(S3C64XX_GPF(15));
-}
-
-static struct platform_pwm_backlight_data smdk6410_backlight_data = {
-        .pwm_id         = 1,
-        .max_brightness = 255,
-        .dft_brightness = 255,
-        .pwm_period_ns  = 78770,
-        .init           = smdk6410_backlight_init,
-        .exit           = smdk6410_backlight_exit,
-};
-
-static struct platform_device smdk6410_backlight_device = {
-        .name           = "pwm-backlight",
-        .dev            = {
-                .parent         = &s3c_device_timer[1].dev,
-                .platform_data  = &smdk6410_backlight_data,
-        },
-};
-
 static struct map_desc smdk6410_iodesc[] = {};
 
 static struct platform_device *smdk6410_devices[] __initdata = {
diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c
index 8bad64370689..055e2858b0dd 100644
--- a/arch/arm/mach-s3c64xx/pm.c
+++ b/arch/arm/mach-s3c64xx/pm.c
@@ -16,6 +16,7 @@
 #include <linux/suspend.h>
 #include <linux/serial_core.h>
 #include <linux/io.h>
+#include <linux/gpio.h>
 
 #include <mach/map.h>
 #include <mach/irqs.h>
diff --git a/arch/arm/mach-s5p64x0/Makefile.boot b/arch/arm/mach-s5p64x0/Makefile.boot
index ff90aa13bd67..79ece4055b02 100644
--- a/arch/arm/mach-s5p64x0/Makefile.boot
+++ b/arch/arm/mach-s5p64x0/Makefile.boot
@@ -1,2 +1,2 @@
-   zreladdr-y   := 0x20008000
+   zreladdr-y   += 0x20008000
 params_phys-y   := 0x20000100
diff --git a/arch/arm/mach-s5p64x0/irq-eint.c b/arch/arm/mach-s5p64x0/irq-eint.c
index 69ed4545112b..fe7380f5c3cd 100644
--- a/arch/arm/mach-s5p64x0/irq-eint.c
+++ b/arch/arm/mach-s5p64x0/irq-eint.c
@@ -129,7 +129,7 @@ static int s5p64x0_alloc_gc(void)
         }
 
         ct = gc->chip_types;
-        ct->chip.irq_ack = irq_gc_ack;
+        ct->chip.irq_ack = irq_gc_ack_set_bit;
         ct->chip.irq_mask = irq_gc_mask_set_bit;
         ct->chip.irq_unmask = irq_gc_mask_clr_bit;
         ct->chip.irq_set_type = s5p64x0_irq_eint_set_type;
diff --git a/arch/arm/mach-s5pc100/Makefile.boot b/arch/arm/mach-s5pc100/Makefile.boot
index ff90aa13bd67..79ece4055b02 100644
--- a/arch/arm/mach-s5pc100/Makefile.boot
+++ b/arch/arm/mach-s5pc100/Makefile.boot
@@ -1,2 +1,2 @@
-   zreladdr-y   := 0x20008000
+   zreladdr-y   += 0x20008000
 params_phys-y   := 0x20000100
diff --git a/arch/arm/mach-s5pv210/Makefile.boot b/arch/arm/mach-s5pv210/Makefile.boot
index ff90aa13bd67..79ece4055b02 100644
--- a/arch/arm/mach-s5pv210/Makefile.boot
+++ b/arch/arm/mach-s5pv210/Makefile.boot
@@ -1,2 +1,2 @@
-   zreladdr-y   := 0x20008000
+   zreladdr-y   += 0x20008000
 params_phys-y   := 0x20000100
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index 52a8e607bcc2..f5f8fa89679c 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -815,8 +815,7 @@ static struct clksrc_clk clksrcs[] = {
                 .reg_div = { .reg = S5P_CLK_DIV3, .shift = 20, .size = 4 },
         }, {
                 .clk            = {
-                        .name           = "sclk_cam",
-                        .devname        = "s5pv210-fimc.0",
+                        .name           = "sclk_cam0",
                         .enable         = s5pv210_clk_mask0_ctrl,
                         .ctrlbit        = (1 << 3),
                 },
@@ -825,8 +824,7 @@ static struct clksrc_clk clksrcs[] = {
                 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 12, .size = 4 },
         }, {
                 .clk            = {
-                        .name           = "sclk_cam",
-                        .devname        = "s5pv210-fimc.1",
+                        .name           = "sclk_cam1",
                         .enable         = s5pv210_clk_mask0_ctrl,
                         .ctrlbit        = (1 << 4),
                 },
diff --git a/arch/arm/mach-s5pv210/pm.c b/arch/arm/mach-s5pv210/pm.c
index 309e388a8a83..f149d278377b 100644
--- a/arch/arm/mach-s5pv210/pm.c
+++ b/arch/arm/mach-s5pv210/pm.c
@@ -88,7 +88,7 @@ static struct sleep_save s5pv210_core_save[] = {
         SAVE_ITEM(S3C2410_TCNTO(0)),
 };
 
-void s5pv210_cpu_suspend(unsigned long arg)
+static int s5pv210_cpu_suspend(unsigned long arg)
 {
         unsigned long tmp;
 
diff --git a/arch/arm/mach-sa1100/Makefile b/arch/arm/mach-sa1100/Makefile
index 73a5c6431792..ed7408d3216c 100644
--- a/arch/arm/mach-sa1100/Makefile
+++ b/arch/arm/mach-sa1100/Makefile
@@ -45,7 +45,6 @@ obj-$(CONFIG_SA1100_PLEB)		+= pleb.o
 obj-$(CONFIG_SA1100_SHANNON)            += shannon.o
 
 obj-$(CONFIG_SA1100_SIMPAD)             += simpad.o
-led-$(CONFIG_SA1100_SIMPAD)             += leds-simpad.o
 
 # LEDs support
 obj-$(CONFIG_LEDS) += $(led-y)
diff --git a/arch/arm/mach-sa1100/Makefile.boot b/arch/arm/mach-sa1100/Makefile.boot
index a56ad0417cf2..5a616f6e5612 100644
--- a/arch/arm/mach-sa1100/Makefile.boot
+++ b/arch/arm/mach-sa1100/Makefile.boot
@@ -1,6 +1,7 @@
-   zreladdr-y   := 0xc0008000
 ifeq ($(CONFIG_ARCH_SA1100),y)
-   zreladdr-$(CONFIG_SA1111)            := 0xc0208000
+   zreladdr-$(CONFIG_SA1111)            += 0xc0208000
+else
+   zreladdr-y   += 0xc0008000
 endif
 params_phys-y   := 0xc0000100
 initrd_phys-y   := 0xc0800000
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c
index 26257df19b63..6290ce28b883 100644
--- a/arch/arm/mach-sa1100/assabet.c
+++ b/arch/arm/mach-sa1100/assabet.c
@@ -301,8 +301,7 @@ static void __init get_assabet_scr(void)
 }
 
 static void __init
-fixup_assabet(struct machine_desc *desc, struct tag *tags,
-              char **cmdline, struct meminfo *mi)
+fixup_assabet(struct tag *tags, char **cmdline, struct meminfo *mi)
 {
         /* This must be done before any call to machine_has_neponset() */
         map_sa1100_gpio_regs();
diff --git a/arch/arm/mach-sa1100/include/mach/io.h b/arch/arm/mach-sa1100/include/mach/io.h
index d8b43f3dcd2d..dfc27ff08344 100644
--- a/arch/arm/mach-sa1100/include/mach/io.h
+++ b/arch/arm/mach-sa1100/include/mach/io.h
@@ -10,11 +10,9 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-#define IO_SPACE_LIMIT 0xffffffff
-
 /*
- * We don't actually have real ISA nor PCI buses, but there is so many 
- * drivers out there that might just work if we fake them...
+ * __io() is required to be an equivalent mapping to __mem_pci() for
+ * SOC_COMMON to work.
  */
 #define __io(a)         __typesafe_io(a)
 #define __mem_pci(a)    (a)
diff --git a/arch/arm/mach-sa1100/include/mach/simpad.h b/arch/arm/mach-sa1100/include/mach/simpad.h
index 9296c4513ce1..db28118103eb 100644
--- a/arch/arm/mach-sa1100/include/mach/simpad.h
+++ b/arch/arm/mach-sa1100/include/mach/simpad.h
@@ -48,32 +48,80 @@
 #define GPIO_SMART_CARD         GPIO_GPIO10
 #define IRQ_GPIO_SMARD_CARD     IRQ_GPIO10
 
-// CS3 Latch is write only, a shadow is necessary
+/*--- ucb1x00 GPIO ---*/
+#define SIMPAD_UCB1X00_GPIO_BASE        (GPIO_MAX + 1)
+#define SIMPAD_UCB1X00_GPIO_PROG1       (SIMPAD_UCB1X00_GPIO_BASE)
+#define SIMPAD_UCB1X00_GPIO_PROG2       (SIMPAD_UCB1X00_GPIO_BASE + 1)
+#define SIMPAD_UCB1X00_GPIO_UP          (SIMPAD_UCB1X00_GPIO_BASE + 2)
+#define SIMPAD_UCB1X00_GPIO_DOWN        (SIMPAD_UCB1X00_GPIO_BASE + 3)
+#define SIMPAD_UCB1X00_GPIO_LEFT        (SIMPAD_UCB1X00_GPIO_BASE + 4)
+#define SIMPAD_UCB1X00_GPIO_RIGHT       (SIMPAD_UCB1X00_GPIO_BASE + 5)
+#define SIMPAD_UCB1X00_GPIO_6           (SIMPAD_UCB1X00_GPIO_BASE + 6)
+#define SIMPAD_UCB1X00_GPIO_7           (SIMPAD_UCB1X00_GPIO_BASE + 7)
+#define SIMPAD_UCB1X00_GPIO_HEADSET     (SIMPAD_UCB1X00_GPIO_BASE + 8)
+#define SIMPAD_UCB1X00_GPIO_SPEAKER     (SIMPAD_UCB1X00_GPIO_BASE + 9)
+
+/*--- CS3 Latch ---*/
+#define SIMPAD_CS3_GPIO_BASE            (GPIO_MAX + 11)
+#define SIMPAD_CS3_VCC_5V_EN            (SIMPAD_CS3_GPIO_BASE)
+#define SIMPAD_CS3_VCC_3V_EN            (SIMPAD_CS3_GPIO_BASE + 1)
+#define SIMPAD_CS3_EN1                  (SIMPAD_CS3_GPIO_BASE + 2)
+#define SIMPAD_CS3_EN0                  (SIMPAD_CS3_GPIO_BASE + 3)
+#define SIMPAD_CS3_DISPLAY_ON           (SIMPAD_CS3_GPIO_BASE + 4)
+#define SIMPAD_CS3_PCMCIA_BUFF_DIS      (SIMPAD_CS3_GPIO_BASE + 5)
+#define SIMPAD_CS3_MQ_RESET             (SIMPAD_CS3_GPIO_BASE + 6)
+#define SIMPAD_CS3_PCMCIA_RESET         (SIMPAD_CS3_GPIO_BASE + 7)
+#define SIMPAD_CS3_DECT_POWER_ON        (SIMPAD_CS3_GPIO_BASE + 8)
+#define SIMPAD_CS3_IRDA_SD              (SIMPAD_CS3_GPIO_BASE + 9)
+#define SIMPAD_CS3_RS232_ON             (SIMPAD_CS3_GPIO_BASE + 10)
+#define SIMPAD_CS3_SD_MEDIAQ            (SIMPAD_CS3_GPIO_BASE + 11)
+#define SIMPAD_CS3_LED2_ON              (SIMPAD_CS3_GPIO_BASE + 12)
+#define SIMPAD_CS3_IRDA_MODE            (SIMPAD_CS3_GPIO_BASE + 13)
+#define SIMPAD_CS3_ENABLE_5V            (SIMPAD_CS3_GPIO_BASE + 14)
+#define SIMPAD_CS3_RESET_SIMCARD        (SIMPAD_CS3_GPIO_BASE + 15)
+
+#define SIMPAD_CS3_PCMCIA_BVD1          (SIMPAD_CS3_GPIO_BASE + 16)
+#define SIMPAD_CS3_PCMCIA_BVD2          (SIMPAD_CS3_GPIO_BASE + 17)
+#define SIMPAD_CS3_PCMCIA_VS1           (SIMPAD_CS3_GPIO_BASE + 18)
+#define SIMPAD_CS3_PCMCIA_VS2           (SIMPAD_CS3_GPIO_BASE + 19)
+#define SIMPAD_CS3_LOCK_IND             (SIMPAD_CS3_GPIO_BASE + 20)
+#define SIMPAD_CS3_CHARGING_STATE       (SIMPAD_CS3_GPIO_BASE + 21)
+#define SIMPAD_CS3_PCMCIA_SHORT         (SIMPAD_CS3_GPIO_BASE + 22)
+#define SIMPAD_CS3_GPIO_23              (SIMPAD_CS3_GPIO_BASE + 23)
 
-#define CS3BUSTYPE unsigned volatile long
 #define CS3_BASE        0xf1000000
 
-#define VCC_5V_EN       0x0001 // For 5V PCMCIA
-#define VCC_3V_EN       0x0002 // FOR 3.3V PCMCIA
-#define EN1             0x0004 // This is only for EPROM's
-#define EN0             0x0008 // Both should be enable for 3.3V or 5V
-#define DISPLAY_ON      0x0010
-#define PCMCIA_BUFF_DIS 0x0020
-#define MQ_RESET        0x0040
-#define PCMCIA_RESET    0x0080
-#define DECT_POWER_ON   0x0100
-#define IRDA_SD         0x0200 // Shutdown for powersave
-#define RS232_ON        0x0400
-#define SD_MEDIAQ       0x0800 // Shutdown for powersave
-#define LED2_ON         0x1000
-#define IRDA_MODE       0x2000 // Fast/Slow IrDA mode
-#define ENABLE_5V       0x4000 // Enable 5V circuit
-#define RESET_SIMCARD   0x8000
-
-#define RS232_ENABLE    0x0440
-#define PCMCIAMASK      0x402f
-
-
+long simpad_get_cs3_ro(void);
+long simpad_get_cs3_shadow(void);
+void simpad_set_cs3_bit(int value);
+void simpad_clear_cs3_bit(int value);
+
+#define VCC_5V_EN       0x0001 /* For 5V PCMCIA */
+#define VCC_3V_EN       0x0002 /* FOR 3.3V PCMCIA */
+#define EN1             0x0004 /* This is only for EPROM's */
+#define EN0             0x0008 /* Both should be enable for 3.3V or 5V */
+#define DISPLAY_ON      0x0010
+#define PCMCIA_BUFF_DIS 0x0020
+#define MQ_RESET        0x0040
+#define PCMCIA_RESET    0x0080
+#define DECT_POWER_ON   0x0100
+#define IRDA_SD         0x0200 /* Shutdown for powersave */
+#define RS232_ON        0x0400
+#define SD_MEDIAQ       0x0800 /* Shutdown for powersave */
+#define LED2_ON         0x1000
+#define IRDA_MODE       0x2000 /* Fast/Slow IrDA mode */
+#define ENABLE_5V       0x4000 /* Enable 5V circuit */
+#define RESET_SIMCARD   0x8000
+
+#define PCMCIA_BVD1     0x01
+#define PCMCIA_BVD2     0x02
+#define PCMCIA_VS1      0x04
+#define PCMCIA_VS2      0x08
+#define LOCK_IND        0x10
+#define CHARGING_STATE  0x20
+#define PCMCIA_SHORT    0x40
+
+/*--- Battery ---*/
 struct simpad_battery {
         unsigned char ac_status;        /* line connected yes/no */
         unsigned char status;           /* battery loading yes/no */
diff --git a/arch/arm/mach-sa1100/leds-simpad.c b/arch/arm/mach-sa1100/leds-simpad.c
deleted file mode 100644
index d50f4eeaa12e..000000000000
--- a/arch/arm/mach-sa1100/leds-simpad.c
+++ /dev/null
@@ -1,100 +0,0 @@
-/*
- * linux/arch/arm/mach-sa1100/leds-simpad.c
- *
- * Author: Juergen Messerer <juergen.messerer@siemens.ch>
- */
-#include <linux/init.h>
-
-#include <mach/hardware.h>
-#include <asm/leds.h>
-#include <asm/system.h>
-#include <mach/simpad.h>
-
-#include "leds.h"
-
-
-#define LED_STATE_ENABLED       1
-#define LED_STATE_CLAIMED       2
-
-static unsigned int led_state;
-static unsigned int hw_led_state;
-
-#define LED_GREEN       (1)
-#define LED_MASK        (1)
-
-extern void set_cs3_bit(int value);
-extern void clear_cs3_bit(int value);     
-
-void simpad_leds_event(led_event_t evt)
-{
-        switch (evt)
-        {
-        case led_start:
-                hw_led_state = LED_GREEN;
-                led_state = LED_STATE_ENABLED;
-                break;
-
-        case led_stop:
-                led_state &= ~LED_STATE_ENABLED;
-                break;
-
-        case led_claim:
-                led_state |= LED_STATE_CLAIMED;
-                hw_led_state = LED_GREEN;
-                break;
-
-        case led_release:
-                led_state &= ~LED_STATE_CLAIMED;
-                hw_led_state = LED_GREEN;
-                break;
-
-#ifdef CONFIG_LEDS_TIMER
-        case led_timer:
-                if (!(led_state & LED_STATE_CLAIMED))
-                        hw_led_state ^= LED_GREEN;
-                break;
-#endif
-
-#ifdef CONFIG_LEDS_CPU
-        case led_idle_start:
-                break;
-
-        case led_idle_end:
-                break;
-#endif
-
-        case led_halted:
-                break;
-
-        case led_green_on:
-                if (led_state & LED_STATE_CLAIMED)
-                        hw_led_state |= LED_GREEN;
-                break;
-
-        case led_green_off:
-                if (led_state & LED_STATE_CLAIMED)
-                        hw_led_state &= ~LED_GREEN;
-                break;
-
-        case led_amber_on:
-                break;
-
-        case led_amber_off:
-                break;
-
-        case led_red_on:
-                break;
-
-        case led_red_off:
-                break;
-
-        default:
-                break;
-        }
-
-        if  (led_state & LED_STATE_ENABLED)
-                set_cs3_bit(LED2_ON);
-        else 
-                clear_cs3_bit(LED2_ON);
-}
-
diff --git a/arch/arm/mach-sa1100/leds.c b/arch/arm/mach-sa1100/leds.c
index bbfe197fb4d6..5fe71a0f1053 100644
--- a/arch/arm/mach-sa1100/leds.c
+++ b/arch/arm/mach-sa1100/leds.c
@@ -42,8 +42,6 @@ sa1100_leds_init(void)
                 leds_event = adsbitsy_leds_event;
         if (machine_is_pt_system3())
                 leds_event = system3_leds_event;
-        if (machine_is_simpad())
-                leds_event = simpad_leds_event; /* what about machine registry? including led, apm... -zecke */
 
         leds_event(led_start);
         return 0;
diff --git a/arch/arm/mach-sa1100/leds.h b/arch/arm/mach-sa1100/leds.h
index 68cc9f773d6d..776b6020f550 100644
--- a/arch/arm/mach-sa1100/leds.h
+++ b/arch/arm/mach-sa1100/leds.h
@@ -11,4 +11,3 @@ extern void pfs168_leds_event(led_event_t evt);
 extern void graphicsmaster_leds_event(led_event_t evt);
 extern void adsbitsy_leds_event(led_event_t evt);
 extern void system3_leds_event(led_event_t evt);
-extern void simpad_leds_event(led_event_t evt);
diff --git a/arch/arm/mach-sa1100/pci-nanoengine.c b/arch/arm/mach-sa1100/pci-nanoengine.c
index 964c6c3cd7a6..dd39fee59549 100644
--- a/arch/arm/mach-sa1100/pci-nanoengine.c
+++ b/arch/arm/mach-sa1100/pci-nanoengine.c
@@ -28,6 +28,7 @@
 #include <asm/mach-types.h>
 
 #include <mach/nanoengine.h>
+#include <mach/hardware.h>
 
 static DEFINE_SPINLOCK(nano_lock);
 
diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c
index cfb76077bd25..34659f354bef 100644
--- a/arch/arm/mach-sa1100/simpad.c
+++ b/arch/arm/mach-sa1100/simpad.c
@@ -13,6 +13,7 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #include <linux/io.h>
+#include <linux/gpio.h>
 
 #include <asm/irq.h>
 #include <mach/hardware.h>
@@ -28,35 +29,92 @@
 
 #include <linux/serial_core.h>
 #include <linux/ioport.h>
+#include <linux/input.h>
+#include <linux/gpio_keys.h>
+#include <linux/leds.h>
+#include <linux/i2c-gpio.h>
 
 #include "generic.h"
 
-long cs3_shadow;
+/*
+ * CS3 support
+ */
 
-long get_cs3_shadow(void)
+static long cs3_shadow;
+static spinlock_t cs3_lock;
+static struct gpio_chip cs3_gpio;
+
+long simpad_get_cs3_ro(void)
+{
+        return readl(CS3_BASE);
+}
+EXPORT_SYMBOL(simpad_get_cs3_ro);
+
+long simpad_get_cs3_shadow(void)
 {
         return cs3_shadow;
 }
+EXPORT_SYMBOL(simpad_get_cs3_shadow);
 
-void set_cs3(long value)
+static void __simpad_write_cs3(void)
 {
-        *(CS3BUSTYPE *)(CS3_BASE) = cs3_shadow = value;
+        writel(cs3_shadow, CS3_BASE);
 }
 
-void set_cs3_bit(int value)
+void simpad_set_cs3_bit(int value)
 {
+        unsigned long flags;
+
+        spin_lock_irqsave(&cs3_lock, flags);
         cs3_shadow |= value;
-        *(CS3BUSTYPE *)(CS3_BASE) = cs3_shadow;
+        __simpad_write_cs3();
+        spin_unlock_irqrestore(&cs3_lock, flags);
 }
+EXPORT_SYMBOL(simpad_set_cs3_bit);
 
-void clear_cs3_bit(int value)
+void simpad_clear_cs3_bit(int value)
 {
+        unsigned long flags;
+
+        spin_lock_irqsave(&cs3_lock, flags);
         cs3_shadow &= ~value;
-        *(CS3BUSTYPE *)(CS3_BASE) = cs3_shadow;
+        __simpad_write_cs3();
+        spin_unlock_irqrestore(&cs3_lock, flags);
 }
+EXPORT_SYMBOL(simpad_clear_cs3_bit);
+
+static void cs3_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
+{
+        if (offset > 15)
+                return;
+        if (value)
+                simpad_set_cs3_bit(1 << offset);
+        else
+                simpad_clear_cs3_bit(1 << offset);
+};
+
+static int cs3_gpio_get(struct gpio_chip *chip, unsigned offset)
+{
+        if (offset > 15)
+                return simpad_get_cs3_ro() & (1 << (offset - 16));
+        return simpad_get_cs3_shadow() & (1 << offset);
+};
 
-EXPORT_SYMBOL(set_cs3_bit);
-EXPORT_SYMBOL(clear_cs3_bit);
+static int cs3_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
+{
+        if (offset > 15)
+                return 0;
+        return -EINVAL;
+};
+
+static int cs3_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
+        int value)
+{
+        if (offset > 15)
+                return -EINVAL;
+        cs3_gpio_set(chip, offset, value);
+        return 0;
+};
 
 static struct map_desc simpad_io_desc[] __initdata = {
         {       /* MQ200 */
@@ -64,9 +122,9 @@ static struct map_desc simpad_io_desc[] __initdata = {
                 .pfn            = __phys_to_pfn(0x4b800000),
                 .length         = 0x00800000,
                 .type           = MT_DEVICE
-        }, {    /* Paules CS3, write only */
-                .virtual        =  0xf1000000,
-                .pfn            = __phys_to_pfn(0x18000000),
+        }, {    /* Simpad CS3 */
+                .virtual        = CS3_BASE,
+                .pfn            = __phys_to_pfn(SA1100_CS3_PHYS),
                 .length         = 0x00100000,
                 .type           = MT_DEVICE
         },
@@ -78,12 +136,12 @@ static void simpad_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
         if (port->mapbase == (u_int)&Ser1UTCR0) {
                 if (state)
                 {
-                        clear_cs3_bit(RS232_ON);
-                        clear_cs3_bit(DECT_POWER_ON);
+                        simpad_clear_cs3_bit(RS232_ON);
+                        simpad_clear_cs3_bit(DECT_POWER_ON);
                 }else
                 {
-                        set_cs3_bit(RS232_ON);
-                        set_cs3_bit(DECT_POWER_ON);
+                        simpad_set_cs3_bit(RS232_ON);
+                        simpad_set_cs3_bit(DECT_POWER_ON);
                 }
         }
 }
@@ -132,6 +190,7 @@ static struct resource simpad_flash_resources [] = {
 static struct mcp_plat_data simpad_mcp_data = {
         .mccr0          = MCCR0_ADM,
         .sclk_rate      = 11981000,
+        .gpio_base      = SIMPAD_UCB1X00_GPIO_BASE,
 };
 
 
@@ -142,9 +201,10 @@ static void __init simpad_map_io(void)
 
         iotable_init(simpad_io_desc, ARRAY_SIZE(simpad_io_desc));
 
-        set_cs3_bit (EN1 | EN0 | LED2_ON | DISPLAY_ON | RS232_ON |
-                      ENABLE_5V | RESET_SIMCARD | DECT_POWER_ON);
-
+        /* Initialize CS3 */
+        cs3_shadow = (EN1 | EN0 | LED2_ON | DISPLAY_ON |
+                RS232_ON | ENABLE_5V | RESET_SIMCARD | DECT_POWER_ON);
+        __simpad_write_cs3(); /* Spinlocks not yet initialized */
 
         sa1100_register_uart_fns(&simpad_port_fns);
         sa1100_register_uart(0, 3);  /* serial interface */
@@ -170,13 +230,14 @@ static void __init simpad_map_io(void)
 
 static void simpad_power_off(void)
 {
-        local_irq_disable(); // was cli
-        set_cs3(0x800);        /* only SD_MEDIAQ */
+        local_irq_disable();
+        cs3_shadow = SD_MEDIAQ;
+        __simpad_write_cs3(); /* Bypass spinlock here */
 
         /* disable internal oscillator, float CS lines */
         PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
-        /* enable wake-up on GPIO0 (Assabet...) */
-        PWER = GFER = GRER = 1;
+        /* enable wake-up on GPIO0 */
+        PWER = GFER = GRER = PWER_GPIO0;
         /*
          * set scratchpad to zero, just in case it is used as a
          * restart address by the bootloader.
@@ -192,6 +253,91 @@ static void simpad_power_off(void)
 
 }
 
+/*
+ * gpio_keys
+*/
+
+static struct gpio_keys_button simpad_button_table[] = {
+        { KEY_POWER, IRQ_GPIO_POWER_BUTTON, 1, "power button" },
+};
+
+static struct gpio_keys_platform_data simpad_keys_data = {
+        .buttons = simpad_button_table,
+        .nbuttons = ARRAY_SIZE(simpad_button_table),
+};
+
+static struct platform_device simpad_keys = {
+        .name = "gpio-keys",
+        .dev = {
+                .platform_data = &simpad_keys_data,
+        },
+};
+
+static struct gpio_keys_button simpad_polled_button_table[] = {
+        { KEY_PROG1, SIMPAD_UCB1X00_GPIO_PROG1, 1, "prog1 button" },
+        { KEY_PROG2, SIMPAD_UCB1X00_GPIO_PROG2, 1, "prog2 button" },
+        { KEY_UP,    SIMPAD_UCB1X00_GPIO_UP,    1, "up button" },
+        { KEY_DOWN,  SIMPAD_UCB1X00_GPIO_DOWN,  1, "down button" },
+        { KEY_LEFT,  SIMPAD_UCB1X00_GPIO_LEFT,  1, "left button" },
+        { KEY_RIGHT, SIMPAD_UCB1X00_GPIO_RIGHT, 1, "right button" },
+};
+
+static struct gpio_keys_platform_data simpad_polled_keys_data = {
+        .buttons = simpad_polled_button_table,
+        .nbuttons = ARRAY_SIZE(simpad_polled_button_table),
+        .poll_interval = 50,
+};
+
+static struct platform_device simpad_polled_keys = {
+        .name = "gpio-keys-polled",
+        .dev = {
+                .platform_data = &simpad_polled_keys_data,
+        },
+};
+
+/*
+ * GPIO LEDs
+ */
+
+static struct gpio_led simpad_leds[] = {
+        {
+                .name = "simpad:power",
+                .gpio = SIMPAD_CS3_LED2_ON,
+                .active_low = 0,
+                .default_trigger = "default-on",
+        },
+};
+
+static struct gpio_led_platform_data simpad_led_data = {
+        .num_leds = ARRAY_SIZE(simpad_leds),
+        .leds = simpad_leds,
+};
+
+static struct platform_device simpad_gpio_leds = {
+        .name = "leds-gpio",
+        .id = 0,
+        .dev = {
+                .platform_data = &simpad_led_data,
+        },
+};
+
+/*
+ * i2c
+ */
+static struct i2c_gpio_platform_data simpad_i2c_data = {
+        .sda_pin = GPIO_GPIO21,
+        .scl_pin = GPIO_GPIO25,
+        .udelay = 10,
+        .timeout = HZ,
+};
+
+static struct platform_device simpad_i2c = {
+        .name = "i2c-gpio",
+        .id = 0,
+        .dev = {
+                .platform_data = &simpad_i2c_data,
+        },
+};
 
 /*
  * MediaQ Video Device
@@ -202,7 +348,11 @@ static struct platform_device simpad_mq200fb = {
 };
 
 static struct platform_device *devices[] __initdata = {
-        &simpad_mq200fb
+        &simpad_keys,
+        &simpad_polled_keys,
+        &simpad_mq200fb,
+        &simpad_gpio_leds,
+        &simpad_i2c,
 };
 
 
@@ -211,6 +361,19 @@ static int __init simpad_init(void)
 {
         int ret;
 
+        spin_lock_init(&cs3_lock);
+
+        cs3_gpio.label = "simpad_cs3";
+        cs3_gpio.base = SIMPAD_CS3_GPIO_BASE;
+        cs3_gpio.ngpio = 24;
+        cs3_gpio.set = cs3_gpio_set;
+        cs3_gpio.get = cs3_gpio_get;
+        cs3_gpio.direction_input = cs3_gpio_direction_input;
+        cs3_gpio.direction_output = cs3_gpio_direction_output;
+        ret = gpiochip_add(&cs3_gpio);
+        if (ret)
+                printk(KERN_WARNING "simpad: Unable to register cs3 GPIO device");
+
         pm_power_off = simpad_power_off;
 
         sa11x0_register_mtd(&simpad_flash_data, simpad_flash_resources,
diff --git a/arch/arm/mach-shark/Makefile.boot b/arch/arm/mach-shark/Makefile.boot
index 4320f8b92771..e40e24e4ca34 100644
--- a/arch/arm/mach-shark/Makefile.boot
+++ b/arch/arm/mach-shark/Makefile.boot
@@ -1,2 +1,2 @@
-   zreladdr-y   := 0x08008000
+   zreladdr-y   += 0x08008000
 
diff --git a/arch/arm/mach-shark/leds.c b/arch/arm/mach-shark/leds.c
index c9e32de4adf9..ccd49189bbd0 100644
--- a/arch/arm/mach-shark/leds.c
+++ b/arch/arm/mach-shark/leds.c
@@ -36,7 +36,7 @@ static char led_state;
 static short hw_led_state;
 static short saved_state;
 
-static DEFINE_SPINLOCK(leds_lock);
+static DEFINE_RAW_SPINLOCK(leds_lock);
 
 short sequoia_read(int addr) {
   outw(addr,0x24);
@@ -52,7 +52,7 @@ static void sequoia_leds_event(led_event_t evt)
 {
         unsigned long flags;
 
-        spin_lock_irqsave(&leds_lock, flags);
+        raw_spin_lock_irqsave(&leds_lock, flags);
 
         hw_led_state = sequoia_read(0x09);
 
@@ -144,7 +144,7 @@ static void sequoia_leds_event(led_event_t evt)
         if  (led_state & LED_STATE_ENABLED)
                 sequoia_write(hw_led_state,0x09);
 
-        spin_unlock_irqrestore(&leds_lock, flags);
+        raw_spin_unlock_irqrestore(&leds_lock, flags);
 }
 
 static int __init leds_init(void)
diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
index 1c08ee9de86a..498efd99338d 100644
--- a/arch/arm/mach-shmobile/Makefile.boot
+++ b/arch/arm/mach-shmobile/Makefile.boot
@@ -1,7 +1,7 @@
 __ZRELADDR      := $(shell /bin/bash -c 'printf "0x%08x" \
                      $$[$(CONFIG_MEMORY_START) + 0x8000]')
 
-   zreladdr-y   := $(__ZRELADDR)
+   zreladdr-y   += $(__ZRELADDR)
 
 # Unsupported legacy stuff
 #
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index ce5c2513c6ce..cdfdd624d21d 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -341,6 +341,7 @@ static struct platform_device mipidsi0_device = {
 static struct sh_mobile_sdhi_info sdhi0_info = {
         .dma_slave_tx   = SHDMA_SLAVE_SDHI0_TX,
         .dma_slave_rx   = SHDMA_SLAVE_SDHI0_RX,
+        .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT,
         .tmio_caps      = MMC_CAP_SD_HIGHSPEED,
         .tmio_ocr_mask  = MMC_VDD_27_28 | MMC_VDD_28_29,
 };
@@ -382,7 +383,7 @@ void ag5evm_sdhi1_set_pwr(struct platform_device *pdev, int state)
 }
 
 static struct sh_mobile_sdhi_info sh_sdhi1_info = {
-        .tmio_flags     = TMIO_MMC_WRPROTECT_DISABLE,
+        .tmio_flags     = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
         .tmio_caps      = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ,
         .tmio_ocr_mask  = MMC_VDD_32_33 | MMC_VDD_33_34,
         .set_pwr        = ag5evm_sdhi1_set_pwr,
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 9e0856b2f9e9..7e90d064ebcb 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -42,6 +42,7 @@
 #include <linux/leds.h>
 #include <linux/input/sh_keysc.h>
 #include <linux/usb/r8a66597.h>
+#include <linux/pm_clock.h>
 
 #include <media/sh_mobile_ceu.h>
 #include <media/sh_mobile_csi2.h>
@@ -1408,10 +1409,16 @@ static void __init ap4evb_init(void)
         sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device);
         sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device);
 
+        sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device);
+        sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device);
+        sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device);
+        sh7372_add_device_to_domain(&sh7372_a4r, &ceu_device);
+
         hdmi_init_pm_clock();
         fsi_init_pm_clock();
         sh7372_pm_init();
         pm_clk_add(&fsi_device.dev, "spu2");
+        pm_clk_add(&lcdc1_device.dev, "hdmi");
 }
 
 static void __init ap4evb_timer_init(void)
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index d41c01f83f15..00273dad5bf0 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -39,7 +39,7 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/physmap.h>
-#include <linux/pm_runtime.h>
+#include <linux/pm_clock.h>
 #include <linux/smsc911x.h>
 #include <linux/sh_intc.h>
 #include <linux/tca6416_keypad.h>
@@ -641,6 +641,8 @@ static struct usbhs_private usbhs0_private = {
                 },
                 .driver_param = {
                         .buswait_bwait  = 4,
+                        .d0_tx_id       = SHDMA_SLAVE_USB0_TX,
+                        .d1_rx_id       = SHDMA_SLAVE_USB0_RX,
                 },
         },
 };
@@ -808,8 +810,11 @@ static struct usbhs_private usbhs1_private = {
                 },
                 .driver_param = {
                         .buswait_bwait  = 4,
+                        .has_otg        = 1,
                         .pipe_type      = usbhs1_pipe_cfg,
                         .pipe_size      = ARRAY_SIZE(usbhs1_pipe_cfg),
+                        .d0_tx_id       = SHDMA_SLAVE_USB1_TX,
+                        .d1_rx_id       = SHDMA_SLAVE_USB1_RX,
                 },
         },
 };
@@ -1584,10 +1589,20 @@ static void __init mackerel_init(void)
         sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device);
         sh7372_add_device_to_domain(&sh7372_a4lc, &hdmi_lcdc_device);
         sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device);
+        sh7372_add_device_to_domain(&sh7372_a3sp, &usbhs0_device);
+        sh7372_add_device_to_domain(&sh7372_a3sp, &usbhs1_device);
+        sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device);
+        sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device);
+#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
+        sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device);
+#endif
+        sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi2_device);
+        sh7372_add_device_to_domain(&sh7372_a4r, &ceu_device);
 
         hdmi_init_pm_clock();
         sh7372_pm_init();
         pm_clk_add(&fsi_device.dev, "spu2");
+        pm_clk_add(&hdmi_lcdc_device.dev, "hdmi");
 }
 
 static void __init mackerel_timer_init(void)
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 6b1619a65dba..66975921e646 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -503,16 +503,17 @@ static struct clk *late_main_clks[] = {
         &sh7372_fsidivb_clk,
 };
 
-enum { MSTP001,
+enum { MSTP001, MSTP000,
        MSTP131, MSTP130,
        MSTP129, MSTP128, MSTP127, MSTP126, MSTP125,
        MSTP118, MSTP117, MSTP116, MSTP113,
        MSTP106, MSTP101, MSTP100,
        MSTP223,
-       MSTP218, MSTP217, MSTP216,
-       MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
-       MSTP329, MSTP328, MSTP323, MSTP322, MSTP314, MSTP313, MSTP312,
-       MSTP423, MSTP415, MSTP413, MSTP411, MSTP410, MSTP406, MSTP403,
+       MSTP218, MSTP217, MSTP216, MSTP214, MSTP208, MSTP207,
+       MSTP206, MSTP205, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
+       MSTP328, MSTP323, MSTP322, MSTP314, MSTP313, MSTP312,
+       MSTP423, MSTP415, MSTP413, MSTP411, MSTP410, MSTP407, MSTP406,
+       MSTP405, MSTP404, MSTP403, MSTP400,
        MSTP_NR };
 
 #define MSTP(_parent, _reg, _bit, _flags) \
@@ -520,6 +521,7 @@ enum { MSTP001,
 
 static struct clk mstp_clks[MSTP_NR] = {
         [MSTP001] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR0, 1, 0), /* IIC2 */
+        [MSTP000] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR0, 0, 0), /* MSIOF0 */
         [MSTP131] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 31, 0), /* VEU3 */
         [MSTP130] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 30, 0), /* VEU2 */
         [MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* VEU1 */
@@ -538,14 +540,16 @@ static struct clk mstp_clks[MSTP_NR] = {
         [MSTP218] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 18, 0), /* DMAC1 */
         [MSTP217] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 17, 0), /* DMAC2 */
         [MSTP216] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 16, 0), /* DMAC3 */
+        [MSTP214] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 14, 0), /* USBDMAC */
+        [MSTP208] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 8, 0), /* MSIOF1 */
         [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
         [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
+        [MSTP205] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 5, 0), /* MSIOF2 */
         [MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */
         [MSTP203] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 3, 0), /* SCIFA1 */
         [MSTP202] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 2, 0), /* SCIFA2 */
         [MSTP201] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 1, 0), /* SCIFA3 */
         [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */
-        [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
         [MSTP328] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR3, 28, 0), /* FSI2 */
         [MSTP323] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */
         [MSTP322] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 22, 0), /* USB0 */
@@ -557,8 +561,12 @@ static struct clk mstp_clks[MSTP_NR] = {
         [MSTP413] = MSTP(&pllc1_div2_clk, SMSTPCR4, 13, 0), /* HDMI */
         [MSTP411] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 11, 0), /* IIC3 */
         [MSTP410] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 10, 0), /* IIC4 */
+        [MSTP407] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 7, 0), /* USB-DMAC1 */
         [MSTP406] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 6, 0), /* USB1 */
+        [MSTP405] = MSTP(&r_clk, SMSTPCR4, 5, 0), /* CMT4 */
+        [MSTP404] = MSTP(&r_clk, SMSTPCR4, 4, 0), /* CMT3 */
         [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
+        [MSTP400] = MSTP(&r_clk, SMSTPCR4, 0, 0), /* CMT2 */
 };
 
 static struct clk_lookup lookups[] = {
@@ -609,6 +617,7 @@ static struct clk_lookup lookups[] = {
 
         /* MSTP32 clocks */
         CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */
+        CLKDEV_DEV_ID("spi_sh_msiof.0", &mstp_clks[MSTP000]), /* MSIOF0 */
         CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[MSTP131]), /* VEU3 */
         CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */
         CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[MSTP129]), /* VEU1 */
@@ -629,14 +638,16 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), /* DMAC1 */
         CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP217]), /* DMAC2 */
         CLKDEV_DEV_ID("sh-dma-engine.2", &mstp_clks[MSTP216]), /* DMAC3 */
+        CLKDEV_DEV_ID("sh-dma-engine.3", &mstp_clks[MSTP214]), /* USB-DMAC0 */
+        CLKDEV_DEV_ID("spi_sh_msiof.1", &mstp_clks[MSTP208]), /* MSIOF1 */
         CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
         CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP206]), /* SCIFB */
+        CLKDEV_DEV_ID("spi_sh_msiof.2", &mstp_clks[MSTP205]), /* MSIOF2 */
         CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
         CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */
         CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), /* SCIFA2 */
         CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), /* SCIFA3 */
         CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
-        CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
         CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */
         CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */
         CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USB0 */
@@ -650,11 +661,17 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("sh-mobile-hdmi", &mstp_clks[MSTP413]), /* HDMI */
         CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* IIC3 */
         CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* IIC4 */
+        CLKDEV_DEV_ID("sh-dma-engine.4", &mstp_clks[MSTP407]), /* USB-DMAC1 */
         CLKDEV_DEV_ID("r8a66597_hcd.1", &mstp_clks[MSTP406]), /* USB1 */
         CLKDEV_DEV_ID("r8a66597_udc.1", &mstp_clks[MSTP406]), /* USB1 */
         CLKDEV_DEV_ID("renesas_usbhs.1", &mstp_clks[MSTP406]), /* USB1 */
+        CLKDEV_DEV_ID("sh_cmt.4", &mstp_clks[MSTP405]), /* CMT4 */
+        CLKDEV_DEV_ID("sh_cmt.3", &mstp_clks[MSTP404]), /* CMT3 */
         CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
+        CLKDEV_DEV_ID("sh_cmt.2", &mstp_clks[MSTP400]), /* CMT2 */
 
+        CLKDEV_ICK_ID("hdmi", "sh_mobile_lcdc_fb.1",
+                      &div6_reparent_clks[DIV6_HDMI]),
         CLKDEV_ICK_ID("ick", "sh-mobile-hdmi", &div6_reparent_clks[DIV6_HDMI]),
         CLKDEV_ICK_ID("icka", "sh_fsi2", &div6_reparent_clks[DIV6_FSIA]),
         CLKDEV_ICK_ID("ickb", "sh_fsi2", &div6_reparent_clks[DIV6_FSIB]),
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 6db2ccabc2bf..61a846bb30f2 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -365,7 +365,7 @@ void __init sh73a0_clock_init(void)
         __raw_writel(0x108, SD2CKCR);
 
         /* detect main clock parent */
-        switch ((__raw_readl(CKSCR) >> 24) & 0x03) {
+        switch ((__raw_readl(CKSCR) >> 28) & 0x03) {
         case 0:
                 main_clk.parent = &sh73a0_extal1_clk;
                 break;
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index 06aecb31d9c7..c0cdbf997c91 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -35,8 +35,8 @@ extern void sh7372_add_standard_devices(void);
 extern void sh7372_clock_init(void);
 extern void sh7372_pinmux_init(void);
 extern void sh7372_pm_init(void);
-extern void sh7372_cpu_suspend(void);
-extern void sh7372_cpu_resume(void);
+extern void sh7372_resume_core_standby_a3sm(void);
+extern int sh7372_do_idle_a3sm(unsigned long unused);
 extern struct clk sh7372_extal1_clk;
 extern struct clk sh7372_extal2_clk;
 
diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h
index ce595cee86cd..84532f9629b2 100644
--- a/arch/arm/mach-shmobile/include/mach/sh7372.h
+++ b/arch/arm/mach-shmobile/include/mach/sh7372.h
@@ -459,6 +459,10 @@ enum {
         SHDMA_SLAVE_SDHI2_TX,
         SHDMA_SLAVE_MMCIF_RX,
         SHDMA_SLAVE_MMCIF_TX,
+        SHDMA_SLAVE_USB0_TX,
+        SHDMA_SLAVE_USB0_RX,
+        SHDMA_SLAVE_USB1_TX,
+        SHDMA_SLAVE_USB1_RX,
 };
 
 extern struct clk sh7372_extal1_clk;
@@ -475,7 +479,12 @@ struct platform_device;
 
 struct sh7372_pm_domain {
         struct generic_pm_domain genpd;
+        struct dev_power_governor *gov;
+        void (*suspend)(void);
+        void (*resume)(void);
         unsigned int bit_shift;
+        bool no_debug;
+        bool stay_on;
 };
 
 static inline struct sh7372_pm_domain *to_sh7372_pd(struct generic_pm_domain *d)
@@ -487,16 +496,24 @@ static inline struct sh7372_pm_domain *to_sh7372_pd(struct generic_pm_domain *d)
 extern struct sh7372_pm_domain sh7372_a4lc;
 extern struct sh7372_pm_domain sh7372_a4mp;
 extern struct sh7372_pm_domain sh7372_d4;
+extern struct sh7372_pm_domain sh7372_a4r;
 extern struct sh7372_pm_domain sh7372_a3rv;
 extern struct sh7372_pm_domain sh7372_a3ri;
+extern struct sh7372_pm_domain sh7372_a3sp;
 extern struct sh7372_pm_domain sh7372_a3sg;
 
 extern void sh7372_init_pm_domain(struct sh7372_pm_domain *sh7372_pd);
 extern void sh7372_add_device_to_domain(struct sh7372_pm_domain *sh7372_pd,
                                         struct platform_device *pdev);
+extern void sh7372_pm_add_subdomain(struct sh7372_pm_domain *sh7372_pd,
+                                    struct sh7372_pm_domain *sh7372_sd);
 #else
 #define sh7372_init_pm_domain(pd) do { } while(0)
 #define sh7372_add_device_to_domain(pd, pdev) do { } while(0)
+#define sh7372_pm_add_subdomain(pd, sd) do { } while(0)
 #endif /* CONFIG_PM */
 
+extern void sh7372_intcs_suspend(void);
+extern void sh7372_intcs_resume(void);
+
 #endif /* __ASM_SH7372_H__ */
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index 3b28743c77eb..29cdc0522d9c 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -379,7 +379,7 @@ enum {
         /* BBIF2 */
         VPU,
         TSIF1,
-        _3DG_SGX530,
+        /* 3DG */
         _2DDMAC,
         IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2,
         IPMMU_IPMMUR, IPMMU_IPMMUR2,
@@ -436,7 +436,7 @@ static struct intc_vect intcs_vectors[] = {
         /* BBIF2 */
         INTCS_VECT(VPU, 0x980),
         INTCS_VECT(TSIF1, 0x9a0),
-        INTCS_VECT(_3DG_SGX530, 0x9e0),
+        /* 3DG */
         INTCS_VECT(_2DDMAC, 0xa00),
         INTCS_VECT(IIC2_ALI2, 0xa80), INTCS_VECT(IIC2_TACKI2, 0xaa0),
         INTCS_VECT(IIC2_WAITI2, 0xac0), INTCS_VECT(IIC2_DTEI2, 0xae0),
@@ -521,7 +521,7 @@ static struct intc_mask_reg intcs_mask_registers[] = {
             RTDMAC_1_DEI3, RTDMAC_1_DEI2, RTDMAC_1_DEI1, RTDMAC_1_DEI0 } },
         { 0xffd20198, 0xffd201d8, 8, /* IMR6SA / IMCR6SA */
           { 0, 0, MSIOF, 0,
-            _3DG_SGX530, 0, 0, 0 } },
+            0, 0, 0, 0 } },
         { 0xffd2019c, 0xffd201dc, 8, /* IMR7SA / IMCR7SA */
           { 0, TMU_TUNI2, TMU_TUNI1, TMU_TUNI0,
             0, 0, 0, 0 } },
@@ -561,7 +561,6 @@ static struct intc_prio_reg intcs_prio_registers[] = {
                                               TMU_TUNI2, TSIF1 } },
         { 0xffd2001c, 0, 16, 4, /* IPRHS */ { 0, 0, VEU, BEU } },
         { 0xffd20020, 0, 16, 4, /* IPRIS */ { 0, MSIOF, TSIF0, IIC0 } },
-        { 0xffd20024, 0, 16, 4, /* IPRJS */ { 0, _3DG_SGX530, 0, 0 } },
         { 0xffd20028, 0, 16, 4, /* IPRKS */ { 0, 0, LMB, 0 } },
         { 0xffd2002c, 0, 16, 4, /* IPRLS */ { IPMMU, 0, 0, 0 } },
         { 0xffd20030, 0, 16, 4, /* IPRMS */ { IIC2, 0, 0, 0 } },
@@ -607,9 +606,16 @@ static void intcs_demux(unsigned int irq, struct irq_desc *desc)
         generic_handle_irq(intcs_evt2irq(evtcodeas));
 }
 
+static void __iomem *intcs_ffd2;
+static void __iomem *intcs_ffd5;
+
 void __init sh7372_init_irq(void)
 {
-        void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE);
+        void __iomem *intevtsa;
+
+        intcs_ffd2 = ioremap_nocache(0xffd20000, PAGE_SIZE);
+        intevtsa = intcs_ffd2 + 0x100;
+        intcs_ffd5 = ioremap_nocache(0xffd50000, PAGE_SIZE);
 
         register_intc_controller(&intca_desc);
         register_intc_controller(&intcs_desc);
@@ -618,3 +624,46 @@ void __init sh7372_init_irq(void)
         irq_set_handler_data(evt2irq(0xf80), (void *)intevtsa);
         irq_set_chained_handler(evt2irq(0xf80), intcs_demux);
 }
+
+static unsigned short ffd2[0x200];
+static unsigned short ffd5[0x100];
+
+void sh7372_intcs_suspend(void)
+{
+        int k;
+
+        for (k = 0x00; k <= 0x30; k += 4)
+                ffd2[k] = __raw_readw(intcs_ffd2 + k);
+
+        for (k = 0x80; k <= 0xb0; k += 4)
+                ffd2[k] = __raw_readb(intcs_ffd2 + k);
+
+        for (k = 0x180; k <= 0x188; k += 4)
+                ffd2[k] = __raw_readb(intcs_ffd2 + k);
+
+        for (k = 0x00; k <= 0x3c; k += 4)
+                ffd5[k] = __raw_readw(intcs_ffd5 + k);
+
+        for (k = 0x80; k <= 0x9c; k += 4)
+                ffd5[k] = __raw_readb(intcs_ffd5 + k);
+}
+
+void sh7372_intcs_resume(void)
+{
+        int k;
+
+        for (k = 0x00; k <= 0x30; k += 4)
+                __raw_writew(ffd2[k], intcs_ffd2 + k);
+
+        for (k = 0x80; k <= 0xb0; k += 4)
+                __raw_writeb(ffd2[k], intcs_ffd2 + k);
+
+        for (k = 0x180; k <= 0x188; k += 4)
+                __raw_writeb(ffd2[k], intcs_ffd2 + k);
+
+        for (k = 0x00; k <= 0x3c; k += 4)
+                __raw_writew(ffd5[k], intcs_ffd5 + k);
+
+        for (k = 0x80; k <= 0x9c; k += 4)
+                __raw_writeb(ffd5[k], intcs_ffd5 + k);
+}
diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c
index 66f980625a33..e4e485fa2532 100644
--- a/arch/arm/mach-shmobile/platsmp.c
+++ b/arch/arm/mach-shmobile/platsmp.c
@@ -56,6 +56,12 @@ void __init smp_init_cpus(void)
         unsigned int ncores = shmobile_smp_get_core_count();
         unsigned int i;
 
+        if (ncores > nr_cpu_ids) {
+                pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",
+                        ncores, nr_cpu_ids);
+                ncores = nr_cpu_ids;
+        }
+
         for (i = 0; i < ncores; i++)
                 set_cpu_possible(i, true);
 
diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c
index 933fb411be0f..79612737c5b2 100644
--- a/arch/arm/mach-shmobile/pm-sh7372.c
+++ b/arch/arm/mach-shmobile/pm-sh7372.c
@@ -15,23 +15,61 @@
 #include <linux/list.h>
 #include <linux/err.h>
 #include <linux/slab.h>
-#include <linux/pm_runtime.h>
+#include <linux/pm_clock.h>
 #include <linux/platform_device.h>
 #include <linux/delay.h>
+#include <linux/irq.h>
+#include <linux/bitrev.h>
 #include <asm/system.h>
 #include <asm/io.h>
 #include <asm/tlbflush.h>
+#include <asm/suspend.h>
 #include <mach/common.h>
 #include <mach/sh7372.h>
 
-#define SMFRAM 0xe6a70000
-#define SYSTBCR 0xe6150024
-#define SBAR 0xe6180020
-#define APARMBAREA 0xe6f10020
+/* DBG */
+#define DBGREG1 0xe6100020
+#define DBGREG9 0xe6100040
 
+/* CPGA */
+#define SYSTBCR 0xe6150024
+#define MSTPSR0 0xe6150030
+#define MSTPSR1 0xe6150038
+#define MSTPSR2 0xe6150040
+#define MSTPSR3 0xe6150048
+#define MSTPSR4 0xe615004c
+#define PLLC01STPCR 0xe61500c8
+
+/* SYSC */
 #define SPDCR 0xe6180008
 #define SWUCR 0xe6180014
+#define SBAR 0xe6180020
+#define WUPRMSK 0xe6180028
+#define WUPSMSK 0xe618002c
+#define WUPSMSK2 0xe6180048
 #define PSTR 0xe6180080
+#define WUPSFAC 0xe6180098
+#define IRQCR 0xe618022c
+#define IRQCR2 0xe6180238
+#define IRQCR3 0xe6180244
+#define IRQCR4 0xe6180248
+#define PDNSEL 0xe6180254
+
+/* INTC */
+#define ICR1A 0xe6900000
+#define ICR2A 0xe6900004
+#define ICR3A 0xe6900008
+#define ICR4A 0xe690000c
+#define INTMSK00A 0xe6900040
+#define INTMSK10A 0xe6900044
+#define INTMSK20A 0xe6900048
+#define INTMSK30A 0xe690004c
+
+/* MFIS */
+#define SMFRAM 0xe6a70000
+
+/* AP-System Core */
+#define APARMBAREA 0xe6f10020
 
 #define PSTR_RETRIES 100
 #define PSTR_DELAY_US 10
@@ -43,6 +81,12 @@ static int pd_power_down(struct generic_pm_domain *genpd)
         struct sh7372_pm_domain *sh7372_pd = to_sh7372_pd(genpd);
         unsigned int mask = 1 << sh7372_pd->bit_shift;
 
+        if (sh7372_pd->suspend)
+                sh7372_pd->suspend();
+
+        if (sh7372_pd->stay_on)
+                return 0;
+
         if (__raw_readl(PSTR) & mask) {
                 unsigned int retry_count;
 
@@ -55,8 +99,9 @@ static int pd_power_down(struct generic_pm_domain *genpd)
                 }
         }
 
-        pr_debug("sh7372 power domain down 0x%08x -> PSTR = 0x%08x\n",
-                 mask, __raw_readl(PSTR));
+        if (!sh7372_pd->no_debug)
+                pr_debug("sh7372 power domain down 0x%08x -> PSTR = 0x%08x\n",
+                         mask, __raw_readl(PSTR));
 
         return 0;
 }
@@ -68,6 +113,9 @@ static int pd_power_up(struct generic_pm_domain *genpd)
         unsigned int retry_count;
         int ret = 0;
 
+        if (sh7372_pd->stay_on)
+                goto out;
+
         if (__raw_readl(PSTR) & mask)
                 goto out;
 
@@ -84,66 +132,48 @@ static int pd_power_up(struct generic_pm_domain *genpd)
         if (__raw_readl(SWUCR) & mask)
                 ret = -EIO;
 
+        if (!sh7372_pd->no_debug)
+                pr_debug("sh7372 power domain up 0x%08x -> PSTR = 0x%08x\n",
+                         mask, __raw_readl(PSTR));
+
  out:
-        pr_debug("sh7372 power domain up 0x%08x -> PSTR = 0x%08x\n",
-                 mask, __raw_readl(PSTR));
+        if (ret == 0 && sh7372_pd->resume)
+                sh7372_pd->resume();
 
         return ret;
 }
 
-static int pd_power_up_a3rv(struct generic_pm_domain *genpd)
+static void sh7372_a4r_suspend(void)
 {
-        int ret = pd_power_up(genpd);
-
-        /* force A4LC on after A3RV has been requested on */
-        pm_genpd_poweron(&sh7372_a4lc.genpd);
-
-        return ret;
+        sh7372_intcs_suspend();
+        __raw_writel(0x300fffff, WUPRMSK); /* avoid wakeup */
 }
 
-static int pd_power_down_a3rv(struct generic_pm_domain *genpd)
+static bool pd_active_wakeup(struct device *dev)
 {
-        int ret = pd_power_down(genpd);
-
-        /* try to power down A4LC after A3RV is requested off */
-        genpd_queue_power_off_work(&sh7372_a4lc.genpd);
-
-        return ret;
+        return true;
 }
 
-static int pd_power_down_a4lc(struct generic_pm_domain *genpd)
+static bool sh7372_power_down_forbidden(struct dev_pm_domain *domain)
 {
-        /* only power down A4LC if A3RV is off */
-        if (!(__raw_readl(PSTR) & (1 << sh7372_a3rv.bit_shift)))
-                return pd_power_down(genpd);
-
-        return -EBUSY;
+        return false;
 }
 
-static bool pd_active_wakeup(struct device *dev)
-{
-        return true;
-}
+struct dev_power_governor sh7372_always_on_gov = {
+        .power_down_ok = sh7372_power_down_forbidden,
+};
 
 void sh7372_init_pm_domain(struct sh7372_pm_domain *sh7372_pd)
 {
         struct generic_pm_domain *genpd = &sh7372_pd->genpd;
 
-        pm_genpd_init(genpd, NULL, false);
+        pm_genpd_init(genpd, sh7372_pd->gov, false);
         genpd->stop_device = pm_clk_suspend;
         genpd->start_device = pm_clk_resume;
+        genpd->dev_irq_safe = true;
         genpd->active_wakeup = pd_active_wakeup;
-
-        if (sh7372_pd == &sh7372_a4lc) {
-                genpd->power_off = pd_power_down_a4lc;
-                genpd->power_on = pd_power_up;
-        } else if (sh7372_pd == &sh7372_a3rv) {
-                genpd->power_off = pd_power_down_a3rv;
-                genpd->power_on = pd_power_up_a3rv;
-        } else {
-                genpd->power_off = pd_power_down;
-                genpd->power_on = pd_power_up;
-        }
+        genpd->power_off = pd_power_down;
+        genpd->power_on = pd_power_up;
         genpd->power_on(&sh7372_pd->genpd);
 }
 
@@ -152,11 +182,15 @@ void sh7372_add_device_to_domain(struct sh7372_pm_domain *sh7372_pd,
 {
         struct device *dev = &pdev->dev;
 
-        if (!dev->power.subsys_data) {
-                pm_clk_init(dev);
-                pm_clk_add(dev, NULL);
-        }
         pm_genpd_add_device(&sh7372_pd->genpd, dev);
+        if (pm_clk_no_clocks(dev))
+                pm_clk_add(dev, NULL);
+}
+
+void sh7372_pm_add_subdomain(struct sh7372_pm_domain *sh7372_pd,
+                             struct sh7372_pm_domain *sh7372_sd)
+{
+        pm_genpd_add_subdomain(&sh7372_pd->genpd, &sh7372_sd->genpd);
 }
 
 struct sh7372_pm_domain sh7372_a4lc = {
@@ -171,6 +205,14 @@ struct sh7372_pm_domain sh7372_d4 = {
         .bit_shift = 3,
 };
 
+struct sh7372_pm_domain sh7372_a4r = {
+        .bit_shift = 5,
+        .gov = &sh7372_always_on_gov,
+        .suspend = sh7372_a4r_suspend,
+        .resume = sh7372_intcs_resume,
+        .stay_on = true,
+};
+
 struct sh7372_pm_domain sh7372_a3rv = {
         .bit_shift = 6,
 };
@@ -179,39 +221,187 @@ struct sh7372_pm_domain sh7372_a3ri = {
         .bit_shift = 8,
 };
 
+struct sh7372_pm_domain sh7372_a3sp = {
+        .bit_shift = 11,
+        .gov = &sh7372_always_on_gov,
+        .no_debug = true,
+};
+
 struct sh7372_pm_domain sh7372_a3sg = {
         .bit_shift = 13,
 };
 
 #endif /* CONFIG_PM */
 
+#if defined(CONFIG_SUSPEND) || defined(CONFIG_CPU_IDLE)
+static int sh7372_do_idle_core_standby(unsigned long unused)
+{
+        cpu_do_idle(); /* WFI when SYSTBCR == 0x10 -> Core Standby */
+        return 0;
+}
+
 static void sh7372_enter_core_standby(void)
 {
-        void __iomem *smfram = (void __iomem *)SMFRAM;
+        /* set reset vector, translate 4k */
+        __raw_writel(__pa(sh7372_resume_core_standby_a3sm), SBAR);
+        __raw_writel(0, APARMBAREA);
 
-        __raw_writel(0, APARMBAREA); /* translate 4k */
-        __raw_writel(__pa(sh7372_cpu_resume), SBAR); /* set reset vector */
-        __raw_writel(0x10, SYSTBCR); /* enable core standby */
+        /* enter sleep mode with SYSTBCR to 0x10 */
+        __raw_writel(0x10, SYSTBCR);
+        cpu_suspend(0, sh7372_do_idle_core_standby);
+        __raw_writel(0, SYSTBCR);
 
-        __raw_writel(0, smfram + 0x3c); /* clear page table address */
+         /* disable reset vector translation */
+        __raw_writel(0, SBAR);
+}
+#endif
+
+#ifdef CONFIG_SUSPEND
+static void sh7372_enter_a3sm_common(int pllc0_on)
+{
+        /* set reset vector, translate 4k */
+        __raw_writel(__pa(sh7372_resume_core_standby_a3sm), SBAR);
+        __raw_writel(0, APARMBAREA);
+
+        if (pllc0_on)
+                __raw_writel(0, PLLC01STPCR);
+        else
+                __raw_writel(1 << 28, PLLC01STPCR);
+
+        __raw_writel(0, PDNSEL); /* power-down A3SM only, not A4S */
+        __raw_readl(WUPSFAC); /* read wakeup int. factor before sleep */
+        cpu_suspend(0, sh7372_do_idle_a3sm);
+        __raw_readl(WUPSFAC); /* read wakeup int. factor after wakeup */
+
+         /* disable reset vector translation */
+        __raw_writel(0, SBAR);
+}
+
+static int sh7372_a3sm_valid(unsigned long *mskp, unsigned long *msk2p)
+{
+        unsigned long mstpsr0, mstpsr1, mstpsr2, mstpsr3, mstpsr4;
+        unsigned long msk, msk2;
+
+        /* check active clocks to determine potential wakeup sources */
+
+        mstpsr0 = __raw_readl(MSTPSR0);
+        if ((mstpsr0 & 0x00000003) != 0x00000003) {
+                pr_debug("sh7372 mstpsr0 0x%08lx\n", mstpsr0);
+                return 0;
+        }
+
+        mstpsr1 = __raw_readl(MSTPSR1);
+        if ((mstpsr1 & 0xff079b7f) != 0xff079b7f) {
+                pr_debug("sh7372 mstpsr1 0x%08lx\n", mstpsr1);
+                return 0;
+        }
 
-        sh7372_cpu_suspend();
-        cpu_init();
+        mstpsr2 = __raw_readl(MSTPSR2);
+        if ((mstpsr2 & 0x000741ff) != 0x000741ff) {
+                pr_debug("sh7372 mstpsr2 0x%08lx\n", mstpsr2);
+                return 0;
+        }
 
-        /* if page table address is non-NULL then we have been powered down */
-        if (__raw_readl(smfram + 0x3c)) {
-                __raw_writel(__raw_readl(smfram + 0x40),
-                             __va(__raw_readl(smfram + 0x3c)));
+        mstpsr3 = __raw_readl(MSTPSR3);
+        if ((mstpsr3 & 0x1a60f010) != 0x1a60f010) {
+                pr_debug("sh7372 mstpsr3 0x%08lx\n", mstpsr3);
+                return 0;
+        }
 
-                flush_tlb_all();
-                set_cr(__raw_readl(smfram + 0x38));
+        mstpsr4 = __raw_readl(MSTPSR4);
+        if ((mstpsr4 & 0x00008cf0) != 0x00008cf0) {
+                pr_debug("sh7372 mstpsr4 0x%08lx\n", mstpsr4);
+                return 0;
         }
 
-        __raw_writel(0, SYSTBCR); /* disable core standby */
-        __raw_writel(0, SBAR); /* disable reset vector translation */
+        msk = 0;
+        msk2 = 0;
+
+        /* make bitmaps of limited number of wakeup sources */
+
+        if ((mstpsr2 & (1 << 23)) == 0) /* SPU2 */
+                msk |= 1 << 31;
+
+        if ((mstpsr2 & (1 << 12)) == 0) /* MFI_MFIM */
+                msk |= 1 << 21;
+
+        if ((mstpsr4 & (1 << 3)) == 0) /* KEYSC */
+                msk |= 1 << 2;
+
+        if ((mstpsr1 & (1 << 24)) == 0) /* CMT0 */
+                msk |= 1 << 1;
+
+        if ((mstpsr3 & (1 << 29)) == 0) /* CMT1 */
+                msk |= 1 << 1;
+
+        if ((mstpsr4 & (1 << 0)) == 0) /* CMT2 */
+                msk |= 1 << 1;
+
+        if ((mstpsr2 & (1 << 13)) == 0) /* MFI_MFIS */
+                msk2 |= 1 << 17;
+
+        *mskp = msk;
+        *msk2p = msk2;
+
+        return 1;
+}
+
+static void sh7372_icr_to_irqcr(unsigned long icr, u16 *irqcr1p, u16 *irqcr2p)
+{
+        u16 tmp, irqcr1, irqcr2;
+        int k;
+
+        irqcr1 = 0;
+        irqcr2 = 0;
+
+        /* convert INTCA ICR register layout to SYSC IRQCR+IRQCR2 */
+        for (k = 0; k <= 7; k++) {
+                tmp = (icr >> ((7 - k) * 4)) & 0xf;
+                irqcr1 |= (tmp & 0x03) << (k * 2);
+                irqcr2 |= (tmp >> 2) << (k * 2);
+        }
+
+        *irqcr1p = irqcr1;
+        *irqcr2p = irqcr2;
+}
+
+static void sh7372_setup_a3sm(unsigned long msk, unsigned long msk2)
+{
+        u16 irqcrx_low, irqcrx_high, irqcry_low, irqcry_high;
+        unsigned long tmp;
+
+        /* read IRQ0A -> IRQ15A mask */
+        tmp = bitrev8(__raw_readb(INTMSK00A));
+        tmp |= bitrev8(__raw_readb(INTMSK10A)) << 8;
+
+        /* setup WUPSMSK from clocks and external IRQ mask */
+        msk = (~msk & 0xc030000f) | (tmp << 4);
+        __raw_writel(msk, WUPSMSK);
+
+        /* propage level/edge trigger for external IRQ 0->15 */
+        sh7372_icr_to_irqcr(__raw_readl(ICR1A), &irqcrx_low, &irqcry_low);
+        sh7372_icr_to_irqcr(__raw_readl(ICR2A), &irqcrx_high, &irqcry_high);
+        __raw_writel((irqcrx_high << 16) | irqcrx_low, IRQCR);
+        __raw_writel((irqcry_high << 16) | irqcry_low, IRQCR2);
+
+        /* read IRQ16A -> IRQ31A mask */
+        tmp = bitrev8(__raw_readb(INTMSK20A));
+        tmp |= bitrev8(__raw_readb(INTMSK30A)) << 8;
+
+        /* setup WUPSMSK2 from clocks and external IRQ mask */
+        msk2 = (~msk2 & 0x00030000) | tmp;
+        __raw_writel(msk2, WUPSMSK2);
+
+        /* propage level/edge trigger for external IRQ 16->31 */
+        sh7372_icr_to_irqcr(__raw_readl(ICR3A), &irqcrx_low, &irqcry_low);
+        sh7372_icr_to_irqcr(__raw_readl(ICR4A), &irqcrx_high, &irqcry_high);
+        __raw_writel((irqcrx_high << 16) | irqcrx_low, IRQCR3);
+        __raw_writel((irqcry_high << 16) | irqcry_low, IRQCR4);
 }
+#endif
 
 #ifdef CONFIG_CPU_IDLE
+
 static void sh7372_cpuidle_setup(struct cpuidle_device *dev)
 {
         struct cpuidle_state *state;
@@ -239,9 +429,25 @@ static void sh7372_cpuidle_init(void) {}
 #endif
 
 #ifdef CONFIG_SUSPEND
+
 static int sh7372_enter_suspend(suspend_state_t suspend_state)
 {
-        sh7372_enter_core_standby();
+        unsigned long msk, msk2;
+
+        /* check active clocks to determine potential wakeup sources */
+        if (sh7372_a3sm_valid(&msk, &msk2)) {
+
+                /* convert INTC mask and sense to SYSC mask and sense */
+                sh7372_setup_a3sm(msk, msk2);
+
+                /* enter A3SM sleep with PLLC0 off */
+                pr_debug("entering A3SM\n");
+                sh7372_enter_a3sm_common(0);
+        } else {
+                /* default to Core Standby that supports all wakeup sources */
+                pr_debug("entering Core Standby\n");
+                sh7372_enter_core_standby();
+        }
         return 0;
 }
 
@@ -253,9 +459,6 @@ static void sh7372_suspend_init(void)
 static void sh7372_suspend_init(void) {}
 #endif
 
-#define DBGREG1 0xe6100020
-#define DBGREG9 0xe6100040
-
 void __init sh7372_pm_init(void)
 {
         /* enable DBG hardware block to kick SYSC */
@@ -263,6 +466,9 @@ void __init sh7372_pm_init(void)
         __raw_writel(0x0000a501, DBGREG9);
         __raw_writel(0x00000000, DBGREG1);
 
+        /* do not convert A3SM, A3SP, A3SG, A4R power down into A4S */
+        __raw_writel(0, PDNSEL);
+
         sh7372_suspend_init();
         sh7372_cpuidle_init();
 }
diff --git a/arch/arm/mach-shmobile/pm_runtime.c b/arch/arm/mach-shmobile/pm_runtime.c
index 6ec454e1e063..bd5c6a3b8c55 100644
--- a/arch/arm/mach-shmobile/pm_runtime.c
+++ b/arch/arm/mach-shmobile/pm_runtime.c
@@ -15,6 +15,7 @@
 #include <linux/io.h>
 #include <linux/pm_runtime.h>
 #include <linux/pm_domain.h>
+#include <linux/pm_clock.h>
 #include <linux/platform_device.h>
 #include <linux/clk.h>
 #include <linux/sh_clk.h>
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index 79f0413d8725..2380389e6ac5 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -30,6 +30,7 @@
 #include <linux/sh_dma.h>
 #include <linux/sh_intc.h>
 #include <linux/sh_timer.h>
+#include <linux/pm_domain.h>
 #include <mach/hardware.h>
 #include <mach/sh7372.h>
 #include <asm/mach-types.h>
@@ -169,35 +170,35 @@ static struct platform_device scif6_device = {
 };
 
 /* CMT */
-static struct sh_timer_config cmt10_platform_data = {
-        .name = "CMT10",
-        .channel_offset = 0x10,
-        .timer_bit = 0,
+static struct sh_timer_config cmt2_platform_data = {
+        .name = "CMT2",
+        .channel_offset = 0x40,
+        .timer_bit = 5,
         .clockevent_rating = 125,
         .clocksource_rating = 125,
 };
 
-static struct resource cmt10_resources[] = {
+static struct resource cmt2_resources[] = {
         [0] = {
-                .name   = "CMT10",
-                .start  = 0xe6138010,
-                .end    = 0xe613801b,
+                .name   = "CMT2",
+                .start  = 0xe6130040,
+                .end    = 0xe613004b,
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = evt2irq(0x0b00), /* CMT1_CMT10 */
+                .start  = evt2irq(0x0b80), /* CMT2 */
                 .flags  = IORESOURCE_IRQ,
         },
 };
 
-static struct platform_device cmt10_device = {
+static struct platform_device cmt2_device = {
         .name           = "sh_cmt",
-        .id             = 10,
+        .id             = 2,
         .dev = {
-                .platform_data  = &cmt10_platform_data,
+                .platform_data  = &cmt2_platform_data,
         },
-        .resource       = cmt10_resources,
-        .num_resources  = ARRAY_SIZE(cmt10_resources),
+        .resource       = cmt2_resources,
+        .num_resources  = ARRAY_SIZE(cmt2_resources),
 };
 
 /* TMU */
@@ -602,6 +603,150 @@ static struct platform_device dma2_device = {
         },
 };
 
+/*
+ * USB-DMAC
+ */
+
+unsigned int usbts_shift[] = {3, 4, 5};
+
+enum {
+        XMIT_SZ_8BYTE           = 0,
+        XMIT_SZ_16BYTE          = 1,
+        XMIT_SZ_32BYTE          = 2,
+};
+
+#define USBTS_INDEX2VAL(i) (((i) & 3) << 6)
+
+static const struct sh_dmae_channel sh7372_usb_dmae_channels[] = {
+        {
+                .offset = 0,
+        }, {
+                .offset = 0x20,
+        },
+};
+
+/* USB DMAC0 */
+static const struct sh_dmae_slave_config sh7372_usb_dmae0_slaves[] = {
+        {
+                .slave_id       = SHDMA_SLAVE_USB0_TX,
+                .chcr           = USBTS_INDEX2VAL(XMIT_SZ_8BYTE),
+        }, {
+                .slave_id       = SHDMA_SLAVE_USB0_RX,
+                .chcr           = USBTS_INDEX2VAL(XMIT_SZ_8BYTE),
+        },
+};
+
+static struct sh_dmae_pdata usb_dma0_platform_data = {
+        .slave          = sh7372_usb_dmae0_slaves,
+        .slave_num      = ARRAY_SIZE(sh7372_usb_dmae0_slaves),
+        .channel        = sh7372_usb_dmae_channels,
+        .channel_num    = ARRAY_SIZE(sh7372_usb_dmae_channels),
+        .ts_low_shift   = 6,
+        .ts_low_mask    = 0xc0,
+        .ts_high_shift  = 0,
+        .ts_high_mask   = 0,
+        .ts_shift       = usbts_shift,
+        .ts_shift_num   = ARRAY_SIZE(usbts_shift),
+        .dmaor_init     = DMAOR_DME,
+        .chcr_offset    = 0x14,
+        .chcr_ie_bit    = 1 << 5,
+        .dmaor_is_32bit = 1,
+        .needs_tend_set = 1,
+        .no_dmars       = 1,
+};
+
+static struct resource sh7372_usb_dmae0_resources[] = {
+        {
+                /* Channel registers and DMAOR */
+                .start  = 0xe68a0020,
+                .end    = 0xe68a0064 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                /* VCR/SWR/DMICR */
+                .start  = 0xe68a0000,
+                .end    = 0xe68a0014 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                /* IRQ for channels */
+                .start  = evt2irq(0x0a00),
+                .end    = evt2irq(0x0a00),
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device usb_dma0_device = {
+        .name           = "sh-dma-engine",
+        .id             = 3,
+        .resource       = sh7372_usb_dmae0_resources,
+        .num_resources  = ARRAY_SIZE(sh7372_usb_dmae0_resources),
+        .dev            = {
+                .platform_data  = &usb_dma0_platform_data,
+        },
+};
+
+/* USB DMAC1 */
+static const struct sh_dmae_slave_config sh7372_usb_dmae1_slaves[] = {
+        {
+                .slave_id       = SHDMA_SLAVE_USB1_TX,
+                .chcr           = USBTS_INDEX2VAL(XMIT_SZ_8BYTE),
+        }, {
+                .slave_id       = SHDMA_SLAVE_USB1_RX,
+                .chcr           = USBTS_INDEX2VAL(XMIT_SZ_8BYTE),
+        },
+};
+
+static struct sh_dmae_pdata usb_dma1_platform_data = {
+        .slave          = sh7372_usb_dmae1_slaves,
+        .slave_num      = ARRAY_SIZE(sh7372_usb_dmae1_slaves),
+        .channel        = sh7372_usb_dmae_channels,
+        .channel_num    = ARRAY_SIZE(sh7372_usb_dmae_channels),
+        .ts_low_shift   = 6,
+        .ts_low_mask    = 0xc0,
+        .ts_high_shift  = 0,
+        .ts_high_mask   = 0,
+        .ts_shift       = usbts_shift,
+        .ts_shift_num   = ARRAY_SIZE(usbts_shift),
+        .dmaor_init     = DMAOR_DME,
+        .chcr_offset    = 0x14,
+        .chcr_ie_bit    = 1 << 5,
+        .dmaor_is_32bit = 1,
+        .needs_tend_set = 1,
+        .no_dmars       = 1,
+};
+
+static struct resource sh7372_usb_dmae1_resources[] = {
+        {
+                /* Channel registers and DMAOR */
+                .start  = 0xe68c0020,
+                .end    = 0xe68c0064 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                /* VCR/SWR/DMICR */
+                .start  = 0xe68c0000,
+                .end    = 0xe68c0014 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                /* IRQ for channels */
+                .start  = evt2irq(0x1d00),
+                .end    = evt2irq(0x1d00),
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device usb_dma1_device = {
+        .name           = "sh-dma-engine",
+        .id             = 4,
+        .resource       = sh7372_usb_dmae1_resources,
+        .num_resources  = ARRAY_SIZE(sh7372_usb_dmae1_resources),
+        .dev            = {
+                .platform_data  = &usb_dma1_platform_data,
+        },
+};
+
 /* VPU */
 static struct uio_info vpu_platform_data = {
         .name = "VPU5HG",
@@ -818,7 +963,7 @@ static struct platform_device *sh7372_early_devices[] __initdata = {
         &scif4_device,
         &scif5_device,
         &scif6_device,
-        &cmt10_device,
+        &cmt2_device,
         &tmu00_device,
         &tmu01_device,
 };
@@ -829,6 +974,8 @@ static struct platform_device *sh7372_late_devices[] __initdata = {
         &dma0_device,
         &dma1_device,
         &dma2_device,
+        &usb_dma0_device,
+        &usb_dma1_device,
         &vpu_device,
         &veu0_device,
         &veu1_device,
@@ -844,9 +991,14 @@ void __init sh7372_add_standard_devices(void)
         sh7372_init_pm_domain(&sh7372_a4lc);
         sh7372_init_pm_domain(&sh7372_a4mp);
         sh7372_init_pm_domain(&sh7372_d4);
+        sh7372_init_pm_domain(&sh7372_a4r);
         sh7372_init_pm_domain(&sh7372_a3rv);
         sh7372_init_pm_domain(&sh7372_a3ri);
         sh7372_init_pm_domain(&sh7372_a3sg);
+        sh7372_init_pm_domain(&sh7372_a3sp);
+
+        sh7372_pm_add_subdomain(&sh7372_a4lc, &sh7372_a3rv);
+        sh7372_pm_add_subdomain(&sh7372_a4r, &sh7372_a4lc);
 
         platform_add_devices(sh7372_early_devices,
                             ARRAY_SIZE(sh7372_early_devices));
@@ -857,6 +1009,25 @@ void __init sh7372_add_standard_devices(void)
         sh7372_add_device_to_domain(&sh7372_a3rv, &vpu_device);
         sh7372_add_device_to_domain(&sh7372_a4mp, &spu0_device);
         sh7372_add_device_to_domain(&sh7372_a4mp, &spu1_device);
+        sh7372_add_device_to_domain(&sh7372_a3sp, &scif0_device);
+        sh7372_add_device_to_domain(&sh7372_a3sp, &scif1_device);
+        sh7372_add_device_to_domain(&sh7372_a3sp, &scif2_device);
+        sh7372_add_device_to_domain(&sh7372_a3sp, &scif3_device);
+        sh7372_add_device_to_domain(&sh7372_a3sp, &scif4_device);
+        sh7372_add_device_to_domain(&sh7372_a3sp, &scif5_device);
+        sh7372_add_device_to_domain(&sh7372_a3sp, &scif6_device);
+        sh7372_add_device_to_domain(&sh7372_a3sp, &iic1_device);
+        sh7372_add_device_to_domain(&sh7372_a3sp, &dma0_device);
+        sh7372_add_device_to_domain(&sh7372_a3sp, &dma1_device);
+        sh7372_add_device_to_domain(&sh7372_a3sp, &dma2_device);
+        sh7372_add_device_to_domain(&sh7372_a3sp, &usb_dma0_device);
+        sh7372_add_device_to_domain(&sh7372_a3sp, &usb_dma1_device);
+        sh7372_add_device_to_domain(&sh7372_a4r, &iic0_device);
+        sh7372_add_device_to_domain(&sh7372_a4r, &veu0_device);
+        sh7372_add_device_to_domain(&sh7372_a4r, &veu1_device);
+        sh7372_add_device_to_domain(&sh7372_a4r, &veu2_device);
+        sh7372_add_device_to_domain(&sh7372_a4r, &veu3_device);
+        sh7372_add_device_to_domain(&sh7372_a4r, &jpu_device);
 }
 
 void __init sh7372_add_early_devices(void)
diff --git a/arch/arm/mach-shmobile/sleep-sh7372.S b/arch/arm/mach-shmobile/sleep-sh7372.S
index d37d3ca4d18f..f3ab3c5810ea 100644
--- a/arch/arm/mach-shmobile/sleep-sh7372.S
+++ b/arch/arm/mach-shmobile/sleep-sh7372.S
@@ -30,58 +30,20 @@
  */
 
 #include <linux/linkage.h>
+#include <linux/init.h>
+#include <asm/memory.h>
 #include <asm/assembler.h>
 
-#define SMFRAM 0xe6a70000
-
-        .align
-kernel_flush:
-        .word   v7_flush_dcache_all
-
-        .align  3
-ENTRY(sh7372_cpu_suspend)
-        stmfd   sp!, {r0-r12, lr}       @ save registers on stack
-
-        ldr     r8, =SMFRAM
-
-        mov     r4, sp                  @ Store sp
-        mrs     r5, spsr                @ Store spsr
-        mov     r6, lr                  @ Store lr
-        stmia   r8!, {r4-r6}
-
-        mrc     p15, 0, r4, c1, c0, 2   @ Coprocessor access control register
-        mrc     p15, 0, r5, c2, c0, 0   @ TTBR0
-        mrc     p15, 0, r6, c2, c0, 1   @ TTBR1
-        mrc     p15, 0, r7, c2, c0, 2   @ TTBCR
-        stmia   r8!, {r4-r7}
-
-        mrc     p15, 0, r4, c3, c0, 0   @ Domain access Control Register
-        mrc     p15, 0, r5, c10, c2, 0  @ PRRR
-        mrc     p15, 0, r6, c10, c2, 1  @ NMRR
-        stmia   r8!,{r4-r6}
-
-        mrc     p15, 0, r4, c13, c0, 1  @ Context ID
-        mrc     p15, 0, r5, c13, c0, 2  @ User r/w thread and process ID
-        mrc     p15, 0, r6, c12, c0, 0  @ Secure or NS vector base address
-        mrs     r7, cpsr                @ Store current cpsr
-        stmia   r8!, {r4-r7}
-
-        mrc     p15, 0, r4, c1, c0, 0   @ save control register
-        stmia   r8!, {r4}
-
-        /*
-         * jump out to kernel flush routine
-         *  - reuse that code is better
-         *  - it executes in a cached space so is faster than refetch per-block
-         *  - should be faster and will change with kernel
-         *  - 'might' have to copy address, load and jump to it
-         * Flush all data from the L1 data cache before disabling
-         * SCTLR.C bit.
-         */
-        ldr     r1, kernel_flush
-        mov     lr, pc
-        bx      r1
+#if defined(CONFIG_SUSPEND) || defined(CONFIG_CPU_IDLE)
+        .align  12
+        .text
+        .global sh7372_resume_core_standby_a3sm
+sh7372_resume_core_standby_a3sm:
+        ldr     pc, 1f
+1:      .long   cpu_resume - PAGE_OFFSET + PLAT_PHYS_OFFSET
 
+        .global sh7372_do_idle_a3sm
+sh7372_do_idle_a3sm:
         /*
          * Clear the SCTLR.C bit to prevent further data cache
          * allocation. Clearing SCTLR.C would make all the data accesses
@@ -92,10 +54,13 @@ ENTRY(sh7372_cpu_suspend)
         mcr     p15, 0, r0, c1, c0, 0
         isb
 
+        /* disable L2 cache in the aux control register */
+        mrc     p15, 0, r10, c1, c0, 1
+        bic     r10, r10, #2
+        mcr     p15, 0, r10, c1, c0, 1
+
         /*
-         * Invalidate L1 data cache. Even though only invalidate is
-         * necessary exported flush API is used here. Doing clean
-         * on already clean cache would be almost NOP.
+         * Invalidate data cache again.
          */
         ldr     r1, kernel_flush
         blx     r1
@@ -115,146 +80,16 @@ ENTRY(sh7372_cpu_suspend)
         dsb
         dmb
 
-/*
- * ===================================
- * == WFI instruction => Enter idle ==
- * ===================================
- */
-        wfi                             @ wait for interrupt
-
-/*
- * ===================================
- * == Resume path for non-OFF modes ==
- * ===================================
- */
-        mrc     p15, 0, r0, c1, c0, 0
-        tst     r0, #(1 << 2)           @ Check C bit enabled?
-        orreq   r0, r0, #(1 << 2)       @ Enable the C bit if cleared
-        mcreq   p15, 0, r0, c1, c0, 0
-        isb
-
-/*
- * ===================================
- * == Exit point from non-OFF modes ==
- * ===================================
- */
-        ldmfd   sp!, {r0-r12, pc}       @ restore regs and return
+#define SPDCR 0xe6180008
+#define A3SM (1 << 12)
 
-        .pool
+        /* A3SM power down */
+        ldr     r0, =SPDCR
+        ldr     r1, =A3SM
+        str     r1, [r0]
+1:
+        b      1b
 
-        .align  12
-        .text
-        .global sh7372_cpu_resume
-sh7372_cpu_resume:
-
-        mov     r1, #0
-        /*
-         * Invalidate all instruction caches to PoU
-         * and flush branch target cache
-         */
-        mcr     p15, 0, r1, c7, c5, 0
-
-        ldr     r3, =SMFRAM
-
-        ldmia   r3!, {r4-r6}
-        mov     sp, r4                  @ Restore sp
-        msr     spsr_cxsf, r5           @ Restore spsr
-        mov     lr, r6                  @ Restore lr
-
-        ldmia   r3!, {r4-r7}
-        mcr     p15, 0, r4, c1, c0, 2   @ Coprocessor access Control Register
-        mcr     p15, 0, r5, c2, c0, 0   @ TTBR0
-        mcr     p15, 0, r6, c2, c0, 1   @ TTBR1
-        mcr     p15, 0, r7, c2, c0, 2   @ TTBCR
-
-        ldmia   r3!,{r4-r6}
-        mcr     p15, 0, r4, c3, c0, 0   @ Domain access Control Register
-        mcr     p15, 0, r5, c10, c2, 0  @ PRRR
-        mcr     p15, 0, r6, c10, c2, 1  @ NMRR
-
-        ldmia   r3!,{r4-r7}
-        mcr     p15, 0, r4, c13, c0, 1  @ Context ID
-        mcr     p15, 0, r5, c13, c0, 2  @ User r/w thread and process ID
-        mrc     p15, 0, r6, c12, c0, 0  @ Secure or NS vector base address
-        msr     cpsr, r7                @ store cpsr
-
-        /* Starting to enable MMU here */
-        mrc     p15, 0, r7, c2, c0, 2   @ Read TTBRControl
-        /* Extract N (0:2) bits and decide whether to use TTBR0 or TTBR1 */
-        and     r7, #0x7
-        cmp     r7, #0x0
-        beq     usettbr0
-ttbr_error:
-        /*
-         * More work needs to be done to support N[0:2] value other than 0
-         * So looping here so that the error can be detected
-         */
-        b       ttbr_error
-
-        .align
-cache_pred_disable_mask:
-        .word   0xFFFFE7FB
-ttbrbit_mask:
-        .word   0xFFFFC000
-table_index_mask:
-        .word   0xFFF00000
-table_entry:
-        .word   0x00000C02
-usettbr0:
-
-        mrc     p15, 0, r2, c2, c0, 0
-        ldr     r5, ttbrbit_mask
-        and     r2, r5
-        mov     r4, pc
-        ldr     r5, table_index_mask
-        and     r4, r5                  @ r4 = 31 to 20 bits of pc
-        /* Extract the value to be written to table entry */
-        ldr     r6, table_entry
-        /* r6 has the value to be written to table entry */
-        add     r6, r6, r4
-        /* Getting the address of table entry to modify */
-        lsr     r4, #18
-        /* r2 has the location which needs to be modified */
-        add     r2, r4
-        ldr     r4, [r2]
-        str     r6, [r2] /* modify the table entry */
-
-        mov     r7, r6
-        mov     r5, r2
-        mov     r6, r4
-        /* r5 = original page table address */
-        /* r6 = original page table data */
-
-        mov     r0, #0
-        mcr     p15, 0, r0, c7, c5, 4   @ Flush prefetch buffer
-        mcr     p15, 0, r0, c7, c5, 6   @ Invalidate branch predictor array
-        mcr     p15, 0, r0, c8, c5, 0   @ Invalidate instruction TLB
-        mcr     p15, 0, r0, c8, c6, 0   @ Invalidate data TLB
-
-        /*
-         * Restore control register. This enables the MMU.
-         * The caches and prediction are not enabled here, they
-         * will be enabled after restoring the MMU table entry.
-         */
-        ldmia   r3!, {r4}
-        stmia   r3!, {r5} /* save original page table address */
-        stmia   r3!, {r6} /* save original page table data */
-        stmia   r3!, {r7} /* save modified page table data */
-
-        ldr     r2, cache_pred_disable_mask
-        and     r4, r2
-        mcr     p15, 0, r4, c1, c0, 0
-        dsb
-        isb
-
-        ldr     r0, =restoremmu_on
-        bx      r0
-
-/*
- * ==============================
- * == Exit point from OFF mode ==
- * ==============================
- */
-restoremmu_on:
-
-        ldmfd   sp!, {r0-r12, pc}       @ restore regs and return
+kernel_flush:
+        .word v7_flush_dcache_all
+#endif
diff --git a/arch/arm/mach-spear3xx/Makefile.boot b/arch/arm/mach-spear3xx/Makefile.boot
index 7a1f3c0eadb8..4674a4c221db 100644
--- a/arch/arm/mach-spear3xx/Makefile.boot
+++ b/arch/arm/mach-spear3xx/Makefile.boot
@@ -1,3 +1,3 @@
-zreladdr-y      := 0x00008000
+zreladdr-y      += 0x00008000
 params_phys-y   := 0x00000100
 initrd_phys-y   := 0x00800000
diff --git a/arch/arm/mach-spear6xx/Makefile.boot b/arch/arm/mach-spear6xx/Makefile.boot
index 7a1f3c0eadb8..4674a4c221db 100644
--- a/arch/arm/mach-spear6xx/Makefile.boot
+++ b/arch/arm/mach-spear6xx/Makefile.boot
@@ -1,3 +1,3 @@
-zreladdr-y      := 0x00008000
+zreladdr-y      += 0x00008000
 params_phys-y   := 0x00000100
 initrd_phys-y   := 0x00800000
diff --git a/arch/arm/mach-tcc8k/Makefile.boot b/arch/arm/mach-tcc8k/Makefile.boot
index f135c9deae10..5e02d4156b04 100644
--- a/arch/arm/mach-tcc8k/Makefile.boot
+++ b/arch/arm/mach-tcc8k/Makefile.boot
@@ -1,3 +1,3 @@
-   zreladdr-y           := 0x20008000
+   zreladdr-y           += 0x20008000
 params_phys-y           := 0x20000100
 initrd_phys-y           := 0x20800000
diff --git a/arch/arm/mach-tegra/Makefile.boot b/arch/arm/mach-tegra/Makefile.boot
index 428ad122be03..5e870d29eca1 100644
--- a/arch/arm/mach-tegra/Makefile.boot
+++ b/arch/arm/mach-tegra/Makefile.boot
@@ -1,4 +1,4 @@
-zreladdr-$(CONFIG_ARCH_TEGRA_2x_SOC)    := 0x00008000
+zreladdr-$(CONFIG_ARCH_TEGRA_2x_SOC)    += 0x00008000
 params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100
 initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000
 
diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c
index 846cd7d69e3e..c78ce41cca16 100644
--- a/arch/arm/mach-tegra/board-harmony.c
+++ b/arch/arm/mach-tegra/board-harmony.c
@@ -123,8 +123,8 @@ static struct platform_device *harmony_devices[] __initdata = {
         &harmony_audio_device,
 };
 
-static void __init tegra_harmony_fixup(struct machine_desc *desc,
-        struct tag *tags, char **cmdline, struct meminfo *mi)
+static void __init tegra_harmony_fixup(struct tag *tags, char **cmdline,
+        struct meminfo *mi)
 {
         mi->nr_banks = 2;
         mi->bank[0].start = PHYS_OFFSET;
diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c
index ea2f79c9879b..5e6bc7719642 100644
--- a/arch/arm/mach-tegra/board-paz00.c
+++ b/arch/arm/mach-tegra/board-paz00.c
@@ -84,8 +84,8 @@ static void paz00_usb_init(void)
         platform_device_register(&tegra_ehci3_device);
 }
 
-static void __init tegra_paz00_fixup(struct machine_desc *desc,
-        struct tag *tags, char **cmdline, struct meminfo *mi)
+static void __init tegra_paz00_fixup(struct tag *tags, char **cmdline,
+        struct meminfo *mi)
 {
         mi->nr_banks = 1;
         mi->bank[0].start = PHYS_OFFSET;
diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c
index 89a6d2adc1de..652c3404d0e2 100644
--- a/arch/arm/mach-tegra/board-trimslice.c
+++ b/arch/arm/mach-tegra/board-trimslice.c
@@ -126,8 +126,8 @@ static void trimslice_usb_init(void)
         platform_device_register(&tegra_ehci1_device);
 }
 
-static void __init tegra_trimslice_fixup(struct machine_desc *desc,
-        struct tag *tags, char **cmdline, struct meminfo *mi)
+static void __init tegra_trimslice_fixup(struct tag *tags, char **cmdline,
+        struct meminfo *mi)
 {
         mi->nr_banks = 2;
         mi->bank[0].start = PHYS_OFFSET;
diff --git a/arch/arm/mach-tegra/cpu-tegra.c b/arch/arm/mach-tegra/cpu-tegra.c
index 0e1016a827ac..0e0fd4d889bd 100644
--- a/arch/arm/mach-tegra/cpu-tegra.c
+++ b/arch/arm/mach-tegra/cpu-tegra.c
@@ -32,7 +32,6 @@
 
 #include <asm/system.h>
 
-#include <mach/hardware.h>
 #include <mach/clk.h>
 
 /* Frequency table index must be sequential starting at 0 */
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index 0886cbccddee..7d2b5d03c1df 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -114,10 +114,10 @@ void __init smp_init_cpus(void)
 {
         unsigned int i, ncores = scu_get_core_count(scu_base);
 
-        if (ncores > NR_CPUS) {
-                printk(KERN_ERR "Tegra: no. of cores (%u) greater than configured (%u), clipping\n",
-                        ncores, NR_CPUS);
-                ncores = NR_CPUS;
+        if (ncores > nr_cpu_ids) {
+                pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",
+                        ncores, nr_cpu_ids);
+                ncores = nr_cpu_ids;
         }
 
         for (i = 0; i < ncores; i++)
diff --git a/arch/arm/mach-u300/Kconfig b/arch/arm/mach-u300/Kconfig
index 7b5c229dc7ea..d6e5d306557b 100644
--- a/arch/arm/mach-u300/Kconfig
+++ b/arch/arm/mach-u300/Kconfig
@@ -6,6 +6,8 @@ comment "ST-Ericsson Mobile Platform Products"
 
 config MACH_U300
         bool "U300"
+        select PINCTRL
+        select PINMUX_U300
         select GPIO_U300
 
 comment "ST-Ericsson U300/U330/U335/U365 Feature Selections"
diff --git a/arch/arm/mach-u300/Makefile b/arch/arm/mach-u300/Makefile
index 8fd354aaf0a7..285538124e5e 100644
--- a/arch/arm/mach-u300/Makefile
+++ b/arch/arm/mach-u300/Makefile
@@ -2,7 +2,7 @@
 # Makefile for the linux kernel, U300 machine.
 #
 
-obj-y           := core.o clock.o timer.o padmux.o
+obj-y           := core.o clock.o timer.o
 obj-m           :=
 obj-n           :=
 obj-            :=
diff --git a/arch/arm/mach-u300/Makefile.boot b/arch/arm/mach-u300/Makefile.boot
index 6fbfc6ea2d35..69357affbd77 100644
--- a/arch/arm/mach-u300/Makefile.boot
+++ b/arch/arm/mach-u300/Makefile.boot
@@ -4,10 +4,10 @@
 #   INITRD_PHYS must be in RAM
 
 ifdef CONFIG_MACH_U300_SINGLE_RAM
-     zreladdr-y := 0x28E08000
+     zreladdr-y += 0x28E08000
   params_phys-y := 0x28E00100
 else
-     zreladdr-y := 0x48008000
+     zreladdr-y += 0x48008000
   params_phys-y := 0x48000100
 endif
 
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index fd435f44098b..24f3a96aac35 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -25,6 +25,8 @@
 #include <linux/err.h>
 #include <linux/mtd/nand.h>
 #include <linux/mtd/fsmc.h>
+#include <linux/pinctrl/machine.h>
+#include <linux/pinctrl/pinmux.h>
 
 #include <asm/types.h>
 #include <asm/setup.h>
@@ -1536,6 +1538,14 @@ static struct coh901318_platform coh901318_platform = {
         .max_channels = U300_DMA_CHANNELS,
 };
 
+static struct resource pinmux_resources[] = {
+        {
+                .start = U300_SYSCON_BASE,
+                .end   = U300_SYSCON_BASE + SZ_4K - 1,
+                .flags = IORESOURCE_MEM,
+        },
+};
+
 static struct platform_device wdog_device = {
         .name = "coh901327_wdog",
         .id = -1,
@@ -1655,6 +1665,72 @@ static struct platform_device dma_device = {
         },
 };
 
+static struct platform_device pinmux_device = {
+        .name = "pinmux-u300",
+        .id = -1,
+        .num_resources = ARRAY_SIZE(pinmux_resources),
+        .resource = pinmux_resources,
+};
+
+/* Pinmux settings */
+static struct pinmux_map u300_pinmux_map[] = {
+        /* anonymous maps for chip power and EMIFs */
+        PINMUX_MAP_PRIMARY_SYS_HOG("POWER", "power"),
+        PINMUX_MAP_PRIMARY_SYS_HOG("EMIF0", "emif0"),
+        PINMUX_MAP_PRIMARY_SYS_HOG("EMIF1", "emif1"),
+        /* per-device maps for MMC/SD, SPI and UART */
+        PINMUX_MAP_PRIMARY("MMCSD", "mmc0", "mmci"),
+        PINMUX_MAP_PRIMARY("SPI", "spi0", "pl022"),
+        PINMUX_MAP_PRIMARY("UART0", "uart0", "uart0"),
+};
+
+struct u300_mux_hog {
+        const char *name;
+        struct device *dev;
+        struct pinmux *pmx;
+};
+
+static struct u300_mux_hog u300_mux_hogs[] = {
+        {
+                .name = "uart0",
+                .dev = &uart0_device.dev,
+        },
+        {
+                .name = "spi0",
+                .dev = &pl022_device.dev,
+        },
+        {
+                .name = "mmc0",
+                .dev = &mmcsd_device.dev,
+        },
+};
+
+static int __init u300_pinmux_fetch(void)
+{
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(u300_mux_hogs); i++) {
+                struct pinmux *pmx;
+                int ret;
+
+                pmx = pinmux_get(u300_mux_hogs[i].dev, NULL);
+                if (IS_ERR(pmx)) {
+                        pr_err("u300: could not get pinmux hog %s\n",
+                               u300_mux_hogs[i].name);
+                        continue;
+                }
+                ret = pinmux_enable(pmx);
+                if (ret) {
+                        pr_err("u300: could enable pinmux hog %s\n",
+                               u300_mux_hogs[i].name);
+                        continue;
+                }
+                u300_mux_hogs[i].pmx = pmx;
+        }
+        return 0;
+}
+subsys_initcall(u300_pinmux_fetch);
+
 /*
  * Notice that AMBA devices are initialized before platform devices.
  *
@@ -1668,10 +1744,10 @@ static struct platform_device *platform_devs[] __initdata = {
         &gpio_device,
         &nand_device,
         &wdog_device,
-        &ave_device
+        &ave_device,
+        &pinmux_device,
 };
 
-
 /*
  * Interrupts: the U300 platforms have two pl190 ARM PrimeCells connected
  * together so some interrupts are connected to the first one and some
@@ -1853,6 +1929,10 @@ void __init u300_init_devices(void)
 
         u300_assign_physmem();
 
+        /* Initialize pinmuxing */
+        pinmux_register_mappings(u300_pinmux_map,
+                                 ARRAY_SIZE(u300_pinmux_map));
+
         /* Register subdevices on the I2C buses */
         u300_i2c_register_board_devices();
 
diff --git a/arch/arm/mach-u300/include/mach/syscon.h b/arch/arm/mach-u300/include/mach/syscon.h
index 7444f5c7da97..6e84f07a7c6f 100644
--- a/arch/arm/mach-u300/include/mach/syscon.h
+++ b/arch/arm/mach-u300/include/mach/syscon.h
@@ -234,91 +234,6 @@
 #define U300_SYSCON_ECCR_EMIF_1_RET_OUT_CLK_EN_N_DISABLE        (0x0004)
 #define U300_SYSCON_ECCR_EMIF_MEMCLK_RET_EN_N_DISABLE           (0x0002)
 #define U300_SYSCON_ECCR_EMIF_SDRCLK_RET_EN_N_DISABLE           (0x0001)
-/* PAD MUX Control register 1 (LOW) 16bit (R/W) */
-#define U300_SYSCON_PMC1LR                                      (0x007C)
-#define U300_SYSCON_PMC1LR_MASK                                 (0xFFFF)
-#define U300_SYSCON_PMC1LR_CDI_MASK                             (0xC000)
-#define U300_SYSCON_PMC1LR_CDI_CDI                              (0x0000)
-#define U300_SYSCON_PMC1LR_CDI_EMIF                             (0x4000)
-#ifdef CONFIG_MACH_U300_BS335
-#define U300_SYSCON_PMC1LR_CDI_CDI2                             (0x8000)
-#define U300_SYSCON_PMC1LR_CDI_WCDMA_APP_GPIO                   (0xC000)
-#elif CONFIG_MACH_U300_BS365
-#define U300_SYSCON_PMC1LR_CDI_GPIO                             (0x8000)
-#define U300_SYSCON_PMC1LR_CDI_WCDMA                            (0xC000)
-#endif
-#define U300_SYSCON_PMC1LR_PDI_MASK                             (0x3000)
-#define U300_SYSCON_PMC1LR_PDI_PDI                              (0x0000)
-#define U300_SYSCON_PMC1LR_PDI_EGG                              (0x1000)
-#define U300_SYSCON_PMC1LR_PDI_WCDMA                            (0x3000)
-#define U300_SYSCON_PMC1LR_MMCSD_MASK                           (0x0C00)
-#define U300_SYSCON_PMC1LR_MMCSD_MMCSD                          (0x0000)
-#define U300_SYSCON_PMC1LR_MMCSD_MSPRO                          (0x0400)
-#define U300_SYSCON_PMC1LR_MMCSD_DSP                            (0x0800)
-#define U300_SYSCON_PMC1LR_MMCSD_WCDMA                          (0x0C00)
-#define U300_SYSCON_PMC1LR_ETM_MASK                             (0x0300)
-#define U300_SYSCON_PMC1LR_ETM_ACC                              (0x0000)
-#define U300_SYSCON_PMC1LR_ETM_APP                              (0x0100)
-#define U300_SYSCON_PMC1LR_EMIF_1_CS2_MASK                      (0x00C0)
-#define U300_SYSCON_PMC1LR_EMIF_1_CS2_STATIC                    (0x0000)
-#define U300_SYSCON_PMC1LR_EMIF_1_CS2_NFIF                      (0x0040)
-#define U300_SYSCON_PMC1LR_EMIF_1_CS2_SDRAM                     (0x0080)
-#define U300_SYSCON_PMC1LR_EMIF_1_CS2_STATIC_2GB                (0x00C0)
-#define U300_SYSCON_PMC1LR_EMIF_1_CS1_MASK                      (0x0030)
-#define U300_SYSCON_PMC1LR_EMIF_1_CS1_STATIC                    (0x0000)
-#define U300_SYSCON_PMC1LR_EMIF_1_CS1_NFIF                      (0x0010)
-#define U300_SYSCON_PMC1LR_EMIF_1_CS1_SDRAM                     (0x0020)
-#define U300_SYSCON_PMC1LR_EMIF_1_CS1_SEMI                      (0x0030)
-#define U300_SYSCON_PMC1LR_EMIF_1_CS0_MASK                      (0x000C)
-#define U300_SYSCON_PMC1LR_EMIF_1_CS0_STATIC                    (0x0000)
-#define U300_SYSCON_PMC1LR_EMIF_1_CS0_NFIF                      (0x0004)
-#define U300_SYSCON_PMC1LR_EMIF_1_CS0_SDRAM                     (0x0008)
-#define U300_SYSCON_PMC1LR_EMIF_1_CS0_SEMI                      (0x000C)
-#define U300_SYSCON_PMC1LR_EMIF_1_MASK                          (0x0003)
-#define U300_SYSCON_PMC1LR_EMIF_1_STATIC                        (0x0000)
-#define U300_SYSCON_PMC1LR_EMIF_1_SDRAM0                        (0x0001)
-#define U300_SYSCON_PMC1LR_EMIF_1_SDRAM1                        (0x0002)
-#define U300_SYSCON_PMC1LR_EMIF_1                               (0x0003)
-/* PAD MUX Control register 2 (HIGH) 16bit (R/W) */
-#define U300_SYSCON_PMC1HR                                      (0x007E)
-#define U300_SYSCON_PMC1HR_MASK                                 (0xFFFF)
-#define U300_SYSCON_PMC1HR_MISC_2_MASK                          (0xC000)
-#define U300_SYSCON_PMC1HR_MISC_2_APP_GPIO                      (0x0000)
-#define U300_SYSCON_PMC1HR_MISC_2_MSPRO                         (0x4000)
-#define U300_SYSCON_PMC1HR_MISC_2_DSP                           (0x8000)
-#define U300_SYSCON_PMC1HR_MISC_2_AAIF                          (0xC000)
-#define U300_SYSCON_PMC1HR_APP_GPIO_2_MASK                      (0x3000)
-#define U300_SYSCON_PMC1HR_APP_GPIO_2_APP_GPIO                  (0x0000)
-#define U300_SYSCON_PMC1HR_APP_GPIO_2_NFIF                      (0x1000)
-#define U300_SYSCON_PMC1HR_APP_GPIO_2_DSP                       (0x2000)
-#define U300_SYSCON_PMC1HR_APP_GPIO_2_AAIF                      (0x3000)
-#define U300_SYSCON_PMC1HR_APP_GPIO_1_MASK                      (0x0C00)
-#define U300_SYSCON_PMC1HR_APP_GPIO_1_APP_GPIO                  (0x0000)
-#define U300_SYSCON_PMC1HR_APP_GPIO_1_MMC                       (0x0400)
-#define U300_SYSCON_PMC1HR_APP_GPIO_1_DSP                       (0x0800)
-#define U300_SYSCON_PMC1HR_APP_GPIO_1_AAIF                      (0x0C00)
-#define U300_SYSCON_PMC1HR_APP_SPI_CS_2_MASK                    (0x0300)
-#define U300_SYSCON_PMC1HR_APP_SPI_CS_2_APP_GPIO                (0x0000)
-#define U300_SYSCON_PMC1HR_APP_SPI_CS_2_SPI                     (0x0100)
-#define U300_SYSCON_PMC1HR_APP_SPI_CS_2_AAIF                    (0x0300)
-#define U300_SYSCON_PMC1HR_APP_SPI_CS_1_MASK                    (0x00C0)
-#define U300_SYSCON_PMC1HR_APP_SPI_CS_1_APP_GPIO                (0x0000)
-#define U300_SYSCON_PMC1HR_APP_SPI_CS_1_SPI                     (0x0040)
-#define U300_SYSCON_PMC1HR_APP_SPI_CS_1_AAIF                    (0x00C0)
-#define U300_SYSCON_PMC1HR_APP_SPI_2_MASK                       (0x0030)
-#define U300_SYSCON_PMC1HR_APP_SPI_2_APP_GPIO                   (0x0000)
-#define U300_SYSCON_PMC1HR_APP_SPI_2_SPI                        (0x0010)
-#define U300_SYSCON_PMC1HR_APP_SPI_2_DSP                        (0x0020)
-#define U300_SYSCON_PMC1HR_APP_SPI_2_AAIF                       (0x0030)
-#define U300_SYSCON_PMC1HR_APP_UART0_2_MASK                     (0x000C)
-#define U300_SYSCON_PMC1HR_APP_UART0_2_APP_GPIO                 (0x0000)
-#define U300_SYSCON_PMC1HR_APP_UART0_2_UART0                    (0x0004)
-#define U300_SYSCON_PMC1HR_APP_UART0_2_NFIF_CS                  (0x0008)
-#define U300_SYSCON_PMC1HR_APP_UART0_2_AAIF                     (0x000C)
-#define U300_SYSCON_PMC1HR_APP_UART0_1_MASK                     (0x0003)
-#define U300_SYSCON_PMC1HR_APP_UART0_1_APP_GPIO                 (0x0000)
-#define U300_SYSCON_PMC1HR_APP_UART0_1_UART0                    (0x0001)
-#define U300_SYSCON_PMC1HR_APP_UART0_1_AAIF                     (0x0003)
 /* Step one for killing the applications system 16bit (-/W) */
 #define U300_SYSCON_KA1R                                        (0x0080)
 #define U300_SYSCON_KA1R_MASK                                   (0xFFFF)
@@ -357,57 +272,6 @@
 #define U300_SYSCON_PUCR_EMIF_1_16BIT_PU_ENABLE                 (0x0080)
 #define U300_SYSCON_PUCR_EMIF_1_8BIT_PU_ENABLE                  (0x0040)
 #define U300_SYSCON_PUCR_KEY_IN_PU_EN_MASK                      (0x003F)
-/* Padmux 2 control */
-#define U300_SYSCON_PMC2R                                       (0x100)
-#define U300_SYSCON_PMC2R_APP_MISC_0_MASK                       (0x00C0)
-#define U300_SYSCON_PMC2R_APP_MISC_0_APP_GPIO                   (0x0000)
-#define U300_SYSCON_PMC2R_APP_MISC_0_EMIF_SDRAM                 (0x0040)
-#define U300_SYSCON_PMC2R_APP_MISC_0_MMC                        (0x0080)
-#define U300_SYSCON_PMC2R_APP_MISC_0_CDI2                       (0x00C0)
-#define U300_SYSCON_PMC2R_APP_MISC_1_MASK                       (0x0300)
-#define U300_SYSCON_PMC2R_APP_MISC_1_APP_GPIO                   (0x0000)
-#define U300_SYSCON_PMC2R_APP_MISC_1_EMIF_SDRAM                 (0x0100)
-#define U300_SYSCON_PMC2R_APP_MISC_1_MMC                        (0x0200)
-#define U300_SYSCON_PMC2R_APP_MISC_1_CDI2                       (0x0300)
-#define U300_SYSCON_PMC2R_APP_MISC_2_MASK                       (0x0C00)
-#define U300_SYSCON_PMC2R_APP_MISC_2_APP_GPIO                   (0x0000)
-#define U300_SYSCON_PMC2R_APP_MISC_2_EMIF_SDRAM                 (0x0400)
-#define U300_SYSCON_PMC2R_APP_MISC_2_MMC                        (0x0800)
-#define U300_SYSCON_PMC2R_APP_MISC_2_CDI2                       (0x0C00)
-#define U300_SYSCON_PMC2R_APP_MISC_3_MASK                       (0x3000)
-#define U300_SYSCON_PMC2R_APP_MISC_3_APP_GPIO                   (0x0000)
-#define U300_SYSCON_PMC2R_APP_MISC_3_EMIF_SDRAM                 (0x1000)
-#define U300_SYSCON_PMC2R_APP_MISC_3_MMC                        (0x2000)
-#define U300_SYSCON_PMC2R_APP_MISC_3_CDI2                       (0x3000)
-#define U300_SYSCON_PMC2R_APP_MISC_4_MASK                       (0xC000)
-#define U300_SYSCON_PMC2R_APP_MISC_4_APP_GPIO                   (0x0000)
-#define U300_SYSCON_PMC2R_APP_MISC_4_EMIF_SDRAM                 (0x4000)
-#define U300_SYSCON_PMC2R_APP_MISC_4_MMC                        (0x8000)
-#define U300_SYSCON_PMC2R_APP_MISC_4_ACC_GPIO                   (0xC000)
-/* TODO: More SYSCON registers missing */
-#define U300_SYSCON_PMC3R                                       (0x10c)
-#define U300_SYSCON_PMC3R_APP_MISC_11_MASK                      (0xc000)
-#define U300_SYSCON_PMC3R_APP_MISC_11_SPI                       (0x4000)
-#define U300_SYSCON_PMC3R_APP_MISC_10_MASK                      (0x3000)
-#define U300_SYSCON_PMC3R_APP_MISC_10_SPI                       (0x1000)
-/* TODO: Missing other configs */
-#define U300_SYSCON_PMC4R                                       (0x168)
-#define U300_SYSCON_PMC4R_APP_MISC_12_MASK                      (0x0003)
-#define U300_SYSCON_PMC4R_APP_MISC_12_APP_GPIO                  (0x0000)
-#define U300_SYSCON_PMC4R_APP_MISC_13_MASK                      (0x000C)
-#define U300_SYSCON_PMC4R_APP_MISC_13_CDI                       (0x0000)
-#define U300_SYSCON_PMC4R_APP_MISC_13_SMIA                      (0x0004)
-#define U300_SYSCON_PMC4R_APP_MISC_13_SMIA2                     (0x0008)
-#define U300_SYSCON_PMC4R_APP_MISC_13_APP_GPIO                  (0x000C)
-#define U300_SYSCON_PMC4R_APP_MISC_14_MASK                      (0x0030)
-#define U300_SYSCON_PMC4R_APP_MISC_14_CDI                       (0x0000)
-#define U300_SYSCON_PMC4R_APP_MISC_14_SMIA                      (0x0010)
-#define U300_SYSCON_PMC4R_APP_MISC_14_CDI2                      (0x0020)
-#define U300_SYSCON_PMC4R_APP_MISC_14_APP_GPIO                  (0x0030)
-#define U300_SYSCON_PMC4R_APP_MISC_16_MASK                      (0x0300)
-#define U300_SYSCON_PMC4R_APP_MISC_16_APP_GPIO_13               (0x0000)
-#define U300_SYSCON_PMC4R_APP_MISC_16_APP_UART1_CTS             (0x0100)
-#define U300_SYSCON_PMC4R_APP_MISC_16_EMIF_1_STATIC_CS5_N       (0x0200)
 /* SYS_0_CLK_CONTROL first clock control 16bit (R/W) */
 #define U300_SYSCON_S0CCR                                       (0x120)
 #define U300_SYSCON_S0CCR_FIELD_MASK                            (0x43FF)
diff --git a/arch/arm/mach-u300/mmc.c b/arch/arm/mach-u300/mmc.c
index d9a5c92db74a..4d482aacc272 100644
--- a/arch/arm/mach-u300/mmc.c
+++ b/arch/arm/mach-u300/mmc.c
@@ -21,7 +21,6 @@
 #include <mach/gpio-u300.h>
 
 #include "mmc.h"
-#include "padmux.h"
 
 static struct mmci_platform_data mmc0_plat_data = {
         /*
@@ -45,24 +44,9 @@ static struct mmci_platform_data mmc0_plat_data = {
 int __devinit mmc_init(struct amba_device *adev)
 {
         struct device *mmcsd_device = &adev->dev;
-        struct pmx *pmx;
         int ret = 0;
 
         mmcsd_device->platform_data = &mmc0_plat_data;
 
-        /*
-         * Setup padmuxing for MMC. Since this must always be
-         * compiled into the kernel, pmx is never released.
-         */
-        pmx = pmx_get(mmcsd_device, U300_APP_PMX_MMC_SETTING);
-
-        if (IS_ERR(pmx))
-                pr_warning("Could not get padmux handle\n");
-        else {
-                ret = pmx_activate(mmcsd_device, pmx);
-                if (IS_ERR_VALUE(ret))
-                        pr_warning("Could not activate padmuxing\n");
-        }
-
         return ret;
 }
diff --git a/arch/arm/mach-u300/padmux.c b/arch/arm/mach-u300/padmux.c
deleted file mode 100644
index 4c93c6cefd37..000000000000
--- a/arch/arm/mach-u300/padmux.c
+++ /dev/null
@@ -1,367 +0,0 @@
-/*
- *
- * arch/arm/mach-u300/padmux.c
- *
- *
- * Copyright (C) 2009 ST-Ericsson AB
- * License terms: GNU General Public License (GPL) version 2
- * U300 PADMUX functions
- * Author: Martin Persson <martin.persson@stericsson.com>
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/device.h>
-#include <linux/err.h>
-#include <linux/errno.h>
-#include <linux/io.h>
-#include <linux/mutex.h>
-#include <linux/string.h>
-#include <linux/bug.h>
-#include <linux/debugfs.h>
-#include <linux/seq_file.h>
-#include <mach/u300-regs.h>
-#include <mach/syscon.h>
-#include "padmux.h"
-
-static DEFINE_MUTEX(pmx_mutex);
-
-const u32 pmx_registers[] = {
-        (U300_SYSCON_VBASE + U300_SYSCON_PMC1LR),
-        (U300_SYSCON_VBASE + U300_SYSCON_PMC1HR),
-        (U300_SYSCON_VBASE + U300_SYSCON_PMC2R),
-        (U300_SYSCON_VBASE + U300_SYSCON_PMC3R),
-        (U300_SYSCON_VBASE + U300_SYSCON_PMC4R)
-};
-
-/* High level functionality */
-
-/* Lazy dog:
- * onmask = {
- *   {"PMC1LR" mask, "PMC1LR" value},
- *   {"PMC1HR" mask, "PMC1HR" value},
- *   {"PMC2R"  mask, "PMC2R"  value},
- *   {"PMC3R"  mask, "PMC3R"  value},
- *   {"PMC4R"  mask, "PMC4R"  value}
- * }
- */
-static struct pmx mmc_setting = {
-        .setting = U300_APP_PMX_MMC_SETTING,
-        .default_on = false,
-        .activated = false,
-        .name = "MMC",
-        .onmask = {
-                   {U300_SYSCON_PMC1LR_MMCSD_MASK,
-                    U300_SYSCON_PMC1LR_MMCSD_MMCSD},
-                   {0, 0},
-                   {0, 0},
-                   {0, 0},
-                   {U300_SYSCON_PMC4R_APP_MISC_12_MASK,
-                    U300_SYSCON_PMC4R_APP_MISC_12_APP_GPIO}
-                   },
-};
-
-static struct pmx spi_setting = {
-        .setting = U300_APP_PMX_SPI_SETTING,
-        .default_on = false,
-        .activated = false,
-        .name = "SPI",
-        .onmask = {{0, 0},
-                   {U300_SYSCON_PMC1HR_APP_SPI_2_MASK |
-                    U300_SYSCON_PMC1HR_APP_SPI_CS_1_MASK |
-                    U300_SYSCON_PMC1HR_APP_SPI_CS_2_MASK,
-                    U300_SYSCON_PMC1HR_APP_SPI_2_SPI |
-                    U300_SYSCON_PMC1HR_APP_SPI_CS_1_SPI |
-                    U300_SYSCON_PMC1HR_APP_SPI_CS_2_SPI},
-                   {0, 0},
-                   {0, 0},
-                   {0, 0}
-                   },
-};
-
-/* Available padmux settings */
-static struct pmx *pmx_settings[] = {
-        &mmc_setting,
-        &spi_setting,
-};
-
-static void update_registers(struct pmx *pmx, bool activate)
-{
-        u16 regval, val, mask;
-        int i;
-
-        for (i = 0; i < ARRAY_SIZE(pmx_registers); i++) {
-                if (activate)
-                        val = pmx->onmask[i].val;
-                else
-                        val = 0;
-
-                mask = pmx->onmask[i].mask;
-                if (mask != 0) {
-                        regval = readw(pmx_registers[i]);
-                        regval &= ~mask;
-                        regval |= val;
-                        writew(regval, pmx_registers[i]);
-                }
-        }
-}
-
-struct pmx *pmx_get(struct device *dev, enum pmx_settings setting)
-{
-        int i;
-        struct pmx *pmx = ERR_PTR(-ENOENT);
-
-        if (dev == NULL)
-                return ERR_PTR(-EINVAL);
-
-        mutex_lock(&pmx_mutex);
-        for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) {
-
-                if (setting == pmx_settings[i]->setting) {
-
-                        if (pmx_settings[i]->dev != NULL) {
-                                WARN(1, "padmux: required setting "
-                                     "in use by another consumer\n");
-                        } else {
-                                pmx = pmx_settings[i];
-                                pmx->dev = dev;
-                                dev_dbg(dev, "padmux: setting nr %d is now "
-                                        "bound to %s and ready to use\n",
-                                        setting, dev_name(dev));
-                                break;
-                        }
-                }
-        }
-        mutex_unlock(&pmx_mutex);
-
-        return pmx;
-}
-EXPORT_SYMBOL(pmx_get);
-
-int pmx_put(struct device *dev, struct pmx *pmx)
-{
-        int i;
-        int ret = -ENOENT;
-
-        if (pmx == NULL || dev == NULL)
-                return -EINVAL;
-
-        mutex_lock(&pmx_mutex);
-        for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) {
-
-                if (pmx->setting == pmx_settings[i]->setting) {
-
-                        if (dev != pmx->dev) {
-                                WARN(1, "padmux: cannot release handle as "
-                                        "it is bound to another consumer\n");
-                                ret = -EINVAL;
-                                break;
-                        } else {
-                                pmx_settings[i]->dev = NULL;
-                                ret = 0;
-                                break;
-                        }
-                }
-        }
-        mutex_unlock(&pmx_mutex);
-
-        return ret;
-}
-EXPORT_SYMBOL(pmx_put);
-
-int pmx_activate(struct device *dev, struct pmx *pmx)
-{
-        int i, j, ret;
-        ret = 0;
-
-        if (pmx == NULL || dev == NULL)
-                return -EINVAL;
-
-        mutex_lock(&pmx_mutex);
-
-        /* Make sure the required bits are not used */
-        for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) {
-
-                if (pmx_settings[i]->dev == NULL || pmx_settings[i] == pmx)
-                        continue;
-
-                for (j = 0; j < ARRAY_SIZE(pmx_registers); j++) {
-
-                        if (pmx_settings[i]->onmask[j].mask & pmx->
-                                onmask[j].mask) {
-                                /* More than one entry on the same bits */
-                                WARN(1, "padmux: cannot activate "
-                                        "setting. Bit conflict with "
-                                        "an active setting\n");
-
-                                ret = -EUSERS;
-                                goto exit;
-                        }
-                }
-        }
-        update_registers(pmx, true);
-        pmx->activated = true;
-        dev_dbg(dev, "padmux: setting nr %d is activated\n",
-                pmx->setting);
-
-exit:
-        mutex_unlock(&pmx_mutex);
-        return ret;
-}
-EXPORT_SYMBOL(pmx_activate);
-
-int pmx_deactivate(struct device *dev, struct pmx *pmx)
-{
-        int i;
-        int ret = -ENOENT;
-
-        if (pmx == NULL || dev == NULL)
-                return -EINVAL;
-
-        mutex_lock(&pmx_mutex);
-        for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) {
-
-                if (pmx_settings[i]->dev == NULL)
-                        continue;
-
-                if (pmx->setting == pmx_settings[i]->setting) {
-
-                        if (dev != pmx->dev) {
-                                WARN(1, "padmux: cannot deactivate "
-                                     "pmx setting as it was activated "
-                                     "by another consumer\n");
-
-                                ret = -EBUSY;
-                                continue;
-                        } else {
-                                update_registers(pmx, false);
-                                pmx_settings[i]->dev = NULL;
-                                pmx->activated = false;
-                                ret = 0;
-                                dev_dbg(dev, "padmux: setting nr %d is deactivated",
-                                        pmx->setting);
-                                break;
-                        }
-                }
-        }
-        mutex_unlock(&pmx_mutex);
-
-        return ret;
-}
-EXPORT_SYMBOL(pmx_deactivate);
-
-/*
- * For internal use only. If it is to be exported,
- * it should be reentrant. Notice that pmx_activate
- * (i.e. runtime settings) always override default settings.
- */
-static int pmx_set_default(void)
-{
-        /* Used to identify several entries on the same bits */
-        u16 modbits[ARRAY_SIZE(pmx_registers)];
-
-        int i, j;
-
-        memset(modbits, 0, ARRAY_SIZE(pmx_registers) * sizeof(u16));
-
-        for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) {
-
-                if (!pmx_settings[i]->default_on)
-                        continue;
-
-                for (j = 0; j < ARRAY_SIZE(pmx_registers); j++) {
-
-                        /* Make sure there is only one entry on the same bits */
-                        if (modbits[j] & pmx_settings[i]->onmask[j].mask) {
-                                BUG();
-                                return -EUSERS;
-                        }
-                        modbits[j] |= pmx_settings[i]->onmask[j].mask;
-                }
-                update_registers(pmx_settings[i], true);
-        }
-        return 0;
-}
-
-#if (defined(CONFIG_DEBUG_FS) && defined(CONFIG_U300_DEBUG))
-static int pmx_show(struct seq_file *s, void *data)
-{
-        int i;
-        seq_printf(s, "-------------------------------------------------\n");
-        seq_printf(s, "SETTING     BOUND TO DEVICE               STATE\n");
-        seq_printf(s, "-------------------------------------------------\n");
-        mutex_lock(&pmx_mutex);
-        for (i = 0; i < ARRAY_SIZE(pmx_settings); i++) {
-                /* Format pmx and device name nicely */
-                char cdp[33];
-                int chars;
-
-                chars = snprintf(&cdp[0], 17, "%s", pmx_settings[i]->name);
-                while (chars < 16) {
-                        cdp[chars] = ' ';
-                        chars++;
-                }
-                chars = snprintf(&cdp[16], 17, "%s", pmx_settings[i]->dev ?
-                                dev_name(pmx_settings[i]->dev) : "N/A");
-                while (chars < 16) {
-                        cdp[chars+16] = ' ';
-                        chars++;
-                }
-                cdp[32] = '\0';
-
-                seq_printf(s,
-                        "%s\t%s\n",
-                        &cdp[0],
-                        pmx_settings[i]->activated ?
-                        "ACTIVATED" : "DEACTIVATED"
-                        );
-
-        }
-        mutex_unlock(&pmx_mutex);
-        return 0;
-}
-
-static int pmx_open(struct inode *inode, struct file *file)
-{
-        return single_open(file, pmx_show, NULL);
-}
-
-static const struct file_operations pmx_operations = {
-        .owner          = THIS_MODULE,
-        .open           = pmx_open,
-        .read           = seq_read,
-        .llseek         = seq_lseek,
-        .release        = single_release,
-};
-
-static int __init init_pmx_read_debugfs(void)
-{
-        /* Expose a simple debugfs interface to view pmx settings */
-        (void) debugfs_create_file("padmux", S_IFREG | S_IRUGO,
-                                   NULL, NULL,
-                                   &pmx_operations);
-        return 0;
-}
-
-/*
- * This needs to come in after the core_initcall(),
- * because debugfs is not available until
- * the subsystems come up.
- */
-module_init(init_pmx_read_debugfs);
-#endif
-
-static int __init pmx_init(void)
-{
-        int ret;
-
-        ret = pmx_set_default();
-
-        if (IS_ERR_VALUE(ret))
-                pr_crit("padmux: default settings could not be set\n");
-
-        return 0;
-}
-
-/* Should be initialized before consumers */
-core_initcall(pmx_init);
diff --git a/arch/arm/mach-u300/padmux.h b/arch/arm/mach-u300/padmux.h
deleted file mode 100644
index 6e8b86064097..000000000000
--- a/arch/arm/mach-u300/padmux.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- *
- * arch/arm/mach-u300/padmux.h
- *
- *
- * Copyright (C) 2009 ST-Ericsson AB
- * License terms: GNU General Public License (GPL) version 2
- * U300 PADMUX API
- * Author: Martin Persson <martin.persson@stericsson.com>
- */
-
-#ifndef __MACH_U300_PADMUX_H
-#define __MACH_U300_PADMUX_H
-
-enum pmx_settings {
-        U300_APP_PMX_MMC_SETTING,
-        U300_APP_PMX_SPI_SETTING
-};
-
-struct pmx_onmask {
-        u16 mask;               /* Mask bits */
-        u16 val;                /* Value when active */
-};
-
-struct pmx {
-        struct device *dev;
-        enum pmx_settings setting;
-        char *name;
-        bool activated;
-        bool default_on;
-        struct pmx_onmask onmask[];
-};
-
-struct pmx *pmx_get(struct device *dev, enum pmx_settings setting);
-int pmx_put(struct device *dev, struct pmx *pmx);
-int pmx_activate(struct device *dev, struct pmx *pmx);
-int pmx_deactivate(struct device *dev, struct pmx *pmx);
-
-#endif
diff --git a/arch/arm/mach-u300/spi.c b/arch/arm/mach-u300/spi.c
index 7b597e2b19e2..a1affacfa59c 100644
--- a/arch/arm/mach-u300/spi.c
+++ b/arch/arm/mach-u300/spi.c
@@ -14,8 +14,6 @@
 #include <mach/coh901318.h>
 #include <mach/dma_channels.h>
 
-#include "padmux.h"
-
 /*
  * The following is for the actual devices on the SSP/SPI bus
  */
@@ -95,25 +93,7 @@ static struct pl022_ssp_controller ssp_platform_data = {
 
 void __init u300_spi_init(struct amba_device *adev)
 {
-        struct pmx *pmx;
-
         adev->dev.platform_data = &ssp_platform_data;
-        /*
-         * Setup padmuxing for SPI. Since this must always be
-         * compiled into the kernel, pmx is never released.
-         */
-        pmx = pmx_get(&adev->dev, U300_APP_PMX_SPI_SETTING);
-
-        if (IS_ERR(pmx))
-                dev_warn(&adev->dev, "Could not get padmux handle\n");
-        else {
-                int ret;
-
-                ret = pmx_activate(&adev->dev, pmx);
-                if (IS_ERR_VALUE(ret))
-                        dev_warn(&adev->dev, "Could not activate padmuxing\n");
-        }
-
 }
 
 void __init u300_spi_register_board_devices(void)
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index 4210cb434dbc..a3e0c8692f0d 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -6,6 +6,7 @@ config UX500_SOC_COMMON
         select ARM_GIC
         select HAS_MTU
         select ARM_ERRATA_753970
+        select ARM_ERRATA_754322
 
 menu "Ux500 SoC"
 
diff --git a/arch/arm/mach-ux500/Makefile.boot b/arch/arm/mach-ux500/Makefile.boot
index c7e75acfe6c9..ff0a4b5b0a82 100644
--- a/arch/arm/mach-ux500/Makefile.boot
+++ b/arch/arm/mach-ux500/Makefile.boot
@@ -1,4 +1,4 @@
-   zreladdr-y   := 0x00008000
+   zreladdr-y   += 0x00008000
 params_phys-y   := 0x00000100
 initrd_phys-y   := 0x00800000
 
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index a33df5f4c27a..eb5199102cfa 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -156,12 +156,10 @@ void __init smp_init_cpus(void)
         ncores = scu_base ? scu_get_core_count(scu_base) : 1;
 
         /* sanity check */
-        if (ncores > NR_CPUS) {
-                printk(KERN_WARNING
-                       "U8500: no. of cores (%d) greater than configured "
-                       "maximum of %d - clipping\n",
-                       ncores, NR_CPUS);
-                ncores = NR_CPUS;
+        if (ncores > nr_cpu_ids) {
+                pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",
+                        ncores, nr_cpu_ids);
+                ncores = nr_cpu_ids;
         }
 
         for (i = 0; i < ncores; i++)
diff --git a/arch/arm/mach-versatile/Makefile.boot b/arch/arm/mach-versatile/Makefile.boot
index c7e75acfe6c9..ff0a4b5b0a82 100644
--- a/arch/arm/mach-versatile/Makefile.boot
+++ b/arch/arm/mach-versatile/Makefile.boot
@@ -1,4 +1,4 @@
-   zreladdr-y   := 0x00008000
+   zreladdr-y   += 0x00008000
 params_phys-y   := 0x00000100
 initrd_phys-y   := 0x00800000
 
diff --git a/arch/arm/mach-vexpress/Makefile.boot b/arch/arm/mach-vexpress/Makefile.boot
index 07c2d9c457ec..8630b3d10a4d 100644
--- a/arch/arm/mach-vexpress/Makefile.boot
+++ b/arch/arm/mach-vexpress/Makefile.boot
@@ -1,3 +1,3 @@
-   zreladdr-y   := 0x60008000
+   zreladdr-y   += 0x60008000
 params_phys-y   := 0x60000100
 initrd_phys-y   := 0x60800000
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c
index bfd32f52c2db..2b1e836a76ed 100644
--- a/arch/arm/mach-vexpress/ct-ca9x4.c
+++ b/arch/arm/mach-vexpress/ct-ca9x4.c
@@ -221,6 +221,12 @@ static void ct_ca9x4_init_cpu_map(void)
 {
         int i, ncores = scu_get_core_count(MMIO_P2V(A9_MPCORE_SCU));
 
+        if (ncores > nr_cpu_ids) {
+                pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",
+                        ncores, nr_cpu_ids);
+                ncores = nr_cpu_ids;
+        }
+
         for (i = 0; i < ncores; ++i)
                 set_cpu_possible(i, true);
 
diff --git a/arch/arm/mach-vexpress/hotplug.c b/arch/arm/mach-vexpress/hotplug.c
index ea4cbfb90a66..3668cf91d2de 100644
--- a/arch/arm/mach-vexpress/hotplug.c
+++ b/arch/arm/mach-vexpress/hotplug.c
@@ -13,6 +13,7 @@
 #include <linux/smp.h>
 
 #include <asm/cacheflush.h>
+#include <asm/system.h>
 
 extern volatile int pen_release;
 
@@ -62,13 +63,7 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
          * code will have already disabled interrupts
          */
         for (;;) {
-                /*
-                 * here's the WFI
-                 */
-                asm(".word      0xe320f003\n"
-                    :
-                    :
-                    : "memory", "cc");
+                wfi();
 
                 if (pen_release == cpu) {
                         /*
diff --git a/arch/arm/mach-vexpress/include/mach/io.h b/arch/arm/mach-vexpress/include/mach/io.h
index 748bb524ee71..13522d86685e 100644
--- a/arch/arm/mach-vexpress/include/mach/io.h
+++ b/arch/arm/mach-vexpress/include/mach/io.h
@@ -20,8 +20,6 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-#define IO_SPACE_LIMIT 0xffffffff
-
 #define __io(a)         __typesafe_io(a)
 #define __mem_pci(a)    (a)
 
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index 9e6b93b1a043..d0d267a8d3f9 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -318,6 +318,10 @@ static struct clk v2m_sp804_clk = {
         .rate   = 1000000,
 };
 
+static struct clk v2m_ref_clk = {
+        .rate   = 32768,
+};
+
 static struct clk dummy_apb_pclk;
 
 static struct clk_lookup v2m_lookups[] = {
@@ -348,6 +352,9 @@ static struct clk_lookup v2m_lookups[] = {
         }, {    /* CLCD */
                 .dev_id         = "mb:clcd",
                 .clk            = &osc1_clk,
+        }, {    /* SP805 WDT */
+                .dev_id         = "mb:wdt",
+                .clk            = &v2m_ref_clk,
         }, {    /* SP804 timers */
                 .dev_id         = "sp804",
                 .con_id         = "v2m-timer0",
diff --git a/arch/arm/mach-vt8500/Makefile.boot b/arch/arm/mach-vt8500/Makefile.boot
index a8acc4e24902..b79c41cdfdff 100644
--- a/arch/arm/mach-vt8500/Makefile.boot
+++ b/arch/arm/mach-vt8500/Makefile.boot
@@ -1,3 +1,3 @@
-   zreladdr-y   := 0x00008000
+   zreladdr-y   += 0x00008000
 params_phys-y   := 0x00000100
 initrd_phys-y   := 0x01000000
diff --git a/arch/arm/mach-vt8500/include/mach/io.h b/arch/arm/mach-vt8500/include/mach/io.h
index 9077239f78c9..46181eecf273 100644
--- a/arch/arm/mach-vt8500/include/mach/io.h
+++ b/arch/arm/mach-vt8500/include/mach/io.h
@@ -20,8 +20,6 @@
 #ifndef __ASM_ARM_ARCH_IO_H
 #define __ASM_ARM_ARCH_IO_H
 
-#define IO_SPACE_LIMIT 0xffff
-
 #define __io(a)         __typesafe_io((a) + 0xf0000000)
 #define __mem_pci(a)    (a)
 
diff --git a/arch/arm/mach-w90x900/Makefile.boot b/arch/arm/mach-w90x900/Makefile.boot
index a057b546b6e5..6c3d421c2d11 100644
--- a/arch/arm/mach-w90x900/Makefile.boot
+++ b/arch/arm/mach-w90x900/Makefile.boot
@@ -1,3 +1,3 @@
-zreladdr-y      := 0x00008000
+zreladdr-y      += 0x00008000
 params_phys-y   := 0x00000100
 
diff --git a/arch/arm/mach-w90x900/cpu.c b/arch/arm/mach-w90x900/cpu.c
index 83c56324a472..0a235e502330 100644
--- a/arch/arm/mach-w90x900/cpu.c
+++ b/arch/arm/mach-w90x900/cpu.c
@@ -60,7 +60,7 @@ static DEFINE_CLK(emc, 7);
 static DEFINE_SUBCLK(rmii, 2);
 static DEFINE_CLK(usbd, 8);
 static DEFINE_CLK(usbh, 9);
-static DEFINE_CLK(g2d, 10);;
+static DEFINE_CLK(g2d, 10);
 static DEFINE_CLK(pwm, 18);
 static DEFINE_CLK(ps2, 24);
 static DEFINE_CLK(kpi, 25);
diff --git a/arch/arm/mach-zynq/Makefile.boot b/arch/arm/mach-zynq/Makefile.boot
index 67039c3e0c48..760a0efe7580 100644
--- a/arch/arm/mach-zynq/Makefile.boot
+++ b/arch/arm/mach-zynq/Makefile.boot
@@ -1,3 +1,3 @@
-   zreladdr-y   := 0x00008000
+   zreladdr-y   += 0x00008000
 params_phys-y   := 0x00000100
 initrd_phys-y   := 0x00800000
diff --git a/arch/arm/mm/abort-macro.S b/arch/arm/mm/abort-macro.S
index 52162d59407a..2cbf68ef0e83 100644
--- a/arch/arm/mm/abort-macro.S
+++ b/arch/arm/mm/abort-macro.S
@@ -17,7 +17,7 @@
         cmp     \tmp, # 0x5600                  @ Is it ldrsb?
         orreq   \tmp, \tmp, #1 << 11            @ Set L-bit if yes
         tst     \tmp, #1 << 11                  @ L = 0 -> write
-        orreq   \psr, \psr, #1 << 11            @ yes.
+        orreq   \fsr, \fsr, #1 << 11            @ yes.
         b       do_DataAbort
 not_thumb:
         .endm
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index be7c638b648b..c335c76e0d88 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -22,6 +22,7 @@
 #include <linux/sched.h>
 #include <linux/uaccess.h>
 
+#include <asm/system.h>
 #include <asm/unaligned.h>
 
 #include "fault.h"
@@ -85,6 +86,33 @@ core_param(alignment, ai_usermode, int, 0600);
 #define UM_FIXUP        (1 << 1)
 #define UM_SIGNAL       (1 << 2)
 
+/* Return true if and only if the ARMv6 unaligned access model is in use. */
+static bool cpu_is_v6_unaligned(void)
+{
+        return cpu_architecture() >= CPU_ARCH_ARMv6 && (cr_alignment & CR_U);
+}
+
+static int safe_usermode(int new_usermode, bool warn)
+{
+        /*
+         * ARMv6 and later CPUs can perform unaligned accesses for
+         * most single load and store instructions up to word size.
+         * LDM, STM, LDRD and STRD still need to be handled.
+         *
+         * Ignoring the alignment fault is not an option on these
+         * CPUs since we spin re-faulting the instruction without
+         * making any progress.
+         */
+        if (cpu_is_v6_unaligned() && !(new_usermode & (UM_FIXUP | UM_SIGNAL))) {
+                new_usermode |= UM_FIXUP;
+
+                if (warn)
+                        printk(KERN_WARNING "alignment: ignoring faults is unsafe on this CPU.  Defaulting to fixup mode.\n");
+        }
+
+        return new_usermode;
+}
+
 #ifdef CONFIG_PROC_FS
 static const char *usermode_action[] = {
         "ignored",
@@ -125,7 +153,7 @@ static ssize_t alignment_proc_write(struct file *file, const char __user *buffer
                 if (get_user(mode, buffer))
                         return -EFAULT;
                 if (mode >= '0' && mode <= '5')
-                        ai_usermode = mode - '0';
+                        ai_usermode = safe_usermode(mode - '0', true);
         }
         return count;
 }
@@ -886,9 +914,16 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
         if (ai_usermode & UM_FIXUP)
                 goto fixup;
 
-        if (ai_usermode & UM_SIGNAL)
-                force_sig(SIGBUS, current);
-        else {
+        if (ai_usermode & UM_SIGNAL) {
+                siginfo_t si;
+
+                si.si_signo = SIGBUS;
+                si.si_errno = 0;
+                si.si_code = BUS_ADRALN;
+                si.si_addr = (void __user *)addr;
+
+                force_sig_info(si.si_signo, &si, current);
+        } else {
                 /*
                  * We're about to disable the alignment trap and return to
                  * user space.  But if an interrupt occurs before actually
@@ -926,20 +961,11 @@ static int __init alignment_init(void)
                 return -ENOMEM;
 #endif
 
-        /*
-         * ARMv6 and later CPUs can perform unaligned accesses for
-         * most single load and store instructions up to word size.
-         * LDM, STM, LDRD and STRD still need to be handled.
-         *
-         * Ignoring the alignment fault is not an option on these
-         * CPUs since we spin re-faulting the instruction without
-         * making any progress.
-         */
-        if (cpu_architecture() >= CPU_ARCH_ARMv6 && (cr_alignment & CR_U)) {
+        if (cpu_is_v6_unaligned()) {
                 cr_alignment &= ~CR_A;
                 cr_no_alignment &= ~CR_A;
                 set_cr(cr_alignment);
-                ai_usermode = UM_FIXUP;
+                ai_usermode = safe_usermode(ai_usermode, false);
         }
 
         hook_fault_code(1, do_alignment, SIGBUS, BUS_ADRALN,
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 44c086710d2b..8ac9e9f84790 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -16,9 +16,12 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
+#include <linux/err.h>
 #include <linux/init.h>
 #include <linux/spinlock.h>
 #include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
 
 #include <asm/cacheflush.h>
 #include <asm/hardware/cache-l2x0.h>
@@ -26,15 +29,23 @@
 #define CACHE_LINE_SIZE         32
 
 static void __iomem *l2x0_base;
-static DEFINE_SPINLOCK(l2x0_lock);
+static DEFINE_RAW_SPINLOCK(l2x0_lock);
 static uint32_t l2x0_way_mask;  /* Bitmask of active ways */
 static uint32_t l2x0_size;
 
+struct l2x0_regs l2x0_saved_regs;
+
+struct l2x0_of_data {
+        void (*setup)(const struct device_node *, __u32 *, __u32 *);
+        void (*save)(void);
+        void (*resume)(void);
+};
+
 static inline void cache_wait_way(void __iomem *reg, unsigned long mask)
 {
         /* wait for cache operation by line or way to complete */
         while (readl_relaxed(reg) & mask)
-                ;
+                cpu_relax();
 }
 
 #ifdef CONFIG_CACHE_PL310
@@ -115,9 +126,9 @@ static void l2x0_cache_sync(void)
 {
         unsigned long flags;
 
-        spin_lock_irqsave(&l2x0_lock, flags);
+        raw_spin_lock_irqsave(&l2x0_lock, flags);
         cache_sync();
-        spin_unlock_irqrestore(&l2x0_lock, flags);
+        raw_spin_unlock_irqrestore(&l2x0_lock, flags);
 }
 
 static void __l2x0_flush_all(void)
@@ -134,9 +145,9 @@ static void l2x0_flush_all(void)
         unsigned long flags;
 
         /* clean all ways */
-        spin_lock_irqsave(&l2x0_lock, flags);
+        raw_spin_lock_irqsave(&l2x0_lock, flags);
         __l2x0_flush_all();
-        spin_unlock_irqrestore(&l2x0_lock, flags);
+        raw_spin_unlock_irqrestore(&l2x0_lock, flags);
 }
 
 static void l2x0_clean_all(void)
@@ -144,11 +155,11 @@ static void l2x0_clean_all(void)
         unsigned long flags;
 
         /* clean all ways */
-        spin_lock_irqsave(&l2x0_lock, flags);
+        raw_spin_lock_irqsave(&l2x0_lock, flags);
         writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_CLEAN_WAY);
         cache_wait_way(l2x0_base + L2X0_CLEAN_WAY, l2x0_way_mask);
         cache_sync();
-        spin_unlock_irqrestore(&l2x0_lock, flags);
+        raw_spin_unlock_irqrestore(&l2x0_lock, flags);
 }
 
 static void l2x0_inv_all(void)
@@ -156,13 +167,13 @@ static void l2x0_inv_all(void)
         unsigned long flags;
 
         /* invalidate all ways */
-        spin_lock_irqsave(&l2x0_lock, flags);
+        raw_spin_lock_irqsave(&l2x0_lock, flags);
         /* Invalidating when L2 is enabled is a nono */
         BUG_ON(readl(l2x0_base + L2X0_CTRL) & 1);
         writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_INV_WAY);
         cache_wait_way(l2x0_base + L2X0_INV_WAY, l2x0_way_mask);
         cache_sync();
-        spin_unlock_irqrestore(&l2x0_lock, flags);
+        raw_spin_unlock_irqrestore(&l2x0_lock, flags);
 }
 
 static void l2x0_inv_range(unsigned long start, unsigned long end)
@@ -170,7 +181,7 @@ static void l2x0_inv_range(unsigned long start, unsigned long end)
         void __iomem *base = l2x0_base;
         unsigned long flags;
 
-        spin_lock_irqsave(&l2x0_lock, flags);
+        raw_spin_lock_irqsave(&l2x0_lock, flags);
         if (start & (CACHE_LINE_SIZE - 1)) {
                 start &= ~(CACHE_LINE_SIZE - 1);
                 debug_writel(0x03);
@@ -195,13 +206,13 @@ static void l2x0_inv_range(unsigned long start, unsigned long end)
                 }
 
                 if (blk_end < end) {
-                        spin_unlock_irqrestore(&l2x0_lock, flags);
-                        spin_lock_irqsave(&l2x0_lock, flags);
+                        raw_spin_unlock_irqrestore(&l2x0_lock, flags);
+                        raw_spin_lock_irqsave(&l2x0_lock, flags);
                 }
         }
         cache_wait(base + L2X0_INV_LINE_PA, 1);
         cache_sync();
-        spin_unlock_irqrestore(&l2x0_lock, flags);
+        raw_spin_unlock_irqrestore(&l2x0_lock, flags);
 }
 
 static void l2x0_clean_range(unsigned long start, unsigned long end)
@@ -214,7 +225,7 @@ static void l2x0_clean_range(unsigned long start, unsigned long end)
                 return;
         }
 
-        spin_lock_irqsave(&l2x0_lock, flags);
+        raw_spin_lock_irqsave(&l2x0_lock, flags);
         start &= ~(CACHE_LINE_SIZE - 1);
         while (start < end) {
                 unsigned long blk_end = start + min(end - start, 4096UL);
@@ -225,13 +236,13 @@ static void l2x0_clean_range(unsigned long start, unsigned long end)
                 }
 
                 if (blk_end < end) {
-                        spin_unlock_irqrestore(&l2x0_lock, flags);
-                        spin_lock_irqsave(&l2x0_lock, flags);
+                        raw_spin_unlock_irqrestore(&l2x0_lock, flags);
+                        raw_spin_lock_irqsave(&l2x0_lock, flags);
                 }
         }
         cache_wait(base + L2X0_CLEAN_LINE_PA, 1);
         cache_sync();
-        spin_unlock_irqrestore(&l2x0_lock, flags);
+        raw_spin_unlock_irqrestore(&l2x0_lock, flags);
 }
 
 static void l2x0_flush_range(unsigned long start, unsigned long end)
@@ -244,7 +255,7 @@ static void l2x0_flush_range(unsigned long start, unsigned long end)
                 return;
         }
 
-        spin_lock_irqsave(&l2x0_lock, flags);
+        raw_spin_lock_irqsave(&l2x0_lock, flags);
         start &= ~(CACHE_LINE_SIZE - 1);
         while (start < end) {
                 unsigned long blk_end = start + min(end - start, 4096UL);
@@ -257,24 +268,43 @@ static void l2x0_flush_range(unsigned long start, unsigned long end)
                 debug_writel(0x00);
 
                 if (blk_end < end) {
-                        spin_unlock_irqrestore(&l2x0_lock, flags);
-                        spin_lock_irqsave(&l2x0_lock, flags);
+                        raw_spin_unlock_irqrestore(&l2x0_lock, flags);
+                        raw_spin_lock_irqsave(&l2x0_lock, flags);
                 }
         }
         cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1);
         cache_sync();
-        spin_unlock_irqrestore(&l2x0_lock, flags);
+        raw_spin_unlock_irqrestore(&l2x0_lock, flags);
 }
 
 static void l2x0_disable(void)
 {
         unsigned long flags;
 
-        spin_lock_irqsave(&l2x0_lock, flags);
+        raw_spin_lock_irqsave(&l2x0_lock, flags);
         __l2x0_flush_all();
         writel_relaxed(0, l2x0_base + L2X0_CTRL);
         dsb();
-        spin_unlock_irqrestore(&l2x0_lock, flags);
+        raw_spin_unlock_irqrestore(&l2x0_lock, flags);
+}
+
+static void l2x0_unlock(__u32 cache_id)
+{
+        int lockregs;
+        int i;
+
+        if (cache_id == L2X0_CACHE_ID_PART_L310)
+                lockregs = 8;
+        else
+                /* L210 and unknown types */
+                lockregs = 1;
+
+        for (i = 0; i < lockregs; i++) {
+                writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE +
+                               i * L2X0_LOCKDOWN_STRIDE);
+                writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE +
+                               i * L2X0_LOCKDOWN_STRIDE);
+        }
 }
 
 void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
@@ -328,10 +358,14 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
          * accessing the below registers will fault.
          */
         if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & 1)) {
+                /* Make sure that I&D is not locked down when starting */
+                l2x0_unlock(cache_id);
 
                 /* l2x0 controller is disabled */
                 writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL);
 
+                l2x0_saved_regs.aux_ctrl = aux;
+
                 l2x0_inv_all();
 
                 /* enable L2X0 */
@@ -351,3 +385,202 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
         printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x, Cache size: %d B\n",
                         ways, cache_id, aux, l2x0_size);
 }
+
+#ifdef CONFIG_OF
+static void __init l2x0_of_setup(const struct device_node *np,
+                                 __u32 *aux_val, __u32 *aux_mask)
+{
+        u32 data[2] = { 0, 0 };
+        u32 tag = 0;
+        u32 dirty = 0;
+        u32 val = 0, mask = 0;
+
+        of_property_read_u32(np, "arm,tag-latency", &tag);
+        if (tag) {
+                mask |= L2X0_AUX_CTRL_TAG_LATENCY_MASK;
+                val |= (tag - 1) << L2X0_AUX_CTRL_TAG_LATENCY_SHIFT;
+        }
+
+        of_property_read_u32_array(np, "arm,data-latency",
+                                   data, ARRAY_SIZE(data));
+        if (data[0] && data[1]) {
+                mask |= L2X0_AUX_CTRL_DATA_RD_LATENCY_MASK |
+                        L2X0_AUX_CTRL_DATA_WR_LATENCY_MASK;
+                val |= ((data[0] - 1) << L2X0_AUX_CTRL_DATA_RD_LATENCY_SHIFT) |
+                       ((data[1] - 1) << L2X0_AUX_CTRL_DATA_WR_LATENCY_SHIFT);
+        }
+
+        of_property_read_u32(np, "arm,dirty-latency", &dirty);
+        if (dirty) {
+                mask |= L2X0_AUX_CTRL_DIRTY_LATENCY_MASK;
+                val |= (dirty - 1) << L2X0_AUX_CTRL_DIRTY_LATENCY_SHIFT;
+        }
+
+        *aux_val &= ~mask;
+        *aux_val |= val;
+        *aux_mask &= ~mask;
+}
+
+static void __init pl310_of_setup(const struct device_node *np,
+                                  __u32 *aux_val, __u32 *aux_mask)
+{
+        u32 data[3] = { 0, 0, 0 };
+        u32 tag[3] = { 0, 0, 0 };
+        u32 filter[2] = { 0, 0 };
+
+        of_property_read_u32_array(np, "arm,tag-latency", tag, ARRAY_SIZE(tag));
+        if (tag[0] && tag[1] && tag[2])
+                writel_relaxed(
+                        ((tag[0] - 1) << L2X0_LATENCY_CTRL_RD_SHIFT) |
+                        ((tag[1] - 1) << L2X0_LATENCY_CTRL_WR_SHIFT) |
+                        ((tag[2] - 1) << L2X0_LATENCY_CTRL_SETUP_SHIFT),
+                        l2x0_base + L2X0_TAG_LATENCY_CTRL);
+
+        of_property_read_u32_array(np, "arm,data-latency",
+                                   data, ARRAY_SIZE(data));
+        if (data[0] && data[1] && data[2])
+                writel_relaxed(
+                        ((data[0] - 1) << L2X0_LATENCY_CTRL_RD_SHIFT) |
+                        ((data[1] - 1) << L2X0_LATENCY_CTRL_WR_SHIFT) |
+                        ((data[2] - 1) << L2X0_LATENCY_CTRL_SETUP_SHIFT),
+                        l2x0_base + L2X0_DATA_LATENCY_CTRL);
+
+        of_property_read_u32_array(np, "arm,filter-ranges",
+                                   filter, ARRAY_SIZE(filter));
+        if (filter[1]) {
+                writel_relaxed(ALIGN(filter[0] + filter[1], SZ_1M),
+                               l2x0_base + L2X0_ADDR_FILTER_END);
+                writel_relaxed((filter[0] & ~(SZ_1M - 1)) | L2X0_ADDR_FILTER_EN,
+                               l2x0_base + L2X0_ADDR_FILTER_START);
+        }
+}
+
+static void __init pl310_save(void)
+{
+        u32 l2x0_revision = readl_relaxed(l2x0_base + L2X0_CACHE_ID) &
+                L2X0_CACHE_ID_RTL_MASK;
+
+        l2x0_saved_regs.tag_latency = readl_relaxed(l2x0_base +
+                L2X0_TAG_LATENCY_CTRL);
+        l2x0_saved_regs.data_latency = readl_relaxed(l2x0_base +
+                L2X0_DATA_LATENCY_CTRL);
+        l2x0_saved_regs.filter_end = readl_relaxed(l2x0_base +
+                L2X0_ADDR_FILTER_END);
+        l2x0_saved_regs.filter_start = readl_relaxed(l2x0_base +
+                L2X0_ADDR_FILTER_START);
+
+        if (l2x0_revision >= L2X0_CACHE_ID_RTL_R2P0) {
+                /*
+                 * From r2p0, there is Prefetch offset/control register
+                 */
+                l2x0_saved_regs.prefetch_ctrl = readl_relaxed(l2x0_base +
+                        L2X0_PREFETCH_CTRL);
+                /*
+                 * From r3p0, there is Power control register
+                 */
+                if (l2x0_revision >= L2X0_CACHE_ID_RTL_R3P0)
+                        l2x0_saved_regs.pwr_ctrl = readl_relaxed(l2x0_base +
+                                L2X0_POWER_CTRL);
+        }
+}
+
+static void l2x0_resume(void)
+{
+        if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & 1)) {
+                /* restore aux ctrl and enable l2 */
+                l2x0_unlock(readl_relaxed(l2x0_base + L2X0_CACHE_ID));
+
+                writel_relaxed(l2x0_saved_regs.aux_ctrl, l2x0_base +
+                        L2X0_AUX_CTRL);
+
+                l2x0_inv_all();
+
+                writel_relaxed(1, l2x0_base + L2X0_CTRL);
+        }
+}
+
+static void pl310_resume(void)
+{
+        u32 l2x0_revision;
+
+        if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & 1)) {
+                /* restore pl310 setup */
+                writel_relaxed(l2x0_saved_regs.tag_latency,
+                        l2x0_base + L2X0_TAG_LATENCY_CTRL);
+                writel_relaxed(l2x0_saved_regs.data_latency,
+                        l2x0_base + L2X0_DATA_LATENCY_CTRL);
+                writel_relaxed(l2x0_saved_regs.filter_end,
+                        l2x0_base + L2X0_ADDR_FILTER_END);
+                writel_relaxed(l2x0_saved_regs.filter_start,
+                        l2x0_base + L2X0_ADDR_FILTER_START);
+
+                l2x0_revision = readl_relaxed(l2x0_base + L2X0_CACHE_ID) &
+                        L2X0_CACHE_ID_RTL_MASK;
+
+                if (l2x0_revision >= L2X0_CACHE_ID_RTL_R2P0) {
+                        writel_relaxed(l2x0_saved_regs.prefetch_ctrl,
+                                l2x0_base + L2X0_PREFETCH_CTRL);
+                        if (l2x0_revision >= L2X0_CACHE_ID_RTL_R3P0)
+                                writel_relaxed(l2x0_saved_regs.pwr_ctrl,
+                                        l2x0_base + L2X0_POWER_CTRL);
+                }
+        }
+
+        l2x0_resume();
+}
+
+static const struct l2x0_of_data pl310_data = {
+        pl310_of_setup,
+        pl310_save,
+        pl310_resume,
+};
+
+static const struct l2x0_of_data l2x0_data = {
+        l2x0_of_setup,
+        NULL,
+        l2x0_resume,
+};
+
+static const struct of_device_id l2x0_ids[] __initconst = {
+        { .compatible = "arm,pl310-cache", .data = (void *)&pl310_data },
+        { .compatible = "arm,l220-cache", .data = (void *)&l2x0_data },
+        { .compatible = "arm,l210-cache", .data = (void *)&l2x0_data },
+        {}
+};
+
+int __init l2x0_of_init(__u32 aux_val, __u32 aux_mask)
+{
+        struct device_node *np;
+        struct l2x0_of_data *data;
+        struct resource res;
+
+        np = of_find_matching_node(NULL, l2x0_ids);
+        if (!np)
+                return -ENODEV;
+
+        if (of_address_to_resource(np, 0, &res))
+                return -ENODEV;
+
+        l2x0_base = ioremap(res.start, resource_size(&res));
+        if (!l2x0_base)
+                return -ENOMEM;
+
+        l2x0_saved_regs.phy_base = res.start;
+
+        data = of_match_node(l2x0_ids, np)->data;
+
+        /* L2 configuration can only be changed if the cache is disabled */
+        if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & 1)) {
+                if (data->setup)
+                        data->setup(np, &aux_val, &aux_mask);
+        }
+
+        if (data->save)
+                data->save();
+
+        l2x0_init(l2x0_base, aux_val, aux_mask);
+
+        outer_cache.resume = data->resume;
+        return 0;
+}
+#endif
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 3b24bfa3b828..07c4bc8ea0a4 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -174,6 +174,10 @@ ENTRY(v7_coherent_user_range)
         dcache_line_size r2, r3
         sub     r3, r2, #1
         bic     r12, r0, r3
+#ifdef CONFIG_ARM_ERRATA_764369
+        ALT_SMP(W(dsb))
+        ALT_UP(W(nop))
+#endif
 1:
  USER(  mcr     p15, 0, r12, c7, c11, 1 )       @ clean D line to the point of unification
         add     r12, r12, r2
@@ -223,6 +227,10 @@ ENTRY(v7_flush_kern_dcache_area)
         add     r1, r0, r1
         sub     r3, r2, #1
         bic     r0, r0, r3
+#ifdef CONFIG_ARM_ERRATA_764369
+        ALT_SMP(W(dsb))
+        ALT_UP(W(nop))
+#endif
 1:
         mcr     p15, 0, r0, c7, c14, 1          @ clean & invalidate D line / unified line
         add     r0, r0, r2
@@ -247,6 +255,10 @@ v7_dma_inv_range:
         sub     r3, r2, #1
         tst     r0, r3
         bic     r0, r0, r3
+#ifdef CONFIG_ARM_ERRATA_764369
+        ALT_SMP(W(dsb))
+        ALT_UP(W(nop))
+#endif
         mcrne   p15, 0, r0, c7, c14, 1          @ clean & invalidate D / U line
 
         tst     r1, r3
@@ -270,6 +282,10 @@ v7_dma_clean_range:
         dcache_line_size r2, r3
         sub     r3, r2, #1
         bic     r0, r0, r3
+#ifdef CONFIG_ARM_ERRATA_764369
+        ALT_SMP(W(dsb))
+        ALT_UP(W(nop))
+#endif
 1:
         mcr     p15, 0, r0, c7, c10, 1          @ clean D / U line
         add     r0, r0, r2
@@ -288,6 +304,10 @@ ENTRY(v7_dma_flush_range)
         dcache_line_size r2, r3
         sub     r3, r2, #1
         bic     r0, r0, r3
+#ifdef CONFIG_ARM_ERRATA_764369
+        ALT_SMP(W(dsb))
+        ALT_UP(W(nop))
+#endif
 1:
         mcr     p15, 0, r0, c7, c14, 1          @ clean & invalidate D / U line
         add     r0, r0, r2
diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
index b0ee9ba3cfab..93aac068da94 100644
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
@@ -16,7 +16,7 @@
 #include <asm/mmu_context.h>
 #include <asm/tlbflush.h>
 
-static DEFINE_SPINLOCK(cpu_asid_lock);
+static DEFINE_RAW_SPINLOCK(cpu_asid_lock);
 unsigned int cpu_last_asid = ASID_FIRST_VERSION;
 #ifdef CONFIG_SMP
 DEFINE_PER_CPU(struct mm_struct *, current_mm);
@@ -31,7 +31,7 @@ DEFINE_PER_CPU(struct mm_struct *, current_mm);
 void __init_new_context(struct task_struct *tsk, struct mm_struct *mm)
 {
         mm->context.id = 0;
-        spin_lock_init(&mm->context.id_lock);
+        raw_spin_lock_init(&mm->context.id_lock);
 }
 
 static void flush_context(void)
@@ -58,7 +58,7 @@ static void set_mm_context(struct mm_struct *mm, unsigned int asid)
          * the broadcast. This function is also called via IPI so the
          * mm->context.id_lock has to be IRQ-safe.
          */
-        spin_lock_irqsave(&mm->context.id_lock, flags);
+        raw_spin_lock_irqsave(&mm->context.id_lock, flags);
         if (likely((mm->context.id ^ cpu_last_asid) >> ASID_BITS)) {
                 /*
                  * Old version of ASID found. Set the new one and
@@ -67,7 +67,7 @@ static void set_mm_context(struct mm_struct *mm, unsigned int asid)
                 mm->context.id = asid;
                 cpumask_clear(mm_cpumask(mm));
         }
-        spin_unlock_irqrestore(&mm->context.id_lock, flags);
+        raw_spin_unlock_irqrestore(&mm->context.id_lock, flags);
 
         /*
          * Set the mm_cpumask(mm) bit for the current CPU.
@@ -117,7 +117,7 @@ void __new_context(struct mm_struct *mm)
 {
         unsigned int asid;
 
-        spin_lock(&cpu_asid_lock);
+        raw_spin_lock(&cpu_asid_lock);
 #ifdef CONFIG_SMP
         /*
          * Check the ASID again, in case the change was broadcast from
@@ -125,7 +125,7 @@ void __new_context(struct mm_struct *mm)
          */
         if (unlikely(((mm->context.id ^ cpu_last_asid) >> ASID_BITS) == 0)) {
                 cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
-                spin_unlock(&cpu_asid_lock);
+                raw_spin_unlock(&cpu_asid_lock);
                 return;
         }
 #endif
@@ -153,5 +153,5 @@ void __new_context(struct mm_struct *mm)
         }
 
         set_mm_context(mm, asid);
-        spin_unlock(&cpu_asid_lock);
+        raw_spin_unlock(&cpu_asid_lock);
 }
diff --git a/arch/arm/mm/copypage-v4mc.c b/arch/arm/mm/copypage-v4mc.c
index b8061519ce77..7d0a8c230342 100644
--- a/arch/arm/mm/copypage-v4mc.c
+++ b/arch/arm/mm/copypage-v4mc.c
@@ -30,7 +30,7 @@
 #define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
                                   L_PTE_MT_MINICACHE)
 
-static DEFINE_SPINLOCK(minicache_lock);
+static DEFINE_RAW_SPINLOCK(minicache_lock);
 
 /*
  * ARMv4 mini-dcache optimised copy_user_highpage
@@ -76,14 +76,14 @@ void v4_mc_copy_user_highpage(struct page *to, struct page *from,
         if (!test_and_set_bit(PG_dcache_clean, &from->flags))
                 __flush_dcache_page(page_mapping(from), from);
 
-        spin_lock(&minicache_lock);
+        raw_spin_lock(&minicache_lock);
 
         set_pte_ext(TOP_PTE(0xffff8000), pfn_pte(page_to_pfn(from), minicache_pgprot), 0);
         flush_tlb_kernel_page(0xffff8000);
 
         mc_copy_user_page((void *)0xffff8000, kto);
 
-        spin_unlock(&minicache_lock);
+        raw_spin_unlock(&minicache_lock);
 
         kunmap_atomic(kto, KM_USER1);
 }
diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c
index 63cca0097130..3d9a1552cef6 100644
--- a/arch/arm/mm/copypage-v6.c
+++ b/arch/arm/mm/copypage-v6.c
@@ -27,7 +27,7 @@
 #define from_address    (0xffff8000)
 #define to_address      (0xffffc000)
 
-static DEFINE_SPINLOCK(v6_lock);
+static DEFINE_RAW_SPINLOCK(v6_lock);
 
 /*
  * Copy the user page.  No aliasing to deal with so we can just
@@ -88,7 +88,7 @@ static void v6_copy_user_highpage_aliasing(struct page *to,
          * Now copy the page using the same cache colour as the
          * pages ultimate destination.
          */
-        spin_lock(&v6_lock);
+        raw_spin_lock(&v6_lock);
 
         set_pte_ext(TOP_PTE(from_address) + offset, pfn_pte(page_to_pfn(from), PAGE_KERNEL), 0);
         set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(to), PAGE_KERNEL), 0);
@@ -101,7 +101,7 @@ static void v6_copy_user_highpage_aliasing(struct page *to,
 
         copy_page((void *)kto, (void *)kfrom);
 
-        spin_unlock(&v6_lock);
+        raw_spin_unlock(&v6_lock);
 }
 
 /*
@@ -121,13 +121,13 @@ static void v6_clear_user_highpage_aliasing(struct page *page, unsigned long vad
          * Now clear the page using the same cache colour as
          * the pages ultimate destination.
          */
-        spin_lock(&v6_lock);
+        raw_spin_lock(&v6_lock);
 
         set_pte_ext(TOP_PTE(to_address) + offset, pfn_pte(page_to_pfn(page), PAGE_KERNEL), 0);
         flush_tlb_kernel_page(to);
         clear_page((void *)to);
 
-        spin_unlock(&v6_lock);
+        raw_spin_unlock(&v6_lock);
 }
 
 struct cpu_user_fns v6_user_fns __initdata = {
diff --git a/arch/arm/mm/copypage-xscale.c b/arch/arm/mm/copypage-xscale.c
index 649bbcd325bf..610c24ced310 100644
--- a/arch/arm/mm/copypage-xscale.c
+++ b/arch/arm/mm/copypage-xscale.c
@@ -32,7 +32,7 @@
 #define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
                                   L_PTE_MT_MINICACHE)
 
-static DEFINE_SPINLOCK(minicache_lock);
+static DEFINE_RAW_SPINLOCK(minicache_lock);
 
 /*
  * XScale mini-dcache optimised copy_user_highpage
@@ -98,14 +98,14 @@ void xscale_mc_copy_user_highpage(struct page *to, struct page *from,
         if (!test_and_set_bit(PG_dcache_clean, &from->flags))
                 __flush_dcache_page(page_mapping(from), from);
 
-        spin_lock(&minicache_lock);
+        raw_spin_lock(&minicache_lock);
 
         set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(page_to_pfn(from), minicache_pgprot), 0);
         flush_tlb_kernel_page(COPYPAGE_MINICACHE);
 
         mc_copy_user_page((void *)COPYPAGE_MINICACHE, kto);
 
-        spin_unlock(&minicache_lock);
+        raw_spin_unlock(&minicache_lock);
 
         kunmap_atomic(kto, KM_USER1);
 }
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 0a0a1e7c20d2..235eb775fc78 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -123,8 +123,8 @@ static void __dma_free_buffer(struct page *page, size_t size)
 #endif
 
 #define CONSISTENT_OFFSET(x)    (((unsigned long)(x) - CONSISTENT_BASE) >> PAGE_SHIFT)
-#define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PGDIR_SHIFT)
-#define NUM_CONSISTENT_PTES (CONSISTENT_DMA_SIZE >> PGDIR_SHIFT)
+#define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - CONSISTENT_BASE) >> PMD_SHIFT)
+#define NUM_CONSISTENT_PTES (CONSISTENT_DMA_SIZE >> PMD_SHIFT)
 
 /*
  * These are the page tables (2MB each) covering uncached, DMA consistent allocations
@@ -183,7 +183,7 @@ static int __init consistent_init(void)
                 }
 
                 consistent_pte[i++] = pte;
-                base += (1 << PGDIR_SHIFT);
+                base += PMD_SIZE;
         } while (base < CONSISTENT_END);
 
         return ret;
@@ -324,6 +324,8 @@ __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
 
         if (addr)
                 *handle = pfn_to_dma(dev, page_to_pfn(page));
+        else
+                __dma_free_buffer(page, size);
 
         return addr;
 }
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index 3b5ea68acbb8..aa33949fef60 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -20,6 +20,7 @@
 #include <linux/highmem.h>
 #include <linux/perf_event.h>
 
+#include <asm/exception.h>
 #include <asm/system.h>
 #include <asm/pgtable.h>
 #include <asm/tlbflush.h>
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 2fee782077c1..f8037ba338ac 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -298,7 +298,7 @@ static void __init arm_bootmem_free(unsigned long min, unsigned long max_low,
 #ifdef CONFIG_HAVE_ARCH_PFN_VALID
 int pfn_valid(unsigned long pfn)
 {
-        return memblock_is_memory(pfn << PAGE_SHIFT);
+        return memblock_is_memory(__pfn_to_phys(pfn));
 }
 EXPORT_SYMBOL(pfn_valid);
 #endif
@@ -441,7 +441,7 @@ static inline int free_area(unsigned long pfn, unsigned long end, char *s)
 static inline void poison_init_mem(void *s, size_t count)
 {
         u32 *p = (u32 *)s;
-        while ((count = count - 4))
+        for (; count != 0; count -= 4)
                 *p++ = 0xe7fddef0;
 }
 
@@ -496,6 +496,13 @@ static void __init free_unused_memmap(struct meminfo *mi)
                  */
                 bank_start = min(bank_start,
                                  ALIGN(prev_bank_end, PAGES_PER_SECTION));
+#else
+                /*
+                 * Align down here since the VM subsystem insists that the
+                 * memmap entries are valid from the bank start aligned to
+                 * MAX_ORDER_NR_PAGES.
+                 */
+                bank_start = round_down(bank_start, MAX_ORDER_NR_PAGES);
 #endif
                 /*
                  * If we had a previous bank, and there is a space
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index ab506272b2d3..bdb248c4f55c 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -289,6 +289,27 @@ __arm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
 }
 EXPORT_SYMBOL(__arm_ioremap);
 
+/*
+ * Remap an arbitrary physical address space into the kernel virtual
+ * address space as memory. Needed when the kernel wants to execute
+ * code in external memory. This is needed for reprogramming source
+ * clocks that would affect normal memory for example. Please see
+ * CONFIG_GENERIC_ALLOCATOR for allocating external memory.
+ */
+void __iomem *
+__arm_ioremap_exec(unsigned long phys_addr, size_t size, bool cached)
+{
+        unsigned int mtype;
+
+        if (cached)
+                mtype = MT_MEMORY;
+        else
+                mtype = MT_MEMORY_NONCACHED;
+
+        return __arm_ioremap_caller(phys_addr, size, mtype,
+                        __builtin_return_address(0));
+}
+
 void __iounmap(volatile void __iomem *io_addr)
 {
         void *addr = (void *)(PAGE_MASK & (unsigned long)io_addr);
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index 010566799c80..ad7cce3bc431 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -12,8 +12,8 @@ static inline pmd_t *pmd_off_k(unsigned long virt)
 
 struct mem_type {
         pteval_t prot_pte;
-        unsigned int prot_l1;
-        unsigned int prot_sect;
+        pmdval_t prot_l1;
+        pmdval_t prot_sect;
         unsigned int domain;
 };
 
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 594d677b92c8..226f1804be12 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -60,7 +60,7 @@ EXPORT_SYMBOL(pgprot_kernel);
 struct cachepolicy {
         const char      policy[16];
         unsigned int    cr_mask;
-        unsigned int    pmd;
+        pmdval_t        pmd;
         pteval_t        pte;
 };
 
@@ -288,7 +288,7 @@ static void __init build_mem_type_table(void)
 {
         struct cachepolicy *cp;
         unsigned int cr = get_cr();
-        unsigned int user_pgprot, kern_pgprot, vecs_pgprot;
+        pteval_t user_pgprot, kern_pgprot, vecs_pgprot;
         int cpu_arch = cpu_architecture();
         int i;
 
@@ -863,14 +863,14 @@ static inline void prepare_page_table(void)
         /*
          * Clear out all the mappings below the kernel image.
          */
-        for (addr = 0; addr < MODULES_VADDR; addr += PGDIR_SIZE)
+        for (addr = 0; addr < MODULES_VADDR; addr += PMD_SIZE)
                 pmd_clear(pmd_off_k(addr));
 
 #ifdef CONFIG_XIP_KERNEL
         /* The XIP kernel is mapped in the module area -- skip over it */
-        addr = ((unsigned long)_etext + PGDIR_SIZE - 1) & PGDIR_MASK;
+        addr = ((unsigned long)_etext + PMD_SIZE - 1) & PMD_MASK;
 #endif
-        for ( ; addr < PAGE_OFFSET; addr += PGDIR_SIZE)
+        for ( ; addr < PAGE_OFFSET; addr += PMD_SIZE)
                 pmd_clear(pmd_off_k(addr));
 
         /*
@@ -885,10 +885,12 @@ static inline void prepare_page_table(void)
          * memory bank, up to the end of the vmalloc region.
          */
         for (addr = __phys_to_virt(end);
-             addr < VMALLOC_END; addr += PGDIR_SIZE)
+             addr < VMALLOC_END; addr += PMD_SIZE)
                 pmd_clear(pmd_off_k(addr));
 }
 
+#define SWAPPER_PG_DIR_SIZE     (PTRS_PER_PGD * sizeof(pgd_t))
+
 /*
  * Reserve the special regions of memory
  */
@@ -898,7 +900,7 @@ void __init arm_mm_memblock_reserve(void)
          * Reserve the page tables.  These are already in use,
          * and can only be in node 0.
          */
-        memblock_reserve(__pa(swapper_pg_dir), PTRS_PER_PGD * sizeof(pgd_t));
+        memblock_reserve(__pa(swapper_pg_dir), SWAPPER_PG_DIR_SIZE);
 
 #ifdef CONFIG_SA1111
         /*
@@ -926,7 +928,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
          */
         vectors_page = early_alloc(PAGE_SIZE);
 
-        for (addr = VMALLOC_END; addr; addr += PGDIR_SIZE)
+        for (addr = VMALLOC_END; addr; addr += PMD_SIZE)
                 pmd_clear(pmd_off_k(addr));
 
         /*
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 92bd102e3982..2e6849b41f66 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -379,7 +379,7 @@ ENTRY(cpu_arm920_set_pte_ext)
 
 /* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
 .globl  cpu_arm920_suspend_size
-.equ    cpu_arm920_suspend_size, 4 * 3
+.equ    cpu_arm920_suspend_size, 4 * 4
 #ifdef CONFIG_PM_SLEEP
 ENTRY(cpu_arm920_do_suspend)
         stmfd   sp!, {r4 - r7, lr}
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index 2bbcf053dffd..cd8f79c3a282 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -394,7 +394,7 @@ ENTRY(cpu_arm926_set_pte_ext)
 
 /* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
 .globl  cpu_arm926_suspend_size
-.equ    cpu_arm926_suspend_size, 4 * 3
+.equ    cpu_arm926_suspend_size, 4 * 4
 #ifdef CONFIG_PM_SLEEP
 ENTRY(cpu_arm926_do_suspend)
         stmfd   sp!, {r4 - r7, lr}
diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S
index f8f7ea34bfc5..683af3a182b7 100644
--- a/arch/arm/mm/proc-arm946.S
+++ b/arch/arm/mm/proc-arm946.S
@@ -410,6 +410,7 @@ __arm946_proc_info:
         .long   0x41009460
         .long   0xff00fff0
         .long   0
+        .long   0
         b       __arm946_setup
         .long   cpu_arch_name
         .long   cpu_elf_name
@@ -418,6 +419,6 @@ __arm946_proc_info:
         .long   arm946_processor_functions
         .long   0
         .long   0
-        .long   arm940_cache_fns
+        .long   arm946_cache_fns
         .size   __arm946_proc_info, . - __arm946_proc_info
 
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S
index 07219c2ae114..69e7f2ef7384 100644
--- a/arch/arm/mm/proc-sa1100.S
+++ b/arch/arm/mm/proc-sa1100.S
@@ -182,11 +182,11 @@ ENDPROC(cpu_sa1100_do_suspend)
 
 ENTRY(cpu_sa1100_do_resume)
         ldmia   r0, {r4 - r7}                   @ load cp regs
-        mov     r1, #0
-        mcr     p15, 0, r1, c8, c7, 0           @ flush I+D TLBs
-        mcr     p15, 0, r1, c7, c7, 0           @ flush I&D cache
-        mcr     p15, 0, r1, c9, c0, 0           @ invalidate RB
-        mcr     p15, 0, r1, c9, c0, 5           @ allow user space to use RB
+        mov     ip, #0
+        mcr     p15, 0, ip, c8, c7, 0           @ flush I+D TLBs
+        mcr     p15, 0, ip, c7, c7, 0           @ flush I&D cache
+        mcr     p15, 0, ip, c9, c0, 0           @ invalidate RB
+        mcr     p15, 0, ip, c9, c0, 5           @ allow user space to use RB
 
         mcr     p15, 0, r4, c3, c0, 0           @ domain ID
         mcr     p15, 0, r5, c2, c0, 0           @ translation table base addr
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 219138d2f158..a923aa0fd00d 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -223,6 +223,22 @@ __v6_setup:
         mrc     p15, 0, r0, c1, c0, 0           @ read control register
         bic     r0, r0, r5                      @ clear bits them
         orr     r0, r0, r6                      @ set them
+#ifdef CONFIG_ARM_ERRATA_364296
+        /*
+         * Workaround for the 364296 ARM1136 r0p2 erratum (possible cache data
+         * corruption with hit-under-miss enabled). The conditional code below
+         * (setting the undocumented bit 31 in the auxiliary control register
+         * and the FI bit in the control register) disables hit-under-miss
+         * without putting the processor into full low interrupt latency mode.
+         */
+        ldr     r6, =0x4107b362                 @ id for ARM1136 r0p2
+        mrc     p15, 0, r5, c0, c0, 0           @ get processor id
+        teq     r5, r6                          @ check for the faulty core
+        mrceq   p15, 0, r5, c1, c0, 1           @ load aux control reg
+        orreq   r5, r5, #(1 << 31)              @ set the undocumented bit 31
+        mcreq   p15, 0, r5, c1, c0, 1           @ write aux control reg
+        orreq   r0, r0, #(1 << 21)              @ low interrupt latency configuration
+#endif
         mov     pc, lr                          @ return to head.S:__ret
 
         /*
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index a30e78542ccf..9591c8e9fb8c 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -66,6 +66,7 @@ ENDPROC(cpu_v7_proc_fin)
 ENTRY(cpu_v7_reset)
         mrc     p15, 0, r1, c1, c0, 0           @ ctrl register
         bic     r1, r1, #0x1                    @ ...............m
+ THUMB( bic     r1, r1, #1 << 30 )              @ SCTLR.TE (Thumb exceptions)
         mcr     p15, 0, r1, c1, c0, 0           @ disable MMU
         isb
         mov     pc, r0
@@ -217,7 +218,7 @@ ENDPROC(cpu_v7_set_pte_ext)
 /* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */
 .globl  cpu_v7_suspend_size
 .equ    cpu_v7_suspend_size, 4 * 9
-#ifdef CONFIG_PM_SLEEP
+#ifdef CONFIG_ARM_CPU_SUSPEND
 ENTRY(cpu_v7_do_suspend)
         stmfd   sp!, {r4 - r11, lr}
         mrc     p15, 0, r4, c13, c0, 0  @ FCSE/PID
@@ -247,13 +248,16 @@ ENTRY(cpu_v7_do_resume)
         mcr     p15, 0, r7, c2, c0, 0   @ TTB 0
         mcr     p15, 0, r8, c2, c0, 1   @ TTB 1
         mcr     p15, 0, ip, c2, c0, 2   @ TTB control register
-        mcr     p15, 0, r10, c1, c0, 1  @ Auxiliary control register
+        mrc     p15, 0, r4, c1, c0, 1   @ Read Auxiliary control register
+        teq     r4, r10                 @ Is it already set?
+        mcrne   p15, 0, r10, c1, c0, 1  @ No, so write it
         mcr     p15, 0, r11, c1, c0, 2  @ Co-processor access control
         ldr     r4, =PRRR               @ PRRR
         ldr     r5, =NMRR               @ NMRR
         mcr     p15, 0, r4, c10, c2, 0  @ write PRRR
         mcr     p15, 0, r5, c10, c2, 1  @ write NMRR
         isb
+        dsb
         mov     r0, r9                  @ control register
         mov     r2, r7, lsr #14         @ get TTB0 base
         mov     r2, r2, lsl #14
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index 28c72a2006a1..755e1bf22681 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -406,7 +406,7 @@ ENTRY(cpu_xsc3_set_pte_ext)
         .align
 
 .globl  cpu_xsc3_suspend_size
-.equ    cpu_xsc3_suspend_size, 4 * 8
+.equ    cpu_xsc3_suspend_size, 4 * 7
 #ifdef CONFIG_PM_SLEEP
 ENTRY(cpu_xsc3_do_suspend)
         stmfd   sp!, {r4 - r10, lr}
@@ -418,12 +418,12 @@ ENTRY(cpu_xsc3_do_suspend)
         mrc     p15, 0, r9, c1, c0, 1   @ auxiliary control reg
         mrc     p15, 0, r10, c1, c0, 0  @ control reg
         bic     r4, r4, #2              @ clear frequency change bit
-        stmia   r0, {r1, r4 - r10}      @ store v:p offset + cp regs
+        stmia   r0, {r4 - r10}          @ store cp regs
         ldmia   sp!, {r4 - r10, pc}
 ENDPROC(cpu_xsc3_do_suspend)
 
 ENTRY(cpu_xsc3_do_resume)
-        ldmia   r0, {r1, r4 - r10}      @ load v:p offset + cp regs
+        ldmia   r0, {r4 - r10}          @ load cp regs
         mov     ip, #0
         mcr     p15, 0, ip, c7, c7, 0   @ invalidate I & D caches, BTB
         mcr     p15, 0, ip, c7, c10, 4  @ drain write (&fill) buffer
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index a5353fc0793f..4c8fdbcc9467 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -39,7 +39,7 @@ config ARCH_MX503
         select ARCH_MX50_SUPPORTED
         select ARCH_MX53_SUPPORTED
         help
-          This enables support for machines using Freescale's i.MX50 and i.MX51
+          This enables support for machines using Freescale's i.MX50 and i.MX53
           processors.
 
 config ARCH_MX51
diff --git a/arch/arm/plat-mxc/devices.c b/arch/arm/plat-mxc/devices.c
index 0d6ed31bdbf2..a34b2ae895f2 100644
--- a/arch/arm/plat-mxc/devices.c
+++ b/arch/arm/plat-mxc/devices.c
@@ -37,59 +37,6 @@ int __init mxc_register_device(struct platform_device *pdev, void *data)
         return ret;
 }
 
-struct platform_device *__init imx_add_platform_device_dmamask(
-                const char *name, int id,
-                const struct resource *res, unsigned int num_resources,
-                const void *data, size_t size_data, u64 dmamask)
-{
-        int ret = -ENOMEM;
-        struct platform_device *pdev;
-
-        pdev = platform_device_alloc(name, id);
-        if (!pdev)
-                goto err;
-
-        if (dmamask) {
-                /*
-                 * This memory isn't freed when the device is put,
-                 * I don't have a nice idea for that though.  Conceptually
-                 * dma_mask in struct device should not be a pointer.
-                 * See http://thread.gmane.org/gmane.linux.kernel.pci/9081
-                 */
-                pdev->dev.dma_mask =
-                        kmalloc(sizeof(*pdev->dev.dma_mask), GFP_KERNEL);
-                if (!pdev->dev.dma_mask)
-                        /* ret is still -ENOMEM; */
-                        goto err;
-
-                *pdev->dev.dma_mask = dmamask;
-                pdev->dev.coherent_dma_mask = dmamask;
-        }
-
-        if (res) {
-                ret = platform_device_add_resources(pdev, res, num_resources);
-                if (ret)
-                        goto err;
-        }
-
-        if (data) {
-                ret = platform_device_add_data(pdev, data, size_data);
-                if (ret)
-                        goto err;
-        }
-
-        ret = platform_device_add(pdev);
-        if (ret) {
-err:
-                if (dmamask)
-                        kfree(pdev->dev.dma_mask);
-                platform_device_put(pdev);
-                return ERR_PTR(ret);
-        }
-
-        return pdev;
-}
-
 struct device mxc_aips_bus = {
         .init_name      = "mxc_aips",
         .parent         = &platform_bus,
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S
index 91fc7cdb5dc9..e4dde91f0231 100644
--- a/arch/arm/plat-mxc/include/mach/debug-macro.S
+++ b/arch/arm/plat-mxc/include/mach/debug-macro.S
@@ -44,6 +44,14 @@
 #define UART_PADDR      MX51_UART1_BASE_ADDR
 #endif
 
+/* iMX50/53 have same addresses, but not iMX51 */
+#if defined(CONFIG_SOC_IMX50) || defined(CONFIG_SOC_IMX53)
+#ifdef UART_PADDR
+#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
+#endif
+#define UART_PADDR      MX53_UART1_BASE_ADDR
+#endif
+
 #define UART_VADDR      IMX_IO_ADDRESS(UART_PADDR)
 
                 .macro  addruart, rp, rv
diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h
index 524538aabc4b..543525d76a60 100644
--- a/arch/arm/plat-mxc/include/mach/devices-common.h
+++ b/arch/arm/plat-mxc/include/mach/devices-common.h
@@ -14,10 +14,22 @@
 extern struct device mxc_aips_bus;
 extern struct device mxc_ahb_bus;
 
-struct platform_device *imx_add_platform_device_dmamask(
+static inline struct platform_device *imx_add_platform_device_dmamask(
                 const char *name, int id,
                 const struct resource *res, unsigned int num_resources,
-                const void *data, size_t size_data, u64 dmamask);
+                const void *data, size_t size_data, u64 dmamask)
+{
+        struct platform_device_info pdevinfo = {
+                .name = name,
+                .id = id,
+                .res = res,
+                .num_res = num_resources,
+                .data = data,
+                .size_data = size_data,
+                .dma_mask = dmamask,
+        };
+        return platform_device_register_full(&pdevinfo);
+}
 
 static inline struct platform_device *imx_add_platform_device(
                 const char *name, int id,
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx53.h b/arch/arm/plat-mxc/include/mach/iomux-mx53.h
index 9440b9e00e89..5408fd1fc736 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx53.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx53.h
@@ -30,6 +30,9 @@
 #define MX53_SDHC_PAD_CTRL      (PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \
                                 PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_HIGH | \
                                 PAD_CTL_SRE_FAST)
+#define PAD_CTRL_I2C    (PAD_CTL_SRE_FAST | PAD_CTL_ODE | PAD_CTL_PKE | \
+                        PAD_CTL_PUE | PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP \
+                        | PAD_CTL_HYS)
 
 #define _MX53_PAD_GPIO_19__KPP_COL_5            IOMUX_PAD(0x348, 0x20, 0, 0x840, 0, 0)
 #define _MX53_PAD_GPIO_19__GPIO4_5              IOMUX_PAD(0x348, 0x20, 1, 0x0, 0, 0)
@@ -1256,7 +1259,7 @@
 #define MX53_PAD_KEY_COL3__GPIO4_12             (_MX53_PAD_KEY_COL3__GPIO4_12 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_KEY_COL3__USBOH3_H2_DP         (_MX53_PAD_KEY_COL3__USBOH3_H2_DP | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_KEY_COL3__SPDIF_IN1            (_MX53_PAD_KEY_COL3__SPDIF_IN1 | MUX_PAD_CTRL(NO_PAD_CTRL))
-#define MX53_PAD_KEY_COL3__I2C2_SCL             (_MX53_PAD_KEY_COL3__I2C2_SCL | MUX_PAD_CTRL(NO_PAD_CTRL))
+#define MX53_PAD_KEY_COL3__I2C2_SCL             (_MX53_PAD_KEY_COL3__I2C2_SCL | MUX_PAD_CTRL(PAD_CTRL_I2C))
 #define MX53_PAD_KEY_COL3__ECSPI1_SS3           (_MX53_PAD_KEY_COL3__ECSPI1_SS3 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_KEY_COL3__FEC_CRS              (_MX53_PAD_KEY_COL3__FEC_CRS | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_KEY_COL3__USBPHY1_SIECLOCK             (_MX53_PAD_KEY_COL3__USBPHY1_SIECLOCK | MUX_PAD_CTRL(NO_PAD_CTRL))
@@ -1264,7 +1267,7 @@
 #define MX53_PAD_KEY_ROW3__GPIO4_13             (_MX53_PAD_KEY_ROW3__GPIO4_13 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_KEY_ROW3__USBOH3_H2_DM         (_MX53_PAD_KEY_ROW3__USBOH3_H2_DM | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_KEY_ROW3__CCM_ASRC_EXT_CLK             (_MX53_PAD_KEY_ROW3__CCM_ASRC_EXT_CLK | MUX_PAD_CTRL(NO_PAD_CTRL))
-#define MX53_PAD_KEY_ROW3__I2C2_SDA             (_MX53_PAD_KEY_ROW3__I2C2_SDA | MUX_PAD_CTRL(NO_PAD_CTRL))
+#define MX53_PAD_KEY_ROW3__I2C2_SDA             (_MX53_PAD_KEY_ROW3__I2C2_SDA | MUX_PAD_CTRL(PAD_CTRL_I2C))
 #define MX53_PAD_KEY_ROW3__OSC32K_32K_OUT               (_MX53_PAD_KEY_ROW3__OSC32K_32K_OUT | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_KEY_ROW3__CCM_PLL4_BYP         (_MX53_PAD_KEY_ROW3__CCM_PLL4_BYP | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_KEY_ROW3__USBPHY1_LINESTATE_0          (_MX53_PAD_KEY_ROW3__USBPHY1_LINESTATE_0 | MUX_PAD_CTRL(NO_PAD_CTRL))
@@ -1536,7 +1539,7 @@
 #define MX53_PAD_CSI0_DAT8__KPP_COL_7           (_MX53_PAD_CSI0_DAT8__KPP_COL_7 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_CSI0_DAT8__ECSPI2_SCLK         (_MX53_PAD_CSI0_DAT8__ECSPI2_SCLK | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_CSI0_DAT8__USBOH3_USBH3_OC             (_MX53_PAD_CSI0_DAT8__USBOH3_USBH3_OC | MUX_PAD_CTRL(NO_PAD_CTRL))
-#define MX53_PAD_CSI0_DAT8__I2C1_SDA            (_MX53_PAD_CSI0_DAT8__I2C1_SDA | MUX_PAD_CTRL(NO_PAD_CTRL))
+#define MX53_PAD_CSI0_DAT8__I2C1_SDA            (_MX53_PAD_CSI0_DAT8__I2C1_SDA | MUX_PAD_CTRL(PAD_CTRL_I2C))
 #define MX53_PAD_CSI0_DAT8__EMI_EMI_DEBUG_37            (_MX53_PAD_CSI0_DAT8__EMI_EMI_DEBUG_37 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_CSI0_DAT8__TPIU_TRACE_5                (_MX53_PAD_CSI0_DAT8__TPIU_TRACE_5 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_CSI0_DAT9__IPU_CSI0_D_9                (_MX53_PAD_CSI0_DAT9__IPU_CSI0_D_9 | MUX_PAD_CTRL(NO_PAD_CTRL))
@@ -1544,7 +1547,7 @@
 #define MX53_PAD_CSI0_DAT9__KPP_ROW_7           (_MX53_PAD_CSI0_DAT9__KPP_ROW_7 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_CSI0_DAT9__ECSPI2_MOSI         (_MX53_PAD_CSI0_DAT9__ECSPI2_MOSI | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_CSI0_DAT9__USBOH3_USBH3_PWR            (_MX53_PAD_CSI0_DAT9__USBOH3_USBH3_PWR | MUX_PAD_CTRL(NO_PAD_CTRL))
-#define MX53_PAD_CSI0_DAT9__I2C1_SCL            (_MX53_PAD_CSI0_DAT9__I2C1_SCL | MUX_PAD_CTRL(NO_PAD_CTRL))
+#define MX53_PAD_CSI0_DAT9__I2C1_SCL            (_MX53_PAD_CSI0_DAT9__I2C1_SCL | MUX_PAD_CTRL(PAD_CTRL_I2C))
 #define MX53_PAD_CSI0_DAT9__EMI_EMI_DEBUG_38            (_MX53_PAD_CSI0_DAT9__EMI_EMI_DEBUG_38 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_CSI0_DAT9__TPIU_TRACE_6                (_MX53_PAD_CSI0_DAT9__TPIU_TRACE_6 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_CSI0_DAT10__IPU_CSI0_D_10              (_MX53_PAD_CSI0_DAT10__IPU_CSI0_D_10 | MUX_PAD_CTRL(NO_PAD_CTRL))
@@ -1631,25 +1634,25 @@
 #define MX53_PAD_EIM_EB2__CCM_DI1_EXT_CLK               (_MX53_PAD_EIM_EB2__CCM_DI1_EXT_CLK | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_EIM_EB2__IPU_SER_DISP1_CS              (_MX53_PAD_EIM_EB2__IPU_SER_DISP1_CS | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_EIM_EB2__ECSPI1_SS0            (_MX53_PAD_EIM_EB2__ECSPI1_SS0 | MUX_PAD_CTRL(NO_PAD_CTRL))
-#define MX53_PAD_EIM_EB2__I2C2_SCL              (_MX53_PAD_EIM_EB2__I2C2_SCL | MUX_PAD_CTRL(NO_PAD_CTRL))
+#define MX53_PAD_EIM_EB2__I2C2_SCL              (_MX53_PAD_EIM_EB2__I2C2_SCL | MUX_PAD_CTRL(PAD_CTRL_I2C))
 #define MX53_PAD_EIM_D16__EMI_WEIM_D_16         (_MX53_PAD_EIM_D16__EMI_WEIM_D_16 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_EIM_D16__GPIO3_16              (_MX53_PAD_EIM_D16__GPIO3_16 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_EIM_D16__IPU_DI0_PIN5          (_MX53_PAD_EIM_D16__IPU_DI0_PIN5 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_EIM_D16__IPU_DISPB1_SER_CLK            (_MX53_PAD_EIM_D16__IPU_DISPB1_SER_CLK | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_EIM_D16__ECSPI1_SCLK           (_MX53_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(NO_PAD_CTRL))
-#define MX53_PAD_EIM_D16__I2C2_SDA              (_MX53_PAD_EIM_D16__I2C2_SDA | MUX_PAD_CTRL(NO_PAD_CTRL))
+#define MX53_PAD_EIM_D16__I2C2_SDA              (_MX53_PAD_EIM_D16__I2C2_SDA | MUX_PAD_CTRL(PAD_CTRL_I2C))
 #define MX53_PAD_EIM_D17__EMI_WEIM_D_17         (_MX53_PAD_EIM_D17__EMI_WEIM_D_17 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_EIM_D17__GPIO3_17              (_MX53_PAD_EIM_D17__GPIO3_17 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_EIM_D17__IPU_DI0_PIN6          (_MX53_PAD_EIM_D17__IPU_DI0_PIN6 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_EIM_D17__IPU_DISPB1_SER_DIN            (_MX53_PAD_EIM_D17__IPU_DISPB1_SER_DIN | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_EIM_D17__ECSPI1_MISO           (_MX53_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(NO_PAD_CTRL))
-#define MX53_PAD_EIM_D17__I2C3_SCL              (_MX53_PAD_EIM_D17__I2C3_SCL | MUX_PAD_CTRL(NO_PAD_CTRL))
+#define MX53_PAD_EIM_D17__I2C3_SCL              (_MX53_PAD_EIM_D17__I2C3_SCL | MUX_PAD_CTRL(PAD_CTRL_I2C))
 #define MX53_PAD_EIM_D18__EMI_WEIM_D_18         (_MX53_PAD_EIM_D18__EMI_WEIM_D_18 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_EIM_D18__GPIO3_18              (_MX53_PAD_EIM_D18__GPIO3_18 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_EIM_D18__IPU_DI0_PIN7          (_MX53_PAD_EIM_D18__IPU_DI0_PIN7 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_EIM_D18__IPU_DISPB1_SER_DIO            (_MX53_PAD_EIM_D18__IPU_DISPB1_SER_DIO | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_EIM_D18__ECSPI1_MOSI           (_MX53_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(NO_PAD_CTRL))
-#define MX53_PAD_EIM_D18__I2C3_SDA              (_MX53_PAD_EIM_D18__I2C3_SDA | MUX_PAD_CTRL(NO_PAD_CTRL))
+#define MX53_PAD_EIM_D18__I2C3_SDA              (_MX53_PAD_EIM_D18__I2C3_SDA | MUX_PAD_CTRL(PAD_CTRL_I2C))
 #define MX53_PAD_EIM_D18__IPU_DI1_D0_CS         (_MX53_PAD_EIM_D18__IPU_DI1_D0_CS | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_EIM_D19__EMI_WEIM_D_19         (_MX53_PAD_EIM_D19__EMI_WEIM_D_19 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_EIM_D19__GPIO3_19              (_MX53_PAD_EIM_D19__GPIO3_19 | MUX_PAD_CTRL(NO_PAD_CTRL))
@@ -1672,7 +1675,7 @@
 #define MX53_PAD_EIM_D21__IPU_DI0_PIN17         (_MX53_PAD_EIM_D21__IPU_DI0_PIN17 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_EIM_D21__IPU_DISPB0_SER_CLK            (_MX53_PAD_EIM_D21__IPU_DISPB0_SER_CLK | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_EIM_D21__CSPI_SCLK             (_MX53_PAD_EIM_D21__CSPI_SCLK | MUX_PAD_CTRL(NO_PAD_CTRL))
-#define MX53_PAD_EIM_D21__I2C1_SCL              (_MX53_PAD_EIM_D21__I2C1_SCL | MUX_PAD_CTRL(NO_PAD_CTRL))
+#define MX53_PAD_EIM_D21__I2C1_SCL              (_MX53_PAD_EIM_D21__I2C1_SCL | MUX_PAD_CTRL(PAD_CTRL_I2C))
 #define MX53_PAD_EIM_D21__USBOH3_USBOTG_OC              (_MX53_PAD_EIM_D21__USBOH3_USBOTG_OC | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_EIM_D22__EMI_WEIM_D_22         (_MX53_PAD_EIM_D22__EMI_WEIM_D_22 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_EIM_D22__GPIO3_22              (_MX53_PAD_EIM_D22__GPIO3_22 | MUX_PAD_CTRL(NO_PAD_CTRL))
@@ -1732,7 +1735,7 @@
 #define MX53_PAD_EIM_D28__UART2_CTS             (_MX53_PAD_EIM_D28__UART2_CTS | MUX_PAD_CTRL(MX53_UART_PAD_CTRL))
 #define MX53_PAD_EIM_D28__IPU_DISPB0_SER_DIO            (_MX53_PAD_EIM_D28__IPU_DISPB0_SER_DIO | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_EIM_D28__CSPI_MOSI             (_MX53_PAD_EIM_D28__CSPI_MOSI | MUX_PAD_CTRL(NO_PAD_CTRL))
-#define MX53_PAD_EIM_D28__I2C1_SDA              (_MX53_PAD_EIM_D28__I2C1_SDA | MUX_PAD_CTRL(NO_PAD_CTRL))
+#define MX53_PAD_EIM_D28__I2C1_SDA              (_MX53_PAD_EIM_D28__I2C1_SDA | MUX_PAD_CTRL(PAD_CTRL_I2C))
 #define MX53_PAD_EIM_D28__IPU_EXT_TRIG          (_MX53_PAD_EIM_D28__IPU_EXT_TRIG | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_EIM_D28__IPU_DI0_PIN13         (_MX53_PAD_EIM_D28__IPU_DI0_PIN13 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_EIM_D29__EMI_WEIM_D_29         (_MX53_PAD_EIM_D29__EMI_WEIM_D_29 | MUX_PAD_CTRL(NO_PAD_CTRL))
@@ -2297,7 +2300,7 @@
 #define MX53_PAD_GPIO_9__SCC_FAIL_STATE         (_MX53_PAD_GPIO_9__SCC_FAIL_STATE | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_GPIO_3__ESAI1_HCKR             (_MX53_PAD_GPIO_3__ESAI1_HCKR | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_GPIO_3__GPIO1_3                (_MX53_PAD_GPIO_3__GPIO1_3 | MUX_PAD_CTRL(NO_PAD_CTRL))
-#define MX53_PAD_GPIO_3__I2C3_SCL               (_MX53_PAD_GPIO_3__I2C3_SCL | MUX_PAD_CTRL(NO_PAD_CTRL))
+#define MX53_PAD_GPIO_3__I2C3_SCL               (_MX53_PAD_GPIO_3__I2C3_SCL | MUX_PAD_CTRL(PAD_CTRL_I2C))
 #define MX53_PAD_GPIO_3__DPLLIP1_TOG_EN         (_MX53_PAD_GPIO_3__DPLLIP1_TOG_EN | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_GPIO_3__CCM_CLKO2              (_MX53_PAD_GPIO_3__CCM_CLKO2 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_GPIO_3__OBSERVE_MUX_OBSRV_INT_OUT0             (_MX53_PAD_GPIO_3__OBSERVE_MUX_OBSRV_INT_OUT0 | MUX_PAD_CTRL(NO_PAD_CTRL))
@@ -2305,7 +2308,7 @@
 #define MX53_PAD_GPIO_3__MLB_MLBCLK             (_MX53_PAD_GPIO_3__MLB_MLBCLK | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_GPIO_6__ESAI1_SCKT             (_MX53_PAD_GPIO_6__ESAI1_SCKT | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_GPIO_6__GPIO1_6                (_MX53_PAD_GPIO_6__GPIO1_6 | MUX_PAD_CTRL(NO_PAD_CTRL))
-#define MX53_PAD_GPIO_6__I2C3_SDA               (_MX53_PAD_GPIO_6__I2C3_SDA | MUX_PAD_CTRL(NO_PAD_CTRL))
+#define MX53_PAD_GPIO_6__I2C3_SDA               (_MX53_PAD_GPIO_6__I2C3_SDA | MUX_PAD_CTRL(PAD_CTRL_I2C))
 #define MX53_PAD_GPIO_6__CCM_CCM_OUT_0          (_MX53_PAD_GPIO_6__CCM_CCM_OUT_0 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_GPIO_6__CSU_CSU_INT_DEB                (_MX53_PAD_GPIO_6__CSU_CSU_INT_DEB | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_GPIO_6__OBSERVE_MUX_OBSRV_INT_OUT1             (_MX53_PAD_GPIO_6__OBSERVE_MUX_OBSRV_INT_OUT1 | MUX_PAD_CTRL(NO_PAD_CTRL))
@@ -2333,7 +2336,7 @@
 #define MX53_PAD_GPIO_5__CCM_CLKO               (_MX53_PAD_GPIO_5__CCM_CLKO | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_GPIO_5__CSU_CSU_ALARM_AUT_2            (_MX53_PAD_GPIO_5__CSU_CSU_ALARM_AUT_2 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_GPIO_5__OBSERVE_MUX_OBSRV_INT_OUT4             (_MX53_PAD_GPIO_5__OBSERVE_MUX_OBSRV_INT_OUT4 | MUX_PAD_CTRL(NO_PAD_CTRL))
-#define MX53_PAD_GPIO_5__I2C3_SCL               (_MX53_PAD_GPIO_5__I2C3_SCL | MUX_PAD_CTRL(NO_PAD_CTRL))
+#define MX53_PAD_GPIO_5__I2C3_SCL               (_MX53_PAD_GPIO_5__I2C3_SCL | MUX_PAD_CTRL(PAD_CTRL_I2C))
 #define MX53_PAD_GPIO_5__CCM_PLL1_BYP           (_MX53_PAD_GPIO_5__CCM_PLL1_BYP | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_GPIO_7__ESAI1_TX4_RX1          (_MX53_PAD_GPIO_7__ESAI1_TX4_RX1 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_GPIO_7__GPIO1_7                (_MX53_PAD_GPIO_7__GPIO1_7 | MUX_PAD_CTRL(NO_PAD_CTRL))
@@ -2356,7 +2359,7 @@
 #define MX53_PAD_GPIO_16__TZIC_PWRFAIL_INT              (_MX53_PAD_GPIO_16__TZIC_PWRFAIL_INT | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_GPIO_16__RTC_CE_RTC_EXT_TRIG1          (_MX53_PAD_GPIO_16__RTC_CE_RTC_EXT_TRIG1 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_GPIO_16__SPDIF_IN1             (_MX53_PAD_GPIO_16__SPDIF_IN1 | MUX_PAD_CTRL(NO_PAD_CTRL))
-#define MX53_PAD_GPIO_16__I2C3_SDA              (_MX53_PAD_GPIO_16__I2C3_SDA | MUX_PAD_CTRL(NO_PAD_CTRL))
+#define MX53_PAD_GPIO_16__I2C3_SDA              (_MX53_PAD_GPIO_16__I2C3_SDA | MUX_PAD_CTRL(PAD_CTRL_I2C))
 #define MX53_PAD_GPIO_16__SJC_DE_B              (_MX53_PAD_GPIO_16__SJC_DE_B | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_GPIO_17__ESAI1_TX0             (_MX53_PAD_GPIO_17__ESAI1_TX0 | MUX_PAD_CTRL(NO_PAD_CTRL))
 #define MX53_PAD_GPIO_17__GPIO7_12              (_MX53_PAD_GPIO_17__GPIO7_12 | MUX_PAD_CTRL(NO_PAD_CTRL))
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 6e6735f04ee3..5b605a9eb091 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -13,6 +13,8 @@ config ARCH_OMAP1
         bool "TI OMAP1"
         select CLKDEV_LOOKUP
         select CLKSRC_MMIO
+        select GENERIC_IRQ_CHIP
+        select HAVE_IDE
         help
           "Systems based on omap7xx, omap15xx or omap16xx"
 
diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h
index d1c916fcf770..dc562a5c0a8a 100644
--- a/arch/arm/plat-omap/include/plat/dma.h
+++ b/arch/arm/plat-omap/include/plat/dma.h
@@ -195,6 +195,11 @@
 
 #define OMAP36XX_DMA_UART4_TX           81      /* S_DMA_80 */
 #define OMAP36XX_DMA_UART4_RX           82      /* S_DMA_81 */
+
+/* Only for AM35xx */
+#define AM35XX_DMA_UART4_TX             54
+#define AM35XX_DMA_UART4_RX             55
+
 /*----------------------------------------------------------------------------*/
 
 #define OMAP1_DMA_TOUT_IRQ              (1 << 0)
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index 926d25c780f3..30e10719b774 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -357,6 +357,7 @@
 #define INT_35XX_EMAC_C0_TX_PULSE_IRQ   69
 #define INT_35XX_EMAC_C0_MISC_PULSE_IRQ 70
 #define INT_35XX_USBOTG_IRQ             71
+#define INT_35XX_UART4                  84
 #define INT_35XX_CCDC_VD0_IRQ           88
 #define INT_35XX_CCDC_VD1_IRQ           92
 #define INT_35XX_CCDC_VD2_IRQ           93
diff --git a/arch/arm/plat-omap/include/plat/serial.h b/arch/arm/plat-omap/include/plat/serial.h
index 2723f9166ea2..de3b10c18127 100644
--- a/arch/arm/plat-omap/include/plat/serial.h
+++ b/arch/arm/plat-omap/include/plat/serial.h
@@ -56,6 +56,9 @@
 #define TI816X_UART2_BASE       0x48022000
 #define TI816X_UART3_BASE       0x48024000
 
+/* AM3505/3517 UART4 */
+#define AM35XX_UART4_BASE       0x4809E000      /* Only on AM3505/3517 */
+
 /* External port on Zoom2/3 */
 #define ZOOM_UART_BASE          0x10000000
 #define ZOOM_UART_VIRT          0xfa400000
diff --git a/arch/arm/plat-omap/iovmm.c b/arch/arm/plat-omap/iovmm.c
index c60737c49a32..79e7fedb8602 100644
--- a/arch/arm/plat-omap/iovmm.c
+++ b/arch/arm/plat-omap/iovmm.c
@@ -423,9 +423,6 @@ static void sgtable_fill_kmalloc(struct sg_table *sgt, u32 pa, u32 da,
 {
         unsigned int i;
         struct scatterlist *sg;
-        void *va;
-
-        va = phys_to_virt(pa);
 
         for_each_sg(sgt->sgl, sg, sgt->nents, i) {
                 unsigned bytes;
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
index b6b409744954..02609eee0562 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/plat-omap/omap_device.c
@@ -615,6 +615,9 @@ static int _od_resume_noirq(struct device *dev)
 
         return pm_generic_resume_noirq(dev);
 }
+#else
+#define _od_suspend_noirq NULL
+#define _od_resume_noirq NULL
 #endif
 
 static struct dev_pm_domain omap_device_pm_domain = {
@@ -622,7 +625,8 @@ static struct dev_pm_domain omap_device_pm_domain = {
                 SET_RUNTIME_PM_OPS(_od_runtime_suspend, _od_runtime_resume,
                                    _od_runtime_idle)
                 USE_PLATFORM_PM_SLEEP_OPS
-                SET_SYSTEM_SLEEP_PM_OPS(_od_suspend_noirq, _od_resume_noirq)
+                .suspend_noirq = _od_suspend_noirq,
+                .resume_noirq = _od_resume_noirq,
         }
 };
 
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index 9843c954c042..9a197e55f669 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -22,7 +22,6 @@ config PLAT_S5P
         select PLAT_SAMSUNG
         select SAMSUNG_CLKSRC
         select SAMSUNG_IRQ_VIC_TIMER
-        select SAMSUNG_IRQ_UART
         help
           Base platform code for Samsung's S5P series SoC.
 
diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-s5p/clock.c
index 02af235298e2..5f84a3f13ef9 100644
--- a/arch/arm/plat-s5p/clock.c
+++ b/arch/arm/plat-s5p/clock.c
@@ -192,7 +192,7 @@ unsigned long s5p_spdif_get_rate(struct clk *clk)
         if (IS_ERR(pclk))
                 return -EINVAL;
 
-        rate = pclk->ops->get_rate(clk);
+        rate = pclk->ops->get_rate(pclk);
         clk_put(pclk);
 
         return rate;
diff --git a/arch/arm/plat-s5p/dev-uart.c b/arch/arm/plat-s5p/dev-uart.c
index afaf87fdb93e..c9308db36183 100644
--- a/arch/arm/plat-s5p/dev-uart.c
+++ b/arch/arm/plat-s5p/dev-uart.c
@@ -32,20 +32,10 @@ static struct resource s5p_uart0_resource[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = IRQ_S5P_UART_RX0,
-                .end    = IRQ_S5P_UART_RX0,
+                .start  = IRQ_UART0,
+                .end    = IRQ_UART0,
                 .flags  = IORESOURCE_IRQ,
         },
-        [2] = {
-                .start  = IRQ_S5P_UART_TX0,
-                .end    = IRQ_S5P_UART_TX0,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] = {
-                .start  = IRQ_S5P_UART_ERR0,
-                .end    = IRQ_S5P_UART_ERR0,
-                .flags  = IORESOURCE_IRQ,
-        }
 };
 
 static struct resource s5p_uart1_resource[] = {
@@ -55,18 +45,8 @@ static struct resource s5p_uart1_resource[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = IRQ_S5P_UART_RX1,
-                .end    = IRQ_S5P_UART_RX1,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                .start  = IRQ_S5P_UART_TX1,
-                .end    = IRQ_S5P_UART_TX1,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] = {
-                .start  = IRQ_S5P_UART_ERR1,
-                .end    = IRQ_S5P_UART_ERR1,
+                .start  = IRQ_UART1,
+                .end    = IRQ_UART1,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -78,18 +58,8 @@ static struct resource s5p_uart2_resource[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = IRQ_S5P_UART_RX2,
-                .end    = IRQ_S5P_UART_RX2,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                .start  = IRQ_S5P_UART_TX2,
-                .end    = IRQ_S5P_UART_TX2,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] = {
-                .start  = IRQ_S5P_UART_ERR2,
-                .end    = IRQ_S5P_UART_ERR2,
+                .start  = IRQ_UART2,
+                .end    = IRQ_UART2,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -102,18 +72,8 @@ static struct resource s5p_uart3_resource[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = IRQ_S5P_UART_RX3,
-                .end    = IRQ_S5P_UART_RX3,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                .start  = IRQ_S5P_UART_TX3,
-                .end    = IRQ_S5P_UART_TX3,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] = {
-                .start  = IRQ_S5P_UART_ERR3,
-                .end    = IRQ_S5P_UART_ERR3,
+                .start  = IRQ_UART3,
+                .end    = IRQ_UART3,
                 .flags  = IORESOURCE_IRQ,
         },
 #endif
@@ -127,18 +87,8 @@ static struct resource s5p_uart4_resource[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = IRQ_S5P_UART_RX4,
-                .end    = IRQ_S5P_UART_RX4,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                .start  = IRQ_S5P_UART_TX4,
-                .end    = IRQ_S5P_UART_TX4,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] = {
-                .start  = IRQ_S5P_UART_ERR4,
-                .end    = IRQ_S5P_UART_ERR4,
+                .start  = IRQ_UART4,
+                .end    = IRQ_UART4,
                 .flags  = IORESOURCE_IRQ,
         },
 #endif
@@ -152,18 +102,8 @@ static struct resource s5p_uart5_resource[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = IRQ_S5P_UART_RX5,
-                .end    = IRQ_S5P_UART_RX5,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                .start  = IRQ_S5P_UART_TX5,
-                .end    = IRQ_S5P_UART_TX5,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] = {
-                .start  = IRQ_S5P_UART_ERR5,
-                .end    = IRQ_S5P_UART_ERR5,
+                .start  = IRQ_UART5,
+                .end    = IRQ_UART5,
                 .flags  = IORESOURCE_IRQ,
         },
 #endif
diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h
index ba9121c60a2a..144dbfc6506d 100644
--- a/arch/arm/plat-s5p/include/plat/irqs.h
+++ b/arch/arm/plat-s5p/include/plat/irqs.h
@@ -37,41 +37,6 @@
 #define IRQ_VIC1_BASE           S5P_VIC1_BASE
 #define IRQ_VIC2_BASE           S5P_VIC2_BASE
 
-/* UART interrupts, each UART has 4 intterupts per channel so
- * use the space between the ISA and S3C main interrupts. Note, these
- * are not in the same order as the S3C24XX series! */
-
-#define IRQ_S5P_UART_BASE0      (16)
-#define IRQ_S5P_UART_BASE1      (20)
-#define IRQ_S5P_UART_BASE2      (24)
-#define IRQ_S5P_UART_BASE3      (28)
-
-#define UART_IRQ_RXD            (0)
-#define UART_IRQ_ERR            (1)
-#define UART_IRQ_TXD            (2)
-
-#define IRQ_S5P_UART_RX0        (IRQ_S5P_UART_BASE0 + UART_IRQ_RXD)
-#define IRQ_S5P_UART_TX0        (IRQ_S5P_UART_BASE0 + UART_IRQ_TXD)
-#define IRQ_S5P_UART_ERR0       (IRQ_S5P_UART_BASE0 + UART_IRQ_ERR)
-
-#define IRQ_S5P_UART_RX1        (IRQ_S5P_UART_BASE1 + UART_IRQ_RXD)
-#define IRQ_S5P_UART_TX1        (IRQ_S5P_UART_BASE1 + UART_IRQ_TXD)
-#define IRQ_S5P_UART_ERR1       (IRQ_S5P_UART_BASE1 + UART_IRQ_ERR)
-
-#define IRQ_S5P_UART_RX2        (IRQ_S5P_UART_BASE2 + UART_IRQ_RXD)
-#define IRQ_S5P_UART_TX2        (IRQ_S5P_UART_BASE2 + UART_IRQ_TXD)
-#define IRQ_S5P_UART_ERR2       (IRQ_S5P_UART_BASE2 + UART_IRQ_ERR)
-
-#define IRQ_S5P_UART_RX3        (IRQ_S5P_UART_BASE3 + UART_IRQ_RXD)
-#define IRQ_S5P_UART_TX3        (IRQ_S5P_UART_BASE3 + UART_IRQ_TXD)
-#define IRQ_S5P_UART_ERR3       (IRQ_S5P_UART_BASE3 + UART_IRQ_ERR)
-
-/* S3C compatibilty defines */
-#define IRQ_S3CUART_RX0         IRQ_S5P_UART_RX0
-#define IRQ_S3CUART_RX1         IRQ_S5P_UART_RX1
-#define IRQ_S3CUART_RX2         IRQ_S5P_UART_RX2
-#define IRQ_S3CUART_RX3         IRQ_S5P_UART_RX3
-
 /* VIC based IRQs */
 
 #define S5P_IRQ_VIC0(x)         (S5P_VIC0_BASE + (x))
diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-gpioint.c
index 327ab9f662e8..c65eb791d1bb 100644
--- a/arch/arm/plat-s5p/irq-gpioint.c
+++ b/arch/arm/plat-s5p/irq-gpioint.c
@@ -23,6 +23,8 @@
 #include <plat/gpio-core.h>
 #include <plat/gpio-cfg.h>
 
+#include <asm/mach/irq.h>
+
 #define GPIO_BASE(chip)         (((unsigned long)(chip)->base) & 0xFFFFF000u)
 
 #define CON_OFFSET              0x700
@@ -81,6 +83,9 @@ static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
         int group, pend_offset, mask_offset;
         unsigned int pend, mask;
 
+        struct irq_chip *chip = irq_get_chip(irq);
+        chained_irq_enter(chip, desc);
+
         for (group = 0; group < bank->nr_groups; group++) {
                 struct s3c_gpio_chip *chip = bank->chips[group];
                 if (!chip)
@@ -102,23 +107,25 @@ static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
                         pend &= ~BIT(offset);
                 }
         }
+        chained_irq_exit(chip, desc);
 }
 
 static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)
 {
         static int used_gpioint_groups = 0;
         int group = chip->group;
-        struct s5p_gpioint_bank *bank = NULL;
+        struct s5p_gpioint_bank *b, *bank = NULL;
         struct irq_chip_generic *gc;
         struct irq_chip_type *ct;
 
         if (used_gpioint_groups >= S5P_GPIOINT_GROUP_COUNT)
                 return -ENOMEM;
 
-        list_for_each_entry(bank, &banks, list) {
-                if (group >= bank->start &&
-                    group < bank->start + bank->nr_groups)
+        list_for_each_entry(b, &banks, list) {
+                if (group >= b->start && group < b->start + b->nr_groups) {
+                        bank = b;
                         break;
+                }
         }
         if (!bank)
                 return -EINVAL;
@@ -156,9 +163,9 @@ static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)
         ct->chip.irq_mask = irq_gc_mask_set_bit;
         ct->chip.irq_unmask = irq_gc_mask_clr_bit;
         ct->chip.irq_set_type = s5p_gpioint_set_type,
-        ct->regs.ack = PEND_OFFSET + REG_OFFSET(chip->group);
-        ct->regs.mask = MASK_OFFSET + REG_OFFSET(chip->group);
-        ct->regs.type = CON_OFFSET + REG_OFFSET(chip->group);
+        ct->regs.ack = PEND_OFFSET + REG_OFFSET(group - bank->start);
+        ct->regs.mask = MASK_OFFSET + REG_OFFSET(group - bank->start);
+        ct->regs.type = CON_OFFSET + REG_OFFSET(group - bank->start);
         irq_setup_generic_chip(gc, IRQ_MSK(chip->chip.ngpio),
                                IRQ_GC_INIT_MASK_CACHE,
                                IRQ_NOREQUEST | IRQ_NOPROBE, 0);
diff --git a/arch/arm/plat-s5p/irq.c b/arch/arm/plat-s5p/irq.c
index a97c08957f49..afdaa1082b9f 100644
--- a/arch/arm/plat-s5p/irq.c
+++ b/arch/arm/plat-s5p/irq.c
@@ -17,42 +17,10 @@
 
 #include <asm/hardware/vic.h>
 
-#include <linux/serial_core.h>
 #include <mach/map.h>
 #include <plat/regs-timer.h>
-#include <plat/regs-serial.h>
 #include <plat/cpu.h>
 #include <plat/irq-vic-timer.h>
-#include <plat/irq-uart.h>
-
-/*
- * Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
- * are consecutive when looking up the interrupt in the demux routines.
- */
-static struct s3c_uart_irq uart_irqs[] = {
-        [0] = {
-                .regs           = S5P_VA_UART0,
-                .base_irq       = IRQ_S5P_UART_BASE0,
-                .parent_irq     = IRQ_UART0,
-        },
-        [1] = {
-                .regs           = S5P_VA_UART1,
-                .base_irq       = IRQ_S5P_UART_BASE1,
-                .parent_irq     = IRQ_UART1,
-        },
-        [2] = {
-                .regs           = S5P_VA_UART2,
-                .base_irq       = IRQ_S5P_UART_BASE2,
-                .parent_irq     = IRQ_UART2,
-        },
-#if CONFIG_SERIAL_SAMSUNG_UARTS > 3
-        [3] = {
-                .regs           = S5P_VA_UART3,
-                .base_irq       = IRQ_S5P_UART_BASE3,
-                .parent_irq     = IRQ_UART3,
-        },
-#endif
-};
 
 void __init s5p_init_irq(u32 *vic, u32 num_vic)
 {
@@ -65,6 +33,4 @@ void __init s5p_init_irq(u32 *vic, u32 num_vic)
 #endif
 
         s3c_init_vic_timer_irq(5, IRQ_TIMER0);
-
-        s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs));
 }
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index b3e10659e4b8..dffa37bc4a0b 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -65,11 +65,6 @@ config SAMSUNG_IRQ_VIC_TIMER
        help
          Internal configuration to build the VIC timer interrupt code.
 
-config SAMSUNG_IRQ_UART
-       bool
-       help
-         Internal configuration to build the IRQ UART demux code.
-
 # options for gpio configuration support
 
 config SAMSUNG_GPIOLIB_4BIT
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 853764ba8cc5..1105922342fe 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -21,7 +21,6 @@ obj-y				+= dev-asocdma.o
 
 obj-$(CONFIG_SAMSUNG_CLKSRC)    += clock-clksrc.o
 
-obj-$(CONFIG_SAMSUNG_IRQ_UART)  += irq-uart.o
 obj-$(CONFIG_SAMSUNG_IRQ_VIC_TIMER) += irq-vic-timer.o
 
 # ADC
diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c
index 302c42670bd1..3b4451979d1b 100644
--- a/arch/arm/plat-samsung/clock.c
+++ b/arch/arm/plat-samsung/clock.c
@@ -64,6 +64,17 @@ static LIST_HEAD(clocks);
  */
 DEFINE_SPINLOCK(clocks_lock);
 
+/* Global watchdog clock used by arch_wtd_reset() callback */
+struct clk *s3c2410_wdtclk;
+static int __init s3c_wdt_reset_init(void)
+{
+        s3c2410_wdtclk = clk_get(NULL, "watchdog");
+        if (IS_ERR(s3c2410_wdtclk))
+                printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__);
+        return 0;
+}
+arch_initcall(s3c_wdt_reset_init);
+
 /* enable and disable calls for use with the clk struct */
 
 static int clk_null_enable(struct clk *clk, int enable)
diff --git a/arch/arm/plat-samsung/include/plat/backlight.h b/arch/arm/plat-samsung/include/plat/backlight.h
index 51d8da846a62..ad530c78fe8c 100644
--- a/arch/arm/plat-samsung/include/plat/backlight.h
+++ b/arch/arm/plat-samsung/include/plat/backlight.h
@@ -20,7 +20,7 @@ struct samsung_bl_gpio_info {
         int func;
 };
 
-extern void samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
+extern void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
         struct platform_pwm_backlight_data *bl_data);
 
 #endif /* __ASM_PLAT_BACKLIGHT_H */
diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
index 87d5b38a86fb..73c66d4d10fa 100644
--- a/arch/arm/plat-samsung/include/plat/clock.h
+++ b/arch/arm/plat-samsung/include/plat/clock.h
@@ -9,6 +9,9 @@
  * published by the Free Software Foundation.
 */
 
+#ifndef __ASM_PLAT_CLOCK_H
+#define __ASM_PLAT_CLOCK_H __FILE__
+
 #include <linux/spinlock.h>
 #include <linux/clkdev.h>
 
@@ -121,3 +124,8 @@ extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable);
 
 extern void s3c_pwmclk_init(void);
 
+/* Global watchdog clock used by arch_wtd_reset() callback */
+
+extern struct clk *s3c2410_wdtclk;
+
+#endif /* __ASM_PLAT_CLOCK_H */
diff --git a/arch/arm/plat-samsung/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h
index bac36fa3becb..720734847027 100644
--- a/arch/arm/plat-samsung/include/plat/regs-serial.h
+++ b/arch/arm/plat-samsung/include/plat/regs-serial.h
@@ -186,6 +186,11 @@
 #define S3C64XX_UINTSP          0x34
 #define S3C64XX_UINTM           0x38
 
+#define S3C64XX_UINTM_RXD       (0)
+#define S3C64XX_UINTM_TXD       (2)
+#define S3C64XX_UINTM_RXD_MSK   (1 << S3C64XX_UINTM_RXD)
+#define S3C64XX_UINTM_TXD_MSK   (1 << S3C64XX_UINTM_TXD)
+
 /* Following are specific to S5PV210 */
 #define S5PV210_UCON_CLKMASK    (1<<10)
 #define S5PV210_UCON_PCLK       (0<<10)
diff --git a/arch/arm/plat-samsung/include/plat/watchdog-reset.h b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
index 54b762acb5a0..40dbb2b0ae22 100644
--- a/arch/arm/plat-samsung/include/plat/watchdog-reset.h
+++ b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
@@ -10,6 +10,7 @@
  * published by the Free Software Foundation.
 */
 
+#include <plat/clock.h>
 #include <plat/regs-watchdog.h>
 #include <mach/map.h>
 
@@ -19,17 +20,12 @@
 
 static inline void arch_wdt_reset(void)
 {
-        struct clk *wdtclk;
-
         printk("arch_reset: attempting watchdog reset\n");
 
         __raw_writel(0, S3C2410_WTCON);   /* disable watchdog, to be safe  */
 
-        wdtclk = clk_get(NULL, "watchdog");
-        if (!IS_ERR(wdtclk)) {
-                clk_enable(wdtclk);
-        } else
-                printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__);
+        if (s3c2410_wdtclk)
+                clk_enable(s3c2410_wdtclk);
 
         /* put initial values into count and data */
         __raw_writel(0x80, S3C2410_WTCNT);
diff --git a/arch/arm/plat-samsung/irq-uart.c b/arch/arm/plat-samsung/irq-uart.c
deleted file mode 100644
index 3014c7226bd1..000000000000
--- a/arch/arm/plat-samsung/irq-uart.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/* arch/arm/plat-samsung/irq-uart.c
- *      originally part of arch/arm/plat-s3c64xx/irq.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *      Ben Dooks <ben@simtec.co.uk>
- *      http://armlinux.simtec.co.uk/
- *
- * Samsung- UART Interrupt handling
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/serial_core.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-
-#include <asm/mach/irq.h>
-
-#include <mach/map.h>
-#include <plat/irq-uart.h>
-#include <plat/regs-serial.h>
-#include <plat/cpu.h>
-
-/* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
- * are consecutive when looking up the interrupt in the demux routines.
- */
-static void s3c_irq_demux_uart(unsigned int irq, struct irq_desc *desc)
-{
-        struct s3c_uart_irq *uirq = desc->irq_data.handler_data;
-        struct irq_chip *chip = irq_get_chip(irq);
-        u32 pend = __raw_readl(uirq->regs + S3C64XX_UINTP);
-        int base = uirq->base_irq;
-
-        chained_irq_enter(chip, desc);
-
-        if (pend & (1 << 0))
-                generic_handle_irq(base);
-        if (pend & (1 << 1))
-                generic_handle_irq(base + 1);
-        if (pend & (1 << 2))
-                generic_handle_irq(base + 2);
-        if (pend & (1 << 3))
-                generic_handle_irq(base + 3);
-
-        chained_irq_exit(chip, desc);
-}
-
-static void __init s3c_init_uart_irq(struct s3c_uart_irq *uirq)
-{
-        void __iomem *reg_base = uirq->regs;
-        struct irq_chip_generic *gc;
-        struct irq_chip_type *ct;
-
-        /* mask all interrupts at the start. */
-        __raw_writel(0xf, reg_base + S3C64XX_UINTM);
-
-        gc = irq_alloc_generic_chip("s3c-uart", 1, uirq->base_irq, reg_base,
-                                    handle_level_irq);
-
-        if (!gc) {
-                pr_err("%s: irq_alloc_generic_chip for IRQ %u failed\n",
-                       __func__, uirq->base_irq);
-                return;
-        }
-
-        ct = gc->chip_types;
-        ct->chip.irq_ack = irq_gc_ack_set_bit;
-        ct->chip.irq_mask = irq_gc_mask_set_bit;
-        ct->chip.irq_unmask = irq_gc_mask_clr_bit;
-        ct->regs.ack = S3C64XX_UINTP;
-        ct->regs.mask = S3C64XX_UINTM;
-        irq_setup_generic_chip(gc, IRQ_MSK(4), IRQ_GC_INIT_MASK_CACHE,
-                               IRQ_NOREQUEST | IRQ_NOPROBE, 0);
-
-        irq_set_handler_data(uirq->parent_irq, uirq);
-        irq_set_chained_handler(uirq->parent_irq, s3c_irq_demux_uart);
-}
-
-/**
- * s3c_init_uart_irqs() - initialise UART IRQs and the necessary demuxing
- * @irq: The interrupt data for registering
- * @nr_irqs: The number of interrupt descriptions in @irq.
- *
- * Register the UART interrupts specified by @irq including the demuxing
- * routines. This supports the S3C6400 and newer style of devices.
- */
-void __init s3c_init_uart_irqs(struct s3c_uart_irq *irq, unsigned int nr_irqs)
-{
-        for (; nr_irqs > 0; nr_irqs--, irq++)
-                s3c_init_uart_irq(irq);
-}
diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c
index f714d060370d..51583cd30164 100644
--- a/arch/arm/plat-samsung/irq-vic-timer.c
+++ b/arch/arm/plat-samsung/irq-vic-timer.c
@@ -22,9 +22,14 @@
 #include <plat/irq-vic-timer.h>
 #include <plat/regs-timer.h>
 
+#include <asm/mach/irq.h>
+
 static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc)
 {
+        struct irq_chip *chip = irq_get_chip(irq);
+        chained_irq_enter(chip, desc);
         generic_handle_irq((int)desc->irq_data.handler_data);
+        chained_irq_exit(chip, desc);
 }
 
 /* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 3b3776d0a1a7..5bdeef969847 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,10 +12,9 @@
 #
 #   http://www.arm.linux.org.uk/developer/machines/?action=new
 #
-# XXX: This is a cut-down version of the file; it contains only machines that
-# XXX: are in mainline or have been submitted to the machine database within
-# XXX: the last 12 months.  If your entry is missing please email rmk at
-# XXX: <linux@arm.linux.org.uk>
+# This is a cut-down version of the file; it contains only machines that
+# are merged into mainline or have been edited in the machine database
+# within the last 12 months.  References to machine_is_NAME() do not count!
 #
 # Last update: Sat May 7 08:48:24 2011
 #
@@ -65,6 +64,7 @@ h7201			ARCH_H7201		H7201			161
 h7202                   ARCH_H7202              H7202                   162
 iq80321                 ARCH_IQ80321            IQ80321                 169
 ks8695                  ARCH_KS8695             KS8695                  180
+karo                    ARCH_KARO               KARO                    190
 smdk2410                ARCH_SMDK2410           SMDK2410                193
 ceiva                   ARCH_CEIVA              CEIVA                   200
 voiceblue               MACH_VOICEBLUE          VOICEBLUE               218
@@ -188,6 +188,7 @@ omap_2430sdp		MACH_OMAP_2430SDP	OMAP_2430SDP		900
 davinci_evm             MACH_DAVINCI_EVM        DAVINCI_EVM             901
 palmz72                 MACH_PALMZ72            PALMZ72                 904
 nxdb500                 MACH_NXDB500            NXDB500                 905
+apf9328                 MACH_APF9328            APF9328                 906
 palmt5                  MACH_PALMT5             PALMT5                  917
 palmtc                  MACH_PALMTC             PALMTC                  918
 omap_apollon            MACH_OMAP_APOLLON       OMAP_APOLLON            919
@@ -271,10 +272,12 @@ pcm038			MACH_PCM038		PCM038			1551
 ts_x09                  MACH_TS209              TS209                   1565
 at91cap9adk             MACH_AT91CAP9ADK        AT91CAP9ADK             1566
 mx31moboard             MACH_MX31MOBOARD        MX31MOBOARD             1574
+vision_ep9307           MACH_VISION_EP9307      VISION_EP9307           1578
 terastation_pro2        MACH_TERASTATION_PRO2   TERASTATION_PRO2        1584
 linkstation_pro         MACH_LINKSTATION_PRO    LINKSTATION_PRO         1585
 e350                    MACH_E350               E350                    1596
 ts409                   MACH_TS409              TS409                   1601
+rsi_ews                 MACH_RSI_EWS            RSI_EWS                 1609
 cm_x300                 MACH_CM_X300            CM_X300                 1616
 at91sam9g20ek           MACH_AT91SAM9G20EK      AT91SAM9G20EK           1624
 smdk6410                MACH_SMDK6410           SMDK6410                1626
@@ -331,6 +334,7 @@ smdkc100		MACH_SMDKC100		SMDKC100		1826
 tavorevb                MACH_TAVOREVB           TAVOREVB                1827
 saar                    MACH_SAAR               SAAR                    1828
 at91sam9m10g45ek        MACH_AT91SAM9M10G45EK   AT91SAM9M10G45EK        1830
+usb_a9g20               MACH_USB_A9G20          USB_A9G20               1841
 mxlads                  MACH_MXLADS             MXLADS                  1851
 linkstation_mini        MACH_LINKSTATION_MINI   LINKSTATION_MINI        1858
 afeb9260                MACH_AFEB9260           AFEB9260                1859
@@ -351,7 +355,7 @@ centro			MACH_CENTRO		CENTRO			1944
 nokia_rx51              MACH_NOKIA_RX51         NOKIA_RX51              1955
 omap_zoom2              MACH_OMAP_ZOOM2         OMAP_ZOOM2              1967
 cpuat9260               MACH_CPUAT9260          CPUAT9260               1973
-eukrea_cpuimx27         MACH_CPUIMX27           CPUIMX27                1975
+eukrea_cpuimx27         MACH_EUKREA_CPUIMX27    EUKREA_CPUIMX27         1975
 acs5k                   MACH_ACS5K              ACS5K                   1982
 snapper_9260            MACH_SNAPPER_9260       SNAPPER_9260            1987
 dsm320                  MACH_DSM320             DSM320                  1988
@@ -369,6 +373,7 @@ pcm043			MACH_PCM043		PCM043			2072
 sheevaplug              MACH_SHEEVAPLUG         SHEEVAPLUG              2097
 avengers_lite           MACH_AVENGERS_LITE      AVENGERS_LITE           2104
 mx51_babbage            MACH_MX51_BABBAGE       MX51_BABBAGE            2125
+tx37                    MACH_TX37               TX37                    2127
 rd78x00_masa            MACH_RD78X00_MASA       RD78X00_MASA            2135
 dm355_leopard           MACH_DM355_LEOPARD      DM355_LEOPARD           2138
 ts219                   MACH_TS219              TS219                   2139
@@ -379,6 +384,7 @@ omap_4430sdp		MACH_OMAP_4430SDP	OMAP_4430SDP		2160
 magx_zn5                MACH_MAGX_ZN5           MAGX_ZN5                2162
 btmavb101               MACH_BTMAVB101          BTMAVB101               2172
 btmawb101               MACH_BTMAWB101          BTMAWB101               2173
+tx25                    MACH_TX25               TX25                    2177
 omap3_torpedo           MACH_OMAP3_TORPEDO      OMAP3_TORPEDO           2178
 anw6410                 MACH_ANW6410            ANW6410                 2183
 imx27_visstrim_m10      MACH_IMX27_VISSTRIM_M10 IMX27_VISSTRIM_M10      2187
@@ -423,6 +429,7 @@ raumfeld_rc		MACH_RAUMFELD_RC	RAUMFELD_RC		2413
 raumfeld_connector      MACH_RAUMFELD_CONNECTOR RAUMFELD_CONNECTOR      2414
 raumfeld_speaker        MACH_RAUMFELD_SPEAKER   RAUMFELD_SPEAKER        2415
 tnetv107x               MACH_TNETV107X          TNETV107X               2418
+mx51_m2id               MACH_MX51_M2ID          MX51_M2ID               2428
 smdkv210                MACH_SMDKV210           SMDKV210                2456
 omap_zoom3              MACH_OMAP_ZOOM3         OMAP_ZOOM3              2464
 omap_3630sdp            MACH_OMAP_3630SDP       OMAP_3630SDP            2465
@@ -433,14 +440,17 @@ omapl138_hawkboard	MACH_OMAPL138_HAWKBOARD	OMAPL138_HAWKBOARD	2495
 ts41x                   MACH_TS41X              TS41X                   2502
 phy3250                 MACH_PHY3250            PHY3250                 2511
 mini6410                MACH_MINI6410           MINI6410                2520
+tx51                    MACH_TX51               TX51                    2529
 mx28evk                 MACH_MX28EVK            MX28EVK                 2531
 smartq5                 MACH_SMARTQ5            SMARTQ5                 2534
 davinci_dm6467tevm      MACH_DAVINCI_DM6467TEVM DAVINCI_DM6467TEVM      2548
 mxt_td60                MACH_MXT_TD60           MXT_TD60                2550
 riot_bei2               MACH_RIOT_BEI2          RIOT_BEI2               2576
 riot_x37                MACH_RIOT_X37           RIOT_X37                2578
+pca101                  MACH_PCA101             PCA101                  2595
 capc7117                MACH_CAPC7117           CAPC7117                2612
 icontrol                MACH_ICONTROL           ICONTROL                2624
+gplugd                  MACH_GPLUGD             GPLUGD                  2625
 qsd8x50a_st1_5          MACH_QSD8X50A_ST1_5     QSD8X50A_ST1_5          2627
 mx23evk                 MACH_MX23EVK            MX23EVK                 2629
 ap4evb                  MACH_AP4EVB             AP4EVB                  2630
@@ -476,8 +486,8 @@ cns3420vb		MACH_CNS3420VB		CNS3420VB		2776
 omap4_panda             MACH_OMAP4_PANDA        OMAP4_PANDA             2791
 ti8168evm               MACH_TI8168EVM          TI8168EVM               2800
 teton_bga               MACH_TETON_BGA          TETON_BGA               2816
-eukrea_cpuimx25sd       MACH_EUKREA_CPUIMX25    EUKREA_CPUIMX25         2820
-eukrea_cpuimx35sd       MACH_EUKREA_CPUIMX35    EUKREA_CPUIMX35         2821
+eukrea_cpuimx25sd       MACH_EUKREA_CPUIMX25SD  EUKREA_CPUIMX25SD       2820
+eukrea_cpuimx35sd       MACH_EUKREA_CPUIMX35SD  EUKREA_CPUIMX35SD       2821
 eukrea_cpuimx51sd       MACH_EUKREA_CPUIMX51SD  EUKREA_CPUIMX51SD       2822
 eukrea_cpuimx51         MACH_EUKREA_CPUIMX51    EUKREA_CPUIMX51         2823
 smdkc210                MACH_SMDKC210           SMDKC210                2838
@@ -910,7 +920,7 @@ omapl138_case_a3	MACH_OMAPL138_CASE_A3	OMAPL138_CASE_A3	3280
 uemd                    MACH_UEMD               UEMD                    3281
 ccwmx51mut              MACH_CCWMX51MUT         CCWMX51MUT              3282
 rockhopper              MACH_ROCKHOPPER         ROCKHOPPER              3283
-nookcolor               MACH_NOOKCOLOR          NOOKCOLOR               3284
+encore                  MACH_ENCORE             ENCORE                  3284
 hkdkc100                MACH_HKDKC100           HKDKC100                3285
 ts42xx                  MACH_TS42XX             TS42XX                  3286
 aebl                    MACH_AEBL               AEBL                    3287
@@ -1113,3 +1123,5 @@ blissc			MACH_BLISSC		BLISSC			3491
 thales_adc              MACH_THALES_ADC         THALES_ADC              3492
 ubisys_p9d_evp          MACH_UBISYS_P9D_EVP     UBISYS_P9D_EVP          3493
 atdgp318                MACH_ATDGP318           ATDGP318                3494
+smdk4212                MACH_SMDK4212           SMDK4212                3638
+smdk4412                MACH_SMDK4412           SMDK4412                3765
diff --git a/arch/arm/vfp/Makefile b/arch/arm/vfp/Makefile
index 6de73aab0195..a81404c09d5d 100644
--- a/arch/arm/vfp/Makefile
+++ b/arch/arm/vfp/Makefile
@@ -7,7 +7,7 @@
 # ccflags-y := -DDEBUG
 # asflags-y := -DDEBUG
 
-KBUILD_AFLAGS   :=$(KBUILD_AFLAGS:-msoft-float=-Wa,-mfpu=softvfp+vfp)
+KBUILD_AFLAGS   :=$(KBUILD_AFLAGS:-msoft-float=-Wa,-mfpu=softvfp+vfp -mfloat-abi=soft)
 LDFLAGS         +=--no-warn-mismatch
 
 obj-y                   += vfp.o