166 files changed, 2997 insertions, 949 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index aee8f3ada7ae..117e81b12009 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -6,7 +6,7 @@ config ARM
        select HAVE_DMA_API_DEBUG
        select HAVE_IDE if PCI || ISA || PCMCIA
        select HAVE_DMA_ATTRS
-        select HAVE_DMA_CONTIGUOUS if (CPU_V6 || CPU_V6K || CPU_V7)
+        select HAVE_DMA_CONTIGUOUS if MMU
        select HAVE_MEMBLOCK
        select RTC_LIB
        select SYS_SUPPORTS_APM_EMULATION
@@ -16,6 +16,7 @@ config ARM
        select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
        select HAVE_ARCH_KGDB
        select HAVE_ARCH_TRACEHOOK
+        select HAVE_SYSCALL_TRACEPOINTS
        select HAVE_KPROBES if !XIP_KERNEL
        select HAVE_KRETPROBES if (HAVE_KPROBES)
        select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
@@ -38,7 +39,6 @@ config ARM
        select HARDIRQS_SW_RESEND
        select GENERIC_IRQ_PROBE
        select GENERIC_IRQ_SHOW
-        select GENERIC_IRQ_PROBE
        select ARCH_WANT_IPC_PARSE_VERSION
        select HARDIRQS_SW_RESEND
        select CPU_PM if (SUSPEND || CPU_IDLE)
@@ -126,11 +126,6 @@ config TRACE_IRQFLAGS_SUPPORT
        bool
        default y
-config GENERIC_LOCKBREAK
-        bool
-        default y
-        depends on SMP && PREEMPT
 config RWSEM_GENERIC_SPINLOCK
        bool
        default y
@@ -1419,6 +1414,16 @@ config PL310_ERRATA_769419
          on systems with an outer cache, the store buffer is drained
          explicitly.
+config ARM_ERRATA_775420
+       bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
+       depends on CPU_V7
+       help
+         This option enables the workaround for the 775420 Cortex-A9 (r2p2,
+         r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
+         operation aborts with MMU exception, it might cause the processor
+         to deadlock. This workaround puts DSB before executing ISB if
+         an abort may occur on cache maintenance.
 endmenu
 source "arch/arm/common/Kconfig"
@@ -1897,12 +1902,6 @@ config CC_STACKPROTECTOR
          neutralized via a kernel panic.
          This feature requires gcc version 4.2 or above.
-config DEPRECATED_PARAM_STRUCT
-        bool "Provide old way to pass kernel parameters"
-        help
-          This was deprecated in 2001 and announced to live on for 5 years.
-          Some old boot loaders still use this way.
 endmenu
 menu "Boot options"
@@ -1915,6 +1914,23 @@ config USE_OF
        help
          Include support for flattened device tree machine descriptions.
+config ATAGS
+        bool "Support for the traditional ATAGS boot data passing" if USE_OF
+        default y
+        help
+          This is the traditional way of passing data to the kernel at boot
+          time. If you are solely relying on the flattened device tree (or
+          the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
+          to remove ATAGS support from your kernel binary.  If unsure,
+          leave this to y.
+config DEPRECATED_PARAM_STRUCT
+        bool "Provide old way to pass kernel parameters"
+        depends on ATAGS
+        help
+          This was deprecated in 2001 and announced to live on for 5 years.
+          Some old boot loaders still use this way.
 # Compressed boot loader in ROM.  Yes, we really want to ask about
 # TEXT and BSS so we preserve their values in the config files.
 config ZBOOT_ROM_TEXT
@@ -2041,6 +2057,7 @@ config CMDLINE
 choice
        prompt "Kernel command line type" if CMDLINE != ""
        default CMDLINE_FROM_BOOTLOADER
+        depends on ATAGS
 config CMDLINE_FROM_BOOTLOADER
        bool "Use bootloader kernel arguments if available"
@@ -2110,7 +2127,7 @@ config KEXEC
 config ATAGS_PROC
        bool "Export atags in procfs"
-        depends on KEXEC
+        depends on ATAGS && KEXEC
        default y
        help
          Should the atags used to boot the kernel be exported in an "atags"
@@ -2150,6 +2167,7 @@ source "drivers/cpufreq/Kconfig"
 config CPU_FREQ_IMX
        tristate "CPUfreq driver for i.MX CPUs"
        depends on ARCH_MXC && CPU_FREQ
+        select CPU_FREQ_TABLE
        help
          This enables the CPUfreq driver for i.MX CPUs.
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index f15f82bf3a50..e968a52e4881 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -356,15 +356,15 @@ choice
                  is nothing connected to read from the DCC.
        config DEBUG_SEMIHOSTING
-                bool "Kernel low-level debug output via semihosting I"
+                bool "Kernel low-level debug output via semihosting I/O"
                help
                  Semihosting enables code running on an ARM target to use
                  the I/O facilities on a host debugger/emulator through a
-                  simple SVC calls. The host debugger or emulator must have
+                  simple SVC call. The host debugger or emulator must have
                  semihosting enabled for the special svc call to be trapped
                  otherwise the kernel will crash.
-                  This is known to work with OpenOCD, as wellas
+                  This is known to work with OpenOCD, as well as
                  ARM's Fast Models, or any other controlling environment
                  that implements semihosting.
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 0457ef4d8c86..361936a3d191 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -289,10 +289,10 @@ zImage Image xipImage bootpImage uImage: vmlinux
 zinstall uinstall install: vmlinux
        $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $@
-%.dtb:
+%.dtb: scripts
        $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@
-dtbs:
+dtbs: scripts
        $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@
 # We use MRPROPER_FILES and CLEAN_FILES now
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index b8c64b80bafc..bc67cbff3944 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -653,16 +653,21 @@ __armv7_mmu_cache_on:
                mcrne   p15, 0, r0, c8, c7, 0   @ flush I,D TLBs
 #endif
                mrc     p15, 0, r0, c1, c0, 0   @ read control reg
+                bic     r0, r0, #1 << 28        @ clear SCTLR.TRE
                orr     r0, r0, #0x5000         @ I-cache enable, RR cache replacement
                orr     r0, r0, #0x003c         @ write buffer
 #ifdef CONFIG_MMU
 #ifdef CONFIG_CPU_ENDIAN_BE8
                orr     r0, r0, #1 << 25        @ big-endian page tables
 #endif
+                mrcne   p15, 0, r6, c2, c0, 2   @ read ttb control reg
                orrne   r0, r0, #1              @ MMU enabled
                movne   r1, #0xfffffffd         @ domain 0 = client
+                bic     r6, r6, #1 << 31        @ 32-bit translation system
+                bic     r6, r6, #3 << 0         @ use only ttbr0
                mcrne   p15, 0, r3, c2, c0, 0   @ load page table pointer
                mcrne   p15, 0, r1, c3, c0, 0   @ load domain access control
+                mcrne   p15, 0, r6, c2, c0, 2   @ load ttb control
 #endif
                mcr     p15, 0, r0, c7, c5, 4   @ ISB
                mcr     p15, 0, r0, c1, c0, 0   @ load control register
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 59509c48d7e5..bd0cff3f808c 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -154,5 +154,10 @@
                        #size-cells = <0>;
                        ti,hwmods = "i2c3";
                };
+                wdt2: wdt@44e35000 {
+                        compatible = "ti,omap3-wdt";
+                        ti,hwmods = "wd_timer2";
+                };
        };
 };
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 66389c1c6f62..7c95f76398de 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -104,6 +104,7 @@
                                #gpio-cells = <2>;
                                gpio-controller;
                                interrupt-controller;
+                                #interrupt-cells = <2>;
                        };
                        pioB: gpio@fffff600 {
@@ -113,6 +114,7 @@
                                #gpio-cells = <2>;
                                gpio-controller;
                                interrupt-controller;
+                                #interrupt-cells = <2>;
                        };
                        pioC: gpio@fffff800 {
@@ -122,6 +124,7 @@
                                #gpio-cells = <2>;
                                gpio-controller;
                                interrupt-controller;
+                                #interrupt-cells = <2>;
                        };
                        dbgu: serial@fffff200 {
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index b460d6ce9eb5..195019b7ca0e 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -95,6 +95,7 @@
                                #gpio-cells = <2>;
                                gpio-controller;
                                interrupt-controller;
+                                #interrupt-cells = <2>;
                        };
                        pioB: gpio@fffff400 {
@@ -104,6 +105,7 @@
                                #gpio-cells = <2>;
                                gpio-controller;
                                interrupt-controller;
+                                #interrupt-cells = <2>;
                        };
                        pioC: gpio@fffff600 {
@@ -113,6 +115,7 @@
                                #gpio-cells = <2>;
                                gpio-controller;
                                interrupt-controller;
+                                #interrupt-cells = <2>;
                        };
                        pioD: gpio@fffff800 {
@@ -122,6 +125,7 @@
                                #gpio-cells = <2>;
                                gpio-controller;
                                interrupt-controller;
+                                #interrupt-cells = <2>;
                        };
                        pioE: gpio@fffffa00 {
@@ -131,6 +135,7 @@
                                #gpio-cells = <2>;
                                gpio-controller;
                                interrupt-controller;
+                                #interrupt-cells = <2>;
                        };
                        dbgu: serial@ffffee00 {
diff --git a/arch/arm/boot/dts/at91sam9g25ek.dts b/arch/arm/boot/dts/at91sam9g25ek.dts
index 7829a4d0cb22..96514c134e54 100644
--- a/arch/arm/boot/dts/at91sam9g25ek.dts
+++ b/arch/arm/boot/dts/at91sam9g25ek.dts
@@ -15,7 +15,7 @@
        compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
        chosen {
-                bootargs = "128M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
+                bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
        };
        ahb {
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index bafa8806fc17..63751b1e744b 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -113,6 +113,7 @@
                                #gpio-cells = <2>;
                                gpio-controller;
                                interrupt-controller;
+                                #interrupt-cells = <2>;
                        };
                        pioB: gpio@fffff400 {
@@ -122,6 +123,7 @@
                                #gpio-cells = <2>;
                                gpio-controller;
                                interrupt-controller;
+                                #interrupt-cells = <2>;
                        };
                        pioC: gpio@fffff600 {
@@ -131,6 +133,7 @@
                                #gpio-cells = <2>;
                                gpio-controller;
                                interrupt-controller;
+                                #interrupt-cells = <2>;
                        };
                        pioD: gpio@fffff800 {
@@ -140,6 +143,7 @@
                                #gpio-cells = <2>;
                                gpio-controller;
                                interrupt-controller;
+                                #interrupt-cells = <2>;
                        };
                        pioE: gpio@fffffa00 {
@@ -149,6 +153,7 @@
                                #gpio-cells = <2>;
                                gpio-controller;
                                interrupt-controller;
+                                #interrupt-cells = <2>;
                        };
                        dbgu: serial@ffffee00 {
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index bfac0dfc332c..ef9336ae9614 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -107,6 +107,7 @@
                                #gpio-cells = <2>;
                                gpio-controller;
                                interrupt-controller;
+                                #interrupt-cells = <2>;
                        };
                        pioB: gpio@fffff600 {
@@ -116,6 +117,7 @@
                                #gpio-cells = <2>;
                                gpio-controller;
                                interrupt-controller;
+                                #interrupt-cells = <2>;
                        };
                        pioC: gpio@fffff800 {
@@ -125,6 +127,7 @@
                                #gpio-cells = <2>;
                                gpio-controller;
                                interrupt-controller;
+                                #interrupt-cells = <2>;
                        };
                        pioD: gpio@fffffa00 {
@@ -134,6 +137,7 @@
                                #gpio-cells = <2>;
                                gpio-controller;
                                interrupt-controller;
+                                #interrupt-cells = <2>;
                        };
                        dbgu: serial@fffff200 {
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 4a18c393b136..8a387a8d61b7 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -115,6 +115,7 @@
                                #gpio-cells = <2>;
                                gpio-controller;
                                interrupt-controller;
+                                #interrupt-cells = <2>;
                        };
                        pioB: gpio@fffff600 {
@@ -124,6 +125,7 @@
                                #gpio-cells = <2>;
                                gpio-controller;
                                interrupt-controller;
+                                #interrupt-cells = <2>;
                        };
                        pioC: gpio@fffff800 {
@@ -133,6 +135,7 @@
                                #gpio-cells = <2>;
                                gpio-controller;
                                interrupt-controller;
+                                #interrupt-cells = <2>;
                        };
                        pioD: gpio@fffffa00 {
@@ -142,6 +145,7 @@
                                #gpio-cells = <2>;
                                gpio-controller;
                                interrupt-controller;
+                                #interrupt-cells = <2>;
                        };
                        dbgu: serial@fffff200 {
diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi
index a874dbfb5ae6..e6138310e5ce 100644
--- a/arch/arm/boot/dts/imx23.dtsi
+++ b/arch/arm/boot/dts/imx23.dtsi
@@ -51,11 +51,11 @@
                        dma-apbh@80004000 {
                                compatible = "fsl,imx23-dma-apbh";
-                                reg = <0x80004000 2000>;
+                                reg = <0x80004000 0x2000>;
                        };
                        ecc@80008000 {
-                                reg = <0x80008000 2000>;
+                                reg = <0x80008000 0x2000>;
                                status = "disabled";
                        };
@@ -63,7 +63,7 @@
                                compatible = "fsl,imx23-gpmi-nand";
                                #address-cells = <1>;
                                #size-cells = <1>;
-                                reg = <0x8000c000 2000>, <0x8000a000 2000>;
+                                reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
                                reg-names = "gpmi-nand", "bch";
                                interrupts = <13>, <56>;
                                interrupt-names = "gpmi-dma", "bch";
@@ -72,14 +72,14 @@
                        };
                        ssp0: ssp@80010000 {
-                                reg = <0x80010000 2000>;
+                                reg = <0x80010000 0x2000>;
                                interrupts = <15 14>;
                                fsl,ssp-dma-channel = <1>;
                                status = "disabled";
                        };
                        etm@80014000 {
-                                reg = <0x80014000 2000>;
+                                reg = <0x80014000 0x2000>;
                                status = "disabled";
                        };
@@ -87,7 +87,7 @@
                                #address-cells = <1>;
                                #size-cells = <0>;
                                compatible = "fsl,imx23-pinctrl", "simple-bus";
-                                reg = <0x80018000 2000>;
+                                reg = <0x80018000 0x2000>;
                                gpio0: gpio@0 {
                                        compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
@@ -273,32 +273,32 @@
                        };
                        emi@80020000 {
-                                reg = <0x80020000 2000>;
+                                reg = <0x80020000 0x2000>;
                                status = "disabled";
                        };
                        dma-apbx@80024000 {
                                compatible = "fsl,imx23-dma-apbx";
-                                reg = <0x80024000 2000>;
+                                reg = <0x80024000 0x2000>;
                        };
                        dcp@80028000 {
-                                reg = <0x80028000 2000>;
+                                reg = <0x80028000 0x2000>;
                                status = "disabled";
                        };
                        pxp@8002a000 {
-                                reg = <0x8002a000 2000>;
+                                reg = <0x8002a000 0x2000>;
                                status = "disabled";
                        };
                        ocotp@8002c000 {
-                                reg = <0x8002c000 2000>;
+                                reg = <0x8002c000 0x2000>;
                                status = "disabled";
                        };
                        axi-ahb@8002e000 {
-                                reg = <0x8002e000 2000>;
+                                reg = <0x8002e000 0x2000>;
                                status = "disabled";
                        };
@@ -310,14 +310,14 @@
                        };
                        ssp1: ssp@80034000 {
-                                reg = <0x80034000 2000>;
+                                reg = <0x80034000 0x2000>;
                                interrupts = <2 20>;
                                fsl,ssp-dma-channel = <2>;
                                status = "disabled";
                        };
                        tvenc@80038000 {
-                                reg = <0x80038000 2000>;
+                                reg = <0x80038000 0x2000>;
                                status = "disabled";
                        };
                };
@@ -330,37 +330,37 @@
                        ranges;
                        clkctl@80040000 {
-                                reg = <0x80040000 2000>;
+                                reg = <0x80040000 0x2000>;
                                status = "disabled";
                        };
                        saif0: saif@80042000 {
-                                reg = <0x80042000 2000>;
+                                reg = <0x80042000 0x2000>;
                                status = "disabled";
                        };
                        power@80044000 {
-                                reg = <0x80044000 2000>;
+                                reg = <0x80044000 0x2000>;
                                status = "disabled";
                        };
                        saif1: saif@80046000 {
-                                reg = <0x80046000 2000>;
+                                reg = <0x80046000 0x2000>;
                                status = "disabled";
                        };
                        audio-out@80048000 {
-                                reg = <0x80048000 2000>;
+                                reg = <0x80048000 0x2000>;
                                status = "disabled";
                        };
                        audio-in@8004c000 {
-                                reg = <0x8004c000 2000>;
+                                reg = <0x8004c000 0x2000>;
                                status = "disabled";
                        };
                        lradc@80050000 {
-                                reg = <0x80050000 2000>;
+                                reg = <0x80050000 0x2000>;
                                status = "disabled";
                        };
@@ -370,26 +370,26 @@
                        };
                        i2c@80058000 {
-                                reg = <0x80058000 2000>;
+                                reg = <0x80058000 0x2000>;
                                status = "disabled";
                        };
                        rtc@8005c000 {
                                compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
-                                reg = <0x8005c000 2000>;
+                                reg = <0x8005c000 0x2000>;
                                interrupts = <22>;
                        };
                        pwm: pwm@80064000 {
                                compatible = "fsl,imx23-pwm";
-                                reg = <0x80064000 2000>;
+                                reg = <0x80064000 0x2000>;
                                #pwm-cells = <2>;
                                fsl,pwm-number = <5>;
                                status = "disabled";
                        };
                        timrot@80068000 {
-                                reg = <0x80068000 2000>;
+                                reg = <0x80068000 0x2000>;
                                status = "disabled";
                        };
@@ -429,7 +429,7 @@
                ranges;
                usbctrl@80080000 {
-                        reg = <0x80080000 0x10000>;
+                        reg = <0x80080000 0x40000>;
                        status = "disabled";
                };
        };
diff --git a/arch/arm/boot/dts/imx27-3ds.dts b/arch/arm/boot/dts/imx27-3ds.dts
index d3f8296e19e0..0a8978a40ece 100644
--- a/arch/arm/boot/dts/imx27-3ds.dts
+++ b/arch/arm/boot/dts/imx27-3ds.dts
@@ -27,7 +27,7 @@
                                status = "okay";
                        };
-                        uart@1000a000 {
+                        uart1: serial@1000a000 {
                                fsl,uart-has-rtscts;
                                status = "okay";
                        };
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
index 00bae3aad5ab..5303ab680a34 100644
--- a/arch/arm/boot/dts/imx27.dtsi
+++ b/arch/arm/boot/dts/imx27.dtsi
@@ -19,6 +19,12 @@
                serial3 = &uart4;
                serial4 = &uart5;
                serial5 = &uart6;
+                gpio0 = &gpio1;
+                gpio1 = &gpio2;
+                gpio2 = &gpio3;
+                gpio3 = &gpio4;
+                gpio4 = &gpio5;
+                gpio5 = &gpio6;
        };
        avic: avic-interrupt-controller@e0000000 {
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index 787efac68da8..3fa6d190fab4 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -57,18 +57,18 @@
                        };
                        hsadc@80002000 {
-                                reg = <0x80002000 2000>;
+                                reg = <0x80002000 0x2000>;
                                interrupts = <13 87>;
                                status = "disabled";
                        };
                        dma-apbh@80004000 {
                                compatible = "fsl,imx28-dma-apbh";
-                                reg = <0x80004000 2000>;
+                                reg = <0x80004000 0x2000>;
                        };
                        perfmon@80006000 {
-                                reg = <0x80006000 800>;
+                                reg = <0x80006000 0x800>;
                                interrupts = <27>;
                                status = "disabled";
                        };
@@ -77,7 +77,7 @@
                                compatible = "fsl,imx28-gpmi-nand";
                                #address-cells = <1>;
                                #size-cells = <1>;
-                                reg = <0x8000c000 2000>, <0x8000a000 2000>;
+                                reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
                                reg-names = "gpmi-nand", "bch";
                                interrupts = <88>, <41>;
                                interrupt-names = "gpmi-dma", "bch";
@@ -86,28 +86,28 @@
                        };
                        ssp0: ssp@80010000 {
-                                reg = <0x80010000 2000>;
+                                reg = <0x80010000 0x2000>;
                                interrupts = <96 82>;
                                fsl,ssp-dma-channel = <0>;
                                status = "disabled";
                        };
                        ssp1: ssp@80012000 {
-                                reg = <0x80012000 2000>;
+                                reg = <0x80012000 0x2000>;
                                interrupts = <97 83>;
                                fsl,ssp-dma-channel = <1>;
                                status = "disabled";
                        };
                        ssp2: ssp@80014000 {
-                                reg = <0x80014000 2000>;
+                                reg = <0x80014000 0x2000>;
                                interrupts = <98 84>;
                                fsl,ssp-dma-channel = <2>;
                                status = "disabled";
                        };
                        ssp3: ssp@80016000 {
-                                reg = <0x80016000 2000>;
+                                reg = <0x80016000 0x2000>;
                                interrupts = <99 85>;
                                fsl,ssp-dma-channel = <3>;
                                status = "disabled";
@@ -117,7 +117,7 @@
                                #address-cells = <1>;
                                #size-cells = <0>;
                                compatible = "fsl,imx28-pinctrl", "simple-bus";
-                                reg = <0x80018000 2000>;
+                                reg = <0x80018000 0x2000>;
                                gpio0: gpio@0 {
                                        compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
@@ -510,96 +510,96 @@
                        };
                        digctl@8001c000 {
-                                reg = <0x8001c000 2000>;
+                                reg = <0x8001c000 0x2000>;
                                interrupts = <89>;
                                status = "disabled";
                        };
                        etm@80022000 {
-                                reg = <0x80022000 2000>;
+                                reg = <0x80022000 0x2000>;
                                status = "disabled";
                        };
                        dma-apbx@80024000 {
                                compatible = "fsl,imx28-dma-apbx";
-                                reg = <0x80024000 2000>;
+                                reg = <0x80024000 0x2000>;
                        };
                        dcp@80028000 {
-                                reg = <0x80028000 2000>;
+                                reg = <0x80028000 0x2000>;
                                interrupts = <52 53 54>;
                                status = "disabled";
                        };
                        pxp@8002a000 {
-                                reg = <0x8002a000 2000>;
+                                reg = <0x8002a000 0x2000>;
                                interrupts = <39>;
                                status = "disabled";
                        };
                        ocotp@8002c000 {
-                                reg = <0x8002c000 2000>;
+                                reg = <0x8002c000 0x2000>;
                                status = "disabled";
                        };
                        axi-ahb@8002e000 {
-                                reg = <0x8002e000 2000>;
+                                reg = <0x8002e000 0x2000>;
                                status = "disabled";
                        };
                        lcdif@80030000 {
                                compatible = "fsl,imx28-lcdif";
-                                reg = <0x80030000 2000>;
+                                reg = <0x80030000 0x2000>;
                                interrupts = <38 86>;
                                status = "disabled";
                        };
                        can0: can@80032000 {
                                compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
-                                reg = <0x80032000 2000>;
+                                reg = <0x80032000 0x2000>;
                                interrupts = <8>;
                                status = "disabled";
                        };
                        can1: can@80034000 {
                                compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
-                                reg = <0x80034000 2000>;
+                                reg = <0x80034000 0x2000>;
                                interrupts = <9>;
                                status = "disabled";
                        };
                        simdbg@8003c000 {
-                                reg = <0x8003c000 200>;
+                                reg = <0x8003c000 0x200>;
                                status = "disabled";
                        };
                        simgpmisel@8003c200 {
-                                reg = <0x8003c200 100>;
+                                reg = <0x8003c200 0x100>;
                                status = "disabled";
                        };
                        simsspsel@8003c300 {
-                                reg = <0x8003c300 100>;
+                                reg = <0x8003c300 0x100>;
                                status = "disabled";
                        };
                        simmemsel@8003c400 {
-                                reg = <0x8003c400 100>;
+                                reg = <0x8003c400 0x100>;
                                status = "disabled";
                        };
                        gpiomon@8003c500 {
-                                reg = <0x8003c500 100>;
+                                reg = <0x8003c500 0x100>;
                                status = "disabled";
                        };
                        simenet@8003c700 {
-                                reg = <0x8003c700 100>;
+                                reg = <0x8003c700 0x100>;
                                status = "disabled";
                        };
                        armjtag@8003c800 {
-                                reg = <0x8003c800 100>;
+                                reg = <0x8003c800 0x100>;
                                status = "disabled";
                        };
                };
@@ -612,45 +612,45 @@
                        ranges;
                        clkctl@80040000 {
-                                reg = <0x80040000 2000>;
+                                reg = <0x80040000 0x2000>;
                                status = "disabled";
                        };
                        saif0: saif@80042000 {
                                compatible = "fsl,imx28-saif";
-                                reg = <0x80042000 2000>;
+                                reg = <0x80042000 0x2000>;
                                interrupts = <59 80>;
                                fsl,saif-dma-channel = <4>;
                                status = "disabled";
                        };
                        power@80044000 {
-                                reg = <0x80044000 2000>;
+                                reg = <0x80044000 0x2000>;
                                status = "disabled";
                        };
                        saif1: saif@80046000 {
                                compatible = "fsl,imx28-saif";
-                                reg = <0x80046000 2000>;
+                                reg = <0x80046000 0x2000>;
                                interrupts = <58 81>;
                                fsl,saif-dma-channel = <5>;
                                status = "disabled";
                        };
                        lradc@80050000 {
-                                reg = <0x80050000 2000>;
+                                reg = <0x80050000 0x2000>;
                                status = "disabled";
                        };
                        spdif@80054000 {
-                                reg = <0x80054000 2000>;
+                                reg = <0x80054000 0x2000>;
                                interrupts = <45 66>;
                                status = "disabled";
                        };
                        rtc@80056000 {
                                compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
-                                reg = <0x80056000 2000>;
+                                reg = <0x80056000 0x2000>;
                                interrupts = <29>;
                        };
@@ -658,7 +658,7 @@
                                #address-cells = <1>;
                                #size-cells = <0>;
                                compatible = "fsl,imx28-i2c";
-                                reg = <0x80058000 2000>;
+                                reg = <0x80058000 0x2000>;
                                interrupts = <111 68>;
                                clock-frequency = <100000>;
                                status = "disabled";
@@ -668,7 +668,7 @@
                                #address-cells = <1>;
                                #size-cells = <0>;
                                compatible = "fsl,imx28-i2c";
-                                reg = <0x8005a000 2000>;
+                                reg = <0x8005a000 0x2000>;
                                interrupts = <110 69>;
                                clock-frequency = <100000>;
                                status = "disabled";
@@ -676,14 +676,14 @@
                        pwm: pwm@80064000 {
                                compatible = "fsl,imx28-pwm", "fsl,imx23-pwm";
-                                reg = <0x80064000 2000>;
+                                reg = <0x80064000 0x2000>;
                                #pwm-cells = <2>;
                                fsl,pwm-number = <8>;
                                status = "disabled";
                        };
                        timrot@80068000 {
-                                reg = <0x80068000 2000>;
+                                reg = <0x80068000 0x2000>;
                                status = "disabled";
                        };
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index de065b5976e6..59d9789e5508 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -25,8 +25,8 @@
                aips@70000000 { /* aips-1 */
                        spba@70000000 {
                                esdhc@70004000 { /* ESDHC1 */
-                                        fsl,cd-internal;
+                                        fsl,cd-controller;
-                                        fsl,wp-internal;
+                                        fsl,wp-controller;
                                        status = "okay";
                                };
@@ -53,7 +53,7 @@
                                                spi-max-frequency = <6000000>;
                                                reg = <0>;
                                                interrupt-parent = <&gpio1>;
-                                                interrupts = <8>;
+                                                interrupts = <8 0x4>;
                                                regulators {
                                                        sw1_reg: sw1 {
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 53cbaa3d4f90..aba28dc87fc8 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -17,6 +17,10 @@
                serial0 = &uart1;
                serial1 = &uart2;
                serial2 = &uart3;
+                gpio0 = &gpio1;
+                gpio1 = &gpio2;
+                gpio2 = &gpio3;
+                gpio3 = &gpio4;
        };
        tzic: tz-interrupt-controller@e0000000 {
diff --git a/arch/arm/boot/dts/imx53-ard.dts b/arch/arm/boot/dts/imx53-ard.dts
index 5b8eafcdbeec..da895e93a999 100644
--- a/arch/arm/boot/dts/imx53-ard.dts
+++ b/arch/arm/boot/dts/imx53-ard.dts
@@ -64,12 +64,32 @@
                        reg = <0xf4000000 0x2000000>;
                        phy-mode = "mii";
                        interrupt-parent = <&gpio2>;
-                        interrupts = <31>;
+                        interrupts = <31 0x8>;
                        reg-io-width = <4>;
+                        /*
+                         * VDD33A and VDDVARIO of LAN9220 are supplied by
+                         * SW4_3V3 of LTC3589.  Before the regulator driver
+                         * for this PMIC is available, we use a fixed dummy
+                         * 3V3 regulator to get LAN9220 driver probing work.
+                         */
+                        vdd33a-supply = <&reg_3p3v>;
+                        vddvario-supply = <&reg_3p3v>;
                        smsc,irq-push-pull;
                };
        };
+        regulators {
+                compatible = "simple-bus";
+                reg_3p3v: 3p3v {
+                        compatible = "regulator-fixed";
+                        regulator-name = "3P3V";
+                        regulator-min-microvolt = <3300000>;
+                        regulator-max-microvolt = <3300000>;
+                        regulator-always-on;
+                };
+        };
        gpio-keys {
                compatible = "gpio-keys";
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index fc79cdc4b4e6..cd37165edce5 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -19,6 +19,13 @@
                serial2 = &uart3;
                serial3 = &uart4;
                serial4 = &uart5;
+                gpio0 = &gpio1;
+                gpio1 = &gpio2;
+                gpio2 = &gpio3;
+                gpio3 = &gpio4;
+                gpio4 = &gpio5;
+                gpio5 = &gpio6;
+                gpio6 = &gpio7;
        };
        tzic: tz-interrupt-controller@0fffc000 {
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
index d42e851ceb97..72f30f3e6171 100644
--- a/arch/arm/boot/dts/imx6q-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -53,6 +53,7 @@
                                                fsl,pins = <
                                                           144  0x80000000      /* MX6Q_PAD_EIM_D22__GPIO_3_22 */
                                                           121  0x80000000      /* MX6Q_PAD_EIM_D19__GPIO_3_19 */
+                                                           953  0x80000000      /* MX6Q_PAD_GPIO_0__CCM_CLKO */
                                                           >;
                                        };
                                };
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 3d3c64b014e6..fd57079f71a9 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -19,6 +19,13 @@
                serial2 = &uart3;
                serial3 = &uart4;
                serial4 = &uart5;
+                gpio0 = &gpio1;
+                gpio1 = &gpio2;
+                gpio2 = &gpio3;
+                gpio3 = &gpio4;
+                gpio4 = &gpio5;
+                gpio5 = &gpio6;
+                gpio6 = &gpio7;
        };
        cpus {
diff --git a/arch/arm/boot/dts/integrator.dtsi b/arch/arm/boot/dts/integrator.dtsi
new file mode 100644
index 000000000000..813b91d7bea2
--- /dev/null
+++ b/arch/arm/boot/dts/integrator.dtsi
@@ -0,0 +1,76 @@
+/*
+ * SoC core Device Tree for the ARM Integrator platforms
+ */
+/include/ "skeleton.dtsi"
+/ {
+        timer@13000000 {
+                reg = <0x13000000 0x100>;
+                interrupt-parent = <&pic>;
+                interrupts = <5>;
+        };
+        timer@13000100 {
+                reg = <0x13000100 0x100>;
+                interrupt-parent = <&pic>;
+                interrupts = <6>;
+        };
+        timer@13000200 {
+                reg = <0x13000200 0x100>;
+                interrupt-parent = <&pic>;
+                interrupts = <7>;
+        };
+        pic@14000000 {
+                compatible = "arm,versatile-fpga-irq";
+                #interrupt-cells = <1>;
+                interrupt-controller;
+                reg = <0x14000000 0x100>;
+                clear-mask = <0xffffffff>;
+        };
+        flash@24000000 {
+                compatible = "cfi-flash";
+                reg = <0x24000000 0x02000000>;
+        };
+        fpga {
+                compatible = "arm,amba-bus", "simple-bus";
+                #address-cells = <1>;
+                #size-cells = <1>;
+                ranges;
+                interrupt-parent = <&pic>;
+                /*
+                 * These PrimeCells are in the same locations and using the
+                 * same interrupts in all Integrators, however the silicon
+                 * version deployed is different.
+                 */
+                rtc@15000000 {
+                        reg = <0x15000000 0x1000>;
+                        interrupts = <8>;
+                };
+                uart@16000000 {
+                        reg = <0x16000000 0x1000>;
+                        interrupts = <1>;
+                };
+                uart@17000000 {
+                        reg = <0x17000000 0x1000>;
+                        interrupts = <2>;
+                };
+                kmi@18000000 {
+                        reg = <0x18000000 0x1000>;
+                        interrupts = <3>;
+                };
+                kmi@19000000 {
+                        reg = <0x19000000 0x1000>;
+                        interrupts = <4>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/integratorap.dts b/arch/arm/boot/dts/integratorap.dts
new file mode 100644
index 000000000000..61767757b50a
--- /dev/null
+++ b/arch/arm/boot/dts/integratorap.dts
@@ -0,0 +1,68 @@
+/*
+ * Device Tree for the ARM Integrator/AP platform
+ */
+/dts-v1/;
+/include/ "integrator.dtsi"
+/ {
+        model = "ARM Integrator/AP";
+        compatible = "arm,integrator-ap";
+        aliases {
+                arm,timer-primary = &timer2;
+                arm,timer-secondary = &timer1;
+        };
+        chosen {
+                bootargs = "root=/dev/ram0 console=ttyAM0,38400n8 earlyprintk";
+        };
+        timer0: timer@13000000 {
+                compatible = "arm,integrator-timer";
+        };
+        timer1: timer@13000100 {
+                compatible = "arm,integrator-timer";
+        };
+        timer2: timer@13000200 {
+                compatible = "arm,integrator-timer";
+        };
+        pic: pic@14000000 {
+                valid-mask = <0x003fffff>;
+        };
+        fpga {
+                /*
+                 * The Integator/AP predates the idea to have magic numbers
+                 * identifying the PrimeCell in hardware, thus we have to
+                 * supply these from the device tree.
+                 */
+                rtc: rtc@15000000 {
+                        compatible = "arm,pl030", "arm,primecell";
+                        arm,primecell-periphid = <0x00041030>;
+                };
+                uart0: uart@16000000 {
+                        compatible = "arm,pl010", "arm,primecell";
+                        arm,primecell-periphid = <0x00041010>;
+                };
+                uart1: uart@17000000 {
+                        compatible = "arm,pl010", "arm,primecell";
+                        arm,primecell-periphid = <0x00041010>;
+                };
+                kmi0: kmi@18000000 {
+                        compatible = "arm,pl050", "arm,primecell";
+                        arm,primecell-periphid = <0x00041050>;
+                };
+                kmi1: kmi@19000000 {
+                        compatible = "arm,pl050", "arm,primecell";
+                        arm,primecell-periphid = <0x00041050>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts
new file mode 100644
index 000000000000..2dd5e4e48481
--- /dev/null
+++ b/arch/arm/boot/dts/integratorcp.dts
@@ -0,0 +1,110 @@
+/*
+ * Device Tree for the ARM Integrator/CP platform
+ */
+/dts-v1/;
+/include/ "integrator.dtsi"
+/ {
+        model = "ARM Integrator/CP";
+        compatible = "arm,integrator-cp";
+        aliases {
+                arm,timer-primary = &timer2;
+                arm,timer-secondary = &timer1;
+        };
+        chosen {
+                bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk";
+        };
+        timer0: timer@13000000 {
+                compatible = "arm,sp804", "arm,primecell";
+        };
+        timer1: timer@13000100 {
+                compatible = "arm,sp804", "arm,primecell";
+        };
+        timer2: timer@13000200 {
+                compatible = "arm,sp804", "arm,primecell";
+        };
+        pic: pic@14000000 {
+                valid-mask = <0x1fc003ff>;
+        };
+        cic: cic@10000040 {
+                compatible = "arm,versatile-fpga-irq";
+                #interrupt-cells = <1>;
+                interrupt-controller;
+                reg = <0x10000040 0x100>;
+                clear-mask = <0xffffffff>;
+                valid-mask = <0x00000007>;
+        };
+        sic: sic@ca000000 {
+                compatible = "arm,versatile-fpga-irq";
+                #interrupt-cells = <1>;
+                interrupt-controller;
+                reg = <0xca000000 0x100>;
+                clear-mask = <0x00000fff>;
+                valid-mask = <0x00000fff>;
+        };
+        ethernet@c8000000 {
+                compatible = "smsc,lan91c111";
+                reg = <0xc8000000 0x10>;
+                interrupt-parent = <&pic>;
+                interrupts = <27>;
+        };
+        fpga {
+                /*
+                 * These PrimeCells are at the same location and using
+                 * the same interrupts in all Integrators, but in the CP
+                 * slightly newer versions are deployed.
+                 */
+                rtc@15000000 {
+                        compatible = "arm,pl031", "arm,primecell";
+                };
+                uart@16000000 {
+                        compatible = "arm,pl011", "arm,primecell";
+                };
+                uart@17000000 {
+                        compatible = "arm,pl011", "arm,primecell";
+                };
+                kmi@18000000 {
+                        compatible = "arm,pl050", "arm,primecell";
+                };
+                kmi@19000000 {
+                        compatible = "arm,pl050", "arm,primecell";
+                };
+                /*
+                 * These PrimeCells are only available on the Integrator/CP
+                 */
+                mmc@1c000000 {
+                        compatible = "arm,pl180", "arm,primecell";
+                        reg = <0x1c000000 0x1000>;
+                        interrupts = <23 24>;
+                        max-frequency = <515633>;
+                };
+                aaci@1d000000 {
+                        compatible = "arm,pl041", "arm,primecell";
+                        reg = <0x1d000000 0x1000>;
+                        interrupts = <25>;
+                };
+                clcd@c0000000 {
+                        compatible = "arm,pl110", "arm,primecell";
+                        reg = <0xC0000000 0x1000>;
+                        interrupts = <22>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/kirkwood-iconnect.dts b/arch/arm/boot/dts/kirkwood-iconnect.dts
index 52d947045106..f8ca6fa88192 100644
--- a/arch/arm/boot/dts/kirkwood-iconnect.dts
+++ b/arch/arm/boot/dts/kirkwood-iconnect.dts
@@ -41,9 +41,13 @@
                };
                power-blue {
                        label = "power:blue";
-                        gpios = <&gpio1 11 0>;
+                        gpios = <&gpio1 10 0>;
                        linux,default-trigger = "timer";
                };
+                power-red {
+                        label = "power:red";
+                        gpios = <&gpio1 11 0>;
+                };
                usb1 {
                        label = "usb1:blue";
                        gpios = <&gpio1 12 0>;
diff --git a/arch/arm/boot/dts/twl6030.dtsi b/arch/arm/boot/dts/twl6030.dtsi
index 3b2f3510d7eb..d351b27d7213 100644
--- a/arch/arm/boot/dts/twl6030.dtsi
+++ b/arch/arm/boot/dts/twl6030.dtsi
@@ -66,6 +66,7 @@
        vcxio: regulator@8 {
                compatible = "ti,twl6030-vcxio";
+                regulator-always-on;
        };
        vusb: regulator@9 {
@@ -74,10 +75,12 @@
        v1v8: regulator@10 {
                compatible = "ti,twl6030-v1v8";
+                regulator-always-on;
        };
        v2v1: regulator@11 {
                compatible = "ti,twl6030-v2v1";
+                regulator-always-on;
        };
        clk32kg: regulator@12 {
diff --git a/arch/arm/configs/armadillo800eva_defconfig b/arch/arm/configs/armadillo800eva_defconfig
index 7d8718468e0d..90610c7030f7 100644
--- a/arch/arm/configs/armadillo800eva_defconfig
+++ b/arch/arm/configs/armadillo800eva_defconfig
@@ -33,7 +33,7 @@ CONFIG_AEABI=y
 CONFIG_FORCE_MAX_ZONEORDER=13
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096"
+CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096 rw"
 CONFIG_CMDLINE_FORCE=y
 CONFIG_KEXEC=y
 CONFIG_VFP=y
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index f725b9637b33..3c9f32f9b6b4 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -192,6 +192,7 @@ CONFIG_RTC_DRV_MC13XXX=y
 CONFIG_RTC_DRV_MXC=y
 CONFIG_DMADEVICES=y
 CONFIG_IMX_SDMA=y
+CONFIG_MXS_DMA=y
 CONFIG_COMMON_CLK_DEBUG=y
 # CONFIG_IOMMU_SUPPORT is not set
 CONFIG_EXT2_FS=y
diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig
index ccdb6357fb74..4edcfb4e4dee 100644
--- a/arch/arm/configs/mxs_defconfig
+++ b/arch/arm/configs/mxs_defconfig
@@ -34,7 +34,6 @@ CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_PREEMPT_VOLUNTARY=y
 CONFIG_AEABI=y
-CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
 CONFIG_AUTO_ZRELADDR=y
 CONFIG_FPE_NWFPE=y
 CONFIG_NET=y
diff --git a/arch/arm/configs/tct_hammer_defconfig b/arch/arm/configs/tct_hammer_defconfig
index 1d24f8458bef..71277a1591ba 100644
--- a/arch/arm/configs/tct_hammer_defconfig
+++ b/arch/arm/configs/tct_hammer_defconfig
@@ -7,7 +7,7 @@ CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
-# CONFIG_BUG is not set
+# CONFIG_BUGVERBOSE is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_SHMEM is not set
 CONFIG_SLOB=y
diff --git a/arch/arm/configs/u8500_defconfig b/arch/arm/configs/u8500_defconfig
index 2d4f661d1cf6..da6845493caa 100644
--- a/arch/arm/configs/u8500_defconfig
+++ b/arch/arm/configs/u8500_defconfig
@@ -86,6 +86,7 @@ CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
 CONFIG_LEDS_LM3530=y
 CONFIG_LEDS_LP5521=y
+CONFIG_LEDS_GPIO=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_AB8500=y
 CONFIG_RTC_DRV_PL031=y
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 03fb93621d0d..5c8b3bf4d825 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -320,4 +320,12 @@
        .size \name , . - \name
        .endm
+        .macro check_uaccess, addr:req, size:req, limit:req, tmp:req, bad:req
+#ifndef CONFIG_CPU_USE_DOMAINS
+        adds    \tmp, \addr, #\size - 1
+        sbcccs  \tmp, \tmp, \limit
+        bcs     \bad
+#endif
+        .endm
 #endif /* __ASM_ASSEMBLER_H__ */
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 2ae842df4551..5c44dcb0987b 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -203,6 +203,13 @@ static inline void dma_free_writecombine(struct device *dev, size_t size,
 }
 /*
+ * This can be called during early boot to increase the size of the atomic
+ * coherent DMA pool above the default value of 256KiB. It must be called
+ * before postcore_initcall.
+ */
+extern void __init init_dma_coherent_pool_size(unsigned long size);
+/*
 * This can be called during boot to increase the size of the consistent
 * DMA region above it's default value of 2MB. It must be called before the
 * memory allocator is initialised, i.e. before any core_initcall.
diff --git a/arch/arm/include/asm/hardware/linkup-l1110.h b/arch/arm/include/asm/hardware/linkup-l1110.h
deleted file mode 100644
index 7ec91168a576..000000000000
--- a/arch/arm/include/asm/hardware/linkup-l1110.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
-*
-* Definitions for H3600 Handheld Computer
-*
-* Copyright 2001 Compaq Computer Corporation.
-*
-* Use consistent with the GNU GPL is permitted,
-* provided that this copyright notice is
-* preserved in its entirety in all copies and derived works.
-*
-* COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
-* AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
-* FITNESS FOR ANY PARTICULAR PURPOSE.
-*
-* Author: Jamey Hicks.
-*
-*/
-/* LinkUp Systems PCCard/CompactFlash Interface for SA-1100 */
-/* PC Card Status Register */
-#define LINKUP_PRS_S1   (1 << 0) /* voltage control bits S1-S4 */
-#define LINKUP_PRS_S2   (1 << 1)
-#define LINKUP_PRS_S3   (1 << 2)
-#define LINKUP_PRS_S4   (1 << 3)
-#define LINKUP_PRS_BVD1 (1 << 4)
-#define LINKUP_PRS_BVD2 (1 << 5)
-#define LINKUP_PRS_VS1  (1 << 6)
-#define LINKUP_PRS_VS2  (1 << 7)
-#define LINKUP_PRS_RDY  (1 << 8)
-#define LINKUP_PRS_CD1  (1 << 9)
-#define LINKUP_PRS_CD2  (1 << 10)
-/* PC Card Command Register */
-#define LINKUP_PRC_S1   (1 << 0)
-#define LINKUP_PRC_S2   (1 << 1)
-#define LINKUP_PRC_S3   (1 << 2)
-#define LINKUP_PRC_S4   (1 << 3)
-#define LINKUP_PRC_RESET (1 << 4)
-#define LINKUP_PRC_APOE (1 << 5) /* Auto Power Off Enable: clears S1-S4 when either nCD goes high */
-#define LINKUP_PRC_CFE  (1 << 6) /* CompactFlash mode Enable: addresses A[10:0] only, A[25:11] high */
-#define LINKUP_PRC_SOE  (1 << 7) /* signal output driver enable */
-#define LINKUP_PRC_SSP  (1 << 8) /* sock select polarity: 0 for socket 0, 1 for socket 1 */
-#define LINKUP_PRC_MBZ  (1 << 15) /* must be zero */
-struct linkup_l1110 {
-        volatile short prc;
-};
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index e965f1b560f1..5f6ddcc56452 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -187,6 +187,7 @@ static inline unsigned long __phys_to_virt(unsigned long x)
 #define __phys_to_virt(x)       ((x) - PHYS_OFFSET + PAGE_OFFSET)
 #endif
 #endif
+#endif /* __ASSEMBLY__ */
 #ifndef PHYS_OFFSET
 #ifdef PLAT_PHYS_OFFSET
@@ -196,6 +197,8 @@ static inline unsigned long __phys_to_virt(unsigned long x)
 #endif
 #endif
+#ifndef __ASSEMBLY__
 /*
 * PFNs are used to describe any physical page; this means
 * PFN 0 == physical address 0.
diff --git a/arch/arm/include/asm/opcodes-virt.h b/arch/arm/include/asm/opcodes-virt.h
new file mode 100644
index 000000000000..b85665a96f8e
--- /dev/null
+++ b/arch/arm/include/asm/opcodes-virt.h
@@ -0,0 +1,29 @@
+/*
+ * opcodes-virt.h: Opcode definitions for the ARM virtualization extensions
+ * Copyright (C) 2012  Linaro Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+#ifndef __ASM_ARM_OPCODES_VIRT_H
+#define __ASM_ARM_OPCODES_VIRT_H
+#include <asm/opcodes.h>
+#define __HVC(imm16) __inst_arm_thumb32(                                \
+        0xE1400070 | (((imm16) & 0xFFF0) << 4) | ((imm16) & 0x000F),    \
+        0xF7E08000 | (((imm16) & 0xF000) << 4) | ((imm16) & 0x0FFF)     \
+)
+#endif /* ! __ASM_ARM_OPCODES_VIRT_H */
diff --git a/arch/arm/include/asm/opcodes.h b/arch/arm/include/asm/opcodes.h
index 19c48deda70f..74e211a6fb24 100644
--- a/arch/arm/include/asm/opcodes.h
+++ b/arch/arm/include/asm/opcodes.h
@@ -19,6 +19,33 @@ extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
 /*
+ * Assembler opcode byteswap helpers.
+ * These are only intended for use by this header: don't use them directly,
+ * because they will be suboptimal in most cases.
+ */
+#define ___asm_opcode_swab32(x) (       \
+          (((x) << 24) & 0xFF000000)    \
+        | (((x) <<  8) & 0x00FF0000)    \
+        | (((x) >>  8) & 0x0000FF00)    \
+        | (((x) >> 24) & 0x000000FF)    \
+)
+#define ___asm_opcode_swab16(x) (       \
+          (((x) << 8) & 0xFF00)         \
+        | (((x) >> 8) & 0x00FF)         \
+)
+#define ___asm_opcode_swahb32(x) (      \
+          (((x) << 8) & 0xFF00FF00)     \
+        | (((x) >> 8) & 0x00FF00FF)     \
+)
+#define ___asm_opcode_swahw32(x) (      \
+          (((x) << 16) & 0xFFFF0000)    \
+        | (((x) >> 16) & 0x0000FFFF)    \
+)
+#define ___asm_opcode_identity32(x) ((x) & 0xFFFFFFFF)
+#define ___asm_opcode_identity16(x) ((x) & 0xFFFF)
+/*
 * Opcode byteswap helpers
 *
 * These macros help with converting instructions between a canonical integer
@@ -41,39 +68,163 @@ extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
 * Note that values in the range 0x0000E800..0xE7FFFFFF intentionally do not
 * represent any valid Thumb-2 instruction.  For this range,
 * __opcode_is_thumb32() and __opcode_is_thumb16() will both be false.
+ *
+ * The ___asm variants are intended only for use by this header, in situations
+ * involving inline assembler.  For .S files, the normal __opcode_*() macros
+ * should do the right thing.
 */
+#ifdef __ASSEMBLY__
-#ifndef __ASSEMBLY__
+#define ___opcode_swab32(x) ___asm_opcode_swab32(x)
+#define ___opcode_swab16(x) ___asm_opcode_swab16(x)
+#define ___opcode_swahb32(x) ___asm_opcode_swahb32(x)
+#define ___opcode_swahw32(x) ___asm_opcode_swahw32(x)
+#define ___opcode_identity32(x) ___asm_opcode_identity32(x)
+#define ___opcode_identity16(x) ___asm_opcode_identity16(x)
+#else /* ! __ASSEMBLY__ */
 #include <linux/types.h>
 #include <linux/swab.h>
+#define ___opcode_swab32(x) swab32(x)
+#define ___opcode_swab16(x) swab16(x)
+#define ___opcode_swahb32(x) swahb32(x)
+#define ___opcode_swahw32(x) swahw32(x)
+#define ___opcode_identity32(x) ((u32)(x))
+#define ___opcode_identity16(x) ((u16)(x))
+#endif /* ! __ASSEMBLY__ */
 #ifdef CONFIG_CPU_ENDIAN_BE8
-#define __opcode_to_mem_arm(x) swab32(x)
-#define __opcode_to_mem_thumb16(x) swab16(x)
+#define __opcode_to_mem_arm(x) ___opcode_swab32(x)
-#define __opcode_to_mem_thumb32(x) swahb32(x)
+#define __opcode_to_mem_thumb16(x) ___opcode_swab16(x)
-#else
+#define __opcode_to_mem_thumb32(x) ___opcode_swahb32(x)
-#define __opcode_to_mem_arm(x) ((u32)(x))
+#define ___asm_opcode_to_mem_arm(x) ___asm_opcode_swab32(x)
-#define __opcode_to_mem_thumb16(x) ((u16)(x))
+#define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_swab16(x)
-#define __opcode_to_mem_thumb32(x) swahw32(x)
+#define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahb32(x)
+#else /* ! CONFIG_CPU_ENDIAN_BE8 */
+#define __opcode_to_mem_arm(x) ___opcode_identity32(x)
+#define __opcode_to_mem_thumb16(x) ___opcode_identity16(x)
+#define ___asm_opcode_to_mem_arm(x) ___asm_opcode_identity32(x)
+#define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_identity16(x)
+#ifndef CONFIG_CPU_ENDIAN_BE32
+/*
+ * On BE32 systems, using 32-bit accesses to store Thumb instructions will not
+ * work in all cases, due to alignment constraints.  For now, a correct
+ * version is not provided for BE32.
+ */
+#define __opcode_to_mem_thumb32(x) ___opcode_swahw32(x)
+#define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahw32(x)
 #endif
+#endif /* ! CONFIG_CPU_ENDIAN_BE8 */
 #define __mem_to_opcode_arm(x) __opcode_to_mem_arm(x)
 #define __mem_to_opcode_thumb16(x) __opcode_to_mem_thumb16(x)
+#ifndef CONFIG_CPU_ENDIAN_BE32
 #define __mem_to_opcode_thumb32(x) __opcode_to_mem_thumb32(x)
+#endif
 /* Operations specific to Thumb opcodes */
 /* Instruction size checks: */
-#define __opcode_is_thumb32(x) ((u32)(x) >= 0xE8000000UL)
+#define __opcode_is_thumb32(x) (                \
-#define __opcode_is_thumb16(x) ((u32)(x) < 0xE800UL)
+           ((x) & 0xF8000000) == 0xE8000000     \
+        || ((x) & 0xF0000000) == 0xF0000000     \
+)
+#define __opcode_is_thumb16(x) (                                        \
+           ((x) & 0xFFFF0000) == 0                                      \
+        && !(((x) & 0xF800) == 0xE800 || ((x) & 0xF000) == 0xF000)      \
+)
 /* Operations to construct or split 32-bit Thumb instructions: */
-#define __opcode_thumb32_first(x) ((u16)((x) >> 16))
+#define __opcode_thumb32_first(x) (___opcode_identity16((x) >> 16))
-#define __opcode_thumb32_second(x) ((u16)(x))
+#define __opcode_thumb32_second(x) (___opcode_identity16(x))
-#define __opcode_thumb32_compose(first, second) \
+#define __opcode_thumb32_compose(first, second) (                       \
-        (((u32)(u16)(first) << 16) | (u32)(u16)(second))
+          (___opcode_identity32(___opcode_identity16(first)) << 16)     \
+        | ___opcode_identity32(___opcode_identity16(second))            \
+)
+#define ___asm_opcode_thumb32_first(x) (___asm_opcode_identity16((x) >> 16))
+#define ___asm_opcode_thumb32_second(x) (___asm_opcode_identity16(x))
+#define ___asm_opcode_thumb32_compose(first, second) (                      \
+          (___asm_opcode_identity32(___asm_opcode_identity16(first)) << 16) \
+        | ___asm_opcode_identity32(___asm_opcode_identity16(second))        \
+)
-#endif /* __ASSEMBLY__ */
+/*
+ * Opcode injection helpers
+ *
+ * In rare cases it is necessary to assemble an opcode which the
+ * assembler does not support directly, or which would normally be
+ * rejected because of the CFLAGS or AFLAGS used to build the affected
+ * file.
+ *
+ * Before using these macros, consider carefully whether it is feasible
+ * instead to change the build flags for your file, or whether it really
+ * makes sense to support old assembler versions when building that
+ * particular kernel feature.
+ *
+ * The macros defined here should only be used where there is no viable
+ * alternative.
+ *
+ *
+ * __inst_arm(x): emit the specified ARM opcode
+ * __inst_thumb16(x): emit the specified 16-bit Thumb opcode
+ * __inst_thumb32(x): emit the specified 32-bit Thumb opcode
+ *
+ * __inst_arm_thumb16(arm, thumb): emit either the specified arm or
+ *      16-bit Thumb opcode, depending on whether an ARM or Thumb-2
+ *      kernel is being built
+ *
+ * __inst_arm_thumb32(arm, thumb): emit either the specified arm or
+ *      32-bit Thumb opcode, depending on whether an ARM or Thumb-2
+ *      kernel is being built
+ *
+ *
+ * Note that using these macros directly is poor practice.  Instead, you
+ * should use them to define human-readable wrapper macros to encode the
+ * instructions that you care about.  In code which might run on ARMv7 or
+ * above, you can usually use the __inst_arm_thumb{16,32} macros to
+ * specify the ARM and Thumb alternatives at the same time.  This ensures
+ * that the correct opcode gets emitted depending on the instruction set
+ * used for the kernel build.
+ *
+ * Look at opcodes-virt.h for an example of how to use these macros.
+ */
+#include <linux/stringify.h>
+#define __inst_arm(x) ___inst_arm(___asm_opcode_to_mem_arm(x))
+#define __inst_thumb32(x) ___inst_thumb32(                              \
+        ___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_first(x)),   \
+        ___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_second(x))   \
+)
+#define __inst_thumb16(x) ___inst_thumb16(___asm_opcode_to_mem_thumb16(x))
+#ifdef CONFIG_THUMB2_KERNEL
+#define __inst_arm_thumb16(arm_opcode, thumb_opcode) \
+        __inst_thumb16(thumb_opcode)
+#define __inst_arm_thumb32(arm_opcode, thumb_opcode) \
+        __inst_thumb32(thumb_opcode)
+#else
+#define __inst_arm_thumb16(arm_opcode, thumb_opcode) __inst_arm(arm_opcode)
+#define __inst_arm_thumb32(arm_opcode, thumb_opcode) __inst_arm(arm_opcode)
+#endif
+/* Helpers for the helpers.  Don't use these directly. */
+#ifdef __ASSEMBLY__
+#define ___inst_arm(x) .long x
+#define ___inst_thumb16(x) .short x
+#define ___inst_thumb32(first, second) .short first, second
+#else
+#define ___inst_arm(x) ".long " __stringify(x) "\n\t"
+#define ___inst_thumb16(x) ".short " __stringify(x) "\n\t"
+#define ___inst_thumb32(first, second) \
+        ".short " __stringify(first) ", " __stringify(second) "\n\t"
+#endif
 #endif /* __ASM_ARM_OPCODES_H */
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index f66626d71e7d..41dc31f834c3 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -195,6 +195,18 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd)
 #define pte_clear(mm,addr,ptep) set_pte_ext(ptep, __pte(0), 0)
+#define pte_none(pte)           (!pte_val(pte))
+#define pte_present(pte)        (pte_val(pte) & L_PTE_PRESENT)
+#define pte_write(pte)          (!(pte_val(pte) & L_PTE_RDONLY))
+#define pte_dirty(pte)          (pte_val(pte) & L_PTE_DIRTY)
+#define pte_young(pte)          (pte_val(pte) & L_PTE_YOUNG)
+#define pte_exec(pte)           (!(pte_val(pte) & L_PTE_XN))
+#define pte_special(pte)        (0)
+#define pte_present_user(pte) \
+        ((pte_val(pte) & (L_PTE_PRESENT | L_PTE_USER)) == \
+         (L_PTE_PRESENT | L_PTE_USER))
 #if __LINUX_ARM_ARCH__ < 6
 static inline void __sync_icache_dcache(pte_t pteval)
 {
@@ -206,25 +218,15 @@ extern void __sync_icache_dcache(pte_t pteval);
 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
                              pte_t *ptep, pte_t pteval)
 {
-        if (addr >= TASK_SIZE)
+        unsigned long ext = 0;
-                set_pte_ext(ptep, pteval, 0);
-        else {
+        if (addr < TASK_SIZE && pte_present_user(pteval)) {
                __sync_icache_dcache(pteval);
-                set_pte_ext(ptep, pteval, PTE_EXT_NG);
+                ext |= PTE_EXT_NG;
        }
-}
-#define pte_none(pte)           (!pte_val(pte))
+        set_pte_ext(ptep, pteval, ext);
-#define pte_present(pte)        (pte_val(pte) & L_PTE_PRESENT)
+}
-#define pte_write(pte)          (!(pte_val(pte) & L_PTE_RDONLY))
-#define pte_dirty(pte)          (pte_val(pte) & L_PTE_DIRTY)
-#define pte_young(pte)          (pte_val(pte) & L_PTE_YOUNG)
-#define pte_exec(pte)           (!(pte_val(pte) & L_PTE_XN))
-#define pte_special(pte)        (0)
-#define pte_present_user(pte) \
-        ((pte_val(pte) & (L_PTE_PRESENT | L_PTE_USER)) == \
-         (L_PTE_PRESENT | L_PTE_USER))
 #define PTE_BIT_FUNC(fn,op) \
 static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; }
@@ -251,13 +253,13 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 *
 *   3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
 *   1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
- *   <--------------- offset --------------------> <- type --> 0 0 0
+ *   <--------------- offset ----------------------> < type -> 0 0 0
 *
- * This gives us up to 63 swap files and 32GB per swap file.  Note that
+ * This gives us up to 31 swap files and 64GB per swap file.  Note that
 * the offset field is always non-zero.
 */
 #define __SWP_TYPE_SHIFT        3
-#define __SWP_TYPE_BITS         6
+#define __SWP_TYPE_BITS         5
 #define __SWP_TYPE_MASK         ((1 << __SWP_TYPE_BITS) - 1)
 #define __SWP_OFFSET_SHIFT      (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
diff --git a/arch/arm/include/asm/sched_clock.h b/arch/arm/include/asm/sched_clock.h
index e3f757263438..05b8e82ec9f5 100644
--- a/arch/arm/include/asm/sched_clock.h
+++ b/arch/arm/include/asm/sched_clock.h
@@ -10,5 +10,7 @@
 extern void sched_clock_postinit(void);
 extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate);
+extern void setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
+                unsigned long rate);
 #endif
diff --git a/arch/arm/include/asm/syscall.h b/arch/arm/include/asm/syscall.h
index c334a23ddf75..47486a41c56e 100644
--- a/arch/arm/include/asm/syscall.h
+++ b/arch/arm/include/asm/syscall.h
@@ -9,6 +9,10 @@
 #include <linux/err.h>
+#include <asm/unistd.h>
+#define NR_syscalls (__NR_syscalls)
 extern const unsigned long sys_call_table[];
 static inline int syscall_get_nr(struct task_struct *task,
diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h
index af7b0bda3355..f71cdab18b87 100644
--- a/arch/arm/include/asm/thread_info.h
+++ b/arch/arm/include/asm/thread_info.h
@@ -59,7 +59,9 @@ struct thread_info {
        __u32                   syscall;        /* syscall number */
        __u8                    used_cp[16];    /* thread used copro */
        unsigned long           tp_value;
+#ifdef CONFIG_CRUNCH
        struct crunch_state     crunchstate;
+#endif
        union fp_state          fpstate __attribute__((aligned(8)));
        union vfp_state         vfpstate;
 #ifdef CONFIG_ARM_THUMBEE
@@ -148,6 +150,7 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user *,
 #define TIF_NOTIFY_RESUME       2       /* callback before returning to user */
 #define TIF_SYSCALL_TRACE       8
 #define TIF_SYSCALL_AUDIT       9
+#define TIF_SYSCALL_TRACEPOINT  10
 #define TIF_POLLING_NRFLAG      16
 #define TIF_USING_IWMMXT        17
 #define TIF_MEMDIE              18      /* is terminating due to OOM killer */
@@ -160,12 +163,13 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user *,
 #define _TIF_NOTIFY_RESUME      (1 << TIF_NOTIFY_RESUME)
 #define _TIF_SYSCALL_TRACE      (1 << TIF_SYSCALL_TRACE)
 #define _TIF_SYSCALL_AUDIT      (1 << TIF_SYSCALL_AUDIT)
+#define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT)
 #define _TIF_POLLING_NRFLAG     (1 << TIF_POLLING_NRFLAG)
 #define _TIF_USING_IWMMXT       (1 << TIF_USING_IWMMXT)
 #define _TIF_SECCOMP            (1 << TIF_SECCOMP)
 /* Checks for any syscall work in entry-common.S */
-#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT)
+#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SYSCALL_TRACEPOINT)
 /*
 * Change these and you break ASM code in entry-common.S
diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h
index 314d4664eae7..99a19512ee26 100644
--- a/arch/arm/include/asm/tlb.h
+++ b/arch/arm/include/asm/tlb.h
@@ -199,6 +199,9 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
 {
        pgtable_page_dtor(pte);
+#ifdef CONFIG_ARM_LPAE
+        tlb_add_flush(tlb, addr);
+#else
        /*
         * With the classic ARM MMU, a pte page has two corresponding pmd
         * entries, each covering 1MB.
@@ -206,6 +209,7 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
        addr &= PMD_MASK;
        tlb_add_flush(tlb, addr + SZ_1M - PAGE_SIZE);
        tlb_add_flush(tlb, addr + SZ_1M);
+#endif
        tlb_remove_page(tlb, pte);
 }
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index 479a6352e0b5..77bd79f2ffdb 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -101,28 +101,39 @@ extern int __get_user_1(void *);
 extern int __get_user_2(void *);
 extern int __get_user_4(void *);
-#define __get_user_x(__r2,__p,__e,__s,__i...)                           \
+#define __GUP_CLOBBER_1 "lr", "cc"
+#ifdef CONFIG_CPU_USE_DOMAINS
+#define __GUP_CLOBBER_2 "ip", "lr", "cc"
+#else
+#define __GUP_CLOBBER_2 "lr", "cc"
+#endif
+#define __GUP_CLOBBER_4 "lr", "cc"
+#define __get_user_x(__r2,__p,__e,__l,__s)                              \
           __asm__ __volatile__ (                                       \
                __asmeq("%0", "r0") __asmeq("%1", "r2")                 \
+                __asmeq("%3", "r1")                                     \
                "bl     __get_user_" #__s                               \
                : "=&r" (__e), "=r" (__r2)                              \
-                : "0" (__p)                                             \
+                : "0" (__p), "r" (__l)                                  \
-                : __i, "cc")
+                : __GUP_CLOBBER_##__s)
-#define get_user(x,p)                                                   \
+#define __get_user_check(x,p)                                                   \
        ({                                                              \
+                unsigned long __limit = current_thread_info()->addr_limit - 1; \
                register const typeof(*(p)) __user *__p asm("r0") = (p);\
                register unsigned long __r2 asm("r2");                  \
+                register unsigned long __l asm("r1") = __limit;         \
                register int __e asm("r0");                             \
                switch (sizeof(*(__p))) {                               \
                case 1:                                                 \
-                        __get_user_x(__r2, __p, __e, 1, "lr");          \
+                        __get_user_x(__r2, __p, __e, __l, 1);           \
-                        break;                                          \
+                        break;                                          \
                case 2:                                                 \
-                        __get_user_x(__r2, __p, __e, 2, "r3", "lr");    \
+                        __get_user_x(__r2, __p, __e, __l, 2);           \
                        break;                                          \
                case 4:                                                 \
-                        __get_user_x(__r2, __p, __e, 4, "lr");          \
+                        __get_user_x(__r2, __p, __e, __l, 4);           \
                        break;                                          \
                default: __e = __get_user_bad(); break;                 \
                }                                                       \
@@ -130,42 +141,57 @@ extern int __get_user_4(void *);
                __e;                                                    \
        })
+#define get_user(x,p)                                                   \
+        ({                                                              \
+                might_fault();                                          \
+                __get_user_check(x,p);                                  \
+         })
 extern int __put_user_1(void *, unsigned int);
 extern int __put_user_2(void *, unsigned int);
 extern int __put_user_4(void *, unsigned int);
 extern int __put_user_8(void *, unsigned long long);
-#define __put_user_x(__r2,__p,__e,__s)                                  \
+#define __put_user_x(__r2,__p,__e,__l,__s)                              \
           __asm__ __volatile__ (                                       \
                __asmeq("%0", "r0") __asmeq("%2", "r2")                 \
+                __asmeq("%3", "r1")                                     \
                "bl     __put_user_" #__s                               \
                : "=&r" (__e)                                           \
-                : "0" (__p), "r" (__r2)                                 \
+                : "0" (__p), "r" (__r2), "r" (__l)                      \
                : "ip", "lr", "cc")
-#define put_user(x,p)                                                   \
+#define __put_user_check(x,p)                                                   \
        ({                                                              \
+                unsigned long __limit = current_thread_info()->addr_limit - 1; \
                register const typeof(*(p)) __r2 asm("r2") = (x);       \
                register const typeof(*(p)) __user *__p asm("r0") = (p);\
+                register unsigned long __l asm("r1") = __limit;         \
                register int __e asm("r0");                             \
                switch (sizeof(*(__p))) {                               \
                case 1:                                                 \
-                        __put_user_x(__r2, __p, __e, 1);                \
+                        __put_user_x(__r2, __p, __e, __l, 1);           \
                        break;                                          \
                case 2:                                                 \
-                        __put_user_x(__r2, __p, __e, 2);                \
+                        __put_user_x(__r2, __p, __e, __l, 2);           \
                        break;                                          \
                case 4:                                                 \
-                        __put_user_x(__r2, __p, __e, 4);                \
+                        __put_user_x(__r2, __p, __e, __l, 4);           \
                        break;                                          \
                case 8:                                                 \
-                        __put_user_x(__r2, __p, __e, 8);                \
+                        __put_user_x(__r2, __p, __e, __l, 8);           \
                        break;                                          \
                default: __e = __put_user_bad(); break;                 \
                }                                                       \
                __e;                                                    \
        })
+#define put_user(x,p)                                                   \
+        ({                                                              \
+                might_fault();                                          \
+                __put_user_check(x,p);                                  \
+         })
 #else /* CONFIG_MMU */
 /*
@@ -219,6 +245,7 @@ do {									\
        unsigned long __gu_addr = (unsigned long)(ptr);                 \
        unsigned long __gu_val;                                         \
        __chk_user_ptr(ptr);                                            \
+        might_fault();                                                  \
        switch (sizeof(*(ptr))) {                                       \
        case 1: __get_user_asm_byte(__gu_val,__gu_addr,err);    break;  \
        case 2: __get_user_asm_half(__gu_val,__gu_addr,err);    break;  \
@@ -300,6 +327,7 @@ do {									\
        unsigned long __pu_addr = (unsigned long)(ptr);                 \
        __typeof__(*(ptr)) __pu_val = (x);                              \
        __chk_user_ptr(ptr);                                            \
+        might_fault();                                                  \
        switch (sizeof(*(ptr))) {                                       \
        case 1: __put_user_asm_byte(__pu_val,__pu_addr,err);    break;  \
        case 2: __put_user_asm_half(__pu_val,__pu_addr,err);    break;  \
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index 0cab47d4a83f..d9ff5cc3a506 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -404,6 +404,15 @@
 #define __NR_setns                      (__NR_SYSCALL_BASE+375)
 #define __NR_process_vm_readv           (__NR_SYSCALL_BASE+376)
 #define __NR_process_vm_writev          (__NR_SYSCALL_BASE+377)
+                                        /* 378 for kcmp */
+/*
+ * This may need to be greater than __NR_last_syscall+1 in order to
+ * account for the padding in the syscall table
+ */
+#ifdef __KERNEL__
+#define __NR_syscalls  (380)
+#endif /* __KERNEL__ */
 /*
 * The following SWIs are ARM private.
@@ -483,6 +492,7 @@
 */
 #define __IGNORE_fadvise64_64
 #define __IGNORE_migrate_pages
+#define __IGNORE_kcmp
 #endif /* __KERNEL__ */
 #endif /* __ASM_ARM_UNISTD_H */
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 7ad2d5cf7008..79e346a5d78b 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -19,7 +19,9 @@ obj-y		:= elf.o entry-armv.o entry-common.o irq.o opcodes.o \
                   process.o ptrace.o return_address.o sched_clock.o \
                   setup.o signal.o stacktrace.o sys_arm.o time.o traps.o
-obj-$(CONFIG_DEPRECATED_PARAM_STRUCT) += compat.o
+obj-$(CONFIG_ATAGS)             += atags_parse.o
+obj-$(CONFIG_ATAGS_PROC)        += atags_proc.o
+obj-$(CONFIG_DEPRECATED_PARAM_STRUCT) += atags_compat.o
 obj-$(CONFIG_LEDS)              += leds.o
 obj-$(CONFIG_OC_ETM)            += etm.o
@@ -52,7 +54,6 @@ test-kprobes-objs		+= kprobes-test-thumb.o
 else
 test-kprobes-objs               += kprobes-test-arm.o
 endif
-obj-$(CONFIG_ATAGS_PROC)        += atags.o
 obj-$(CONFIG_OABI_COMPAT)       += sys_oabi-compat.o
 obj-$(CONFIG_ARM_THUMBEE)       += thumbee.o
 obj-$(CONFIG_KGDB)              += kgdb.o
diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c
index 1429d8989fb9..c985b481192c 100644
--- a/arch/arm/kernel/asm-offsets.c
+++ b/arch/arm/kernel/asm-offsets.c
@@ -59,10 +59,12 @@ int main(void)
  DEFINE(TI_USED_CP,            offsetof(struct thread_info, used_cp));
  DEFINE(TI_TP_VALUE,           offsetof(struct thread_info, tp_value));
  DEFINE(TI_FPSTATE,            offsetof(struct thread_info, fpstate));
+#ifdef CONFIG_VFP
  DEFINE(TI_VFPSTATE,           offsetof(struct thread_info, vfpstate));
 #ifdef CONFIG_SMP
  DEFINE(VFP_CPU,               offsetof(union vfp_state, hard.cpu));
 #endif
+#endif
 #ifdef CONFIG_ARM_THUMBEE
  DEFINE(TI_THUMBEE_STATE,      offsetof(struct thread_info, thumbee_state));
 #endif
diff --git a/arch/arm/kernel/atags.h b/arch/arm/kernel/atags.h
index e5f028d214a1..9edc9692332d 100644
--- a/arch/arm/kernel/atags.h
+++ b/arch/arm/kernel/atags.h
@@ -3,3 +3,17 @@ extern void save_atags(struct tag *tags);
 #else
 static inline void save_atags(struct tag *tags) { }
 #endif
+void convert_to_tag_list(struct tag *tags);
+#ifdef CONFIG_ATAGS
+struct machine_desc *setup_machine_tags(phys_addr_t __atags_pointer, unsigned int machine_nr);
+#else
+static inline struct machine_desc *
+setup_machine_tags(phys_addr_t __atags_pointer, unsigned int machine_nr)
+{
+        early_print("no ATAGS support: can't continue\n");
+        while (true);
+        unreachable();
+}
+#endif
diff --git a/arch/arm/kernel/compat.c b/arch/arm/kernel/atags_compat.c
index 925652318b8b..5236ad38f417 100644
--- a/arch/arm/kernel/compat.c
+++ b/arch/arm/kernel/atags_compat.c
@@ -1,5 +1,5 @@
 /*
- *  linux/arch/arm/kernel/compat.c
+ *  linux/arch/arm/kernel/atags_compat.c
 *
 *  Copyright (C) 2001 Russell King
 *
@@ -26,7 +26,7 @@
 #include <asm/mach/arch.h>
-#include "compat.h"
+#include "atags.h"
 /*
 * Usage:
diff --git a/arch/arm/kernel/atags_parse.c b/arch/arm/kernel/atags_parse.c
new file mode 100644
index 000000000000..14512e6931d8
--- /dev/null
+++ b/arch/arm/kernel/atags_parse.c
@@ -0,0 +1,238 @@
+/*
+ * Tag parsing.
+ *
+ * Copyright (C) 1995-2001 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/*
+ * This is the traditional way of passing data to the kernel at boot time.  Rather
+ * than passing a fixed inflexible structure to the kernel, we pass a list
+ * of variable-sized tags to the kernel.  The first tag must be a ATAG_CORE
+ * tag for the list to be recognised (to distinguish the tagged list from
+ * a param_struct).  The list is terminated with a zero-length tag (this tag
+ * is not parsed in any way).
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/fs.h>
+#include <linux/root_dev.h>
+#include <linux/screen_info.h>
+#include <asm/setup.h>
+#include <asm/system_info.h>
+#include <asm/page.h>
+#include <asm/mach/arch.h>
+#include "atags.h"
+static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
+#ifndef MEM_SIZE
+#define MEM_SIZE        (16*1024*1024)
+#endif
+static struct {
+        struct tag_header hdr1;
+        struct tag_core   core;
+        struct tag_header hdr2;
+        struct tag_mem32  mem;
+        struct tag_header hdr3;
+} default_tags __initdata = {
+        { tag_size(tag_core), ATAG_CORE },
+        { 1, PAGE_SIZE, 0xff },
+        { tag_size(tag_mem32), ATAG_MEM },
+        { MEM_SIZE },
+        { 0, ATAG_NONE }
+};
+static int __init parse_tag_core(const struct tag *tag)
+{
+        if (tag->hdr.size > 2) {
+                if ((tag->u.core.flags & 1) == 0)
+                        root_mountflags &= ~MS_RDONLY;
+                ROOT_DEV = old_decode_dev(tag->u.core.rootdev);
+        }
+        return 0;
+}
+__tagtable(ATAG_CORE, parse_tag_core);
+static int __init parse_tag_mem32(const struct tag *tag)
+{
+        return arm_add_memory(tag->u.mem.start, tag->u.mem.size);
+}
+__tagtable(ATAG_MEM, parse_tag_mem32);
+#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
+static int __init parse_tag_videotext(const struct tag *tag)
+{
+        screen_info.orig_x            = tag->u.videotext.x;
+        screen_info.orig_y            = tag->u.videotext.y;
+        screen_info.orig_video_page   = tag->u.videotext.video_page;
+        screen_info.orig_video_mode   = tag->u.videotext.video_mode;
+        screen_info.orig_video_cols   = tag->u.videotext.video_cols;
+        screen_info.orig_video_ega_bx = tag->u.videotext.video_ega_bx;
+        screen_info.orig_video_lines  = tag->u.videotext.video_lines;
+        screen_info.orig_video_isVGA  = tag->u.videotext.video_isvga;
+        screen_info.orig_video_points = tag->u.videotext.video_points;
+        return 0;
+}
+__tagtable(ATAG_VIDEOTEXT, parse_tag_videotext);
+#endif
+#ifdef CONFIG_BLK_DEV_RAM
+static int __init parse_tag_ramdisk(const struct tag *tag)
+{
+        extern int rd_size, rd_image_start, rd_prompt, rd_doload;
+        rd_image_start = tag->u.ramdisk.start;
+        rd_doload = (tag->u.ramdisk.flags & 1) == 0;
+        rd_prompt = (tag->u.ramdisk.flags & 2) == 0;
+        if (tag->u.ramdisk.size)
+                rd_size = tag->u.ramdisk.size;
+        return 0;
+}
+__tagtable(ATAG_RAMDISK, parse_tag_ramdisk);
+#endif
+static int __init parse_tag_serialnr(const struct tag *tag)
+{
+        system_serial_low = tag->u.serialnr.low;
+        system_serial_high = tag->u.serialnr.high;
+        return 0;
+}
+__tagtable(ATAG_SERIAL, parse_tag_serialnr);
+static int __init parse_tag_revision(const struct tag *tag)
+{
+        system_rev = tag->u.revision.rev;
+        return 0;
+}
+__tagtable(ATAG_REVISION, parse_tag_revision);
+static int __init parse_tag_cmdline(const struct tag *tag)
+{
+#if defined(CONFIG_CMDLINE_EXTEND)
+        strlcat(default_command_line, " ", COMMAND_LINE_SIZE);
+        strlcat(default_command_line, tag->u.cmdline.cmdline,
+                COMMAND_LINE_SIZE);
+#elif defined(CONFIG_CMDLINE_FORCE)
+        pr_warning("Ignoring tag cmdline (using the default kernel command line)\n");
+#else
+        strlcpy(default_command_line, tag->u.cmdline.cmdline,
+                COMMAND_LINE_SIZE);
+#endif
+        return 0;
+}
+__tagtable(ATAG_CMDLINE, parse_tag_cmdline);
+/*
+ * Scan the tag table for this tag, and call its parse function.
+ * The tag table is built by the linker from all the __tagtable
+ * declarations.
+ */
+static int __init parse_tag(const struct tag *tag)
+{
+        extern struct tagtable __tagtable_begin, __tagtable_end;
+        struct tagtable *t;
+        for (t = &__tagtable_begin; t < &__tagtable_end; t++)
+                if (tag->hdr.tag == t->tag) {
+                        t->parse(tag);
+                        break;
+                }
+        return t < &__tagtable_end;
+}
+/*
+ * Parse all tags in the list, checking both the global and architecture
+ * specific tag tables.
+ */
+static void __init parse_tags(const struct tag *t)
+{
+        for (; t->hdr.size; t = tag_next(t))
+                if (!parse_tag(t))
+                        printk(KERN_WARNING
+                                "Ignoring unrecognised tag 0x%08x\n",
+                                t->hdr.tag);
+}
+static void __init squash_mem_tags(struct tag *tag)
+{
+        for (; tag->hdr.size; tag = tag_next(tag))
+                if (tag->hdr.tag == ATAG_MEM)
+                        tag->hdr.tag = ATAG_NONE;
+}
+struct machine_desc * __init setup_machine_tags(phys_addr_t __atags_pointer,
+                                                unsigned int machine_nr)
+{
+        struct tag *tags = (struct tag *)&default_tags;
+        struct machine_desc *mdesc = NULL, *p;
+        char *from = default_command_line;
+        default_tags.mem.start = PHYS_OFFSET;
+        /*
+         * locate machine in the list of supported machines.
+         */
+        for_each_machine_desc(p)
+                if (machine_nr == p->nr) {
+                        printk("Machine: %s\n", p->name);
+                        mdesc = p;
+                        break;
+                }
+        if (!mdesc) {
+                early_print("\nError: unrecognized/unsupported machine ID"
+                            " (r1 = 0x%08x).\n\n", machine_nr);
+                dump_machine_table(); /* does not return */
+        }
+        if (__atags_pointer)
+                tags = phys_to_virt(__atags_pointer);
+        else if (mdesc->atag_offset)
+                tags = (void *)(PAGE_OFFSET + mdesc->atag_offset);
+#if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
+        /*
+         * If we have the old style parameters, convert them to
+         * a tag list.
+         */
+        if (tags->hdr.tag != ATAG_CORE)
+                convert_to_tag_list(tags);
+#endif
+        if (tags->hdr.tag != ATAG_CORE) {
+                early_print("Warning: Neither atags nor dtb found\n");
+                tags = (struct tag *)&default_tags;
+        }
+        if (mdesc->fixup)
+                mdesc->fixup(tags, &from, &meminfo);
+        if (tags->hdr.tag == ATAG_CORE) {
+                if (meminfo.nr_banks != 0)
+                        squash_mem_tags(tags);
+                save_atags(tags);
+                parse_tags(tags);
+        }
+        /* parse_early_param needs a boot_command_line */
+        strlcpy(boot_command_line, from, COMMAND_LINE_SIZE);
+        return mdesc;
+}
diff --git a/arch/arm/kernel/atags.c b/arch/arm/kernel/atags_proc.c
index 42a1a1415fa6..42a1a1415fa6 100644
--- a/arch/arm/kernel/atags.c
+++ b/arch/arm/kernel/atags_proc.c
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 463ff4a0ec8a..e337879595e5 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -387,6 +387,7 @@
 /* 375 */       CALL(sys_setns)
                CALL(sys_process_vm_readv)
                CALL(sys_process_vm_writev)
+                CALL(sys_ni_syscall)    /* reserved for sys_kcmp */
 #ifndef syscalls_counted
 .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
 #define syscalls_counted
diff --git a/arch/arm/kernel/compat.h b/arch/arm/kernel/compat.h
deleted file mode 100644
index 39264ab1b9c6..000000000000
--- a/arch/arm/kernel/compat.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/*
- *  linux/arch/arm/kernel/compat.h
- *
- *  Copyright (C) 2001 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-extern void convert_to_tag_list(struct tag *tags);
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 978eac57e04a..f45987037bf1 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -94,6 +94,15 @@ ENDPROC(ret_from_fork)
        .equ NR_syscalls,0
 #define CALL(x) .equ NR_syscalls,NR_syscalls+1
 #include "calls.S"
+/*
+ * Ensure that the system call table is equal to __NR_syscalls,
+ * which is the value the rest of the system sees
+ */
+.ifne NR_syscalls - __NR_syscalls
+.error "__NR_syscalls is not equal to the size of the syscall table"
+.endif
 #undef CALL
 #define CALL(x) .long x
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index ba386bd94107..281bf3301241 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -159,6 +159,12 @@ static int debug_arch_supported(void)
                arch >= ARM_DEBUG_ARCH_V7_1;
 }
+/* Can we determine the watchpoint access type from the fsr? */
+static int debug_exception_updates_fsr(void)
+{
+        return 0;
+}
 /* Determine number of WRP registers available. */
 static int get_num_wrp_resources(void)
 {
@@ -604,13 +610,14 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp)
                /* Aligned */
                break;
        case 1:
-                /* Allow single byte watchpoint. */
-                if (info->ctrl.len == ARM_BREAKPOINT_LEN_1)
-                        break;
        case 2:
                /* Allow halfword watchpoints and breakpoints. */
                if (info->ctrl.len == ARM_BREAKPOINT_LEN_2)
                        break;
+        case 3:
+                /* Allow single byte watchpoint. */
+                if (info->ctrl.len == ARM_BREAKPOINT_LEN_1)
+                        break;
        default:
                ret = -EINVAL;
                goto out;
@@ -619,18 +626,35 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp)
        info->address &= ~alignment_mask;
        info->ctrl.len <<= offset;
-        /*
+        if (!bp->overflow_handler) {
-         * Currently we rely on an overflow handler to take
+                /*
-         * care of single-stepping the breakpoint when it fires.
+                 * Mismatch breakpoints are required for single-stepping
-         * In the case of userspace breakpoints on a core with V7 debug,
+                 * breakpoints.
-         * we can use the mismatch feature as a poor-man's hardware
+                 */
-         * single-step, but this only works for per-task breakpoints.
+                if (!core_has_mismatch_brps())
-         */
+                        return -EINVAL;
-        if (!bp->overflow_handler && (arch_check_bp_in_kernelspace(bp) ||
-            !core_has_mismatch_brps() || !bp->hw.bp_target)) {
+                /* We don't allow mismatch breakpoints in kernel space. */
-                pr_warning("overflow handler required but none found\n");
+                if (arch_check_bp_in_kernelspace(bp))
-                ret = -EINVAL;
+                        return -EPERM;
+                /*
+                 * Per-cpu breakpoints are not supported by our stepping
+                 * mechanism.
+                 */
+                if (!bp->hw.bp_target)
+                        return -EINVAL;
+                /*
+                 * We only support specific access types if the fsr
+                 * reports them.
+                 */
+                if (!debug_exception_updates_fsr() &&
+                    (info->ctrl.type == ARM_BREAKPOINT_LOAD ||
+                     info->ctrl.type == ARM_BREAKPOINT_STORE))
+                        return -EINVAL;
        }
 out:
        return ret;
 }
@@ -706,10 +730,12 @@ static void watchpoint_handler(unsigned long addr, unsigned int fsr,
                                goto unlock;
                        /* Check that the access type matches. */
-                        access = (fsr & ARM_FSR_ACCESS_MASK) ? HW_BREAKPOINT_W :
+                        if (debug_exception_updates_fsr()) {
-                                 HW_BREAKPOINT_R;
+                                access = (fsr & ARM_FSR_ACCESS_MASK) ?
-                        if (!(access & hw_breakpoint_type(wp)))
+                                          HW_BREAKPOINT_W : HW_BREAKPOINT_R;
-                                goto unlock;
+                                if (!(access & hw_breakpoint_type(wp)))
+                                        goto unlock;
+                        }
                        /* We have a winner. */
                        info->trigger = addr;
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 3e0fc5f7ed4b..739db3a1b2d2 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -30,6 +30,9 @@
 #include <asm/pgtable.h>
 #include <asm/traps.h>
+#define CREATE_TRACE_POINTS
+#include <trace/events/syscalls.h>
 #define REG_PC  15
 #define REG_PSR 16
 /*
@@ -918,11 +921,11 @@ static int ptrace_syscall_trace(struct pt_regs *regs, int scno,
 {
        unsigned long ip;
+        current_thread_info()->syscall = scno;
        if (!test_thread_flag(TIF_SYSCALL_TRACE))
                return scno;
-        current_thread_info()->syscall = scno;
        /*
         * IP is used to denote syscall entry/exit:
         * IP = 0 -> entry, =1 -> exit
@@ -941,15 +944,19 @@ static int ptrace_syscall_trace(struct pt_regs *regs, int scno,
 asmlinkage int syscall_trace_enter(struct pt_regs *regs, int scno)
 {
-        int ret = ptrace_syscall_trace(regs, scno, PTRACE_SYSCALL_ENTER);
+        scno = ptrace_syscall_trace(regs, scno, PTRACE_SYSCALL_ENTER);
+        if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
+                trace_sys_enter(regs, scno);
        audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs->ARM_r0, regs->ARM_r1,
                            regs->ARM_r2, regs->ARM_r3);
-        return ret;
+        return scno;
 }
 asmlinkage int syscall_trace_exit(struct pt_regs *regs, int scno)
 {
-        int ret = ptrace_syscall_trace(regs, scno, PTRACE_SYSCALL_EXIT);
+        scno = ptrace_syscall_trace(regs, scno, PTRACE_SYSCALL_EXIT);
+        if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
+                trace_sys_exit(regs, scno);
        audit_syscall_exit(regs);
-        return ret;
+        return scno;
 }
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index 9b8451a4330f..e21bac20d90d 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -22,6 +22,8 @@ struct clock_data {
        u32 epoch_cyc_copy;
        u32 mult;
        u32 shift;
+        bool suspended;
+        bool needs_suspend;
 };
 static void sched_clock_poll(unsigned long wrap_ticks);
@@ -53,6 +55,9 @@ static unsigned long long cyc_to_sched_clock(u32 cyc, u32 mask)
        u64 epoch_ns;
        u32 epoch_cyc;
+        if (cd.suspended)
+                return cd.epoch_ns;
        /*
         * Load the epoch_cyc and epoch_ns atomically.  We do this by
         * ensuring that we always write epoch_cyc, epoch_ns and
@@ -102,6 +107,13 @@ static void sched_clock_poll(unsigned long wrap_ticks)
        update_sched_clock();
 }
+void __init setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
+                unsigned long rate)
+{
+        setup_sched_clock(read, bits, rate);
+        cd.needs_suspend = true;
+}
 void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
 {
        unsigned long r, w;
@@ -177,11 +189,23 @@ void __init sched_clock_postinit(void)
 static int sched_clock_suspend(void)
 {
        sched_clock_poll(sched_clock_timer.data);
+        if (cd.needs_suspend)
+                cd.suspended = true;
        return 0;
 }
+static void sched_clock_resume(void)
+{
+        if (cd.needs_suspend) {
+                cd.epoch_cyc = read_sched_clock();
+                cd.epoch_cyc_copy = cd.epoch_cyc;
+                cd.suspended = false;
+        }
+}
 static struct syscore_ops sched_clock_ops = {
        .suspend = sched_clock_suspend,
+        .resume = sched_clock_resume,
 };
 static int __init sched_clock_syscore_init(void)
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index a81dcecc7343..0785472460a8 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -21,11 +21,9 @@
 #include <linux/init.h>
 #include <linux/kexec.h>
 #include <linux/of_fdt.h>
-#include <linux/root_dev.h>
 #include <linux/cpu.h>
 #include <linux/interrupt.h>
 #include <linux/smp.h>
-#include <linux/fs.h>
 #include <linux/proc_fs.h>
 #include <linux/memblock.h>
 #include <linux/bug.h>
@@ -56,15 +54,9 @@
 #include <asm/unwind.h>
 #include <asm/memblock.h>
-#if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
-#include "compat.h"
-#endif
 #include "atags.h"
 #include "tcm.h"
-#ifndef MEM_SIZE
-#define MEM_SIZE        (16*1024*1024)
-#endif
 #if defined(CONFIG_FPE_NWFPE) || defined(CONFIG_FPE_FASTFPE)
 char fpe_type[8];
@@ -145,7 +137,6 @@ static const char *machine_name;
 static char __initdata cmd_line[COMMAND_LINE_SIZE];
 struct machine_desc *machine_desc __initdata;
-static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
 static union { char c[4]; unsigned long l; } endian_test __initdata = { { 'l', '?', '?', 'b' } };
 #define ENDIANNESS ((char)endian_test.l)
@@ -583,21 +574,6 @@ static int __init early_mem(char *p)
 }
 early_param("mem", early_mem);
-static void __init
-setup_ramdisk(int doload, int prompt, int image_start, unsigned int rd_sz)
-{
-#ifdef CONFIG_BLK_DEV_RAM
-        extern int rd_size, rd_image_start, rd_prompt, rd_doload;
-        rd_image_start = image_start;
-        rd_prompt = prompt;
-        rd_doload = doload;
-        if (rd_sz)
-                rd_size = rd_sz;
-#endif
-}
 static void __init request_standard_resources(struct machine_desc *mdesc)
 {
        struct memblock_region *region;
@@ -643,35 +619,6 @@ static void __init request_standard_resources(struct machine_desc *mdesc)
                request_resource(&ioport_resource, &lp2);
 }
-/*
- *  Tag parsing.
- *
- * This is the new way of passing data to the kernel at boot time.  Rather
- * than passing a fixed inflexible structure to the kernel, we pass a list
- * of variable-sized tags to the kernel.  The first tag must be a ATAG_CORE
- * tag for the list to be recognised (to distinguish the tagged list from
- * a param_struct).  The list is terminated with a zero-length tag (this tag
- * is not parsed in any way).
- */
-static int __init parse_tag_core(const struct tag *tag)
-{
-        if (tag->hdr.size > 2) {
-                if ((tag->u.core.flags & 1) == 0)
-                        root_mountflags &= ~MS_RDONLY;
-                ROOT_DEV = old_decode_dev(tag->u.core.rootdev);
-        }
-        return 0;
-}
-__tagtable(ATAG_CORE, parse_tag_core);
-static int __init parse_tag_mem32(const struct tag *tag)
-{
-        return arm_add_memory(tag->u.mem.start, tag->u.mem.size);
-}
-__tagtable(ATAG_MEM, parse_tag_mem32);
 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
 struct screen_info screen_info = {
 .orig_video_lines      = 30,
@@ -681,117 +628,8 @@ struct screen_info screen_info = {
 .orig_video_isVGA      = 1,
 .orig_video_points     = 8
 };
-static int __init parse_tag_videotext(const struct tag *tag)
-{
-        screen_info.orig_x            = tag->u.videotext.x;
-        screen_info.orig_y            = tag->u.videotext.y;
-        screen_info.orig_video_page   = tag->u.videotext.video_page;
-        screen_info.orig_video_mode   = tag->u.videotext.video_mode;
-        screen_info.orig_video_cols   = tag->u.videotext.video_cols;
-        screen_info.orig_video_ega_bx = tag->u.videotext.video_ega_bx;
-        screen_info.orig_video_lines  = tag->u.videotext.video_lines;
-        screen_info.orig_video_isVGA  = tag->u.videotext.video_isvga;
-        screen_info.orig_video_points = tag->u.videotext.video_points;
-        return 0;
-}
-__tagtable(ATAG_VIDEOTEXT, parse_tag_videotext);
 #endif
-static int __init parse_tag_ramdisk(const struct tag *tag)
-{
-        setup_ramdisk((tag->u.ramdisk.flags & 1) == 0,
-                      (tag->u.ramdisk.flags & 2) == 0,
-                      tag->u.ramdisk.start, tag->u.ramdisk.size);
-        return 0;
-}
-__tagtable(ATAG_RAMDISK, parse_tag_ramdisk);
-static int __init parse_tag_serialnr(const struct tag *tag)
-{
-        system_serial_low = tag->u.serialnr.low;
-        system_serial_high = tag->u.serialnr.high;
-        return 0;
-}
-__tagtable(ATAG_SERIAL, parse_tag_serialnr);
-static int __init parse_tag_revision(const struct tag *tag)
-{
-        system_rev = tag->u.revision.rev;
-        return 0;
-}
-__tagtable(ATAG_REVISION, parse_tag_revision);
-static int __init parse_tag_cmdline(const struct tag *tag)
-{
-#if defined(CONFIG_CMDLINE_EXTEND)
-        strlcat(default_command_line, " ", COMMAND_LINE_SIZE);
-        strlcat(default_command_line, tag->u.cmdline.cmdline,
-                COMMAND_LINE_SIZE);
-#elif defined(CONFIG_CMDLINE_FORCE)
-        pr_warning("Ignoring tag cmdline (using the default kernel command line)\n");
-#else
-        strlcpy(default_command_line, tag->u.cmdline.cmdline,
-                COMMAND_LINE_SIZE);
-#endif
-        return 0;
-}
-__tagtable(ATAG_CMDLINE, parse_tag_cmdline);
-/*
- * Scan the tag table for this tag, and call its parse function.
- * The tag table is built by the linker from all the __tagtable
- * declarations.
- */
-static int __init parse_tag(const struct tag *tag)
-{
-        extern struct tagtable __tagtable_begin, __tagtable_end;
-        struct tagtable *t;
-        for (t = &__tagtable_begin; t < &__tagtable_end; t++)
-                if (tag->hdr.tag == t->tag) {
-                        t->parse(tag);
-                        break;
-                }
-        return t < &__tagtable_end;
-}
-/*
- * Parse all tags in the list, checking both the global and architecture
- * specific tag tables.
- */
-static void __init parse_tags(const struct tag *t)
-{
-        for (; t->hdr.size; t = tag_next(t))
-                if (!parse_tag(t))
-                        printk(KERN_WARNING
-                                "Ignoring unrecognised tag 0x%08x\n",
-                                t->hdr.tag);
-}
-/*
- * This holds our defaults.
- */
-static struct init_tags {
-        struct tag_header hdr1;
-        struct tag_core   core;
-        struct tag_header hdr2;
-        struct tag_mem32  mem;
-        struct tag_header hdr3;
-} init_tags __initdata = {
-        { tag_size(tag_core), ATAG_CORE },
-        { 1, PAGE_SIZE, 0xff },
-        { tag_size(tag_mem32), ATAG_MEM },
-        { MEM_SIZE },
-        { 0, ATAG_NONE }
-};
 static int __init customize_machine(void)
 {
        /* customizes platform devices, or adds new ones */
@@ -858,78 +696,6 @@ static void __init reserve_crashkernel(void)
 static inline void reserve_crashkernel(void) {}
 #endif /* CONFIG_KEXEC */
-static void __init squash_mem_tags(struct tag *tag)
-{
-        for (; tag->hdr.size; tag = tag_next(tag))
-                if (tag->hdr.tag == ATAG_MEM)
-                        tag->hdr.tag = ATAG_NONE;
-}
-static struct machine_desc * __init setup_machine_tags(unsigned int nr)
-{
-        struct tag *tags = (struct tag *)&init_tags;
-        struct machine_desc *mdesc = NULL, *p;
-        char *from = default_command_line;
-        init_tags.mem.start = PHYS_OFFSET;
-        /*
-         * locate machine in the list of supported machines.
-         */
-        for_each_machine_desc(p)
-                if (nr == p->nr) {
-                        printk("Machine: %s\n", p->name);
-                        mdesc = p;
-                        break;
-                }
-        if (!mdesc) {
-                early_print("\nError: unrecognized/unsupported machine ID"
-                        " (r1 = 0x%08x).\n\n", nr);
-                dump_machine_table(); /* does not return */
-        }
-        if (__atags_pointer)
-                tags = phys_to_virt(__atags_pointer);
-        else if (mdesc->atag_offset)
-                tags = (void *)(PAGE_OFFSET + mdesc->atag_offset);
-#if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
-        /*
-         * If we have the old style parameters, convert them to
-         * a tag list.
-         */
-        if (tags->hdr.tag != ATAG_CORE)
-                convert_to_tag_list(tags);
-#endif
-        if (tags->hdr.tag != ATAG_CORE) {
-#if defined(CONFIG_OF)
-                /*
-                 * If CONFIG_OF is set, then assume this is a reasonably
-                 * modern system that should pass boot parameters
-                 */
-                early_print("Warning: Neither atags nor dtb found\n");
-#endif
-                tags = (struct tag *)&init_tags;
-        }
-        if (mdesc->fixup)
-                mdesc->fixup(tags, &from, &meminfo);
-        if (tags->hdr.tag == ATAG_CORE) {
-                if (meminfo.nr_banks != 0)
-                        squash_mem_tags(tags);
-                save_atags(tags);
-                parse_tags(tags);
-        }
-        /* parse_early_param needs a boot_command_line */
-        strlcpy(boot_command_line, from, COMMAND_LINE_SIZE);
-        return mdesc;
-}
 static int __init meminfo_cmp(const void *_a, const void *_b)
 {
        const struct membank *a = _a, *b = _b;
@@ -944,7 +710,7 @@ void __init setup_arch(char **cmdline_p)
        setup_processor();
        mdesc = setup_machine_fdt(__atags_pointer);
        if (!mdesc)
-                mdesc = setup_machine_tags(machine_arch_type);
+                mdesc = setup_machine_tags(__atags_pointer, machine_arch_type);
        machine_desc = mdesc;
        machine_name = mdesc->name;
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index fef42b21cecb..e1f906989bb8 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -11,7 +11,6 @@
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/clk.h>
-#include <linux/cpufreq.h>
 #include <linux/delay.h>
 #include <linux/device.h>
 #include <linux/err.h>
@@ -96,7 +95,52 @@ static void twd_timer_stop(struct clock_event_device *clk)
        disable_percpu_irq(clk->irq);
 }
-#ifdef CONFIG_CPU_FREQ
+#ifdef CONFIG_COMMON_CLK
+/*
+ * Updates clockevent frequency when the cpu frequency changes.
+ * Called on the cpu that is changing frequency with interrupts disabled.
+ */
+static void twd_update_frequency(void *new_rate)
+{
+        twd_timer_rate = *((unsigned long *) new_rate);
+        clockevents_update_freq(*__this_cpu_ptr(twd_evt), twd_timer_rate);
+}
+static int twd_rate_change(struct notifier_block *nb,
+        unsigned long flags, void *data)
+{
+        struct clk_notifier_data *cnd = data;
+        /*
+         * The twd clock events must be reprogrammed to account for the new
+         * frequency.  The timer is local to a cpu, so cross-call to the
+         * changing cpu.
+         */
+        if (flags == POST_RATE_CHANGE)
+                smp_call_function(twd_update_frequency,
+                                  (void *)&cnd->new_rate, 1);
+        return NOTIFY_OK;
+}
+static struct notifier_block twd_clk_nb = {
+        .notifier_call = twd_rate_change,
+};
+static int twd_clk_init(void)
+{
+        if (twd_evt && *__this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
+                return clk_notifier_register(twd_clk, &twd_clk_nb);
+        return 0;
+}
+core_initcall(twd_clk_init);
+#elif defined (CONFIG_CPU_FREQ)
+#include <linux/cpufreq.h>
 /*
 * Updates clockevent frequency when the cpu frequency changes.
diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c
index 198b08456e90..26c12c6440fc 100644
--- a/arch/arm/kernel/topology.c
+++ b/arch/arm/kernel/topology.c
@@ -321,7 +321,7 @@ void store_cpu_topology(unsigned int cpuid)
 * init_cpu_topology is called at boot when only one cpu is running
 * which prevent simultaneous write access to cpu_topology array
 */
-void init_cpu_topology(void)
+void __init init_cpu_topology(void)
 {
        unsigned int cpu;
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index f7945218b8c6..b0179b89a04c 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -420,20 +420,23 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
 #endif
                        instr = *(u32 *) pc;
        } else if (thumb_mode(regs)) {
-                get_user(instr, (u16 __user *)pc);
+                if (get_user(instr, (u16 __user *)pc))
+                        goto die_sig;
                if (is_wide_instruction(instr)) {
                        unsigned int instr2;
-                        get_user(instr2, (u16 __user *)pc+1);
+                        if (get_user(instr2, (u16 __user *)pc+1))
+                                goto die_sig;
                        instr <<= 16;
                        instr |= instr2;
                }
-        } else {
+        } else if (get_user(instr, (u32 __user *)pc)) {
-                get_user(instr, (u32 __user *)pc);
+                goto die_sig;
        }
        if (call_undef_hook(regs, instr) == 0)
                return;
+die_sig:
 #ifdef CONFIG_DEBUG_USER
        if (user_debug & UDBG_UNDEFINED) {
                printk(KERN_INFO "%s (%d): undefined instruction: pc=%p\n",
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 2473fd1fd51c..af72969820b4 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -16,13 +16,30 @@ lib-y		:= backtrace.o changebit.o csumipv6.o csumpartial.o   \
                   call_with_stack.o
 mmu-y   := clear_user.o copy_page.o getuser.o putuser.o
-mmu-y   += copy_from_user.o copy_to_user.o
+# the code in uaccess.S is not preemption safe and
+# probably faster on ARMv3 only
+ifeq ($(CONFIG_PREEMPT),y)
+  mmu-y += copy_from_user.o copy_to_user.o
+else
+ifneq ($(CONFIG_CPU_32v3),y)
+  mmu-y += copy_from_user.o copy_to_user.o
+else
+  mmu-y += uaccess.o
+endif
+endif
 # using lib_ here won't override already available weak symbols
 obj-$(CONFIG_UACCESS_WITH_MEMCPY) += uaccess_with_memcpy.o
-lib-$(CONFIG_MMU)               += $(mmu-y)
+lib-$(CONFIG_MMU) += $(mmu-y)
-lib-y                           += io-readsw-armv4.o io-writesw-armv4.o
+ifeq ($(CONFIG_CPU_32v3),y)
+  lib-y += io-readsw-armv3.o io-writesw-armv3.o
+else
+  lib-y += io-readsw-armv4.o io-writesw-armv4.o
+endif
 lib-$(CONFIG_ARCH_RPC)          += ecard.o io-acorn.o floppydma.o
 lib-$(CONFIG_ARCH_SHARK)        += io-shark.o
diff --git a/arch/arm/lib/delay.c b/arch/arm/lib/delay.c
index d6dacc69254e..395d5fbb8fa2 100644
--- a/arch/arm/lib/delay.c
+++ b/arch/arm/lib/delay.c
@@ -59,6 +59,7 @@ void __init init_current_timer_delay(unsigned long freq)
 {
        pr_info("Switching to timer-based delay loop\n");
        lpj_fine                        = freq / HZ;
+        loops_per_jiffy                 = lpj_fine;
        arm_delay_ops.delay             = __timer_delay;
        arm_delay_ops.const_udelay      = __timer_const_udelay;
        arm_delay_ops.udelay            = __timer_udelay;
diff --git a/arch/arm/lib/getuser.S b/arch/arm/lib/getuser.S
index 11093a7c3e32..9b06bb41fca6 100644
--- a/arch/arm/lib/getuser.S
+++ b/arch/arm/lib/getuser.S
@@ -16,8 +16,9 @@
 * __get_user_X
 *
 * Inputs:      r0 contains the address
+ *              r1 contains the address limit, which must be preserved
 * Outputs:     r0 is the error code
- *              r2, r3 contains the zero-extended value
+ *              r2 contains the zero-extended value
 *              lr corrupted
 *
 * No other registers must be altered.  (see <asm/uaccess.h>
@@ -27,33 +28,39 @@
 * Note also that it is intended that __get_user_bad is not global.
 */
 #include <linux/linkage.h>
+#include <asm/assembler.h>
 #include <asm/errno.h>
 #include <asm/domain.h>
 ENTRY(__get_user_1)
+        check_uaccess r0, 1, r1, r2, __get_user_bad
 1: TUSER(ldrb)  r2, [r0]
        mov     r0, #0
        mov     pc, lr
 ENDPROC(__get_user_1)
 ENTRY(__get_user_2)
-#ifdef CONFIG_THUMB2_KERNEL
+        check_uaccess r0, 2, r1, r2, __get_user_bad
-2: TUSER(ldrb)  r2, [r0]
+#ifdef CONFIG_CPU_USE_DOMAINS
-3: TUSER(ldrb)  r3, [r0, #1]
+rb      .req    ip
+2:      ldrbt   r2, [r0], #1
+3:      ldrbt   rb, [r0], #0
 #else
-2: TUSER(ldrb)  r2, [r0], #1
+rb      .req    r0
-3: TUSER(ldrb)  r3, [r0]
+2:      ldrb    r2, [r0]
+3:      ldrb    rb, [r0, #1]
 #endif
 #ifndef __ARMEB__
-        orr     r2, r2, r3, lsl #8
+        orr     r2, r2, rb, lsl #8
 #else
-        orr     r2, r3, r2, lsl #8
+        orr     r2, rb, r2, lsl #8
 #endif
        mov     r0, #0
        mov     pc, lr
 ENDPROC(__get_user_2)
 ENTRY(__get_user_4)
+        check_uaccess r0, 4, r1, r2, __get_user_bad
 4: TUSER(ldr)   r2, [r0]
        mov     r0, #0
        mov     pc, lr
diff --git a/arch/arm/lib/io-readsw-armv3.S b/arch/arm/lib/io-readsw-armv3.S
new file mode 100644
index 000000000000..88487c8c4f23
--- /dev/null
+++ b/arch/arm/lib/io-readsw-armv3.S
@@ -0,0 +1,106 @@
+/*
+ *  linux/arch/arm/lib/io-readsw-armv3.S
+ *
+ *  Copyright (C) 1995-2000 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+.Linsw_bad_alignment:
+                adr     r0, .Linsw_bad_align_msg
+                mov     r2, lr
+                b       panic
+.Linsw_bad_align_msg:
+                .asciz  "insw: bad buffer alignment (0x%p, lr=0x%08lX)\n"
+                .align
+.Linsw_align:   tst     r1, #1
+                bne     .Linsw_bad_alignment
+                ldr     r3, [r0]
+                strb    r3, [r1], #1
+                mov     r3, r3, lsr #8
+                strb    r3, [r1], #1
+                subs    r2, r2, #1
+                moveq   pc, lr
+ENTRY(__raw_readsw)
+                teq     r2, #0          @ do we have to check for the zero len?
+                moveq   pc, lr
+                tst     r1, #3
+                bne     .Linsw_align
+.Linsw_aligned: mov     ip, #0xff
+                orr     ip, ip, ip, lsl #8
+                stmfd   sp!, {r4, r5, r6, lr}
+                subs    r2, r2, #8
+                bmi     .Lno_insw_8
+.Linsw_8_lp:    ldr     r3, [r0]
+                and     r3, r3, ip
+                ldr     r4, [r0]
+                orr     r3, r3, r4, lsl #16
+                ldr     r4, [r0]
+                and     r4, r4, ip
+                ldr     r5, [r0]
+                orr     r4, r4, r5, lsl #16
+                ldr     r5, [r0]
+                and     r5, r5, ip
+                ldr     r6, [r0]
+                orr     r5, r5, r6, lsl #16
+                ldr     r6, [r0]
+                and     r6, r6, ip
+                ldr     lr, [r0]
+                orr     r6, r6, lr, lsl #16
+                stmia   r1!, {r3 - r6}
+                subs    r2, r2, #8
+                bpl     .Linsw_8_lp
+                tst     r2, #7
+                ldmeqfd sp!, {r4, r5, r6, pc}
+.Lno_insw_8:    tst     r2, #4
+                beq     .Lno_insw_4
+                ldr     r3, [r0]
+                and     r3, r3, ip
+                ldr     r4, [r0]
+                orr     r3, r3, r4, lsl #16
+                ldr     r4, [r0]
+                and     r4, r4, ip
+                ldr     r5, [r0]
+                orr     r4, r4, r5, lsl #16
+                stmia   r1!, {r3, r4}
+.Lno_insw_4:    tst     r2, #2
+                beq     .Lno_insw_2
+                ldr     r3, [r0]
+                and     r3, r3, ip
+                ldr     r4, [r0]
+                orr     r3, r3, r4, lsl #16
+                str     r3, [r1], #4
+.Lno_insw_2:    tst     r2, #1
+                ldrne   r3, [r0]
+                strneb  r3, [r1], #1
+                movne   r3, r3, lsr #8
+                strneb  r3, [r1]
+                ldmfd   sp!, {r4, r5, r6, pc}
diff --git a/arch/arm/lib/io-writesw-armv3.S b/arch/arm/lib/io-writesw-armv3.S
new file mode 100644
index 000000000000..49b800419e32
--- /dev/null
+++ b/arch/arm/lib/io-writesw-armv3.S
@@ -0,0 +1,126 @@
+/*
+ *  linux/arch/arm/lib/io-writesw-armv3.S
+ *
+ *  Copyright (C) 1995-2000 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+.Loutsw_bad_alignment:
+                adr     r0, .Loutsw_bad_align_msg
+                mov     r2, lr
+                b       panic
+.Loutsw_bad_align_msg:
+                .asciz  "outsw: bad buffer alignment (0x%p, lr=0x%08lX)\n"
+                .align
+.Loutsw_align:  tst     r1, #1
+                bne     .Loutsw_bad_alignment
+                add     r1, r1, #2
+                ldr     r3, [r1, #-4]
+                mov     r3, r3, lsr #16
+                orr     r3, r3, r3, lsl #16
+                str     r3, [r0]
+                subs    r2, r2, #1
+                moveq   pc, lr
+ENTRY(__raw_writesw)
+                teq     r2, #0          @ do we have to check for the zero len?
+                moveq   pc, lr
+                tst     r1, #3
+                bne     .Loutsw_align
+                stmfd   sp!, {r4, r5, r6, lr}
+                subs    r2, r2, #8
+                bmi     .Lno_outsw_8
+.Loutsw_8_lp:   ldmia   r1!, {r3, r4, r5, r6}
+                mov     ip, r3, lsl #16
+                orr     ip, ip, ip, lsr #16
+                str     ip, [r0]
+                mov     ip, r3, lsr #16
+                orr     ip, ip, ip, lsl #16
+                str     ip, [r0]
+                mov     ip, r4, lsl #16
+                orr     ip, ip, ip, lsr #16
+                str     ip, [r0]
+                mov     ip, r4, lsr #16
+                orr     ip, ip, ip, lsl #16
+                str     ip, [r0]
+                mov     ip, r5, lsl #16
+                orr     ip, ip, ip, lsr #16
+                str     ip, [r0]
+                mov     ip, r5, lsr #16
+                orr     ip, ip, ip, lsl #16
+                str     ip, [r0]
+                mov     ip, r6, lsl #16
+                orr     ip, ip, ip, lsr #16
+                str     ip, [r0]
+                mov     ip, r6, lsr #16
+                orr     ip, ip, ip, lsl #16
+                str     ip, [r0]
+                subs    r2, r2, #8
+                bpl     .Loutsw_8_lp
+                tst     r2, #7
+                ldmeqfd sp!, {r4, r5, r6, pc}
+.Lno_outsw_8:   tst     r2, #4
+                beq     .Lno_outsw_4
+                ldmia   r1!, {r3, r4}
+                mov     ip, r3, lsl #16
+                orr     ip, ip, ip, lsr #16
+                str     ip, [r0]
+                mov     ip, r3, lsr #16
+                orr     ip, ip, ip, lsl #16
+                str     ip, [r0]
+                mov     ip, r4, lsl #16
+                orr     ip, ip, ip, lsr #16
+                str     ip, [r0]
+                mov     ip, r4, lsr #16
+                orr     ip, ip, ip, lsl #16
+                str     ip, [r0]
+.Lno_outsw_4:   tst     r2, #2
+                beq     .Lno_outsw_2
+                ldr     r3, [r1], #4
+                mov     ip, r3, lsl #16
+                orr     ip, ip, ip, lsr #16
+                str     ip, [r0]
+                mov     ip, r3, lsr #16
+                orr     ip, ip, ip, lsl #16
+                str     ip, [r0]
+.Lno_outsw_2:   tst     r2, #1
+                ldrne   r3, [r1]
+                movne   ip, r3, lsl #16
+                orrne   ip, ip, ip, lsr #16
+                strne   ip, [r0]
+                ldmfd   sp!, {r4, r5, r6, pc}
diff --git a/arch/arm/lib/putuser.S b/arch/arm/lib/putuser.S
index 7db25990c589..3d73dcb959b0 100644
--- a/arch/arm/lib/putuser.S
+++ b/arch/arm/lib/putuser.S
@@ -16,6 +16,7 @@
 * __put_user_X
 *
 * Inputs:      r0 contains the address
+ *              r1 contains the address limit, which must be preserved
 *              r2, r3 contains the value
 * Outputs:     r0 is the error code
 *              lr corrupted
@@ -27,16 +28,19 @@
 * Note also that it is intended that __put_user_bad is not global.
 */
 #include <linux/linkage.h>
+#include <asm/assembler.h>
 #include <asm/errno.h>
 #include <asm/domain.h>
 ENTRY(__put_user_1)
+        check_uaccess r0, 1, r1, ip, __put_user_bad
 1: TUSER(strb)  r2, [r0]
        mov     r0, #0
        mov     pc, lr
 ENDPROC(__put_user_1)
 ENTRY(__put_user_2)
+        check_uaccess r0, 2, r1, ip, __put_user_bad
        mov     ip, r2, lsr #8
 #ifdef CONFIG_THUMB2_KERNEL
 #ifndef __ARMEB__
@@ -60,12 +64,14 @@ ENTRY(__put_user_2)
 ENDPROC(__put_user_2)
 ENTRY(__put_user_4)
+        check_uaccess r0, 4, r1, ip, __put_user_bad
 4: TUSER(str)   r2, [r0]
        mov     r0, #0
        mov     pc, lr
 ENDPROC(__put_user_4)
 ENTRY(__put_user_8)
+        check_uaccess r0, 8, r1, ip, __put_user_bad
 #ifdef CONFIG_THUMB2_KERNEL
 5: TUSER(str)   r2, [r0]
 6: TUSER(str)   r3, [r0, #4]
diff --git a/arch/arm/lib/uaccess.S b/arch/arm/lib/uaccess.S
new file mode 100644
index 000000000000..5c908b1cb8ed
--- /dev/null
+++ b/arch/arm/lib/uaccess.S
@@ -0,0 +1,564 @@
+/*
+ *  linux/arch/arm/lib/uaccess.S
+ *
+ *  Copyright (C) 1995, 1996,1997,1998 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Routines to block copy data to/from user memory
+ *   These are highly optimised both for the 4k page size
+ *   and for various alignments.
+ */
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include <asm/errno.h>
+#include <asm/domain.h>
+                .text
+#define PAGE_SHIFT 12
+/* Prototype: int __copy_to_user(void *to, const char *from, size_t n)
+ * Purpose  : copy a block to user memory from kernel memory
+ * Params   : to   - user memory
+ *          : from - kernel memory
+ *          : n    - number of bytes to copy
+ * Returns  : Number of bytes NOT copied.
+ */
+.Lc2u_dest_not_aligned:
+                rsb     ip, ip, #4
+                cmp     ip, #2
+                ldrb    r3, [r1], #1
+USER(   TUSER(  strb)   r3, [r0], #1)                   @ May fault
+                ldrgeb  r3, [r1], #1
+USER(   TUSER(  strgeb) r3, [r0], #1)                   @ May fault
+                ldrgtb  r3, [r1], #1
+USER(   TUSER(  strgtb) r3, [r0], #1)                   @ May fault
+                sub     r2, r2, ip
+                b       .Lc2u_dest_aligned
+ENTRY(__copy_to_user)
+                stmfd   sp!, {r2, r4 - r7, lr}
+                cmp     r2, #4
+                blt     .Lc2u_not_enough
+                ands    ip, r0, #3
+                bne     .Lc2u_dest_not_aligned
+.Lc2u_dest_aligned:
+                ands    ip, r1, #3
+                bne     .Lc2u_src_not_aligned
+/*
+ * Seeing as there has to be at least 8 bytes to copy, we can
+ * copy one word, and force a user-mode page fault...
+ */
+.Lc2u_0fupi:    subs    r2, r2, #4
+                addmi   ip, r2, #4
+                bmi     .Lc2u_0nowords
+                ldr     r3, [r1], #4
+USER(   TUSER(  str)    r3, [r0], #4)                   @ May fault
+                mov     ip, r0, lsl #32 - PAGE_SHIFT    @ On each page, use a ld/st??t instruction
+                rsb     ip, ip, #0
+                movs    ip, ip, lsr #32 - PAGE_SHIFT
+                beq     .Lc2u_0fupi
+/*
+ * ip = max no. of bytes to copy before needing another "strt" insn
+ */
+                cmp     r2, ip
+                movlt   ip, r2
+                sub     r2, r2, ip
+                subs    ip, ip, #32
+                blt     .Lc2u_0rem8lp
+.Lc2u_0cpy8lp:  ldmia   r1!, {r3 - r6}
+                stmia   r0!, {r3 - r6}                  @ Shouldnt fault
+                ldmia   r1!, {r3 - r6}
+                subs    ip, ip, #32
+                stmia   r0!, {r3 - r6}                  @ Shouldnt fault
+                bpl     .Lc2u_0cpy8lp
+.Lc2u_0rem8lp:  cmn     ip, #16
+                ldmgeia r1!, {r3 - r6}
+                stmgeia r0!, {r3 - r6}                  @ Shouldnt fault
+                tst     ip, #8
+                ldmneia r1!, {r3 - r4}
+                stmneia r0!, {r3 - r4}                  @ Shouldnt fault
+                tst     ip, #4
+                ldrne   r3, [r1], #4
+        TUSER(  strne) r3, [r0], #4                     @ Shouldnt fault
+                ands    ip, ip, #3
+                beq     .Lc2u_0fupi
+.Lc2u_0nowords: teq     ip, #0
+                beq     .Lc2u_finished
+.Lc2u_nowords:  cmp     ip, #2
+                ldrb    r3, [r1], #1
+USER(   TUSER(  strb)   r3, [r0], #1)                   @ May fault
+                ldrgeb  r3, [r1], #1
+USER(   TUSER(  strgeb) r3, [r0], #1)                   @ May fault
+                ldrgtb  r3, [r1], #1
+USER(   TUSER(  strgtb) r3, [r0], #1)                   @ May fault
+                b       .Lc2u_finished
+.Lc2u_not_enough:
+                movs    ip, r2
+                bne     .Lc2u_nowords
+.Lc2u_finished: mov     r0, #0
+                ldmfd   sp!, {r2, r4 - r7, pc}
+.Lc2u_src_not_aligned:
+                bic     r1, r1, #3
+                ldr     r7, [r1], #4
+                cmp     ip, #2
+                bgt     .Lc2u_3fupi
+                beq     .Lc2u_2fupi
+.Lc2u_1fupi:    subs    r2, r2, #4
+                addmi   ip, r2, #4
+                bmi     .Lc2u_1nowords
+                mov     r3, r7, pull #8
+                ldr     r7, [r1], #4
+                orr     r3, r3, r7, push #24
+USER(   TUSER(  str)    r3, [r0], #4)                   @ May fault
+                mov     ip, r0, lsl #32 - PAGE_SHIFT
+                rsb     ip, ip, #0
+                movs    ip, ip, lsr #32 - PAGE_SHIFT
+                beq     .Lc2u_1fupi
+                cmp     r2, ip
+                movlt   ip, r2
+                sub     r2, r2, ip
+                subs    ip, ip, #16
+                blt     .Lc2u_1rem8lp
+.Lc2u_1cpy8lp:  mov     r3, r7, pull #8
+                ldmia   r1!, {r4 - r7}
+                subs    ip, ip, #16
+                orr     r3, r3, r4, push #24
+                mov     r4, r4, pull #8
+                orr     r4, r4, r5, push #24
+                mov     r5, r5, pull #8
+                orr     r5, r5, r6, push #24
+                mov     r6, r6, pull #8
+                orr     r6, r6, r7, push #24
+                stmia   r0!, {r3 - r6}                  @ Shouldnt fault
+                bpl     .Lc2u_1cpy8lp
+.Lc2u_1rem8lp:  tst     ip, #8
+                movne   r3, r7, pull #8
+                ldmneia r1!, {r4, r7}
+                orrne   r3, r3, r4, push #24
+                movne   r4, r4, pull #8
+                orrne   r4, r4, r7, push #24
+                stmneia r0!, {r3 - r4}                  @ Shouldnt fault
+                tst     ip, #4
+                movne   r3, r7, pull #8
+                ldrne   r7, [r1], #4
+                orrne   r3, r3, r7, push #24
+        TUSER(  strne) r3, [r0], #4                     @ Shouldnt fault
+                ands    ip, ip, #3
+                beq     .Lc2u_1fupi
+.Lc2u_1nowords: mov     r3, r7, get_byte_1
+                teq     ip, #0
+                beq     .Lc2u_finished
+                cmp     ip, #2
+USER(   TUSER(  strb)   r3, [r0], #1)                   @ May fault
+                movge   r3, r7, get_byte_2
+USER(   TUSER(  strgeb) r3, [r0], #1)                   @ May fault
+                movgt   r3, r7, get_byte_3
+USER(   TUSER(  strgtb) r3, [r0], #1)                   @ May fault
+                b       .Lc2u_finished
+.Lc2u_2fupi:    subs    r2, r2, #4
+                addmi   ip, r2, #4
+                bmi     .Lc2u_2nowords
+                mov     r3, r7, pull #16
+                ldr     r7, [r1], #4
+                orr     r3, r3, r7, push #16
+USER(   TUSER(  str)    r3, [r0], #4)                   @ May fault
+                mov     ip, r0, lsl #32 - PAGE_SHIFT
+                rsb     ip, ip, #0
+                movs    ip, ip, lsr #32 - PAGE_SHIFT
+                beq     .Lc2u_2fupi
+                cmp     r2, ip
+                movlt   ip, r2
+                sub     r2, r2, ip
+                subs    ip, ip, #16
+                blt     .Lc2u_2rem8lp
+.Lc2u_2cpy8lp:  mov     r3, r7, pull #16
+                ldmia   r1!, {r4 - r7}
+                subs    ip, ip, #16
+                orr     r3, r3, r4, push #16
+                mov     r4, r4, pull #16
+                orr     r4, r4, r5, push #16
+                mov     r5, r5, pull #16
+                orr     r5, r5, r6, push #16
+                mov     r6, r6, pull #16
+                orr     r6, r6, r7, push #16
+                stmia   r0!, {r3 - r6}                  @ Shouldnt fault
+                bpl     .Lc2u_2cpy8lp
+.Lc2u_2rem8lp:  tst     ip, #8
+                movne   r3, r7, pull #16
+                ldmneia r1!, {r4, r7}
+                orrne   r3, r3, r4, push #16
+                movne   r4, r4, pull #16
+                orrne   r4, r4, r7, push #16
+                stmneia r0!, {r3 - r4}                  @ Shouldnt fault
+                tst     ip, #4
+                movne   r3, r7, pull #16
+                ldrne   r7, [r1], #4
+                orrne   r3, r3, r7, push #16
+        TUSER(  strne) r3, [r0], #4                     @ Shouldnt fault
+                ands    ip, ip, #3
+                beq     .Lc2u_2fupi
+.Lc2u_2nowords: mov     r3, r7, get_byte_2
+                teq     ip, #0
+                beq     .Lc2u_finished
+                cmp     ip, #2
+USER(   TUSER(  strb)   r3, [r0], #1)                   @ May fault
+                movge   r3, r7, get_byte_3
+USER(   TUSER(  strgeb) r3, [r0], #1)                   @ May fault
+                ldrgtb  r3, [r1], #0
+USER(   TUSER(  strgtb) r3, [r0], #1)                   @ May fault
+                b       .Lc2u_finished
+.Lc2u_3fupi:    subs    r2, r2, #4
+                addmi   ip, r2, #4
+                bmi     .Lc2u_3nowords
+                mov     r3, r7, pull #24
+                ldr     r7, [r1], #4
+                orr     r3, r3, r7, push #8
+USER(   TUSER(  str)    r3, [r0], #4)                   @ May fault
+                mov     ip, r0, lsl #32 - PAGE_SHIFT
+                rsb     ip, ip, #0
+                movs    ip, ip, lsr #32 - PAGE_SHIFT
+                beq     .Lc2u_3fupi
+                cmp     r2, ip
+                movlt   ip, r2
+                sub     r2, r2, ip
+                subs    ip, ip, #16
+                blt     .Lc2u_3rem8lp
+.Lc2u_3cpy8lp:  mov     r3, r7, pull #24
+                ldmia   r1!, {r4 - r7}
+                subs    ip, ip, #16
+                orr     r3, r3, r4, push #8
+                mov     r4, r4, pull #24
+                orr     r4, r4, r5, push #8
+                mov     r5, r5, pull #24
+                orr     r5, r5, r6, push #8
+                mov     r6, r6, pull #24
+                orr     r6, r6, r7, push #8
+                stmia   r0!, {r3 - r6}                  @ Shouldnt fault
+                bpl     .Lc2u_3cpy8lp
+.Lc2u_3rem8lp:  tst     ip, #8
+                movne   r3, r7, pull #24
+                ldmneia r1!, {r4, r7}
+                orrne   r3, r3, r4, push #8
+                movne   r4, r4, pull #24
+                orrne   r4, r4, r7, push #8
+                stmneia r0!, {r3 - r4}                  @ Shouldnt fault
+                tst     ip, #4
+                movne   r3, r7, pull #24
+                ldrne   r7, [r1], #4
+                orrne   r3, r3, r7, push #8
+        TUSER(  strne) r3, [r0], #4                     @ Shouldnt fault
+                ands    ip, ip, #3
+                beq     .Lc2u_3fupi
+.Lc2u_3nowords: mov     r3, r7, get_byte_3
+                teq     ip, #0
+                beq     .Lc2u_finished
+                cmp     ip, #2
+USER(   TUSER(  strb)   r3, [r0], #1)                   @ May fault
+                ldrgeb  r3, [r1], #1
+USER(   TUSER(  strgeb) r3, [r0], #1)                   @ May fault
+                ldrgtb  r3, [r1], #0
+USER(   TUSER(  strgtb) r3, [r0], #1)                   @ May fault
+                b       .Lc2u_finished
+ENDPROC(__copy_to_user)
+                .pushsection .fixup,"ax"
+                .align  0
+9001:           ldmfd   sp!, {r0, r4 - r7, pc}
+                .popsection
+/* Prototype: unsigned long __copy_from_user(void *to,const void *from,unsigned long n);
+ * Purpose  : copy a block from user memory to kernel memory
+ * Params   : to   - kernel memory
+ *          : from - user memory
+ *          : n    - number of bytes to copy
+ * Returns  : Number of bytes NOT copied.
+ */
+.Lcfu_dest_not_aligned:
+                rsb     ip, ip, #4
+                cmp     ip, #2
+USER(   TUSER(  ldrb)   r3, [r1], #1)                   @ May fault
+                strb    r3, [r0], #1
+USER(   TUSER(  ldrgeb) r3, [r1], #1)                   @ May fault
+                strgeb  r3, [r0], #1
+USER(   TUSER(  ldrgtb) r3, [r1], #1)                   @ May fault
+                strgtb  r3, [r0], #1
+                sub     r2, r2, ip
+                b       .Lcfu_dest_aligned
+ENTRY(__copy_from_user)
+                stmfd   sp!, {r0, r2, r4 - r7, lr}
+                cmp     r2, #4
+                blt     .Lcfu_not_enough
+                ands    ip, r0, #3
+                bne     .Lcfu_dest_not_aligned
+.Lcfu_dest_aligned:
+                ands    ip, r1, #3
+                bne     .Lcfu_src_not_aligned
+/*
+ * Seeing as there has to be at least 8 bytes to copy, we can
+ * copy one word, and force a user-mode page fault...
+ */
+.Lcfu_0fupi:    subs    r2, r2, #4
+                addmi   ip, r2, #4
+                bmi     .Lcfu_0nowords
+USER(   TUSER(  ldr)    r3, [r1], #4)
+                str     r3, [r0], #4
+                mov     ip, r1, lsl #32 - PAGE_SHIFT    @ On each page, use a ld/st??t instruction
+                rsb     ip, ip, #0
+                movs    ip, ip, lsr #32 - PAGE_SHIFT
+                beq     .Lcfu_0fupi
+/*
+ * ip = max no. of bytes to copy before needing another "strt" insn
+ */
+                cmp     r2, ip
+                movlt   ip, r2
+                sub     r2, r2, ip
+                subs    ip, ip, #32
+                blt     .Lcfu_0rem8lp
+.Lcfu_0cpy8lp:  ldmia   r1!, {r3 - r6}                  @ Shouldnt fault
+                stmia   r0!, {r3 - r6}
+                ldmia   r1!, {r3 - r6}                  @ Shouldnt fault
+                subs    ip, ip, #32
+                stmia   r0!, {r3 - r6}
+                bpl     .Lcfu_0cpy8lp
+.Lcfu_0rem8lp:  cmn     ip, #16
+                ldmgeia r1!, {r3 - r6}                  @ Shouldnt fault
+                stmgeia r0!, {r3 - r6}
+                tst     ip, #8
+                ldmneia r1!, {r3 - r4}                  @ Shouldnt fault
+                stmneia r0!, {r3 - r4}
+                tst     ip, #4
+        TUSER(  ldrne) r3, [r1], #4                     @ Shouldnt fault
+                strne   r3, [r0], #4
+                ands    ip, ip, #3
+                beq     .Lcfu_0fupi
+.Lcfu_0nowords: teq     ip, #0
+                beq     .Lcfu_finished
+.Lcfu_nowords:  cmp     ip, #2
+USER(   TUSER(  ldrb)   r3, [r1], #1)                   @ May fault
+                strb    r3, [r0], #1
+USER(   TUSER(  ldrgeb) r3, [r1], #1)                   @ May fault
+                strgeb  r3, [r0], #1
+USER(   TUSER(  ldrgtb) r3, [r1], #1)                   @ May fault
+                strgtb  r3, [r0], #1
+                b       .Lcfu_finished
+.Lcfu_not_enough:
+                movs    ip, r2
+                bne     .Lcfu_nowords
+.Lcfu_finished: mov     r0, #0
+                add     sp, sp, #8
+                ldmfd   sp!, {r4 - r7, pc}
+.Lcfu_src_not_aligned:
+                bic     r1, r1, #3
+USER(   TUSER(  ldr)    r7, [r1], #4)                   @ May fault
+                cmp     ip, #2
+                bgt     .Lcfu_3fupi
+                beq     .Lcfu_2fupi
+.Lcfu_1fupi:    subs    r2, r2, #4
+                addmi   ip, r2, #4
+                bmi     .Lcfu_1nowords
+                mov     r3, r7, pull #8
+USER(   TUSER(  ldr)    r7, [r1], #4)                   @ May fault
+                orr     r3, r3, r7, push #24
+                str     r3, [r0], #4
+                mov     ip, r1, lsl #32 - PAGE_SHIFT
+                rsb     ip, ip, #0
+                movs    ip, ip, lsr #32 - PAGE_SHIFT
+                beq     .Lcfu_1fupi
+                cmp     r2, ip
+                movlt   ip, r2
+                sub     r2, r2, ip
+                subs    ip, ip, #16
+                blt     .Lcfu_1rem8lp
+.Lcfu_1cpy8lp:  mov     r3, r7, pull #8
+                ldmia   r1!, {r4 - r7}                  @ Shouldnt fault
+                subs    ip, ip, #16
+                orr     r3, r3, r4, push #24
+                mov     r4, r4, pull #8
+                orr     r4, r4, r5, push #24
+                mov     r5, r5, pull #8
+                orr     r5, r5, r6, push #24
+                mov     r6, r6, pull #8
+                orr     r6, r6, r7, push #24
+                stmia   r0!, {r3 - r6}
+                bpl     .Lcfu_1cpy8lp
+.Lcfu_1rem8lp:  tst     ip, #8
+                movne   r3, r7, pull #8
+                ldmneia r1!, {r4, r7}                   @ Shouldnt fault
+                orrne   r3, r3, r4, push #24
+                movne   r4, r4, pull #8
+                orrne   r4, r4, r7, push #24
+                stmneia r0!, {r3 - r4}
+                tst     ip, #4
+                movne   r3, r7, pull #8
+USER(   TUSER(  ldrne) r7, [r1], #4)                    @ May fault
+                orrne   r3, r3, r7, push #24
+                strne   r3, [r0], #4
+                ands    ip, ip, #3
+                beq     .Lcfu_1fupi
+.Lcfu_1nowords: mov     r3, r7, get_byte_1
+                teq     ip, #0
+                beq     .Lcfu_finished
+                cmp     ip, #2
+                strb    r3, [r0], #1
+                movge   r3, r7, get_byte_2
+                strgeb  r3, [r0], #1
+                movgt   r3, r7, get_byte_3
+                strgtb  r3, [r0], #1
+                b       .Lcfu_finished
+.Lcfu_2fupi:    subs    r2, r2, #4
+                addmi   ip, r2, #4
+                bmi     .Lcfu_2nowords
+                mov     r3, r7, pull #16
+USER(   TUSER(  ldr)    r7, [r1], #4)                   @ May fault
+                orr     r3, r3, r7, push #16
+                str     r3, [r0], #4
+                mov     ip, r1, lsl #32 - PAGE_SHIFT
+                rsb     ip, ip, #0
+                movs    ip, ip, lsr #32 - PAGE_SHIFT
+                beq     .Lcfu_2fupi
+                cmp     r2, ip
+                movlt   ip, r2
+                sub     r2, r2, ip
+                subs    ip, ip, #16
+                blt     .Lcfu_2rem8lp
+.Lcfu_2cpy8lp:  mov     r3, r7, pull #16
+                ldmia   r1!, {r4 - r7}                  @ Shouldnt fault
+                subs    ip, ip, #16
+                orr     r3, r3, r4, push #16
+                mov     r4, r4, pull #16
+                orr     r4, r4, r5, push #16
+                mov     r5, r5, pull #16
+                orr     r5, r5, r6, push #16
+                mov     r6, r6, pull #16
+                orr     r6, r6, r7, push #16
+                stmia   r0!, {r3 - r6}
+                bpl     .Lcfu_2cpy8lp
+.Lcfu_2rem8lp:  tst     ip, #8
+                movne   r3, r7, pull #16
+                ldmneia r1!, {r4, r7}                   @ Shouldnt fault
+                orrne   r3, r3, r4, push #16
+                movne   r4, r4, pull #16
+                orrne   r4, r4, r7, push #16
+                stmneia r0!, {r3 - r4}
+                tst     ip, #4
+                movne   r3, r7, pull #16
+USER(   TUSER(  ldrne) r7, [r1], #4)                    @ May fault
+                orrne   r3, r3, r7, push #16
+                strne   r3, [r0], #4
+                ands    ip, ip, #3
+                beq     .Lcfu_2fupi
+.Lcfu_2nowords: mov     r3, r7, get_byte_2
+                teq     ip, #0
+                beq     .Lcfu_finished
+                cmp     ip, #2
+                strb    r3, [r0], #1
+                movge   r3, r7, get_byte_3
+                strgeb  r3, [r0], #1
+USER(   TUSER(  ldrgtb) r3, [r1], #0)                   @ May fault
+                strgtb  r3, [r0], #1
+                b       .Lcfu_finished
+.Lcfu_3fupi:    subs    r2, r2, #4
+                addmi   ip, r2, #4
+                bmi     .Lcfu_3nowords
+                mov     r3, r7, pull #24
+USER(   TUSER(  ldr)    r7, [r1], #4)                   @ May fault
+                orr     r3, r3, r7, push #8
+                str     r3, [r0], #4
+                mov     ip, r1, lsl #32 - PAGE_SHIFT
+                rsb     ip, ip, #0
+                movs    ip, ip, lsr #32 - PAGE_SHIFT
+                beq     .Lcfu_3fupi
+                cmp     r2, ip
+                movlt   ip, r2
+                sub     r2, r2, ip
+                subs    ip, ip, #16
+                blt     .Lcfu_3rem8lp
+.Lcfu_3cpy8lp:  mov     r3, r7, pull #24
+                ldmia   r1!, {r4 - r7}                  @ Shouldnt fault
+                orr     r3, r3, r4, push #8
+                mov     r4, r4, pull #24
+                orr     r4, r4, r5, push #8
+                mov     r5, r5, pull #24
+                orr     r5, r5, r6, push #8
+                mov     r6, r6, pull #24
+                orr     r6, r6, r7, push #8
+                stmia   r0!, {r3 - r6}
+                subs    ip, ip, #16
+                bpl     .Lcfu_3cpy8lp
+.Lcfu_3rem8lp:  tst     ip, #8
+                movne   r3, r7, pull #24
+                ldmneia r1!, {r4, r7}                   @ Shouldnt fault
+                orrne   r3, r3, r4, push #8
+                movne   r4, r4, pull #24
+                orrne   r4, r4, r7, push #8
+                stmneia r0!, {r3 - r4}
+                tst     ip, #4
+                movne   r3, r7, pull #24
+USER(   TUSER(  ldrne) r7, [r1], #4)                    @ May fault
+                orrne   r3, r3, r7, push #8
+                strne   r3, [r0], #4
+                ands    ip, ip, #3
+                beq     .Lcfu_3fupi
+.Lcfu_3nowords: mov     r3, r7, get_byte_3
+                teq     ip, #0
+                beq     .Lcfu_finished
+                cmp     ip, #2
+                strb    r3, [r0], #1
+USER(   TUSER(  ldrgeb) r3, [r1], #1)                   @ May fault
+                strgeb  r3, [r0], #1
+USER(   TUSER(  ldrgtb) r3, [r1], #1)                   @ May fault
+                strgtb  r3, [r0], #1
+                b       .Lcfu_finished
+ENDPROC(__copy_from_user)
+                .pushsection .fixup,"ax"
+                .align  0
+                /*
+                 * We took an exception.  r0 contains a pointer to
+                 * the byte not copied.
+                 */
+9001:           ldr     r2, [sp], #4                    @ void *to
+                sub     r2, r0, r2                      @ bytes copied
+                ldr     r1, [sp], #4                    @ unsigned long count
+                subs    r4, r1, r2                      @ bytes left to copy
+                movne   r1, r4
+                blne    __memzero
+                mov     r0, r4
+                ldmfd   sp!, {r4 - r7, pc}
+                .popsection
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index 104ca40d8d18..aaa443b48c91 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -197,7 +197,7 @@ void __init at91rm9200_timer_init(void)
        at91_st_read(AT91_ST_SR);
        /* Make IRQs happen for the system timer */
-        setup_irq(AT91_ID_SYS, &at91rm9200_timer_irq);
+        setup_irq(NR_IRQS_LEGACY + AT91_ID_SYS, &at91rm9200_timer_irq);
        /* The 32KiHz "Slow Clock" (tick every 30517.58 nanoseconds) is used
         * directly for the clocksource and all clockevents, after adjusting
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c
index 7b9c2ba396ed..bce572a530ef 100644
--- a/arch/arm/mach-at91/at91sam9260_devices.c
+++ b/arch/arm/mach-at91/at91sam9260_devices.c
@@ -726,6 +726,8 @@ static struct resource rtt_resources[] = {
                .flags  = IORESOURCE_MEM,
        }, {
                .flags  = IORESOURCE_MEM,
+        }, {
+                .flags  = IORESOURCE_IRQ,
        },
 };
@@ -744,10 +746,12 @@ static void __init at91_add_device_rtt_rtc(void)
         * The second resource is needed:
         * GPBR will serve as the storage for RTC time offset
         */
-        at91sam9260_rtt_device.num_resources = 2;
+        at91sam9260_rtt_device.num_resources = 3;
        rtt_resources[1].start = AT91SAM9260_BASE_GPBR +
                                 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
        rtt_resources[1].end = rtt_resources[1].start + 3;
+        rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
+        rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
 }
 #else
 static void __init at91_add_device_rtt_rtc(void)
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c
index 8df5c1bdff92..bc2590d712d0 100644
--- a/arch/arm/mach-at91/at91sam9261_devices.c
+++ b/arch/arm/mach-at91/at91sam9261_devices.c
@@ -609,6 +609,8 @@ static struct resource rtt_resources[] = {
                .flags  = IORESOURCE_MEM,
        }, {
                .flags  = IORESOURCE_MEM,
+        }, {
+                .flags  = IORESOURCE_IRQ,
        }
 };
@@ -626,10 +628,12 @@ static void __init at91_add_device_rtt_rtc(void)
         * The second resource is needed:
         * GPBR will serve as the storage for RTC time offset
         */
-        at91sam9261_rtt_device.num_resources = 2;
+        at91sam9261_rtt_device.num_resources = 3;
        rtt_resources[1].start = AT91SAM9261_BASE_GPBR +
                                 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
        rtt_resources[1].end = rtt_resources[1].start + 3;
+        rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
+        rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
 }
 #else
 static void __init at91_add_device_rtt_rtc(void)
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c
index eb6bbf86fb9f..9b6ca734f1a9 100644
--- a/arch/arm/mach-at91/at91sam9263_devices.c
+++ b/arch/arm/mach-at91/at91sam9263_devices.c
@@ -990,6 +990,8 @@ static struct resource rtt0_resources[] = {
                .flags  = IORESOURCE_MEM,
        }, {
                .flags  = IORESOURCE_MEM,
+        }, {
+                .flags  = IORESOURCE_IRQ,
        }
 };
@@ -1006,6 +1008,8 @@ static struct resource rtt1_resources[] = {
                .flags  = IORESOURCE_MEM,
        }, {
                .flags  = IORESOURCE_MEM,
+        }, {
+                .flags  = IORESOURCE_IRQ,
        }
 };
@@ -1027,14 +1031,14 @@ static void __init at91_add_device_rtt_rtc(void)
                 * The second resource is needed only for the chosen RTT:
                 * GPBR will serve as the storage for RTC time offset
                 */
-                at91sam9263_rtt0_device.num_resources = 2;
+                at91sam9263_rtt0_device.num_resources = 3;
                at91sam9263_rtt1_device.num_resources = 1;
                pdev = &at91sam9263_rtt0_device;
                r = rtt0_resources;
                break;
        case 1:
                at91sam9263_rtt0_device.num_resources = 1;
-                at91sam9263_rtt1_device.num_resources = 2;
+                at91sam9263_rtt1_device.num_resources = 3;
                pdev = &at91sam9263_rtt1_device;
                r = rtt1_resources;
                break;
@@ -1047,6 +1051,8 @@ static void __init at91_add_device_rtt_rtc(void)
        pdev->name = "rtc-at91sam9";
        r[1].start = AT91SAM9263_BASE_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
        r[1].end = r[1].start + 3;
+        r[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
+        r[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
 }
 #else
 static void __init at91_add_device_rtt_rtc(void)
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c
index 06073996a382..1b47319ca00b 100644
--- a/arch/arm/mach-at91/at91sam9g45_devices.c
+++ b/arch/arm/mach-at91/at91sam9g45_devices.c
@@ -1293,6 +1293,8 @@ static struct resource rtt_resources[] = {
                .flags  = IORESOURCE_MEM,
        }, {
                .flags  = IORESOURCE_MEM,
+        }, {
+                .flags  = IORESOURCE_IRQ,
        }
 };
@@ -1310,10 +1312,12 @@ static void __init at91_add_device_rtt_rtc(void)
         * The second resource is needed:
         * GPBR will serve as the storage for RTC time offset
         */
-        at91sam9g45_rtt_device.num_resources = 2;
+        at91sam9g45_rtt_device.num_resources = 3;
        rtt_resources[1].start = AT91SAM9G45_BASE_GPBR +
                                 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
        rtt_resources[1].end = rtt_resources[1].start + 3;
+        rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
+        rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
 }
 #else
 static void __init at91_add_device_rtt_rtc(void)
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c
index f09fff932172..b3d365dadef5 100644
--- a/arch/arm/mach-at91/at91sam9rl_devices.c
+++ b/arch/arm/mach-at91/at91sam9rl_devices.c
@@ -688,6 +688,8 @@ static struct resource rtt_resources[] = {
                .flags  = IORESOURCE_MEM,
        }, {
                .flags  = IORESOURCE_MEM,
+        }, {
+                .flags  = IORESOURCE_IRQ,
        }
 };
@@ -705,10 +707,12 @@ static void __init at91_add_device_rtt_rtc(void)
         * The second resource is needed:
         * GPBR will serve as the storage for RTC time offset
         */
-        at91sam9rl_rtt_device.num_resources = 2;
+        at91sam9rl_rtt_device.num_resources = 3;
        rtt_resources[1].start = AT91SAM9RL_BASE_GPBR +
                                 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
        rtt_resources[1].end = rtt_resources[1].start + 3;
+        rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
+        rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
 }
 #else
 static void __init at91_add_device_rtt_rtc(void)
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index de2ec6b8fea7..188c82971ebd 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -63,6 +63,12 @@ EXPORT_SYMBOL_GPL(at91_pmc_base);
 #define cpu_has_300M_plla()     (cpu_is_at91sam9g10())
+#define cpu_has_240M_plla()     (cpu_is_at91sam9261() \
+                                || cpu_is_at91sam9263() \
+                                || cpu_is_at91sam9rl())
+#define cpu_has_210M_plla()     (cpu_is_at91sam9260())
 #define cpu_has_pllb()          (!(cpu_is_at91sam9rl() \
                                || cpu_is_at91sam9g45() \
                                || cpu_is_at91sam9x5() \
@@ -706,6 +712,12 @@ static int __init at91_pmc_init(unsigned long main_clock)
        } else if (cpu_has_800M_plla()) {
                if (plla.rate_hz > 800000000)
                        pll_overclock = true;
+        } else if (cpu_has_240M_plla()) {
+                if (plla.rate_hz > 240000000)
+                        pll_overclock = true;
+        } else if (cpu_has_210M_plla()) {
+                if (plla.rate_hz > 210000000)
+                        pll_overclock = true;
        } else {
                if (plla.rate_hz > 209000000)
                        pll_overclock = true;
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index 5de69f2fcca9..f6b9fc70161b 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -162,38 +162,6 @@ static void __init davinci_ntosd2_map_io(void)
        dm644x_init();
 }
-/*
- I2C initialization
-*/
-static struct davinci_i2c_platform_data ntosd2_i2c_pdata = {
-        .bus_freq       = 20 /* kHz */,
-        .bus_delay      = 100 /* usec */,
-};
-static struct i2c_board_info __initdata ntosd2_i2c_info[] =  {
-};
-static  int ntosd2_init_i2c(void)
-{
-        int     status;
-        davinci_init_i2c(&ntosd2_i2c_pdata);
-        status = gpio_request(NTOSD2_MSP430_IRQ, ntosd2_i2c_info[0].type);
-        if (status == 0) {
-                status = gpio_direction_input(NTOSD2_MSP430_IRQ);
-                if (status == 0) {
-                        status = gpio_to_irq(NTOSD2_MSP430_IRQ);
-                        if (status > 0) {
-                                ntosd2_i2c_info[0].irq = status;
-                                i2c_register_board_info(1,
-                                        ntosd2_i2c_info,
-                                        ARRAY_SIZE(ntosd2_i2c_info));
-                        }
-                }
-        }
-        return status;
-}
 static struct davinci_mmc_config davinci_ntosd2_mmc_config = {
        .wires          = 4,
        .version        = MMC_CTLR_VERSION_1
@@ -218,7 +186,6 @@ static __init void davinci_ntosd2_init(void)
 {
        struct clk *aemif_clk;
        struct davinci_soc_info *soc_info = &davinci_soc_info;
-        int     status;
        aemif_clk = clk_get(NULL, "aemif");
        clk_enable(aemif_clk);
@@ -242,12 +209,6 @@ static __init void davinci_ntosd2_init(void)
        platform_add_devices(davinci_ntosd2_devices,
                                ARRAY_SIZE(davinci_ntosd2_devices));
-        /* Initialize I2C interface specific for this board */
-        status = ntosd2_init_i2c();
-        if (status < 0)
-                pr_warning("davinci_ntosd2_init: msp430 irq setup failed:"
-                                                "        %d\n", status);
        davinci_serial_init(&uart_config);
        dm644x_init_asp(&dm644x_ntosd2_snd_data);
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c
index 4db5de54b6a7..6321567d8eaa 100644
--- a/arch/arm/mach-dove/common.c
+++ b/arch/arm/mach-dove/common.c
@@ -102,7 +102,8 @@ void __init dove_ehci1_init(void)
 void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 {
        orion_ge00_init(eth_data, DOVE_GE00_PHYS_BASE,
-                        IRQ_DOVE_GE00_SUM, IRQ_DOVE_GE00_ERR);
+                        IRQ_DOVE_GE00_SUM, IRQ_DOVE_GE00_ERR,
+                        1600);
 }
 /*****************************************************************************
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index 5ca80307d6d7..4e574c24581c 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -42,6 +42,7 @@
 #include <plat/backlight.h>
 #include <plat/fb.h>
 #include <plat/mfc.h>
+#include <plat/hdmi.h>
 #include <mach/ohci.h>
 #include <mach/map.h>
@@ -734,6 +735,11 @@ static void __init origen_bt_setup(void)
        s3c_gpio_setpull(EXYNOS4_GPX2(2), S3C_GPIO_PULL_NONE);
 }
+/* I2C module and id for HDMIPHY */
+static struct i2c_board_info hdmiphy_info = {
+        I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38),
+};
 static void s5p_tv_setup(void)
 {
        /* Direct HPD to HDMI chip */
@@ -781,6 +787,7 @@ static void __init origen_machine_init(void)
        s5p_tv_setup();
        s5p_i2c_hdmiphy_set_platdata(NULL);
+        s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
 #ifdef CONFIG_DRM_EXYNOS
        s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
index 3cfa688d274a..73f2bce097e1 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -40,6 +40,7 @@
 #include <plat/mfc.h>
 #include <plat/ehci.h>
 #include <plat/clock.h>
+#include <plat/hdmi.h>
 #include <mach/map.h>
 #include <mach/ohci.h>
@@ -354,6 +355,11 @@ static struct platform_pwm_backlight_data smdkv310_bl_data = {
        .pwm_period_ns  = 1000,
 };
+/* I2C module and id for HDMIPHY */
+static struct i2c_board_info hdmiphy_info = {
+        I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38),
+};
 static void s5p_tv_setup(void)
 {
        /* direct HPD to HDMI chip */
@@ -388,6 +394,7 @@ static void __init smdkv310_machine_init(void)
        s5p_tv_setup();
        s5p_i2c_hdmiphy_set_platdata(NULL);
+        s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
        samsung_keypad_set_platdata(&smdkv310_keypad_data);
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
index 373c3c00d24c..c0bc83a7663e 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -115,7 +115,7 @@ static __init int exynos_pm_dt_parse_domains(void)
 }
 #endif /* CONFIG_OF */
-static __init void exynos_pm_add_dev_to_genpd(struct platform_device *pdev,
+static __init __maybe_unused void exynos_pm_add_dev_to_genpd(struct platform_device *pdev,
                                                struct exynos_pm_domain *pd)
 {
        if (pdev->dev.bus) {
diff --git a/arch/arm/mach-gemini/irq.c b/arch/arm/mach-gemini/irq.c
index ca70e5fcc7ac..020852d3bdd8 100644
--- a/arch/arm/mach-gemini/irq.c
+++ b/arch/arm/mach-gemini/irq.c
@@ -17,6 +17,7 @@
 #include <linux/sched.h>
 #include <asm/irq.h>
 #include <asm/mach/irq.h>
+#include <asm/system_misc.h>
 #include <mach/hardware.h>
 #define IRQ_SOURCE(base_addr)   (base_addr + 0x00)
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 07f7c226e4cf..d004d37ad9d8 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -9,7 +9,8 @@ obj-$(CONFIG_SOC_IMX27) += clk-imx27.o mm-imx27.o ehci-imx27.o
 obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o clk-imx31.o iomux-imx31.o ehci-imx31.o pm-imx3.o
 obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clk-imx35.o ehci-imx35.o pm-imx3.o
-obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o pm-imx5.o cpu_op-mx51.o
+imx5-pm-$(CONFIG_PM) += pm-imx5.o
+obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o $(imx5-pm-y) cpu_op-mx51.o
 obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \
                            clk-pfd.o clk-busy.o
@@ -70,14 +71,13 @@ obj-$(CONFIG_DEBUG_LL) += lluart.o
 obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
 obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o
 obj-$(CONFIG_HAVE_IMX_SRC) += src.o
-obj-$(CONFIG_CPU_V7) += head-v7.o
+AFLAGS_headsmp.o :=-Wa,-march=armv7-a
-AFLAGS_head-v7.o :=-Wa,-march=armv7-a
+obj-$(CONFIG_SMP) += headsmp.o platsmp.o
-obj-$(CONFIG_SMP) += platsmp.o
 obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
 obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o mach-imx6q.o
 ifeq ($(CONFIG_PM),y)
-obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o
+obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o headsmp.o
 endif
 # i.MX5 based machines
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index fdd8cc87c9fe..d20d4795f4ea 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -222,10 +222,8 @@ int __init mx25_clocks_init(void)
        clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0");
        clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0");
        clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0");
-        clk_register_clkdev(clk[ssi1_ipg_per], "per", "imx-ssi.0");
+        clk_register_clkdev(clk[ssi1_ipg], NULL, "imx-ssi.0");
-        clk_register_clkdev(clk[ssi1_ipg], "ipg", "imx-ssi.0");
+        clk_register_clkdev(clk[ssi2_ipg], NULL, "imx-ssi.1");
-        clk_register_clkdev(clk[ssi2_ipg_per], "per", "imx-ssi.1");
-        clk_register_clkdev(clk[ssi2_ipg], "ipg", "imx-ssi.1");
        clk_register_clkdev(clk[esdhc1_ipg_per], "per", "sdhci-esdhc-imx25.0");
        clk_register_clkdev(clk[esdhc1_ipg], "ipg", "sdhci-esdhc-imx25.0");
        clk_register_clkdev(clk[esdhc1_ahb], "ahb", "sdhci-esdhc-imx25.0");
@@ -243,6 +241,6 @@ int __init mx25_clocks_init(void)
        clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma");
        clk_register_clkdev(clk[iim_ipg], "iim", NULL);
-        mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);
+        mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), MX25_INT_GPT1);
        return 0;
 }
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index 7aa6313fb167..f69ca4680049 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -223,7 +223,7 @@ int __init mx27_clocks_init(unsigned long fref)
        clk_register_clkdev(clk[per3_gate], "per", "imx-fb.0");
        clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0");
        clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx-fb.0");
-        clk_register_clkdev(clk[csi_ahb_gate], NULL, "mx2-camera.0");
+        clk_register_clkdev(clk[csi_ahb_gate], "ahb", "mx2-camera.0");
        clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
        clk_register_clkdev(clk[usb_ipg_gate], "ipg", "fsl-usb2-udc");
        clk_register_clkdev(clk[usb_ahb_gate], "ahb", "fsl-usb2-udc");
@@ -250,8 +250,10 @@ int __init mx27_clocks_init(unsigned long fref)
        clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx-i2c.1");
        clk_register_clkdev(clk[owire_ipg_gate], NULL, "mxc_w1.0");
        clk_register_clkdev(clk[kpp_ipg_gate], NULL, "imx-keypad");
-        clk_register_clkdev(clk[emma_ahb_gate], "ahb", "imx-emma");
+        clk_register_clkdev(clk[emma_ahb_gate], "emma-ahb", "mx2-camera.0");
-        clk_register_clkdev(clk[emma_ipg_gate], "ipg", "imx-emma");
+        clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "mx2-camera.0");
+        clk_register_clkdev(clk[emma_ahb_gate], "ahb", "m2m-emmaprp.0");
+        clk_register_clkdev(clk[emma_ipg_gate], "ipg", "m2m-emmaprp.0");
        clk_register_clkdev(clk[iim_ipg_gate], "iim", NULL);
        clk_register_clkdev(clk[gpio_ipg_gate], "gpio", NULL);
        clk_register_clkdev(clk[brom_ahb_gate], "brom", NULL);
diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c
index 8e19e70f90f9..1253af2d9971 100644
--- a/arch/arm/mach-imx/clk-imx31.c
+++ b/arch/arm/mach-imx/clk-imx31.c
@@ -130,7 +130,7 @@ int __init mx31_clocks_init(unsigned long fref)
        clk_register_clkdev(clk[nfc], NULL, "mxc_nand.0");
        clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core");
        clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb");
-        clk_register_clkdev(clk[kpp_gate], "kpp", NULL);
+        clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad");
        clk_register_clkdev(clk[usb_div_post], "per", "mxc-ehci.0");
        clk_register_clkdev(clk[usb_gate], "ahb", "mxc-ehci.0");
        clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.0");
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index c6422fb10bae..65fb8bcd86cb 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -230,10 +230,8 @@ int __init mx35_clocks_init()
        clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb");
        clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1");
        clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma");
-        clk_register_clkdev(clk[ipg], "ipg", "imx-ssi.0");
+        clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0");
-        clk_register_clkdev(clk[ssi1_div_post], "per", "imx-ssi.0");
+        clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1");
-        clk_register_clkdev(clk[ipg], "ipg", "imx-ssi.1");
-        clk_register_clkdev(clk[ssi2_div_post], "per", "imx-ssi.1");
        /* i.mx35 has the i.mx21 type uart */
        clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0");
        clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0");
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index f6086693ebd2..4bdcaa97bd98 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -303,6 +303,7 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
        clk_prepare_enable(clk[aips_tz2]); /* fec */
        clk_prepare_enable(clk[spba]);
        clk_prepare_enable(clk[emi_fast_gate]); /* fec */
+        clk_prepare_enable(clk[emi_slow_gate]); /* eim */
        clk_prepare_enable(clk[tmax1]);
        clk_prepare_enable(clk[tmax2]); /* esdhc2, fec */
        clk_prepare_enable(clk[tmax3]); /* esdhc1, esdhc4 */
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index ea89520b6e22..4233d9e3531d 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -152,7 +152,7 @@ enum mx6q_clks {
        ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3,
        usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg,
        pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, ssi1_ipg,
-        ssi2_ipg, ssi3_ipg, rom, usbphy1, usbphy2,
+        ssi2_ipg, ssi3_ipg, rom, usbphy1, usbphy2, ldb_di0_div_3_5, ldb_di1_div_3_5,
        clk_max
 };
@@ -288,8 +288,10 @@ int __init mx6q_clocks_init(void)
        clk[gpu3d_shader]     = imx_clk_divider("gpu3d_shader",     "gpu3d_shader_sel",  base + 0x18, 29, 3);
        clk[ipu1_podf]        = imx_clk_divider("ipu1_podf",        "ipu1_sel",          base + 0x3c, 11, 3);
        clk[ipu2_podf]        = imx_clk_divider("ipu2_podf",        "ipu2_sel",          base + 0x3c, 16, 3);
-        clk[ldb_di0_podf]     = imx_clk_divider("ldb_di0_podf",     "ldb_di0_sel",       base + 0x20, 10, 1);
+        clk[ldb_di0_div_3_5]  = imx_clk_fixed_factor("ldb_di0_div_3_5", "ldb_di0_sel", 2, 7);
-        clk[ldb_di1_podf]     = imx_clk_divider("ldb_di1_podf",     "ldb_di1_sel",       base + 0x20, 11, 1);
+        clk[ldb_di0_podf]     = imx_clk_divider("ldb_di0_podf",     "ldb_di0_div_3_5",       base + 0x20, 10, 1);
+        clk[ldb_di1_div_3_5]  = imx_clk_fixed_factor("ldb_di1_div_3_5", "ldb_di1_sel", 2, 7);
+        clk[ldb_di1_podf]     = imx_clk_divider("ldb_di1_podf",     "ldb_di1_div_3_5",   base + 0x20, 11, 1);
        clk[ipu1_di0_pre]     = imx_clk_divider("ipu1_di0_pre",     "ipu1_di0_pre_sel",  base + 0x34, 3,  3);
        clk[ipu1_di1_pre]     = imx_clk_divider("ipu1_di1_pre",     "ipu1_di1_pre_sel",  base + 0x34, 12, 3);
        clk[ipu2_di0_pre]     = imx_clk_divider("ipu2_di0_pre",     "ipu2_di0_pre_sel",  base + 0x38, 3,  3);
diff --git a/arch/arm/mach-imx/head-v7.S b/arch/arm/mach-imx/headsmp.S
index 7e49deb128a4..7e49deb128a4 100644
--- a/arch/arm/mach-imx/head-v7.S
+++ b/arch/arm/mach-imx/headsmp.S
diff --git a/arch/arm/mach-imx/hotplug.c b/arch/arm/mach-imx/hotplug.c
index 20ed2d56c1af..f8f7437c83b8 100644
--- a/arch/arm/mach-imx/hotplug.c
+++ b/arch/arm/mach-imx/hotplug.c
@@ -42,22 +42,6 @@ static inline void cpu_enter_lowpower(void)
          : "cc");
 }
-static inline void cpu_leave_lowpower(void)
-{
-        unsigned int v;
-        asm volatile(
-                "mrc    p15, 0, %0, c1, c0, 0\n"
-        "       orr     %0, %0, %1\n"
-        "       mcr     p15, 0, %0, c1, c0, 0\n"
-        "       mrc     p15, 0, %0, c1, c0, 1\n"
-        "       orr     %0, %0, %2\n"
-        "       mcr     p15, 0, %0, c1, c0, 1\n"
-          : "=&r" (v)
-          : "Ir" (CR_C), "Ir" (0x40)
-          : "cc");
-}
 /*
 * platform-specific code to shutdown a CPU
 *
@@ -67,11 +51,10 @@ void platform_cpu_die(unsigned int cpu)
 {
        cpu_enter_lowpower();
        imx_enable_cpu(cpu, false);
-        cpu_do_idle();
-        cpu_leave_lowpower();
-        /* We should never return from idle */
+        /* spin here until hardware takes it down */
-        panic("cpu %d unexpectedly exit from shutdown\n", cpu);
+        while (1)
+                ;
 }
 int platform_cpu_disable(unsigned int cpu)
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c
index 2c6ab3273f9e..5985ed1b8c98 100644
--- a/arch/arm/mach-imx/mach-armadillo5x0.c
+++ b/arch/arm/mach-imx/mach-armadillo5x0.c
@@ -526,7 +526,8 @@ static void __init armadillo5x0_init(void)
        imx31_add_mxc_nand(&armadillo5x0_nand_board_info);
        /* set NAND page size to 2k if not configured via boot mode pins */
-        __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR);
+        __raw_writel(__raw_readl(mx3_ccm_base + MXC_CCM_RCSR) |
+                                        (1 << 30), mx3_ccm_base + MXC_CCM_RCSR);
        /* RTC */
        /* Get RTC IRQ and register the chip */
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index f264ddddd47c..5823a2e65124 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -32,13 +32,13 @@
 #include <linux/delay.h>
 #include <linux/dma-mapping.h>
 #include <linux/leds.h>
-#include <linux/memblock.h>
 #include <media/soc_camera.h>
 #include <sound/tlv320aic32x4.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/system_info.h>
+#include <asm/memblock.h>
 #include <mach/common.h>
 #include <mach/hardware.h>
 #include <mach/iomux-mx27.h>
@@ -233,10 +233,8 @@ static void __init visstrim_camera_init(void)
 static void __init visstrim_reserve(void)
 {
        /* reserve 4 MiB for mx2-camera */
-        mx2_camera_base = memblock_alloc(MX2_CAMERA_BUF_SIZE,
+        mx2_camera_base = memblock_steal(MX2_CAMERA_BUF_SIZE,
                        MX2_CAMERA_BUF_SIZE);
-        memblock_free(mx2_camera_base, MX2_CAMERA_BUF_SIZE);
-        memblock_remove(mx2_camera_base, MX2_CAMERA_BUF_SIZE);
 }
 /* GPIOs used as events for applications */
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 5ec0608f2a76..045b3f6a387d 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -71,7 +71,7 @@ soft:
 /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
 static int ksz9021rn_phy_fixup(struct phy_device *phydev)
 {
-        if (IS_ENABLED(CONFIG_PHYLIB)) {
+        if (IS_BUILTIN(CONFIG_PHYLIB)) {
                /* min rx data delay */
                phy_write(phydev, 0x0b, 0x8105);
                phy_write(phydev, 0x0c, 0x0000);
@@ -112,7 +112,7 @@ put_clk:
 static void __init imx6q_sabrelite_init(void)
 {
-        if (IS_ENABLED(CONFIG_PHYLIB))
+        if (IS_BUILTIN(CONFIG_PHYLIB))
                phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
                                ksz9021rn_phy_fixup);
        imx6q_sabrelite_cko1_setup();
diff --git a/arch/arm/mach-integrator/common.h b/arch/arm/mach-integrator/common.h
index 899561d8db28..c3ff21b5ea24 100644
--- a/arch/arm/mach-integrator/common.h
+++ b/arch/arm/mach-integrator/common.h
@@ -1,3 +1,6 @@
+#include <linux/amba/serial.h>
+extern struct amba_pl010_data integrator_uart_data;
 void integrator_init_early(void);
+int integrator_init(bool is_cp);
 void integrator_reserve(void);
 void integrator_restart(char, const char *);
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index ebf680bebdf2..1772c024e789 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -11,6 +11,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/device.h>
+#include <linux/export.h>
 #include <linux/spinlock.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
@@ -32,7 +33,9 @@
 #include <asm/mach/time.h>
 #include <asm/pgtable.h>
-static struct amba_pl010_data integrator_uart_data;
+#include "common.h"
+#ifdef CONFIG_ATAGS
 #define INTEGRATOR_RTC_IRQ      { IRQ_RTCINT }
 #define INTEGRATOR_UART0_IRQ    { IRQ_UARTINT0 }
@@ -60,7 +63,7 @@ static struct amba_device *amba_devs[] __initdata = {
        &kmi1_device,
 };
-static int __init integrator_init(void)
+int __init integrator_init(bool is_cp)
 {
        int i;
@@ -69,7 +72,7 @@ static int __init integrator_init(void)
         * hard-code them. The Integator/CP and forward have proper cell IDs.
         * Else we leave them undefined to the bus driver can autoprobe them.
         */
-        if (machine_is_integrator()) {
+        if (!is_cp) {
                rtc_device.periphid     = 0x00041030;
                uart0_device.periphid   = 0x00041010;
                uart1_device.periphid   = 0x00041010;
@@ -85,7 +88,7 @@ static int __init integrator_init(void)
        return 0;
 }
-arch_initcall(integrator_init);
+#endif
 /*
 * On the Integrator platform, the port RTS and DTR are provided by
@@ -100,11 +103,14 @@ arch_initcall(integrator_init);
 static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl)
 {
        unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
+        u32 phybase = dev->res.start;
-        if (dev == &uart0_device) {
+        if (phybase == INTEGRATOR_UART0_BASE) {
+                /* UART0 */
                rts_mask = 1 << 4;
                dtr_mask = 1 << 5;
        } else {
+                /* UART1 */
                rts_mask = 1 << 6;
                dtr_mask = 1 << 7;
        }
@@ -123,7 +129,7 @@ static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *bas
        __raw_writel(ctrlc, SC_CTRLC);
 }
-static struct amba_pl010_data integrator_uart_data = {
+struct amba_pl010_data integrator_uart_data = {
        .set_mctrl = integrator_uart_set_mctrl,
 };
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 7b1055c8e0b9..ff1255ae7121 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -34,6 +34,9 @@
 #include <linux/mtd/physmap.h>
 #include <linux/clk.h>
 #include <linux/platform_data/clk-integrator.h>
+#include <linux/of_irq.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
 #include <video/vga.h>
 #include <mach/hardware.h>
@@ -161,23 +164,6 @@ static void __init ap_map_io(void)
        vga_base = PCI_MEMORY_VADDR;
 }
-#define INTEGRATOR_SC_VALID_INT 0x003fffff
-static void __init ap_init_irq(void)
-{
-        /* Disable all interrupts initially. */
-        /* Do the core module ones */
-        writel(-1, VA_CMIC_BASE + IRQ_ENABLE_CLEAR);
-        /* do the header card stuff next */
-        writel(-1, VA_IC_BASE + IRQ_ENABLE_CLEAR);
-        writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR);
-        fpga_irq_init(VA_IC_BASE, "SC", IRQ_PIC_START,
-                -1, INTEGRATOR_SC_VALID_INT, NULL);
-        integrator_clk_init(false);
-}
 #ifdef CONFIG_PM
 static unsigned long ic_irq_enable;
@@ -270,50 +256,6 @@ static struct physmap_flash_data ap_flash_data = {
        .set_vpp        = ap_flash_set_vpp,
 };
-static struct resource cfi_flash_resource = {
-        .start          = INTEGRATOR_FLASH_BASE,
-        .end            = INTEGRATOR_FLASH_BASE + INTEGRATOR_FLASH_SIZE - 1,
-        .flags          = IORESOURCE_MEM,
-};
-static struct platform_device cfi_flash_device = {
-        .name           = "physmap-flash",
-        .id             = 0,
-        .dev            = {
-                .platform_data  = &ap_flash_data,
-        },
-        .num_resources  = 1,
-        .resource       = &cfi_flash_resource,
-};
-static void __init ap_init(void)
-{
-        unsigned long sc_dec;
-        int i;
-        platform_device_register(&cfi_flash_device);
-        sc_dec = readl(VA_SC_BASE + INTEGRATOR_SC_DEC_OFFSET);
-        for (i = 0; i < 4; i++) {
-                struct lm_device *lmdev;
-                if ((sc_dec & (16 << i)) == 0)
-                        continue;
-                lmdev = kzalloc(sizeof(struct lm_device), GFP_KERNEL);
-                if (!lmdev)
-                        continue;
-                lmdev->resource.start = 0xc0000000 + 0x10000000 * i;
-                lmdev->resource.end = lmdev->resource.start + 0x0fffffff;
-                lmdev->resource.flags = IORESOURCE_MEM;
-                lmdev->irq = IRQ_AP_EXPINT0 + i;
-                lmdev->id = i;
-                lm_device_register(lmdev);
-        }
-}
 /*
 * Where is the timer (VA)?
 */
@@ -328,9 +270,9 @@ static u32 notrace integrator_read_sched_clock(void)
        return -readl((void __iomem *) TIMER2_VA_BASE + TIMER_VALUE);
 }
-static void integrator_clocksource_init(unsigned long inrate)
+static void integrator_clocksource_init(unsigned long inrate,
+                                        void __iomem *base)
 {
-        void __iomem *base = (void __iomem *)TIMER2_VA_BASE;
        u32 ctrl = TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC;
        unsigned long rate = inrate;
@@ -347,7 +289,7 @@ static void integrator_clocksource_init(unsigned long inrate)
        setup_sched_clock(integrator_read_sched_clock, 16, rate);
 }
-static void __iomem * const clkevt_base = (void __iomem *)TIMER1_VA_BASE;
+static void __iomem * clkevt_base;
 /*
 * IRQ handler for the timer
@@ -419,11 +361,13 @@ static struct irqaction integrator_timer_irq = {
        .dev_id         = &integrator_clockevent,
 };
-static void integrator_clockevent_init(unsigned long inrate)
+static void integrator_clockevent_init(unsigned long inrate,
+                                void __iomem *base, int irq)
 {
        unsigned long rate = inrate;
        unsigned int ctrl = 0;
+        clkevt_base = base;
        /* Calculate and program a divisor */
        if (rate > 0x100000 * HZ) {
                rate /= 256;
@@ -435,7 +379,7 @@ static void integrator_clockevent_init(unsigned long inrate)
        timer_reload = rate / HZ;
        writel(ctrl, clkevt_base + TIMER_CTRL);
-        setup_irq(IRQ_TIMERINT1, &integrator_timer_irq);
+        setup_irq(irq, &integrator_timer_irq);
        clockevents_config_and_register(&integrator_clockevent,
                                        rate,
                                        1,
@@ -446,9 +390,153 @@ void __init ap_init_early(void)
 {
 }
+#ifdef CONFIG_OF
+static void __init ap_init_timer_of(void)
+{
+        struct device_node *node;
+        const char *path;
+        void __iomem *base;
+        int err;
+        int irq;
+        struct clk *clk;
+        unsigned long rate;
+        clk = clk_get_sys("ap_timer", NULL);
+        BUG_ON(IS_ERR(clk));
+        clk_prepare_enable(clk);
+        rate = clk_get_rate(clk);
+        err = of_property_read_string(of_aliases,
+                                "arm,timer-primary", &path);
+        if (WARN_ON(err))
+                return;
+        node = of_find_node_by_path(path);
+        base = of_iomap(node, 0);
+        if (WARN_ON(!base))
+                return;
+        writel(0, base + TIMER_CTRL);
+        integrator_clocksource_init(rate, base);
+        err = of_property_read_string(of_aliases,
+                                "arm,timer-secondary", &path);
+        if (WARN_ON(err))
+                return;
+        node = of_find_node_by_path(path);
+        base = of_iomap(node, 0);
+        if (WARN_ON(!base))
+                return;
+        irq = irq_of_parse_and_map(node, 0);
+        writel(0, base + TIMER_CTRL);
+        integrator_clockevent_init(rate, base, irq);
+}
+static struct sys_timer ap_of_timer = {
+        .init           = ap_init_timer_of,
+};
+static const struct of_device_id fpga_irq_of_match[] __initconst = {
+        { .compatible = "arm,versatile-fpga-irq", .data = fpga_irq_of_init, },
+        { /* Sentinel */ }
+};
+static void __init ap_init_irq_of(void)
+{
+        /* disable core module IRQs */
+        writel(0xffffffffU, VA_CMIC_BASE + IRQ_ENABLE_CLEAR);
+        of_irq_init(fpga_irq_of_match);
+        integrator_clk_init(false);
+}
+/* For the Device Tree, add in the UART callbacks as AUXDATA */
+static struct of_dev_auxdata ap_auxdata_lookup[] __initdata = {
+        OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE,
+                "rtc", NULL),
+        OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE,
+                "uart0", &integrator_uart_data),
+        OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE,
+                "uart1", &integrator_uart_data),
+        OF_DEV_AUXDATA("arm,primecell", KMI0_BASE,
+                "kmi0", NULL),
+        OF_DEV_AUXDATA("arm,primecell", KMI1_BASE,
+                "kmi1", NULL),
+        OF_DEV_AUXDATA("cfi-flash", INTEGRATOR_FLASH_BASE,
+                "physmap-flash", &ap_flash_data),
+        { /* sentinel */ },
+};
+static void __init ap_init_of(void)
+{
+        unsigned long sc_dec;
+        int i;
+        of_platform_populate(NULL, of_default_bus_match_table,
+                        ap_auxdata_lookup, NULL);
+        sc_dec = readl(VA_SC_BASE + INTEGRATOR_SC_DEC_OFFSET);
+        for (i = 0; i < 4; i++) {
+                struct lm_device *lmdev;
+                if ((sc_dec & (16 << i)) == 0)
+                        continue;
+                lmdev = kzalloc(sizeof(struct lm_device), GFP_KERNEL);
+                if (!lmdev)
+                        continue;
+                lmdev->resource.start = 0xc0000000 + 0x10000000 * i;
+                lmdev->resource.end = lmdev->resource.start + 0x0fffffff;
+                lmdev->resource.flags = IORESOURCE_MEM;
+                lmdev->irq = IRQ_AP_EXPINT0 + i;
+                lmdev->id = i;
+                lm_device_register(lmdev);
+        }
+}
+static const char * ap_dt_board_compat[] = {
+        "arm,integrator-ap",
+        NULL,
+};
+DT_MACHINE_START(INTEGRATOR_AP_DT, "ARM Integrator/AP (Device Tree)")
+        .reserve        = integrator_reserve,
+        .map_io         = ap_map_io,
+        .nr_irqs        = NR_IRQS_INTEGRATOR_AP,
+        .init_early     = ap_init_early,
+        .init_irq       = ap_init_irq_of,
+        .handle_irq     = fpga_handle_irq,
+        .timer          = &ap_of_timer,
+        .init_machine   = ap_init_of,
+        .restart        = integrator_restart,
+        .dt_compat      = ap_dt_board_compat,
+MACHINE_END
+#endif
+#ifdef CONFIG_ATAGS
 /*
- * Set up timer(s).
+ * This is where non-devicetree initialization code is collected and stashed
+ * for eventual deletion.
 */
+static struct resource cfi_flash_resource = {
+        .start          = INTEGRATOR_FLASH_BASE,
+        .end            = INTEGRATOR_FLASH_BASE + INTEGRATOR_FLASH_SIZE - 1,
+        .flags          = IORESOURCE_MEM,
+};
+static struct platform_device cfi_flash_device = {
+        .name           = "physmap-flash",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &ap_flash_data,
+        },
+        .num_resources  = 1,
+        .resource       = &cfi_flash_resource,
+};
 static void __init ap_init_timer(void)
 {
        struct clk *clk;
@@ -456,21 +544,69 @@ static void __init ap_init_timer(void)
        clk = clk_get_sys("ap_timer", NULL);
        BUG_ON(IS_ERR(clk));
-        clk_enable(clk);
+        clk_prepare_enable(clk);
        rate = clk_get_rate(clk);
        writel(0, TIMER0_VA_BASE + TIMER_CTRL);
        writel(0, TIMER1_VA_BASE + TIMER_CTRL);
        writel(0, TIMER2_VA_BASE + TIMER_CTRL);
-        integrator_clocksource_init(rate);
+        integrator_clocksource_init(rate, (void __iomem *)TIMER2_VA_BASE);
-        integrator_clockevent_init(rate);
+        integrator_clockevent_init(rate, (void __iomem *)TIMER1_VA_BASE,
+                                IRQ_TIMERINT1);
 }
 static struct sys_timer ap_timer = {
        .init           = ap_init_timer,
 };
+#define INTEGRATOR_SC_VALID_INT 0x003fffff
+static void __init ap_init_irq(void)
+{
+        /* Disable all interrupts initially. */
+        /* Do the core module ones */
+        writel(-1, VA_CMIC_BASE + IRQ_ENABLE_CLEAR);
+        /* do the header card stuff next */
+        writel(-1, VA_IC_BASE + IRQ_ENABLE_CLEAR);
+        writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR);
+        fpga_irq_init(VA_IC_BASE, "SC", IRQ_PIC_START,
+                -1, INTEGRATOR_SC_VALID_INT, NULL);
+        integrator_clk_init(false);
+}
+static void __init ap_init(void)
+{
+        unsigned long sc_dec;
+        int i;
+        platform_device_register(&cfi_flash_device);
+        sc_dec = readl(VA_SC_BASE + INTEGRATOR_SC_DEC_OFFSET);
+        for (i = 0; i < 4; i++) {
+                struct lm_device *lmdev;
+                if ((sc_dec & (16 << i)) == 0)
+                        continue;
+                lmdev = kzalloc(sizeof(struct lm_device), GFP_KERNEL);
+                if (!lmdev)
+                        continue;
+                lmdev->resource.start = 0xc0000000 + 0x10000000 * i;
+                lmdev->resource.end = lmdev->resource.start + 0x0fffffff;
+                lmdev->resource.flags = IORESOURCE_MEM;
+                lmdev->irq = IRQ_AP_EXPINT0 + i;
+                lmdev->id = i;
+                lm_device_register(lmdev);
+        }
+        integrator_init(false);
+}
 MACHINE_START(INTEGRATOR, "ARM-Integrator")
        /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
        .atag_offset    = 0x100,
@@ -484,3 +620,5 @@ MACHINE_START(INTEGRATOR, "ARM-Integrator")
        .init_machine   = ap_init,
        .restart        = integrator_restart,
 MACHINE_END
+#endif
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 82d5c837cc74..f51363e2d6fe 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -23,6 +23,9 @@
 #include <linux/gfp.h>
 #include <linux/mtd/physmap.h>
 #include <linux/platform_data/clk-integrator.h>
+#include <linux/of_irq.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
 #include <mach/hardware.h>
 #include <mach/platform.h>
@@ -49,16 +52,9 @@
 #include "common.h"
 #define INTCP_PA_FLASH_BASE             0x24000000
-#define INTCP_FLASH_SIZE                SZ_32M
 #define INTCP_PA_CLCD_BASE              0xc0000000
-#define INTCP_VA_CIC_BASE               __io_address(INTEGRATOR_HDR_BASE + 0x40)
-#define INTCP_VA_PIC_BASE               __io_address(INTEGRATOR_IC_BASE)
-#define INTCP_VA_SIC_BASE               __io_address(INTEGRATOR_CP_SIC_BASE)
-#define INTCP_ETH_SIZE                  0x10
 #define INTCP_VA_CTRL_BASE              IO_ADDRESS(INTEGRATOR_CP_CTL_BASE)
 #define INTCP_FLASHPROG                 0x04
 #define CINTEGRATOR_FLASHPROG_FLVPPEN   (1 << 0)
@@ -143,37 +139,6 @@ static void __init intcp_map_io(void)
        iotable_init(intcp_io_desc, ARRAY_SIZE(intcp_io_desc));
 }
-static void __init intcp_init_irq(void)
-{
-        u32 pic_mask, cic_mask, sic_mask;
-        /* These masks are for the HW IRQ registers */
-        pic_mask = ~((~0u) << (11 - IRQ_PIC_START));
-        pic_mask |= (~((~0u) << (29 - 22))) << 22;
-        cic_mask = ~((~0u) << (1 + IRQ_CIC_END - IRQ_CIC_START));
-        sic_mask = ~((~0u) << (1 + IRQ_SIC_END - IRQ_SIC_START));
-        /*
-         * Disable all interrupt sources
-         */
-        writel(0xffffffff, INTCP_VA_PIC_BASE + IRQ_ENABLE_CLEAR);
-        writel(0xffffffff, INTCP_VA_PIC_BASE + FIQ_ENABLE_CLEAR);
-        writel(0xffffffff, INTCP_VA_CIC_BASE + IRQ_ENABLE_CLEAR);
-        writel(0xffffffff, INTCP_VA_CIC_BASE + FIQ_ENABLE_CLEAR);
-        writel(sic_mask, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR);
-        writel(sic_mask, INTCP_VA_SIC_BASE + FIQ_ENABLE_CLEAR);
-        fpga_irq_init(INTCP_VA_PIC_BASE, "PIC", IRQ_PIC_START,
-                      -1, pic_mask, NULL);
-        fpga_irq_init(INTCP_VA_CIC_BASE, "CIC", IRQ_CIC_START,
-                      -1, cic_mask, NULL);
-        fpga_irq_init(INTCP_VA_SIC_BASE, "SIC", IRQ_SIC_START,
-                      IRQ_CP_CPPLDINT, sic_mask, NULL);
-        integrator_clk_init(true);
-}
 /*
 * Flash handling.
 */
@@ -216,47 +181,6 @@ static struct physmap_flash_data intcp_flash_data = {
        .set_vpp        = intcp_flash_set_vpp,
 };
-static struct resource intcp_flash_resource = {
-        .start          = INTCP_PA_FLASH_BASE,
-        .end            = INTCP_PA_FLASH_BASE + INTCP_FLASH_SIZE - 1,
-        .flags          = IORESOURCE_MEM,
-};
-static struct platform_device intcp_flash_device = {
-        .name           = "physmap-flash",
-        .id             = 0,
-        .dev            = {
-                .platform_data  = &intcp_flash_data,
-        },
-        .num_resources  = 1,
-        .resource       = &intcp_flash_resource,
-};
-static struct resource smc91x_resources[] = {
-        [0] = {
-                .start  = INTEGRATOR_CP_ETH_BASE,
-                .end    = INTEGRATOR_CP_ETH_BASE + INTCP_ETH_SIZE - 1,
-                .flags  = IORESOURCE_MEM,
-        },
-        [1] = {
-                .start  = IRQ_CP_ETHINT,
-                .end    = IRQ_CP_ETHINT,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-static struct platform_device smc91x_device = {
-        .name           = "smc91x",
-        .id             = 0,
-        .num_resources  = ARRAY_SIZE(smc91x_resources),
-        .resource       = smc91x_resources,
-};
-static struct platform_device *intcp_devs[] __initdata = {
-        &intcp_flash_device,
-        &smc91x_device,
-};
 /*
 * It seems that the card insertion interrupt remains active after
 * we've acknowledged it.  We therefore ignore the interrupt, and
@@ -278,16 +202,6 @@ static struct mmci_platform_data mmc_data = {
        .gpio_cd        = -1,
 };
-#define INTEGRATOR_CP_MMC_IRQS  { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 }
-#define INTEGRATOR_CP_AACI_IRQS { IRQ_CP_AACIINT }
-static AMBA_APB_DEVICE(mmc, "mmci", 0, INTEGRATOR_CP_MMC_BASE,
-        INTEGRATOR_CP_MMC_IRQS, &mmc_data);
-static AMBA_APB_DEVICE(aaci, "aaci", 0, INTEGRATOR_CP_AACI_BASE,
-        INTEGRATOR_CP_AACI_IRQS, NULL);
 /*
 * CLCD support
 */
@@ -338,15 +252,6 @@ static struct clcd_board clcd_data = {
        .remove         = versatile_clcd_remove_dma,
 };
-static AMBA_AHB_DEVICE(clcd, "clcd", 0, INTCP_PA_CLCD_BASE,
-        { IRQ_CP_CLCDCINT }, &clcd_data);
-static struct amba_device *amba_devs[] __initdata = {
-        &mmc_device,
-        &aaci_device,
-        &clcd_device,
-};
 #define REFCOUNTER (__io_address(INTEGRATOR_HDR_BASE) + 0x28)
 static void __init intcp_init_early(void)
@@ -356,16 +261,193 @@ static void __init intcp_init_early(void)
 #endif
 }
-static void __init intcp_init(void)
+static void __init intcp_timer_init_of(void)
 {
-        int i;
+        struct device_node *node;
+        const char *path;
+        void __iomem *base;
+        int err;
+        int irq;
+        err = of_property_read_string(of_aliases,
+                                "arm,timer-primary", &path);
+        if (WARN_ON(err))
+                return;
+        node = of_find_node_by_path(path);
+        base = of_iomap(node, 0);
+        if (WARN_ON(!base))
+                return;
+        writel(0, base + TIMER_CTRL);
+        sp804_clocksource_init(base, node->name);
+        err = of_property_read_string(of_aliases,
+                                "arm,timer-secondary", &path);
+        if (WARN_ON(err))
+                return;
+        node = of_find_node_by_path(path);
+        base = of_iomap(node, 0);
+        if (WARN_ON(!base))
+                return;
+        irq = irq_of_parse_and_map(node, 0);
+        writel(0, base + TIMER_CTRL);
+        sp804_clockevents_init(base, irq, node->name);
+}
-        platform_add_devices(intcp_devs, ARRAY_SIZE(intcp_devs));
+static struct sys_timer cp_of_timer = {
+        .init           = intcp_timer_init_of,
+};
-        for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
+#ifdef CONFIG_OF
-                struct amba_device *d = amba_devs[i];
-                amba_device_register(d, &iomem_resource);
+static const struct of_device_id fpga_irq_of_match[] __initconst = {
-        }
+        { .compatible = "arm,versatile-fpga-irq", .data = fpga_irq_of_init, },
+        { /* Sentinel */ }
+};
+static void __init intcp_init_irq_of(void)
+{
+        of_irq_init(fpga_irq_of_match);
+        integrator_clk_init(true);
+}
+/*
+ * For the Device Tree, add in the UART, MMC and CLCD specifics as AUXDATA
+ * and enforce the bus names since these are used for clock lookups.
+ */
+static struct of_dev_auxdata intcp_auxdata_lookup[] __initdata = {
+        OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_RTC_BASE,
+                "rtc", NULL),
+        OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE,
+                "uart0", &integrator_uart_data),
+        OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE,
+                "uart1", &integrator_uart_data),
+        OF_DEV_AUXDATA("arm,primecell", KMI0_BASE,
+                "kmi0", NULL),
+        OF_DEV_AUXDATA("arm,primecell", KMI1_BASE,
+                "kmi1", NULL),
+        OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_CP_MMC_BASE,
+                "mmci", &mmc_data),
+        OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_CP_AACI_BASE,
+                "aaci", &mmc_data),
+        OF_DEV_AUXDATA("arm,primecell", INTCP_PA_CLCD_BASE,
+                "clcd", &clcd_data),
+        OF_DEV_AUXDATA("cfi-flash", INTCP_PA_FLASH_BASE,
+                "physmap-flash", &intcp_flash_data),
+        { /* sentinel */ },
+};
+static void __init intcp_init_of(void)
+{
+        of_platform_populate(NULL, of_default_bus_match_table,
+                        intcp_auxdata_lookup, NULL);
+}
+static const char * intcp_dt_board_compat[] = {
+        "arm,integrator-cp",
+        NULL,
+};
+DT_MACHINE_START(INTEGRATOR_CP_DT, "ARM Integrator/CP (Device Tree)")
+        .reserve        = integrator_reserve,
+        .map_io         = intcp_map_io,
+        .nr_irqs        = NR_IRQS_INTEGRATOR_CP,
+        .init_early     = intcp_init_early,
+        .init_irq       = intcp_init_irq_of,
+        .handle_irq     = fpga_handle_irq,
+        .timer          = &cp_of_timer,
+        .init_machine   = intcp_init_of,
+        .restart        = integrator_restart,
+        .dt_compat      = intcp_dt_board_compat,
+MACHINE_END
+#endif
+#ifdef CONFIG_ATAGS
+/*
+ * This is where non-devicetree initialization code is collected and stashed
+ * for eventual deletion.
+ */
+#define INTCP_FLASH_SIZE                SZ_32M
+static struct resource intcp_flash_resource = {
+        .start          = INTCP_PA_FLASH_BASE,
+        .end            = INTCP_PA_FLASH_BASE + INTCP_FLASH_SIZE - 1,
+        .flags          = IORESOURCE_MEM,
+};
+static struct platform_device intcp_flash_device = {
+        .name           = "physmap-flash",
+        .id             = 0,
+        .dev            = {
+                .platform_data  = &intcp_flash_data,
+        },
+        .num_resources  = 1,
+        .resource       = &intcp_flash_resource,
+};
+#define INTCP_ETH_SIZE                  0x10
+static struct resource smc91x_resources[] = {
+        [0] = {
+                .start  = INTEGRATOR_CP_ETH_BASE,
+                .end    = INTEGRATOR_CP_ETH_BASE + INTCP_ETH_SIZE - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_CP_ETHINT,
+                .end    = IRQ_CP_ETHINT,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+static struct platform_device smc91x_device = {
+        .name           = "smc91x",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(smc91x_resources),
+        .resource       = smc91x_resources,
+};
+static struct platform_device *intcp_devs[] __initdata = {
+        &intcp_flash_device,
+        &smc91x_device,
+};
+#define INTCP_VA_CIC_BASE               __io_address(INTEGRATOR_HDR_BASE + 0x40)
+#define INTCP_VA_PIC_BASE               __io_address(INTEGRATOR_IC_BASE)
+#define INTCP_VA_SIC_BASE               __io_address(INTEGRATOR_CP_SIC_BASE)
+static void __init intcp_init_irq(void)
+{
+        u32 pic_mask, cic_mask, sic_mask;
+        /* These masks are for the HW IRQ registers */
+        pic_mask = ~((~0u) << (11 - IRQ_PIC_START));
+        pic_mask |= (~((~0u) << (29 - 22))) << 22;
+        cic_mask = ~((~0u) << (1 + IRQ_CIC_END - IRQ_CIC_START));
+        sic_mask = ~((~0u) << (1 + IRQ_SIC_END - IRQ_SIC_START));
+        /*
+         * Disable all interrupt sources
+         */
+        writel(0xffffffff, INTCP_VA_PIC_BASE + IRQ_ENABLE_CLEAR);
+        writel(0xffffffff, INTCP_VA_PIC_BASE + FIQ_ENABLE_CLEAR);
+        writel(0xffffffff, INTCP_VA_CIC_BASE + IRQ_ENABLE_CLEAR);
+        writel(0xffffffff, INTCP_VA_CIC_BASE + FIQ_ENABLE_CLEAR);
+        writel(sic_mask, INTCP_VA_SIC_BASE + IRQ_ENABLE_CLEAR);
+        writel(sic_mask, INTCP_VA_SIC_BASE + FIQ_ENABLE_CLEAR);
+        fpga_irq_init(INTCP_VA_PIC_BASE, "PIC", IRQ_PIC_START,
+                      -1, pic_mask, NULL);
+        fpga_irq_init(INTCP_VA_CIC_BASE, "CIC", IRQ_CIC_START,
+                      -1, cic_mask, NULL);
+        fpga_irq_init(INTCP_VA_SIC_BASE, "SIC", IRQ_SIC_START,
+                      IRQ_CP_CPPLDINT, sic_mask, NULL);
+        integrator_clk_init(true);
 }
 #define TIMER0_VA_BASE __io_address(INTEGRATOR_TIMER0_BASE)
@@ -386,6 +468,37 @@ static struct sys_timer cp_timer = {
        .init           = intcp_timer_init,
 };
+#define INTEGRATOR_CP_MMC_IRQS  { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 }
+#define INTEGRATOR_CP_AACI_IRQS { IRQ_CP_AACIINT }
+static AMBA_APB_DEVICE(mmc, "mmci", 0, INTEGRATOR_CP_MMC_BASE,
+        INTEGRATOR_CP_MMC_IRQS, &mmc_data);
+static AMBA_APB_DEVICE(aaci, "aaci", 0, INTEGRATOR_CP_AACI_BASE,
+        INTEGRATOR_CP_AACI_IRQS, NULL);
+static AMBA_AHB_DEVICE(clcd, "clcd", 0, INTCP_PA_CLCD_BASE,
+        { IRQ_CP_CLCDCINT }, &clcd_data);
+static struct amba_device *amba_devs[] __initdata = {
+        &mmc_device,
+        &aaci_device,
+        &clcd_device,
+};
+static void __init intcp_init(void)
+{
+        int i;
+        platform_add_devices(intcp_devs, ARRAY_SIZE(intcp_devs));
+        for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
+                struct amba_device *d = amba_devs[i];
+                amba_device_register(d, &iomem_resource);
+        }
+        integrator_init(true);
+}
 MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
        /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
        .atag_offset    = 0x100,
@@ -399,3 +512,5 @@ MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
        .init_machine   = intcp_init,
        .restart        = integrator_restart,
 MACHINE_END
+#endif
diff --git a/arch/arm/mach-kirkwood/Makefile.boot b/arch/arm/mach-kirkwood/Makefile.boot
index 2a576abf409b..a13299d758e1 100644
--- a/arch/arm/mach-kirkwood/Makefile.boot
+++ b/arch/arm/mach-kirkwood/Makefile.boot
@@ -7,7 +7,8 @@ dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns320.dtb
 dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns325.dtb
 dtb-$(CONFIG_MACH_ICONNECT_DT) += kirkwood-iconnect.dtb
 dtb-$(CONFIG_MACH_IB62X0_DT) += kirkwood-ib62x0.dtb
-dtb-$(CONFIG_MACH_TS219_DT)     += kirkwood-qnap-ts219.dtb
+dtb-$(CONFIG_MACH_TS219_DT)     += kirkwood-ts219-6281.dtb
+dtb-$(CONFIG_MACH_TS219_DT)     += kirkwood-ts219-6282.dtb
 dtb-$(CONFIG_MACH_GOFLEXNET_DT) += kirkwood-goflexnet.dtb
-dbt-$(CONFIG_MACH_LSXL_DT) += kirkwood-lschlv2.dtb
+dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lschlv2.dtb
-dbt-$(CONFIG_MACH_LSXL_DT) += kirkwood-lsxhl.dtb
+dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lsxhl.dtb
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index c4b64adcbfce..1201191d7f1b 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -301,7 +301,7 @@ void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 {
        orion_ge00_init(eth_data,
                        GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
-                        IRQ_KIRKWOOD_GE00_ERR);
+                        IRQ_KIRKWOOD_GE00_ERR, 1600);
        /* The interface forgets the MAC address assigned by u-boot if
        the clock is turned off, so claim the clk now. */
        clk_prepare_enable(ge0);
@@ -315,7 +315,7 @@ void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
 {
        orion_ge01_init(eth_data,
                        GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
-                        IRQ_KIRKWOOD_GE01_ERR);
+                        IRQ_KIRKWOOD_GE01_ERR, 1600);
        clk_prepare_enable(ge1);
 }
@@ -517,6 +517,13 @@ void __init kirkwood_wdt_init(void)
 void __init kirkwood_init_early(void)
 {
        orion_time_set_base(TIMER_VIRT_BASE);
+        /*
+         * Some Kirkwood devices allocate their coherent buffers from atomic
+         * context. Increase size of atomic coherent pool to make sure such
+         * the allocations won't fail.
+         */
+        init_dma_coherent_pool_size(SZ_1M);
 }
 int kirkwood_tclk;
diff --git a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
index d93359379598..be90b7d0e10b 100644
--- a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
+++ b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
@@ -10,6 +10,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
+#include <linux/sizes.h>
 #include <linux/platform_device.h>
 #include <linux/mtd/partitions.h>
 #include <linux/ata_platform.h>
diff --git a/arch/arm/mach-mmp/sram.c b/arch/arm/mach-mmp/sram.c
index 4304f9519372..7e8a5a2e1ec7 100644
--- a/arch/arm/mach-mmp/sram.c
+++ b/arch/arm/mach-mmp/sram.c
@@ -68,7 +68,7 @@ static int __devinit sram_probe(struct platform_device *pdev)
        struct resource *res;
        int ret = 0;
-        if (!pdata && !pdata->pool_name)
+        if (!pdata || !pdata->pool_name)
                return -ENODEV;
        info = kzalloc(sizeof(*info), GFP_KERNEL);
diff --git a/arch/arm/mach-mv78xx0/addr-map.c b/arch/arm/mach-mv78xx0/addr-map.c
index 62b53d710efd..a9bc84180d21 100644
--- a/arch/arm/mach-mv78xx0/addr-map.c
+++ b/arch/arm/mach-mv78xx0/addr-map.c
@@ -37,7 +37,7 @@
 #define WIN0_OFF(n)             (BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4))
 #define WIN8_OFF(n)             (BRIDGE_VIRT_BASE + 0x0900 + (((n) - 8) << 4))
-static void __init __iomem *win_cfg_base(int win)
+static void __init __iomem *win_cfg_base(const struct orion_addr_map_cfg *cfg, int win)
 {
        /*
         * Find the control register base address for this window.
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index b4c53b846c9c..3057f7d4329a 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -213,7 +213,8 @@ void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 {
        orion_ge00_init(eth_data,
                        GE00_PHYS_BASE, IRQ_MV78XX0_GE00_SUM,
-                        IRQ_MV78XX0_GE_ERR);
+                        IRQ_MV78XX0_GE_ERR,
+                        MV643XX_TX_CSUM_DEFAULT_LIMIT);
 }
@@ -224,7 +225,8 @@ void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data)
 {
        orion_ge01_init(eth_data,
                        GE01_PHYS_BASE, IRQ_MV78XX0_GE01_SUM,
-                        NO_IRQ);
+                        NO_IRQ,
+                        MV643XX_TX_CSUM_DEFAULT_LIMIT);
 }
diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig
index ccdf83b17cf1..9a8bbda195b2 100644
--- a/arch/arm/mach-mxs/Kconfig
+++ b/arch/arm/mach-mxs/Kconfig
@@ -2,9 +2,6 @@ if ARCH_MXS
 source "arch/arm/mach-mxs/devices/Kconfig"
-config MXS_OCOTP
-        bool
 config SOC_IMX23
        bool
        select ARM_AMBA
@@ -66,7 +63,6 @@ config MACH_MX28EVK
        select MXS_HAVE_PLATFORM_MXS_SAIF
        select MXS_HAVE_PLATFORM_MXS_I2C
        select MXS_HAVE_PLATFORM_RTC_STMP3XXX
-        select MXS_OCOTP
        help
          Include support for MX28EVK platform. This includes specific
          configurations for the board and its peripherals.
@@ -94,7 +90,6 @@ config MODULE_M28
        select MXS_HAVE_PLATFORM_MXS_I2C
        select MXS_HAVE_PLATFORM_MXS_MMC
        select MXS_HAVE_PLATFORM_MXSFB
-        select MXS_OCOTP
 config MODULE_APX4
        bool
@@ -106,7 +101,6 @@ config MODULE_APX4
        select MXS_HAVE_PLATFORM_MXS_I2C
        select MXS_HAVE_PLATFORM_MXS_MMC
        select MXS_HAVE_PLATFORM_MXS_SAIF
-        select MXS_OCOTP
 config MACH_TX28
        bool "Ka-Ro TX28 module"
diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile
index e41590ccb437..fed3695a1339 100644
--- a/arch/arm/mach-mxs/Makefile
+++ b/arch/arm/mach-mxs/Makefile
@@ -1,7 +1,6 @@
 # Common support
-obj-y := devices.o icoll.o iomux.o system.o timer.o mm.o
+obj-y := devices.o icoll.o iomux.o ocotp.o system.o timer.o mm.o
-obj-$(CONFIG_MXS_OCOTP) += ocotp.o
 obj-$(CONFIG_PM) += pm.o
 obj-$(CONFIG_MACH_MXS_DT) += mach-mxs.o
diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c
index 8dabfe81d07c..ff886e01a0b0 100644
--- a/arch/arm/mach-mxs/mach-mxs.c
+++ b/arch/arm/mach-mxs/mach-mxs.c
@@ -261,7 +261,7 @@ static void __init apx4devkit_init(void)
        enable_clk_enet_out();
        if (IS_BUILTIN(CONFIG_PHYLIB))
-                phy_register_fixup_for_uid(PHY_ID_KS8051, MICREL_PHY_ID_MASK,
+                phy_register_fixup_for_uid(PHY_ID_KSZ8051, MICREL_PHY_ID_MASK,
                                           apx4devkit_phy_fixup);
        mxsfb_pdata.mode_list = apx4devkit_video_modes;
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index dd2db025f778..346fd26f3aa6 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -62,13 +62,14 @@ config ARCH_OMAP4
        select PM_OPP if PM
        select USB_ARCH_HAS_EHCI if USB_SUPPORT
        select ARM_CPU_SUSPEND if PM
-        select ARCH_NEEDS_CPU_IDLE_COUPLED
+        select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
 config SOC_OMAP5
        bool "TI OMAP5"
        select CPU_V7
        select ARM_GIC
        select HAVE_SMP
+        select ARM_CPU_SUSPEND if PM
 comment "OMAP Core Type"
        depends on ARCH_OMAP2
@@ -231,10 +232,11 @@ config MACH_OMAP3_PANDORA
        select OMAP_PACKAGE_CBB
        select REGULATOR_FIXED_VOLTAGE if REGULATOR
-config MACH_OMAP3_TOUCHBOOK
+config MACH_TOUCHBOOK
        bool "OMAP3 Touch Book"
        depends on ARCH_OMAP3
        default y
+        select OMAP_PACKAGE_CBB
 config MACH_OMAP_3430SDP
        bool "OMAP 3430 SDP board"
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index f6a24b3f9c4f..34c2c7f59f0a 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -255,7 +255,7 @@ obj-$(CONFIG_MACH_OMAP_3630SDP)		+= board-zoom-display.o
 obj-$(CONFIG_MACH_CM_T35)               += board-cm-t35.o
 obj-$(CONFIG_MACH_CM_T3517)             += board-cm-t3517.o
 obj-$(CONFIG_MACH_IGEP0020)             += board-igep0020.o
-obj-$(CONFIG_MACH_OMAP3_TOUCHBOOK)      += board-omap3touchbook.o
+obj-$(CONFIG_MACH_TOUCHBOOK)            += board-omap3touchbook.o
 obj-$(CONFIG_MACH_OMAP_4430SDP)         += board-4430sdp.o
 obj-$(CONFIG_MACH_OMAP4_PANDA)          += board-omap4panda.o
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 74915295482e..28214483aaba 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -554,6 +554,8 @@ static const struct usbhs_omap_board_data igep3_usbhs_bdata __initconst = {
 #ifdef CONFIG_OMAP_MUX
 static struct omap_board_mux board_mux[] __initdata = {
+        /* SMSC9221 LAN Controller ETH IRQ (GPIO_176) */
+        OMAP3_MUX(MCSPI1_CS2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
        { .reg_offset = OMAP_MUX_TERMINATOR },
 };
 #endif
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index ef230a0eb5eb..0d362e9f9cb9 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -58,6 +58,7 @@
 #include "hsmmc.h"
 #include "common-board-devices.h"
+#define OMAP3_EVM_TS_GPIO       175
 #define OMAP3_EVM_EHCI_VBUS     22
 #define OMAP3_EVM_EHCI_SELECT   61
diff --git a/arch/arm/mach-omap2/clock33xx_data.c b/arch/arm/mach-omap2/clock33xx_data.c
index 25bbcc7ca4dc..ae27de8899a6 100644
--- a/arch/arm/mach-omap2/clock33xx_data.c
+++ b/arch/arm/mach-omap2/clock33xx_data.c
@@ -1036,13 +1036,13 @@ static struct omap_clk am33xx_clks[] = {
        CLK(NULL,       "mmu_fck",              &mmu_fck,       CK_AM33XX),
        CLK(NULL,       "smartreflex0_fck",     &smartreflex0_fck,      CK_AM33XX),
        CLK(NULL,       "smartreflex1_fck",     &smartreflex1_fck,      CK_AM33XX),
-        CLK(NULL,       "gpt1_fck",             &timer1_fck,    CK_AM33XX),
+        CLK(NULL,       "timer1_fck",           &timer1_fck,    CK_AM33XX),
-        CLK(NULL,       "gpt2_fck",             &timer2_fck,    CK_AM33XX),
+        CLK(NULL,       "timer2_fck",           &timer2_fck,    CK_AM33XX),
-        CLK(NULL,       "gpt3_fck",             &timer3_fck,    CK_AM33XX),
+        CLK(NULL,       "timer3_fck",           &timer3_fck,    CK_AM33XX),
-        CLK(NULL,       "gpt4_fck",             &timer4_fck,    CK_AM33XX),
+        CLK(NULL,       "timer4_fck",           &timer4_fck,    CK_AM33XX),
-        CLK(NULL,       "gpt5_fck",             &timer5_fck,    CK_AM33XX),
+        CLK(NULL,       "timer5_fck",           &timer5_fck,    CK_AM33XX),
-        CLK(NULL,       "gpt6_fck",             &timer6_fck,    CK_AM33XX),
+        CLK(NULL,       "timer6_fck",           &timer6_fck,    CK_AM33XX),
-        CLK(NULL,       "gpt7_fck",             &timer7_fck,    CK_AM33XX),
+        CLK(NULL,       "timer7_fck",           &timer7_fck,    CK_AM33XX),
        CLK(NULL,       "usbotg_fck",           &usbotg_fck,    CK_AM33XX),
        CLK(NULL,       "ieee5000_fck",         &ieee5000_fck,  CK_AM33XX),
        CLK(NULL,       "wdt1_fck",             &wdt1_fck,      CK_AM33XX),
diff --git a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
index a0d68dbecfa3..f99e65cfb862 100644
--- a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
@@ -241,6 +241,52 @@ static void omap3_clkdm_deny_idle(struct clockdomain *clkdm)
                _clkdm_del_autodeps(clkdm);
 }
+static int omap3xxx_clkdm_clk_enable(struct clockdomain *clkdm)
+{
+        bool hwsup = false;
+        if (!clkdm->clktrctrl_mask)
+                return 0;
+        hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+                                clkdm->clktrctrl_mask);
+        if (hwsup) {
+                /* Disable HW transitions when we are changing deps */
+                _disable_hwsup(clkdm);
+                _clkdm_add_autodeps(clkdm);
+                _enable_hwsup(clkdm);
+        } else {
+                if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
+                        omap3_clkdm_wakeup(clkdm);
+        }
+        return 0;
+}
+static int omap3xxx_clkdm_clk_disable(struct clockdomain *clkdm)
+{
+        bool hwsup = false;
+        if (!clkdm->clktrctrl_mask)
+                return 0;
+        hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
+                                clkdm->clktrctrl_mask);
+        if (hwsup) {
+                /* Disable HW transitions when we are changing deps */
+                _disable_hwsup(clkdm);
+                _clkdm_del_autodeps(clkdm);
+                _enable_hwsup(clkdm);
+        } else {
+                if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)
+                        omap3_clkdm_sleep(clkdm);
+        }
+        return 0;
+}
 struct clkdm_ops omap2_clkdm_operations = {
        .clkdm_add_wkdep        = omap2_clkdm_add_wkdep,
        .clkdm_del_wkdep        = omap2_clkdm_del_wkdep,
@@ -267,6 +313,6 @@ struct clkdm_ops omap3_clkdm_operations = {
        .clkdm_wakeup           = omap3_clkdm_wakeup,
        .clkdm_allow_idle       = omap3_clkdm_allow_idle,
        .clkdm_deny_idle        = omap3_clkdm_deny_idle,
-        .clkdm_clk_enable       = omap2_clkdm_clk_enable,
+        .clkdm_clk_enable       = omap3xxx_clkdm_clk_enable,
-        .clkdm_clk_disable      = omap2_clkdm_clk_disable,
+        .clkdm_clk_disable      = omap3xxx_clkdm_clk_disable,
 };
diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h
index 766338fe4d34..975f6bda0e0b 100644
--- a/arch/arm/mach-omap2/cm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-34xx.h
@@ -67,6 +67,7 @@
 #define OMAP3430_EN_IVA2_DPLL_MASK                      (0x7 << 0)
 /* CM_IDLEST_IVA2 */
+#define OMAP3430_ST_IVA2_SHIFT                          0
 #define OMAP3430_ST_IVA2_MASK                           (1 << 0)
 /* CM_IDLEST_PLL_IVA2 */
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c
index 14734746457c..c1875862679f 100644
--- a/arch/arm/mach-omap2/common-board-devices.c
+++ b/arch/arm/mach-omap2/common-board-devices.c
@@ -35,16 +35,6 @@ static struct omap2_mcspi_device_config ads7846_mcspi_config = {
        .turbo_mode     = 0,
 };
-/*
- * ADS7846 driver maybe request a gpio according to the value
- * of pdata->get_pendown_state, but we have done this. So set
- * get_pendown_state to avoid twice gpio requesting.
- */
-static int omap3_get_pendown_state(void)
-{
-        return !gpio_get_value(OMAP3_EVM_TS_GPIO);
-}
 static struct ads7846_platform_data ads7846_config = {
        .x_max                  = 0x0fff,
        .y_max                  = 0x0fff,
@@ -55,7 +45,6 @@ static struct ads7846_platform_data ads7846_config = {
        .debounce_rep           = 1,
        .gpio_pendown           = -EINVAL,
        .keep_vref_on           = 1,
-        .get_pendown_state      = &omap3_get_pendown_state,
 };
 static struct spi_board_info ads7846_spi_board_info __initdata = {
diff --git a/arch/arm/mach-omap2/common-board-devices.h b/arch/arm/mach-omap2/common-board-devices.h
index 4c4ef6a6166b..a0b4a42836ab 100644
--- a/arch/arm/mach-omap2/common-board-devices.h
+++ b/arch/arm/mach-omap2/common-board-devices.h
@@ -4,7 +4,6 @@
 #include "twl-common.h"
 #define NAND_BLOCK_SIZE SZ_128K
-#define OMAP3_EVM_TS_GPIO       175
 struct mtd_partition;
 struct ads7846_platform_data;
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c
index ee05e193fc61..288bee6cbb76 100644
--- a/arch/arm/mach-omap2/cpuidle44xx.c
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -238,8 +238,9 @@ int __init omap4_idle_init(void)
        for_each_cpu(cpu_id, cpu_online_mask) {
                dev = &per_cpu(omap4_idle_dev, cpu_id);
                dev->cpu = cpu_id;
+#ifdef CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED
                dev->coupled_cpus = *cpu_online_mask;
+#endif
                cpuidle_register_driver(&omap4_idle_driver);
                if (cpuidle_register_device(dev)) {
diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
index 471e62a74a16..76f9b3c2f586 100644
--- a/arch/arm/mach-omap2/mux.h
+++ b/arch/arm/mach-omap2/mux.h
@@ -127,7 +127,6 @@ struct omap_mux_partition {
 * @gpio:       GPIO number
 * @muxnames:   available signal modes for a ball
 * @balls:      available balls on the package
- * @partition:  mux partition
 */
 struct omap_mux {
        u16     reg_offset;
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c
index 05fdebfaa195..330d4c6e746b 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -46,7 +46,7 @@
 static void __iomem *wakeupgen_base;
 static void __iomem *sar_base;
 static DEFINE_SPINLOCK(wakeupgen_lock);
-static unsigned int irq_target_cpu[NR_IRQS];
+static unsigned int irq_target_cpu[MAX_IRQS];
 static unsigned int irq_banks = MAX_NR_REG_BANKS;
 static unsigned int max_irqs = MAX_IRQS;
 static unsigned int omap_secure_apis;
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 6ca8e519968d..37afbd173c2c 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1889,6 +1889,7 @@ static int _enable(struct omap_hwmod *oh)
                        _enable_sysc(oh);
                }
        } else {
+                _omap4_disable_module(oh);
                _disable_clocks(oh);
                pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
                         oh->name, r);
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index c9e38200216b..ce7e6068768f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -100,9 +100,9 @@ static struct omap_hwmod omap3xxx_mpu_hwmod = {
 /* IVA2 (IVA2) */
 static struct omap_hwmod_rst_info omap3xxx_iva_resets[] = {
-        { .name = "logic", .rst_shift = 0 },
+        { .name = "logic", .rst_shift = 0, .st_shift = 8 },
-        { .name = "seq0", .rst_shift = 1 },
+        { .name = "seq0", .rst_shift = 1, .st_shift = 9 },
-        { .name = "seq1", .rst_shift = 2 },
+        { .name = "seq1", .rst_shift = 2, .st_shift = 10 },
 };
 static struct omap_hwmod omap3xxx_iva_hwmod = {
@@ -112,6 +112,15 @@ static struct omap_hwmod omap3xxx_iva_hwmod = {
        .rst_lines      = omap3xxx_iva_resets,
        .rst_lines_cnt  = ARRAY_SIZE(omap3xxx_iva_resets),
        .main_clk       = "iva2_ck",
+        .prcm = {
+                .omap2 = {
+                        .module_offs = OMAP3430_IVA2_MOD,
+                        .prcm_reg_id = 1,
+                        .module_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT,
+                        .idlest_reg_id = 1,
+                        .idlest_idle_bit = OMAP3430_ST_IVA2_SHIFT,
+                }
+        },
 };
 /* timer class */
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 242aee498ceb..afb60917a948 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -4210,7 +4210,7 @@ static struct omap_hwmod_ocp_if omap44xx_dsp__iva = {
 };
 /* dsp -> sl2if */
-static struct omap_hwmod_ocp_if omap44xx_dsp__sl2if = {
+static struct omap_hwmod_ocp_if __maybe_unused omap44xx_dsp__sl2if = {
        .master         = &omap44xx_dsp_hwmod,
        .slave          = &omap44xx_sl2if_hwmod,
        .clk            = "dpll_iva_m5x2_ck",
@@ -4828,7 +4828,7 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iss = {
 };
 /* iva -> sl2if */
-static struct omap_hwmod_ocp_if omap44xx_iva__sl2if = {
+static struct omap_hwmod_ocp_if __maybe_unused omap44xx_iva__sl2if = {
        .master         = &omap44xx_iva_hwmod,
        .slave          = &omap44xx_sl2if_hwmod,
        .clk            = "dpll_iva_m5x2_ck",
@@ -5362,7 +5362,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__scrm = {
 };
 /* l3_main_2 -> sl2if */
-static struct omap_hwmod_ocp_if omap44xx_l3_main_2__sl2if = {
+static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l3_main_2__sl2if = {
        .master         = &omap44xx_l3_main_2_hwmod,
        .slave          = &omap44xx_sl2if_hwmod,
        .clk            = "l3_div_ck",
@@ -6032,7 +6032,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
        &omap44xx_l4_abe__dmic,
        &omap44xx_l4_abe__dmic_dma,
        &omap44xx_dsp__iva,
-        &omap44xx_dsp__sl2if,
+        /* &omap44xx_dsp__sl2if, */
        &omap44xx_l4_cfg__dsp,
        &omap44xx_l3_main_2__dss,
        &omap44xx_l4_per__dss,
@@ -6068,7 +6068,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
        &omap44xx_l4_per__i2c4,
        &omap44xx_l3_main_2__ipu,
        &omap44xx_l3_main_2__iss,
-        &omap44xx_iva__sl2if,
+        /* &omap44xx_iva__sl2if, */
        &omap44xx_l3_main_2__iva,
        &omap44xx_l4_wkup__kbd,
        &omap44xx_l4_cfg__mailbox,
@@ -6099,7 +6099,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
        &omap44xx_l4_cfg__cm_core,
        &omap44xx_l4_wkup__prm,
        &omap44xx_l4_wkup__scrm,
-        &omap44xx_l3_main_2__sl2if,
+        /* &omap44xx_l3_main_2__sl2if, */
        &omap44xx_l4_abe__slimbus1,
        &omap44xx_l4_abe__slimbus1_dma,
        &omap44xx_l4_per__slimbus2,
diff --git a/arch/arm/mach-omap2/opp4xxx_data.c b/arch/arm/mach-omap2/opp4xxx_data.c
index 2293ba27101b..c95415da23c2 100644
--- a/arch/arm/mach-omap2/opp4xxx_data.c
+++ b/arch/arm/mach-omap2/opp4xxx_data.c
@@ -94,7 +94,7 @@ int __init omap4_opp_init(void)
 {
        int r = -ENODEV;
-        if (!cpu_is_omap44xx())
+        if (!cpu_is_omap443x())
                return r;
        r = omap_init_opp_table(omap44xx_opp_def_list,
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index e4fc88c65dbd..05bd8f02723f 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -272,21 +272,16 @@ void omap_sram_idle(void)
        per_next_state = pwrdm_read_next_pwrst(per_pwrdm);
        core_next_state = pwrdm_read_next_pwrst(core_pwrdm);
-        if (mpu_next_state < PWRDM_POWER_ON) {
+        pwrdm_pre_transition(NULL);
-                pwrdm_pre_transition(mpu_pwrdm);
-                pwrdm_pre_transition(neon_pwrdm);
-        }
        /* PER */
        if (per_next_state < PWRDM_POWER_ON) {
-                pwrdm_pre_transition(per_pwrdm);
                per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0;
                omap2_gpio_prepare_for_idle(per_going_off);
        }
        /* CORE */
        if (core_next_state < PWRDM_POWER_ON) {
-                pwrdm_pre_transition(core_pwrdm);
                if (core_next_state == PWRDM_POWER_OFF) {
                        omap3_core_save_context();
                        omap3_cm_save_context();
@@ -339,20 +334,14 @@ void omap_sram_idle(void)
                        omap2_prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF_MASK,
                                               OMAP3430_GR_MOD,
                                               OMAP3_PRM_VOLTCTRL_OFFSET);
-                pwrdm_post_transition(core_pwrdm);
        }
        omap3_intc_resume_idle();
+        pwrdm_post_transition(NULL);
        /* PER */
-        if (per_next_state < PWRDM_POWER_ON) {
+        if (per_next_state < PWRDM_POWER_ON)
                omap2_gpio_resume_after_idle();
-                pwrdm_post_transition(per_pwrdm);
-        }
-        if (mpu_next_state < PWRDM_POWER_ON) {
-                pwrdm_post_transition(mpu_pwrdm);
-                pwrdm_post_transition(neon_pwrdm);
-        }
 }
 static void omap3_pm_idle(void)
diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S
index 9f6b83d1b193..91e71d8f46f0 100644
--- a/arch/arm/mach-omap2/sleep44xx.S
+++ b/arch/arm/mach-omap2/sleep44xx.S
@@ -56,9 +56,13 @@ ppa_por_params:
 * The restore function pointer is stored at CPUx_WAKEUP_NS_PA_ADDR_OFFSET.
 * It returns to the caller for CPU INACTIVE and ON power states or in case
 * CPU failed to transition to targeted OFF/DORMANT state.
+ *
+ * omap4_finish_suspend() calls v7_flush_dcache_all() which doesn't save
+ * stack frame and it expects the caller to take care of it. Hence the entire
+ * stack frame is saved to avoid possible stack corruption.
 */
 ENTRY(omap4_finish_suspend)
-        stmfd   sp!, {lr}
+        stmfd   sp!, {r4-r12, lr}
        cmp     r0, #0x0
        beq     do_WFI                          @ No lowpower state, jump to WFI
@@ -226,7 +230,7 @@ scu_gp_clear:
 skip_scu_gp_clear:
        isb
        dsb
-        ldmfd   sp!, {pc}
+        ldmfd   sp!, {r4-r12, pc}
 ENDPROC(omap4_finish_suspend)
 /*
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 2ff6d41ec6c6..2ba4f57dda86 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -260,6 +260,7 @@ static u32 notrace dmtimer_read_sched_clock(void)
        return 0;
 }
+#ifdef CONFIG_OMAP_32K_TIMER
 /* Setup free-running counter for clocksource */
 static int __init omap2_sync32k_clocksource_init(void)
 {
@@ -299,6 +300,12 @@ static int __init omap2_sync32k_clocksource_init(void)
        return ret;
 }
+#else
+static inline int omap2_sync32k_clocksource_init(void)
+{
+        return -ENODEV;
+}
+#endif
 static void __init omap2_gptimer_clocksource_init(int gptimer_id,
                                                const char *fck_source)
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index de47f170ba50..db5ff6642375 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -67,6 +67,7 @@ void __init omap_pmic_init(int bus, u32 clkrate,
                           const char *pmic_type, int pmic_irq,
                           struct twl4030_platform_data *pmic_data)
 {
+        omap_mux_init_signal("sys_nirq", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
        strncpy(pmic_i2c_board_info.type, pmic_type,
                sizeof(pmic_i2c_board_info.type));
        pmic_i2c_board_info.irq = pmic_irq;
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 9148b229d0de..a6cd14ab1e4e 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -109,7 +109,8 @@ void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
 {
        orion_ge00_init(eth_data,
                        ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM,
-                        IRQ_ORION5X_ETH_ERR);
+                        IRQ_ORION5X_ETH_ERR,
+                        MV643XX_TX_CSUM_DEFAULT_LIMIT);
 }
@@ -203,6 +204,13 @@ void __init orion5x_wdt_init(void)
 void __init orion5x_init_early(void)
 {
        orion_time_set_base(TIMER_VIRT_BASE);
+        /*
+         * Some Orion5x devices allocate their coherent buffers from atomic
+         * context. Increase size of atomic coherent pool to make sure such
+         * the allocations won't fail.
+         */
+        init_dma_coherent_pool_size(SZ_1M);
 }
 int orion5x_tclk;
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index 5905ed130e94..d89d87ae144c 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -953,12 +953,12 @@ static struct i2c_board_info raumfeld_connector_i2c_board_info __initdata = {
 static struct eeti_ts_platform_data eeti_ts_pdata = {
        .irq_active_high = 1,
+        .irq_gpio = GPIO_TOUCH_IRQ,
 };
 static struct i2c_board_info raumfeld_controller_i2c_board_info __initdata = {
        .type   = "eeti_ts",
        .addr   = 0x0a,
-        .irq    = PXA_GPIO_TO_IRQ(GPIO_TOUCH_IRQ),
        .platform_data = &eeti_ts_pdata,
 };
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index e24961109b70..d56b0f7f2b20 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -483,7 +483,7 @@ config MACH_NEO1973_GTA02
        select I2C
        select POWER_SUPPLY
        select MACH_NEO1973
-        select S3C2410_PWM
+        select S3C24XX_PWM
        select S3C_DEV_USB_HOST
        help
           Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone
@@ -493,7 +493,7 @@ config MACH_RX1950
        select S3C24XX_DCLK
        select PM_H1940 if PM
        select I2C
-        select S3C2410_PWM
+        select S3C24XX_PWM
        select S3C_DEV_NAND
        select S3C2410_IOTIMING if S3C2440_CPUFREQ
        select S3C2440_XTAL_16934400
diff --git a/arch/arm/mach-s3c24xx/include/mach/dma.h b/arch/arm/mach-s3c24xx/include/mach/dma.h
index 454831b66037..ee99fd56c043 100644
--- a/arch/arm/mach-s3c24xx/include/mach/dma.h
+++ b/arch/arm/mach-s3c24xx/include/mach/dma.h
@@ -24,7 +24,8 @@
 */
 enum dma_ch {
-        DMACH_XD0,
+        DMACH_DT_PROP = -1,     /* not yet supported, do not use */
+        DMACH_XD0 = 0,
        DMACH_XD1,
        DMACH_SDI,
        DMACH_SPI0,
diff --git a/arch/arm/mach-sa1100/include/mach/SA-1111.h b/arch/arm/mach-sa1100/include/mach/SA-1111.h
deleted file mode 100644
index c38f60915cb6..000000000000
--- a/arch/arm/mach-sa1100/include/mach/SA-1111.h
+++ /dev/null
@@ -1,5 +0,0 @@
-/*
- * Moved to new location
- */
-#warning using old SA-1111.h - update to <asm/hardware/sa1111.h>
-#include <asm/hardware/sa1111.h>
diff --git a/arch/arm/mach-sa1100/include/mach/lart.h b/arch/arm/mach-sa1100/include/mach/lart.h
deleted file mode 100644
index 8a5482d908db..000000000000
--- a/arch/arm/mach-sa1100/include/mach/lart.h
+++ /dev/null
@@ -1,13 +0,0 @@
-#ifndef _INCLUDE_LART_H
-#define _INCLUDE_LART_H
-#define LART_GPIO_ETH0                  GPIO_GPIO0
-#define LART_IRQ_ETH0                   IRQ_GPIO0
-#define LART_GPIO_IDE                   GPIO_GPIO1
-#define LART_IRQ_IDE                    IRQ_GPIO1
-#define LART_GPIO_UCB1200               GPIO_GPIO18
-#define LART_IRQ_UCB1200                IRQ_GPIO18
-#endif
diff --git a/arch/arm/mach-sa1100/leds-hackkit.c b/arch/arm/mach-sa1100/leds-hackkit.c
index 6a2352436e62..f8e47235babe 100644
--- a/arch/arm/mach-sa1100/leds-hackkit.c
+++ b/arch/arm/mach-sa1100/leds-hackkit.c
@@ -10,6 +10,7 @@
 * as cpu led, the green one is used as timer led.
 */
 #include <linux/init.h>
+#include <linux/io.h>
 #include <mach/hardware.h>
 #include <asm/leds.h>
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index cf10f92856dc..453a6e50db8b 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -520,13 +520,14 @@ static struct platform_device hdmi_lcdc_device = {
 };
 /* GPIO KEY */
-#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 }
+#define GPIO_KEY(c, g, d, ...) \
+        { .code = c, .gpio = g, .desc = d, .active_low = 1, __VA_ARGS__ }
 static struct gpio_keys_button gpio_buttons[] = {
-        GPIO_KEY(KEY_POWER,     GPIO_PORT99,    "SW1"),
+        GPIO_KEY(KEY_POWER,     GPIO_PORT99,    "SW3", .wakeup = 1),
-        GPIO_KEY(KEY_BACK,      GPIO_PORT100,   "SW2"),
+        GPIO_KEY(KEY_BACK,      GPIO_PORT100,   "SW4"),
-        GPIO_KEY(KEY_MENU,      GPIO_PORT97,    "SW3"),
+        GPIO_KEY(KEY_MENU,      GPIO_PORT97,    "SW5"),
-        GPIO_KEY(KEY_HOME,      GPIO_PORT98,    "SW4"),
+        GPIO_KEY(KEY_HOME,      GPIO_PORT98,    "SW6"),
 };
 static struct gpio_keys_platform_data gpio_key_info = {
@@ -901,8 +902,8 @@ static struct platform_device *eva_devices[] __initdata = {
        &camera_device,
        &ceu0_device,
        &fsi_device,
-        &fsi_hdmi_device,
        &fsi_wm8978_device,
+        &fsi_hdmi_device,
 };
 static void __init eva_clock_init(void)
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
index 53b7ea92c32c..3b8a0171c3cb 100644
--- a/arch/arm/mach-shmobile/board-kzm9g.c
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -346,11 +346,11 @@ static struct resource sh_mmcif_resources[] = {
                .flags  = IORESOURCE_MEM,
        },
        [1] = {
-                .start  = gic_spi(141),
+                .start  = gic_spi(140),
                .flags  = IORESOURCE_IRQ,
        },
        [2] = {
-                .start  = gic_spi(140),
+                .start  = gic_spi(141),
                .flags  = IORESOURCE_IRQ,
        },
 };
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 7ea2b31e3199..c129542f6aed 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -695,6 +695,7 @@ static struct platform_device usbhs0_device = {
 *  - J30 "open"
 *  - modify usbhs1_get_id() USBHS_HOST -> USBHS_GADGET
 *  - add .get_vbus = usbhs_get_vbus in usbhs1_private
+ *  - check usbhs0_device(pio)/usbhs1_device(irq) order in mackerel_devices.
 */
 #define IRQ8 evt2irq(0x0300)
 #define USB_PHY_MODE            (1 << 4)
@@ -1325,8 +1326,8 @@ static struct platform_device *mackerel_devices[] __initdata = {
        &nor_flash_device,
        &smc911x_device,
        &lcdc_device,
-        &usbhs1_device,
        &usbhs0_device,
+        &usbhs1_device,
        &leds_device,
        &fsi_device,
        &fsi_ak4643_device,
diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
index 3a528cf4366c..fcf5a47f4772 100644
--- a/arch/arm/mach-shmobile/board-marzen.c
+++ b/arch/arm/mach-shmobile/board-marzen.c
@@ -67,7 +67,7 @@ static struct smsc911x_platform_config smsc911x_platdata = {
 static struct platform_device eth_device = {
        .name           = "smsc911x",
-        .id             = 0,
+        .id             = -1,
        .dev  = {
                .platform_data = &smsc911x_platdata,
        },
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c
index ee447404c857..588555a67d9c 100644
--- a/arch/arm/mach-shmobile/intc-sh73a0.c
+++ b/arch/arm/mach-shmobile/intc-sh73a0.c
@@ -259,9 +259,9 @@ static int sh73a0_set_wake(struct irq_data *data, unsigned int on)
        return 0; /* always allow wakeup */
 }
-#define RELOC_BASE 0x1000
+#define RELOC_BASE 0x1200
-/* INTCA IRQ pins at INTCS + 0x1000 to make space for GIC+INTC handling */
+/* INTCA IRQ pins at INTCS + RELOC_BASE to make space for GIC+INTC handling */
 #define INTCS_VECT_RELOC(n, vect) INTCS_VECT((n), (vect) + RELOC_BASE)
 INTC_IRQ_PINS_32(intca_irq_pins, 0xe6900000,
diff --git a/arch/arm/mach-tegra/board-harmony-power.c b/arch/arm/mach-tegra/board-harmony-power.c
index 8fd387bf31f0..b7344beec102 100644
--- a/arch/arm/mach-tegra/board-harmony-power.c
+++ b/arch/arm/mach-tegra/board-harmony-power.c
@@ -51,7 +51,7 @@ static struct regulator_init_data ldo0_data = {
        .consumer_supplies = tps658621_ldo0_supply,
 };
-#define HARMONY_REGULATOR_INIT(_id, _name, _supply, _minmv, _maxmv)     \
+#define HARMONY_REGULATOR_INIT(_id, _name, _supply, _minmv, _maxmv, _on)\
        static struct regulator_init_data _id##_data = {                \
                .supply_regulator = _supply,                            \
                .constraints = {                                        \
@@ -63,21 +63,22 @@ static struct regulator_init_data ldo0_data = {
                        .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
                                           REGULATOR_CHANGE_STATUS |    \
                                           REGULATOR_CHANGE_VOLTAGE),   \
+                        .always_on = _on,                               \
                },                                                      \
        }
-HARMONY_REGULATOR_INIT(sm0,  "vdd_sm0",  "vdd_sys", 725, 1500);
+HARMONY_REGULATOR_INIT(sm0,  "vdd_sm0",  "vdd_sys", 725, 1500, 1);
-HARMONY_REGULATOR_INIT(sm1,  "vdd_sm1",  "vdd_sys", 725, 1500);
+HARMONY_REGULATOR_INIT(sm1,  "vdd_sm1",  "vdd_sys", 725, 1500, 1);
-HARMONY_REGULATOR_INIT(sm2,  "vdd_sm2",  "vdd_sys", 3000, 4550);
+HARMONY_REGULATOR_INIT(sm2,  "vdd_sm2",  "vdd_sys", 3000, 4550, 1);
-HARMONY_REGULATOR_INIT(ldo1, "vdd_ldo1", "vdd_sm2", 725, 1500);
+HARMONY_REGULATOR_INIT(ldo1, "vdd_ldo1", "vdd_sm2", 725, 1500, 1);
-HARMONY_REGULATOR_INIT(ldo2, "vdd_ldo2", "vdd_sm2", 725, 1500);
+HARMONY_REGULATOR_INIT(ldo2, "vdd_ldo2", "vdd_sm2", 725, 1500, 0);
-HARMONY_REGULATOR_INIT(ldo3, "vdd_ldo3", "vdd_sm2", 1250, 3300);
+HARMONY_REGULATOR_INIT(ldo3, "vdd_ldo3", "vdd_sm2", 1250, 3300, 1);
-HARMONY_REGULATOR_INIT(ldo4, "vdd_ldo4", "vdd_sm2", 1700, 2475);
+HARMONY_REGULATOR_INIT(ldo4, "vdd_ldo4", "vdd_sm2", 1700, 2475, 1);
-HARMONY_REGULATOR_INIT(ldo5, "vdd_ldo5", NULL,      1250, 3300);
+HARMONY_REGULATOR_INIT(ldo5, "vdd_ldo5", NULL,      1250, 3300, 1);
-HARMONY_REGULATOR_INIT(ldo6, "vdd_ldo6", "vdd_sm2", 1250, 3300);
+HARMONY_REGULATOR_INIT(ldo6, "vdd_ldo6", "vdd_sm2", 1250, 3300, 0);
-HARMONY_REGULATOR_INIT(ldo7, "vdd_ldo7", "vdd_sm2", 1250, 3300);
+HARMONY_REGULATOR_INIT(ldo7, "vdd_ldo7", "vdd_sm2", 1250, 3300, 0);
-HARMONY_REGULATOR_INIT(ldo8, "vdd_ldo8", "vdd_sm2", 1250, 3300);
+HARMONY_REGULATOR_INIT(ldo8, "vdd_ldo8", "vdd_sm2", 1250, 3300, 0);
-HARMONY_REGULATOR_INIT(ldo9, "vdd_ldo9", "vdd_sm2", 1250, 3300);
+HARMONY_REGULATOR_INIT(ldo9, "vdd_ldo9", "vdd_sm2", 1250, 3300, 1);
 #define TPS_REG(_id, _data)                     \
        {                                       \
@@ -119,9 +120,10 @@ static struct i2c_board_info __initdata harmony_regulators[] = {
 int __init harmony_regulator_init(void)
 {
+        regulator_register_always_on(0, "vdd_sys",
+                NULL, 0, 5000000);
        if (machine_is_harmony()) {
-                regulator_register_always_on(0, "vdd_sys",
-                        NULL, 0, 5000000);
                i2c_register_board_info(3, harmony_regulators, 1);
        } else { /* Harmony, booted using device tree */
                struct device_node *np;
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index c013bbf79cac..53d3d46dec12 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -41,7 +41,6 @@ config MACH_HREFV60
 config MACH_SNOWBALL
        bool "U8500 Snowball platform"
        select MACH_MOP500
-        select LEDS_GPIO
        help
          Include support for the snowball development platform.
diff --git a/arch/arm/mach-ux500/board-mop500-msp.c b/arch/arm/mach-ux500/board-mop500-msp.c
index 996048038743..df15646036aa 100644
--- a/arch/arm/mach-ux500/board-mop500-msp.c
+++ b/arch/arm/mach-ux500/board-mop500-msp.c
@@ -191,9 +191,9 @@ static struct platform_device *db8500_add_msp_i2s(struct device *parent,
        return pdev;
 }
-/* Platform device for ASoC U8500 machine */
+/* Platform device for ASoC MOP500 machine */
-static struct platform_device snd_soc_u8500 = {
+static struct platform_device snd_soc_mop500 = {
-                .name = "snd-soc-u8500",
+                .name = "snd-soc-mop500",
                .id = 0,
                .dev = {
                        .platform_data = NULL,
@@ -227,8 +227,8 @@ int mop500_msp_init(struct device *parent)
 {
        struct platform_device *msp1;
-        pr_info("%s: Register platform-device 'snd-soc-u8500'.\n", __func__);
+        pr_info("%s: Register platform-device 'snd-soc-mop500'.\n", __func__);
-        platform_device_register(&snd_soc_u8500);
+        platform_device_register(&snd_soc_mop500);
        pr_info("Initialize MSP I2S-devices.\n");
        db8500_add_msp_i2s(parent, 0, U8500_MSP0_BASE, IRQ_DB8500_MSP0,
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 8674a890fd1c..a534d8880de1 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -797,6 +797,7 @@ static void __init u8500_init_machine(void)
                                ARRAY_SIZE(mop500_platform_devs));
                mop500_sdi_init(parent);
+                mop500_msp_init(parent);
                i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
                i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
                i2c_register_board_info(2, mop500_i2c2_devices,
@@ -804,6 +805,8 @@ static void __init u8500_init_machine(void)
                mop500_uib_init();
+        } else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
+                mop500_msp_init(parent);
        } else if (of_machine_is_compatible("st-ericsson,hrefv60+")) {
                /*
                 * The HREFv60 board removed a GPIO expander and routed
@@ -815,6 +818,7 @@ static void __init u8500_init_machine(void)
                                ARRAY_SIZE(mop500_platform_devs));
                hrefv60_sdi_init(parent);
+                mop500_msp_init(parent);
                i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
                i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 2a8e380501e8..97ec2565805a 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -368,14 +368,18 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask)
                /* l2x0 controller is disabled */
                writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL);
-                l2x0_saved_regs.aux_ctrl = aux;
                l2x0_inv_all();
                /* enable L2X0 */
                writel_relaxed(1, l2x0_base + L2X0_CTRL);
        }
+        /* Re-read it in case some bits are reserved. */
+        aux = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
+        /* Save the value for resuming. */
+        l2x0_saved_regs.aux_ctrl = aux;
        outer_cache.inv_range = l2x0_inv_range;
        outer_cache.clean_range = l2x0_clean_range;
        outer_cache.flush_range = l2x0_flush_range;
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 39e3fb3db801..3b172275262e 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -211,6 +211,9 @@ ENTRY(v7_coherent_user_range)
 * isn't mapped, fail with -EFAULT.
 */
 9001:
+#ifdef CONFIG_ARM_ERRATA_775420
+        dsb
+#endif
        mov     r0, #-EFAULT
        mov     pc, lr
 UNWIND(.fnend          )
diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
index 119bc52ab93e..4e07eec1270d 100644
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
@@ -63,10 +63,11 @@ static int contextidr_notifier(struct notifier_block *unused, unsigned long cmd,
        pid = task_pid_nr(thread->task) << ASID_BITS;
        asm volatile(
        "       mrc     p15, 0, %0, c13, c0, 1\n"
-        "       bfi     %1, %0, #0, %2\n"
+        "       and     %0, %0, %2\n"
-        "       mcr     p15, 0, %1, c13, c0, 1\n"
+        "       orr     %0, %0, %1\n"
+        "       mcr     p15, 0, %0, c13, c0, 1\n"
        : "=r" (contextidr), "+r" (pid)
-        : "I" (ASID_BITS));
+        : "I" (~ASID_MASK));
        isb();
        return NOTIFY_OK;
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index c2cdf6500f75..13f555d62491 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -267,17 +267,19 @@ static void __dma_free_remap(void *cpu_addr, size_t size)
        vunmap(cpu_addr);
 }
+#define DEFAULT_DMA_COHERENT_POOL_SIZE  SZ_256K
 struct dma_pool {
        size_t size;
        spinlock_t lock;
        unsigned long *bitmap;
        unsigned long nr_pages;
        void *vaddr;
-        struct page *page;
+        struct page **pages;
 };
 static struct dma_pool atomic_pool = {
-        .size = SZ_256K,
+        .size = DEFAULT_DMA_COHERENT_POOL_SIZE,
 };
 static int __init early_coherent_pool(char *p)
@@ -287,6 +289,21 @@ static int __init early_coherent_pool(char *p)
 }
 early_param("coherent_pool", early_coherent_pool);
+void __init init_dma_coherent_pool_size(unsigned long size)
+{
+        /*
+         * Catch any attempt to set the pool size too late.
+         */
+        BUG_ON(atomic_pool.vaddr);
+        /*
+         * Set architecture specific coherent pool size only if
+         * it has not been changed by kernel command line parameter.
+         */
+        if (atomic_pool.size == DEFAULT_DMA_COHERENT_POOL_SIZE)
+                atomic_pool.size = size;
+}
 /*
 * Initialise the coherent pool for atomic allocations.
 */
@@ -297,6 +314,7 @@ static int __init atomic_pool_init(void)
        unsigned long nr_pages = pool->size >> PAGE_SHIFT;
        unsigned long *bitmap;
        struct page *page;
+        struct page **pages;
        void *ptr;
        int bitmap_size = BITS_TO_LONGS(nr_pages) * sizeof(long);
@@ -304,21 +322,33 @@ static int __init atomic_pool_init(void)
        if (!bitmap)
                goto no_bitmap;
+        pages = kzalloc(nr_pages * sizeof(struct page *), GFP_KERNEL);
+        if (!pages)
+                goto no_pages;
        if (IS_ENABLED(CONFIG_CMA))
                ptr = __alloc_from_contiguous(NULL, pool->size, prot, &page);
        else
                ptr = __alloc_remap_buffer(NULL, pool->size, GFP_KERNEL, prot,
                                           &page, NULL);
        if (ptr) {
+                int i;
+                for (i = 0; i < nr_pages; i++)
+                        pages[i] = page + i;
                spin_lock_init(&pool->lock);
                pool->vaddr = ptr;
-                pool->page = page;
+                pool->pages = pages;
                pool->bitmap = bitmap;
                pool->nr_pages = nr_pages;
                pr_info("DMA: preallocated %u KiB pool for atomic coherent allocations\n",
                       (unsigned)pool->size / 1024);
                return 0;
        }
+        kfree(pages);
+no_pages:
        kfree(bitmap);
 no_bitmap:
        pr_err("DMA: failed to allocate %u KiB pool for atomic coherent allocation\n",
@@ -358,7 +388,7 @@ void __init dma_contiguous_remap(void)
                if (end > arm_lowmem_limit)
                        end = arm_lowmem_limit;
                if (start >= end)
-                        return;
+                        continue;
                map.pfn = __phys_to_pfn(start);
                map.virtual = __phys_to_virt(start);
@@ -423,7 +453,7 @@ static void *__alloc_from_pool(size_t size, struct page **ret_page)
        unsigned int pageno;
        unsigned long flags;
        void *ptr = NULL;
-        size_t align;
+        unsigned long align_mask;
        if (!pool->vaddr) {
                WARN(1, "coherent pool not initialised!\n");
@@ -435,35 +465,53 @@ static void *__alloc_from_pool(size_t size, struct page **ret_page)
         * small, so align them to their order in pages, minimum is a page
         * size. This helps reduce fragmentation of the DMA space.
         */
-        align = PAGE_SIZE << get_order(size);
+        align_mask = (1 << get_order(size)) - 1;
        spin_lock_irqsave(&pool->lock, flags);
        pageno = bitmap_find_next_zero_area(pool->bitmap, pool->nr_pages,
-                                            0, count, (1 << align) - 1);
+                                            0, count, align_mask);
        if (pageno < pool->nr_pages) {
                bitmap_set(pool->bitmap, pageno, count);
                ptr = pool->vaddr + PAGE_SIZE * pageno;
-                *ret_page = pool->page + pageno;
+                *ret_page = pool->pages[pageno];
+        } else {
+                pr_err_once("ERROR: %u KiB atomic DMA coherent pool is too small!\n"
+                            "Please increase it with coherent_pool= kernel parameter!\n",
+                            (unsigned)pool->size / 1024);
        }
        spin_unlock_irqrestore(&pool->lock, flags);
        return ptr;
 }
+static bool __in_atomic_pool(void *start, size_t size)
+{
+        struct dma_pool *pool = &atomic_pool;
+        void *end = start + size;
+        void *pool_start = pool->vaddr;
+        void *pool_end = pool->vaddr + pool->size;
+        if (start < pool_start || start >= pool_end)
+                return false;
+        if (end <= pool_end)
+                return true;
+        WARN(1, "Wrong coherent size(%p-%p) from atomic pool(%p-%p)\n",
+             start, end - 1, pool_start, pool_end - 1);
+        return false;
+}
 static int __free_from_pool(void *start, size_t size)
 {
        struct dma_pool *pool = &atomic_pool;
        unsigned long pageno, count;
        unsigned long flags;
-        if (start < pool->vaddr || start > pool->vaddr + pool->size)
+        if (!__in_atomic_pool(start, size))
                return 0;
-        if (start + size > pool->vaddr + pool->size) {
-                WARN(1, "freeing wrong coherent size from pool\n");
-                return 0;
-        }
        pageno = (start - pool->vaddr) >> PAGE_SHIFT;
        count = size >> PAGE_SHIFT;
@@ -648,12 +696,12 @@ void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
        if (arch_is_coherent() || nommu()) {
                __dma_free_buffer(page, size);
+        } else if (__free_from_pool(cpu_addr, size)) {
+                return;
        } else if (!IS_ENABLED(CONFIG_CMA)) {
                __dma_free_remap(cpu_addr, size);
                __dma_free_buffer(page, size);
        } else {
-                if (__free_from_pool(cpu_addr, size))
-                        return;
                /*
                 * Non-atomic allocations cannot be freed with IRQs disabled
                 */
@@ -1090,10 +1138,22 @@ static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t si
        return 0;
 }
+static struct page **__atomic_get_pages(void *addr)
+{
+        struct dma_pool *pool = &atomic_pool;
+        struct page **pages = pool->pages;
+        int offs = (addr - pool->vaddr) >> PAGE_SHIFT;
+        return pages + offs;
+}
 static struct page **__iommu_get_pages(void *cpu_addr, struct dma_attrs *attrs)
 {
        struct vm_struct *area;
+        if (__in_atomic_pool(cpu_addr, PAGE_SIZE))
+                return __atomic_get_pages(cpu_addr);
        if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
                return cpu_addr;
@@ -1103,6 +1163,34 @@ static struct page **__iommu_get_pages(void *cpu_addr, struct dma_attrs *attrs)
        return NULL;
 }
+static void *__iommu_alloc_atomic(struct device *dev, size_t size,
+                                  dma_addr_t *handle)
+{
+        struct page *page;
+        void *addr;
+        addr = __alloc_from_pool(size, &page);
+        if (!addr)
+                return NULL;
+        *handle = __iommu_create_mapping(dev, &page, size);
+        if (*handle == DMA_ERROR_CODE)
+                goto err_mapping;
+        return addr;
+err_mapping:
+        __free_from_pool(addr, size);
+        return NULL;
+}
+static void __iommu_free_atomic(struct device *dev, struct page **pages,
+                                dma_addr_t handle, size_t size)
+{
+        __iommu_remove_mapping(dev, handle, size);
+        __free_from_pool(page_address(pages[0]), size);
+}
 static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
            dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
 {
@@ -1113,6 +1201,9 @@ static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
        *handle = DMA_ERROR_CODE;
        size = PAGE_ALIGN(size);
+        if (gfp & GFP_ATOMIC)
+                return __iommu_alloc_atomic(dev, size, handle);
        pages = __iommu_alloc_buffer(dev, size, gfp);
        if (!pages)
                return NULL;
@@ -1179,6 +1270,11 @@ void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
                return;
        }
+        if (__in_atomic_pool(cpu_addr, size)) {
+                __iommu_free_atomic(dev, pages, handle, size);
+                return;
+        }
        if (!dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs)) {
                unmap_kernel_range((unsigned long)cpu_addr, size);
                vunmap(cpu_addr);
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index 77458548e031..40ca11ed6e5f 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -231,8 +231,6 @@ void __sync_icache_dcache(pte_t pteval)
        struct page *page;
        struct address_space *mapping;
-        if (!pte_present_user(pteval))
-                return;
        if (cache_is_vipt_nonaliasing() && !pte_exec(pteval))
                /* only flush non-aliasing VIPT caches for exec mappings */
                return;
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index 6776160618ef..a8ee92da3544 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -55,6 +55,9 @@ extern void __flush_dcache_page(struct address_space *mapping, struct page *page
 /* permanent static mappings from iotable_init() */
 #define VM_ARM_STATIC_MAPPING   0x40000000
+/* empty mapping */
+#define VM_ARM_EMPTY_MAPPING    0x20000000
 /* mapping type (attributes) for permanent static mappings */
 #define VM_ARM_MTYPE(mt)                ((mt) << 20)
 #define VM_ARM_MTYPE_MASK       (0x1f << 20)
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 4c2d0451e84a..c2fa21d0103e 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -807,7 +807,7 @@ static void __init pmd_empty_section_gap(unsigned long addr)
        vm = early_alloc_aligned(sizeof(*vm), __alignof__(*vm));
        vm->addr = (void *)addr;
        vm->size = SECTION_SIZE;
-        vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING;
+        vm->flags = VM_IOREMAP | VM_ARM_EMPTY_MAPPING;
        vm->caller = pmd_empty_section_gap;
        vm_area_add_early(vm);
 }
@@ -820,7 +820,7 @@ static void __init fill_pmd_gaps(void)
        /* we're still single threaded hence no lock needed here */
        for (vm = vmlist; vm; vm = vm->next) {
-                if (!(vm->flags & VM_ARM_STATIC_MAPPING))
+                if (!(vm->flags & (VM_ARM_STATIC_MAPPING | VM_ARM_EMPTY_MAPPING)))
                        continue;
                addr = (unsigned long)vm->addr;
                if (addr < next)
@@ -961,8 +961,8 @@ void __init sanity_check_meminfo(void)
                 * Check whether this memory bank would partially overlap
                 * the vmalloc area.
                 */
-                if (__va(bank->start + bank->size) > vmalloc_min ||
+                if (__va(bank->start + bank->size - 1) >= vmalloc_min ||
-                    __va(bank->start + bank->size) < __va(bank->start)) {
+                    __va(bank->start + bank->size - 1) <= __va(bank->start)) {
                        unsigned long newsize = vmalloc_min - __va(bank->start);
                        printk(KERN_NOTICE "Truncating RAM at %.8llx-%.8llx "
                               "to -%.8llx (vmalloc region overlap).\n",
diff --git a/arch/arm/mm/tlb-v7.S b/arch/arm/mm/tlb-v7.S
index c2021139cb56..ea94765acf9a 100644
--- a/arch/arm/mm/tlb-v7.S
+++ b/arch/arm/mm/tlb-v7.S
@@ -38,10 +38,10 @@ ENTRY(v7wbi_flush_user_tlb_range)
        dsb
        mov     r0, r0, lsr #PAGE_SHIFT         @ align address
        mov     r1, r1, lsr #PAGE_SHIFT
-#ifdef CONFIG_ARM_ERRATA_720789
-        mov     r3, #0
-#else
        asid    r3, r3                          @ mask ASID
+#ifdef CONFIG_ARM_ERRATA_720789
+        ALT_SMP(W(mov)  r3, #0  )
+        ALT_UP(W(nop)           )
 #endif
        orr     r0, r3, r0, lsl #PAGE_SHIFT     @ Create initial MVA
        mov     r1, r1, lsl #PAGE_SHIFT
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index 627d94f1b010..ec466400a200 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -98,6 +98,7 @@
 #define MX25_INT_UART1          (NR_IRQS_LEGACY + 45)
 #define MX25_INT_GPIO2          (NR_IRQS_LEGACY + 51)
 #define MX25_INT_GPIO1          (NR_IRQS_LEGACY + 52)
+#define MX25_INT_GPT1           (NR_IRQS_LEGACY + 54)
 #define MX25_INT_FEC            (NR_IRQS_LEGACY + 57)
 #define MX25_DMA_REQ_SSI2_RX1   22
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 626ad8cad7a9..938b50a33439 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -189,6 +189,7 @@ struct omap_dm_timer *omap_dm_timer_request(void)
                timer->reserved = 1;
                break;
        }
+        spin_unlock_irqrestore(&dm_timer_lock, flags);
        if (timer) {
                ret = omap_dm_timer_prepare(timer);
@@ -197,7 +198,6 @@ struct omap_dm_timer *omap_dm_timer_request(void)
                        timer = NULL;
                }
        }
-        spin_unlock_irqrestore(&dm_timer_lock, flags);
        if (!timer)
                pr_debug("%s: timer request failed!\n", __func__);
@@ -220,6 +220,7 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
                        break;
                }
        }
+        spin_unlock_irqrestore(&dm_timer_lock, flags);
        if (timer) {
                ret = omap_dm_timer_prepare(timer);
@@ -228,7 +229,6 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
                        timer = NULL;
                }
        }
-        spin_unlock_irqrestore(&dm_timer_lock, flags);
        if (!timer)
                pr_debug("%s: timer%d request failed!\n", __func__, id);
@@ -258,7 +258,7 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_enable);
 void omap_dm_timer_disable(struct omap_dm_timer *timer)
 {
-        pm_runtime_put(&timer->pdev->dev);
+        pm_runtime_put_sync(&timer->pdev->dev);
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_disable);
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 68b180edcfff..bb5d08a70dbc 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -372,7 +372,8 @@ IS_OMAP_TYPE(3430, 0x3430)
 #define cpu_class_is_omap1()    (cpu_is_omap7xx() || cpu_is_omap15xx() || \
                                cpu_is_omap16xx())
 #define cpu_class_is_omap2()    (cpu_is_omap24xx() || cpu_is_omap34xx() || \
-                                cpu_is_omap44xx() || soc_is_omap54xx())
+                                cpu_is_omap44xx() || soc_is_omap54xx() || \
+                                soc_is_am33xx())
 /* Various silicon revisions for omap2 */
 #define OMAP242X_CLASS          0x24200024
diff --git a/arch/arm/plat-omap/include/plat/multi.h b/arch/arm/plat-omap/include/plat/multi.h
index 045e320f1067..324d31b14852 100644
--- a/arch/arm/plat-omap/include/plat/multi.h
+++ b/arch/arm/plat-omap/include/plat/multi.h
@@ -108,4 +108,13 @@
 # endif
 #endif
+#ifdef CONFIG_SOC_AM33XX
+# ifdef OMAP_NAME
+#  undef  MULTI_OMAP2
+#  define MULTI_OMAP2
+# else
+#  define OMAP_NAME am33xx
+# endif
+#endif
 #endif  /* __PLAT_OMAP_MULTI_H */
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h
index b8d19a136781..7f7b112acccb 100644
--- a/arch/arm/plat-omap/include/plat/uncompress.h
+++ b/arch/arm/plat-omap/include/plat/uncompress.h
@@ -110,7 +110,7 @@ static inline void flush(void)
        _DEBUG_LL_ENTRY(mach, AM33XX_UART##p##_BASE, OMAP_PORT_SHIFT,   \
                AM33XXUART##p)
-static inline void __arch_decomp_setup(unsigned long arch_id)
+static inline void arch_decomp_setup(void)
 {
        int port = 0;
@@ -198,8 +198,6 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
        } while (0);
 }
-#define arch_decomp_setup()     __arch_decomp_setup(arch_id)
 /*
 * nothing to do
 */
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 766181cb5c95..024f3b08db29 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -68,6 +68,7 @@
 static unsigned long omap_sram_start;
 static void __iomem *omap_sram_base;
+static unsigned long omap_sram_skip;
 static unsigned long omap_sram_size;
 static void __iomem *omap_sram_ceil;
@@ -106,6 +107,7 @@ static int is_sram_locked(void)
 */
 static void __init omap_detect_sram(void)
 {
+        omap_sram_skip = SRAM_BOOTLOADER_SZ;
        if (cpu_class_is_omap2()) {
                if (is_sram_locked()) {
                        if (cpu_is_omap34xx()) {
@@ -113,6 +115,7 @@ static void __init omap_detect_sram(void)
                                if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) ||
                                    (omap_type() == OMAP2_DEVICE_TYPE_SEC)) {
                                        omap_sram_size = 0x7000; /* 28K */
+                                        omap_sram_skip += SZ_16K;
                                } else {
                                        omap_sram_size = 0x8000; /* 32K */
                                }
@@ -175,8 +178,10 @@ static void __init omap_map_sram(void)
                return;
 #ifdef CONFIG_OMAP4_ERRATA_I688
+        if (cpu_is_omap44xx()) {
                omap_sram_start += PAGE_SIZE;
                omap_sram_size -= SZ_16K;
+        }
 #endif
        if (cpu_is_omap34xx()) {
                /*
@@ -203,8 +208,8 @@ static void __init omap_map_sram(void)
         * Looks like we need to preserve some bootloader code at the
         * beginning of SRAM for jumping to flash for reboot to work...
         */
-        memset_io(omap_sram_base + SRAM_BOOTLOADER_SZ, 0,
+        memset_io(omap_sram_base + omap_sram_skip, 0,
-                  omap_sram_size - SRAM_BOOTLOADER_SZ);
+                  omap_sram_size - omap_sram_skip);
 }
 /*
@@ -218,7 +223,7 @@ void *omap_sram_push_address(unsigned long size)
 {
        unsigned long available, new_ceil = (unsigned long)omap_sram_ceil;
-        available = omap_sram_ceil - (omap_sram_base + SRAM_BOOTLOADER_SZ);
+        available = omap_sram_ceil - (omap_sram_base + omap_sram_skip);
        if (size > available) {
                pr_err("Not enough space in SRAM\n");
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
index d245a87dc014..b8b747a9d360 100644
--- a/arch/arm/plat-orion/common.c
+++ b/arch/arm/plat-orion/common.c
@@ -291,10 +291,12 @@ static struct platform_device orion_ge00 = {
 void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
                            unsigned long mapbase,
                            unsigned long irq,
-                            unsigned long irq_err)
+                            unsigned long irq_err,
+                            unsigned int tx_csum_limit)
 {
        fill_resources(&orion_ge00_shared, orion_ge00_shared_resources,
                       mapbase + 0x2000, SZ_16K - 1, irq_err);
+        orion_ge00_shared_data.tx_csum_limit = tx_csum_limit;
        ge_complete(&orion_ge00_shared_data,
                    orion_ge00_resources, irq, &orion_ge00_shared,
                    eth_data, &orion_ge00);
@@ -343,10 +345,12 @@ static struct platform_device orion_ge01 = {
 void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
                            unsigned long mapbase,
                            unsigned long irq,
-                            unsigned long irq_err)
+                            unsigned long irq_err,
+                            unsigned int tx_csum_limit)
 {
        fill_resources(&orion_ge01_shared, orion_ge01_shared_resources,
                       mapbase + 0x2000, SZ_16K - 1, irq_err);
+        orion_ge01_shared_data.tx_csum_limit = tx_csum_limit;
        ge_complete(&orion_ge01_shared_data,
                    orion_ge01_resources, irq, &orion_ge01_shared,
                    eth_data, &orion_ge01);
diff --git a/arch/arm/plat-orion/include/plat/common.h b/arch/arm/plat-orion/include/plat/common.h
index e00fdb213609..ae2377ef63e5 100644
--- a/arch/arm/plat-orion/include/plat/common.h
+++ b/arch/arm/plat-orion/include/plat/common.h
@@ -39,12 +39,14 @@ void __init orion_rtc_init(unsigned long mapbase,
 void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
                            unsigned long mapbase,
                            unsigned long irq,
-                            unsigned long irq_err);
+                            unsigned long irq_err,
+                            unsigned int tx_csum_limit);
 void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
                            unsigned long mapbase,
                            unsigned long irq,
-                            unsigned long irq_err);
+                            unsigned long irq_err,
+                            unsigned int tx_csum_limit);
 void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data,
                            unsigned long mapbase,
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c
index 28f898f75380..db98e7021f0d 100644
--- a/arch/arm/plat-s3c24xx/dma.c
+++ b/arch/arm/plat-s3c24xx/dma.c
@@ -430,7 +430,7 @@ s3c2410_dma_canload(struct s3c2410_dma_chan *chan)
 * when necessary.
 */
-int s3c2410_dma_enqueue(unsigned int channel, void *id,
+int s3c2410_dma_enqueue(enum dma_ch channel, void *id,
                        dma_addr_t data, int size)
 {
        struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel);
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 7aca31c1df1f..9c3b90c3538e 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -403,7 +403,8 @@ config S5P_DEV_USB_EHCI
 config S3C24XX_PWM
        bool "PWM device support"
-        select HAVE_PWM
+        select PWM
+        select PWM_SAMSUNG
        help
          Support for exporting the PWM timer blocks via the pwm device
          system
diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c
index 65c5eca475e7..d1116e2dfbea 100644
--- a/arch/arm/plat-samsung/clock.c
+++ b/arch/arm/plat-samsung/clock.c
@@ -144,6 +144,7 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
 int clk_set_rate(struct clk *clk, unsigned long rate)
 {
+        unsigned long flags;
        int ret;
        if (IS_ERR(clk))
@@ -159,9 +160,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
        if (clk->ops == NULL || clk->ops->set_rate == NULL)
                return -EINVAL;
-        spin_lock(&clocks_lock);
+        spin_lock_irqsave(&clocks_lock, flags);
        ret = (clk->ops->set_rate)(clk, rate);
-        spin_unlock(&clocks_lock);
+        spin_unlock_irqrestore(&clocks_lock, flags);
        return ret;
 }
@@ -173,17 +174,18 @@ struct clk *clk_get_parent(struct clk *clk)
 int clk_set_parent(struct clk *clk, struct clk *parent)
 {
+        unsigned long flags;
        int ret = 0;
        if (IS_ERR(clk))
                return -EINVAL;
-        spin_lock(&clocks_lock);
+        spin_lock_irqsave(&clocks_lock, flags);
        if (clk->ops && clk->ops->set_parent)
                ret = (clk->ops->set_parent)(clk, parent);
-        spin_unlock(&clocks_lock);
+        spin_unlock_irqrestore(&clocks_lock, flags);
        return ret;
 }
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 74e31ce35538..fc49f3dabd76 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -32,6 +32,8 @@
 #include <linux/platform_data/s3c-hsudc.h>
 #include <linux/platform_data/s3c-hsotg.h>
+#include <media/s5p_hdmi.h>
 #include <asm/irq.h>
 #include <asm/pmu.h>
 #include <asm/mach/arch.h>
@@ -748,7 +750,8 @@ void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
        if (!pd) {
                pd = &default_i2c_data;
-                if (soc_is_exynos4210())
+                if (soc_is_exynos4210() ||
+                    soc_is_exynos4212() || soc_is_exynos4412())
                        pd->bus_num = 8;
                else if (soc_is_s5pv210())
                        pd->bus_num = 3;
@@ -759,6 +762,30 @@ void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
        npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
                               &s5p_device_i2c_hdmiphy);
 }
+struct s5p_hdmi_platform_data s5p_hdmi_def_platdata;
+void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
+                                  struct i2c_board_info *mhl_info, int mhl_bus)
+{
+        struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata;
+        if (soc_is_exynos4210() ||
+            soc_is_exynos4212() || soc_is_exynos4412())
+                pd->hdmiphy_bus = 8;
+        else if (soc_is_s5pv210())
+                pd->hdmiphy_bus = 3;
+        else
+                pd->hdmiphy_bus = 0;
+        pd->hdmiphy_info = hdmiphy_info;
+        pd->mhl_info = mhl_info;
+        pd->mhl_bus = mhl_bus;
+        s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data),
+                         &s5p_device_hdmi);
+}
 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
 /* I2S */
diff --git a/arch/arm/plat-samsung/include/plat/hdmi.h b/arch/arm/plat-samsung/include/plat/hdmi.h
new file mode 100644
index 000000000000..331d046ac2c5
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/hdmi.h
@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics Co.Ltd
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#ifndef __PLAT_SAMSUNG_HDMI_H
+#define __PLAT_SAMSUNG_HDMI_H __FILE__
+extern void s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
+                                  struct i2c_board_info *mhl_info, int mhl_bus);
+#endif /* __PLAT_SAMSUNG_HDMI_H */
diff --git a/arch/arm/plat-samsung/pm.c b/arch/arm/plat-samsung/pm.c
index 64ab65f0fdbc..15070284343e 100644
--- a/arch/arm/plat-samsung/pm.c
+++ b/arch/arm/plat-samsung/pm.c
@@ -74,7 +74,7 @@ unsigned char pm_uart_udivslot;
 #ifdef CONFIG_SAMSUNG_PM_DEBUG
-struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS];
+static struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS];
 static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
 {
diff --git a/arch/arm/plat-versatile/fpga-irq.c b/arch/arm/plat-versatile/fpga-irq.c
index 6e70d03824a1..091ae1030045 100644
--- a/arch/arm/plat-versatile/fpga-irq.c
+++ b/arch/arm/plat-versatile/fpga-irq.c
@@ -5,6 +5,8 @@
 #include <linux/io.h>
 #include <linux/irqdomain.h>
 #include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
 #include <asm/exception.h>
 #include <asm/mach/irq.h>
@@ -14,11 +16,17 @@
 #define IRQ_RAW_STATUS          0x04
 #define IRQ_ENABLE_SET          0x08
 #define IRQ_ENABLE_CLEAR        0x0c
+#define INT_SOFT_SET            0x10
+#define INT_SOFT_CLEAR          0x14
+#define FIQ_STATUS              0x20
+#define FIQ_RAW_STATUS          0x24
+#define FIQ_ENABLE              0x28
+#define FIQ_ENABLE_SET          0x28
+#define FIQ_ENABLE_CLEAR        0x2C
 /**
 * struct fpga_irq_data - irq data container for the FPGA IRQ controller
 * @base: memory offset in virtual memory
- * @irq_start: first IRQ number handled by this instance
 * @chip: chip container for this instance
 * @domain: IRQ domain for this instance
 * @valid: mask for valid IRQs on this controller
@@ -26,7 +34,6 @@
 */
 struct fpga_irq_data {
        void __iomem *base;
-        unsigned int irq_start;
        struct irq_chip chip;
        u32 valid;
        struct irq_domain *domain;
@@ -125,34 +132,79 @@ static struct irq_domain_ops fpga_irqdomain_ops = {
        .xlate = irq_domain_xlate_onetwocell,
 };
-void __init fpga_irq_init(void __iomem *base, const char *name, int irq_start,
+static __init struct fpga_irq_data *
-                          int parent_irq, u32 valid, struct device_node *node)
+fpga_irq_prep_struct(void __iomem *base, const char *name, u32 valid) {
-{
        struct fpga_irq_data *f;
        if (fpga_irq_id >= ARRAY_SIZE(fpga_irq_devices)) {
                printk(KERN_ERR "%s: too few FPGA IRQ controllers, increase CONFIG_PLAT_VERSATILE_FPGA_IRQ_NR\n", __func__);
-                return;
+                return NULL;
        }
        f = &fpga_irq_devices[fpga_irq_id];
        f->base = base;
-        f->irq_start = irq_start;
        f->chip.name = name;
        f->chip.irq_ack = fpga_irq_mask;
        f->chip.irq_mask = fpga_irq_mask;
        f->chip.irq_unmask = fpga_irq_unmask;
        f->valid = valid;
+        fpga_irq_id++;
+        return f;
+}
+void __init fpga_irq_init(void __iomem *base, const char *name, int irq_start,
+                          int parent_irq, u32 valid, struct device_node *node)
+{
+        struct fpga_irq_data *f;
+        f = fpga_irq_prep_struct(base, name, valid);
+        if (!f)
+                return;
        if (parent_irq != -1) {
                irq_set_handler_data(parent_irq, f);
                irq_set_chained_handler(parent_irq, fpga_irq_handle);
        }
-        f->domain = irq_domain_add_legacy(node, fls(valid), f->irq_start, 0,
+        f->domain = irq_domain_add_legacy(node, fls(valid), irq_start, 0,
                                          &fpga_irqdomain_ops, f);
        pr_info("FPGA IRQ chip %d \"%s\" @ %p, %u irqs\n",
                fpga_irq_id, name, base, f->used_irqs);
+}
-        fpga_irq_id++;
+#ifdef CONFIG_OF
+int __init fpga_irq_of_init(struct device_node *node,
+                            struct device_node *parent)
+{
+        struct fpga_irq_data *f;
+        void __iomem *base;
+        u32 clear_mask;
+        u32 valid_mask;
+        if (WARN_ON(!node))
+                return -ENODEV;
+        base = of_iomap(node, 0);
+        WARN(!base, "unable to map fpga irq registers\n");
+        if (of_property_read_u32(node, "clear-mask", &clear_mask))
+                clear_mask = 0;
+        if (of_property_read_u32(node, "valid-mask", &valid_mask))
+                valid_mask = 0;
+        f = fpga_irq_prep_struct(base, node->name, valid_mask);
+        if (!f)
+                return -ENOMEM;
+        writel(clear_mask, base + IRQ_ENABLE_CLEAR);
+        writel(clear_mask, base + FIQ_ENABLE_CLEAR);
+        f->domain = irq_domain_add_linear(node, fls(valid_mask), &fpga_irqdomain_ops, f);
+        f->used_irqs = hweight32(valid_mask);
+        pr_info("FPGA IRQ chip %d \"%s\" @ %p, %u irqs\n",
+                fpga_irq_id, node->name, base, f->used_irqs);
+        return 0;
 }
+#endif
diff --git a/arch/arm/plat-versatile/include/plat/fpga-irq.h b/arch/arm/plat-versatile/include/plat/fpga-irq.h
index 91bcfb67551d..1fac9651d3ca 100644
--- a/arch/arm/plat-versatile/include/plat/fpga-irq.h
+++ b/arch/arm/plat-versatile/include/plat/fpga-irq.h
@@ -7,5 +7,7 @@ struct pt_regs;
 void fpga_handle_irq(struct pt_regs *regs);
 void fpga_irq_init(void __iomem *, const char *, int, int, u32,
                struct device_node *node);
+int fpga_irq_of_init(struct device_node *node,
+                     struct device_node *parent);
 #endif
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index fb849d044bde..c834b32af275 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -719,8 +719,10 @@ static int __init vfp_init(void)
                        if ((fmrx(MVFR1) & 0x000fff00) == 0x00011100)
                                elf_hwcap |= HWCAP_NEON;
 #endif
+#ifdef CONFIG_VFPv3
                        if ((fmrx(MVFR1) & 0xf0000000) == 0x10000000)
                                elf_hwcap |= HWCAP_VFPv4;
+#endif
                }
        }
        return 0;