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-rw-r--r--arch/arm/Kconfig15
-rw-r--r--arch/arm/Kconfig.debug6
-rw-r--r--arch/arm/Makefile13
-rw-r--r--arch/arm/boot/compressed/decompress.c3
-rw-r--r--arch/arm/boot/compressed/head.S5
-rw-r--r--arch/arm/boot/dts/at91sam9260.dtsi3
-rw-r--r--arch/arm/boot/dts/at91sam9263.dtsi5
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi5
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi4
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi4
-rw-r--r--arch/arm/include/asm/Kbuild17
-rw-r--r--arch/arm/include/asm/assembler.h8
-rw-r--r--arch/arm/include/asm/current.h15
-rw-r--r--arch/arm/include/asm/exec.h6
-rw-r--r--arch/arm/include/asm/glue-cache.h16
-rw-r--r--arch/arm/include/asm/hardirq.h2
-rw-r--r--arch/arm/include/asm/hardware/linkup-l1110.h48
-rw-r--r--arch/arm/include/asm/io.h67
-rw-r--r--arch/arm/include/asm/ipcbuf.h1
-rw-r--r--arch/arm/include/asm/memory.h3
-rw-r--r--arch/arm/include/asm/msgbuf.h31
-rw-r--r--arch/arm/include/asm/mutex.h9
-rw-r--r--arch/arm/include/asm/opcodes-virt.h29
-rw-r--r--arch/arm/include/asm/opcodes.h181
-rw-r--r--arch/arm/include/asm/param.h31
-rw-r--r--arch/arm/include/asm/parport.h18
-rw-r--r--arch/arm/include/asm/segment.h11
-rw-r--r--arch/arm/include/asm/sembuf.h25
-rw-r--r--arch/arm/include/asm/serial.h19
-rw-r--r--arch/arm/include/asm/shmbuf.h42
-rw-r--r--arch/arm/include/asm/socket.h72
-rw-r--r--arch/arm/include/asm/sockios.h13
-rw-r--r--arch/arm/include/asm/syscall.h4
-rw-r--r--arch/arm/include/asm/termbits.h198
-rw-r--r--arch/arm/include/asm/termios.h92
-rw-r--r--arch/arm/include/asm/thread_info.h6
-rw-r--r--arch/arm/include/asm/timex.h6
-rw-r--r--arch/arm/include/asm/tlb.h4
-rw-r--r--arch/arm/include/asm/types.h16
-rw-r--r--arch/arm/include/asm/uaccess.h58
-rw-r--r--arch/arm/include/asm/unaligned.h19
-rw-r--r--arch/arm/include/asm/unistd.h10
-rw-r--r--arch/arm/kernel/asm-offsets.c2
-rw-r--r--arch/arm/kernel/calls.S1
-rw-r--r--arch/arm/kernel/entry-common.S9
-rw-r--r--arch/arm/kernel/hw_breakpoint.c62
-rw-r--r--arch/arm/kernel/machine_kexec.c29
-rw-r--r--arch/arm/kernel/ptrace.c19
-rw-r--r--arch/arm/kernel/sched_clock.c8
-rw-r--r--arch/arm/kernel/smp.c13
-rw-r--r--arch/arm/kernel/smp_twd.c48
-rw-r--r--arch/arm/kernel/traps.c11
-rw-r--r--arch/arm/lib/delay.c1
-rw-r--r--arch/arm/lib/getuser.S23
-rw-r--r--arch/arm/lib/putuser.S6
-rw-r--r--arch/arm/mach-exynos/platsmp.c2
-rw-r--r--arch/arm/mach-imx/clk-imx25.c8
-rw-r--r--arch/arm/mach-imx/clk-imx35.c6
-rw-r--r--arch/arm/mach-imx/mach-armadillo5x0.c3
-rw-r--r--arch/arm/mach-imx/mach-imx27_visstrim_m10.c6
-rw-r--r--arch/arm/mach-mxs/mach-mxs.c2
-rw-r--r--arch/arm/mach-omap2/Kconfig3
-rw-r--r--arch/arm/mach-omap2/Makefile2
-rw-r--r--arch/arm/mach-omap2/clock33xx_data.c14
-rw-r--r--arch/arm/mach-omap2/clockdomain2xxx_3xxx.c50
-rw-r--r--arch/arm/mach-omap2/cm-regbits-34xx.h1
-rw-r--r--arch/arm/mach-omap2/omap-wakeupgen.c2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c1
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c15
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c12
-rw-r--r--arch/arm/mach-omap2/timer.c7
-rw-r--r--arch/arm/mach-orion5x/common.c7
-rw-r--r--arch/arm/mach-sa1100/include/mach/SA-1111.h5
-rw-r--r--arch/arm/mach-sa1100/include/mach/lart.h13
-rw-r--r--arch/arm/mach-shmobile/board-kzm9g.c4
-rw-r--r--arch/arm/mach-shmobile/smp-emev2.c2
-rw-r--r--arch/arm/mm/alignment.c6
-rw-r--r--arch/arm/mm/cache-l2x0.c8
-rw-r--r--arch/arm/mm/cache-v7.S3
-rw-r--r--arch/arm/mm/context.c7
-rw-r--r--arch/arm/mm/dma-mapping.c4
-rw-r--r--arch/arm/mm/init.c2
-rw-r--r--arch/arm/mm/ioremap.c1
-rw-r--r--arch/arm/mm/mm.h3
-rw-r--r--arch/arm/mm/mmu.c8
-rw-r--r--arch/arm/plat-mxc/include/mach/mx25.h1
-rw-r--r--arch/arm/plat-omap/sram.c11
-rw-r--r--arch/arm/plat-samsung/clock.c10
88 files changed, 761 insertions, 840 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index c3fa8604efb9..117e81b12009 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -16,6 +16,7 @@ config ARM
16 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL 16 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
17 select HAVE_ARCH_KGDB 17 select HAVE_ARCH_KGDB
18 select HAVE_ARCH_TRACEHOOK 18 select HAVE_ARCH_TRACEHOOK
19 select HAVE_SYSCALL_TRACEPOINTS
19 select HAVE_KPROBES if !XIP_KERNEL 20 select HAVE_KPROBES if !XIP_KERNEL
20 select HAVE_KRETPROBES if (HAVE_KPROBES) 21 select HAVE_KRETPROBES if (HAVE_KPROBES)
21 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) 22 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
@@ -1413,6 +1414,16 @@ config PL310_ERRATA_769419
1413 on systems with an outer cache, the store buffer is drained 1414 on systems with an outer cache, the store buffer is drained
1414 explicitly. 1415 explicitly.
1415 1416
1417config ARM_ERRATA_775420
1418 bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1419 depends on CPU_V7
1420 help
1421 This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1422 r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1423 operation aborts with MMU exception, it might cause the processor
1424 to deadlock. This workaround puts DSB before executing ISB if
1425 an abort may occur on cache maintenance.
1426
1416endmenu 1427endmenu
1417 1428
1418source "arch/arm/common/Kconfig" 1429source "arch/arm/common/Kconfig"
@@ -1849,8 +1860,8 @@ config ALIGNMENT_TRAP
1849 configuration it is safe to say N, otherwise say Y. 1860 configuration it is safe to say N, otherwise say Y.
1850 1861
1851config UACCESS_WITH_MEMCPY 1862config UACCESS_WITH_MEMCPY
1852 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)" 1863 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1853 depends on MMU && EXPERIMENTAL 1864 depends on MMU
1854 default y if CPU_FEROCEON 1865 default y if CPU_FEROCEON
1855 help 1866 help
1856 Implement faster copy_to_user and clear_user methods for CPU 1867 Implement faster copy_to_user and clear_user methods for CPU
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index f15f82bf3a50..e968a52e4881 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -356,15 +356,15 @@ choice
356 is nothing connected to read from the DCC. 356 is nothing connected to read from the DCC.
357 357
358 config DEBUG_SEMIHOSTING 358 config DEBUG_SEMIHOSTING
359 bool "Kernel low-level debug output via semihosting I" 359 bool "Kernel low-level debug output via semihosting I/O"
360 help 360 help
361 Semihosting enables code running on an ARM target to use 361 Semihosting enables code running on an ARM target to use
362 the I/O facilities on a host debugger/emulator through a 362 the I/O facilities on a host debugger/emulator through a
363 simple SVC calls. The host debugger or emulator must have 363 simple SVC call. The host debugger or emulator must have
364 semihosting enabled for the special svc call to be trapped 364 semihosting enabled for the special svc call to be trapped
365 otherwise the kernel will crash. 365 otherwise the kernel will crash.
366 366
367 This is known to work with OpenOCD, as wellas 367 This is known to work with OpenOCD, as well as
368 ARM's Fast Models, or any other controlling environment 368 ARM's Fast Models, or any other controlling environment
369 that implements semihosting. 369 that implements semihosting.
370 370
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 30eae87ead6d..361936a3d191 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -268,7 +268,12 @@ else
268KBUILD_IMAGE := zImage 268KBUILD_IMAGE := zImage
269endif 269endif
270 270
271all: $(KBUILD_IMAGE) 271# Build the DT binary blobs if we have OF configured
272ifeq ($(CONFIG_USE_OF),y)
273KBUILD_DTBS := dtbs
274endif
275
276all: $(KBUILD_IMAGE) $(KBUILD_DTBS)
272 277
273boot := arch/arm/boot 278boot := arch/arm/boot
274 279
@@ -284,10 +289,10 @@ zImage Image xipImage bootpImage uImage: vmlinux
284zinstall uinstall install: vmlinux 289zinstall uinstall install: vmlinux
285 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $@ 290 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $@
286 291
287%.dtb: 292%.dtb: scripts
288 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@ 293 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@
289 294
290dtbs: 295dtbs: scripts
291 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@ 296 $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@
292 297
293# We use MRPROPER_FILES and CLEAN_FILES now 298# We use MRPROPER_FILES and CLEAN_FILES now
@@ -306,7 +311,7 @@ define archhelp
306 echo ' uImage - U-Boot wrapped zImage' 311 echo ' uImage - U-Boot wrapped zImage'
307 echo ' bootpImage - Combined zImage and initial RAM disk' 312 echo ' bootpImage - Combined zImage and initial RAM disk'
308 echo ' (supply initrd image via make variable INITRD=<path>)' 313 echo ' (supply initrd image via make variable INITRD=<path>)'
309 echo ' dtbs - Build device tree blobs for enabled boards' 314 echo '* dtbs - Build device tree blobs for enabled boards'
310 echo ' install - Install uncompressed kernel' 315 echo ' install - Install uncompressed kernel'
311 echo ' zinstall - Install compressed kernel' 316 echo ' zinstall - Install compressed kernel'
312 echo ' uinstall - Install U-Boot wrapped compressed kernel' 317 echo ' uinstall - Install U-Boot wrapped compressed kernel'
diff --git a/arch/arm/boot/compressed/decompress.c b/arch/arm/boot/compressed/decompress.c
index f41b38cafce8..9deb56a702ce 100644
--- a/arch/arm/boot/compressed/decompress.c
+++ b/arch/arm/boot/compressed/decompress.c
@@ -32,6 +32,9 @@ extern void error(char *);
32# define Tracecv(c,x) 32# define Tracecv(c,x)
33#endif 33#endif
34 34
35/* Not needed, but used in some headers pulled in by decompressors */
36extern char * strstr(const char * s1, const char *s2);
37
35#ifdef CONFIG_KERNEL_GZIP 38#ifdef CONFIG_KERNEL_GZIP
36#include "../../../../lib/decompress_inflate.c" 39#include "../../../../lib/decompress_inflate.c"
37#endif 40#endif
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index b8c64b80bafc..bc67cbff3944 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -653,16 +653,21 @@ __armv7_mmu_cache_on:
653 mcrne p15, 0, r0, c8, c7, 0 @ flush I,D TLBs 653 mcrne p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
654#endif 654#endif
655 mrc p15, 0, r0, c1, c0, 0 @ read control reg 655 mrc p15, 0, r0, c1, c0, 0 @ read control reg
656 bic r0, r0, #1 << 28 @ clear SCTLR.TRE
656 orr r0, r0, #0x5000 @ I-cache enable, RR cache replacement 657 orr r0, r0, #0x5000 @ I-cache enable, RR cache replacement
657 orr r0, r0, #0x003c @ write buffer 658 orr r0, r0, #0x003c @ write buffer
658#ifdef CONFIG_MMU 659#ifdef CONFIG_MMU
659#ifdef CONFIG_CPU_ENDIAN_BE8 660#ifdef CONFIG_CPU_ENDIAN_BE8
660 orr r0, r0, #1 << 25 @ big-endian page tables 661 orr r0, r0, #1 << 25 @ big-endian page tables
661#endif 662#endif
663 mrcne p15, 0, r6, c2, c0, 2 @ read ttb control reg
662 orrne r0, r0, #1 @ MMU enabled 664 orrne r0, r0, #1 @ MMU enabled
663 movne r1, #0xfffffffd @ domain 0 = client 665 movne r1, #0xfffffffd @ domain 0 = client
666 bic r6, r6, #1 << 31 @ 32-bit translation system
667 bic r6, r6, #3 << 0 @ use only ttbr0
664 mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer 668 mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer
665 mcrne p15, 0, r1, c3, c0, 0 @ load domain access control 669 mcrne p15, 0, r1, c3, c0, 0 @ load domain access control
670 mcrne p15, 0, r6, c2, c0, 2 @ load ttb control
666#endif 671#endif
667 mcr p15, 0, r0, c7, c5, 4 @ ISB 672 mcr p15, 0, r0, c7, c5, 4 @ ISB
668 mcr p15, 0, r0, c1, c0, 0 @ load control register 673 mcr p15, 0, r0, c1, c0, 0 @ load control register
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 66389c1c6f62..7c95f76398de 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -104,6 +104,7 @@
104 #gpio-cells = <2>; 104 #gpio-cells = <2>;
105 gpio-controller; 105 gpio-controller;
106 interrupt-controller; 106 interrupt-controller;
107 #interrupt-cells = <2>;
107 }; 108 };
108 109
109 pioB: gpio@fffff600 { 110 pioB: gpio@fffff600 {
@@ -113,6 +114,7 @@
113 #gpio-cells = <2>; 114 #gpio-cells = <2>;
114 gpio-controller; 115 gpio-controller;
115 interrupt-controller; 116 interrupt-controller;
117 #interrupt-cells = <2>;
116 }; 118 };
117 119
118 pioC: gpio@fffff800 { 120 pioC: gpio@fffff800 {
@@ -122,6 +124,7 @@
122 #gpio-cells = <2>; 124 #gpio-cells = <2>;
123 gpio-controller; 125 gpio-controller;
124 interrupt-controller; 126 interrupt-controller;
127 #interrupt-cells = <2>;
125 }; 128 };
126 129
127 dbgu: serial@fffff200 { 130 dbgu: serial@fffff200 {
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index b460d6ce9eb5..195019b7ca0e 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -95,6 +95,7 @@
95 #gpio-cells = <2>; 95 #gpio-cells = <2>;
96 gpio-controller; 96 gpio-controller;
97 interrupt-controller; 97 interrupt-controller;
98 #interrupt-cells = <2>;
98 }; 99 };
99 100
100 pioB: gpio@fffff400 { 101 pioB: gpio@fffff400 {
@@ -104,6 +105,7 @@
104 #gpio-cells = <2>; 105 #gpio-cells = <2>;
105 gpio-controller; 106 gpio-controller;
106 interrupt-controller; 107 interrupt-controller;
108 #interrupt-cells = <2>;
107 }; 109 };
108 110
109 pioC: gpio@fffff600 { 111 pioC: gpio@fffff600 {
@@ -113,6 +115,7 @@
113 #gpio-cells = <2>; 115 #gpio-cells = <2>;
114 gpio-controller; 116 gpio-controller;
115 interrupt-controller; 117 interrupt-controller;
118 #interrupt-cells = <2>;
116 }; 119 };
117 120
118 pioD: gpio@fffff800 { 121 pioD: gpio@fffff800 {
@@ -122,6 +125,7 @@
122 #gpio-cells = <2>; 125 #gpio-cells = <2>;
123 gpio-controller; 126 gpio-controller;
124 interrupt-controller; 127 interrupt-controller;
128 #interrupt-cells = <2>;
125 }; 129 };
126 130
127 pioE: gpio@fffffa00 { 131 pioE: gpio@fffffa00 {
@@ -131,6 +135,7 @@
131 #gpio-cells = <2>; 135 #gpio-cells = <2>;
132 gpio-controller; 136 gpio-controller;
133 interrupt-controller; 137 interrupt-controller;
138 #interrupt-cells = <2>;
134 }; 139 };
135 140
136 dbgu: serial@ffffee00 { 141 dbgu: serial@ffffee00 {
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index bafa8806fc17..63751b1e744b 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -113,6 +113,7 @@
113 #gpio-cells = <2>; 113 #gpio-cells = <2>;
114 gpio-controller; 114 gpio-controller;
115 interrupt-controller; 115 interrupt-controller;
116 #interrupt-cells = <2>;
116 }; 117 };
117 118
118 pioB: gpio@fffff400 { 119 pioB: gpio@fffff400 {
@@ -122,6 +123,7 @@
122 #gpio-cells = <2>; 123 #gpio-cells = <2>;
123 gpio-controller; 124 gpio-controller;
124 interrupt-controller; 125 interrupt-controller;
126 #interrupt-cells = <2>;
125 }; 127 };
126 128
127 pioC: gpio@fffff600 { 129 pioC: gpio@fffff600 {
@@ -131,6 +133,7 @@
131 #gpio-cells = <2>; 133 #gpio-cells = <2>;
132 gpio-controller; 134 gpio-controller;
133 interrupt-controller; 135 interrupt-controller;
136 #interrupt-cells = <2>;
134 }; 137 };
135 138
136 pioD: gpio@fffff800 { 139 pioD: gpio@fffff800 {
@@ -140,6 +143,7 @@
140 #gpio-cells = <2>; 143 #gpio-cells = <2>;
141 gpio-controller; 144 gpio-controller;
142 interrupt-controller; 145 interrupt-controller;
146 #interrupt-cells = <2>;
143 }; 147 };
144 148
145 pioE: gpio@fffffa00 { 149 pioE: gpio@fffffa00 {
@@ -149,6 +153,7 @@
149 #gpio-cells = <2>; 153 #gpio-cells = <2>;
150 gpio-controller; 154 gpio-controller;
151 interrupt-controller; 155 interrupt-controller;
156 #interrupt-cells = <2>;
152 }; 157 };
153 158
154 dbgu: serial@ffffee00 { 159 dbgu: serial@ffffee00 {
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index bfac0dfc332c..ef9336ae9614 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -107,6 +107,7 @@
107 #gpio-cells = <2>; 107 #gpio-cells = <2>;
108 gpio-controller; 108 gpio-controller;
109 interrupt-controller; 109 interrupt-controller;
110 #interrupt-cells = <2>;
110 }; 111 };
111 112
112 pioB: gpio@fffff600 { 113 pioB: gpio@fffff600 {
@@ -116,6 +117,7 @@
116 #gpio-cells = <2>; 117 #gpio-cells = <2>;
117 gpio-controller; 118 gpio-controller;
118 interrupt-controller; 119 interrupt-controller;
120 #interrupt-cells = <2>;
119 }; 121 };
120 122
121 pioC: gpio@fffff800 { 123 pioC: gpio@fffff800 {
@@ -125,6 +127,7 @@
125 #gpio-cells = <2>; 127 #gpio-cells = <2>;
126 gpio-controller; 128 gpio-controller;
127 interrupt-controller; 129 interrupt-controller;
130 #interrupt-cells = <2>;
128 }; 131 };
129 132
130 pioD: gpio@fffffa00 { 133 pioD: gpio@fffffa00 {
@@ -134,6 +137,7 @@
134 #gpio-cells = <2>; 137 #gpio-cells = <2>;
135 gpio-controller; 138 gpio-controller;
136 interrupt-controller; 139 interrupt-controller;
140 #interrupt-cells = <2>;
137 }; 141 };
138 142
139 dbgu: serial@fffff200 { 143 dbgu: serial@fffff200 {
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 4a18c393b136..8a387a8d61b7 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -115,6 +115,7 @@
115 #gpio-cells = <2>; 115 #gpio-cells = <2>;
116 gpio-controller; 116 gpio-controller;
117 interrupt-controller; 117 interrupt-controller;
118 #interrupt-cells = <2>;
118 }; 119 };
119 120
120 pioB: gpio@fffff600 { 121 pioB: gpio@fffff600 {
@@ -124,6 +125,7 @@
124 #gpio-cells = <2>; 125 #gpio-cells = <2>;
125 gpio-controller; 126 gpio-controller;
126 interrupt-controller; 127 interrupt-controller;
128 #interrupt-cells = <2>;
127 }; 129 };
128 130
129 pioC: gpio@fffff800 { 131 pioC: gpio@fffff800 {
@@ -133,6 +135,7 @@
133 #gpio-cells = <2>; 135 #gpio-cells = <2>;
134 gpio-controller; 136 gpio-controller;
135 interrupt-controller; 137 interrupt-controller;
138 #interrupt-cells = <2>;
136 }; 139 };
137 140
138 pioD: gpio@fffffa00 { 141 pioD: gpio@fffffa00 {
@@ -142,6 +145,7 @@
142 #gpio-cells = <2>; 145 #gpio-cells = <2>;
143 gpio-controller; 146 gpio-controller;
144 interrupt-controller; 147 interrupt-controller;
148 #interrupt-cells = <2>;
145 }; 149 };
146 150
147 dbgu: serial@fffff200 { 151 dbgu: serial@fffff200 {
diff --git a/arch/arm/include/asm/Kbuild b/arch/arm/include/asm/Kbuild
index 960abceb8e14..8a7196ca5106 100644
--- a/arch/arm/include/asm/Kbuild
+++ b/arch/arm/include/asm/Kbuild
@@ -5,16 +5,33 @@ header-y += hwcap.h
5generic-y += auxvec.h 5generic-y += auxvec.h
6generic-y += bitsperlong.h 6generic-y += bitsperlong.h
7generic-y += cputime.h 7generic-y += cputime.h
8generic-y += current.h
8generic-y += emergency-restart.h 9generic-y += emergency-restart.h
9generic-y += errno.h 10generic-y += errno.h
11generic-y += exec.h
10generic-y += ioctl.h 12generic-y += ioctl.h
13generic-y += ipcbuf.h
11generic-y += irq_regs.h 14generic-y += irq_regs.h
12generic-y += kdebug.h 15generic-y += kdebug.h
13generic-y += local.h 16generic-y += local.h
14generic-y += local64.h 17generic-y += local64.h
18generic-y += msgbuf.h
19generic-y += param.h
20generic-y += parport.h
15generic-y += percpu.h 21generic-y += percpu.h
16generic-y += poll.h 22generic-y += poll.h
17generic-y += resource.h 23generic-y += resource.h
18generic-y += sections.h 24generic-y += sections.h
25generic-y += segment.h
26generic-y += sembuf.h
27generic-y += serial.h
28generic-y += shmbuf.h
19generic-y += siginfo.h 29generic-y += siginfo.h
20generic-y += sizes.h 30generic-y += sizes.h
31generic-y += socket.h
32generic-y += sockios.h
33generic-y += termbits.h
34generic-y += termios.h
35generic-y += timex.h
36generic-y += types.h
37generic-y += unaligned.h
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index 03fb93621d0d..5c8b3bf4d825 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -320,4 +320,12 @@
320 .size \name , . - \name 320 .size \name , . - \name
321 .endm 321 .endm
322 322
323 .macro check_uaccess, addr:req, size:req, limit:req, tmp:req, bad:req
324#ifndef CONFIG_CPU_USE_DOMAINS
325 adds \tmp, \addr, #\size - 1
326 sbcccs \tmp, \tmp, \limit
327 bcs \bad
328#endif
329 .endm
330
323#endif /* __ASM_ASSEMBLER_H__ */ 331#endif /* __ASM_ASSEMBLER_H__ */
diff --git a/arch/arm/include/asm/current.h b/arch/arm/include/asm/current.h
deleted file mode 100644
index 75d21e2a3ff7..000000000000
--- a/arch/arm/include/asm/current.h
+++ /dev/null
@@ -1,15 +0,0 @@
1#ifndef _ASMARM_CURRENT_H
2#define _ASMARM_CURRENT_H
3
4#include <linux/thread_info.h>
5
6static inline struct task_struct *get_current(void) __attribute_const__;
7
8static inline struct task_struct *get_current(void)
9{
10 return current_thread_info()->task;
11}
12
13#define current (get_current())
14
15#endif /* _ASMARM_CURRENT_H */
diff --git a/arch/arm/include/asm/exec.h b/arch/arm/include/asm/exec.h
deleted file mode 100644
index 7c4fbef72b3a..000000000000
--- a/arch/arm/include/asm/exec.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_ARM_EXEC_H
2#define __ASM_ARM_EXEC_H
3
4#define arch_align_stack(x) (x)
5
6#endif /* __ASM_ARM_EXEC_H */
diff --git a/arch/arm/include/asm/glue-cache.h b/arch/arm/include/asm/glue-cache.h
index 7e30874377e6..4f8d2c0dc441 100644
--- a/arch/arm/include/asm/glue-cache.h
+++ b/arch/arm/include/asm/glue-cache.h
@@ -110,19 +110,19 @@
110#endif 110#endif
111 111
112#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) 112#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K)
113//# ifdef _CACHE 113# ifdef _CACHE
114# define MULTI_CACHE 1 114# define MULTI_CACHE 1
115//# else 115# else
116//# define _CACHE v6 116# define _CACHE v6
117//# endif 117# endif
118#endif 118#endif
119 119
120#if defined(CONFIG_CPU_V7) 120#if defined(CONFIG_CPU_V7)
121//# ifdef _CACHE 121# ifdef _CACHE
122# define MULTI_CACHE 1 122# define MULTI_CACHE 1
123//# else 123# else
124//# define _CACHE v7 124# define _CACHE v7
125//# endif 125# endif
126#endif 126#endif
127 127
128#if !defined(_CACHE) && !defined(MULTI_CACHE) 128#if !defined(_CACHE) && !defined(MULTI_CACHE)
diff --git a/arch/arm/include/asm/hardirq.h b/arch/arm/include/asm/hardirq.h
index 436e60b2cf7a..2740c2a2df63 100644
--- a/arch/arm/include/asm/hardirq.h
+++ b/arch/arm/include/asm/hardirq.h
@@ -5,7 +5,7 @@
5#include <linux/threads.h> 5#include <linux/threads.h>
6#include <asm/irq.h> 6#include <asm/irq.h>
7 7
8#define NR_IPI 5 8#define NR_IPI 6
9 9
10typedef struct { 10typedef struct {
11 unsigned int __softirq_pending; 11 unsigned int __softirq_pending;
diff --git a/arch/arm/include/asm/hardware/linkup-l1110.h b/arch/arm/include/asm/hardware/linkup-l1110.h
deleted file mode 100644
index 7ec91168a576..000000000000
--- a/arch/arm/include/asm/hardware/linkup-l1110.h
+++ /dev/null
@@ -1,48 +0,0 @@
1/*
2*
3* Definitions for H3600 Handheld Computer
4*
5* Copyright 2001 Compaq Computer Corporation.
6*
7* Use consistent with the GNU GPL is permitted,
8* provided that this copyright notice is
9* preserved in its entirety in all copies and derived works.
10*
11* COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
12* AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
13* FITNESS FOR ANY PARTICULAR PURPOSE.
14*
15* Author: Jamey Hicks.
16*
17*/
18
19/* LinkUp Systems PCCard/CompactFlash Interface for SA-1100 */
20
21/* PC Card Status Register */
22#define LINKUP_PRS_S1 (1 << 0) /* voltage control bits S1-S4 */
23#define LINKUP_PRS_S2 (1 << 1)
24#define LINKUP_PRS_S3 (1 << 2)
25#define LINKUP_PRS_S4 (1 << 3)
26#define LINKUP_PRS_BVD1 (1 << 4)
27#define LINKUP_PRS_BVD2 (1 << 5)
28#define LINKUP_PRS_VS1 (1 << 6)
29#define LINKUP_PRS_VS2 (1 << 7)
30#define LINKUP_PRS_RDY (1 << 8)
31#define LINKUP_PRS_CD1 (1 << 9)
32#define LINKUP_PRS_CD2 (1 << 10)
33
34/* PC Card Command Register */
35#define LINKUP_PRC_S1 (1 << 0)
36#define LINKUP_PRC_S2 (1 << 1)
37#define LINKUP_PRC_S3 (1 << 2)
38#define LINKUP_PRC_S4 (1 << 3)
39#define LINKUP_PRC_RESET (1 << 4)
40#define LINKUP_PRC_APOE (1 << 5) /* Auto Power Off Enable: clears S1-S4 when either nCD goes high */
41#define LINKUP_PRC_CFE (1 << 6) /* CompactFlash mode Enable: addresses A[10:0] only, A[25:11] high */
42#define LINKUP_PRC_SOE (1 << 7) /* signal output driver enable */
43#define LINKUP_PRC_SSP (1 << 8) /* sock select polarity: 0 for socket 0, 1 for socket 1 */
44#define LINKUP_PRC_MBZ (1 << 15) /* must be zero */
45
46struct linkup_l1110 {
47 volatile short prc;
48};
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 815c669fec0a..09c4628efbe7 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -47,13 +47,68 @@ extern void __raw_readsb(const void __iomem *addr, void *data, int bytelen);
47extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen); 47extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen);
48extern void __raw_readsl(const void __iomem *addr, void *data, int longlen); 48extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
49 49
50#define __raw_writeb(v,a) ((void)(__chk_io_ptr(a), *(volatile unsigned char __force *)(a) = (v))) 50#if __LINUX_ARM_ARCH__ < 6
51#define __raw_writew(v,a) ((void)(__chk_io_ptr(a), *(volatile unsigned short __force *)(a) = (v))) 51/*
52#define __raw_writel(v,a) ((void)(__chk_io_ptr(a), *(volatile unsigned int __force *)(a) = (v))) 52 * Half-word accesses are problematic with RiscPC due to limitations of
53 * the bus. Rather than special-case the machine, just let the compiler
54 * generate the access for CPUs prior to ARMv6.
55 */
56#define __raw_readw(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a))
57#define __raw_writew(v,a) ((void)(__chk_io_ptr(a), *(volatile unsigned short __force *)(a) = (v)))
58#else
59/*
60 * When running under a hypervisor, we want to avoid I/O accesses with
61 * writeback addressing modes as these incur a significant performance
62 * overhead (the address generation must be emulated in software).
63 */
64static inline void __raw_writew(u16 val, volatile void __iomem *addr)
65{
66 asm volatile("strh %1, %0"
67 : "+Qo" (*(volatile u16 __force *)addr)
68 : "r" (val));
69}
70
71static inline u16 __raw_readw(const volatile void __iomem *addr)
72{
73 u16 val;
74 asm volatile("ldrh %1, %0"
75 : "+Qo" (*(volatile u16 __force *)addr),
76 "=r" (val));
77 return val;
78}
79#endif
53 80
54#define __raw_readb(a) (__chk_io_ptr(a), *(volatile unsigned char __force *)(a)) 81static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
55#define __raw_readw(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a)) 82{
56#define __raw_readl(a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a)) 83 asm volatile("strb %1, %0"
84 : "+Qo" (*(volatile u8 __force *)addr)
85 : "r" (val));
86}
87
88static inline void __raw_writel(u32 val, volatile void __iomem *addr)
89{
90 asm volatile("str %1, %0"
91 : "+Qo" (*(volatile u32 __force *)addr)
92 : "r" (val));
93}
94
95static inline u8 __raw_readb(const volatile void __iomem *addr)
96{
97 u8 val;
98 asm volatile("ldrb %1, %0"
99 : "+Qo" (*(volatile u8 __force *)addr),
100 "=r" (val));
101 return val;
102}
103
104static inline u32 __raw_readl(const volatile void __iomem *addr)
105{
106 u32 val;
107 asm volatile("ldr %1, %0"
108 : "+Qo" (*(volatile u32 __force *)addr),
109 "=r" (val));
110 return val;
111}
57 112
58/* 113/*
59 * Architecture ioremap implementation. 114 * Architecture ioremap implementation.
diff --git a/arch/arm/include/asm/ipcbuf.h b/arch/arm/include/asm/ipcbuf.h
deleted file mode 100644
index 84c7e51cb6d0..000000000000
--- a/arch/arm/include/asm/ipcbuf.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/ipcbuf.h>
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index e965f1b560f1..5f6ddcc56452 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -187,6 +187,7 @@ static inline unsigned long __phys_to_virt(unsigned long x)
187#define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET) 187#define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET)
188#endif 188#endif
189#endif 189#endif
190#endif /* __ASSEMBLY__ */
190 191
191#ifndef PHYS_OFFSET 192#ifndef PHYS_OFFSET
192#ifdef PLAT_PHYS_OFFSET 193#ifdef PLAT_PHYS_OFFSET
@@ -196,6 +197,8 @@ static inline unsigned long __phys_to_virt(unsigned long x)
196#endif 197#endif
197#endif 198#endif
198 199
200#ifndef __ASSEMBLY__
201
199/* 202/*
200 * PFNs are used to describe any physical page; this means 203 * PFNs are used to describe any physical page; this means
201 * PFN 0 == physical address 0. 204 * PFN 0 == physical address 0.
diff --git a/arch/arm/include/asm/msgbuf.h b/arch/arm/include/asm/msgbuf.h
deleted file mode 100644
index 33b35b946eaa..000000000000
--- a/arch/arm/include/asm/msgbuf.h
+++ /dev/null
@@ -1,31 +0,0 @@
1#ifndef _ASMARM_MSGBUF_H
2#define _ASMARM_MSGBUF_H
3
4/*
5 * The msqid64_ds structure for arm architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct msqid64_ds {
15 struct ipc64_perm msg_perm;
16 __kernel_time_t msg_stime; /* last msgsnd time */
17 unsigned long __unused1;
18 __kernel_time_t msg_rtime; /* last msgrcv time */
19 unsigned long __unused2;
20 __kernel_time_t msg_ctime; /* last change time */
21 unsigned long __unused3;
22 unsigned long msg_cbytes; /* current number of bytes on queue */
23 unsigned long msg_qnum; /* number of messages in queue */
24 unsigned long msg_qbytes; /* max number of bytes on queue */
25 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
26 __kernel_pid_t msg_lrpid; /* last receive pid */
27 unsigned long __unused4;
28 unsigned long __unused5;
29};
30
31#endif /* _ASMARM_MSGBUF_H */
diff --git a/arch/arm/include/asm/mutex.h b/arch/arm/include/asm/mutex.h
index b1479fd04a95..87c044910fe0 100644
--- a/arch/arm/include/asm/mutex.h
+++ b/arch/arm/include/asm/mutex.h
@@ -9,8 +9,13 @@
9#define _ASM_MUTEX_H 9#define _ASM_MUTEX_H
10/* 10/*
11 * On pre-ARMv6 hardware this results in a swp-based implementation, 11 * On pre-ARMv6 hardware this results in a swp-based implementation,
12 * which is the most efficient. For ARMv6+, we emit a pair of exclusive 12 * which is the most efficient. For ARMv6+, we have exclusive memory
13 * accesses instead. 13 * accessors and use atomic_dec to avoid the extra xchg operations
14 * on the locking slowpaths.
14 */ 15 */
16#if __LINUX_ARM_ARCH__ < 6
15#include <asm-generic/mutex-xchg.h> 17#include <asm-generic/mutex-xchg.h>
18#else
19#include <asm-generic/mutex-dec.h>
16#endif 20#endif
21#endif /* _ASM_MUTEX_H */
diff --git a/arch/arm/include/asm/opcodes-virt.h b/arch/arm/include/asm/opcodes-virt.h
new file mode 100644
index 000000000000..b85665a96f8e
--- /dev/null
+++ b/arch/arm/include/asm/opcodes-virt.h
@@ -0,0 +1,29 @@
1/*
2 * opcodes-virt.h: Opcode definitions for the ARM virtualization extensions
3 * Copyright (C) 2012 Linaro Limited
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 */
19#ifndef __ASM_ARM_OPCODES_VIRT_H
20#define __ASM_ARM_OPCODES_VIRT_H
21
22#include <asm/opcodes.h>
23
24#define __HVC(imm16) __inst_arm_thumb32( \
25 0xE1400070 | (((imm16) & 0xFFF0) << 4) | ((imm16) & 0x000F), \
26 0xF7E08000 | (((imm16) & 0xF000) << 4) | ((imm16) & 0x0FFF) \
27)
28
29#endif /* ! __ASM_ARM_OPCODES_VIRT_H */
diff --git a/arch/arm/include/asm/opcodes.h b/arch/arm/include/asm/opcodes.h
index 19c48deda70f..74e211a6fb24 100644
--- a/arch/arm/include/asm/opcodes.h
+++ b/arch/arm/include/asm/opcodes.h
@@ -19,6 +19,33 @@ extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
19 19
20 20
21/* 21/*
22 * Assembler opcode byteswap helpers.
23 * These are only intended for use by this header: don't use them directly,
24 * because they will be suboptimal in most cases.
25 */
26#define ___asm_opcode_swab32(x) ( \
27 (((x) << 24) & 0xFF000000) \
28 | (((x) << 8) & 0x00FF0000) \
29 | (((x) >> 8) & 0x0000FF00) \
30 | (((x) >> 24) & 0x000000FF) \
31)
32#define ___asm_opcode_swab16(x) ( \
33 (((x) << 8) & 0xFF00) \
34 | (((x) >> 8) & 0x00FF) \
35)
36#define ___asm_opcode_swahb32(x) ( \
37 (((x) << 8) & 0xFF00FF00) \
38 | (((x) >> 8) & 0x00FF00FF) \
39)
40#define ___asm_opcode_swahw32(x) ( \
41 (((x) << 16) & 0xFFFF0000) \
42 | (((x) >> 16) & 0x0000FFFF) \
43)
44#define ___asm_opcode_identity32(x) ((x) & 0xFFFFFFFF)
45#define ___asm_opcode_identity16(x) ((x) & 0xFFFF)
46
47
48/*
22 * Opcode byteswap helpers 49 * Opcode byteswap helpers
23 * 50 *
24 * These macros help with converting instructions between a canonical integer 51 * These macros help with converting instructions between a canonical integer
@@ -41,39 +68,163 @@ extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
41 * Note that values in the range 0x0000E800..0xE7FFFFFF intentionally do not 68 * Note that values in the range 0x0000E800..0xE7FFFFFF intentionally do not
42 * represent any valid Thumb-2 instruction. For this range, 69 * represent any valid Thumb-2 instruction. For this range,
43 * __opcode_is_thumb32() and __opcode_is_thumb16() will both be false. 70 * __opcode_is_thumb32() and __opcode_is_thumb16() will both be false.
71 *
72 * The ___asm variants are intended only for use by this header, in situations
73 * involving inline assembler. For .S files, the normal __opcode_*() macros
74 * should do the right thing.
44 */ 75 */
76#ifdef __ASSEMBLY__
45 77
46#ifndef __ASSEMBLY__ 78#define ___opcode_swab32(x) ___asm_opcode_swab32(x)
79#define ___opcode_swab16(x) ___asm_opcode_swab16(x)
80#define ___opcode_swahb32(x) ___asm_opcode_swahb32(x)
81#define ___opcode_swahw32(x) ___asm_opcode_swahw32(x)
82#define ___opcode_identity32(x) ___asm_opcode_identity32(x)
83#define ___opcode_identity16(x) ___asm_opcode_identity16(x)
84
85#else /* ! __ASSEMBLY__ */
47 86
48#include <linux/types.h> 87#include <linux/types.h>
49#include <linux/swab.h> 88#include <linux/swab.h>
50 89
90#define ___opcode_swab32(x) swab32(x)
91#define ___opcode_swab16(x) swab16(x)
92#define ___opcode_swahb32(x) swahb32(x)
93#define ___opcode_swahw32(x) swahw32(x)
94#define ___opcode_identity32(x) ((u32)(x))
95#define ___opcode_identity16(x) ((u16)(x))
96
97#endif /* ! __ASSEMBLY__ */
98
99
51#ifdef CONFIG_CPU_ENDIAN_BE8 100#ifdef CONFIG_CPU_ENDIAN_BE8
52#define __opcode_to_mem_arm(x) swab32(x) 101
53#define __opcode_to_mem_thumb16(x) swab16(x) 102#define __opcode_to_mem_arm(x) ___opcode_swab32(x)
54#define __opcode_to_mem_thumb32(x) swahb32(x) 103#define __opcode_to_mem_thumb16(x) ___opcode_swab16(x)
55#else 104#define __opcode_to_mem_thumb32(x) ___opcode_swahb32(x)
56#define __opcode_to_mem_arm(x) ((u32)(x)) 105#define ___asm_opcode_to_mem_arm(x) ___asm_opcode_swab32(x)
57#define __opcode_to_mem_thumb16(x) ((u16)(x)) 106#define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_swab16(x)
58#define __opcode_to_mem_thumb32(x) swahw32(x) 107#define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahb32(x)
108
109#else /* ! CONFIG_CPU_ENDIAN_BE8 */
110
111#define __opcode_to_mem_arm(x) ___opcode_identity32(x)
112#define __opcode_to_mem_thumb16(x) ___opcode_identity16(x)
113#define ___asm_opcode_to_mem_arm(x) ___asm_opcode_identity32(x)
114#define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_identity16(x)
115#ifndef CONFIG_CPU_ENDIAN_BE32
116/*
117 * On BE32 systems, using 32-bit accesses to store Thumb instructions will not
118 * work in all cases, due to alignment constraints. For now, a correct
119 * version is not provided for BE32.
120 */
121#define __opcode_to_mem_thumb32(x) ___opcode_swahw32(x)
122#define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahw32(x)
59#endif 123#endif
60 124
125#endif /* ! CONFIG_CPU_ENDIAN_BE8 */
126
61#define __mem_to_opcode_arm(x) __opcode_to_mem_arm(x) 127#define __mem_to_opcode_arm(x) __opcode_to_mem_arm(x)
62#define __mem_to_opcode_thumb16(x) __opcode_to_mem_thumb16(x) 128#define __mem_to_opcode_thumb16(x) __opcode_to_mem_thumb16(x)
129#ifndef CONFIG_CPU_ENDIAN_BE32
63#define __mem_to_opcode_thumb32(x) __opcode_to_mem_thumb32(x) 130#define __mem_to_opcode_thumb32(x) __opcode_to_mem_thumb32(x)
131#endif
64 132
65/* Operations specific to Thumb opcodes */ 133/* Operations specific to Thumb opcodes */
66 134
67/* Instruction size checks: */ 135/* Instruction size checks: */
68#define __opcode_is_thumb32(x) ((u32)(x) >= 0xE8000000UL) 136#define __opcode_is_thumb32(x) ( \
69#define __opcode_is_thumb16(x) ((u32)(x) < 0xE800UL) 137 ((x) & 0xF8000000) == 0xE8000000 \
138 || ((x) & 0xF0000000) == 0xF0000000 \
139)
140#define __opcode_is_thumb16(x) ( \
141 ((x) & 0xFFFF0000) == 0 \
142 && !(((x) & 0xF800) == 0xE800 || ((x) & 0xF000) == 0xF000) \
143)
70 144
71/* Operations to construct or split 32-bit Thumb instructions: */ 145/* Operations to construct or split 32-bit Thumb instructions: */
72#define __opcode_thumb32_first(x) ((u16)((x) >> 16)) 146#define __opcode_thumb32_first(x) (___opcode_identity16((x) >> 16))
73#define __opcode_thumb32_second(x) ((u16)(x)) 147#define __opcode_thumb32_second(x) (___opcode_identity16(x))
74#define __opcode_thumb32_compose(first, second) \ 148#define __opcode_thumb32_compose(first, second) ( \
75 (((u32)(u16)(first) << 16) | (u32)(u16)(second)) 149 (___opcode_identity32(___opcode_identity16(first)) << 16) \
150 | ___opcode_identity32(___opcode_identity16(second)) \
151)
152#define ___asm_opcode_thumb32_first(x) (___asm_opcode_identity16((x) >> 16))
153#define ___asm_opcode_thumb32_second(x) (___asm_opcode_identity16(x))
154#define ___asm_opcode_thumb32_compose(first, second) ( \
155 (___asm_opcode_identity32(___asm_opcode_identity16(first)) << 16) \
156 | ___asm_opcode_identity32(___asm_opcode_identity16(second)) \
157)
76 158
77#endif /* __ASSEMBLY__ */ 159/*
160 * Opcode injection helpers
161 *
162 * In rare cases it is necessary to assemble an opcode which the
163 * assembler does not support directly, or which would normally be
164 * rejected because of the CFLAGS or AFLAGS used to build the affected
165 * file.
166 *
167 * Before using these macros, consider carefully whether it is feasible
168 * instead to change the build flags for your file, or whether it really
169 * makes sense to support old assembler versions when building that
170 * particular kernel feature.
171 *
172 * The macros defined here should only be used where there is no viable
173 * alternative.
174 *
175 *
176 * __inst_arm(x): emit the specified ARM opcode
177 * __inst_thumb16(x): emit the specified 16-bit Thumb opcode
178 * __inst_thumb32(x): emit the specified 32-bit Thumb opcode
179 *
180 * __inst_arm_thumb16(arm, thumb): emit either the specified arm or
181 * 16-bit Thumb opcode, depending on whether an ARM or Thumb-2
182 * kernel is being built
183 *
184 * __inst_arm_thumb32(arm, thumb): emit either the specified arm or
185 * 32-bit Thumb opcode, depending on whether an ARM or Thumb-2
186 * kernel is being built
187 *
188 *
189 * Note that using these macros directly is poor practice. Instead, you
190 * should use them to define human-readable wrapper macros to encode the
191 * instructions that you care about. In code which might run on ARMv7 or
192 * above, you can usually use the __inst_arm_thumb{16,32} macros to
193 * specify the ARM and Thumb alternatives at the same time. This ensures
194 * that the correct opcode gets emitted depending on the instruction set
195 * used for the kernel build.
196 *
197 * Look at opcodes-virt.h for an example of how to use these macros.
198 */
199#include <linux/stringify.h>
200
201#define __inst_arm(x) ___inst_arm(___asm_opcode_to_mem_arm(x))
202#define __inst_thumb32(x) ___inst_thumb32( \
203 ___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_first(x)), \
204 ___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_second(x)) \
205)
206#define __inst_thumb16(x) ___inst_thumb16(___asm_opcode_to_mem_thumb16(x))
207
208#ifdef CONFIG_THUMB2_KERNEL
209#define __inst_arm_thumb16(arm_opcode, thumb_opcode) \
210 __inst_thumb16(thumb_opcode)
211#define __inst_arm_thumb32(arm_opcode, thumb_opcode) \
212 __inst_thumb32(thumb_opcode)
213#else
214#define __inst_arm_thumb16(arm_opcode, thumb_opcode) __inst_arm(arm_opcode)
215#define __inst_arm_thumb32(arm_opcode, thumb_opcode) __inst_arm(arm_opcode)
216#endif
217
218/* Helpers for the helpers. Don't use these directly. */
219#ifdef __ASSEMBLY__
220#define ___inst_arm(x) .long x
221#define ___inst_thumb16(x) .short x
222#define ___inst_thumb32(first, second) .short first, second
223#else
224#define ___inst_arm(x) ".long " __stringify(x) "\n\t"
225#define ___inst_thumb16(x) ".short " __stringify(x) "\n\t"
226#define ___inst_thumb32(first, second) \
227 ".short " __stringify(first) ", " __stringify(second) "\n\t"
228#endif
78 229
79#endif /* __ASM_ARM_OPCODES_H */ 230#endif /* __ASM_ARM_OPCODES_H */
diff --git a/arch/arm/include/asm/param.h b/arch/arm/include/asm/param.h
deleted file mode 100644
index 8b24bf94c06b..000000000000
--- a/arch/arm/include/asm/param.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * arch/arm/include/asm/param.h
3 *
4 * Copyright (C) 1995-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_PARAM_H
11#define __ASM_PARAM_H
12
13#ifdef __KERNEL__
14# define HZ CONFIG_HZ /* Internal kernel timer frequency */
15# define USER_HZ 100 /* User interfaces are in "ticks" */
16# define CLOCKS_PER_SEC (USER_HZ) /* like times() */
17#else
18# define HZ 100
19#endif
20
21#define EXEC_PAGESIZE 4096
22
23#ifndef NOGROUP
24#define NOGROUP (-1)
25#endif
26
27/* max length of hostname */
28#define MAXHOSTNAMELEN 64
29
30#endif
31
diff --git a/arch/arm/include/asm/parport.h b/arch/arm/include/asm/parport.h
deleted file mode 100644
index 26e94b09035a..000000000000
--- a/arch/arm/include/asm/parport.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * arch/arm/include/asm/parport.h: ARM-specific parport initialisation
3 *
4 * Copyright (C) 1999, 2000 Tim Waugh <tim@cyberelk.demon.co.uk>
5 *
6 * This file should only be included by drivers/parport/parport_pc.c.
7 */
8
9#ifndef __ASMARM_PARPORT_H
10#define __ASMARM_PARPORT_H
11
12static int __devinit parport_pc_find_isa_ports (int autoirq, int autodma);
13static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma)
14{
15 return parport_pc_find_isa_ports (autoirq, autodma);
16}
17
18#endif /* !(_ASMARM_PARPORT_H) */
diff --git a/arch/arm/include/asm/segment.h b/arch/arm/include/asm/segment.h
deleted file mode 100644
index 9e24c21f6304..000000000000
--- a/arch/arm/include/asm/segment.h
+++ /dev/null
@@ -1,11 +0,0 @@
1#ifndef __ASM_ARM_SEGMENT_H
2#define __ASM_ARM_SEGMENT_H
3
4#define __KERNEL_CS 0x0
5#define __KERNEL_DS 0x0
6
7#define __USER_CS 0x1
8#define __USER_DS 0x1
9
10#endif /* __ASM_ARM_SEGMENT_H */
11
diff --git a/arch/arm/include/asm/sembuf.h b/arch/arm/include/asm/sembuf.h
deleted file mode 100644
index 1c0283954289..000000000000
--- a/arch/arm/include/asm/sembuf.h
+++ /dev/null
@@ -1,25 +0,0 @@
1#ifndef _ASMARM_SEMBUF_H
2#define _ASMARM_SEMBUF_H
3
4/*
5 * The semid64_ds structure for arm architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16 __kernel_time_t sem_otime; /* last semop time */
17 unsigned long __unused1;
18 __kernel_time_t sem_ctime; /* last change time */
19 unsigned long __unused2;
20 unsigned long sem_nsems; /* no. of semaphores in array */
21 unsigned long __unused3;
22 unsigned long __unused4;
23};
24
25#endif /* _ASMARM_SEMBUF_H */
diff --git a/arch/arm/include/asm/serial.h b/arch/arm/include/asm/serial.h
deleted file mode 100644
index ebb049091e26..000000000000
--- a/arch/arm/include/asm/serial.h
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * arch/arm/include/asm/serial.h
3 *
4 * Copyright (C) 1996 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Changelog:
11 * 15-10-1996 RMK Created
12 */
13
14#ifndef __ASM_SERIAL_H
15#define __ASM_SERIAL_H
16
17#define BASE_BAUD (1843200 / 16)
18
19#endif
diff --git a/arch/arm/include/asm/shmbuf.h b/arch/arm/include/asm/shmbuf.h
deleted file mode 100644
index 2e5c67ba1c97..000000000000
--- a/arch/arm/include/asm/shmbuf.h
+++ /dev/null
@@ -1,42 +0,0 @@
1#ifndef _ASMARM_SHMBUF_H
2#define _ASMARM_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for arm architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16 size_t shm_segsz; /* size of segment (bytes) */
17 __kernel_time_t shm_atime; /* last attach time */
18 unsigned long __unused1;
19 __kernel_time_t shm_dtime; /* last detach time */
20 unsigned long __unused2;
21 __kernel_time_t shm_ctime; /* last change time */
22 unsigned long __unused3;
23 __kernel_pid_t shm_cpid; /* pid of creator */
24 __kernel_pid_t shm_lpid; /* pid of last operator */
25 unsigned long shm_nattch; /* no. of current attaches */
26 unsigned long __unused4;
27 unsigned long __unused5;
28};
29
30struct shminfo64 {
31 unsigned long shmmax;
32 unsigned long shmmin;
33 unsigned long shmmni;
34 unsigned long shmseg;
35 unsigned long shmall;
36 unsigned long __unused1;
37 unsigned long __unused2;
38 unsigned long __unused3;
39 unsigned long __unused4;
40};
41
42#endif /* _ASMARM_SHMBUF_H */
diff --git a/arch/arm/include/asm/socket.h b/arch/arm/include/asm/socket.h
deleted file mode 100644
index 6433cadb6ed4..000000000000
--- a/arch/arm/include/asm/socket.h
+++ /dev/null
@@ -1,72 +0,0 @@
1#ifndef _ASMARM_SOCKET_H
2#define _ASMARM_SOCKET_H
3
4#include <asm/sockios.h>
5
6/* For setsockopt(2) */
7#define SOL_SOCKET 1
8
9#define SO_DEBUG 1
10#define SO_REUSEADDR 2
11#define SO_TYPE 3
12#define SO_ERROR 4
13#define SO_DONTROUTE 5
14#define SO_BROADCAST 6
15#define SO_SNDBUF 7
16#define SO_RCVBUF 8
17#define SO_SNDBUFFORCE 32
18#define SO_RCVBUFFORCE 33
19#define SO_KEEPALIVE 9
20#define SO_OOBINLINE 10
21#define SO_NO_CHECK 11
22#define SO_PRIORITY 12
23#define SO_LINGER 13
24#define SO_BSDCOMPAT 14
25/* To add :#define SO_REUSEPORT 15 */
26#define SO_PASSCRED 16
27#define SO_PEERCRED 17
28#define SO_RCVLOWAT 18
29#define SO_SNDLOWAT 19
30#define SO_RCVTIMEO 20
31#define SO_SNDTIMEO 21
32
33/* Security levels - as per NRL IPv6 - don't actually do anything */
34#define SO_SECURITY_AUTHENTICATION 22
35#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
36#define SO_SECURITY_ENCRYPTION_NETWORK 24
37
38#define SO_BINDTODEVICE 25
39
40/* Socket filtering */
41#define SO_ATTACH_FILTER 26
42#define SO_DETACH_FILTER 27
43
44#define SO_PEERNAME 28
45#define SO_TIMESTAMP 29
46#define SCM_TIMESTAMP SO_TIMESTAMP
47
48#define SO_ACCEPTCONN 30
49
50#define SO_PEERSEC 31
51#define SO_PASSSEC 34
52#define SO_TIMESTAMPNS 35
53#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
54
55#define SO_MARK 36
56
57#define SO_TIMESTAMPING 37
58#define SCM_TIMESTAMPING SO_TIMESTAMPING
59
60#define SO_PROTOCOL 38
61#define SO_DOMAIN 39
62
63#define SO_RXQ_OVFL 40
64
65#define SO_WIFI_STATUS 41
66#define SCM_WIFI_STATUS SO_WIFI_STATUS
67#define SO_PEEK_OFF 42
68
69/* Instruct lower device to use last 4-bytes of skb data as FCS */
70#define SO_NOFCS 43
71
72#endif /* _ASM_SOCKET_H */
diff --git a/arch/arm/include/asm/sockios.h b/arch/arm/include/asm/sockios.h
deleted file mode 100644
index a2588a2512df..000000000000
--- a/arch/arm/include/asm/sockios.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef __ARCH_ARM_SOCKIOS_H
2#define __ARCH_ARM_SOCKIOS_H
3
4/* Socket-level I/O control calls. */
5#define FIOSETOWN 0x8901
6#define SIOCSPGRP 0x8902
7#define FIOGETOWN 0x8903
8#define SIOCGPGRP 0x8904
9#define SIOCATMARK 0x8905
10#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
11#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
12
13#endif
diff --git a/arch/arm/include/asm/syscall.h b/arch/arm/include/asm/syscall.h
index c334a23ddf75..47486a41c56e 100644
--- a/arch/arm/include/asm/syscall.h
+++ b/arch/arm/include/asm/syscall.h
@@ -9,6 +9,10 @@
9 9
10#include <linux/err.h> 10#include <linux/err.h>
11 11
12#include <asm/unistd.h>
13
14#define NR_syscalls (__NR_syscalls)
15
12extern const unsigned long sys_call_table[]; 16extern const unsigned long sys_call_table[];
13 17
14static inline int syscall_get_nr(struct task_struct *task, 18static inline int syscall_get_nr(struct task_struct *task,
diff --git a/arch/arm/include/asm/termbits.h b/arch/arm/include/asm/termbits.h
deleted file mode 100644
index 704135d28d1d..000000000000
--- a/arch/arm/include/asm/termbits.h
+++ /dev/null
@@ -1,198 +0,0 @@
1#ifndef __ASM_ARM_TERMBITS_H
2#define __ASM_ARM_TERMBITS_H
3
4typedef unsigned char cc_t;
5typedef unsigned int speed_t;
6typedef unsigned int tcflag_t;
7
8#define NCCS 19
9struct termios {
10 tcflag_t c_iflag; /* input mode flags */
11 tcflag_t c_oflag; /* output mode flags */
12 tcflag_t c_cflag; /* control mode flags */
13 tcflag_t c_lflag; /* local mode flags */
14 cc_t c_line; /* line discipline */
15 cc_t c_cc[NCCS]; /* control characters */
16};
17
18struct termios2 {
19 tcflag_t c_iflag; /* input mode flags */
20 tcflag_t c_oflag; /* output mode flags */
21 tcflag_t c_cflag; /* control mode flags */
22 tcflag_t c_lflag; /* local mode flags */
23 cc_t c_line; /* line discipline */
24 cc_t c_cc[NCCS]; /* control characters */
25 speed_t c_ispeed; /* input speed */
26 speed_t c_ospeed; /* output speed */
27};
28
29struct ktermios {
30 tcflag_t c_iflag; /* input mode flags */
31 tcflag_t c_oflag; /* output mode flags */
32 tcflag_t c_cflag; /* control mode flags */
33 tcflag_t c_lflag; /* local mode flags */
34 cc_t c_line; /* line discipline */
35 cc_t c_cc[NCCS]; /* control characters */
36 speed_t c_ispeed; /* input speed */
37 speed_t c_ospeed; /* output speed */
38};
39
40
41/* c_cc characters */
42#define VINTR 0
43#define VQUIT 1
44#define VERASE 2
45#define VKILL 3
46#define VEOF 4
47#define VTIME 5
48#define VMIN 6
49#define VSWTC 7
50#define VSTART 8
51#define VSTOP 9
52#define VSUSP 10
53#define VEOL 11
54#define VREPRINT 12
55#define VDISCARD 13
56#define VWERASE 14
57#define VLNEXT 15
58#define VEOL2 16
59
60/* c_iflag bits */
61#define IGNBRK 0000001
62#define BRKINT 0000002
63#define IGNPAR 0000004
64#define PARMRK 0000010
65#define INPCK 0000020
66#define ISTRIP 0000040
67#define INLCR 0000100
68#define IGNCR 0000200
69#define ICRNL 0000400
70#define IUCLC 0001000
71#define IXON 0002000
72#define IXANY 0004000
73#define IXOFF 0010000
74#define IMAXBEL 0020000
75#define IUTF8 0040000
76
77/* c_oflag bits */
78#define OPOST 0000001
79#define OLCUC 0000002
80#define ONLCR 0000004
81#define OCRNL 0000010
82#define ONOCR 0000020
83#define ONLRET 0000040
84#define OFILL 0000100
85#define OFDEL 0000200
86#define NLDLY 0000400
87#define NL0 0000000
88#define NL1 0000400
89#define CRDLY 0003000
90#define CR0 0000000
91#define CR1 0001000
92#define CR2 0002000
93#define CR3 0003000
94#define TABDLY 0014000
95#define TAB0 0000000
96#define TAB1 0004000
97#define TAB2 0010000
98#define TAB3 0014000
99#define XTABS 0014000
100#define BSDLY 0020000
101#define BS0 0000000
102#define BS1 0020000
103#define VTDLY 0040000
104#define VT0 0000000
105#define VT1 0040000
106#define FFDLY 0100000
107#define FF0 0000000
108#define FF1 0100000
109
110/* c_cflag bit meaning */
111#define CBAUD 0010017
112#define B0 0000000 /* hang up */
113#define B50 0000001
114#define B75 0000002
115#define B110 0000003
116#define B134 0000004
117#define B150 0000005
118#define B200 0000006
119#define B300 0000007
120#define B600 0000010
121#define B1200 0000011
122#define B1800 0000012
123#define B2400 0000013
124#define B4800 0000014
125#define B9600 0000015
126#define B19200 0000016
127#define B38400 0000017
128#define EXTA B19200
129#define EXTB B38400
130#define CSIZE 0000060
131#define CS5 0000000
132#define CS6 0000020
133#define CS7 0000040
134#define CS8 0000060
135#define CSTOPB 0000100
136#define CREAD 0000200
137#define PARENB 0000400
138#define PARODD 0001000
139#define HUPCL 0002000
140#define CLOCAL 0004000
141#define CBAUDEX 0010000
142#define BOTHER 0010000
143#define B57600 0010001
144#define B115200 0010002
145#define B230400 0010003
146#define B460800 0010004
147#define B500000 0010005
148#define B576000 0010006
149#define B921600 0010007
150#define B1000000 0010010
151#define B1152000 0010011
152#define B1500000 0010012
153#define B2000000 0010013
154#define B2500000 0010014
155#define B3000000 0010015
156#define B3500000 0010016
157#define B4000000 0010017
158#define CIBAUD 002003600000 /* input baud rate */
159#define CMSPAR 010000000000 /* mark or space (stick) parity */
160#define CRTSCTS 020000000000 /* flow control */
161
162#define IBSHIFT 16
163
164/* c_lflag bits */
165#define ISIG 0000001
166#define ICANON 0000002
167#define XCASE 0000004
168#define ECHO 0000010
169#define ECHOE 0000020
170#define ECHOK 0000040
171#define ECHONL 0000100
172#define NOFLSH 0000200
173#define TOSTOP 0000400
174#define ECHOCTL 0001000
175#define ECHOPRT 0002000
176#define ECHOKE 0004000
177#define FLUSHO 0010000
178#define PENDIN 0040000
179#define IEXTEN 0100000
180#define EXTPROC 0200000
181
182/* tcflow() and TCXONC use these */
183#define TCOOFF 0
184#define TCOON 1
185#define TCIOFF 2
186#define TCION 3
187
188/* tcflush() and TCFLSH use these */
189#define TCIFLUSH 0
190#define TCOFLUSH 1
191#define TCIOFLUSH 2
192
193/* tcsetattr uses these */
194#define TCSANOW 0
195#define TCSADRAIN 1
196#define TCSAFLUSH 2
197
198#endif /* __ASM_ARM_TERMBITS_H */
diff --git a/arch/arm/include/asm/termios.h b/arch/arm/include/asm/termios.h
deleted file mode 100644
index 293e3f1bc3f2..000000000000
--- a/arch/arm/include/asm/termios.h
+++ /dev/null
@@ -1,92 +0,0 @@
1#ifndef __ASM_ARM_TERMIOS_H
2#define __ASM_ARM_TERMIOS_H
3
4#include <asm/termbits.h>
5#include <asm/ioctls.h>
6
7struct winsize {
8 unsigned short ws_row;
9 unsigned short ws_col;
10 unsigned short ws_xpixel;
11 unsigned short ws_ypixel;
12};
13
14#define NCC 8
15struct termio {
16 unsigned short c_iflag; /* input mode flags */
17 unsigned short c_oflag; /* output mode flags */
18 unsigned short c_cflag; /* control mode flags */
19 unsigned short c_lflag; /* local mode flags */
20 unsigned char c_line; /* line discipline */
21 unsigned char c_cc[NCC]; /* control characters */
22};
23
24#ifdef __KERNEL__
25/* intr=^C quit=^| erase=del kill=^U
26 eof=^D vtime=\0 vmin=\1 sxtc=\0
27 start=^Q stop=^S susp=^Z eol=\0
28 reprint=^R discard=^U werase=^W lnext=^V
29 eol2=\0
30*/
31#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
32#endif
33
34/* modem lines */
35#define TIOCM_LE 0x001
36#define TIOCM_DTR 0x002
37#define TIOCM_RTS 0x004
38#define TIOCM_ST 0x008
39#define TIOCM_SR 0x010
40#define TIOCM_CTS 0x020
41#define TIOCM_CAR 0x040
42#define TIOCM_RNG 0x080
43#define TIOCM_DSR 0x100
44#define TIOCM_CD TIOCM_CAR
45#define TIOCM_RI TIOCM_RNG
46#define TIOCM_OUT1 0x2000
47#define TIOCM_OUT2 0x4000
48#define TIOCM_LOOP 0x8000
49
50/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
51
52#ifdef __KERNEL__
53
54/*
55 * Translate a "termio" structure into a "termios". Ugh.
56 */
57#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
58 unsigned short __tmp; \
59 get_user(__tmp,&(termio)->x); \
60 *(unsigned short *) &(termios)->x = __tmp; \
61}
62
63#define user_termio_to_kernel_termios(termios, termio) \
64({ \
65 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
66 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
67 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
68 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
69 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
70})
71
72/*
73 * Translate a "termios" structure into a "termio". Ugh.
74 */
75#define kernel_termios_to_user_termio(termio, termios) \
76({ \
77 put_user((termios)->c_iflag, &(termio)->c_iflag); \
78 put_user((termios)->c_oflag, &(termio)->c_oflag); \
79 put_user((termios)->c_cflag, &(termio)->c_cflag); \
80 put_user((termios)->c_lflag, &(termio)->c_lflag); \
81 put_user((termios)->c_line, &(termio)->c_line); \
82 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
83})
84
85#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2))
86#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2))
87#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
88#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
89
90#endif /* __KERNEL__ */
91
92#endif /* __ASM_ARM_TERMIOS_H */
diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h
index af7b0bda3355..f71cdab18b87 100644
--- a/arch/arm/include/asm/thread_info.h
+++ b/arch/arm/include/asm/thread_info.h
@@ -59,7 +59,9 @@ struct thread_info {
59 __u32 syscall; /* syscall number */ 59 __u32 syscall; /* syscall number */
60 __u8 used_cp[16]; /* thread used copro */ 60 __u8 used_cp[16]; /* thread used copro */
61 unsigned long tp_value; 61 unsigned long tp_value;
62#ifdef CONFIG_CRUNCH
62 struct crunch_state crunchstate; 63 struct crunch_state crunchstate;
64#endif
63 union fp_state fpstate __attribute__((aligned(8))); 65 union fp_state fpstate __attribute__((aligned(8)));
64 union vfp_state vfpstate; 66 union vfp_state vfpstate;
65#ifdef CONFIG_ARM_THUMBEE 67#ifdef CONFIG_ARM_THUMBEE
@@ -148,6 +150,7 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user *,
148#define TIF_NOTIFY_RESUME 2 /* callback before returning to user */ 150#define TIF_NOTIFY_RESUME 2 /* callback before returning to user */
149#define TIF_SYSCALL_TRACE 8 151#define TIF_SYSCALL_TRACE 8
150#define TIF_SYSCALL_AUDIT 9 152#define TIF_SYSCALL_AUDIT 9
153#define TIF_SYSCALL_TRACEPOINT 10
151#define TIF_POLLING_NRFLAG 16 154#define TIF_POLLING_NRFLAG 16
152#define TIF_USING_IWMMXT 17 155#define TIF_USING_IWMMXT 17
153#define TIF_MEMDIE 18 /* is terminating due to OOM killer */ 156#define TIF_MEMDIE 18 /* is terminating due to OOM killer */
@@ -160,12 +163,13 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user *,
160#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) 163#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME)
161#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) 164#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
162#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) 165#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT)
166#define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT)
163#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) 167#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
164#define _TIF_USING_IWMMXT (1 << TIF_USING_IWMMXT) 168#define _TIF_USING_IWMMXT (1 << TIF_USING_IWMMXT)
165#define _TIF_SECCOMP (1 << TIF_SECCOMP) 169#define _TIF_SECCOMP (1 << TIF_SECCOMP)
166 170
167/* Checks for any syscall work in entry-common.S */ 171/* Checks for any syscall work in entry-common.S */
168#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT) 172#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SYSCALL_TRACEPOINT)
169 173
170/* 174/*
171 * Change these and you break ASM code in entry-common.S 175 * Change these and you break ASM code in entry-common.S
diff --git a/arch/arm/include/asm/timex.h b/arch/arm/include/asm/timex.h
index ce119442277c..5e711722ebf4 100644
--- a/arch/arm/include/asm/timex.h
+++ b/arch/arm/include/asm/timex.h
@@ -15,12 +15,10 @@
15#include <asm/arch_timer.h> 15#include <asm/arch_timer.h>
16#include <mach/timex.h> 16#include <mach/timex.h>
17 17
18typedef unsigned long cycles_t;
19
20#ifdef ARCH_HAS_READ_CURRENT_TIMER 18#ifdef ARCH_HAS_READ_CURRENT_TIMER
21#define get_cycles() ({ cycles_t c; read_current_timer(&c) ? 0 : c; }) 19#define get_cycles() ({ cycles_t c; read_current_timer(&c) ? 0 : c; })
22#else
23#define get_cycles() (0)
24#endif 20#endif
25 21
22#include <asm-generic/timex.h>
23
26#endif 24#endif
diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h
index 314d4664eae7..99a19512ee26 100644
--- a/arch/arm/include/asm/tlb.h
+++ b/arch/arm/include/asm/tlb.h
@@ -199,6 +199,9 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
199{ 199{
200 pgtable_page_dtor(pte); 200 pgtable_page_dtor(pte);
201 201
202#ifdef CONFIG_ARM_LPAE
203 tlb_add_flush(tlb, addr);
204#else
202 /* 205 /*
203 * With the classic ARM MMU, a pte page has two corresponding pmd 206 * With the classic ARM MMU, a pte page has two corresponding pmd
204 * entries, each covering 1MB. 207 * entries, each covering 1MB.
@@ -206,6 +209,7 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
206 addr &= PMD_MASK; 209 addr &= PMD_MASK;
207 tlb_add_flush(tlb, addr + SZ_1M - PAGE_SIZE); 210 tlb_add_flush(tlb, addr + SZ_1M - PAGE_SIZE);
208 tlb_add_flush(tlb, addr + SZ_1M); 211 tlb_add_flush(tlb, addr + SZ_1M);
212#endif
209 213
210 tlb_remove_page(tlb, pte); 214 tlb_remove_page(tlb, pte);
211} 215}
diff --git a/arch/arm/include/asm/types.h b/arch/arm/include/asm/types.h
deleted file mode 100644
index 28beab917ffc..000000000000
--- a/arch/arm/include/asm/types.h
+++ /dev/null
@@ -1,16 +0,0 @@
1#ifndef __ASM_ARM_TYPES_H
2#define __ASM_ARM_TYPES_H
3
4#include <asm-generic/int-ll64.h>
5
6/*
7 * These aren't exported outside the kernel to avoid name space clashes
8 */
9#ifdef __KERNEL__
10
11#define BITS_PER_LONG 32
12
13#endif /* __KERNEL__ */
14
15#endif
16
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index 479a6352e0b5..77bd79f2ffdb 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -101,28 +101,39 @@ extern int __get_user_1(void *);
101extern int __get_user_2(void *); 101extern int __get_user_2(void *);
102extern int __get_user_4(void *); 102extern int __get_user_4(void *);
103 103
104#define __get_user_x(__r2,__p,__e,__s,__i...) \ 104#define __GUP_CLOBBER_1 "lr", "cc"
105#ifdef CONFIG_CPU_USE_DOMAINS
106#define __GUP_CLOBBER_2 "ip", "lr", "cc"
107#else
108#define __GUP_CLOBBER_2 "lr", "cc"
109#endif
110#define __GUP_CLOBBER_4 "lr", "cc"
111
112#define __get_user_x(__r2,__p,__e,__l,__s) \
105 __asm__ __volatile__ ( \ 113 __asm__ __volatile__ ( \
106 __asmeq("%0", "r0") __asmeq("%1", "r2") \ 114 __asmeq("%0", "r0") __asmeq("%1", "r2") \
115 __asmeq("%3", "r1") \
107 "bl __get_user_" #__s \ 116 "bl __get_user_" #__s \
108 : "=&r" (__e), "=r" (__r2) \ 117 : "=&r" (__e), "=r" (__r2) \
109 : "0" (__p) \ 118 : "0" (__p), "r" (__l) \
110 : __i, "cc") 119 : __GUP_CLOBBER_##__s)
111 120
112#define get_user(x,p) \ 121#define __get_user_check(x,p) \
113 ({ \ 122 ({ \
123 unsigned long __limit = current_thread_info()->addr_limit - 1; \
114 register const typeof(*(p)) __user *__p asm("r0") = (p);\ 124 register const typeof(*(p)) __user *__p asm("r0") = (p);\
115 register unsigned long __r2 asm("r2"); \ 125 register unsigned long __r2 asm("r2"); \
126 register unsigned long __l asm("r1") = __limit; \
116 register int __e asm("r0"); \ 127 register int __e asm("r0"); \
117 switch (sizeof(*(__p))) { \ 128 switch (sizeof(*(__p))) { \
118 case 1: \ 129 case 1: \
119 __get_user_x(__r2, __p, __e, 1, "lr"); \ 130 __get_user_x(__r2, __p, __e, __l, 1); \
120 break; \ 131 break; \
121 case 2: \ 132 case 2: \
122 __get_user_x(__r2, __p, __e, 2, "r3", "lr"); \ 133 __get_user_x(__r2, __p, __e, __l, 2); \
123 break; \ 134 break; \
124 case 4: \ 135 case 4: \
125 __get_user_x(__r2, __p, __e, 4, "lr"); \ 136 __get_user_x(__r2, __p, __e, __l, 4); \
126 break; \ 137 break; \
127 default: __e = __get_user_bad(); break; \ 138 default: __e = __get_user_bad(); break; \
128 } \ 139 } \
@@ -130,42 +141,57 @@ extern int __get_user_4(void *);
130 __e; \ 141 __e; \
131 }) 142 })
132 143
144#define get_user(x,p) \
145 ({ \
146 might_fault(); \
147 __get_user_check(x,p); \
148 })
149
133extern int __put_user_1(void *, unsigned int); 150extern int __put_user_1(void *, unsigned int);
134extern int __put_user_2(void *, unsigned int); 151extern int __put_user_2(void *, unsigned int);
135extern int __put_user_4(void *, unsigned int); 152extern int __put_user_4(void *, unsigned int);
136extern int __put_user_8(void *, unsigned long long); 153extern int __put_user_8(void *, unsigned long long);
137 154
138#define __put_user_x(__r2,__p,__e,__s) \ 155#define __put_user_x(__r2,__p,__e,__l,__s) \
139 __asm__ __volatile__ ( \ 156 __asm__ __volatile__ ( \
140 __asmeq("%0", "r0") __asmeq("%2", "r2") \ 157 __asmeq("%0", "r0") __asmeq("%2", "r2") \
158 __asmeq("%3", "r1") \
141 "bl __put_user_" #__s \ 159 "bl __put_user_" #__s \
142 : "=&r" (__e) \ 160 : "=&r" (__e) \
143 : "0" (__p), "r" (__r2) \ 161 : "0" (__p), "r" (__r2), "r" (__l) \
144 : "ip", "lr", "cc") 162 : "ip", "lr", "cc")
145 163
146#define put_user(x,p) \ 164#define __put_user_check(x,p) \
147 ({ \ 165 ({ \
166 unsigned long __limit = current_thread_info()->addr_limit - 1; \
148 register const typeof(*(p)) __r2 asm("r2") = (x); \ 167 register const typeof(*(p)) __r2 asm("r2") = (x); \
149 register const typeof(*(p)) __user *__p asm("r0") = (p);\ 168 register const typeof(*(p)) __user *__p asm("r0") = (p);\
169 register unsigned long __l asm("r1") = __limit; \
150 register int __e asm("r0"); \ 170 register int __e asm("r0"); \
151 switch (sizeof(*(__p))) { \ 171 switch (sizeof(*(__p))) { \
152 case 1: \ 172 case 1: \
153 __put_user_x(__r2, __p, __e, 1); \ 173 __put_user_x(__r2, __p, __e, __l, 1); \
154 break; \ 174 break; \
155 case 2: \ 175 case 2: \
156 __put_user_x(__r2, __p, __e, 2); \ 176 __put_user_x(__r2, __p, __e, __l, 2); \
157 break; \ 177 break; \
158 case 4: \ 178 case 4: \
159 __put_user_x(__r2, __p, __e, 4); \ 179 __put_user_x(__r2, __p, __e, __l, 4); \
160 break; \ 180 break; \
161 case 8: \ 181 case 8: \
162 __put_user_x(__r2, __p, __e, 8); \ 182 __put_user_x(__r2, __p, __e, __l, 8); \
163 break; \ 183 break; \
164 default: __e = __put_user_bad(); break; \ 184 default: __e = __put_user_bad(); break; \
165 } \ 185 } \
166 __e; \ 186 __e; \
167 }) 187 })
168 188
189#define put_user(x,p) \
190 ({ \
191 might_fault(); \
192 __put_user_check(x,p); \
193 })
194
169#else /* CONFIG_MMU */ 195#else /* CONFIG_MMU */
170 196
171/* 197/*
@@ -219,6 +245,7 @@ do { \
219 unsigned long __gu_addr = (unsigned long)(ptr); \ 245 unsigned long __gu_addr = (unsigned long)(ptr); \
220 unsigned long __gu_val; \ 246 unsigned long __gu_val; \
221 __chk_user_ptr(ptr); \ 247 __chk_user_ptr(ptr); \
248 might_fault(); \
222 switch (sizeof(*(ptr))) { \ 249 switch (sizeof(*(ptr))) { \
223 case 1: __get_user_asm_byte(__gu_val,__gu_addr,err); break; \ 250 case 1: __get_user_asm_byte(__gu_val,__gu_addr,err); break; \
224 case 2: __get_user_asm_half(__gu_val,__gu_addr,err); break; \ 251 case 2: __get_user_asm_half(__gu_val,__gu_addr,err); break; \
@@ -300,6 +327,7 @@ do { \
300 unsigned long __pu_addr = (unsigned long)(ptr); \ 327 unsigned long __pu_addr = (unsigned long)(ptr); \
301 __typeof__(*(ptr)) __pu_val = (x); \ 328 __typeof__(*(ptr)) __pu_val = (x); \
302 __chk_user_ptr(ptr); \ 329 __chk_user_ptr(ptr); \
330 might_fault(); \
303 switch (sizeof(*(ptr))) { \ 331 switch (sizeof(*(ptr))) { \
304 case 1: __put_user_asm_byte(__pu_val,__pu_addr,err); break; \ 332 case 1: __put_user_asm_byte(__pu_val,__pu_addr,err); break; \
305 case 2: __put_user_asm_half(__pu_val,__pu_addr,err); break; \ 333 case 2: __put_user_asm_half(__pu_val,__pu_addr,err); break; \
diff --git a/arch/arm/include/asm/unaligned.h b/arch/arm/include/asm/unaligned.h
deleted file mode 100644
index 44593a894903..000000000000
--- a/arch/arm/include/asm/unaligned.h
+++ /dev/null
@@ -1,19 +0,0 @@
1#ifndef _ASM_ARM_UNALIGNED_H
2#define _ASM_ARM_UNALIGNED_H
3
4#include <linux/unaligned/le_byteshift.h>
5#include <linux/unaligned/be_byteshift.h>
6#include <linux/unaligned/generic.h>
7
8/*
9 * Select endianness
10 */
11#ifndef __ARMEB__
12#define get_unaligned __get_unaligned_le
13#define put_unaligned __put_unaligned_le
14#else
15#define get_unaligned __get_unaligned_be
16#define put_unaligned __put_unaligned_be
17#endif
18
19#endif /* _ASM_ARM_UNALIGNED_H */
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index 0cab47d4a83f..d9ff5cc3a506 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -404,6 +404,15 @@
404#define __NR_setns (__NR_SYSCALL_BASE+375) 404#define __NR_setns (__NR_SYSCALL_BASE+375)
405#define __NR_process_vm_readv (__NR_SYSCALL_BASE+376) 405#define __NR_process_vm_readv (__NR_SYSCALL_BASE+376)
406#define __NR_process_vm_writev (__NR_SYSCALL_BASE+377) 406#define __NR_process_vm_writev (__NR_SYSCALL_BASE+377)
407 /* 378 for kcmp */
408
409/*
410 * This may need to be greater than __NR_last_syscall+1 in order to
411 * account for the padding in the syscall table
412 */
413#ifdef __KERNEL__
414#define __NR_syscalls (380)
415#endif /* __KERNEL__ */
407 416
408/* 417/*
409 * The following SWIs are ARM private. 418 * The following SWIs are ARM private.
@@ -483,6 +492,7 @@
483 */ 492 */
484#define __IGNORE_fadvise64_64 493#define __IGNORE_fadvise64_64
485#define __IGNORE_migrate_pages 494#define __IGNORE_migrate_pages
495#define __IGNORE_kcmp
486 496
487#endif /* __KERNEL__ */ 497#endif /* __KERNEL__ */
488#endif /* __ASM_ARM_UNISTD_H */ 498#endif /* __ASM_ARM_UNISTD_H */
diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c
index 1429d8989fb9..c985b481192c 100644
--- a/arch/arm/kernel/asm-offsets.c
+++ b/arch/arm/kernel/asm-offsets.c
@@ -59,10 +59,12 @@ int main(void)
59 DEFINE(TI_USED_CP, offsetof(struct thread_info, used_cp)); 59 DEFINE(TI_USED_CP, offsetof(struct thread_info, used_cp));
60 DEFINE(TI_TP_VALUE, offsetof(struct thread_info, tp_value)); 60 DEFINE(TI_TP_VALUE, offsetof(struct thread_info, tp_value));
61 DEFINE(TI_FPSTATE, offsetof(struct thread_info, fpstate)); 61 DEFINE(TI_FPSTATE, offsetof(struct thread_info, fpstate));
62#ifdef CONFIG_VFP
62 DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate)); 63 DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate));
63#ifdef CONFIG_SMP 64#ifdef CONFIG_SMP
64 DEFINE(VFP_CPU, offsetof(union vfp_state, hard.cpu)); 65 DEFINE(VFP_CPU, offsetof(union vfp_state, hard.cpu));
65#endif 66#endif
67#endif
66#ifdef CONFIG_ARM_THUMBEE 68#ifdef CONFIG_ARM_THUMBEE
67 DEFINE(TI_THUMBEE_STATE, offsetof(struct thread_info, thumbee_state)); 69 DEFINE(TI_THUMBEE_STATE, offsetof(struct thread_info, thumbee_state));
68#endif 70#endif
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index 463ff4a0ec8a..e337879595e5 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -387,6 +387,7 @@
387/* 375 */ CALL(sys_setns) 387/* 375 */ CALL(sys_setns)
388 CALL(sys_process_vm_readv) 388 CALL(sys_process_vm_readv)
389 CALL(sys_process_vm_writev) 389 CALL(sys_process_vm_writev)
390 CALL(sys_ni_syscall) /* reserved for sys_kcmp */
390#ifndef syscalls_counted 391#ifndef syscalls_counted
391.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls 392.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
392#define syscalls_counted 393#define syscalls_counted
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 978eac57e04a..f45987037bf1 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -94,6 +94,15 @@ ENDPROC(ret_from_fork)
94 .equ NR_syscalls,0 94 .equ NR_syscalls,0
95#define CALL(x) .equ NR_syscalls,NR_syscalls+1 95#define CALL(x) .equ NR_syscalls,NR_syscalls+1
96#include "calls.S" 96#include "calls.S"
97
98/*
99 * Ensure that the system call table is equal to __NR_syscalls,
100 * which is the value the rest of the system sees
101 */
102.ifne NR_syscalls - __NR_syscalls
103.error "__NR_syscalls is not equal to the size of the syscall table"
104.endif
105
97#undef CALL 106#undef CALL
98#define CALL(x) .long x 107#define CALL(x) .long x
99 108
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index ba386bd94107..281bf3301241 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -159,6 +159,12 @@ static int debug_arch_supported(void)
159 arch >= ARM_DEBUG_ARCH_V7_1; 159 arch >= ARM_DEBUG_ARCH_V7_1;
160} 160}
161 161
162/* Can we determine the watchpoint access type from the fsr? */
163static int debug_exception_updates_fsr(void)
164{
165 return 0;
166}
167
162/* Determine number of WRP registers available. */ 168/* Determine number of WRP registers available. */
163static int get_num_wrp_resources(void) 169static int get_num_wrp_resources(void)
164{ 170{
@@ -604,13 +610,14 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp)
604 /* Aligned */ 610 /* Aligned */
605 break; 611 break;
606 case 1: 612 case 1:
607 /* Allow single byte watchpoint. */
608 if (info->ctrl.len == ARM_BREAKPOINT_LEN_1)
609 break;
610 case 2: 613 case 2:
611 /* Allow halfword watchpoints and breakpoints. */ 614 /* Allow halfword watchpoints and breakpoints. */
612 if (info->ctrl.len == ARM_BREAKPOINT_LEN_2) 615 if (info->ctrl.len == ARM_BREAKPOINT_LEN_2)
613 break; 616 break;
617 case 3:
618 /* Allow single byte watchpoint. */
619 if (info->ctrl.len == ARM_BREAKPOINT_LEN_1)
620 break;
614 default: 621 default:
615 ret = -EINVAL; 622 ret = -EINVAL;
616 goto out; 623 goto out;
@@ -619,18 +626,35 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp)
619 info->address &= ~alignment_mask; 626 info->address &= ~alignment_mask;
620 info->ctrl.len <<= offset; 627 info->ctrl.len <<= offset;
621 628
622 /* 629 if (!bp->overflow_handler) {
623 * Currently we rely on an overflow handler to take 630 /*
624 * care of single-stepping the breakpoint when it fires. 631 * Mismatch breakpoints are required for single-stepping
625 * In the case of userspace breakpoints on a core with V7 debug, 632 * breakpoints.
626 * we can use the mismatch feature as a poor-man's hardware 633 */
627 * single-step, but this only works for per-task breakpoints. 634 if (!core_has_mismatch_brps())
628 */ 635 return -EINVAL;
629 if (!bp->overflow_handler && (arch_check_bp_in_kernelspace(bp) || 636
630 !core_has_mismatch_brps() || !bp->hw.bp_target)) { 637 /* We don't allow mismatch breakpoints in kernel space. */
631 pr_warning("overflow handler required but none found\n"); 638 if (arch_check_bp_in_kernelspace(bp))
632 ret = -EINVAL; 639 return -EPERM;
640
641 /*
642 * Per-cpu breakpoints are not supported by our stepping
643 * mechanism.
644 */
645 if (!bp->hw.bp_target)
646 return -EINVAL;
647
648 /*
649 * We only support specific access types if the fsr
650 * reports them.
651 */
652 if (!debug_exception_updates_fsr() &&
653 (info->ctrl.type == ARM_BREAKPOINT_LOAD ||
654 info->ctrl.type == ARM_BREAKPOINT_STORE))
655 return -EINVAL;
633 } 656 }
657
634out: 658out:
635 return ret; 659 return ret;
636} 660}
@@ -706,10 +730,12 @@ static void watchpoint_handler(unsigned long addr, unsigned int fsr,
706 goto unlock; 730 goto unlock;
707 731
708 /* Check that the access type matches. */ 732 /* Check that the access type matches. */
709 access = (fsr & ARM_FSR_ACCESS_MASK) ? HW_BREAKPOINT_W : 733 if (debug_exception_updates_fsr()) {
710 HW_BREAKPOINT_R; 734 access = (fsr & ARM_FSR_ACCESS_MASK) ?
711 if (!(access & hw_breakpoint_type(wp))) 735 HW_BREAKPOINT_W : HW_BREAKPOINT_R;
712 goto unlock; 736 if (!(access & hw_breakpoint_type(wp)))
737 goto unlock;
738 }
713 739
714 /* We have a winner. */ 740 /* We have a winner. */
715 info->trigger = addr; 741 info->trigger = addr;
diff --git a/arch/arm/kernel/machine_kexec.c b/arch/arm/kernel/machine_kexec.c
index dfcdb9f7c126..e29c3337ca81 100644
--- a/arch/arm/kernel/machine_kexec.c
+++ b/arch/arm/kernel/machine_kexec.c
@@ -8,7 +8,9 @@
8#include <linux/reboot.h> 8#include <linux/reboot.h>
9#include <linux/io.h> 9#include <linux/io.h>
10#include <linux/irq.h> 10#include <linux/irq.h>
11#include <linux/memblock.h>
11#include <asm/pgtable.h> 12#include <asm/pgtable.h>
13#include <linux/of_fdt.h>
12#include <asm/pgalloc.h> 14#include <asm/pgalloc.h>
13#include <asm/mmu_context.h> 15#include <asm/mmu_context.h>
14#include <asm/cacheflush.h> 16#include <asm/cacheflush.h>
@@ -32,6 +34,29 @@ static atomic_t waiting_for_crash_ipi;
32 34
33int machine_kexec_prepare(struct kimage *image) 35int machine_kexec_prepare(struct kimage *image)
34{ 36{
37 struct kexec_segment *current_segment;
38 __be32 header;
39 int i, err;
40
41 /*
42 * No segment at default ATAGs address. try to locate
43 * a dtb using magic.
44 */
45 for (i = 0; i < image->nr_segments; i++) {
46 current_segment = &image->segment[i];
47
48 err = memblock_is_region_memory(current_segment->mem,
49 current_segment->memsz);
50 if (err)
51 return - EINVAL;
52
53 err = get_user(header, (__be32*)current_segment->buf);
54 if (err)
55 return err;
56
57 if (be32_to_cpu(header) == OF_DT_HEADER)
58 kexec_boot_atags = current_segment->mem;
59 }
35 return 0; 60 return 0;
36} 61}
37 62
@@ -122,7 +147,9 @@ void machine_kexec(struct kimage *image)
122 kexec_start_address = image->start; 147 kexec_start_address = image->start;
123 kexec_indirection_page = page_list; 148 kexec_indirection_page = page_list;
124 kexec_mach_type = machine_arch_type; 149 kexec_mach_type = machine_arch_type;
125 kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET; 150 if (!kexec_boot_atags)
151 kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET;
152
126 153
127 /* copy our kernel relocation code to the control code page */ 154 /* copy our kernel relocation code to the control code page */
128 memcpy(reboot_code_buffer, 155 memcpy(reboot_code_buffer,
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 3e0fc5f7ed4b..739db3a1b2d2 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -30,6 +30,9 @@
30#include <asm/pgtable.h> 30#include <asm/pgtable.h>
31#include <asm/traps.h> 31#include <asm/traps.h>
32 32
33#define CREATE_TRACE_POINTS
34#include <trace/events/syscalls.h>
35
33#define REG_PC 15 36#define REG_PC 15
34#define REG_PSR 16 37#define REG_PSR 16
35/* 38/*
@@ -918,11 +921,11 @@ static int ptrace_syscall_trace(struct pt_regs *regs, int scno,
918{ 921{
919 unsigned long ip; 922 unsigned long ip;
920 923
924 current_thread_info()->syscall = scno;
925
921 if (!test_thread_flag(TIF_SYSCALL_TRACE)) 926 if (!test_thread_flag(TIF_SYSCALL_TRACE))
922 return scno; 927 return scno;
923 928
924 current_thread_info()->syscall = scno;
925
926 /* 929 /*
927 * IP is used to denote syscall entry/exit: 930 * IP is used to denote syscall entry/exit:
928 * IP = 0 -> entry, =1 -> exit 931 * IP = 0 -> entry, =1 -> exit
@@ -941,15 +944,19 @@ static int ptrace_syscall_trace(struct pt_regs *regs, int scno,
941 944
942asmlinkage int syscall_trace_enter(struct pt_regs *regs, int scno) 945asmlinkage int syscall_trace_enter(struct pt_regs *regs, int scno)
943{ 946{
944 int ret = ptrace_syscall_trace(regs, scno, PTRACE_SYSCALL_ENTER); 947 scno = ptrace_syscall_trace(regs, scno, PTRACE_SYSCALL_ENTER);
948 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
949 trace_sys_enter(regs, scno);
945 audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs->ARM_r0, regs->ARM_r1, 950 audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs->ARM_r0, regs->ARM_r1,
946 regs->ARM_r2, regs->ARM_r3); 951 regs->ARM_r2, regs->ARM_r3);
947 return ret; 952 return scno;
948} 953}
949 954
950asmlinkage int syscall_trace_exit(struct pt_regs *regs, int scno) 955asmlinkage int syscall_trace_exit(struct pt_regs *regs, int scno)
951{ 956{
952 int ret = ptrace_syscall_trace(regs, scno, PTRACE_SYSCALL_EXIT); 957 scno = ptrace_syscall_trace(regs, scno, PTRACE_SYSCALL_EXIT);
958 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
959 trace_sys_exit(regs, scno);
953 audit_syscall_exit(regs); 960 audit_syscall_exit(regs);
954 return ret; 961 return scno;
955} 962}
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index f4515393248d..e21bac20d90d 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -9,6 +9,7 @@
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/jiffies.h> 10#include <linux/jiffies.h>
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/moduleparam.h>
12#include <linux/sched.h> 13#include <linux/sched.h>
13#include <linux/syscore_ops.h> 14#include <linux/syscore_ops.h>
14#include <linux/timer.h> 15#include <linux/timer.h>
@@ -27,6 +28,9 @@ struct clock_data {
27 28
28static void sched_clock_poll(unsigned long wrap_ticks); 29static void sched_clock_poll(unsigned long wrap_ticks);
29static DEFINE_TIMER(sched_clock_timer, sched_clock_poll, 0, 0); 30static DEFINE_TIMER(sched_clock_timer, sched_clock_poll, 0, 0);
31static int irqtime = -1;
32
33core_param(irqtime, irqtime, int, 0400);
30 34
31static struct clock_data cd = { 35static struct clock_data cd = {
32 .mult = NSEC_PER_SEC / HZ, 36 .mult = NSEC_PER_SEC / HZ,
@@ -157,6 +161,10 @@ void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
157 */ 161 */
158 cd.epoch_ns = 0; 162 cd.epoch_ns = 0;
159 163
164 /* Enable IRQ time accounting if we have a fast enough sched_clock */
165 if (irqtime > 0 || (irqtime == -1 && rate >= 1000000))
166 enable_sched_clock_irqtime();
167
160 pr_debug("Registered %pF as sched_clock source\n", read); 168 pr_debug("Registered %pF as sched_clock source\n", read);
161} 169}
162 170
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index ebd8ad274d76..d98c37e97d9d 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -51,7 +51,8 @@
51struct secondary_data secondary_data; 51struct secondary_data secondary_data;
52 52
53enum ipi_msg_type { 53enum ipi_msg_type {
54 IPI_TIMER = 2, 54 IPI_WAKEUP,
55 IPI_TIMER,
55 IPI_RESCHEDULE, 56 IPI_RESCHEDULE,
56 IPI_CALL_FUNC, 57 IPI_CALL_FUNC,
57 IPI_CALL_FUNC_SINGLE, 58 IPI_CALL_FUNC_SINGLE,
@@ -347,7 +348,8 @@ void arch_send_call_function_single_ipi(int cpu)
347} 348}
348 349
349static const char *ipi_types[NR_IPI] = { 350static const char *ipi_types[NR_IPI] = {
350#define S(x,s) [x - IPI_TIMER] = s 351#define S(x,s) [x] = s
352 S(IPI_WAKEUP, "CPU wakeup interrupts"),
351 S(IPI_TIMER, "Timer broadcast interrupts"), 353 S(IPI_TIMER, "Timer broadcast interrupts"),
352 S(IPI_RESCHEDULE, "Rescheduling interrupts"), 354 S(IPI_RESCHEDULE, "Rescheduling interrupts"),
353 S(IPI_CALL_FUNC, "Function call interrupts"), 355 S(IPI_CALL_FUNC, "Function call interrupts"),
@@ -500,10 +502,13 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
500 unsigned int cpu = smp_processor_id(); 502 unsigned int cpu = smp_processor_id();
501 struct pt_regs *old_regs = set_irq_regs(regs); 503 struct pt_regs *old_regs = set_irq_regs(regs);
502 504
503 if (ipinr >= IPI_TIMER && ipinr < IPI_TIMER + NR_IPI) 505 if (ipinr < NR_IPI)
504 __inc_irq_stat(cpu, ipi_irqs[ipinr - IPI_TIMER]); 506 __inc_irq_stat(cpu, ipi_irqs[ipinr]);
505 507
506 switch (ipinr) { 508 switch (ipinr) {
509 case IPI_WAKEUP:
510 break;
511
507 case IPI_TIMER: 512 case IPI_TIMER:
508 irq_enter(); 513 irq_enter();
509 ipi_timer(); 514 ipi_timer();
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index fef42b21cecb..e1f906989bb8 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -11,7 +11,6 @@
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/clk.h> 13#include <linux/clk.h>
14#include <linux/cpufreq.h>
15#include <linux/delay.h> 14#include <linux/delay.h>
16#include <linux/device.h> 15#include <linux/device.h>
17#include <linux/err.h> 16#include <linux/err.h>
@@ -96,7 +95,52 @@ static void twd_timer_stop(struct clock_event_device *clk)
96 disable_percpu_irq(clk->irq); 95 disable_percpu_irq(clk->irq);
97} 96}
98 97
99#ifdef CONFIG_CPU_FREQ 98#ifdef CONFIG_COMMON_CLK
99
100/*
101 * Updates clockevent frequency when the cpu frequency changes.
102 * Called on the cpu that is changing frequency with interrupts disabled.
103 */
104static void twd_update_frequency(void *new_rate)
105{
106 twd_timer_rate = *((unsigned long *) new_rate);
107
108 clockevents_update_freq(*__this_cpu_ptr(twd_evt), twd_timer_rate);
109}
110
111static int twd_rate_change(struct notifier_block *nb,
112 unsigned long flags, void *data)
113{
114 struct clk_notifier_data *cnd = data;
115
116 /*
117 * The twd clock events must be reprogrammed to account for the new
118 * frequency. The timer is local to a cpu, so cross-call to the
119 * changing cpu.
120 */
121 if (flags == POST_RATE_CHANGE)
122 smp_call_function(twd_update_frequency,
123 (void *)&cnd->new_rate, 1);
124
125 return NOTIFY_OK;
126}
127
128static struct notifier_block twd_clk_nb = {
129 .notifier_call = twd_rate_change,
130};
131
132static int twd_clk_init(void)
133{
134 if (twd_evt && *__this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
135 return clk_notifier_register(twd_clk, &twd_clk_nb);
136
137 return 0;
138}
139core_initcall(twd_clk_init);
140
141#elif defined (CONFIG_CPU_FREQ)
142
143#include <linux/cpufreq.h>
100 144
101/* 145/*
102 * Updates clockevent frequency when the cpu frequency changes. 146 * Updates clockevent frequency when the cpu frequency changes.
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index f7945218b8c6..b0179b89a04c 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -420,20 +420,23 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
420#endif 420#endif
421 instr = *(u32 *) pc; 421 instr = *(u32 *) pc;
422 } else if (thumb_mode(regs)) { 422 } else if (thumb_mode(regs)) {
423 get_user(instr, (u16 __user *)pc); 423 if (get_user(instr, (u16 __user *)pc))
424 goto die_sig;
424 if (is_wide_instruction(instr)) { 425 if (is_wide_instruction(instr)) {
425 unsigned int instr2; 426 unsigned int instr2;
426 get_user(instr2, (u16 __user *)pc+1); 427 if (get_user(instr2, (u16 __user *)pc+1))
428 goto die_sig;
427 instr <<= 16; 429 instr <<= 16;
428 instr |= instr2; 430 instr |= instr2;
429 } 431 }
430 } else { 432 } else if (get_user(instr, (u32 __user *)pc)) {
431 get_user(instr, (u32 __user *)pc); 433 goto die_sig;
432 } 434 }
433 435
434 if (call_undef_hook(regs, instr) == 0) 436 if (call_undef_hook(regs, instr) == 0)
435 return; 437 return;
436 438
439die_sig:
437#ifdef CONFIG_DEBUG_USER 440#ifdef CONFIG_DEBUG_USER
438 if (user_debug & UDBG_UNDEFINED) { 441 if (user_debug & UDBG_UNDEFINED) {
439 printk(KERN_INFO "%s (%d): undefined instruction: pc=%p\n", 442 printk(KERN_INFO "%s (%d): undefined instruction: pc=%p\n",
diff --git a/arch/arm/lib/delay.c b/arch/arm/lib/delay.c
index d6dacc69254e..395d5fbb8fa2 100644
--- a/arch/arm/lib/delay.c
+++ b/arch/arm/lib/delay.c
@@ -59,6 +59,7 @@ void __init init_current_timer_delay(unsigned long freq)
59{ 59{
60 pr_info("Switching to timer-based delay loop\n"); 60 pr_info("Switching to timer-based delay loop\n");
61 lpj_fine = freq / HZ; 61 lpj_fine = freq / HZ;
62 loops_per_jiffy = lpj_fine;
62 arm_delay_ops.delay = __timer_delay; 63 arm_delay_ops.delay = __timer_delay;
63 arm_delay_ops.const_udelay = __timer_const_udelay; 64 arm_delay_ops.const_udelay = __timer_const_udelay;
64 arm_delay_ops.udelay = __timer_udelay; 65 arm_delay_ops.udelay = __timer_udelay;
diff --git a/arch/arm/lib/getuser.S b/arch/arm/lib/getuser.S
index 11093a7c3e32..9b06bb41fca6 100644
--- a/arch/arm/lib/getuser.S
+++ b/arch/arm/lib/getuser.S
@@ -16,8 +16,9 @@
16 * __get_user_X 16 * __get_user_X
17 * 17 *
18 * Inputs: r0 contains the address 18 * Inputs: r0 contains the address
19 * r1 contains the address limit, which must be preserved
19 * Outputs: r0 is the error code 20 * Outputs: r0 is the error code
20 * r2, r3 contains the zero-extended value 21 * r2 contains the zero-extended value
21 * lr corrupted 22 * lr corrupted
22 * 23 *
23 * No other registers must be altered. (see <asm/uaccess.h> 24 * No other registers must be altered. (see <asm/uaccess.h>
@@ -27,33 +28,39 @@
27 * Note also that it is intended that __get_user_bad is not global. 28 * Note also that it is intended that __get_user_bad is not global.
28 */ 29 */
29#include <linux/linkage.h> 30#include <linux/linkage.h>
31#include <asm/assembler.h>
30#include <asm/errno.h> 32#include <asm/errno.h>
31#include <asm/domain.h> 33#include <asm/domain.h>
32 34
33ENTRY(__get_user_1) 35ENTRY(__get_user_1)
36 check_uaccess r0, 1, r1, r2, __get_user_bad
341: TUSER(ldrb) r2, [r0] 371: TUSER(ldrb) r2, [r0]
35 mov r0, #0 38 mov r0, #0
36 mov pc, lr 39 mov pc, lr
37ENDPROC(__get_user_1) 40ENDPROC(__get_user_1)
38 41
39ENTRY(__get_user_2) 42ENTRY(__get_user_2)
40#ifdef CONFIG_THUMB2_KERNEL 43 check_uaccess r0, 2, r1, r2, __get_user_bad
412: TUSER(ldrb) r2, [r0] 44#ifdef CONFIG_CPU_USE_DOMAINS
423: TUSER(ldrb) r3, [r0, #1] 45rb .req ip
462: ldrbt r2, [r0], #1
473: ldrbt rb, [r0], #0
43#else 48#else
442: TUSER(ldrb) r2, [r0], #1 49rb .req r0
453: TUSER(ldrb) r3, [r0] 502: ldrb r2, [r0]
513: ldrb rb, [r0, #1]
46#endif 52#endif
47#ifndef __ARMEB__ 53#ifndef __ARMEB__
48 orr r2, r2, r3, lsl #8 54 orr r2, r2, rb, lsl #8
49#else 55#else
50 orr r2, r3, r2, lsl #8 56 orr r2, rb, r2, lsl #8
51#endif 57#endif
52 mov r0, #0 58 mov r0, #0
53 mov pc, lr 59 mov pc, lr
54ENDPROC(__get_user_2) 60ENDPROC(__get_user_2)
55 61
56ENTRY(__get_user_4) 62ENTRY(__get_user_4)
63 check_uaccess r0, 4, r1, r2, __get_user_bad
574: TUSER(ldr) r2, [r0] 644: TUSER(ldr) r2, [r0]
58 mov r0, #0 65 mov r0, #0
59 mov pc, lr 66 mov pc, lr
diff --git a/arch/arm/lib/putuser.S b/arch/arm/lib/putuser.S
index 7db25990c589..3d73dcb959b0 100644
--- a/arch/arm/lib/putuser.S
+++ b/arch/arm/lib/putuser.S
@@ -16,6 +16,7 @@
16 * __put_user_X 16 * __put_user_X
17 * 17 *
18 * Inputs: r0 contains the address 18 * Inputs: r0 contains the address
19 * r1 contains the address limit, which must be preserved
19 * r2, r3 contains the value 20 * r2, r3 contains the value
20 * Outputs: r0 is the error code 21 * Outputs: r0 is the error code
21 * lr corrupted 22 * lr corrupted
@@ -27,16 +28,19 @@
27 * Note also that it is intended that __put_user_bad is not global. 28 * Note also that it is intended that __put_user_bad is not global.
28 */ 29 */
29#include <linux/linkage.h> 30#include <linux/linkage.h>
31#include <asm/assembler.h>
30#include <asm/errno.h> 32#include <asm/errno.h>
31#include <asm/domain.h> 33#include <asm/domain.h>
32 34
33ENTRY(__put_user_1) 35ENTRY(__put_user_1)
36 check_uaccess r0, 1, r1, ip, __put_user_bad
341: TUSER(strb) r2, [r0] 371: TUSER(strb) r2, [r0]
35 mov r0, #0 38 mov r0, #0
36 mov pc, lr 39 mov pc, lr
37ENDPROC(__put_user_1) 40ENDPROC(__put_user_1)
38 41
39ENTRY(__put_user_2) 42ENTRY(__put_user_2)
43 check_uaccess r0, 2, r1, ip, __put_user_bad
40 mov ip, r2, lsr #8 44 mov ip, r2, lsr #8
41#ifdef CONFIG_THUMB2_KERNEL 45#ifdef CONFIG_THUMB2_KERNEL
42#ifndef __ARMEB__ 46#ifndef __ARMEB__
@@ -60,12 +64,14 @@ ENTRY(__put_user_2)
60ENDPROC(__put_user_2) 64ENDPROC(__put_user_2)
61 65
62ENTRY(__put_user_4) 66ENTRY(__put_user_4)
67 check_uaccess r0, 4, r1, ip, __put_user_bad
634: TUSER(str) r2, [r0] 684: TUSER(str) r2, [r0]
64 mov r0, #0 69 mov r0, #0
65 mov pc, lr 70 mov pc, lr
66ENDPROC(__put_user_4) 71ENDPROC(__put_user_4)
67 72
68ENTRY(__put_user_8) 73ENTRY(__put_user_8)
74 check_uaccess r0, 8, r1, ip, __put_user_bad
69#ifdef CONFIG_THUMB2_KERNEL 75#ifdef CONFIG_THUMB2_KERNEL
705: TUSER(str) r2, [r0] 765: TUSER(str) r2, [r0]
716: TUSER(str) r3, [r0, #4] 776: TUSER(str) r3, [r0, #4]
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 36c3984aaa47..090e32b0cd54 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -139,7 +139,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
139 139
140 __raw_writel(virt_to_phys(exynos4_secondary_startup), 140 __raw_writel(virt_to_phys(exynos4_secondary_startup),
141 CPU1_BOOT_REG); 141 CPU1_BOOT_REG);
142 gic_raise_softirq(cpumask_of(cpu), 1); 142 gic_raise_softirq(cpumask_of(cpu), 0);
143 143
144 if (pen_release == -1) 144 if (pen_release == -1)
145 break; 145 break;
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index fdd8cc87c9fe..d20d4795f4ea 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -222,10 +222,8 @@ int __init mx25_clocks_init(void)
222 clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0"); 222 clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0");
223 clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0"); 223 clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0");
224 clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0"); 224 clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0");
225 clk_register_clkdev(clk[ssi1_ipg_per], "per", "imx-ssi.0"); 225 clk_register_clkdev(clk[ssi1_ipg], NULL, "imx-ssi.0");
226 clk_register_clkdev(clk[ssi1_ipg], "ipg", "imx-ssi.0"); 226 clk_register_clkdev(clk[ssi2_ipg], NULL, "imx-ssi.1");
227 clk_register_clkdev(clk[ssi2_ipg_per], "per", "imx-ssi.1");
228 clk_register_clkdev(clk[ssi2_ipg], "ipg", "imx-ssi.1");
229 clk_register_clkdev(clk[esdhc1_ipg_per], "per", "sdhci-esdhc-imx25.0"); 227 clk_register_clkdev(clk[esdhc1_ipg_per], "per", "sdhci-esdhc-imx25.0");
230 clk_register_clkdev(clk[esdhc1_ipg], "ipg", "sdhci-esdhc-imx25.0"); 228 clk_register_clkdev(clk[esdhc1_ipg], "ipg", "sdhci-esdhc-imx25.0");
231 clk_register_clkdev(clk[esdhc1_ahb], "ahb", "sdhci-esdhc-imx25.0"); 229 clk_register_clkdev(clk[esdhc1_ahb], "ahb", "sdhci-esdhc-imx25.0");
@@ -243,6 +241,6 @@ int __init mx25_clocks_init(void)
243 clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma"); 241 clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma");
244 clk_register_clkdev(clk[iim_ipg], "iim", NULL); 242 clk_register_clkdev(clk[iim_ipg], "iim", NULL);
245 243
246 mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); 244 mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), MX25_INT_GPT1);
247 return 0; 245 return 0;
248} 246}
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index c6422fb10bae..65fb8bcd86cb 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -230,10 +230,8 @@ int __init mx35_clocks_init()
230 clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb"); 230 clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb");
231 clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1"); 231 clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1");
232 clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma"); 232 clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma");
233 clk_register_clkdev(clk[ipg], "ipg", "imx-ssi.0"); 233 clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0");
234 clk_register_clkdev(clk[ssi1_div_post], "per", "imx-ssi.0"); 234 clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1");
235 clk_register_clkdev(clk[ipg], "ipg", "imx-ssi.1");
236 clk_register_clkdev(clk[ssi2_div_post], "per", "imx-ssi.1");
237 /* i.mx35 has the i.mx21 type uart */ 235 /* i.mx35 has the i.mx21 type uart */
238 clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0"); 236 clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0");
239 clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0"); 237 clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0");
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c
index 2c6ab3273f9e..5985ed1b8c98 100644
--- a/arch/arm/mach-imx/mach-armadillo5x0.c
+++ b/arch/arm/mach-imx/mach-armadillo5x0.c
@@ -526,7 +526,8 @@ static void __init armadillo5x0_init(void)
526 imx31_add_mxc_nand(&armadillo5x0_nand_board_info); 526 imx31_add_mxc_nand(&armadillo5x0_nand_board_info);
527 527
528 /* set NAND page size to 2k if not configured via boot mode pins */ 528 /* set NAND page size to 2k if not configured via boot mode pins */
529 __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR); 529 __raw_writel(__raw_readl(mx3_ccm_base + MXC_CCM_RCSR) |
530 (1 << 30), mx3_ccm_base + MXC_CCM_RCSR);
530 531
531 /* RTC */ 532 /* RTC */
532 /* Get RTC IRQ and register the chip */ 533 /* Get RTC IRQ and register the chip */
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index f264ddddd47c..5823a2e65124 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -32,13 +32,13 @@
32#include <linux/delay.h> 32#include <linux/delay.h>
33#include <linux/dma-mapping.h> 33#include <linux/dma-mapping.h>
34#include <linux/leds.h> 34#include <linux/leds.h>
35#include <linux/memblock.h>
36#include <media/soc_camera.h> 35#include <media/soc_camera.h>
37#include <sound/tlv320aic32x4.h> 36#include <sound/tlv320aic32x4.h>
38#include <asm/mach-types.h> 37#include <asm/mach-types.h>
39#include <asm/mach/arch.h> 38#include <asm/mach/arch.h>
40#include <asm/mach/time.h> 39#include <asm/mach/time.h>
41#include <asm/system_info.h> 40#include <asm/system_info.h>
41#include <asm/memblock.h>
42#include <mach/common.h> 42#include <mach/common.h>
43#include <mach/hardware.h> 43#include <mach/hardware.h>
44#include <mach/iomux-mx27.h> 44#include <mach/iomux-mx27.h>
@@ -233,10 +233,8 @@ static void __init visstrim_camera_init(void)
233static void __init visstrim_reserve(void) 233static void __init visstrim_reserve(void)
234{ 234{
235 /* reserve 4 MiB for mx2-camera */ 235 /* reserve 4 MiB for mx2-camera */
236 mx2_camera_base = memblock_alloc(MX2_CAMERA_BUF_SIZE, 236 mx2_camera_base = memblock_steal(MX2_CAMERA_BUF_SIZE,
237 MX2_CAMERA_BUF_SIZE); 237 MX2_CAMERA_BUF_SIZE);
238 memblock_free(mx2_camera_base, MX2_CAMERA_BUF_SIZE);
239 memblock_remove(mx2_camera_base, MX2_CAMERA_BUF_SIZE);
240} 238}
241 239
242/* GPIOs used as events for applications */ 240/* GPIOs used as events for applications */
diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c
index 8dabfe81d07c..ff886e01a0b0 100644
--- a/arch/arm/mach-mxs/mach-mxs.c
+++ b/arch/arm/mach-mxs/mach-mxs.c
@@ -261,7 +261,7 @@ static void __init apx4devkit_init(void)
261 enable_clk_enet_out(); 261 enable_clk_enet_out();
262 262
263 if (IS_BUILTIN(CONFIG_PHYLIB)) 263 if (IS_BUILTIN(CONFIG_PHYLIB))
264 phy_register_fixup_for_uid(PHY_ID_KS8051, MICREL_PHY_ID_MASK, 264 phy_register_fixup_for_uid(PHY_ID_KSZ8051, MICREL_PHY_ID_MASK,
265 apx4devkit_phy_fixup); 265 apx4devkit_phy_fixup);
266 266
267 mxsfb_pdata.mode_list = apx4devkit_video_modes; 267 mxsfb_pdata.mode_list = apx4devkit_video_modes;
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index fcd4e85c4ddc..346fd26f3aa6 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -232,10 +232,11 @@ config MACH_OMAP3_PANDORA
232 select OMAP_PACKAGE_CBB 232 select OMAP_PACKAGE_CBB
233 select REGULATOR_FIXED_VOLTAGE if REGULATOR 233 select REGULATOR_FIXED_VOLTAGE if REGULATOR
234 234
235config MACH_OMAP3_TOUCHBOOK 235config MACH_TOUCHBOOK
236 bool "OMAP3 Touch Book" 236 bool "OMAP3 Touch Book"
237 depends on ARCH_OMAP3 237 depends on ARCH_OMAP3
238 default y 238 default y
239 select OMAP_PACKAGE_CBB
239 240
240config MACH_OMAP_3430SDP 241config MACH_OMAP_3430SDP
241 bool "OMAP 3430 SDP board" 242 bool "OMAP 3430 SDP board"
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index f6a24b3f9c4f..34c2c7f59f0a 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -255,7 +255,7 @@ obj-$(CONFIG_MACH_OMAP_3630SDP) += board-zoom-display.o
255obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o 255obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o
256obj-$(CONFIG_MACH_CM_T3517) += board-cm-t3517.o 256obj-$(CONFIG_MACH_CM_T3517) += board-cm-t3517.o
257obj-$(CONFIG_MACH_IGEP0020) += board-igep0020.o 257obj-$(CONFIG_MACH_IGEP0020) += board-igep0020.o
258obj-$(CONFIG_MACH_OMAP3_TOUCHBOOK) += board-omap3touchbook.o 258obj-$(CONFIG_MACH_TOUCHBOOK) += board-omap3touchbook.o
259obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o 259obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o
260obj-$(CONFIG_MACH_OMAP4_PANDA) += board-omap4panda.o 260obj-$(CONFIG_MACH_OMAP4_PANDA) += board-omap4panda.o
261 261
diff --git a/arch/arm/mach-omap2/clock33xx_data.c b/arch/arm/mach-omap2/clock33xx_data.c
index 25bbcc7ca4dc..ae27de8899a6 100644
--- a/arch/arm/mach-omap2/clock33xx_data.c
+++ b/arch/arm/mach-omap2/clock33xx_data.c
@@ -1036,13 +1036,13 @@ static struct omap_clk am33xx_clks[] = {
1036 CLK(NULL, "mmu_fck", &mmu_fck, CK_AM33XX), 1036 CLK(NULL, "mmu_fck", &mmu_fck, CK_AM33XX),
1037 CLK(NULL, "smartreflex0_fck", &smartreflex0_fck, CK_AM33XX), 1037 CLK(NULL, "smartreflex0_fck", &smartreflex0_fck, CK_AM33XX),
1038 CLK(NULL, "smartreflex1_fck", &smartreflex1_fck, CK_AM33XX), 1038 CLK(NULL, "smartreflex1_fck", &smartreflex1_fck, CK_AM33XX),
1039 CLK(NULL, "gpt1_fck", &timer1_fck, CK_AM33XX), 1039 CLK(NULL, "timer1_fck", &timer1_fck, CK_AM33XX),
1040 CLK(NULL, "gpt2_fck", &timer2_fck, CK_AM33XX), 1040 CLK(NULL, "timer2_fck", &timer2_fck, CK_AM33XX),
1041 CLK(NULL, "gpt3_fck", &timer3_fck, CK_AM33XX), 1041 CLK(NULL, "timer3_fck", &timer3_fck, CK_AM33XX),
1042 CLK(NULL, "gpt4_fck", &timer4_fck, CK_AM33XX), 1042 CLK(NULL, "timer4_fck", &timer4_fck, CK_AM33XX),
1043 CLK(NULL, "gpt5_fck", &timer5_fck, CK_AM33XX), 1043 CLK(NULL, "timer5_fck", &timer5_fck, CK_AM33XX),
1044 CLK(NULL, "gpt6_fck", &timer6_fck, CK_AM33XX), 1044 CLK(NULL, "timer6_fck", &timer6_fck, CK_AM33XX),
1045 CLK(NULL, "gpt7_fck", &timer7_fck, CK_AM33XX), 1045 CLK(NULL, "timer7_fck", &timer7_fck, CK_AM33XX),
1046 CLK(NULL, "usbotg_fck", &usbotg_fck, CK_AM33XX), 1046 CLK(NULL, "usbotg_fck", &usbotg_fck, CK_AM33XX),
1047 CLK(NULL, "ieee5000_fck", &ieee5000_fck, CK_AM33XX), 1047 CLK(NULL, "ieee5000_fck", &ieee5000_fck, CK_AM33XX),
1048 CLK(NULL, "wdt1_fck", &wdt1_fck, CK_AM33XX), 1048 CLK(NULL, "wdt1_fck", &wdt1_fck, CK_AM33XX),
diff --git a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
index a0d68dbecfa3..f99e65cfb862 100644
--- a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
@@ -241,6 +241,52 @@ static void omap3_clkdm_deny_idle(struct clockdomain *clkdm)
241 _clkdm_del_autodeps(clkdm); 241 _clkdm_del_autodeps(clkdm);
242} 242}
243 243
244static int omap3xxx_clkdm_clk_enable(struct clockdomain *clkdm)
245{
246 bool hwsup = false;
247
248 if (!clkdm->clktrctrl_mask)
249 return 0;
250
251 hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
252 clkdm->clktrctrl_mask);
253
254 if (hwsup) {
255 /* Disable HW transitions when we are changing deps */
256 _disable_hwsup(clkdm);
257 _clkdm_add_autodeps(clkdm);
258 _enable_hwsup(clkdm);
259 } else {
260 if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
261 omap3_clkdm_wakeup(clkdm);
262 }
263
264 return 0;
265}
266
267static int omap3xxx_clkdm_clk_disable(struct clockdomain *clkdm)
268{
269 bool hwsup = false;
270
271 if (!clkdm->clktrctrl_mask)
272 return 0;
273
274 hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
275 clkdm->clktrctrl_mask);
276
277 if (hwsup) {
278 /* Disable HW transitions when we are changing deps */
279 _disable_hwsup(clkdm);
280 _clkdm_del_autodeps(clkdm);
281 _enable_hwsup(clkdm);
282 } else {
283 if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)
284 omap3_clkdm_sleep(clkdm);
285 }
286
287 return 0;
288}
289
244struct clkdm_ops omap2_clkdm_operations = { 290struct clkdm_ops omap2_clkdm_operations = {
245 .clkdm_add_wkdep = omap2_clkdm_add_wkdep, 291 .clkdm_add_wkdep = omap2_clkdm_add_wkdep,
246 .clkdm_del_wkdep = omap2_clkdm_del_wkdep, 292 .clkdm_del_wkdep = omap2_clkdm_del_wkdep,
@@ -267,6 +313,6 @@ struct clkdm_ops omap3_clkdm_operations = {
267 .clkdm_wakeup = omap3_clkdm_wakeup, 313 .clkdm_wakeup = omap3_clkdm_wakeup,
268 .clkdm_allow_idle = omap3_clkdm_allow_idle, 314 .clkdm_allow_idle = omap3_clkdm_allow_idle,
269 .clkdm_deny_idle = omap3_clkdm_deny_idle, 315 .clkdm_deny_idle = omap3_clkdm_deny_idle,
270 .clkdm_clk_enable = omap2_clkdm_clk_enable, 316 .clkdm_clk_enable = omap3xxx_clkdm_clk_enable,
271 .clkdm_clk_disable = omap2_clkdm_clk_disable, 317 .clkdm_clk_disable = omap3xxx_clkdm_clk_disable,
272}; 318};
diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h
index 766338fe4d34..975f6bda0e0b 100644
--- a/arch/arm/mach-omap2/cm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-34xx.h
@@ -67,6 +67,7 @@
67#define OMAP3430_EN_IVA2_DPLL_MASK (0x7 << 0) 67#define OMAP3430_EN_IVA2_DPLL_MASK (0x7 << 0)
68 68
69/* CM_IDLEST_IVA2 */ 69/* CM_IDLEST_IVA2 */
70#define OMAP3430_ST_IVA2_SHIFT 0
70#define OMAP3430_ST_IVA2_MASK (1 << 0) 71#define OMAP3430_ST_IVA2_MASK (1 << 0)
71 72
72/* CM_IDLEST_PLL_IVA2 */ 73/* CM_IDLEST_PLL_IVA2 */
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c
index 05fdebfaa195..330d4c6e746b 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -46,7 +46,7 @@
46static void __iomem *wakeupgen_base; 46static void __iomem *wakeupgen_base;
47static void __iomem *sar_base; 47static void __iomem *sar_base;
48static DEFINE_SPINLOCK(wakeupgen_lock); 48static DEFINE_SPINLOCK(wakeupgen_lock);
49static unsigned int irq_target_cpu[NR_IRQS]; 49static unsigned int irq_target_cpu[MAX_IRQS];
50static unsigned int irq_banks = MAX_NR_REG_BANKS; 50static unsigned int irq_banks = MAX_NR_REG_BANKS;
51static unsigned int max_irqs = MAX_IRQS; 51static unsigned int max_irqs = MAX_IRQS;
52static unsigned int omap_secure_apis; 52static unsigned int omap_secure_apis;
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 6ca8e519968d..37afbd173c2c 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1889,6 +1889,7 @@ static int _enable(struct omap_hwmod *oh)
1889 _enable_sysc(oh); 1889 _enable_sysc(oh);
1890 } 1890 }
1891 } else { 1891 } else {
1892 _omap4_disable_module(oh);
1892 _disable_clocks(oh); 1893 _disable_clocks(oh);
1893 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", 1894 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1894 oh->name, r); 1895 oh->name, r);
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index c9e38200216b..ce7e6068768f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -100,9 +100,9 @@ static struct omap_hwmod omap3xxx_mpu_hwmod = {
100 100
101/* IVA2 (IVA2) */ 101/* IVA2 (IVA2) */
102static struct omap_hwmod_rst_info omap3xxx_iva_resets[] = { 102static struct omap_hwmod_rst_info omap3xxx_iva_resets[] = {
103 { .name = "logic", .rst_shift = 0 }, 103 { .name = "logic", .rst_shift = 0, .st_shift = 8 },
104 { .name = "seq0", .rst_shift = 1 }, 104 { .name = "seq0", .rst_shift = 1, .st_shift = 9 },
105 { .name = "seq1", .rst_shift = 2 }, 105 { .name = "seq1", .rst_shift = 2, .st_shift = 10 },
106}; 106};
107 107
108static struct omap_hwmod omap3xxx_iva_hwmod = { 108static struct omap_hwmod omap3xxx_iva_hwmod = {
@@ -112,6 +112,15 @@ static struct omap_hwmod omap3xxx_iva_hwmod = {
112 .rst_lines = omap3xxx_iva_resets, 112 .rst_lines = omap3xxx_iva_resets,
113 .rst_lines_cnt = ARRAY_SIZE(omap3xxx_iva_resets), 113 .rst_lines_cnt = ARRAY_SIZE(omap3xxx_iva_resets),
114 .main_clk = "iva2_ck", 114 .main_clk = "iva2_ck",
115 .prcm = {
116 .omap2 = {
117 .module_offs = OMAP3430_IVA2_MOD,
118 .prcm_reg_id = 1,
119 .module_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT,
120 .idlest_reg_id = 1,
121 .idlest_idle_bit = OMAP3430_ST_IVA2_SHIFT,
122 }
123 },
115}; 124};
116 125
117/* timer class */ 126/* timer class */
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 242aee498ceb..afb60917a948 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -4210,7 +4210,7 @@ static struct omap_hwmod_ocp_if omap44xx_dsp__iva = {
4210}; 4210};
4211 4211
4212/* dsp -> sl2if */ 4212/* dsp -> sl2if */
4213static struct omap_hwmod_ocp_if omap44xx_dsp__sl2if = { 4213static struct omap_hwmod_ocp_if __maybe_unused omap44xx_dsp__sl2if = {
4214 .master = &omap44xx_dsp_hwmod, 4214 .master = &omap44xx_dsp_hwmod,
4215 .slave = &omap44xx_sl2if_hwmod, 4215 .slave = &omap44xx_sl2if_hwmod,
4216 .clk = "dpll_iva_m5x2_ck", 4216 .clk = "dpll_iva_m5x2_ck",
@@ -4828,7 +4828,7 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iss = {
4828}; 4828};
4829 4829
4830/* iva -> sl2if */ 4830/* iva -> sl2if */
4831static struct omap_hwmod_ocp_if omap44xx_iva__sl2if = { 4831static struct omap_hwmod_ocp_if __maybe_unused omap44xx_iva__sl2if = {
4832 .master = &omap44xx_iva_hwmod, 4832 .master = &omap44xx_iva_hwmod,
4833 .slave = &omap44xx_sl2if_hwmod, 4833 .slave = &omap44xx_sl2if_hwmod,
4834 .clk = "dpll_iva_m5x2_ck", 4834 .clk = "dpll_iva_m5x2_ck",
@@ -5362,7 +5362,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__scrm = {
5362}; 5362};
5363 5363
5364/* l3_main_2 -> sl2if */ 5364/* l3_main_2 -> sl2if */
5365static struct omap_hwmod_ocp_if omap44xx_l3_main_2__sl2if = { 5365static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l3_main_2__sl2if = {
5366 .master = &omap44xx_l3_main_2_hwmod, 5366 .master = &omap44xx_l3_main_2_hwmod,
5367 .slave = &omap44xx_sl2if_hwmod, 5367 .slave = &omap44xx_sl2if_hwmod,
5368 .clk = "l3_div_ck", 5368 .clk = "l3_div_ck",
@@ -6032,7 +6032,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
6032 &omap44xx_l4_abe__dmic, 6032 &omap44xx_l4_abe__dmic,
6033 &omap44xx_l4_abe__dmic_dma, 6033 &omap44xx_l4_abe__dmic_dma,
6034 &omap44xx_dsp__iva, 6034 &omap44xx_dsp__iva,
6035 &omap44xx_dsp__sl2if, 6035 /* &omap44xx_dsp__sl2if, */
6036 &omap44xx_l4_cfg__dsp, 6036 &omap44xx_l4_cfg__dsp,
6037 &omap44xx_l3_main_2__dss, 6037 &omap44xx_l3_main_2__dss,
6038 &omap44xx_l4_per__dss, 6038 &omap44xx_l4_per__dss,
@@ -6068,7 +6068,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
6068 &omap44xx_l4_per__i2c4, 6068 &omap44xx_l4_per__i2c4,
6069 &omap44xx_l3_main_2__ipu, 6069 &omap44xx_l3_main_2__ipu,
6070 &omap44xx_l3_main_2__iss, 6070 &omap44xx_l3_main_2__iss,
6071 &omap44xx_iva__sl2if, 6071 /* &omap44xx_iva__sl2if, */
6072 &omap44xx_l3_main_2__iva, 6072 &omap44xx_l3_main_2__iva,
6073 &omap44xx_l4_wkup__kbd, 6073 &omap44xx_l4_wkup__kbd,
6074 &omap44xx_l4_cfg__mailbox, 6074 &omap44xx_l4_cfg__mailbox,
@@ -6099,7 +6099,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
6099 &omap44xx_l4_cfg__cm_core, 6099 &omap44xx_l4_cfg__cm_core,
6100 &omap44xx_l4_wkup__prm, 6100 &omap44xx_l4_wkup__prm,
6101 &omap44xx_l4_wkup__scrm, 6101 &omap44xx_l4_wkup__scrm,
6102 &omap44xx_l3_main_2__sl2if, 6102 /* &omap44xx_l3_main_2__sl2if, */
6103 &omap44xx_l4_abe__slimbus1, 6103 &omap44xx_l4_abe__slimbus1,
6104 &omap44xx_l4_abe__slimbus1_dma, 6104 &omap44xx_l4_abe__slimbus1_dma,
6105 &omap44xx_l4_per__slimbus2, 6105 &omap44xx_l4_per__slimbus2,
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 2ff6d41ec6c6..2ba4f57dda86 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -260,6 +260,7 @@ static u32 notrace dmtimer_read_sched_clock(void)
260 return 0; 260 return 0;
261} 261}
262 262
263#ifdef CONFIG_OMAP_32K_TIMER
263/* Setup free-running counter for clocksource */ 264/* Setup free-running counter for clocksource */
264static int __init omap2_sync32k_clocksource_init(void) 265static int __init omap2_sync32k_clocksource_init(void)
265{ 266{
@@ -299,6 +300,12 @@ static int __init omap2_sync32k_clocksource_init(void)
299 300
300 return ret; 301 return ret;
301} 302}
303#else
304static inline int omap2_sync32k_clocksource_init(void)
305{
306 return -ENODEV;
307}
308#endif
302 309
303static void __init omap2_gptimer_clocksource_init(int gptimer_id, 310static void __init omap2_gptimer_clocksource_init(int gptimer_id,
304 const char *fck_source) 311 const char *fck_source)
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 410291c67666..a6cd14ab1e4e 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -204,6 +204,13 @@ void __init orion5x_wdt_init(void)
204void __init orion5x_init_early(void) 204void __init orion5x_init_early(void)
205{ 205{
206 orion_time_set_base(TIMER_VIRT_BASE); 206 orion_time_set_base(TIMER_VIRT_BASE);
207
208 /*
209 * Some Orion5x devices allocate their coherent buffers from atomic
210 * context. Increase size of atomic coherent pool to make sure such
211 * the allocations won't fail.
212 */
213 init_dma_coherent_pool_size(SZ_1M);
207} 214}
208 215
209int orion5x_tclk; 216int orion5x_tclk;
diff --git a/arch/arm/mach-sa1100/include/mach/SA-1111.h b/arch/arm/mach-sa1100/include/mach/SA-1111.h
deleted file mode 100644
index c38f60915cb6..000000000000
--- a/arch/arm/mach-sa1100/include/mach/SA-1111.h
+++ /dev/null
@@ -1,5 +0,0 @@
1/*
2 * Moved to new location
3 */
4#warning using old SA-1111.h - update to <asm/hardware/sa1111.h>
5#include <asm/hardware/sa1111.h>
diff --git a/arch/arm/mach-sa1100/include/mach/lart.h b/arch/arm/mach-sa1100/include/mach/lart.h
deleted file mode 100644
index 8a5482d908db..000000000000
--- a/arch/arm/mach-sa1100/include/mach/lart.h
+++ /dev/null
@@ -1,13 +0,0 @@
1#ifndef _INCLUDE_LART_H
2#define _INCLUDE_LART_H
3
4#define LART_GPIO_ETH0 GPIO_GPIO0
5#define LART_IRQ_ETH0 IRQ_GPIO0
6
7#define LART_GPIO_IDE GPIO_GPIO1
8#define LART_IRQ_IDE IRQ_GPIO1
9
10#define LART_GPIO_UCB1200 GPIO_GPIO18
11#define LART_IRQ_UCB1200 IRQ_GPIO18
12
13#endif
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
index 53b7ea92c32c..3b8a0171c3cb 100644
--- a/arch/arm/mach-shmobile/board-kzm9g.c
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -346,11 +346,11 @@ static struct resource sh_mmcif_resources[] = {
346 .flags = IORESOURCE_MEM, 346 .flags = IORESOURCE_MEM,
347 }, 347 },
348 [1] = { 348 [1] = {
349 .start = gic_spi(141), 349 .start = gic_spi(140),
350 .flags = IORESOURCE_IRQ, 350 .flags = IORESOURCE_IRQ,
351 }, 351 },
352 [2] = { 352 [2] = {
353 .start = gic_spi(140), 353 .start = gic_spi(141),
354 .flags = IORESOURCE_IRQ, 354 .flags = IORESOURCE_IRQ,
355 }, 355 },
356}; 356};
diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c
index 6a35c4a31e6c..030558f474a4 100644
--- a/arch/arm/mach-shmobile/smp-emev2.c
+++ b/arch/arm/mach-shmobile/smp-emev2.c
@@ -82,7 +82,7 @@ int __cpuinit emev2_boot_secondary(unsigned int cpu)
82 /* Tell ROM loader about our vector (in headsmp.S) */ 82 /* Tell ROM loader about our vector (in headsmp.S) */
83 emev2_set_boot_vector(__pa(shmobile_secondary_vector)); 83 emev2_set_boot_vector(__pa(shmobile_secondary_vector));
84 84
85 gic_raise_softirq(cpumask_of(cpu), 1); 85 gic_raise_softirq(cpumask_of(cpu), 0);
86 return 0; 86 return 0;
87} 87}
88 88
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index 9107231aacc5..b9f60ebe3bc4 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -699,7 +699,6 @@ do_alignment_t32_to_handler(unsigned long *pinstr, struct pt_regs *regs,
699 unsigned long instr = *pinstr; 699 unsigned long instr = *pinstr;
700 u16 tinst1 = (instr >> 16) & 0xffff; 700 u16 tinst1 = (instr >> 16) & 0xffff;
701 u16 tinst2 = instr & 0xffff; 701 u16 tinst2 = instr & 0xffff;
702 poffset->un = 0;
703 702
704 switch (tinst1 & 0xffe0) { 703 switch (tinst1 & 0xffe0) {
705 /* A6.3.5 Load/Store multiple */ 704 /* A6.3.5 Load/Store multiple */
@@ -854,9 +853,10 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
854 break; 853 break;
855 854
856 case 0x08000000: /* ldm or stm, or thumb-2 32bit instruction */ 855 case 0x08000000: /* ldm or stm, or thumb-2 32bit instruction */
857 if (thumb2_32b) 856 if (thumb2_32b) {
857 offset.un = 0;
858 handler = do_alignment_t32_to_handler(&instr, regs, &offset); 858 handler = do_alignment_t32_to_handler(&instr, regs, &offset);
859 else 859 } else
860 handler = do_alignment_ldmstm; 860 handler = do_alignment_ldmstm;
861 break; 861 break;
862 862
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 2a8e380501e8..97ec2565805a 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -368,14 +368,18 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask)
368 /* l2x0 controller is disabled */ 368 /* l2x0 controller is disabled */
369 writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL); 369 writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL);
370 370
371 l2x0_saved_regs.aux_ctrl = aux;
372
373 l2x0_inv_all(); 371 l2x0_inv_all();
374 372
375 /* enable L2X0 */ 373 /* enable L2X0 */
376 writel_relaxed(1, l2x0_base + L2X0_CTRL); 374 writel_relaxed(1, l2x0_base + L2X0_CTRL);
377 } 375 }
378 376
377 /* Re-read it in case some bits are reserved. */
378 aux = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
379
380 /* Save the value for resuming. */
381 l2x0_saved_regs.aux_ctrl = aux;
382
379 outer_cache.inv_range = l2x0_inv_range; 383 outer_cache.inv_range = l2x0_inv_range;
380 outer_cache.clean_range = l2x0_clean_range; 384 outer_cache.clean_range = l2x0_clean_range;
381 outer_cache.flush_range = l2x0_flush_range; 385 outer_cache.flush_range = l2x0_flush_range;
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 39e3fb3db801..3b172275262e 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -211,6 +211,9 @@ ENTRY(v7_coherent_user_range)
211 * isn't mapped, fail with -EFAULT. 211 * isn't mapped, fail with -EFAULT.
212 */ 212 */
2139001: 2139001:
214#ifdef CONFIG_ARM_ERRATA_775420
215 dsb
216#endif
214 mov r0, #-EFAULT 217 mov r0, #-EFAULT
215 mov pc, lr 218 mov pc, lr
216 UNWIND(.fnend ) 219 UNWIND(.fnend )
diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
index 119bc52ab93e..4e07eec1270d 100644
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
@@ -63,10 +63,11 @@ static int contextidr_notifier(struct notifier_block *unused, unsigned long cmd,
63 pid = task_pid_nr(thread->task) << ASID_BITS; 63 pid = task_pid_nr(thread->task) << ASID_BITS;
64 asm volatile( 64 asm volatile(
65 " mrc p15, 0, %0, c13, c0, 1\n" 65 " mrc p15, 0, %0, c13, c0, 1\n"
66 " bfi %1, %0, #0, %2\n" 66 " and %0, %0, %2\n"
67 " mcr p15, 0, %1, c13, c0, 1\n" 67 " orr %0, %0, %1\n"
68 " mcr p15, 0, %0, c13, c0, 1\n"
68 : "=r" (contextidr), "+r" (pid) 69 : "=r" (contextidr), "+r" (pid)
69 : "I" (ASID_BITS)); 70 : "I" (~ASID_MASK));
70 isb(); 71 isb();
71 72
72 return NOTIFY_OK; 73 return NOTIFY_OK;
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 051204fc4617..13f555d62491 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -346,6 +346,8 @@ static int __init atomic_pool_init(void)
346 (unsigned)pool->size / 1024); 346 (unsigned)pool->size / 1024);
347 return 0; 347 return 0;
348 } 348 }
349
350 kfree(pages);
349no_pages: 351no_pages:
350 kfree(bitmap); 352 kfree(bitmap);
351no_bitmap: 353no_bitmap:
@@ -489,7 +491,7 @@ static bool __in_atomic_pool(void *start, size_t size)
489 void *pool_start = pool->vaddr; 491 void *pool_start = pool->vaddr;
490 void *pool_end = pool->vaddr + pool->size; 492 void *pool_end = pool->vaddr + pool->size;
491 493
492 if (start < pool_start || start > pool_end) 494 if (start < pool_start || start >= pool_end)
493 return false; 495 return false;
494 496
495 if (end <= pool_end) 497 if (end <= pool_end)
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 9aec41fa80ae..ad722f1208a5 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -324,7 +324,7 @@ phys_addr_t __init arm_memblock_steal(phys_addr_t size, phys_addr_t align)
324 324
325 BUG_ON(!arm_memblock_steal_permitted); 325 BUG_ON(!arm_memblock_steal_permitted);
326 326
327 phys = memblock_alloc(size, align); 327 phys = memblock_alloc_base(size, align, MEMBLOCK_ALLOC_ANYWHERE);
328 memblock_free(phys, size); 328 memblock_free(phys, size);
329 memblock_remove(phys, size); 329 memblock_remove(phys, size);
330 330
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index 566750fa57d4..491f6b3336f5 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -247,6 +247,7 @@ void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn,
247 if (!area) 247 if (!area)
248 return NULL; 248 return NULL;
249 addr = (unsigned long)area->addr; 249 addr = (unsigned long)area->addr;
250 area->phys_addr = __pfn_to_phys(pfn);
250 251
251#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE) 252#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE)
252 if (DOMAIN_IO == 0 && 253 if (DOMAIN_IO == 0 &&
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index 6776160618ef..a8ee92da3544 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -55,6 +55,9 @@ extern void __flush_dcache_page(struct address_space *mapping, struct page *page
55/* permanent static mappings from iotable_init() */ 55/* permanent static mappings from iotable_init() */
56#define VM_ARM_STATIC_MAPPING 0x40000000 56#define VM_ARM_STATIC_MAPPING 0x40000000
57 57
58/* empty mapping */
59#define VM_ARM_EMPTY_MAPPING 0x20000000
60
58/* mapping type (attributes) for permanent static mappings */ 61/* mapping type (attributes) for permanent static mappings */
59#define VM_ARM_MTYPE(mt) ((mt) << 20) 62#define VM_ARM_MTYPE(mt) ((mt) << 20)
60#define VM_ARM_MTYPE_MASK (0x1f << 20) 63#define VM_ARM_MTYPE_MASK (0x1f << 20)
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 4c2d0451e84a..c2fa21d0103e 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -807,7 +807,7 @@ static void __init pmd_empty_section_gap(unsigned long addr)
807 vm = early_alloc_aligned(sizeof(*vm), __alignof__(*vm)); 807 vm = early_alloc_aligned(sizeof(*vm), __alignof__(*vm));
808 vm->addr = (void *)addr; 808 vm->addr = (void *)addr;
809 vm->size = SECTION_SIZE; 809 vm->size = SECTION_SIZE;
810 vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING; 810 vm->flags = VM_IOREMAP | VM_ARM_EMPTY_MAPPING;
811 vm->caller = pmd_empty_section_gap; 811 vm->caller = pmd_empty_section_gap;
812 vm_area_add_early(vm); 812 vm_area_add_early(vm);
813} 813}
@@ -820,7 +820,7 @@ static void __init fill_pmd_gaps(void)
820 820
821 /* we're still single threaded hence no lock needed here */ 821 /* we're still single threaded hence no lock needed here */
822 for (vm = vmlist; vm; vm = vm->next) { 822 for (vm = vmlist; vm; vm = vm->next) {
823 if (!(vm->flags & VM_ARM_STATIC_MAPPING)) 823 if (!(vm->flags & (VM_ARM_STATIC_MAPPING | VM_ARM_EMPTY_MAPPING)))
824 continue; 824 continue;
825 addr = (unsigned long)vm->addr; 825 addr = (unsigned long)vm->addr;
826 if (addr < next) 826 if (addr < next)
@@ -961,8 +961,8 @@ void __init sanity_check_meminfo(void)
961 * Check whether this memory bank would partially overlap 961 * Check whether this memory bank would partially overlap
962 * the vmalloc area. 962 * the vmalloc area.
963 */ 963 */
964 if (__va(bank->start + bank->size) > vmalloc_min || 964 if (__va(bank->start + bank->size - 1) >= vmalloc_min ||
965 __va(bank->start + bank->size) < __va(bank->start)) { 965 __va(bank->start + bank->size - 1) <= __va(bank->start)) {
966 unsigned long newsize = vmalloc_min - __va(bank->start); 966 unsigned long newsize = vmalloc_min - __va(bank->start);
967 printk(KERN_NOTICE "Truncating RAM at %.8llx-%.8llx " 967 printk(KERN_NOTICE "Truncating RAM at %.8llx-%.8llx "
968 "to -%.8llx (vmalloc region overlap).\n", 968 "to -%.8llx (vmalloc region overlap).\n",
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index 627d94f1b010..ec466400a200 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -98,6 +98,7 @@
98#define MX25_INT_UART1 (NR_IRQS_LEGACY + 45) 98#define MX25_INT_UART1 (NR_IRQS_LEGACY + 45)
99#define MX25_INT_GPIO2 (NR_IRQS_LEGACY + 51) 99#define MX25_INT_GPIO2 (NR_IRQS_LEGACY + 51)
100#define MX25_INT_GPIO1 (NR_IRQS_LEGACY + 52) 100#define MX25_INT_GPIO1 (NR_IRQS_LEGACY + 52)
101#define MX25_INT_GPT1 (NR_IRQS_LEGACY + 54)
101#define MX25_INT_FEC (NR_IRQS_LEGACY + 57) 102#define MX25_INT_FEC (NR_IRQS_LEGACY + 57)
102 103
103#define MX25_DMA_REQ_SSI2_RX1 22 104#define MX25_DMA_REQ_SSI2_RX1 22
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 766181cb5c95..024f3b08db29 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -68,6 +68,7 @@
68 68
69static unsigned long omap_sram_start; 69static unsigned long omap_sram_start;
70static void __iomem *omap_sram_base; 70static void __iomem *omap_sram_base;
71static unsigned long omap_sram_skip;
71static unsigned long omap_sram_size; 72static unsigned long omap_sram_size;
72static void __iomem *omap_sram_ceil; 73static void __iomem *omap_sram_ceil;
73 74
@@ -106,6 +107,7 @@ static int is_sram_locked(void)
106 */ 107 */
107static void __init omap_detect_sram(void) 108static void __init omap_detect_sram(void)
108{ 109{
110 omap_sram_skip = SRAM_BOOTLOADER_SZ;
109 if (cpu_class_is_omap2()) { 111 if (cpu_class_is_omap2()) {
110 if (is_sram_locked()) { 112 if (is_sram_locked()) {
111 if (cpu_is_omap34xx()) { 113 if (cpu_is_omap34xx()) {
@@ -113,6 +115,7 @@ static void __init omap_detect_sram(void)
113 if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) || 115 if ((omap_type() == OMAP2_DEVICE_TYPE_EMU) ||
114 (omap_type() == OMAP2_DEVICE_TYPE_SEC)) { 116 (omap_type() == OMAP2_DEVICE_TYPE_SEC)) {
115 omap_sram_size = 0x7000; /* 28K */ 117 omap_sram_size = 0x7000; /* 28K */
118 omap_sram_skip += SZ_16K;
116 } else { 119 } else {
117 omap_sram_size = 0x8000; /* 32K */ 120 omap_sram_size = 0x8000; /* 32K */
118 } 121 }
@@ -175,8 +178,10 @@ static void __init omap_map_sram(void)
175 return; 178 return;
176 179
177#ifdef CONFIG_OMAP4_ERRATA_I688 180#ifdef CONFIG_OMAP4_ERRATA_I688
181 if (cpu_is_omap44xx()) {
178 omap_sram_start += PAGE_SIZE; 182 omap_sram_start += PAGE_SIZE;
179 omap_sram_size -= SZ_16K; 183 omap_sram_size -= SZ_16K;
184 }
180#endif 185#endif
181 if (cpu_is_omap34xx()) { 186 if (cpu_is_omap34xx()) {
182 /* 187 /*
@@ -203,8 +208,8 @@ static void __init omap_map_sram(void)
203 * Looks like we need to preserve some bootloader code at the 208 * Looks like we need to preserve some bootloader code at the
204 * beginning of SRAM for jumping to flash for reboot to work... 209 * beginning of SRAM for jumping to flash for reboot to work...
205 */ 210 */
206 memset_io(omap_sram_base + SRAM_BOOTLOADER_SZ, 0, 211 memset_io(omap_sram_base + omap_sram_skip, 0,
207 omap_sram_size - SRAM_BOOTLOADER_SZ); 212 omap_sram_size - omap_sram_skip);
208} 213}
209 214
210/* 215/*
@@ -218,7 +223,7 @@ void *omap_sram_push_address(unsigned long size)
218{ 223{
219 unsigned long available, new_ceil = (unsigned long)omap_sram_ceil; 224 unsigned long available, new_ceil = (unsigned long)omap_sram_ceil;
220 225
221 available = omap_sram_ceil - (omap_sram_base + SRAM_BOOTLOADER_SZ); 226 available = omap_sram_ceil - (omap_sram_base + omap_sram_skip);
222 227
223 if (size > available) { 228 if (size > available) {
224 pr_err("Not enough space in SRAM\n"); 229 pr_err("Not enough space in SRAM\n");
diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c
index 65c5eca475e7..d1116e2dfbea 100644
--- a/arch/arm/plat-samsung/clock.c
+++ b/arch/arm/plat-samsung/clock.c
@@ -144,6 +144,7 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
144 144
145int clk_set_rate(struct clk *clk, unsigned long rate) 145int clk_set_rate(struct clk *clk, unsigned long rate)
146{ 146{
147 unsigned long flags;
147 int ret; 148 int ret;
148 149
149 if (IS_ERR(clk)) 150 if (IS_ERR(clk))
@@ -159,9 +160,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
159 if (clk->ops == NULL || clk->ops->set_rate == NULL) 160 if (clk->ops == NULL || clk->ops->set_rate == NULL)
160 return -EINVAL; 161 return -EINVAL;
161 162
162 spin_lock(&clocks_lock); 163 spin_lock_irqsave(&clocks_lock, flags);
163 ret = (clk->ops->set_rate)(clk, rate); 164 ret = (clk->ops->set_rate)(clk, rate);
164 spin_unlock(&clocks_lock); 165 spin_unlock_irqrestore(&clocks_lock, flags);
165 166
166 return ret; 167 return ret;
167} 168}
@@ -173,17 +174,18 @@ struct clk *clk_get_parent(struct clk *clk)
173 174
174int clk_set_parent(struct clk *clk, struct clk *parent) 175int clk_set_parent(struct clk *clk, struct clk *parent)
175{ 176{
177 unsigned long flags;
176 int ret = 0; 178 int ret = 0;
177 179
178 if (IS_ERR(clk)) 180 if (IS_ERR(clk))
179 return -EINVAL; 181 return -EINVAL;
180 182
181 spin_lock(&clocks_lock); 183 spin_lock_irqsave(&clocks_lock, flags);
182 184
183 if (clk->ops && clk->ops->set_parent) 185 if (clk->ops && clk->ops->set_parent)
184 ret = (clk->ops->set_parent)(clk, parent); 186 ret = (clk->ops->set_parent)(clk, parent);
185 187
186 spin_unlock(&clocks_lock); 188 spin_unlock_irqrestore(&clocks_lock, flags);
187 189
188 return ret; 190 return ret;
189} 191}