17 files changed, 34 insertions, 34 deletions

diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c
index ce922d0ea7aa..53c6a26b633d 100644
--- a/arch/arm/common/timer-sp.c
+++ b/arch/arm/common/timer-sp.c
@@ -66,7 +66,7 @@ static long __init sp804_get_clock_rate(struct clk *clk)
 
 static void __iomem *sched_clock_base;
 
-static u32 sp804_read(void)
+static u64 notrace sp804_read(void)
 {
         return ~readl_relaxed(sched_clock_base + TIMER_VALUE);
 }
@@ -104,7 +104,7 @@ void __init __sp804_clocksource_and_sched_clock_init(void __iomem *base,
 
         if (use_sched_clock) {
                 sched_clock_base = base;
-                setup_sched_clock(sp804_read, 32, rate);
+                sched_clock_register(sp804_read, 32, rate);
         }
 }
 
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c
index 134641d688bb..a1935911e4f1 100644
--- a/arch/arm/mach-clps711x/common.c
+++ b/arch/arm/mach-clps711x/common.c
@@ -259,7 +259,7 @@ asmlinkage void __exception_irq_entry clps711x_handle_irq(struct pt_regs *regs)
         } while (1);
 }
 
-static u32 notrace clps711x_sched_clock_read(void)
+static u64 notrace clps711x_sched_clock_read(void)
 {
         return ~readw_relaxed(CLPS711X_VIRT_BASE + TC1D);
 }
@@ -366,7 +366,7 @@ void __init clps711x_timer_init(void)
         tmp = clps_readl(SYSCON1) & ~(SYSCON1_TC1S | SYSCON1_TC1M);
         clps_writel(tmp, SYSCON1);
 
-        setup_sched_clock(clps711x_sched_clock_read, 16, timl);
+        sched_clock_register(clps711x_sched_clock_read, 16, timl);
 
         clocksource_mmio_init(CLPS711X_VIRT_BASE + TC1D,
                               "clps711x_clocksource", timl, 300, 16,
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index 56c6eb5266ad..24ad30f32ae3 100644
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -285,7 +285,7 @@ static struct clocksource clocksource_davinci = {
 /*
  * Overwrite weak default sched_clock with something more precise
  */
-static u32 notrace davinci_read_sched_clock(void)
+static u64 notrace davinci_read_sched_clock(void)
 {
         return timer32_read(&timers[TID_CLOCKSOURCE]);
 }
@@ -391,7 +391,7 @@ void __init davinci_timer_init(void)
                                     davinci_clock_tick_rate))
                 printk(err, clocksource_davinci.name);
 
-        setup_sched_clock(davinci_read_sched_clock, 32,
+        sched_clock_register(davinci_read_sched_clock, 32,
                           davinci_clock_tick_rate);
 
         /* setup clockevent */
diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c
index 9b6638aadeaa..1a3a5f615770 100644
--- a/arch/arm/mach-imx/time.c
+++ b/arch/arm/mach-imx/time.c
@@ -111,7 +111,7 @@ static void gpt_irq_acknowledge(void)
 
 static void __iomem *sched_clock_reg;
 
-static u32 notrace mxc_read_sched_clock(void)
+static u64 notrace mxc_read_sched_clock(void)
 {
         return sched_clock_reg ? __raw_readl(sched_clock_reg) : 0;
 }
@@ -123,7 +123,7 @@ static int __init mxc_clocksource_init(struct clk *timer_clk)
 
         sched_clock_reg = reg;
 
-        setup_sched_clock(mxc_read_sched_clock, 32, c);
+        sched_clock_register(mxc_read_sched_clock, 32, c);
         return clocksource_mmio_init(reg, "mxc_timer1", c, 200, 32,
                         clocksource_mmio_readl_up);
 }
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index d50dc2dbfd89..473e21b87364 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -277,7 +277,7 @@ struct amba_pl010_data ap_uart_data = {
 
 static unsigned long timer_reload;
 
-static u32 notrace integrator_read_sched_clock(void)
+static u64 notrace integrator_read_sched_clock(void)
 {
         return -readl((void __iomem *) TIMER2_VA_BASE + TIMER_VALUE);
 }
@@ -298,7 +298,7 @@ static void integrator_clocksource_init(unsigned long inrate,
 
         clocksource_mmio_init(base + TIMER_VALUE, "timer2",
                         rate, 200, 16, clocksource_mmio_readl_down);
-        setup_sched_clock(integrator_read_sched_clock, 16, rate);
+        sched_clock_register(integrator_read_sched_clock, 16, rate);
 }
 
 static void __iomem * clkevt_base;
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 9edaf4734fa8..bc9d8ec2918e 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -475,7 +475,7 @@ void __init ixp4xx_sys_init(void)
 /*
  * sched_clock()
  */
-static u32 notrace ixp4xx_read_sched_clock(void)
+static u64 notrace ixp4xx_read_sched_clock(void)
 {
         return *IXP4XX_OSTS;
 }
@@ -493,7 +493,7 @@ unsigned long ixp4xx_timer_freq = IXP4XX_TIMER_FREQ;
 EXPORT_SYMBOL(ixp4xx_timer_freq);
 static void __init ixp4xx_clocksource_init(void)
 {
-        setup_sched_clock(ixp4xx_read_sched_clock, 32, ixp4xx_timer_freq);
+        sched_clock_register(ixp4xx_read_sched_clock, 32, ixp4xx_timer_freq);
 
         clocksource_mmio_init(NULL, "OSTS", ixp4xx_timer_freq, 200, 32,
                         ixp4xx_clocksource_read);
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index 7ac41e83cfef..024022d91fe3 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -61,7 +61,7 @@ static inline uint32_t timer_read(void)
         return __raw_readl(mmp_timer_base + TMR_CVWR(1));
 }
 
-static u32 notrace mmp_read_sched_clock(void)
+static u64 notrace mmp_read_sched_clock(void)
 {
         return timer_read();
 }
@@ -195,7 +195,7 @@ void __init timer_init(int irq)
 {
         timer_config();
 
-        setup_sched_clock(mmp_read_sched_clock, 32, CLOCK_TICK_RATE);
+        sched_clock_register(mmp_read_sched_clock, 32, CLOCK_TICK_RATE);
 
         ckevt.cpumask = cpumask_of(0);
 
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 1e9c3383daba..fd1644987534 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -187,7 +187,7 @@ static struct notifier_block msm_timer_cpu_nb = {
         .notifier_call = msm_timer_cpu_notify,
 };
 
-static notrace u32 msm_sched_clock_read(void)
+static u64 notrace msm_sched_clock_read(void)
 {
         return msm_clocksource.read(&msm_clocksource);
 }
@@ -229,7 +229,7 @@ err:
         res = clocksource_register_hz(cs, dgt_hz);
         if (res)
                 pr_err("clocksource_register failed\n");
-        setup_sched_clock(msm_sched_clock_read, sched_bits, dgt_hz);
+        sched_clock_register(msm_sched_clock_read, sched_bits, dgt_hz);
 }
 
 #ifdef CONFIG_OF
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index 6b5f298d6638..a7588cfd0286 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -181,7 +181,7 @@ static __init void omap_init_mpu_timer(unsigned long rate)
  * ---------------------------------------------------------------------------
  */
 
-static u32 notrace omap_mpu_read_sched_clock(void)
+static u64 notrace omap_mpu_read_sched_clock(void)
 {
         return ~omap_mpu_timer_read(1);
 }
@@ -193,7 +193,7 @@ static void __init omap_init_clocksource(unsigned long rate)
                         "%s: can't register clocksource!\n";
 
         omap_mpu_timer_start(1, ~0, 1);
-        setup_sched_clock(omap_mpu_read_sched_clock, 32, rate);
+        sched_clock_register(omap_mpu_read_sched_clock, 32, rate);
 
         if (clocksource_mmio_init(&timer->read_tim, "mpu_timer2", rate,
                         300, 32, clocksource_mmio_readl_down))
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 3ca81e0ada5e..ec084d158f64 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -379,7 +379,7 @@ static struct clocksource clocksource_gpt = {
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
-static u32 notrace dmtimer_read_sched_clock(void)
+static u64 notrace dmtimer_read_sched_clock(void)
 {
         if (clksrc.reserved)
                 return __omap_dm_timer_read_counter(&clksrc,
@@ -471,7 +471,7 @@ static void __init omap2_gptimer_clocksource_init(int gptimer_id,
         __omap_dm_timer_load_start(&clksrc,
                                    OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0,
                                    OMAP_TIMER_NONPOSTED);
-        setup_sched_clock(dmtimer_read_sched_clock, 32, clksrc.rate);
+        sched_clock_register(dmtimer_read_sched_clock, 32, clksrc.rate);
 
         if (clocksource_register_hz(&clocksource_gpt, clksrc.rate))
                 pr_err("Could not register clocksource %s\n",
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index 9aa852a8fab9..d1bfaa73b1c9 100644
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -33,7 +33,7 @@
  * calls to sched_clock() which should always be the case in practice.
  */
 
-static u32 notrace pxa_read_sched_clock(void)
+static u64 notrace pxa_read_sched_clock(void)
 {
         return readl_relaxed(OSCR);
 }
@@ -149,7 +149,7 @@ void __init pxa_timer_init(void)
         writel_relaxed(0, OIER);
         writel_relaxed(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR);
 
-        setup_sched_clock(pxa_read_sched_clock, 32, clock_tick_rate);
+        sched_clock_register(pxa_read_sched_clock, 32, clock_tick_rate);
 
         ckevt_pxa_osmr0.cpumask = cpumask_of(0);
 
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 713c86cd3d64..6fd4acb8f187 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -20,7 +20,7 @@
 #include <mach/hardware.h>
 #include <mach/irqs.h>
 
-static u32 notrace sa1100_read_sched_clock(void)
+static u64 notrace sa1100_read_sched_clock(void)
 {
         return readl_relaxed(OSCR);
 }
@@ -122,7 +122,7 @@ void __init sa1100_timer_init(void)
         writel_relaxed(0, OIER);
         writel_relaxed(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR);
 
-        setup_sched_clock(sa1100_read_sched_clock, 32, 3686400);
+        sched_clock_register(sa1100_read_sched_clock, 32, 3686400);
 
         ckevt_sa1100_osmr0.cpumask = cpumask_of(0);
 
diff --git a/arch/arm/mach-u300/timer.c b/arch/arm/mach-u300/timer.c
index 9a5f9fb352ce..9724e4e7cc93 100644
--- a/arch/arm/mach-u300/timer.c
+++ b/arch/arm/mach-u300/timer.c
@@ -341,7 +341,7 @@ static struct irqaction u300_timer_irq = {
  * stamp. (Inspired by OMAP implementation.)
  */
 
-static u32 notrace u300_read_sched_clock(void)
+static u64 notrace u300_read_sched_clock(void)
 {
         return readl(u300_timer_base + U300_TIMER_APP_GPT2CC);
 }
@@ -379,7 +379,7 @@ static void __init u300_timer_init_of(struct device_node *np)
         clk_prepare_enable(clk);
         rate = clk_get_rate(clk);
 
-        setup_sched_clock(u300_read_sched_clock, 32, rate);
+        sched_clock_register(u300_read_sched_clock, 32, rate);
 
         u300_delay_timer.read_current_timer = &u300_read_current_timer;
         u300_delay_timer.freq = rate;
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c
index 29606bd75f3f..d70b73364a3f 100644
--- a/arch/arm/plat-iop/time.c
+++ b/arch/arm/plat-iop/time.c
@@ -54,7 +54,7 @@ static struct clocksource iop_clocksource = {
 /*
  * IOP sched_clock() implementation via its clocksource.
  */
-static u32 notrace iop_read_sched_clock(void)
+static u64 notrace iop_read_sched_clock(void)
 {
         return 0xffffffffu - read_tcr1();
 }
@@ -142,7 +142,7 @@ void __init iop_init_time(unsigned long tick_rate)
 {
         u32 timer_ctl;
 
-        setup_sched_clock(iop_read_sched_clock, 32, tick_rate);
+        sched_clock_register(iop_read_sched_clock, 32, tick_rate);
 
         ticks_per_jiffy = DIV_ROUND_CLOSEST(tick_rate, HZ);
         iop_tick_rate = tick_rate;
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index d9bc98eb2a6b..384a776d8eb2 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -38,7 +38,7 @@
  */
 static void __iomem *sync32k_cnt_reg;
 
-static u32 notrace omap_32k_read_sched_clock(void)
+static u64 notrace omap_32k_read_sched_clock(void)
 {
         return sync32k_cnt_reg ? __raw_readl(sync32k_cnt_reg) : 0;
 }
@@ -115,7 +115,7 @@ int __init omap_init_clocksource_32k(void __iomem *vbase)
                 return ret;
         }
 
-        setup_sched_clock(omap_32k_read_sched_clock, 32, 32768);
+        sched_clock_register(omap_32k_read_sched_clock, 32, 32768);
         register_persistent_clock(NULL, omap_read_persistent_clock);
         pr_info("OMAP clocksource: 32k_counter at 32768 Hz\n");
 
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c
index 9d2b2ac74938..dade2920e9a6 100644
--- a/arch/arm/plat-orion/time.c
+++ b/arch/arm/plat-orion/time.c
@@ -60,7 +60,7 @@ static u32 ticks_per_jiffy;
  * at least 7.5ns (133MHz TCLK).
  */
 
-static u32 notrace orion_read_sched_clock(void)
+static u64 notrace orion_read_sched_clock(void)
 {
         return ~readl(timer_base + TIMER0_VAL_OFF);
 }
@@ -201,7 +201,7 @@ orion_time_init(void __iomem *_bridge_base, u32 _bridge_timer1_clr_mask,
         /*
          * Set scale and timer for sched_clock.
          */
-        setup_sched_clock(orion_read_sched_clock, 32, tclk);
+        sched_clock_register(orion_read_sched_clock, 32, tclk);
 
         /*
          * Setup free-running clocksource timer (interrupts
diff --git a/arch/arm/plat-versatile/sched-clock.c b/arch/arm/plat-versatile/sched-clock.c
index 51b109e3b6c3..c966ae90f4a0 100644
--- a/arch/arm/plat-versatile/sched-clock.c
+++ b/arch/arm/plat-versatile/sched-clock.c
@@ -26,7 +26,7 @@
 
 static void __iomem *ctr;
 
-static u32 notrace versatile_read_sched_clock(void)
+static u64 notrace versatile_read_sched_clock(void)
 {
         if (ctr)
                 return readl(ctr);
@@ -37,5 +37,5 @@ static u32 notrace versatile_read_sched_clock(void)
 void __init versatile_sched_clock_init(void __iomem *reg, unsigned long rate)
 {
         ctr = reg;
-        setup_sched_clock(versatile_read_sched_clock, 32, rate);
+        sched_clock_register(versatile_read_sched_clock, 32, rate);
 }