54 files changed, 428 insertions, 616 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index c49a775937db..32cbbd565902 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1983,8 +1983,6 @@ config XIP_PHYS_ADDR
 config KEXEC
         bool "Kexec system call (EXPERIMENTAL)"
         depends on (!SMP || PM_SLEEP_SMP)
-        select CRYPTO
-        select CRYPTO_SHA256
         help
           kexec is a system call that implements the ability to shutdown your
           current kernel, and to start another kernel.  It is like a reboot
diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 9b3d2ba82f13..8689949bdba3 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -804,7 +804,7 @@
 
                         usb1: usb@48390000 {
                                 compatible = "synopsys,dwc3";
-                                reg = <0x48390000 0x17000>;
+                                reg = <0x48390000 0x10000>;
                                 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
                                 phys = <&usb2_phy1>;
                                 phy-names = "usb2-phy";
@@ -826,7 +826,7 @@
 
                         usb2: usb@483d0000 {
                                 compatible = "synopsys,dwc3";
-                                reg = <0x483d0000 0x17000>;
+                                reg = <0x483d0000 0x10000>;
                                 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
                                 phys = <&usb2_phy2>;
                                 phy-names = "usb2-phy";
diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index 646a6eade788..e7ac47fa6615 100644
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -260,7 +260,7 @@
         status = "okay";
         pinctrl-names = "default";
         pinctrl-0 = <&i2c0_pins>;
-        clock-frequency = <400000>;
+        clock-frequency = <100000>;
 
         tps65218: tps65218@24 {
                 reg = <0x24>;
@@ -424,7 +424,7 @@
         ranges = <0 0 0 0x01000000>;    /* minimum GPMC partition = 16MB */
         nand@0,0 {
                 reg = <0 0 4>;          /* device IO registers */
-                ti,nand-ecc-opt = "bch8";
+                ti,nand-ecc-opt = "bch16";
                 ti,elm-id = <&elm>;
                 nand-bus-width = <8>;
                 gpmc,device-width = <1>;
@@ -443,8 +443,6 @@
                 gpmc,rd-cycle-ns = <40>;
                 gpmc,wr-cycle-ns = <40>;
                 gpmc,wait-pin = <0>;
-                gpmc,wait-on-read;
-                gpmc,wait-on-write;
                 gpmc,bus-turnaround-ns = <0>;
                 gpmc,cycle2cycle-delay-ns = <0>;
                 gpmc,clk-activation-ns = <0>;
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index ed7dd2395915..ac3e4859935f 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -435,13 +435,13 @@
 };
 
 &gpmc {
-        status = "okay";
+        status = "okay";        /* Disable QSPI when enabling GPMC (NAND) */
         pinctrl-names = "default";
         pinctrl-0 = <&nand_flash_x8>;
         ranges = <0 0 0x08000000 0x10000000>;   /* CS0: NAND */
         nand@0,0 {
                 reg = <0 0 0>; /* CS0, offset 0 */
-                ti,nand-ecc-opt = "bch8";
+                ti,nand-ecc-opt = "bch16";
                 ti,elm-id = <&elm>;
                 nand-bus-width = <8>;
                 gpmc,device-width = <1>;
@@ -459,8 +459,7 @@
                 gpmc,access-ns = <30>; /* tCEA + 4*/
                 gpmc,rd-cycle-ns = <40>;
                 gpmc,wr-cycle-ns = <40>;
-                gpmc,wait-on-read = "true";
-                gpmc,wait-on-write = "true";
+                gpmc,wait-pin = <0>;
                 gpmc,bus-turnaround-ns = <0>;
                 gpmc,cycle2cycle-delay-ns = <0>;
                 gpmc,clk-activation-ns = <0>;
@@ -557,7 +556,7 @@
 };
 
 &qspi {
-        status = "okay";
+        status = "disabled";    /* Disable GPMC (NAND) when enabling QSPI */
         pinctrl-names = "default";
         pinctrl-0 = <&qspi1_default>;
 
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index 65ccf564b9a5..6c97d4af61ee 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -149,7 +149,7 @@
                                 usb: usbck {
                                         compatible = "atmel,at91rm9200-clk-usb";
                                         #clock-cells = <0>;
-                                        atmel,clk-divisors = <1 2>;
+                                        atmel,clk-divisors = <1 2 0 0>;
                                         clocks = <&pllb>;
                                 };
 
diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi
index 31f7652612fc..4e0abbd9d655 100644
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -40,6 +40,7 @@
                                 };
 
                                 pllb: pllbck {
+                                        compatible = "atmel,at91sam9g20-clk-pllb";
                                         atmel,clk-input-range = <2000000 32000000>;
                                         atmel,pll-clk-output-ranges = <30000000 100000000 0 0>;
                                 };
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 50f8022905a1..e03fbf3c6889 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -8,6 +8,7 @@
 /dts-v1/;
 
 #include "dra74x.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 
 / {
         model = "TI DRA742";
@@ -24,9 +25,29 @@
                 regulator-min-microvolt = <3300000>;
                 regulator-max-microvolt = <3300000>;
         };
+
+        vtt_fixed: fixedregulator-vtt {
+                compatible = "regulator-fixed";
+                regulator-name = "vtt_fixed";
+                regulator-min-microvolt = <1350000>;
+                regulator-max-microvolt = <1350000>;
+                regulator-always-on;
+                regulator-boot-on;
+                enable-active-high;
+                gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
+        };
 };
 
 &dra7_pmx_core {
+        pinctrl-names = "default";
+        pinctrl-0 = <&vtt_pin>;
+
+        vtt_pin: pinmux_vtt_pin {
+                pinctrl-single,pins = <
+                        0x3b4 (PIN_OUTPUT | MUX_MODE14) /* spi1_cs1.gpio7_11 */
+                >;
+        };
+
         i2c1_pins: pinmux_i2c1_pins {
                 pinctrl-single,pins = <
                         0x400 (PIN_INPUT | MUX_MODE0) /* i2c1_sda */
@@ -43,20 +64,19 @@
 
         i2c3_pins: pinmux_i2c3_pins {
                 pinctrl-single,pins = <
-                        0x410 (PIN_INPUT | MUX_MODE0) /* i2c3_sda */
-                        0x414 (PIN_INPUT | MUX_MODE0) /* i2c3_scl */
+                        0x288 (PIN_INPUT | MUX_MODE9) /* gpio6_14.i2c3_sda */
+                        0x28c (PIN_INPUT | MUX_MODE9) /* gpio6_15.i2c3_scl */
                 >;
         };
 
         mcspi1_pins: pinmux_mcspi1_pins {
                 pinctrl-single,pins = <
-                        0x3a4 (PIN_INPUT | MUX_MODE0) /* spi2_clk */
-                        0x3a8 (PIN_INPUT | MUX_MODE0) /* spi2_d1 */
-                        0x3ac (PIN_INPUT | MUX_MODE0) /* spi2_d0 */
-                        0x3b0 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs0 */
-                        0x3b4 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs1 */
-                        0x3b8 (PIN_INPUT_SLEW | MUX_MODE6) /* spi2_cs2 */
-                        0x3bc (PIN_INPUT_SLEW | MUX_MODE6) /* spi2_cs3 */
+                        0x3a4 (PIN_INPUT | MUX_MODE0) /* spi1_sclk */
+                        0x3a8 (PIN_INPUT | MUX_MODE0) /* spi1_d1 */
+                        0x3ac (PIN_INPUT | MUX_MODE0) /* spi1_d0 */
+                        0x3b0 (PIN_INPUT_SLEW | MUX_MODE0) /* spi1_cs0 */
+                        0x3b8 (PIN_INPUT_SLEW | MUX_MODE6) /* spi1_cs2.hdmi1_hpd */
+                        0x3bc (PIN_INPUT_SLEW | MUX_MODE6) /* spi1_cs3.hdmi1_cec */
                 >;
         };
 
@@ -284,7 +304,7 @@
         status = "okay";
         pinctrl-names = "default";
         pinctrl-0 = <&i2c3_pins>;
-        clock-frequency = <3400000>;
+        clock-frequency = <400000>;
 };
 
 &mcspi1 {
@@ -483,7 +503,7 @@
                         reg = <0x001c0000 0x00020000>;
                 };
                 partition@7 {
-                        label = "NAND.u-boot-env";
+                        label = "NAND.u-boot-env.backup1";
                         reg = <0x001e0000 0x00020000>;
                 };
                 partition@8 {
@@ -504,3 +524,8 @@
 &usb2_phy2 {
         phy-supply = <&ldousb_reg>;
 };
+
+&gpio7 {
+        ti,no-reset-on-init;
+        ti,no-idle-on-init;
+};
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 97f603c4483d..d678152db4cb 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -245,7 +245,7 @@
                         gpio-controller;
                         #gpio-cells = <2>;
                         interrupt-controller;
-                        #interrupt-cells = <1>;
+                        #interrupt-cells = <2>;
                 };
 
                 gpio2: gpio@48055000 {
@@ -256,7 +256,7 @@
                         gpio-controller;
                         #gpio-cells = <2>;
                         interrupt-controller;
-                        #interrupt-cells = <1>;
+                        #interrupt-cells = <2>;
                 };
 
                 gpio3: gpio@48057000 {
@@ -267,7 +267,7 @@
                         gpio-controller;
                         #gpio-cells = <2>;
                         interrupt-controller;
-                        #interrupt-cells = <1>;
+                        #interrupt-cells = <2>;
                 };
 
                 gpio4: gpio@48059000 {
@@ -278,7 +278,7 @@
                         gpio-controller;
                         #gpio-cells = <2>;
                         interrupt-controller;
-                        #interrupt-cells = <1>;
+                        #interrupt-cells = <2>;
                 };
 
                 gpio5: gpio@4805b000 {
@@ -289,7 +289,7 @@
                         gpio-controller;
                         #gpio-cells = <2>;
                         interrupt-controller;
-                        #interrupt-cells = <1>;
+                        #interrupt-cells = <2>;
                 };
 
                 gpio6: gpio@4805d000 {
@@ -300,7 +300,7 @@
                         gpio-controller;
                         #gpio-cells = <2>;
                         interrupt-controller;
-                        #interrupt-cells = <1>;
+                        #interrupt-cells = <2>;
                 };
 
                 gpio7: gpio@48051000 {
@@ -311,7 +311,7 @@
                         gpio-controller;
                         #gpio-cells = <2>;
                         interrupt-controller;
-                        #interrupt-cells = <1>;
+                        #interrupt-cells = <2>;
                 };
 
                 gpio8: gpio@48053000 {
@@ -322,7 +322,7 @@
                         gpio-controller;
                         #gpio-cells = <2>;
                         interrupt-controller;
-                        #interrupt-cells = <1>;
+                        #interrupt-cells = <2>;
                 };
 
                 uart1: serial@4806a000 {
diff --git a/arch/arm/boot/dts/imx53-qsrb.dts b/arch/arm/boot/dts/imx53-qsrb.dts
index f1bbf9a32991..82d623d05915 100644
--- a/arch/arm/boot/dts/imx53-qsrb.dts
+++ b/arch/arm/boot/dts/imx53-qsrb.dts
@@ -28,6 +28,12 @@
                                 MX53_PAD_CSI0_DAT9__I2C1_SCL      0x400001ec
                         >;
                 };
+
+                pinctrl_pmic: pmicgrp {
+                        fsl,pins = <
+                                MX53_PAD_CSI0_DAT5__GPIO5_23    0x1e4 /* IRQ */
+                        >;
+                };
         };
 };
 
@@ -38,6 +44,8 @@
 
         pmic: mc34708@8 {
                 compatible = "fsl,mc34708";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pinctrl_pmic>;
                 reg = <0x08>;
                 interrupt-parent = <&gpio5>;
                 interrupts = <23 0x8>;
diff --git a/arch/arm/boot/dts/imx6dl-hummingboard.dts b/arch/arm/boot/dts/imx6dl-hummingboard.dts
index c8e51dd41b8f..71598546087f 100644
--- a/arch/arm/boot/dts/imx6dl-hummingboard.dts
+++ b/arch/arm/boot/dts/imx6dl-hummingboard.dts
@@ -58,7 +58,7 @@
 
         sound-spdif {
                 compatible = "fsl,imx-audio-spdif";
-                model = "imx-spdif";
+                model = "On-board SPDIF";
                 /* IMX6 doesn't implement this yet */
                 spdif-controller = <&spdif>;
                 spdif-out;
@@ -181,11 +181,13 @@
 };
 
 &usbh1 {
+        disable-over-current;
         vbus-supply = <&reg_usbh1_vbus>;
         status = "okay";
 };
 
 &usbotg {
+        disable-over-current;
         pinctrl-names = "default";
         pinctrl-0 = <&pinctrl_hummingboard_usbotg_id>;
         vbus-supply = <&reg_usbotg_vbus>;
diff --git a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
index e8e781656b3f..6a524ca011e7 100644
--- a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
@@ -61,7 +61,7 @@
 
         sound-spdif {
                 compatible = "fsl,imx-audio-spdif";
-                model = "imx-spdif";
+                model = "Integrated SPDIF";
                 /* IMX6 doesn't implement this yet */
                 spdif-controller = <&spdif>;
                 spdif-out;
@@ -130,16 +130,23 @@
                         fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>;
                 };
 
+                pinctrl_cubox_i_usbh1: cubox-i-usbh1 {
+                        fsl,pins = <MX6QDL_PAD_GPIO_3__USB_H1_OC 0x1b0b0>;
+                };
+
                 pinctrl_cubox_i_usbh1_vbus: cubox-i-usbh1-vbus {
                         fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x4001b0b0>;
                 };
 
-                pinctrl_cubox_i_usbotg_id: cubox-i-usbotg-id {
+                pinctrl_cubox_i_usbotg: cubox-i-usbotg {
                         /*
-                         * The Cubox-i pulls this low, but as it's pointless
+                         * The Cubox-i pulls ID low, but as it's pointless
                          * leaving it as a pull-up, even if it is just 10uA.
                          */
-                        fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
+                        fsl,pins = <
+                                MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059
+                                MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
+                        >;
                 };
 
                 pinctrl_cubox_i_usbotg_vbus: cubox-i-usbotg-vbus {
@@ -173,13 +180,15 @@
 };
 
 &usbh1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_cubox_i_usbh1>;
         vbus-supply = <&reg_usbh1_vbus>;
         status = "okay";
 };
 
 &usbotg {
         pinctrl-names = "default";
-        pinctrl-0 = <&pinctrl_cubox_i_usbotg_id>;
+        pinctrl-0 = <&pinctrl_cubox_i_usbotg>;
         vbus-supply = <&reg_usbotg_vbus>;
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi b/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
index d16066608e21..db9f45b2c573 100644
--- a/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
@@ -17,7 +17,7 @@
         enet {
                 pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
                         fsl,pins = <
-                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
+                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b8b0
                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
                                 /* AR8035 reset */
                                 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15         0x130b0
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index 3c3e6da1deac..a9aae88b74f5 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -292,6 +292,7 @@
 &uart3 {
         pinctrl-names = "default";
         pinctrl-0 = <&uart3_pins>;
+        interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
 };
 
 &gpio1 {
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index b15f1a77d684..4361777a08d8 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -93,7 +93,7 @@
         };
 
         tv: connector {
-                compatible = "composite-connector";
+                compatible = "composite-video-connector";
                 label = "tv";
 
                 port {
@@ -353,7 +353,7 @@
         };
 
         twl_power: power {
-                compatible = "ti,twl4030-power-n900";
+                compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
                 ti,use_poweroff;
         };
 };
diff --git a/arch/arm/boot/dts/omap3430-sdp.dts b/arch/arm/boot/dts/omap3430-sdp.dts
index 02f69f4a8fd3..9bad94efe1c8 100644
--- a/arch/arm/boot/dts/omap3430-sdp.dts
+++ b/arch/arm/boot/dts/omap3430-sdp.dts
@@ -107,7 +107,7 @@
                 #address-cells = <1>;
                 #size-cells = <1>;
                 reg = <1 0 0x08000000>;
-                ti,nand-ecc-opt = "ham1";
+                ti,nand-ecc-opt = "sw";
                 nand-bus-width = <8>;
                 gpmc,cs-on-ns = <0>;
                 gpmc,cs-rd-off-ns = <36>;
diff --git a/arch/arm/boot/dts/omap3xxx-clocks.dtsi b/arch/arm/boot/dts/omap3xxx-clocks.dtsi
index e47ff69dcf70..5c375003bad1 100644
--- a/arch/arm/boot/dts/omap3xxx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap3xxx-clocks.dtsi
@@ -467,6 +467,7 @@
                 ti,bit-shift = <0x1e>;
                 reg = <0x0d00>;
                 ti,set-bit-to-disable;
+                ti,set-rate-parent;
         };
 
         dpll4_m6_ck: dpll4_m6_ck {
diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi
index e67a23b5d788..58c27466f012 100644
--- a/arch/arm/boot/dts/omap54xx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi
@@ -367,10 +367,12 @@
 
         l3_iclk_div: l3_iclk_div {
                 #clock-cells = <0>;
-                compatible = "fixed-factor-clock";
+                compatible = "ti,divider-clock";
+                ti,max-div = <2>;
+                ti,bit-shift = <4>;
+                reg = <0x100>;
                 clocks = <&dpll_core_h12x2_ck>;
-                clock-mult = <1>;
-                clock-div = <1>;
+                ti,index-power-of-two;
         };
 
         gpu_l3_iclk: gpu_l3_iclk {
@@ -383,10 +385,12 @@
 
         l4_root_clk_div: l4_root_clk_div {
                 #clock-cells = <0>;
-                compatible = "fixed-factor-clock";
+                compatible = "ti,divider-clock";
+                ti,max-div = <2>;
+                ti,bit-shift = <8>;
+                reg = <0x100>;
                 clocks = <&l3_iclk_div>;
-                clock-mult = <1>;
-                clock-div = <1>;
+                ti,index-power-of-two;
         };
 
         slimbus1_slimbus_clk: slimbus1_slimbus_clk {
diff --git a/arch/arm/boot/dts/ste-snowball.dts b/arch/arm/boot/dts/ste-snowball.dts
index 4a2000c620ad..3e97a669f15e 100644
--- a/arch/arm/boot/dts/ste-snowball.dts
+++ b/arch/arm/boot/dts/ste-snowball.dts
@@ -116,7 +116,6 @@
                 msp2: msp@80117000 {
                         pinctrl-names = "default";
                         pinctrl-0 = <&msp2_default_mode>;
-                        status = "okay";
                 };
 
                 msp3: msp@80125000 {
diff --git a/arch/arm/boot/dts/twl6030.dtsi b/arch/arm/boot/dts/twl6030.dtsi
index 2e3bd3172b23..55eb35f068fb 100644
--- a/arch/arm/boot/dts/twl6030.dtsi
+++ b/arch/arm/boot/dts/twl6030.dtsi
@@ -83,10 +83,6 @@
                 regulator-always-on;
         };
 
-        clk32kg: regulator-clk32kg {
-                compatible = "ti,twl6030-clk32kg";
-        };
-
         twl_usb_comparator: usb-comparator {
                 compatible = "ti,twl6030-usb";
                 interrupts = <4>, <10>;
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index 88099175fc56..d86771abbf57 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -1443,14 +1443,14 @@ void edma_assign_channel_eventq(unsigned channel, enum dma_event_q eventq_no)
 EXPORT_SYMBOL(edma_assign_channel_eventq);
 
 static int edma_setup_from_hw(struct device *dev, struct edma_soc_info *pdata,
-                              struct edma *edma_cc)
+                              struct edma *edma_cc, int cc_id)
 {
         int i;
         u32 value, cccfg;
         s8 (*queue_priority_map)[2];
 
         /* Decode the eDMA3 configuration from CCCFG register */
-        cccfg = edma_read(0, EDMA_CCCFG);
+        cccfg = edma_read(cc_id, EDMA_CCCFG);
 
         value = GET_NUM_REGN(cccfg);
         edma_cc->num_region = BIT(value);
@@ -1464,7 +1464,8 @@ static int edma_setup_from_hw(struct device *dev, struct edma_soc_info *pdata,
         value = GET_NUM_EVQUE(cccfg);
         edma_cc->num_tc = value + 1;
 
-        dev_dbg(dev, "eDMA3 HW configuration (cccfg: 0x%08x):\n", cccfg);
+        dev_dbg(dev, "eDMA3 CC%d HW configuration (cccfg: 0x%08x):\n", cc_id,
+                cccfg);
         dev_dbg(dev, "num_region: %u\n", edma_cc->num_region);
         dev_dbg(dev, "num_channel: %u\n", edma_cc->num_channels);
         dev_dbg(dev, "num_slot: %u\n", edma_cc->num_slots);
@@ -1684,7 +1685,7 @@ static int edma_probe(struct platform_device *pdev)
                         return -ENOMEM;
 
                 /* Get eDMA3 configuration from IP */
-                ret = edma_setup_from_hw(dev, info[j], edma_cc[j]);
+                ret = edma_setup_from_hw(dev, info[j], edma_cc[j], j);
                 if (ret)
                         return ret;
 
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index fd43f7f55b70..79ecb4f34ffb 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -472,7 +472,6 @@ static inline void __sync_cache_range_r(volatile void *p, size_t size)
         "mcr    p15, 0, r0, c1, c0, 0   @ set SCTLR \n\t" \
         "isb    \n\t" \
         "bl     v7_flush_dcache_"__stringify(level)" \n\t" \
-        "clrex  \n\t" \
         "mrc    p15, 0, r0, c1, c0, 1   @ get ACTLR \n\t" \
         "bic    r0, r0, #(1 << 6)       @ disable local coherency \n\t" \
         "mcr    p15, 0, r0, c1, c0, 1   @ set ACTLR \n\t" \
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
index 963a2515906d..819777d0e91f 100644
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@ -74,6 +74,7 @@
 #define ARM_CPU_PART_CORTEX_A12         0x4100c0d0
 #define ARM_CPU_PART_CORTEX_A17         0x4100c0e0
 #define ARM_CPU_PART_CORTEX_A15         0x4100c0f0
+#define ARM_CPU_PART_MASK               0xff00fff0
 
 #define ARM_CPU_XSCALE_ARCH_MASK        0xe000
 #define ARM_CPU_XSCALE_ARCH_V1          0x2000
@@ -179,7 +180,7 @@ static inline unsigned int __attribute_const__ read_cpuid_implementor(void)
  */
 static inline unsigned int __attribute_const__ read_cpuid_part(void)
 {
-        return read_cpuid_id() & 0xff00fff0;
+        return read_cpuid_id() & ARM_CPU_PART_MASK;
 }
 
 static inline unsigned int __attribute_const__ __deprecated read_cpuid_part_number(void)
diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h
index f4b46d39b9cf..afb9cafd3786 100644
--- a/arch/arm/include/asm/elf.h
+++ b/arch/arm/include/asm/elf.h
@@ -50,6 +50,7 @@ typedef struct user_fp elf_fpregset_t;
 #define R_ARM_ABS32             2
 #define R_ARM_CALL              28
 #define R_ARM_JUMP24            29
+#define R_ARM_TARGET1           38
 #define R_ARM_V4BX              40
 #define R_ARM_PREL31            42
 #define R_ARM_MOVW_ABS_NC       43
diff --git a/arch/arm/include/asm/smp_plat.h b/arch/arm/include/asm/smp_plat.h
index a252c0bfacf5..0ad7d490ee6f 100644
--- a/arch/arm/include/asm/smp_plat.h
+++ b/arch/arm/include/asm/smp_plat.h
@@ -8,6 +8,7 @@
 #include <linux/cpumask.h>
 #include <linux/err.h>
 
+#include <asm/cpu.h>
 #include <asm/cputype.h>
 
 /*
@@ -25,6 +26,20 @@ static inline bool is_smp(void)
 #endif
 }
 
+/**
+ * smp_cpuid_part() - return part id for a given cpu
+ * @cpu:        logical cpu id.
+ *
+ * Return: part id of logical cpu passed as argument.
+ */
+static inline unsigned int smp_cpuid_part(int cpu)
+{
+        struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpu);
+
+        return is_smp() ? cpu_info->cpuid & ARM_CPU_PART_MASK :
+                          read_cpuid_part();
+}
+
 /* all SMP configurations have the extended CPUID registers */
 #ifndef CONFIG_MMU
 #define tlb_ops_need_broadcast()        0
diff --git a/arch/arm/include/asm/xen/page-coherent.h b/arch/arm/include/asm/xen/page-coherent.h
index 1109017499e5..e8275ea88e88 100644
--- a/arch/arm/include/asm/xen/page-coherent.h
+++ b/arch/arm/include/asm/xen/page-coherent.h
@@ -26,25 +26,14 @@ static inline void xen_dma_map_page(struct device *hwdev, struct page *page,
         __generic_dma_ops(hwdev)->map_page(hwdev, page, offset, size, dir, attrs);
 }
 
-static inline void xen_dma_unmap_page(struct device *hwdev, dma_addr_t handle,
+void xen_dma_unmap_page(struct device *hwdev, dma_addr_t handle,
                 size_t size, enum dma_data_direction dir,
-                struct dma_attrs *attrs)
-{
-        if (__generic_dma_ops(hwdev)->unmap_page)
-                __generic_dma_ops(hwdev)->unmap_page(hwdev, handle, size, dir, attrs);
-}
+                struct dma_attrs *attrs);
 
-static inline void xen_dma_sync_single_for_cpu(struct device *hwdev,
-                dma_addr_t handle, size_t size, enum dma_data_direction dir)
-{
-        if (__generic_dma_ops(hwdev)->sync_single_for_cpu)
-                __generic_dma_ops(hwdev)->sync_single_for_cpu(hwdev, handle, size, dir);
-}
+void xen_dma_sync_single_for_cpu(struct device *hwdev,
+                dma_addr_t handle, size_t size, enum dma_data_direction dir);
+
+void xen_dma_sync_single_for_device(struct device *hwdev,
+                dma_addr_t handle, size_t size, enum dma_data_direction dir);
 
-static inline void xen_dma_sync_single_for_device(struct device *hwdev,
-                dma_addr_t handle, size_t size, enum dma_data_direction dir)
-{
-        if (__generic_dma_ops(hwdev)->sync_single_for_device)
-                __generic_dma_ops(hwdev)->sync_single_for_device(hwdev, handle, size, dir);
-}
 #endif /* _ASM_ARM_XEN_PAGE_COHERENT_H */
diff --git a/arch/arm/include/asm/xen/page.h b/arch/arm/include/asm/xen/page.h
index ded062f9b358..135c24a5ba26 100644
--- a/arch/arm/include/asm/xen/page.h
+++ b/arch/arm/include/asm/xen/page.h
@@ -33,7 +33,6 @@ typedef struct xpaddr {
 #define INVALID_P2M_ENTRY      (~0UL)
 
 unsigned long __pfn_to_mfn(unsigned long pfn);
-unsigned long __mfn_to_pfn(unsigned long mfn);
 extern struct rb_root phys_to_mach;
 
 static inline unsigned long pfn_to_mfn(unsigned long pfn)
@@ -51,14 +50,6 @@ static inline unsigned long pfn_to_mfn(unsigned long pfn)
 
 static inline unsigned long mfn_to_pfn(unsigned long mfn)
 {
-        unsigned long pfn;
-
-        if (phys_to_mach.rb_node != NULL) {
-                pfn = __mfn_to_pfn(mfn);
-                if (pfn != INVALID_P2M_ENTRY)
-                        return pfn;
-        }
-
         return mfn;
 }
 
diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S
index 8db307d0954b..2fdf8679b46e 100644
--- a/arch/arm/kernel/entry-header.S
+++ b/arch/arm/kernel/entry-header.S
@@ -208,26 +208,21 @@
 #endif
         .endif
         msr     spsr_cxsf, \rpsr
-#if defined(CONFIG_CPU_V6)
-        ldr     r0, [sp]
-        strex   r1, r2, [sp]                    @ clear the exclusive monitor
-        ldmib   sp, {r1 - pc}^                  @ load r1 - pc, cpsr
-#elif defined(CONFIG_CPU_32v6K)
-        clrex                                   @ clear the exclusive monitor
-        ldmia   sp, {r0 - pc}^                  @ load r0 - pc, cpsr
-#else
-        ldmia   sp, {r0 - pc}^                  @ load r0 - pc, cpsr
+#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_32v6K)
+        @ We must avoid clrex due to Cortex-A15 erratum #830321
+        sub     r0, sp, #4                      @ uninhabited address
+        strex   r1, r2, [r0]                    @ clear the exclusive monitor
 #endif
+        ldmia   sp, {r0 - pc}^                  @ load r0 - pc, cpsr
         .endm
 
         .macro  restore_user_regs, fast = 0, offset = 0
         ldr     r1, [sp, #\offset + S_PSR]      @ get calling cpsr
         ldr     lr, [sp, #\offset + S_PC]!      @ get pc
         msr     spsr_cxsf, r1                   @ save in spsr_svc
-#if defined(CONFIG_CPU_V6)
+#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_32v6K)
+        @ We must avoid clrex due to Cortex-A15 erratum #830321
         strex   r1, r2, [sp]                    @ clear the exclusive monitor
-#elif defined(CONFIG_CPU_32v6K)
-        clrex                                   @ clear the exclusive monitor
 #endif
         .if     \fast
         ldmdb   sp, {r1 - lr}^                  @ get calling r1 - lr
@@ -261,7 +256,10 @@
         .endif
         ldr     lr, [sp, #S_SP]                 @ top of the stack
         ldrd    r0, r1, [sp, #S_LR]             @ calling lr and pc
-        clrex                                   @ clear the exclusive monitor
+
+        @ We must avoid clrex due to Cortex-A15 erratum #830321
+        strex   r2, r1, [sp, #S_LR]             @ clear the exclusive monitor
+
         stmdb   lr!, {r0, r1, \rpsr}            @ calling lr and rfe context
         ldmia   sp, {r0 - r12}
         mov     sp, lr
@@ -282,13 +280,16 @@
         .endm
 #else   /* ifdef CONFIG_CPU_V7M */
         .macro  restore_user_regs, fast = 0, offset = 0
-        clrex                                   @ clear the exclusive monitor
         mov     r2, sp
         load_user_sp_lr r2, r3, \offset + S_SP  @ calling sp, lr
         ldr     r1, [sp, #\offset + S_PSR]      @ get calling cpsr
         ldr     lr, [sp, #\offset + S_PC]       @ get pc
         add     sp, sp, #\offset + S_SP
         msr     spsr_cxsf, r1                   @ save in spsr_svc
+
+        @ We must avoid clrex due to Cortex-A15 erratum #830321
+        strex   r1, r2, [sp]                    @ clear the exclusive monitor
+
         .if     \fast
         ldmdb   sp, {r1 - r12}                  @ get calling r1 - r12
         .else
diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c
index 45e478157278..6a4dffefd357 100644
--- a/arch/arm/kernel/module.c
+++ b/arch/arm/kernel/module.c
@@ -91,6 +91,7 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,
                         break;
 
                 case R_ARM_ABS32:
+                case R_ARM_TARGET1:
                         *(u32 *)loc += sym->st_value;
                         break;
 
diff --git a/arch/arm/kvm/handle_exit.c b/arch/arm/kvm/handle_exit.c
index 4c979d466cc1..a96a8043277c 100644
--- a/arch/arm/kvm/handle_exit.c
+++ b/arch/arm/kvm/handle_exit.c
@@ -93,6 +93,8 @@ static int kvm_handle_wfx(struct kvm_vcpu *vcpu, struct kvm_run *run)
         else
                 kvm_vcpu_block(vcpu);
 
+        kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
+
         return 1;
 }
 
diff --git a/arch/arm/kvm/init.S b/arch/arm/kvm/init.S
index 991415d978b6..3988e72d16ff 100644
--- a/arch/arm/kvm/init.S
+++ b/arch/arm/kvm/init.S
@@ -99,6 +99,10 @@ __do_hyp_init:
         mrc     p15, 0, r0, c10, c2, 1
         mcr     p15, 4, r0, c10, c2, 1
 
+        @ Invalidate the stale TLBs from Bootloader
+        mcr     p15, 4, r0, c8, c7, 0   @ TLBIALLH
+        dsb     ish
+
         @ Set the HSCTLR to:
         @  - ARM/THUMB exceptions: Kernel config (Thumb-2 kernel)
         @  - Endianness: Kernel config
diff --git a/arch/arm/mach-at91/board-dt-rm9200.c b/arch/arm/mach-at91/board-dt-rm9200.c
index 3a185faee795..f4b6e91843e4 100644
--- a/arch/arm/mach-at91/board-dt-rm9200.c
+++ b/arch/arm/mach-at91/board-dt-rm9200.c
@@ -14,6 +14,7 @@
 #include <linux/gpio.h>
 #include <linux/of.h>
 #include <linux/of_irq.h>
+#include <linux/clk-provider.h>
 
 #include <asm/setup.h>
 #include <asm/irq.h>
@@ -35,13 +36,21 @@ static void __init at91rm9200_dt_init_irq(void)
         of_irq_init(irq_of_match);
 }
 
+static void __init at91rm9200_dt_timer_init(void)
+{
+#if defined(CONFIG_COMMON_CLK)
+        of_clk_init(NULL);
+#endif
+        at91rm9200_timer_init();
+}
+
 static const char *at91rm9200_dt_board_compat[] __initdata = {
         "atmel,at91rm9200",
         NULL
 };
 
 DT_MACHINE_START(at91rm9200_dt, "Atmel AT91RM9200 (Device Tree)")
-        .init_time      = at91rm9200_timer_init,
+        .init_time      = at91rm9200_dt_timer_init,
         .map_io         = at91_map_io,
         .handle_irq     = at91_aic_handle_irq,
         .init_early     = at91rm9200_dt_initialize,
diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile
index 67c492aabf4d..b19a39652545 100644
--- a/arch/arm/mach-bcm/Makefile
+++ b/arch/arm/mach-bcm/Makefile
@@ -36,5 +36,4 @@ obj-$(CONFIG_ARCH_BCM_5301X)	+= bcm_5301x.o
 
 ifeq ($(CONFIG_ARCH_BRCMSTB),y)
 obj-y                           += brcmstb.o
-obj-$(CONFIG_SMP)               += headsmp-brcmstb.o platsmp-brcmstb.o
 endif
diff --git a/arch/arm/mach-bcm/brcmstb.h b/arch/arm/mach-bcm/brcmstb.h
deleted file mode 100644
index ec0c3d112b36..000000000000
--- a/arch/arm/mach-bcm/brcmstb.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Broadcom Corporation
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __BRCMSTB_H__
-#define __BRCMSTB_H__
-
-void brcmstb_secondary_startup(void);
-
-#endif /* __BRCMSTB_H__ */
diff --git a/arch/arm/mach-bcm/headsmp-brcmstb.S b/arch/arm/mach-bcm/headsmp-brcmstb.S
deleted file mode 100644
index 199c1ea58248..000000000000
--- a/arch/arm/mach-bcm/headsmp-brcmstb.S
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * SMP boot code for secondary CPUs
- * Based on arch/arm/mach-tegra/headsmp.S
- *
- * Copyright (C) 2010 NVIDIA, Inc.
- * Copyright (C) 2013-2014 Broadcom Corporation
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <asm/assembler.h>
-#include <linux/linkage.h>
-#include <linux/init.h>
-
-        .section ".text.head", "ax"
-
-ENTRY(brcmstb_secondary_startup)
-        /*
-         * Ensure CPU is in a sane state by disabling all IRQs and switching
-         * into SVC mode.
-         */
-        setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r0
-
-        bl      v7_invalidate_l1
-        b       secondary_startup
-ENDPROC(brcmstb_secondary_startup)
diff --git a/arch/arm/mach-bcm/platsmp-brcmstb.c b/arch/arm/mach-bcm/platsmp-brcmstb.c
deleted file mode 100644
index af780e9c23a6..000000000000
--- a/arch/arm/mach-bcm/platsmp-brcmstb.c
+++ /dev/null
@@ -1,363 +0,0 @@
-/*
- * Broadcom STB CPU SMP and hotplug support for ARM
- *
- * Copyright (C) 2013-2014 Broadcom Corporation
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <linux/delay.h>
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/of_address.h>
-#include <linux/of_platform.h>
-#include <linux/printk.h>
-#include <linux/regmap.h>
-#include <linux/smp.h>
-#include <linux/mfd/syscon.h>
-#include <linux/spinlock.h>
-
-#include <asm/cacheflush.h>
-#include <asm/cp15.h>
-#include <asm/mach-types.h>
-#include <asm/smp_plat.h>
-
-#include "brcmstb.h"
-
-enum {
-        ZONE_MAN_CLKEN_MASK             = BIT(0),
-        ZONE_MAN_RESET_CNTL_MASK        = BIT(1),
-        ZONE_MAN_MEM_PWR_MASK           = BIT(4),
-        ZONE_RESERVED_1_MASK            = BIT(5),
-        ZONE_MAN_ISO_CNTL_MASK          = BIT(6),
-        ZONE_MANUAL_CONTROL_MASK        = BIT(7),
-        ZONE_PWR_DN_REQ_MASK            = BIT(9),
-        ZONE_PWR_UP_REQ_MASK            = BIT(10),
-        ZONE_BLK_RST_ASSERT_MASK        = BIT(12),
-        ZONE_PWR_OFF_STATE_MASK         = BIT(25),
-        ZONE_PWR_ON_STATE_MASK          = BIT(26),
-        ZONE_DPG_PWR_STATE_MASK         = BIT(28),
-        ZONE_MEM_PWR_STATE_MASK         = BIT(29),
-        ZONE_RESET_STATE_MASK           = BIT(31),
-        CPU0_PWR_ZONE_CTRL_REG          = 1,
-        CPU_RESET_CONFIG_REG            = 2,
-};
-
-static void __iomem *cpubiuctrl_block;
-static void __iomem *hif_cont_block;
-static u32 cpu0_pwr_zone_ctrl_reg;
-static u32 cpu_rst_cfg_reg;
-static u32 hif_cont_reg;
-
-#ifdef CONFIG_HOTPLUG_CPU
-static DEFINE_PER_CPU_ALIGNED(int, per_cpu_sw_state);
-
-static int per_cpu_sw_state_rd(u32 cpu)
-{
-        sync_cache_r(SHIFT_PERCPU_PTR(&per_cpu_sw_state, per_cpu_offset(cpu)));
-        return per_cpu(per_cpu_sw_state, cpu);
-}
-
-static void per_cpu_sw_state_wr(u32 cpu, int val)
-{
-        per_cpu(per_cpu_sw_state, cpu) = val;
-        dmb();
-        sync_cache_w(SHIFT_PERCPU_PTR(&per_cpu_sw_state, per_cpu_offset(cpu)));
-        dsb_sev();
-}
-#else
-static inline void per_cpu_sw_state_wr(u32 cpu, int val) { }
-#endif
-
-static void __iomem *pwr_ctrl_get_base(u32 cpu)
-{
-        void __iomem *base = cpubiuctrl_block + cpu0_pwr_zone_ctrl_reg;
-        base += (cpu_logical_map(cpu) * 4);
-        return base;
-}
-
-static u32 pwr_ctrl_rd(u32 cpu)
-{
-        void __iomem *base = pwr_ctrl_get_base(cpu);
-        return readl_relaxed(base);
-}
-
-static void pwr_ctrl_wr(u32 cpu, u32 val)
-{
-        void __iomem *base = pwr_ctrl_get_base(cpu);
-        writel(val, base);
-}
-
-static void cpu_rst_cfg_set(u32 cpu, int set)
-{
-        u32 val;
-        val = readl_relaxed(cpubiuctrl_block + cpu_rst_cfg_reg);
-        if (set)
-                val |= BIT(cpu_logical_map(cpu));
-        else
-                val &= ~BIT(cpu_logical_map(cpu));
-        writel_relaxed(val, cpubiuctrl_block + cpu_rst_cfg_reg);
-}
-
-static void cpu_set_boot_addr(u32 cpu, unsigned long boot_addr)
-{
-        const int reg_ofs = cpu_logical_map(cpu) * 8;
-        writel_relaxed(0, hif_cont_block + hif_cont_reg + reg_ofs);
-        writel_relaxed(boot_addr, hif_cont_block + hif_cont_reg + 4 + reg_ofs);
-}
-
-static void brcmstb_cpu_boot(u32 cpu)
-{
-        pr_info("SMP: Booting CPU%d...\n", cpu);
-
-        /*
-         * set the reset vector to point to the secondary_startup
-         * routine
-         */
-        cpu_set_boot_addr(cpu, virt_to_phys(brcmstb_secondary_startup));
-
-        /* unhalt the cpu */
-        cpu_rst_cfg_set(cpu, 0);
-}
-
-static void brcmstb_cpu_power_on(u32 cpu)
-{
-        /*
-         * The secondary cores power was cut, so we must go through
-         * power-on initialization.
-         */
-        u32 tmp;
-
-        pr_info("SMP: Powering up CPU%d...\n", cpu);
-
-        /* Request zone power up */
-        pwr_ctrl_wr(cpu, ZONE_PWR_UP_REQ_MASK);
-
-        /* Wait for the power up FSM to complete */
-        do {
-                tmp = pwr_ctrl_rd(cpu);
-        } while (!(tmp & ZONE_PWR_ON_STATE_MASK));
-
-        per_cpu_sw_state_wr(cpu, 1);
-}
-
-static int brcmstb_cpu_get_power_state(u32 cpu)
-{
-        int tmp = pwr_ctrl_rd(cpu);
-        return (tmp & ZONE_RESET_STATE_MASK) ? 0 : 1;
-}
-
-#ifdef CONFIG_HOTPLUG_CPU
-
-static void brcmstb_cpu_die(u32 cpu)
-{
-        v7_exit_coherency_flush(all);
-
-        /* Prevent all interrupts from reaching this CPU. */
-        arch_local_irq_disable();
-
-        /*
-         * Final full barrier to ensure everything before this instruction has
-         * quiesced.
-         */
-        isb();
-        dsb();
-
-        per_cpu_sw_state_wr(cpu, 0);
-
-        /* Sit and wait to die */
-        wfi();
-
-        /* We should never get here... */
-        panic("Spurious interrupt on CPU %d received!\n", cpu);
-}
-
-static int brcmstb_cpu_kill(u32 cpu)
-{
-        u32 tmp;
-
-        pr_info("SMP: Powering down CPU%d...\n", cpu);
-
-        while (per_cpu_sw_state_rd(cpu))
-                ;
-
-        /* Program zone reset */
-        pwr_ctrl_wr(cpu, ZONE_RESET_STATE_MASK | ZONE_BLK_RST_ASSERT_MASK |
-                              ZONE_PWR_DN_REQ_MASK);
-
-        /* Verify zone reset */
-        tmp = pwr_ctrl_rd(cpu);
-        if (!(tmp & ZONE_RESET_STATE_MASK))
-                pr_err("%s: Zone reset bit for CPU %d not asserted!\n",
-                        __func__, cpu);
-
-        /* Wait for power down */
-        do {
-                tmp = pwr_ctrl_rd(cpu);
-        } while (!(tmp & ZONE_PWR_OFF_STATE_MASK));
-
-        /* Settle-time from Broadcom-internal DVT reference code */
-        udelay(7);
-
-        /* Assert reset on the CPU */
-        cpu_rst_cfg_set(cpu, 1);
-
-        return 1;
-}
-
-#endif /* CONFIG_HOTPLUG_CPU */
-
-static int __init setup_hifcpubiuctrl_regs(struct device_node *np)
-{
-        int rc = 0;
-        char *name;
-        struct device_node *syscon_np = NULL;
-
-        name = "syscon-cpu";
-
-        syscon_np = of_parse_phandle(np, name, 0);
-        if (!syscon_np) {
-                pr_err("can't find phandle %s\n", name);
-                rc = -EINVAL;
-                goto cleanup;
-        }
-
-        cpubiuctrl_block = of_iomap(syscon_np, 0);
-        if (!cpubiuctrl_block) {
-                pr_err("iomap failed for cpubiuctrl_block\n");
-                rc = -EINVAL;
-                goto cleanup;
-        }
-
-        rc = of_property_read_u32_index(np, name, CPU0_PWR_ZONE_CTRL_REG,
-                                        &cpu0_pwr_zone_ctrl_reg);
-        if (rc) {
-                pr_err("failed to read 1st entry from %s property (%d)\n", name,
-                        rc);
-                rc = -EINVAL;
-                goto cleanup;
-        }
-
-        rc = of_property_read_u32_index(np, name, CPU_RESET_CONFIG_REG,
-                                        &cpu_rst_cfg_reg);
-        if (rc) {
-                pr_err("failed to read 2nd entry from %s property (%d)\n", name,
-                        rc);
-                rc = -EINVAL;
-                goto cleanup;
-        }
-
-cleanup:
-        if (syscon_np)
-                of_node_put(syscon_np);
-
-        return rc;
-}
-
-static int __init setup_hifcont_regs(struct device_node *np)
-{
-        int rc = 0;
-        char *name;
-        struct device_node *syscon_np = NULL;
-
-        name = "syscon-cont";
-
-        syscon_np = of_parse_phandle(np, name, 0);
-        if (!syscon_np) {
-                pr_err("can't find phandle %s\n", name);
-                rc = -EINVAL;
-                goto cleanup;
-        }
-
-        hif_cont_block = of_iomap(syscon_np, 0);
-        if (!hif_cont_block) {
-                pr_err("iomap failed for hif_cont_block\n");
-                rc = -EINVAL;
-                goto cleanup;
-        }
-
-        /* offset is at top of hif_cont_block */
-        hif_cont_reg = 0;
-
-cleanup:
-        if (syscon_np)
-                of_node_put(syscon_np);
-
-        return rc;
-}
-
-static void __init brcmstb_cpu_ctrl_setup(unsigned int max_cpus)
-{
-        int rc;
-        struct device_node *np;
-        char *name;
-
-        name = "brcm,brcmstb-smpboot";
-        np = of_find_compatible_node(NULL, NULL, name);
-        if (!np) {
-                pr_err("can't find compatible node %s\n", name);
-                return;
-        }
-
-        rc = setup_hifcpubiuctrl_regs(np);
-        if (rc)
-                return;
-
-        rc = setup_hifcont_regs(np);
-        if (rc)
-                return;
-}
-
-static DEFINE_SPINLOCK(boot_lock);
-
-static void brcmstb_secondary_init(unsigned int cpu)
-{
-        /*
-         * Synchronise with the boot thread.
-         */
-        spin_lock(&boot_lock);
-        spin_unlock(&boot_lock);
-}
-
-static int brcmstb_boot_secondary(unsigned int cpu, struct task_struct *idle)
-{
-        /*
-         * set synchronisation state between this boot processor
-         * and the secondary one
-         */
-        spin_lock(&boot_lock);
-
-        /* Bring up power to the core if necessary */
-        if (brcmstb_cpu_get_power_state(cpu) == 0)
-                brcmstb_cpu_power_on(cpu);
-
-        brcmstb_cpu_boot(cpu);
-
-        /*
-         * now the secondary core is starting up let it run its
-         * calibrations, then wait for it to finish
-         */
-        spin_unlock(&boot_lock);
-
-        return 0;
-}
-
-static struct smp_operations brcmstb_smp_ops __initdata = {
-        .smp_prepare_cpus       = brcmstb_cpu_ctrl_setup,
-        .smp_secondary_init     = brcmstb_secondary_init,
-        .smp_boot_secondary     = brcmstb_boot_secondary,
-#ifdef CONFIG_HOTPLUG_CPU
-        .cpu_kill               = brcmstb_cpu_kill,
-        .cpu_die                = brcmstb_cpu_die,
-#endif
-};
-
-CPU_METHOD_OF_DECLARE(brcmstb_smp, "brcm,brahma-b15", &brcmstb_smp_ops);
diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c
index b2f8b60cf0e9..dc9a764a7c37 100644
--- a/arch/arm/mach-exynos/mcpm-exynos.c
+++ b/arch/arm/mach-exynos/mcpm-exynos.c
@@ -43,7 +43,6 @@
         "mcr    p15, 0, r0, c1, c0, 0   @ set SCTLR\n\t" \
         "isb\n\t"\
         "bl     v7_flush_dcache_"__stringify(level)"\n\t" \
-        "clrex\n\t"\
         "mrc    p15, 0, r0, c1, c0, 1   @ get ACTLR\n\t" \
         "bic    r0, r0, #(1 << 6)       @ disable local coherency\n\t" \
         /* Dummy Load of a device register to avoid Erratum 799270 */ \
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index e87f2a83d6bf..2d245c2e641c 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -142,7 +142,7 @@ __init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs,
         board_nand_data.nr_parts        = nr_parts;
         board_nand_data.devsize         = nand_type;
 
-        board_nand_data.ecc_opt = OMAP_ECC_HAM1_CODE_HW;
+        board_nand_data.ecc_opt = OMAP_ECC_HAM1_CODE_SW;
         gpmc_nand_init(&board_nand_data, gpmc_t);
 }
 #endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c
index 8897ad7035fd..cb7764314f17 100644
--- a/arch/arm/mach-omap2/gpmc-nand.c
+++ b/arch/arm/mach-omap2/gpmc-nand.c
@@ -49,7 +49,8 @@ static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
                 return 0;
 
         /* legacy platforms support only HAM1 (1-bit Hamming) ECC scheme */
-        if (ecc_opt == OMAP_ECC_HAM1_CODE_HW)
+        if (ecc_opt == OMAP_ECC_HAM1_CODE_HW ||
+            ecc_opt == OMAP_ECC_HAM1_CODE_SW)
                 return 1;
         else
                 return 0;
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 8bc13380f0a0..2f97228f188a 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -1207,8 +1207,7 @@ int gpmc_cs_program_settings(int cs, struct gpmc_settings *p)
                 }
         }
 
-        if ((p->wait_on_read || p->wait_on_write) &&
-            (p->wait_pin > gpmc_nr_waitpins)) {
+        if (p->wait_pin > gpmc_nr_waitpins) {
                 pr_err("%s: invalid wait-pin (%d)\n", __func__, p->wait_pin);
                 return -EINVAL;
         }
@@ -1288,8 +1287,8 @@ void gpmc_read_settings_dt(struct device_node *np, struct gpmc_settings *p)
                 p->wait_on_write = of_property_read_bool(np,
                                                          "gpmc,wait-on-write");
                 if (!p->wait_on_read && !p->wait_on_write)
-                        pr_warn("%s: read/write wait monitoring not enabled!\n",
-                                __func__);
+                        pr_debug("%s: rd/wr wait monitoring not enabled!\n",
+                                 __func__);
         }
 }
 
@@ -1403,8 +1402,11 @@ static int gpmc_probe_nand_child(struct platform_device *pdev,
                 pr_err("%s: ti,nand-ecc-opt not found\n", __func__);
                 return -ENODEV;
         }
-        if (!strcmp(s, "ham1") || !strcmp(s, "sw") ||
-                !strcmp(s, "hw") || !strcmp(s, "hw-romcode"))
+
+        if (!strcmp(s, "sw"))
+                gpmc_nand_data->ecc_opt = OMAP_ECC_HAM1_CODE_SW;
+        else if (!strcmp(s, "ham1") ||
+                 !strcmp(s, "hw") || !strcmp(s, "hw-romcode"))
                 gpmc_nand_data->ecc_opt =
                                 OMAP_ECC_HAM1_CODE_HW;
         else if (!strcmp(s, "bch4"))
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index d42022f2a71e..53841dea80ea 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -663,7 +663,7 @@ void __init dra7xxx_check_revision(void)
 
         default:
                 /* Unknown default to latest silicon rev as default*/
-                pr_warn("%s: unknown idcode=0x%08x (hawkeye=0x%08x,rev=0x%d)\n",
+                pr_warn("%s: unknown idcode=0x%08x (hawkeye=0x%08x,rev=0x%x)\n",
                         __func__, idcode, hawkeye, rev);
                 omap_revision = DRA752_REV_ES1_1;
         }
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index 01ef59def44b..d22c30d3ccfa 100644
--- a/arch/arm/mach-omap2/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -56,7 +56,7 @@ static void _add_clkdev(struct omap_device *od, const char *clk_alias,
 
         r = clk_get_sys(dev_name(&od->pdev->dev), clk_alias);
         if (!IS_ERR(r)) {
-                dev_warn(&od->pdev->dev,
+                dev_dbg(&od->pdev->dev,
                          "alias %s already exists\n", clk_alias);
                 clk_put(r);
                 return;
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 6c074f37cdd2..8fd87a3055bf 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2185,6 +2185,8 @@ static int _enable(struct omap_hwmod *oh)
                          oh->mux->pads_dynamic))) {
                 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
                 _reconfigure_io_chain();
+        } else if (oh->flags & HWMOD_FORCE_MSTANDBY) {
+                _reconfigure_io_chain();
         }
 
         _add_initiator_dep(oh, mpu_oh);
@@ -2291,6 +2293,8 @@ static int _idle(struct omap_hwmod *oh)
         if (oh->mux && oh->mux->pads_dynamic) {
                 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
                 _reconfigure_io_chain();
+        } else if (oh->flags & HWMOD_FORCE_MSTANDBY) {
+                _reconfigure_io_chain();
         }
 
         oh->_state = _HWMOD_STATE_IDLE;
@@ -3345,6 +3349,9 @@ int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
         if (!ois)
                 return 0;
 
+        if (ois[0] == NULL) /* Empty list */
+                return 0;
+
         if (!linkspace) {
                 if (_alloc_linkspace(ois)) {
                         pr_err("omap_hwmod: could not allocate link space\n");
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 2757abf87fbc..5684f112654b 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -35,6 +35,7 @@
 #include "i2c.h"
 #include "mmc.h"
 #include "wd_timer.h"
+#include "soc.h"
 
 /* Base offset for all DRA7XX interrupts external to MPUSS */
 #define DRA7XX_IRQ_GIC_START    32
@@ -3261,7 +3262,6 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
         &dra7xx_l4_per3__usb_otg_ss1,
         &dra7xx_l4_per3__usb_otg_ss2,
         &dra7xx_l4_per3__usb_otg_ss3,
-        &dra7xx_l4_per3__usb_otg_ss4,
         &dra7xx_l3_main_1__vcp1,
         &dra7xx_l4_per2__vcp1,
         &dra7xx_l3_main_1__vcp2,
@@ -3270,8 +3270,26 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
         NULL,
 };
 
+static struct omap_hwmod_ocp_if *dra74x_hwmod_ocp_ifs[] __initdata = {
+        &dra7xx_l4_per3__usb_otg_ss4,
+        NULL,
+};
+
+static struct omap_hwmod_ocp_if *dra72x_hwmod_ocp_ifs[] __initdata = {
+        NULL,
+};
+
 int __init dra7xx_hwmod_init(void)
 {
+        int ret;
+
         omap_hwmod_init();
-        return omap_hwmod_register_links(dra7xx_hwmod_ocp_ifs);
+        ret = omap_hwmod_register_links(dra7xx_hwmod_ocp_ifs);
+
+        if (!ret && soc_is_dra74x())
+                return omap_hwmod_register_links(dra74x_hwmod_ocp_ifs);
+        else if (!ret && soc_is_dra72x())
+                return omap_hwmod_register_links(dra72x_hwmod_ocp_ifs);
+
+        return ret;
 }
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index 01ca8086fb6c..4376f59626d1 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -245,6 +245,8 @@ IS_AM_SUBCLASS(437x, 0x437)
 #define soc_is_omap54xx()               0
 #define soc_is_omap543x()               0
 #define soc_is_dra7xx()                 0
+#define soc_is_dra74x()                 0
+#define soc_is_dra72x()                 0
 
 #if defined(MULTI_OMAP2)
 # if defined(CONFIG_ARCH_OMAP2)
@@ -393,7 +395,11 @@ IS_OMAP_TYPE(3430, 0x3430)
 
 #if defined(CONFIG_SOC_DRA7XX)
 #undef soc_is_dra7xx
+#undef soc_is_dra74x
+#undef soc_is_dra72x
 #define soc_is_dra7xx() (of_machine_is_compatible("ti,dra7"))
+#define soc_is_dra74x() (of_machine_is_compatible("ti,dra74"))
+#define soc_is_dra72x() (of_machine_is_compatible("ti,dra72"))
 #endif
 
 /* Various silicon revisions for omap2 */
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index 17435c1aa2fe..126ddafad526 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -183,8 +183,8 @@ enum {
 
 static struct clk div4_clks[DIV4_NR] = {
         [DIV4_SDH] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 8, 0x0dff, CLK_ENABLE_ON_INIT),
-        [DIV4_SD0] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 4, 0x1de0, CLK_ENABLE_ON_INIT),
-        [DIV4_SD1] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 0, 0x1de0, CLK_ENABLE_ON_INIT),
+        [DIV4_SD0] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 4, 0x1df0, CLK_ENABLE_ON_INIT),
+        [DIV4_SD1] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 0, 0x1df0, CLK_ENABLE_ON_INIT),
 };
 
 /* DIV6 clocks */
diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
index 10e193d707f5..453b23129cfa 100644
--- a/arch/arm/mach-shmobile/clock-r8a7791.c
+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
@@ -152,7 +152,7 @@ enum {
 
 static struct clk div4_clks[DIV4_NR] = {
         [DIV4_SDH] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 8, 0x0dff, CLK_ENABLE_ON_INIT),
-        [DIV4_SD0] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 4, 0x1de0, CLK_ENABLE_ON_INIT),
+        [DIV4_SD0] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 4, 0x1df0, CLK_ENABLE_ON_INIT),
 };
 
 /* DIV6 clocks */
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index d8c4048b9e33..02a6f45a0b9e 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -644,7 +644,7 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
         CLKDEV_DEV_ID("e6cb0000.serial", &mstp_clks[MSTP207]), /* SCIFA5 */
         CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */
-        CLKDEV_DEV_ID("0xe6c3000.serial", &mstp_clks[MSTP206]), /* SCIFB */
+        CLKDEV_DEV_ID("e6c3000.serial", &mstp_clks[MSTP206]), /* SCIFB */
         CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
         CLKDEV_DEV_ID("e6c40000.serial", &mstp_clks[MSTP204]), /* SCIFA0 */
         CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */
diff --git a/arch/arm/mach-vexpress/spc.c b/arch/arm/mach-vexpress/spc.c
index 2c2754e79cb3..f61158c6ce71 100644
--- a/arch/arm/mach-vexpress/spc.c
+++ b/arch/arm/mach-vexpress/spc.c
@@ -426,9 +426,15 @@ static int ve_spc_populate_opps(uint32_t cluster)
 
 static int ve_init_opp_table(struct device *cpu_dev)
 {
-        int cluster = topology_physical_package_id(cpu_dev->id);
-        int idx, ret = 0, max_opp = info->num_opps[cluster];
-        struct ve_spc_opp *opps = info->opps[cluster];
+        int cluster;
+        int idx, ret = 0, max_opp;
+        struct ve_spc_opp *opps;
+
+        cluster = topology_physical_package_id(cpu_dev->id);
+        cluster = cluster < 0 ? 0 : cluster;
+
+        max_opp = info->num_opps[cluster];
+        opps = info->opps[cluster];
 
         for (idx = 0; idx < max_opp; idx++, opps++) {
                 ret = dev_pm_opp_add(cpu_dev, opps->freq * 1000, opps->u_volt);
@@ -537,6 +543,8 @@ static struct clk *ve_spc_clk_register(struct device *cpu_dev)
         spc->hw.init = &init;
         spc->cluster = topology_physical_package_id(cpu_dev->id);
 
+        spc->cluster = spc->cluster < 0 ? 0 : spc->cluster;
+
         init.name = dev_name(cpu_dev);
         init.ops = &clk_spc_ops;
         init.flags = CLK_IS_ROOT | CLK_GET_RATE_NOCACHE;
diff --git a/arch/arm/mm/abort-ev6.S b/arch/arm/mm/abort-ev6.S
index 3815a8262af0..8c48c5c22a33 100644
--- a/arch/arm/mm/abort-ev6.S
+++ b/arch/arm/mm/abort-ev6.S
@@ -17,12 +17,6 @@
  */
         .align  5
 ENTRY(v6_early_abort)
-#ifdef CONFIG_CPU_V6
-        sub     r1, sp, #4                      @ Get unused stack location
-        strex   r0, r1, [r1]                    @ Clear the exclusive monitor
-#elif defined(CONFIG_CPU_32v6K)
-        clrex
-#endif
         mrc     p15, 0, r1, c5, c0, 0           @ get FSR
         mrc     p15, 0, r0, c6, c0, 0           @ get FAR
 /*
diff --git a/arch/arm/mm/abort-ev7.S b/arch/arm/mm/abort-ev7.S
index 703375277ba6..4812ad054214 100644
--- a/arch/arm/mm/abort-ev7.S
+++ b/arch/arm/mm/abort-ev7.S
@@ -13,12 +13,6 @@
  */
         .align  5
 ENTRY(v7_early_abort)
-        /*
-         * The effect of data aborts on on the exclusive access monitor are
-         * UNPREDICTABLE. Do a CLREX to clear the state
-         */
-        clrex
-
         mrc     p15, 0, r1, c5, c0, 0           @ get FSR
         mrc     p15, 0, r0, c6, c0, 0           @ get FAR
 
diff --git a/arch/arm/xen/Makefile b/arch/arm/xen/Makefile
index 12969523414c..1f85bfe6b470 100644
--- a/arch/arm/xen/Makefile
+++ b/arch/arm/xen/Makefile
@@ -1 +1 @@
-obj-y           := enlighten.o hypercall.o grant-table.o p2m.o mm.o
+obj-y           := enlighten.o hypercall.o grant-table.o p2m.o mm.o mm32.o
diff --git a/arch/arm/xen/enlighten.c b/arch/arm/xen/enlighten.c
index 98544c5f86e9..0e15f011f9c8 100644
--- a/arch/arm/xen/enlighten.c
+++ b/arch/arm/xen/enlighten.c
@@ -260,6 +260,12 @@ static int __init xen_guest_init(void)
         xen_domain_type = XEN_HVM_DOMAIN;
 
         xen_setup_features();
+
+        if (!xen_feature(XENFEAT_grant_map_identity)) {
+                pr_warn("Please upgrade your Xen.\n"
+                                "If your platform has any non-coherent DMA devices, they won't work properly.\n");
+        }
+
         if (xen_feature(XENFEAT_dom0))
                 xen_start_info->flags |= SIF_INITDOMAIN|SIF_PRIVILEGED;
         else
diff --git a/arch/arm/xen/mm32.c b/arch/arm/xen/mm32.c
new file mode 100644
index 000000000000..3b99860fd7ae
--- /dev/null
+++ b/arch/arm/xen/mm32.c
@@ -0,0 +1,202 @@
+#include <linux/cpu.h>
+#include <linux/dma-mapping.h>
+#include <linux/gfp.h>
+#include <linux/highmem.h>
+
+#include <xen/features.h>
+
+static DEFINE_PER_CPU(unsigned long, xen_mm32_scratch_virt);
+static DEFINE_PER_CPU(pte_t *, xen_mm32_scratch_ptep);
+
+static int alloc_xen_mm32_scratch_page(int cpu)
+{
+        struct page *page;
+        unsigned long virt;
+        pmd_t *pmdp;
+        pte_t *ptep;
+
+        if (per_cpu(xen_mm32_scratch_ptep, cpu) != NULL)
+                return 0;
+
+        page = alloc_page(GFP_KERNEL);
+        if (page == NULL) {
+                pr_warn("Failed to allocate xen_mm32_scratch_page for cpu %d\n", cpu);
+                return -ENOMEM;
+        }
+
+        virt = (unsigned long)__va(page_to_phys(page));
+        pmdp = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt);
+        ptep = pte_offset_kernel(pmdp, virt);
+
+        per_cpu(xen_mm32_scratch_virt, cpu) = virt;
+        per_cpu(xen_mm32_scratch_ptep, cpu) = ptep;
+
+        return 0;
+}
+
+static int xen_mm32_cpu_notify(struct notifier_block *self,
+                                    unsigned long action, void *hcpu)
+{
+        int cpu = (long)hcpu;
+        switch (action) {
+        case CPU_UP_PREPARE:
+                if (alloc_xen_mm32_scratch_page(cpu))
+                        return NOTIFY_BAD;
+                break;
+        default:
+                break;
+        }
+        return NOTIFY_OK;
+}
+
+static struct notifier_block xen_mm32_cpu_notifier = {
+        .notifier_call  = xen_mm32_cpu_notify,
+};
+
+static void* xen_mm32_remap_page(dma_addr_t handle)
+{
+        unsigned long virt = get_cpu_var(xen_mm32_scratch_virt);
+        pte_t *ptep = __get_cpu_var(xen_mm32_scratch_ptep);
+
+        *ptep = pfn_pte(handle >> PAGE_SHIFT, PAGE_KERNEL);
+        local_flush_tlb_kernel_page(virt);
+
+        return (void*)virt;
+}
+
+static void xen_mm32_unmap(void *vaddr)
+{
+        put_cpu_var(xen_mm32_scratch_virt);
+}
+
+
+/* functions called by SWIOTLB */
+
+static void dma_cache_maint(dma_addr_t handle, unsigned long offset,
+        size_t size, enum dma_data_direction dir,
+        void (*op)(const void *, size_t, int))
+{
+        unsigned long pfn;
+        size_t left = size;
+
+        pfn = (handle >> PAGE_SHIFT) + offset / PAGE_SIZE;
+        offset %= PAGE_SIZE;
+
+        do {
+                size_t len = left;
+                void *vaddr;
+        
+                if (!pfn_valid(pfn))
+                {
+                        /* Cannot map the page, we don't know its physical address.
+                         * Return and hope for the best */
+                        if (!xen_feature(XENFEAT_grant_map_identity))
+                                return;
+                        vaddr = xen_mm32_remap_page(handle) + offset;
+                        op(vaddr, len, dir);
+                        xen_mm32_unmap(vaddr - offset);
+                } else {
+                        struct page *page = pfn_to_page(pfn);
+
+                        if (PageHighMem(page)) {
+                                if (len + offset > PAGE_SIZE)
+                                        len = PAGE_SIZE - offset;
+
+                                if (cache_is_vipt_nonaliasing()) {
+                                        vaddr = kmap_atomic(page);
+                                        op(vaddr + offset, len, dir);
+                                        kunmap_atomic(vaddr);
+                                } else {
+                                        vaddr = kmap_high_get(page);
+                                        if (vaddr) {
+                                                op(vaddr + offset, len, dir);
+                                                kunmap_high(page);
+                                        }
+                                }
+                        } else {
+                                vaddr = page_address(page) + offset;
+                                op(vaddr, len, dir);
+                        }
+                }
+
+                offset = 0;
+                pfn++;
+                left -= len;
+        } while (left);
+}
+
+static void __xen_dma_page_dev_to_cpu(struct device *hwdev, dma_addr_t handle,
+                size_t size, enum dma_data_direction dir)
+{
+        /* Cannot use __dma_page_dev_to_cpu because we don't have a
+         * struct page for handle */
+
+        if (dir != DMA_TO_DEVICE)
+                outer_inv_range(handle, handle + size);
+
+        dma_cache_maint(handle & PAGE_MASK, handle & ~PAGE_MASK, size, dir, dmac_unmap_area);
+}
+
+static void __xen_dma_page_cpu_to_dev(struct device *hwdev, dma_addr_t handle,
+                size_t size, enum dma_data_direction dir)
+{
+
+        dma_cache_maint(handle & PAGE_MASK, handle & ~PAGE_MASK, size, dir, dmac_map_area);
+
+        if (dir == DMA_FROM_DEVICE) {
+                outer_inv_range(handle, handle + size);
+        } else {
+                outer_clean_range(handle, handle + size);
+        }
+}
+
+void xen_dma_unmap_page(struct device *hwdev, dma_addr_t handle,
+                size_t size, enum dma_data_direction dir,
+                struct dma_attrs *attrs)
+
+{
+        if (!__generic_dma_ops(hwdev)->unmap_page)
+                return;
+        if (dma_get_attr(DMA_ATTR_SKIP_CPU_SYNC, attrs))
+                return;
+
+        __xen_dma_page_dev_to_cpu(hwdev, handle, size, dir);
+}
+
+void xen_dma_sync_single_for_cpu(struct device *hwdev,
+                dma_addr_t handle, size_t size, enum dma_data_direction dir)
+{
+        if (!__generic_dma_ops(hwdev)->sync_single_for_cpu)
+                return;
+        __xen_dma_page_dev_to_cpu(hwdev, handle, size, dir);
+}
+
+void xen_dma_sync_single_for_device(struct device *hwdev,
+                dma_addr_t handle, size_t size, enum dma_data_direction dir)
+{
+        if (!__generic_dma_ops(hwdev)->sync_single_for_device)
+                return;
+        __xen_dma_page_cpu_to_dev(hwdev, handle, size, dir);
+}
+
+int __init xen_mm32_init(void)
+{
+        int cpu;
+
+        if (!xen_initial_domain())
+                return 0;
+
+        register_cpu_notifier(&xen_mm32_cpu_notifier);
+        get_online_cpus();
+        for_each_online_cpu(cpu) {
+                if (alloc_xen_mm32_scratch_page(cpu)) {
+                        put_online_cpus();
+                        unregister_cpu_notifier(&xen_mm32_cpu_notifier);
+                        return -ENOMEM;
+                }
+        }
+        put_online_cpus();
+
+        return 0;
+}
+arch_initcall(xen_mm32_init);
diff --git a/arch/arm/xen/p2m.c b/arch/arm/xen/p2m.c
index 97baf4427817..054857776254 100644
--- a/arch/arm/xen/p2m.c
+++ b/arch/arm/xen/p2m.c
@@ -21,14 +21,12 @@ struct xen_p2m_entry {
         unsigned long pfn;
         unsigned long mfn;
         unsigned long nr_pages;
-        struct rb_node rbnode_mach;
         struct rb_node rbnode_phys;
 };
 
 static rwlock_t p2m_lock;
 struct rb_root phys_to_mach = RB_ROOT;
 EXPORT_SYMBOL_GPL(phys_to_mach);
-static struct rb_root mach_to_phys = RB_ROOT;
 
 static int xen_add_phys_to_mach_entry(struct xen_p2m_entry *new)
 {
@@ -41,8 +39,6 @@ static int xen_add_phys_to_mach_entry(struct xen_p2m_entry *new)
                 parent = *link;
                 entry = rb_entry(parent, struct xen_p2m_entry, rbnode_phys);
 
-                if (new->mfn == entry->mfn)
-                        goto err_out;
                 if (new->pfn == entry->pfn)
                         goto err_out;
 
@@ -88,64 +84,6 @@ unsigned long __pfn_to_mfn(unsigned long pfn)
 }
 EXPORT_SYMBOL_GPL(__pfn_to_mfn);
 
-static int xen_add_mach_to_phys_entry(struct xen_p2m_entry *new)
-{
-        struct rb_node **link = &mach_to_phys.rb_node;
-        struct rb_node *parent = NULL;
-        struct xen_p2m_entry *entry;
-        int rc = 0;
-
-        while (*link) {
-                parent = *link;
-                entry = rb_entry(parent, struct xen_p2m_entry, rbnode_mach);
-
-                if (new->mfn == entry->mfn)
-                        goto err_out;
-                if (new->pfn == entry->pfn)
-                        goto err_out;
-
-                if (new->mfn < entry->mfn)
-                        link = &(*link)->rb_left;
-                else
-                        link = &(*link)->rb_right;
-        }
-        rb_link_node(&new->rbnode_mach, parent, link);
-        rb_insert_color(&new->rbnode_mach, &mach_to_phys);
-        goto out;
-
-err_out:
-        rc = -EINVAL;
-        pr_warn("%s: cannot add pfn=%pa -> mfn=%pa: pfn=%pa -> mfn=%pa already exists\n",
-                        __func__, &new->pfn, &new->mfn, &entry->pfn, &entry->mfn);
-out:
-        return rc;
-}
-
-unsigned long __mfn_to_pfn(unsigned long mfn)
-{
-        struct rb_node *n = mach_to_phys.rb_node;
-        struct xen_p2m_entry *entry;
-        unsigned long irqflags;
-
-        read_lock_irqsave(&p2m_lock, irqflags);
-        while (n) {
-                entry = rb_entry(n, struct xen_p2m_entry, rbnode_mach);
-                if (entry->mfn <= mfn &&
-                                entry->mfn + entry->nr_pages > mfn) {
-                        read_unlock_irqrestore(&p2m_lock, irqflags);
-                        return entry->pfn + (mfn - entry->mfn);
-                }
-                if (mfn < entry->mfn)
-                        n = n->rb_left;
-                else
-                        n = n->rb_right;
-        }
-        read_unlock_irqrestore(&p2m_lock, irqflags);
-
-        return INVALID_P2M_ENTRY;
-}
-EXPORT_SYMBOL_GPL(__mfn_to_pfn);
-
 int set_foreign_p2m_mapping(struct gnttab_map_grant_ref *map_ops,
                             struct gnttab_map_grant_ref *kmap_ops,
                             struct page **pages, unsigned int count)
@@ -192,7 +130,6 @@ bool __set_phys_to_machine_multi(unsigned long pfn,
                         p2m_entry = rb_entry(n, struct xen_p2m_entry, rbnode_phys);
                         if (p2m_entry->pfn <= pfn &&
                                         p2m_entry->pfn + p2m_entry->nr_pages > pfn) {
-                                rb_erase(&p2m_entry->rbnode_mach, &mach_to_phys);
                                 rb_erase(&p2m_entry->rbnode_phys, &phys_to_mach);
                                 write_unlock_irqrestore(&p2m_lock, irqflags);
                                 kfree(p2m_entry);
@@ -217,8 +154,7 @@ bool __set_phys_to_machine_multi(unsigned long pfn,
         p2m_entry->mfn = mfn;
 
         write_lock_irqsave(&p2m_lock, irqflags);
-        if ((rc = xen_add_phys_to_mach_entry(p2m_entry) < 0) ||
-                (rc = xen_add_mach_to_phys_entry(p2m_entry) < 0)) {
+        if ((rc = xen_add_phys_to_mach_entry(p2m_entry)) < 0) {
                 write_unlock_irqrestore(&p2m_lock, irqflags);
                 return false;
         }