216 files changed, 2362 insertions, 4159 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 32e215fd91ec..7af7d1368942 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -15,6 +15,7 @@ config ARM
        select GENERIC_IRQ_SHOW
        select GENERIC_PCI_IOMAP
        select GENERIC_SMP_IDLE_THREAD
+        select GENERIC_IDLE_POLL_SETUP
        select GENERIC_STRNCPY_FROM_USER
        select GENERIC_STRNLEN_USER
        select HARDIRQS_SW_RESEND
@@ -544,6 +545,8 @@ config ARCH_IXP4XX
        select GENERIC_CLOCKEVENTS
        select MIGHT_HAVE_PCI
        select NEED_MACH_IO_H
+        select USB_EHCI_BIG_ENDIAN_MMIO
+        select USB_EHCI_BIG_ENDIAN_DESC
        help
          Support for Intel's IXP4XX (XScale) family of processors.
@@ -2153,33 +2156,8 @@ endmenu
 menu "CPU Power Management"
 if ARCH_HAS_CPUFREQ
 source "drivers/cpufreq/Kconfig"
-config CPU_FREQ_SA1100
-        bool
-config CPU_FREQ_SA1110
-        bool
-config CPU_FREQ_INTEGRATOR
-        tristate "CPUfreq driver for ARM Integrator CPUs"
-        depends on ARCH_INTEGRATOR && CPU_FREQ
-        default y
-        help
-          This enables the CPUfreq driver for ARM Integrator CPUs.
-          For details, take a look at <file:Documentation/cpu-freq>.
-          If in doubt, say Y.
-config CPU_FREQ_PXA
-        bool
-        depends on CPU_FREQ && ARCH_PXA && PXA25x
-        default y
-        select CPU_FREQ_DEFAULT_GOV_USERSPACE
-        select CPU_FREQ_TABLE
 config CPU_FREQ_S3C
        bool
        help
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 0957645b73af..91fe4f148f80 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -349,7 +349,7 @@
                        rx_descs = <64>;
                        mac_control = <0x20>;
                        slaves = <2>;
-                        cpts_active_slave = <0>;
+                        active_slave = <0>;
                        cpts_clock_mult = <0x80000000>;
                        cpts_clock_shift = <29>;
                        reg = <0x4a100000 0x800
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index cb7bcc51608d..39253b9aedd1 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -322,6 +322,24 @@
                                        };
                                };
+                                spi0 {
+                                        pinctrl_spi0: spi0-0 {
+                                                atmel,pins =
+                                                        <0 0 0x1 0x0    /* PA0 periph A SPI0_MISO pin */
+                                                         0 1 0x1 0x0    /* PA1 periph A SPI0_MOSI pin */
+                                                         0 2 0x1 0x0>;  /* PA2 periph A SPI0_SPCK pin */
+                                        };
+                                };
+                                spi1 {
+                                        pinctrl_spi1: spi1-0 {
+                                                atmel,pins =
+                                                        <1 0 0x1 0x0    /* PB0 periph A SPI1_MISO pin */
+                                                         1 1 0x1 0x0    /* PB1 periph A SPI1_MOSI pin */
+                                                         1 2 0x1 0x0>;  /* PB2 periph A SPI1_SPCK pin */
+                                        };
+                                };
                                pioA: gpio@fffff400 {
                                        compatible = "atmel,at91rm9200-gpio";
                                        reg = <0xfffff400 0x200>;
@@ -471,6 +489,28 @@
                                status = "disabled";
                        };
+                        spi0: spi@fffc8000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "atmel,at91rm9200-spi";
+                                reg = <0xfffc8000 0x200>;
+                                interrupts = <12 4 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_spi0>;
+                                status = "disabled";
+                        };
+                        spi1: spi@fffcc000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "atmel,at91rm9200-spi";
+                                reg = <0xfffcc000 0x200>;
+                                interrupts = <13 4 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_spi1>;
+                                status = "disabled";
+                        };
                        adc0: adc@fffe0000 {
                                compatible = "atmel,at91sam9260-adc";
                                reg = <0xfffe0000 0x100>;
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 271d4de026e9..94b58ab2cc08 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -303,6 +303,24 @@
                                        };
                                };
+                                spi0 {
+                                        pinctrl_spi0: spi0-0 {
+                                                atmel,pins =
+                                                        <0 0 0x2 0x0    /* PA0 periph B SPI0_MISO pin */
+                                                         0 1 0x2 0x0    /* PA1 periph B SPI0_MOSI pin */
+                                                         0 2 0x2 0x0>;  /* PA2 periph B SPI0_SPCK pin */
+                                        };
+                                };
+                                spi1 {
+                                        pinctrl_spi1: spi1-0 {
+                                                atmel,pins =
+                                                        <1 12 0x1 0x0   /* PB12 periph A SPI1_MISO pin */
+                                                         1 13 0x1 0x0   /* PB13 periph A SPI1_MOSI pin */
+                                                         1 14 0x1 0x0>; /* PB14 periph A SPI1_SPCK pin */
+                                        };
+                                };
                                pioA: gpio@fffff200 {
                                        compatible = "atmel,at91rm9200-gpio";
                                        reg = <0xfffff200 0x200>;
@@ -462,6 +480,28 @@
                                reg = <0xfffffd40 0x10>;
                                status = "disabled";
                        };
+                        spi0: spi@fffa4000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "atmel,at91rm9200-spi";
+                                reg = <0xfffa4000 0x200>;
+                                interrupts = <14 4 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_spi0>;
+                                status = "disabled";
+                        };
+                        spi1: spi@fffa8000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "atmel,at91rm9200-spi";
+                                reg = <0xfffa8000 0x200>;
+                                interrupts = <15 4 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_spi1>;
+                                status = "disabled";
+                        };
                };
                nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9263ek.dts b/arch/arm/boot/dts/at91sam9263ek.dts
index 1eb08728f527..a14e424b2e81 100644
--- a/arch/arm/boot/dts/at91sam9263ek.dts
+++ b/arch/arm/boot/dts/at91sam9263ek.dts
@@ -79,6 +79,16 @@
                                        };
                                };
                        };
+                        spi0: spi@fffa4000 {
+                                status = "okay";
+                                cs-gpios = <&pioA 5 0>, <0>, <0>, <0>;
+                                mtd_dataflash@0 {
+                                        compatible = "atmel,at45", "atmel,dataflash";
+                                        spi-max-frequency = <50000000>;
+                                        reg = <0>;
+                                };
+                        };
                };
                nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
index da15e83e7f17..23d1f468f27f 100644
--- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
@@ -96,6 +96,16 @@
                                status = "okay";
                                pinctrl-0 = <&pinctrl_ssc0_tx>;
                        };
+                        spi0: spi@fffc8000 {
+                                status = "okay";
+                                cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
+                                mtd_dataflash@0 {
+                                        compatible = "atmel,at45", "atmel,dataflash";
+                                        spi-max-frequency = <50000000>;
+                                        reg = <1>;
+                                };
+                        };
                };
                nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 6b1d4cab24c2..cfdf429578b5 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -322,6 +322,24 @@
                                        };
                                };
+                                spi0 {
+                                        pinctrl_spi0: spi0-0 {
+                                                atmel,pins =
+                                                        <1 0 0x1 0x0    /* PB0 periph A SPI0_MISO pin */
+                                                         1 1 0x1 0x0    /* PB1 periph A SPI0_MOSI pin */
+                                                         1 2 0x1 0x0>;  /* PB2 periph A SPI0_SPCK pin */
+                                        };
+                                };
+                                spi1 {
+                                        pinctrl_spi1: spi1-0 {
+                                                atmel,pins =
+                                                        <1 14 0x1 0x0   /* PB14 periph A SPI1_MISO pin */
+                                                         1 15 0x1 0x0   /* PB15 periph A SPI1_MOSI pin */
+                                                         1 16 0x1 0x0>; /* PB16 periph A SPI1_SPCK pin */
+                                        };
+                                };
                                pioA: gpio@fffff200 {
                                        compatible = "atmel,at91rm9200-gpio";
                                        reg = <0xfffff200 0x200>;
@@ -531,6 +549,28 @@
                                reg = <0xfffffd40 0x10>;
                                status = "disabled";
                        };
+                        spi0: spi@fffa4000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "atmel,at91rm9200-spi";
+                                reg = <0xfffa4000 0x200>;
+                                interrupts = <14 4 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_spi0>;
+                                status = "disabled";
+                        };
+                        spi1: spi@fffa8000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "atmel,at91rm9200-spi";
+                                reg = <0xfffa8000 0x200>;
+                                interrupts = <15 4 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_spi1>;
+                                status = "disabled";
+                        };
                };
                nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index 20c31913c270..92c52a7d70bc 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -102,6 +102,16 @@
                                        };
                                };
                        };
+                        spi0: spi@fffa4000{
+                                status = "okay";
+                                cs-gpios = <&pioB 3 0>, <0>, <0>, <0>;
+                                mtd_dataflash@0 {
+                                        compatible = "atmel,at45", "atmel,dataflash";
+                                        spi-max-frequency = <13000000>;
+                                        reg = <0>;
+                                };
+                        };
                };
                nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 7750f98dd764..b2961f1ea51b 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -261,6 +261,24 @@
                                        };
                                };
+                                spi0 {
+                                        pinctrl_spi0: spi0-0 {
+                                                atmel,pins =
+                                                        <0 11 0x1 0x0   /* PA11 periph A SPI0_MISO pin */
+                                                         0 12 0x1 0x0   /* PA12 periph A SPI0_MOSI pin */
+                                                         0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */
+                                        };
+                                };
+                                spi1 {
+                                        pinctrl_spi1: spi1-0 {
+                                                atmel,pins =
+                                                        <0 21 0x2 0x0   /* PA21 periph B SPI1_MISO pin */
+                                                         0 22 0x2 0x0   /* PA22 periph B SPI1_MOSI pin */
+                                                         0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */
+                                        };
+                                };
                                pioA: gpio@fffff400 {
                                        compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
                                        reg = <0xfffff400 0x200>;
@@ -373,6 +391,28 @@
                                #size-cells = <0>;
                                status = "disabled";
                        };
+                        spi0: spi@f0000000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "atmel,at91rm9200-spi";
+                                reg = <0xf0000000 0x100>;
+                                interrupts = <13 4 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_spi0>;
+                                status = "disabled";
+                        };
+                        spi1: spi@f0004000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "atmel,at91rm9200-spi";
+                                reg = <0xf0004000 0x100>;
+                                interrupts = <14 4 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_spi1>;
+                                status = "disabled";
+                        };
                };
                nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts
index d400f8de4387..34c842b1efb2 100644
--- a/arch/arm/boot/dts/at91sam9n12ek.dts
+++ b/arch/arm/boot/dts/at91sam9n12ek.dts
@@ -67,6 +67,16 @@
                                        };
                                };
                        };
+                        spi0: spi@f0000000 {
+                                status = "okay";
+                                cs-gpios = <&pioA 14 0>, <0>, <0>, <0>;
+                                m25p80@0 {
+                                        compatible = "atmel,at25df321a";
+                                        spi-max-frequency = <50000000>;
+                                        reg = <0>;
+                                };
+                        };
                };
                nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index a98c0d50fbbe..347b438d47fa 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -343,6 +343,24 @@
                                        };
                                };
+                                spi0 {
+                                        pinctrl_spi0: spi0-0 {
+                                                atmel,pins =
+                                                        <0 11 0x1 0x0   /* PA11 periph A SPI0_MISO pin */
+                                                         0 12 0x1 0x0   /* PA12 periph A SPI0_MOSI pin */
+                                                         0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */
+                                        };
+                                };
+                                spi1 {
+                                        pinctrl_spi1: spi1-0 {
+                                                atmel,pins =
+                                                        <0 21 0x2 0x0   /* PA21 periph B SPI1_MISO pin */
+                                                         0 22 0x2 0x0   /* PA22 periph B SPI1_MOSI pin */
+                                                         0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */
+                                        };
+                                };
                                pioA: gpio@fffff400 {
                                        compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
                                        reg = <0xfffff400 0x200>;
@@ -529,6 +547,28 @@
                                        trigger-value = <0x6>;
                                };
                        };
+                        spi0: spi@f0000000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "atmel,at91rm9200-spi";
+                                reg = <0xf0000000 0x100>;
+                                interrupts = <13 4 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_spi0>;
+                                status = "disabled";
+                        };
+                        spi1: spi@f0004000 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "atmel,at91rm9200-spi";
+                                reg = <0xf0004000 0x100>;
+                                interrupts = <14 4 3>;
+                                pinctrl-names = "default";
+                                pinctrl-0 = <&pinctrl_spi1>;
+                                status = "disabled";
+                        };
                };
                nand0: nand@40000000 {
diff --git a/arch/arm/boot/dts/at91sam9x5ek.dtsi b/arch/arm/boot/dts/at91sam9x5ek.dtsi
index 8a7cf1d9cf5d..09f5e667ca7a 100644
--- a/arch/arm/boot/dts/at91sam9x5ek.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5ek.dtsi
@@ -84,6 +84,16 @@
                                        };
                                };
                        };
+                        spi0: spi@f0000000 {
+                                status = "okay";
+                                cs-gpios = <&pioA 14 0>, <0>, <0>, <0>;
+                                m25p80@0 {
+                                        compatible = "atmel,at25df321a";
+                                        spi-max-frequency = <50000000>;
+                                        reg = <0>;
+                                };
+                        };
                };
                usb0: ohci@00600000 {
diff --git a/arch/arm/boot/dts/dbx5x0.dtsi b/arch/arm/boot/dts/dbx5x0.dtsi
index aaa63d0a8096..b6bc4ff17f26 100644
--- a/arch/arm/boot/dts/dbx5x0.dtsi
+++ b/arch/arm/boot/dts/dbx5x0.dtsi
@@ -191,7 +191,7 @@
                prcmu: prcmu@80157000 {
                        compatible = "stericsson,db8500-prcmu";
-                        reg = <0x80157000 0x1000>, <0x801b0000 0x8000>, <0x801b8000 0x1000>;
+                        reg = <0x80157000 0x2000>, <0x801b0000 0x8000>, <0x801b8000 0x1000>;
                        reg-names = "prcmu", "prcmu-tcpm", "prcmu-tcdm";
                        interrupts = <0 47 0x4>;
                        #address-cells = <1>;
@@ -674,10 +674,13 @@
                        compatible = "regulator-gpio";
                        regulator-min-microvolt = <1800000>;
-                        regulator-max-microvolt = <2600000>;
+                        regulator-max-microvolt = <2900000>;
                        regulator-name = "mmci-reg";
                        regulator-type = "voltage";
+                        startup-delay-us = <100>;
+                        enable-active-high;
                        states = <1800000 0x1
                                  2900000 0x0>;
diff --git a/arch/arm/boot/dts/href.dtsi b/arch/arm/boot/dts/href.dtsi
index 379128eb9d98..c0bc426952ea 100644
--- a/arch/arm/boot/dts/href.dtsi
+++ b/arch/arm/boot/dts/href.dtsi
@@ -87,6 +87,7 @@
                        mmc-cap-sd-highspeed;
                        mmc-cap-mmc-highspeed;
                        vmmc-supply = <&ab8500_ldo_aux3_reg>;
+                        vqmmc-supply = <&vmmci>;
                        cd-gpios  = <&tc3589x_gpio 3 0x4>;
diff --git a/arch/arm/boot/dts/hrefprev60.dts b/arch/arm/boot/dts/hrefprev60.dts
index eec29c4a86dc..c2d274815923 100644
--- a/arch/arm/boot/dts/hrefprev60.dts
+++ b/arch/arm/boot/dts/hrefprev60.dts
@@ -25,6 +25,14 @@
        };
        soc-u9500 {
+                prcmu@80157000 {
+                        ab8500@5 {
+                                ab8500-gpio {
+                                        compatible = "stericsson,ab8500-gpio";
+                                };
+                        };
+                };
                i2c@80004000 {
                        tps61052@33 {
                                compatible = "tps61052";
@@ -40,7 +48,7 @@
                vmmci: regulator-gpio {
                        gpios = <&tc3589x_gpio 18 0x4>;
-                        gpio-enable = <&tc3589x_gpio 17 0x4>;
+                        enable-gpio = <&tc3589x_gpio 17 0x4>;
                        status = "okay";
                };
diff --git a/arch/arm/boot/dts/msm8660-surf.dts b/arch/arm/boot/dts/msm8660-surf.dts
index 31f2157cd7d7..67f8670c4d6a 100644
--- a/arch/arm/boot/dts/msm8660-surf.dts
+++ b/arch/arm/boot/dts/msm8660-surf.dts
@@ -38,4 +38,10 @@
                      <0x19c00000 0x1000>;
                interrupts = <0 195 0x0>;
        };
+        qcom,ssbi@500000 {
+                compatible = "qcom,ssbi";
+                reg = <0x500000 0x1000>;
+                qcom,controller-type = "pmic-arbiter";
+        };
 };
diff --git a/arch/arm/boot/dts/msm8960-cdp.dts b/arch/arm/boot/dts/msm8960-cdp.dts
index 9e621b5ad3dd..c9b09a813a4b 100644
--- a/arch/arm/boot/dts/msm8960-cdp.dts
+++ b/arch/arm/boot/dts/msm8960-cdp.dts
@@ -38,4 +38,10 @@
                      <0x16400000 0x1000>;
                interrupts = <0 154 0x0>;
        };
+        qcom,ssbi@500000 {
+                compatible = "qcom,ssbi";
+                reg = <0x500000 0x1000>;
+                qcom,controller-type = "pmic-arbiter";
+        };
 };
diff --git a/arch/arm/boot/dts/snowball.dts b/arch/arm/boot/dts/snowball.dts
index d3ec32f6b790..db5db24fd544 100644
--- a/arch/arm/boot/dts/snowball.dts
+++ b/arch/arm/boot/dts/snowball.dts
@@ -299,6 +299,10 @@
                        };
                        ab8500 {
+                                ab8500-gpio {
+                                        compatible = "stericsson,ab8500-gpio";
+                                };
                                ab8500-regulators {
                                        ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
                                                regulator-name = "V-DISPLAY";
diff --git a/arch/arm/boot/dts/spear1310.dtsi b/arch/arm/boot/dts/spear1310.dtsi
index 1513c1927cc8..122ae94076c8 100644
--- a/arch/arm/boot/dts/spear1310.dtsi
+++ b/arch/arm/boot/dts/spear1310.dtsi
@@ -89,7 +89,7 @@
                pinmux: pinmux@e0700000 {
                        compatible = "st,spear1310-pinmux";
                        reg = <0xe0700000 0x1000>;
-                        #gpio-range-cells = <2>;
+                        #gpio-range-cells = <3>;
                };
                apb {
@@ -212,7 +212,7 @@
                                interrupt-controller;
                                gpio-controller;
                                #gpio-cells = <2>;
-                                gpio-ranges = <&pinmux 0 246>;
+                                gpio-ranges = <&pinmux 0 0 246>;
                                status = "disabled";
                                st-plgpio,ngpio = <246>;
diff --git a/arch/arm/boot/dts/spear1340.dtsi b/arch/arm/boot/dts/spear1340.dtsi
index 34da11aa6795..c511c4772efd 100644
--- a/arch/arm/boot/dts/spear1340.dtsi
+++ b/arch/arm/boot/dts/spear1340.dtsi
@@ -63,7 +63,7 @@
                pinmux: pinmux@e0700000 {
                        compatible = "st,spear1340-pinmux";
                        reg = <0xe0700000 0x1000>;
-                        #gpio-range-cells = <2>;
+                        #gpio-range-cells = <3>;
                };
                pwm: pwm@e0180000 {
@@ -127,7 +127,7 @@
                                interrupt-controller;
                                gpio-controller;
                                #gpio-cells = <2>;
-                                gpio-ranges = <&pinmux 0 252>;
+                                gpio-ranges = <&pinmux 0 0 252>;
                                status = "disabled";
                                st-plgpio,ngpio = <250>;
diff --git a/arch/arm/boot/dts/spear310.dtsi b/arch/arm/boot/dts/spear310.dtsi
index ab45b8c81982..95372080eea6 100644
--- a/arch/arm/boot/dts/spear310.dtsi
+++ b/arch/arm/boot/dts/spear310.dtsi
@@ -25,7 +25,7 @@
                pinmux: pinmux@b4000000 {
                        compatible = "st,spear310-pinmux";
                        reg = <0xb4000000 0x1000>;
-                        #gpio-range-cells = <2>;
+                        #gpio-range-cells = <3>;
                };
                fsmc: flash@44000000 {
@@ -102,7 +102,7 @@
                                interrupt-controller;
                                gpio-controller;
                                #gpio-cells = <2>;
-                                gpio-ranges = <&pinmux 0 102>;
+                                gpio-ranges = <&pinmux 0 0 102>;
                                status = "disabled";
                                st-plgpio,ngpio = <102>;
diff --git a/arch/arm/boot/dts/spear320.dtsi b/arch/arm/boot/dts/spear320.dtsi
index caa5520b1fd4..ffea342aeec9 100644
--- a/arch/arm/boot/dts/spear320.dtsi
+++ b/arch/arm/boot/dts/spear320.dtsi
@@ -24,7 +24,7 @@
                pinmux: pinmux@b3000000 {
                        compatible = "st,spear320-pinmux";
                        reg = <0xb3000000 0x1000>;
-                        #gpio-range-cells = <2>;
+                        #gpio-range-cells = <3>;
                };
                clcd@90000000 {
@@ -130,7 +130,7 @@
                                interrupt-controller;
                                gpio-controller;
                                #gpio-cells = <2>;
-                                gpio-ranges = <&pinmux 0 102>;
+                                gpio-ranges = <&pinmux 0 0 102>;
                                status = "disabled";
                                st-plgpio,ngpio = <102>;
diff --git a/arch/arm/boot/dts/stuib.dtsi b/arch/arm/boot/dts/stuib.dtsi
index 39446a247e79..615392a75676 100644
--- a/arch/arm/boot/dts/stuib.dtsi
+++ b/arch/arm/boot/dts/stuib.dtsi
@@ -15,7 +15,7 @@
                        stmpe1601: stmpe1601@40 {
                                compatible = "st,stmpe1601";
                                reg = <0x40>;
-                                interrupts = <26 0x1>;
+                                interrupts = <26 0x2>;
                                interrupt-parent = <&gpio6>;
                                interrupt-controller;
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
index 73187173117c..9420053acc14 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
@@ -117,7 +117,7 @@
        };
        pmu {
-                compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu";
+                compatible = "arm,cortex-a15-pmu";
                interrupts = <0 68 4>,
                             <0 69 4>;
        };
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
index dfe371ec2749..d2803be4e1a8 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
@@ -134,7 +134,7 @@
        };
        pmu {
-                compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu";
+                compatible = "arm,cortex-a15-pmu";
                interrupts = <0 68 4>,
                             <0 69 4>;
        };
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
index 6328cbc71d30..c544a5504591 100644
--- a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
@@ -111,7 +111,7 @@
        };
        pmu {
-                compatible = "arm,cortex-a5-pmu", "arm,cortex-a9-pmu";
+                compatible = "arm,cortex-a5-pmu";
                interrupts = <0 68 4>,
                             <0 69 4>;
        };
diff --git a/arch/arm/boot/dts/vt8500-bv07.dts b/arch/arm/boot/dts/vt8500-bv07.dts
index 567cf4e8ab84..877b33afa7ed 100644
--- a/arch/arm/boot/dts/vt8500-bv07.dts
+++ b/arch/arm/boot/dts/vt8500-bv07.dts
@@ -11,26 +11,22 @@
 / {
        model = "Benign BV07 Netbook";
+};
-        /*
+&fb {
-         * Display node is based on Sascha Hauer's patch on dri-devel.
+        bits-per-pixel = <16>;
-         * Added a bpp property to calculate the size of the framebuffer
+        display-timings {
-         * until the binding is formalized.
+                native-mode = <&timing0>;
-         */
+                timing0: 800x480 {
-        display: display@0 {
+                        clock-frequency = <0>; /* unused but required */
-                modes {
+                        hactive = <800>;
-                        mode0: mode@0 {
+                        vactive = <480>;
-                                hactive = <800>;
+                        hfront-porch = <40>;
-                                vactive = <480>;
+                        hback-porch = <88>;
-                                hback-porch = <88>;
+                        hsync-len = <0>;
-                                hfront-porch = <40>;
+                        vback-porch = <32>;
-                                hsync-len = <0>;
+                        vfront-porch = <11>;
-                                vback-porch = <32>;
+                        vsync-len = <1>;
-                                vfront-porch = <11>;
-                                vsync-len = <1>;
-                                clock = <0>;    /* unused but required */
-                                bpp = <16>;     /* non-standard but required */
-                        };
                };
        };
 };
diff --git a/arch/arm/boot/dts/vt8500.dtsi b/arch/arm/boot/dts/vt8500.dtsi
index cf31ced46602..68c8dc644383 100644
--- a/arch/arm/boot/dts/vt8500.dtsi
+++ b/arch/arm/boot/dts/vt8500.dtsi
@@ -98,12 +98,10 @@
                        interrupts = <43>;
                };
-                fb@d800e400 {
+                fb: fb@d8050800 {
                        compatible = "via,vt8500-fb";
                        reg = <0xd800e400 0x400>;
                        interrupts = <12>;
-                        display = <&display>;
-                        default-mode = <&mode0>;
                };
                ge_rops@d8050400 {
diff --git a/arch/arm/boot/dts/wm8505-ref.dts b/arch/arm/boot/dts/wm8505-ref.dts
index fd4e248074c6..edd2cec3d37f 100644
--- a/arch/arm/boot/dts/wm8505-ref.dts
+++ b/arch/arm/boot/dts/wm8505-ref.dts
@@ -11,26 +11,22 @@
 / {
        model = "Wondermedia WM8505 Netbook";
+};
-        /*
+&fb {
-         * Display node is based on Sascha Hauer's patch on dri-devel.
+        bits-per-pixel = <32>;
-         * Added a bpp property to calculate the size of the framebuffer
+        display-timings {
-         * until the binding is formalized.
+                native-mode = <&timing0>;
-         */
+                timing0: 800x480 {
-        display: display@0 {
+                        clock-frequency = <0>; /* unused but required */
-                modes {
+                        hactive = <800>;
-                        mode0: mode@0 {
+                        vactive = <480>;
-                                hactive = <800>;
+                        hfront-porch = <40>;
-                                vactive = <480>;
+                        hback-porch = <88>;
-                                hback-porch = <88>;
+                        hsync-len = <0>;
-                                hfront-porch = <40>;
+                        vback-porch = <32>;
-                                hsync-len = <0>;
+                        vfront-porch = <11>;
-                                vback-porch = <32>;
+                        vsync-len = <1>;
-                                vfront-porch = <11>;
-                                vsync-len = <1>;
-                                clock = <0>;    /* unused but required */
-                                bpp = <32>;     /* non-standard but required */
-                        };
                };
        };
 };
diff --git a/arch/arm/boot/dts/wm8505.dtsi b/arch/arm/boot/dts/wm8505.dtsi
index e74a1c0fb9a2..bcf668d31b28 100644
--- a/arch/arm/boot/dts/wm8505.dtsi
+++ b/arch/arm/boot/dts/wm8505.dtsi
@@ -128,11 +128,9 @@
                        interrupts = <0>;
                };
-                fb@d8050800 {
+                fb: fb@d8050800 {
                        compatible = "wm,wm8505-fb";
                        reg = <0xd8050800 0x200>;
-                        display = <&display>;
-                        default-mode = <&mode0>;
                };
                ge_rops@d8050400 {
diff --git a/arch/arm/boot/dts/wm8650-mid.dts b/arch/arm/boot/dts/wm8650-mid.dts
index cefd938f842f..61671a0d9ede 100644
--- a/arch/arm/boot/dts/wm8650-mid.dts
+++ b/arch/arm/boot/dts/wm8650-mid.dts
@@ -11,26 +11,24 @@
 / {
        model = "Wondermedia WM8650-MID Tablet";
+};
+&fb {
+        bits-per-pixel = <16>;
-        /*
+        display-timings {
-         * Display node is based on Sascha Hauer's patch on dri-devel.
+                native-mode = <&timing0>;
-         * Added a bpp property to calculate the size of the framebuffer
+                timing0: 800x480 {
-         * until the binding is formalized.
+                        clock-frequency = <0>; /* unused but required */
-         */
+                        hactive = <800>;
-        display: display@0 {
+                        vactive = <480>;
-                modes {
+                        hfront-porch = <40>;
-                        mode0: mode@0 {
+                        hback-porch = <88>;
-                                hactive = <800>;
+                        hsync-len = <0>;
-                                vactive = <480>;
+                        vback-porch = <32>;
-                                hback-porch = <88>;
+                        vfront-porch = <11>;
-                                hfront-porch = <40>;
+                        vsync-len = <1>;
-                                hsync-len = <0>;
-                                vback-porch = <32>;
-                                vfront-porch = <11>;
-                                vsync-len = <1>;
-                                clock = <0>;    /* unused but required */
-                                bpp = <16>;     /* non-standard but required */
-                        };
                };
        };
 };
diff --git a/arch/arm/boot/dts/wm8650.dtsi b/arch/arm/boot/dts/wm8650.dtsi
index db3c0a12e052..9313407bbc30 100644
--- a/arch/arm/boot/dts/wm8650.dtsi
+++ b/arch/arm/boot/dts/wm8650.dtsi
@@ -128,11 +128,9 @@
                        interrupts = <43>;
                };
-                fb@d8050800 {
+                fb: fb@d8050800 {
                        compatible = "wm,wm8505-fb";
                        reg = <0xd8050800 0x200>;
-                        display = <&display>;
-                        default-mode = <&mode0>;
                };
                ge_rops@d8050400 {
diff --git a/arch/arm/boot/dts/wm8850-w70v2.dts b/arch/arm/boot/dts/wm8850-w70v2.dts
index fcc660c89540..32d22532cd6c 100644
--- a/arch/arm/boot/dts/wm8850-w70v2.dts
+++ b/arch/arm/boot/dts/wm8850-w70v2.dts
@@ -15,28 +15,6 @@
 / {
        model = "Wondermedia WM8850-W70v2 Tablet";
-        /*
-         * Display node is based on Sascha Hauer's patch on dri-devel.
-         * Added a bpp property to calculate the size of the framebuffer
-         * until the binding is formalized.
-         */
-        display: display@0 {
-                modes {
-                        mode0: mode@0 {
-                                hactive = <800>;
-                                vactive = <480>;
-                                hback-porch = <88>;
-                                hfront-porch = <40>;
-                                hsync-len = <0>;
-                                vback-porch = <32>;
-                                vfront-porch = <11>;
-                                vsync-len = <1>;
-                                clock = <0>;    /* unused but required */
-                                bpp = <16>;     /* non-standard but required */
-                        };
-                };
-        };
        backlight {
                compatible = "pwm-backlight";
                pwms = <&pwm 0 50000 1>;        /* duty inverted */
@@ -45,3 +23,21 @@
                default-brightness-level = <5>;
        };
 };
+&fb {
+        bits-per-pixel = <16>;
+        display-timings {
+                native-mode = <&timing0>;
+                timing0: 800x480 {
+                        clock-frequency = <0>; /* unused but required */
+                        hactive = <800>;
+                        vactive = <480>;
+                        hfront-porch = <40>;
+                        hback-porch = <88>;
+                        hsync-len = <0>;
+                        vback-porch = <32>;
+                        vfront-porch = <11>;
+                        vsync-len = <1>;
+                };
+        };
+};
diff --git a/arch/arm/boot/dts/wm8850.dtsi b/arch/arm/boot/dts/wm8850.dtsi
index e8cbfdc87bba..7149cd13e3b9 100644
--- a/arch/arm/boot/dts/wm8850.dtsi
+++ b/arch/arm/boot/dts/wm8850.dtsi
@@ -135,11 +135,9 @@
                        };
                };
-                fb@d8051700 {
+                fb: fb@d8051700 {
                        compatible = "wm,wm8505-fb";
                        reg = <0xd8051700 0x200>;
-                        display = <&display>;
-                        default-mode = <&mode0>;
                };
                ge_rops@d8050400 {
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index e36b01025321..088d6c11a0fa 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -188,6 +188,7 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_MXC=y
 CONFIG_USB_CHIPIDEA=y
 CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_PHY=y
 CONFIG_USB_MXS_PHY=y
 CONFIG_USB_STORAGE=y
 CONFIG_MMC=y
diff --git a/arch/arm/configs/kirkwood_defconfig b/arch/arm/configs/kirkwood_defconfig
index 13482ea58b09..93f3794ba5cb 100644
--- a/arch/arm/configs/kirkwood_defconfig
+++ b/arch/arm/configs/kirkwood_defconfig
@@ -56,7 +56,6 @@ CONFIG_AEABI=y
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_CPU_IDLE=y
-CONFIG_CPU_IDLE_KIRKWOOD=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
diff --git a/arch/arm/configs/lpc32xx_defconfig b/arch/arm/configs/lpc32xx_defconfig
index 92386b20bd09..afa7249fac6e 100644
--- a/arch/arm/configs/lpc32xx_defconfig
+++ b/arch/arm/configs/lpc32xx_defconfig
@@ -134,6 +134,7 @@ CONFIG_SND_DEBUG_VERBOSE=y
 # CONFIG_SND_SPI is not set
 CONFIG_SND_SOC=y
 CONFIG_USB=y
+CONFIG_USB_PHY=y
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig
index 6a99e30f81d2..87924d671115 100644
--- a/arch/arm/configs/mxs_defconfig
+++ b/arch/arm/configs/mxs_defconfig
@@ -120,6 +120,7 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_CHIPIDEA=y
 CONFIG_USB_CHIPIDEA_HOST=y
 CONFIG_USB_STORAGE=y
+CONFIG_USB_PHY=y
 CONFIG_USB_MXS_PHY=y
 CONFIG_MMC=y
 CONFIG_MMC_MXS=y
diff --git a/arch/arm/configs/omap1_defconfig b/arch/arm/configs/omap1_defconfig
index 42eab9a2a0fd..7e0ebb64a7f9 100644
--- a/arch/arm/configs/omap1_defconfig
+++ b/arch/arm/configs/omap1_defconfig
@@ -195,6 +195,7 @@ CONFIG_SND_SOC=y
 CONFIG_SND_OMAP_SOC=y
 # CONFIG_USB_HID is not set
 CONFIG_USB=y
+CONFIG_USB_PHY=y
 CONFIG_USB_DEBUG=y
 CONFIG_USB_DEVICEFS=y
 # CONFIG_USB_DEVICE_CLASS is not set
diff --git a/arch/arm/include/asm/glue-cache.h b/arch/arm/include/asm/glue-cache.h
index cca9f15704ed..ea289e1435e7 100644
--- a/arch/arm/include/asm/glue-cache.h
+++ b/arch/arm/include/asm/glue-cache.h
@@ -19,14 +19,6 @@
 #undef _CACHE
 #undef MULTI_CACHE
-#if defined(CONFIG_CPU_CACHE_V3)
-# ifdef _CACHE
-#  define MULTI_CACHE 1
-# else
-#  define _CACHE v3
-# endif
-#endif
 #if defined(CONFIG_CPU_CACHE_V4)
 # ifdef _CACHE
 #  define MULTI_CACHE 1
diff --git a/arch/arm/include/asm/hardware/iop3xx.h b/arch/arm/include/asm/hardware/iop3xx.h
index 02fe2fbe2477..ed94b1a366ae 100644
--- a/arch/arm/include/asm/hardware/iop3xx.h
+++ b/arch/arm/include/asm/hardware/iop3xx.h
@@ -37,7 +37,7 @@ extern int iop3xx_get_init_atu(void);
 * IOP3XX processor registers
 */
 #define IOP3XX_PERIPHERAL_PHYS_BASE     0xffffe000
-#define IOP3XX_PERIPHERAL_VIRT_BASE     0xfeffe000
+#define IOP3XX_PERIPHERAL_VIRT_BASE     0xfedfe000
 #define IOP3XX_PERIPHERAL_SIZE          0x00002000
 #define IOP3XX_PERIPHERAL_UPPER_PA (IOP3XX_PERIPHERAL_PHYS_BASE +\
                                        IOP3XX_PERIPHERAL_SIZE - 1)
diff --git a/arch/arm/include/asm/pgtable-3level.h b/arch/arm/include/asm/pgtable-3level.h
index 6ef8afd1b64c..86b8fe398b95 100644
--- a/arch/arm/include/asm/pgtable-3level.h
+++ b/arch/arm/include/asm/pgtable-3level.h
@@ -111,7 +111,7 @@
 #define L_PTE_S2_MT_WRITETHROUGH (_AT(pteval_t, 0xa) << 2) /* MemAttr[3:0] */
 #define L_PTE_S2_MT_WRITEBACK    (_AT(pteval_t, 0xf) << 2) /* MemAttr[3:0] */
 #define L_PTE_S2_RDONLY          (_AT(pteval_t, 1) << 6)   /* HAP[1]   */
-#define L_PTE_S2_RDWR            (_AT(pteval_t, 2) << 6)   /* HAP[2:1] */
+#define L_PTE_S2_RDWR            (_AT(pteval_t, 3) << 6)   /* HAP[2:1] */
 /*
 * Hyp-mode PL2 PTE definitions for LPAE.
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index 80d6fc4dbe4a..9bcd262a9008 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -61,6 +61,15 @@ extern void __pgd_error(const char *file, int line, pgd_t);
 #define FIRST_USER_ADDRESS      PAGE_SIZE
 /*
+ * Use TASK_SIZE as the ceiling argument for free_pgtables() and
+ * free_pgd_range() to avoid freeing the modules pmd when LPAE is enabled (pmd
+ * page shared between user and kernel).
+ */
+#ifdef CONFIG_ARM_LPAE
+#define USER_PGTABLES_CEILING   TASK_SIZE
+#endif
+/*
 * The pgprot_* and protection_map entries will be fixed up in runtime
 * to include the cachable and bufferable bits based on memory policy,
 * as well as any architecture dependent bits like global/ASID and SMP
diff --git a/arch/arm/include/asm/system_misc.h b/arch/arm/include/asm/system_misc.h
index 5a85f148b607..21a23e378bbe 100644
--- a/arch/arm/include/asm/system_misc.h
+++ b/arch/arm/include/asm/system_misc.h
@@ -21,9 +21,6 @@ extern void (*arm_pm_idle)(void);
 extern unsigned int user_debug;
-extern void disable_hlt(void);
-extern void enable_hlt(void);
 #endif /* !__ASSEMBLY__ */
 #endif /* __ASM_ARM_SYSTEM_MISC_H */
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index 9e9c041358ca..ab865e65a84c 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -14,7 +14,6 @@
 #include <asm/glue.h>
-#define TLB_V3_PAGE     (1 << 0)
 #define TLB_V4_U_PAGE   (1 << 1)
 #define TLB_V4_D_PAGE   (1 << 2)
 #define TLB_V4_I_PAGE   (1 << 3)
@@ -22,7 +21,6 @@
 #define TLB_V6_D_PAGE   (1 << 5)
 #define TLB_V6_I_PAGE   (1 << 6)
-#define TLB_V3_FULL     (1 << 8)
 #define TLB_V4_U_FULL   (1 << 9)
 #define TLB_V4_D_FULL   (1 << 10)
 #define TLB_V4_I_FULL   (1 << 11)
@@ -52,7 +50,6 @@
 *      =============
 *
 *      We have the following to choose from:
- *        v3    - ARMv3
 *        v4    - ARMv4 without write buffer
 *        v4wb  - ARMv4 with write buffer without I TLB flush entry instruction
 *        v4wbi - ARMv4 with write buffer with I TLB flush entry instruction
@@ -330,7 +327,6 @@ static inline void local_flush_tlb_all(void)
        if (tlb_flag(TLB_WB))
                dsb();
-        tlb_op(TLB_V3_FULL, "c6, c0, 0", zero);
        tlb_op(TLB_V4_U_FULL | TLB_V6_U_FULL, "c8, c7, 0", zero);
        tlb_op(TLB_V4_D_FULL | TLB_V6_D_FULL, "c8, c6, 0", zero);
        tlb_op(TLB_V4_I_FULL | TLB_V6_I_FULL, "c8, c5, 0", zero);
@@ -351,9 +347,8 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
        if (tlb_flag(TLB_WB))
                dsb();
-        if (possible_tlb_flags & (TLB_V3_FULL|TLB_V4_U_FULL|TLB_V4_D_FULL|TLB_V4_I_FULL)) {
+        if (possible_tlb_flags & (TLB_V4_U_FULL|TLB_V4_D_FULL|TLB_V4_I_FULL)) {
                if (cpumask_test_cpu(get_cpu(), mm_cpumask(mm))) {
-                        tlb_op(TLB_V3_FULL, "c6, c0, 0", zero);
                        tlb_op(TLB_V4_U_FULL, "c8, c7, 0", zero);
                        tlb_op(TLB_V4_D_FULL, "c8, c6, 0", zero);
                        tlb_op(TLB_V4_I_FULL, "c8, c5, 0", zero);
@@ -385,9 +380,8 @@ local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
        if (tlb_flag(TLB_WB))
                dsb();
-        if (possible_tlb_flags & (TLB_V3_PAGE|TLB_V4_U_PAGE|TLB_V4_D_PAGE|TLB_V4_I_PAGE|TLB_V4_I_FULL) &&
+        if (possible_tlb_flags & (TLB_V4_U_PAGE|TLB_V4_D_PAGE|TLB_V4_I_PAGE|TLB_V4_I_FULL) &&
            cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) {
-                tlb_op(TLB_V3_PAGE, "c6, c0, 0", uaddr);
                tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", uaddr);
                tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", uaddr);
                tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", uaddr);
@@ -418,7 +412,6 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
        if (tlb_flag(TLB_WB))
                dsb();
-        tlb_op(TLB_V3_PAGE, "c6, c0, 0", kaddr);
        tlb_op(TLB_V4_U_PAGE, "c8, c7, 1", kaddr);
        tlb_op(TLB_V4_D_PAGE, "c8, c6, 1", kaddr);
        tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", kaddr);
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index e4ddfb39ca34..141baa3f9a72 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -44,14 +44,6 @@
 #define __ARCH_WANT_SYS_CLONE
 /*
- * "Conditional" syscalls
- *
- * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
- * but it doesn't work on all toolchains, so we just do it by hand
- */
-#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
-/*
 * Unimplemented (or alternatively implemented) syscalls
 */
 #define __IGNORE_fadvise64_64
diff --git a/arch/arm/kernel/atags_proc.c b/arch/arm/kernel/atags_proc.c
index 42a1a1415fa6..c7ff8073416f 100644
--- a/arch/arm/kernel/atags_proc.c
+++ b/arch/arm/kernel/atags_proc.c
@@ -9,24 +9,18 @@ struct buffer {
        char data[];
 };
-static int
+static ssize_t atags_read(struct file *file, char __user *buf,
-read_buffer(char* page, char** start, off_t off, int count,
+                          size_t count, loff_t *ppos)
-        int* eof, void* data)
 {
-        struct buffer *buffer = (struct buffer *)data;
+        struct buffer *b = PDE_DATA(file_inode(file));
+        return simple_read_from_buffer(buf, count, ppos, b->data, b->size);
-        if (off >= buffer->size) {
-                *eof = 1;
-                return 0;
-        }
-        count = min((int) (buffer->size - off), count);
-        memcpy(page, &buffer->data[off], count);
-        return count;
 }
+static const struct file_operations atags_fops = {
+        .read = atags_read,
+        .llseek = default_llseek,
+};
 #define BOOT_PARAMS_SIZE 1536
 static char __initdata atags_copy[BOOT_PARAMS_SIZE];
@@ -66,9 +60,7 @@ static int __init init_atags_procfs(void)
        b->size = size;
        memcpy(b->data, atags_copy, size);
-        tags_entry = create_proc_read_entry("atags", 0400,
+        tags_entry = proc_create_data("atags", 0400, NULL, &atags_fops, b);
-                        NULL, read_buffer, b);
        if (!tags_entry)
                goto nomem;
diff --git a/arch/arm/kernel/early_printk.c b/arch/arm/kernel/early_printk.c
index 85aa2b292692..43076536965c 100644
--- a/arch/arm/kernel/early_printk.c
+++ b/arch/arm/kernel/early_printk.c
@@ -29,28 +29,17 @@ static void early_console_write(struct console *con, const char *s, unsigned n)
        early_write(s, n);
 }
-static struct console early_console = {
+static struct console early_console_dev = {
        .name =         "earlycon",
        .write =        early_console_write,
        .flags =        CON_PRINTBUFFER | CON_BOOT,
        .index =        -1,
 };
-asmlinkage void early_printk(const char *fmt, ...)
-{
-        char buf[512];
-        int n;
-        va_list ap;
-        va_start(ap, fmt);
-        n = vscnprintf(buf, sizeof(buf), fmt, ap);
-        early_write(buf, n);
-        va_end(ap);
-}
 static int __init setup_early_printk(char *buf)
 {
-        register_console(&early_console);
+        early_console = &early_console_dev;
+        register_console(&early_console_dev);
        return 0;
 }
diff --git a/arch/arm/kernel/etm.c b/arch/arm/kernel/etm.c
index 9b6de8c988f3..8ff0ecdc637f 100644
--- a/arch/arm/kernel/etm.c
+++ b/arch/arm/kernel/etm.c
@@ -254,7 +254,7 @@ static void sysrq_etm_dump(int key)
 static struct sysrq_key_op sysrq_etm_op = {
        .handler = sysrq_etm_dump,
-        .help_msg = "ETM buffer dump",
+        .help_msg = "etm-buffer-dump(v)",
        .action_msg = "etm",
 };
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index 5dc1aa6f0f7d..1fd749ee4a1b 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -1043,7 +1043,7 @@ static int dbg_cpu_pm_notify(struct notifier_block *self, unsigned long action,
        return NOTIFY_OK;
 }
-static struct notifier_block __cpuinitdata dbg_cpu_pm_nb = {
+static struct notifier_block dbg_cpu_pm_nb = {
        .notifier_call = dbg_cpu_pm_notify,
 };
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 146157dfe27c..8c3094d0f7b7 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -253,7 +253,10 @@ validate_event(struct pmu_hw_events *hw_events,
        struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
        struct pmu *leader_pmu = event->group_leader->pmu;
-        if (event->pmu != leader_pmu || event->state <= PERF_EVENT_STATE_OFF)
+        if (event->pmu != leader_pmu || event->state < PERF_EVENT_STATE_OFF)
+                return 1;
+        if (event->state == PERF_EVENT_STATE_OFF && !event->attr.enable_on_exec)
                return 1;
        return armpmu->get_event_idx(hw_events, event) >= 0;
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 047d3e40e470..ae58d3b37d9d 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -57,38 +57,6 @@ static const char *isa_modes[] = {
  "ARM" , "Thumb" , "Jazelle", "ThumbEE"
 };
-static volatile int hlt_counter;
-void disable_hlt(void)
-{
-        hlt_counter++;
-}
-EXPORT_SYMBOL(disable_hlt);
-void enable_hlt(void)
-{
-        hlt_counter--;
-        BUG_ON(hlt_counter < 0);
-}
-EXPORT_SYMBOL(enable_hlt);
-static int __init nohlt_setup(char *__unused)
-{
-        hlt_counter = 1;
-        return 1;
-}
-static int __init hlt_setup(char *__unused)
-{
-        hlt_counter = 0;
-        return 1;
-}
-__setup("nohlt", nohlt_setup);
-__setup("hlt", hlt_setup);
 extern void call_with_stack(void (*fn)(void *), void *arg, void *sp);
 typedef void (*phys_reset_t)(unsigned long);
@@ -172,54 +140,38 @@ static void default_idle(void)
        local_irq_enable();
 }
-/*
+void arch_cpu_idle_prepare(void)
- * The idle thread.
- * We always respect 'hlt_counter' to prevent low power idle.
- */
-void cpu_idle(void)
 {
        local_fiq_enable();
+}
-        /* endless idle loop with no priority at all */
+void arch_cpu_idle_enter(void)
-        while (1) {
+{
-                tick_nohz_idle_enter();
+        ledtrig_cpu(CPU_LED_IDLE_START);
-                rcu_idle_enter();
+#ifdef CONFIG_PL310_ERRATA_769419
-                ledtrig_cpu(CPU_LED_IDLE_START);
+        wmb();
-                while (!need_resched()) {
-#ifdef CONFIG_HOTPLUG_CPU
-                        if (cpu_is_offline(smp_processor_id()))
-                                cpu_die();
 #endif
+}
-                        /*
+void arch_cpu_idle_exit(void)
-                         * We need to disable interrupts here
+{
-                         * to ensure we don't miss a wakeup call.
+        ledtrig_cpu(CPU_LED_IDLE_END);
-                         */
+}
-                        local_irq_disable();
-#ifdef CONFIG_PL310_ERRATA_769419
+#ifdef CONFIG_HOTPLUG_CPU
-                        wmb();
+void arch_cpu_idle_dead(void)
+{
+        cpu_die();
+}
 #endif
-                        if (hlt_counter) {
-                                local_irq_enable();
+/*
-                                cpu_relax();
+ * Called from the core idle loop.
-                        } else if (!need_resched()) {
+ */
-                                stop_critical_timings();
+void arch_cpu_idle(void)
-                                if (cpuidle_idle_call())
+{
-                                        default_idle();
+        if (cpuidle_idle_call())
-                                start_critical_timings();
+                default_idle();
-                                /*
-                                 * default_idle functions must always
-                                 * return with IRQs enabled.
-                                 */
-                                WARN_ON(irqs_disabled());
-                        } else
-                                local_irq_enable();
-                }
-                ledtrig_cpu(CPU_LED_IDLE_END);
-                rcu_idle_exit();
-                tick_nohz_idle_exit();
-                schedule_preempt_disabled();
-        }
 }
 static char reboot_mode = 'h';
@@ -273,11 +225,8 @@ void __show_regs(struct pt_regs *regs)
        unsigned long flags;
        char buf[64];
-        printk("CPU: %d    %s  (%s %.*s)\n",
+        show_regs_print_info(KERN_DEFAULT);
-                raw_smp_processor_id(), print_tainted(),
-                init_utsname()->release,
-                (int)strcspn(init_utsname()->version, " "),
-                init_utsname()->version);
        print_symbol("PC is at %s\n", instruction_pointer(regs));
        print_symbol("LR is at %s\n", regs->ARM_lr);
        printk("pc : [<%08lx>]    lr : [<%08lx>]    psr: %08lx\n"
@@ -332,7 +281,6 @@ void __show_regs(struct pt_regs *regs)
 void show_regs(struct pt_regs * regs)
 {
        printk("\n");
-        printk("Pid: %d, comm: %20s\n", task_pid_nr(current), current->comm);
        __show_regs(regs);
        dump_stack();
 }
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index bd6f56b9ec21..59d2adb764a9 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -45,12 +45,12 @@ static u32 notrace jiffy_sched_clock_read(void)
 static u32 __read_mostly (*read_sched_clock)(void) = jiffy_sched_clock_read;
-static inline u64 cyc_to_ns(u64 cyc, u32 mult, u32 shift)
+static inline u64 notrace cyc_to_ns(u64 cyc, u32 mult, u32 shift)
 {
        return (cyc * mult) >> shift;
 }
-static unsigned long long cyc_to_sched_clock(u32 cyc, u32 mask)
+static unsigned long long notrace cyc_to_sched_clock(u32 cyc, u32 mask)
 {
        u64 epoch_ns;
        u32 epoch_cyc;
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index d343a6c3a6d1..234e339196c0 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -56,7 +56,6 @@
 #include <asm/virt.h>
 #include "atags.h"
-#include "tcm.h"
 #if defined(CONFIG_FPE_NWFPE) || defined(CONFIG_FPE_FASTFPE)
@@ -798,8 +797,6 @@ void __init setup_arch(char **cmdline_p)
        reserve_crashkernel();
-        tcm_init();
 #ifdef CONFIG_MULTI_IRQ_HANDLER
        handle_arch_irq = mdesc->handle_irq;
 #endif
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 1f2ccccaf009..4619177bcfe6 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -336,7 +336,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
        /*
         * OK, it's off to the idle thread for us
         */
-        cpu_idle();
+        cpu_startup_entry(CPUHP_ONLINE);
 }
 void __init smp_cpus_done(unsigned int max_cpus)
diff --git a/arch/arm/kernel/swp_emulate.c b/arch/arm/kernel/swp_emulate.c
index ab1017bd1667..087fc321e9e5 100644
--- a/arch/arm/kernel/swp_emulate.c
+++ b/arch/arm/kernel/swp_emulate.c
@@ -21,6 +21,7 @@
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/proc_fs.h>
+#include <linux/seq_file.h>
 #include <linux/sched.h>
 #include <linux/syscalls.h>
 #include <linux/perf_event.h>
@@ -79,27 +80,27 @@ static unsigned long abtcounter;
 static pid_t         previous_pid;
 #ifdef CONFIG_PROC_FS
-static int proc_read_status(char *page, char **start, off_t off, int count,
+static int proc_status_show(struct seq_file *m, void *v)
-                            int *eof, void *data)
 {
-        char *p = page;
+        seq_printf(m, "Emulated SWP:\t\t%lu\n", swpcounter);
-        int len;
+        seq_printf(m, "Emulated SWPB:\t\t%lu\n", swpbcounter);
+        seq_printf(m, "Aborted SWP{B}:\t\t%lu\n", abtcounter);
-        p += sprintf(p, "Emulated SWP:\t\t%lu\n", swpcounter);
-        p += sprintf(p, "Emulated SWPB:\t\t%lu\n", swpbcounter);
-        p += sprintf(p, "Aborted SWP{B}:\t\t%lu\n", abtcounter);
        if (previous_pid != 0)
-                p += sprintf(p, "Last process:\t\t%d\n", previous_pid);
+                seq_printf(m, "Last process:\t\t%d\n", previous_pid);
+        return 0;
-        len = (p - page) - off;
+}
-        if (len < 0)
-                len = 0;
-        *eof = (len <= count) ? 1 : 0;
-        *start = page + off;
-        return len;
+static int proc_status_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, proc_status_show, PDE_DATA(inode));
 }
+static const struct file_operations proc_status_fops = {
+        .open           = proc_status_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = seq_release,
+};
 #endif
 /*
@@ -266,14 +267,8 @@ static struct undef_hook swp_hook = {
 static int __init swp_emulation_init(void)
 {
 #ifdef CONFIG_PROC_FS
-        struct proc_dir_entry *res;
+        if (!proc_create("cpu/swp_emulation", S_IRUGO, NULL, &proc_status_fops))
-        res = create_proc_entry("cpu/swp_emulation", S_IRUGO, NULL);
-        if (!res)
                return -ENOMEM;
-        res->read_proc = proc_read_status;
 #endif /* CONFIG_PROC_FS */
        printk(KERN_NOTICE "Registering SWP/SWPB emulation handler\n");
diff --git a/arch/arm/kernel/tcm.c b/arch/arm/kernel/tcm.c
index 30ae6bb4a310..f50f19e5c138 100644
--- a/arch/arm/kernel/tcm.c
+++ b/arch/arm/kernel/tcm.c
@@ -17,7 +17,6 @@
 #include <asm/mach/map.h>
 #include <asm/memory.h>
 #include <asm/system_info.h>
-#include "tcm.h"
 static struct gen_pool *tcm_pool;
 static bool dtcm_present;
diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c
index 79282ebcd939..f10316b4ecdc 100644
--- a/arch/arm/kernel/topology.c
+++ b/arch/arm/kernel/topology.c
@@ -100,7 +100,7 @@ static void __init parse_dt_topology(void)
        int alloc_size, cpu = 0;
        alloc_size = nr_cpu_ids * sizeof(struct cpu_capacity);
-        cpu_capacity = (struct cpu_capacity *)kzalloc(alloc_size, GFP_NOWAIT);
+        cpu_capacity = kzalloc(alloc_size, GFP_NOWAIT);
        while ((cn = of_find_node_by_type(cn, "cpu"))) {
                const u32 *rate, *reg;
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 1c089119b2d7..18b32e8e4497 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -204,13 +204,6 @@ static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
 }
 #endif
-void dump_stack(void)
-{
-        dump_backtrace(NULL, NULL);
-}
-EXPORT_SYMBOL(dump_stack);
 void show_stack(struct task_struct *tsk, unsigned long *sp)
 {
        dump_backtrace(NULL, tsk);
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index 5a936988eb24..842098d78f58 100644
--- a/arch/arm/kvm/arm.c
+++ b/arch/arm/kvm/arm.c
@@ -201,6 +201,7 @@ int kvm_dev_ioctl_check_extension(long ext)
                break;
        case KVM_CAP_ARM_SET_DEVICE_ADDR:
                r = 1;
+                break;
        case KVM_CAP_NR_VCPUS:
                r = num_online_cpus();
                break;
@@ -613,7 +614,7 @@ static int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
                if (hsr_ec >= ARRAY_SIZE(arm_exit_handlers)
                    || !arm_exit_handlers[hsr_ec]) {
-                        kvm_err("Unkown exception class: %#08lx, "
+                        kvm_err("Unknown exception class: %#08lx, "
                                "hsr: %#08x\n", hsr_ec,
                                (unsigned int)vcpu->arch.hsr);
                        BUG();
diff --git a/arch/arm/kvm/coproc.c b/arch/arm/kvm/coproc.c
index 4ea9a982269c..7bed7556077a 100644
--- a/arch/arm/kvm/coproc.c
+++ b/arch/arm/kvm/coproc.c
@@ -79,11 +79,11 @@ static bool access_dcsw(struct kvm_vcpu *vcpu,
        u32 val;
        int cpu;
-        cpu = get_cpu();
        if (!p->is_write)
                return read_from_write_only(vcpu, p);
+        cpu = get_cpu();
        cpumask_setall(&vcpu->arch.require_dcache_flush);
        cpumask_clear_cpu(cpu, &vcpu->arch.require_dcache_flush);
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c
index b67cd5374117..44199bc2c665 100644
--- a/arch/arm/mach-at91/at91sam9260.c
+++ b/arch/arm/mach-at91/at91sam9260.c
@@ -232,6 +232,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_DEV_ID("t2_clk", "fffdc000.timer", &tc5_clk),
        CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &ohci_clk),
        CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
+        CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk),
+        CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk),
        /* fake hclk clock */
        CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
        CLKDEV_CON_ID("pioA", &pioA_clk),
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index d3addee43d8d..2ec5efea3f03 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -262,6 +262,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_DEV_ID("mci_clk", "fffd0000.mmc", &mmc1_clk),
        CLKDEV_CON_DEV_ID(NULL, "fff84000.i2c", &twi0_clk),
        CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi1_clk),
+        CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk),
+        CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk),
        /* fake hclk clock */
        CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk),
        CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c
index 5dfc8fd87103..ccd078355eed 100644
--- a/arch/arm/mach-at91/at91sam9n12.c
+++ b/arch/arm/mach-at91/at91sam9n12.c
@@ -172,6 +172,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma_clk),
        CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
        CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
+        CLKDEV_CON_DEV_ID("spi_clk", "f0000000.spi", &spi0_clk),
+        CLKDEV_CON_DEV_ID("spi_clk", "f0004000.spi", &spi1_clk),
        CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk),
        CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk),
        CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk),
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index 44a9a62dcc13..a200d8a17123 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -237,6 +237,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
        CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
        CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
        CLKDEV_CON_DEV_ID(NULL, "f8018000.i2c", &twi2_clk),
+        CLKDEV_CON_DEV_ID("spi_clk", "f0000000.spi", &spi0_clk),
+        CLKDEV_CON_DEV_ID("spi_clk", "f0004000.spi", &spi1_clk),
        CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk),
        CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk),
        CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk),
diff --git a/arch/arm/mach-at91/cpuidle.c b/arch/arm/mach-at91/cpuidle.c
index 0c6381516a5a..48f1228c611c 100644
--- a/arch/arm/mach-at91/cpuidle.c
+++ b/arch/arm/mach-at91/cpuidle.c
@@ -27,8 +27,6 @@
 #define AT91_MAX_STATES 2
-static DEFINE_PER_CPU(struct cpuidle_device, at91_cpuidle_device);
 /* Actual code that puts the SoC in different idle states */
 static int at91_enter_idle(struct cpuidle_device *dev,
                        struct cpuidle_driver *drv,
@@ -47,7 +45,6 @@ static int at91_enter_idle(struct cpuidle_device *dev,
 static struct cpuidle_driver at91_idle_driver = {
        .name                   = "at91_idle",
        .owner                  = THIS_MODULE,
-        .en_core_tk_irqen       = 1,
        .states[0]              = ARM_CPUIDLE_WFI_STATE,
        .states[1]              = {
                .enter                  = at91_enter_idle,
@@ -61,20 +58,9 @@ static struct cpuidle_driver at91_idle_driver = {
 };
 /* Initialize CPU idle by registering the idle states */
-static int at91_init_cpuidle(void)
+static int __init at91_init_cpuidle(void)
 {
-        struct cpuidle_device *device;
+        return cpuidle_register(&at91_idle_driver, NULL);
-        device = &per_cpu(at91_cpuidle_device, smp_processor_id());
-        device->state_count = AT91_MAX_STATES;
-        cpuidle_register_driver(&at91_idle_driver);
-        if (cpuidle_register_device(device)) {
-                printk(KERN_ERR "at91_init_cpuidle: Failed registering\n");
-                return -EIO;
-        }
-        return 0;
 }
 device_initcall(at91_init_cpuidle);
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index bf02471d7e7c..f11289519c39 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -6,6 +6,7 @@ config ARCH_BCM
        select ARM_ERRATA_764369 if SMP
        select ARM_GIC
        select CPU_V7
+        select CLKSRC_OF
        select GENERIC_CLOCKEVENTS
        select GENERIC_TIME
        select GPIO_BCM
diff --git a/arch/arm/mach-bcm/board_bcm.c b/arch/arm/mach-bcm/board_bcm.c
index f0f9abafad29..259593540477 100644
--- a/arch/arm/mach-bcm/board_bcm.c
+++ b/arch/arm/mach-bcm/board_bcm.c
@@ -16,14 +16,11 @@
 #include <linux/device.h>
 #include <linux/platform_device.h>
 #include <linux/irqchip.h>
+#include <linux/clocksource.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
-static void timer_init(void)
-{
-}
 static void __init board_init(void)
 {
@@ -35,7 +32,7 @@ static const char * const bcm11351_dt_compat[] = { "bcm,bcm11351", NULL, };
 DT_MACHINE_START(BCM11351_DT, "Broadcom Application Processor")
        .init_irq = irqchip_init,
-        .init_time = timer_init,
+        .init_time = clocksource_of_init,
        .init_machine = board_init,
        .dt_compat = bcm11351_dt_compat,
 MACHINE_END
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c
index 52e4bb5cf12d..126f74f6087c 100644
--- a/arch/arm/mach-cns3xxx/core.c
+++ b/arch/arm/mach-cns3xxx/core.c
@@ -32,16 +32,6 @@ static struct map_desc cns3xxx_io_desc[] __initdata = {
                .length         = SZ_4K,
                .type           = MT_DEVICE,
        }, {
-                .virtual        = CNS3XXX_GPIOA_BASE_VIRT,
-                .pfn            = __phys_to_pfn(CNS3XXX_GPIOA_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
-                .virtual        = CNS3XXX_GPIOB_BASE_VIRT,
-                .pfn            = __phys_to_pfn(CNS3XXX_GPIOB_BASE),
-                .length         = SZ_4K,
-                .type           = MT_DEVICE,
-        }, {
                .virtual        = CNS3XXX_MISC_BASE_VIRT,
                .pfn            = __phys_to_pfn(CNS3XXX_MISC_BASE),
                .length         = SZ_4K,
diff --git a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h b/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
index b1021aafa481..9b145b1e48ea 100644
--- a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
+++ b/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
@@ -20,22 +20,16 @@
 #define CNS3XXX_SPI_FLASH_BASE                  0x60000000      /* SPI Serial Flash Memory */
 #define CNS3XXX_SWITCH_BASE                     0x70000000      /* Switch and HNAT Control */
-#define CNS3XXX_SWITCH_BASE_VIRT                0xFFF00000
 #define CNS3XXX_PPE_BASE                        0x70001000      /* HANT */
-#define CNS3XXX_PPE_BASE_VIRT                   0xFFF50000
 #define CNS3XXX_EMBEDDED_SRAM_BASE              0x70002000      /* HANT Embedded SRAM */
-#define CNS3XXX_EMBEDDED_SRAM_BASE_VIRT         0xFFF60000
 #define CNS3XXX_SSP_BASE                        0x71000000      /* Synchronous Serial Port - SPI/PCM/I2C */
-#define CNS3XXX_SSP_BASE_VIRT                   0xFFF01000
 #define CNS3XXX_DMC_BASE                        0x72000000      /* DMC Control (DDR2 SDRAM) */
-#define CNS3XXX_DMC_BASE_VIRT                   0xFFF02000
 #define CNS3XXX_SMC_BASE                        0x73000000      /* SMC Control */
-#define CNS3XXX_SMC_BASE_VIRT                   0xFFF03000
 #define SMC_MEMC_STATUS_OFFSET                  0x000
 #define SMC_MEMIF_CFG_OFFSET                    0x004
@@ -74,13 +68,10 @@
 #define SMC_PCELL_ID_3_OFFSET                   0xFFC
 #define CNS3XXX_GPIOA_BASE                      0x74000000      /* GPIO port A */
-#define CNS3XXX_GPIOA_BASE_VIRT                 0xFFF04000
 #define CNS3XXX_GPIOB_BASE                      0x74800000      /* GPIO port B */
-#define CNS3XXX_GPIOB_BASE_VIRT                 0xFFF05000
 #define CNS3XXX_RTC_BASE                        0x75000000      /* Real Time Clock */
-#define CNS3XXX_RTC_BASE_VIRT                   0xFFF06000
 #define RTC_SEC_OFFSET                          0x00
 #define RTC_MIN_OFFSET                          0x04
@@ -112,22 +103,16 @@
 #define CNS3XXX_UART0_BASE_VIRT                 0xFB002000
 #define CNS3XXX_UART1_BASE                      0x78400000      /* UART 1 */
-#define CNS3XXX_UART1_BASE_VIRT                 0xFFF0A000
 #define CNS3XXX_UART2_BASE                      0x78800000      /* UART 2 */
-#define CNS3XXX_UART2_BASE_VIRT                 0xFFF0B000
 #define CNS3XXX_DMAC_BASE                       0x79000000      /* Generic DMA Control */
-#define CNS3XXX_DMAC_BASE_VIRT                  0xFFF0D000
 #define CNS3XXX_CORESIGHT_BASE                  0x7A000000      /* CoreSight */
-#define CNS3XXX_CORESIGHT_BASE_VIRT             0xFFF0E000
 #define CNS3XXX_CRYPTO_BASE                     0x7B000000      /* Crypto */
-#define CNS3XXX_CRYPTO_BASE_VIRT                0xFFF0F000
 #define CNS3XXX_I2S_BASE                        0x7C000000      /* I2S */
-#define CNS3XXX_I2S_BASE_VIRT                   0xFFF10000
 #define CNS3XXX_TIMER1_2_3_BASE                 0x7C800000      /* Timer */
 #define CNS3XXX_TIMER1_2_3_BASE_VIRT            0xFB003000
@@ -150,42 +135,31 @@
 #define TIMER_FREERUN_CONTROL_OFFSET            0x44
 #define CNS3XXX_HCIE_BASE                       0x7D000000      /* HCIE Control */
-#define CNS3XXX_HCIE_BASE_VIRT                  0xFFF30000
 #define CNS3XXX_RAID_BASE                       0x7E000000      /* RAID Control */
-#define CNS3XXX_RAID_BASE_VIRT                  0xFFF12000
 #define CNS3XXX_AXI_IXC_BASE                    0x7F000000      /* AXI IXC */
-#define CNS3XXX_AXI_IXC_BASE_VIRT               0xFFF13000
 #define CNS3XXX_CLCD_BASE                       0x80000000      /* LCD Control */
-#define CNS3XXX_CLCD_BASE_VIRT                  0xFFF14000
 #define CNS3XXX_USBOTG_BASE                     0x81000000      /* USB OTG Control */
-#define CNS3XXX_USBOTG_BASE_VIRT                0xFFF15000
 #define CNS3XXX_USB_BASE                        0x82000000      /* USB Host Control */
 #define CNS3XXX_SATA2_BASE                      0x83000000      /* SATA */
 #define CNS3XXX_SATA2_SIZE                      SZ_16M
-#define CNS3XXX_SATA2_BASE_VIRT                 0xFFF17000
 #define CNS3XXX_CAMERA_BASE                     0x84000000      /* Camera Interface */
-#define CNS3XXX_CAMERA_BASE_VIRT                0xFFF18000
 #define CNS3XXX_SDIO_BASE                       0x85000000      /* SDIO */
-#define CNS3XXX_SDIO_BASE_VIRT                  0xFFF19000
 #define CNS3XXX_I2S_TDM_BASE                    0x86000000      /* I2S TDM */
-#define CNS3XXX_I2S_TDM_BASE_VIRT               0xFFF1A000
 #define CNS3XXX_2DG_BASE                        0x87000000      /* 2D Graphic Control */
-#define CNS3XXX_2DG_BASE_VIRT                   0xFFF1B000
 #define CNS3XXX_USB_OHCI_BASE                   0x88000000      /* USB OHCI */
 #define CNS3XXX_L2C_BASE                        0x92000000      /* L2 Cache Control */
-#define CNS3XXX_L2C_BASE_VIRT                   0xFFF27000
 #define CNS3XXX_PCIE0_MEM_BASE                  0xA0000000      /* PCIe Port 0 IO/Memory Space */
 #define CNS3XXX_PCIE0_MEM_BASE_VIRT             0xE0000000
@@ -239,7 +213,6 @@
 #define CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT       (CNS3XXX_TC11MP_SCU_BASE_VIRT + 0x1000)
 #define CNS3XXX_TC11MP_L220_BASE                0x92002000      /* L220 registers */
-#define CNS3XXX_TC11MP_L220_BASE_VIRT           0xFF002000
 /*
 * Misc block
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index fb5c1aa98a63..dd1ffccc75e9 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -37,7 +37,6 @@ obj-$(CONFIG_MACH_MITYOMAPL138)		+= board-mityomapl138.o
 obj-$(CONFIG_MACH_OMAPL138_HAWKBOARD)   += board-omapl138-hawk.o
 # Power Management
-obj-$(CONFIG_CPU_FREQ)                  += cpufreq.o
 obj-$(CONFIG_CPU_IDLE)                  += cpuidle.o
 obj-$(CONFIG_SUSPEND)                   += pm.o sleep.o
 obj-$(CONFIG_HAVE_CLK)                  += pm_domain.o
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index 147b8e1a4407..886481c12173 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -242,6 +242,73 @@ static struct vpfe_config vpfe_cfg = {
        .ccdc = "DM355 CCDC",
 };
+/* venc standards timings */
+static struct vpbe_enc_mode_info dm355evm_enc_preset_timing[] = {
+        {
+                .name           = "ntsc",
+                .timings_type   = VPBE_ENC_STD,
+                .std_id         = V4L2_STD_NTSC,
+                .interlaced     = 1,
+                .xres           = 720,
+                .yres           = 480,
+                .aspect         = {11, 10},
+                .fps            = {30000, 1001},
+                .left_margin    = 0x79,
+                .upper_margin   = 0x10,
+        },
+        {
+                .name           = "pal",
+                .timings_type   = VPBE_ENC_STD,
+                .std_id         = V4L2_STD_PAL,
+                .interlaced     = 1,
+                .xres           = 720,
+                .yres           = 576,
+                .aspect         = {54, 59},
+                .fps            = {25, 1},
+                .left_margin    = 0x7E,
+                .upper_margin   = 0x16
+        },
+};
+#define VENC_STD_ALL    (V4L2_STD_NTSC | V4L2_STD_PAL)
+/*
+ * The outputs available from VPBE + ecnoders. Keep the
+ * the order same as that of encoders. First those from venc followed by that
+ * from encoders. Index in the output refers to index on a particular encoder.
+ * Driver uses this index to pass it to encoder when it supports more than
+ * one output. Application uses index of the array to set an output.
+ */
+static struct vpbe_output dm355evm_vpbe_outputs[] = {
+        {
+                .output         = {
+                        .index          = 0,
+                        .name           = "Composite",
+                        .type           = V4L2_OUTPUT_TYPE_ANALOG,
+                        .std            = VENC_STD_ALL,
+                        .capabilities   = V4L2_OUT_CAP_STD,
+                },
+                .subdev_name    = DM355_VPBE_VENC_SUBDEV_NAME,
+                .default_mode   = "ntsc",
+                .num_modes      = ARRAY_SIZE(dm355evm_enc_preset_timing),
+                .modes          = dm355evm_enc_preset_timing,
+                .if_params      = V4L2_MBUS_FMT_FIXED,
+        },
+};
+static struct vpbe_config dm355evm_display_cfg = {
+        .module_name    = "dm355-vpbe-display",
+        .i2c_adapter_id = 1,
+        .osd            = {
+                .module_name    = DM355_VPBE_OSD_SUBDEV_NAME,
+        },
+        .venc           = {
+                .module_name    = DM355_VPBE_VENC_SUBDEV_NAME,
+        },
+        .num_outputs    = ARRAY_SIZE(dm355evm_vpbe_outputs),
+        .outputs        = dm355evm_vpbe_outputs,
+};
 static struct platform_device *davinci_evm_devices[] __initdata = {
        &dm355evm_dm9000,
        &davinci_nand_device,
@@ -253,8 +320,6 @@ static struct davinci_uart_config uart_config __initdata = {
 static void __init dm355_evm_map_io(void)
 {
-        /* setup input configuration for VPFE input devices */
-        dm355_set_vpfe_config(&vpfe_cfg);
        dm355_init();
 }
@@ -344,6 +409,8 @@ static __init void dm355_evm_init(void)
        davinci_setup_mmc(0, &dm355evm_mmc_config);
        davinci_setup_mmc(1, &dm355evm_mmc_config);
+        dm355_init_video(&vpfe_cfg, &dm355evm_display_cfg);
        dm355_init_spi0(BIT(0), dm355_evm_spi_info,
                        ARRAY_SIZE(dm355_evm_spi_info));
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index c2d4958a0cb6..2a6674356585 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -27,6 +27,7 @@
 #include <linux/input.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/eeprom.h>
+#include <linux/v4l2-dv-timings.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -39,6 +40,7 @@
 #include <linux/platform_data/mtd-davinci.h>
 #include <linux/platform_data/keyscan-davinci.h>
+#include <media/ths7303.h>
 #include <media/tvp514x.h>
 #include "davinci.h"
@@ -374,6 +376,166 @@ static struct vpfe_config vpfe_cfg = {
        .ccdc = "ISIF",
 };
+/* venc standards timings */
+static struct vpbe_enc_mode_info dm365evm_enc_std_timing[] = {
+        {
+                .name           = "ntsc",
+                .timings_type   = VPBE_ENC_STD,
+                .std_id         = V4L2_STD_NTSC,
+                .interlaced     = 1,
+                .xres           = 720,
+                .yres           = 480,
+                .aspect         = {11, 10},
+                .fps            = {30000, 1001},
+                .left_margin    = 0x79,
+                .upper_margin   = 0x10,
+        },
+        {
+                .name           = "pal",
+                .timings_type   = VPBE_ENC_STD,
+                .std_id         = V4L2_STD_PAL,
+                .interlaced     = 1,
+                .xres           = 720,
+                .yres           = 576,
+                .aspect         = {54, 59},
+                .fps            = {25, 1},
+                .left_margin    = 0x7E,
+                .upper_margin   = 0x16,
+        },
+};
+/* venc dv timings */
+static struct vpbe_enc_mode_info dm365evm_enc_preset_timing[] = {
+        {
+                .name           = "480p59_94",
+                .timings_type   = VPBE_ENC_DV_TIMINGS,
+                .dv_timings     = V4L2_DV_BT_CEA_720X480P59_94,
+                .interlaced     = 0,
+                .xres           = 720,
+                .yres           = 480,
+                .aspect         = {1, 1},
+                .fps            = {5994, 100},
+                .left_margin    = 0x8F,
+                .upper_margin   = 0x2D,
+        },
+        {
+                .name           = "576p50",
+                .timings_type   = VPBE_ENC_DV_TIMINGS,
+                .dv_timings     = V4L2_DV_BT_CEA_720X576P50,
+                .interlaced     = 0,
+                .xres           = 720,
+                .yres           = 576,
+                .aspect         = {1, 1},
+                .fps            = {50, 1},
+                .left_margin    = 0x8C,
+                .upper_margin   = 0x36,
+        },
+        {
+                .name           = "720p60",
+                .timings_type   = VPBE_ENC_DV_TIMINGS,
+                .dv_timings     = V4L2_DV_BT_CEA_1280X720P60,
+                .interlaced     = 0,
+                .xres           = 1280,
+                .yres           = 720,
+                .aspect         = {1, 1},
+                .fps            = {60, 1},
+                .left_margin    = 0x117,
+                .right_margin   = 70,
+                .upper_margin   = 38,
+                .lower_margin   = 3,
+                .hsync_len      = 80,
+                .vsync_len      = 5,
+        },
+        {
+                .name           = "1080i60",
+                .timings_type   = VPBE_ENC_DV_TIMINGS,
+                .dv_timings     = V4L2_DV_BT_CEA_1920X1080I60,
+                .interlaced     = 1,
+                .xres           = 1920,
+                .yres           = 1080,
+                .aspect         = {1, 1},
+                .fps            = {30, 1},
+                .left_margin    = 0xc9,
+                .right_margin   = 80,
+                .upper_margin   = 30,
+                .lower_margin   = 3,
+                .hsync_len      = 88,
+                .vsync_len      = 5,
+        },
+};
+#define VENC_STD_ALL    (V4L2_STD_NTSC | V4L2_STD_PAL)
+/*
+ * The outputs available from VPBE + ecnoders. Keep the
+ * the order same as that of encoders. First those from venc followed by that
+ * from encoders. Index in the output refers to index on a particular
+ * encoder.Driver uses this index to pass it to encoder when it supports more
+ * than one output. Application uses index of the array to set an output.
+ */
+static struct vpbe_output dm365evm_vpbe_outputs[] = {
+        {
+                .output         = {
+                        .index          = 0,
+                        .name           = "Composite",
+                        .type           = V4L2_OUTPUT_TYPE_ANALOG,
+                        .std            = VENC_STD_ALL,
+                        .capabilities   = V4L2_OUT_CAP_STD,
+                },
+                .subdev_name    = DM365_VPBE_VENC_SUBDEV_NAME,
+                .default_mode   = "ntsc",
+                .num_modes      = ARRAY_SIZE(dm365evm_enc_std_timing),
+                .modes          = dm365evm_enc_std_timing,
+                .if_params      = V4L2_MBUS_FMT_FIXED,
+        },
+        {
+                .output         = {
+                        .index          = 1,
+                        .name           = "Component",
+                        .type           = V4L2_OUTPUT_TYPE_ANALOG,
+                        .capabilities   = V4L2_OUT_CAP_DV_TIMINGS,
+                },
+                .subdev_name    = DM365_VPBE_VENC_SUBDEV_NAME,
+                .default_mode   = "480p59_94",
+                .num_modes      = ARRAY_SIZE(dm365evm_enc_preset_timing),
+                .modes          = dm365evm_enc_preset_timing,
+                .if_params      = V4L2_MBUS_FMT_FIXED,
+        },
+};
+/*
+ * Amplifiers on the board
+ */
+struct ths7303_platform_data ths7303_pdata = {
+        .ch_1 = 3,
+        .ch_2 = 3,
+        .ch_3 = 3,
+        .init_enable = 1,
+};
+static struct amp_config_info vpbe_amp = {
+        .module_name    = "ths7303",
+        .is_i2c         = 1,
+        .board_info     = {
+                I2C_BOARD_INFO("ths7303", 0x2c),
+                .platform_data = &ths7303_pdata,
+        }
+};
+static struct vpbe_config dm365evm_display_cfg = {
+        .module_name    = "dm365-vpbe-display",
+        .i2c_adapter_id = 1,
+        .amp            = &vpbe_amp,
+        .osd            = {
+                .module_name    = DM365_VPBE_OSD_SUBDEV_NAME,
+        },
+        .venc           = {
+                .module_name    = DM365_VPBE_VENC_SUBDEV_NAME,
+        },
+        .num_outputs    = ARRAY_SIZE(dm365evm_vpbe_outputs),
+        .outputs        = dm365evm_vpbe_outputs,
+};
 static void __init evm_init_i2c(void)
 {
        davinci_init_i2c(&i2c_pdata);
@@ -564,8 +726,6 @@ static struct davinci_uart_config uart_config __initdata = {
 static void __init dm365_evm_map_io(void)
 {
-        /* setup input configuration for VPFE input devices */
-        dm365_set_vpfe_config(&vpfe_cfg);
        dm365_init();
 }
@@ -597,6 +757,8 @@ static __init void dm365_evm_init(void)
        davinci_setup_mmc(0, &dm365evm_mmc_config);
+        dm365_init_video(&vpfe_cfg, &dm365evm_display_cfg);
        /* maybe setup mmc1/etc ... _after_ mmc0 */
        evm_init_cpld();
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index 71735e7797cc..745280d4144c 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -622,7 +622,7 @@ static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
        {
                .name           = "ntsc",
                .timings_type   = VPBE_ENC_STD,
-                .std_id         = V4L2_STD_525_60,
+                .std_id         = V4L2_STD_NTSC,
                .interlaced     = 1,
                .xres           = 720,
                .yres           = 480,
@@ -634,7 +634,7 @@ static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
        {
                .name           = "pal",
                .timings_type   = VPBE_ENC_STD,
-                .std_id         = V4L2_STD_625_50,
+                .std_id         = V4L2_STD_PAL,
                .interlaced     = 1,
                .xres           = 720,
                .yres           = 576,
@@ -649,7 +649,7 @@ static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
 static struct vpbe_enc_mode_info dm644xevm_enc_preset_timing[] = {
        {
                .name           = "480p59_94",
-                .timings_type   = VPBE_ENC_CUSTOM_TIMINGS,
+                .timings_type   = VPBE_ENC_DV_TIMINGS,
                .dv_timings     = V4L2_DV_BT_CEA_720X480P59_94,
                .interlaced     = 0,
                .xres           = 720,
@@ -661,7 +661,7 @@ static struct vpbe_enc_mode_info dm644xevm_enc_preset_timing[] = {
        },
        {
                .name           = "576p50",
-                .timings_type   = VPBE_ENC_CUSTOM_TIMINGS,
+                .timings_type   = VPBE_ENC_DV_TIMINGS,
                .dv_timings     = V4L2_DV_BT_CEA_720X576P50,
                .interlaced     = 0,
                .xres           = 720,
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index de7adff324dc..fc4871ac1c2c 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -514,7 +514,7 @@ static const struct vpif_output dm6467_ch0_outputs[] = {
                        .index = 1,
                        .name = "Component",
                        .type = V4L2_OUTPUT_TYPE_ANALOG,
-                        .capabilities = V4L2_OUT_CAP_CUSTOM_TIMINGS,
+                        .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
                },
                .subdev_name = "adv7343",
                .output_route = ADV7343_COMPONENT_ID,
diff --git a/arch/arm/mach-davinci/cpufreq.c b/arch/arm/mach-davinci/cpufreq.c
deleted file mode 100644
index 4729eaab0f40..000000000000
--- a/arch/arm/mach-davinci/cpufreq.c
+++ /dev/null
@@ -1,248 +0,0 @@
-/*
- * CPU frequency scaling for DaVinci
- *
- * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
- *
- * Based on linux/arch/arm/plat-omap/cpu-omap.c. Original Copyright follows:
- *
- *  Copyright (C) 2005 Nokia Corporation
- *  Written by Tony Lindgren <tony@atomide.com>
- *
- *  Based on cpu-sa1110.c, Copyright (C) 2001 Russell King
- *
- * Copyright (C) 2007-2008 Texas Instruments, Inc.
- * Updated to support OMAP3
- * Rajendra Nayak <rnayak@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/types.h>
-#include <linux/cpufreq.h>
-#include <linux/init.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/platform_device.h>
-#include <linux/export.h>
-#include <mach/hardware.h>
-#include <mach/cpufreq.h>
-#include <mach/common.h>
-#include "clock.h"
-struct davinci_cpufreq {
-        struct device *dev;
-        struct clk *armclk;
-        struct clk *asyncclk;
-        unsigned long asyncrate;
-};
-static struct davinci_cpufreq cpufreq;
-static int davinci_verify_speed(struct cpufreq_policy *policy)
-{
-        struct davinci_cpufreq_config *pdata = cpufreq.dev->platform_data;
-        struct cpufreq_frequency_table *freq_table = pdata->freq_table;
-        struct clk *armclk = cpufreq.armclk;
-        if (freq_table)
-                return cpufreq_frequency_table_verify(policy, freq_table);
-        if (policy->cpu)
-                return -EINVAL;
-        cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
-                                     policy->cpuinfo.max_freq);
-        policy->min = clk_round_rate(armclk, policy->min * 1000) / 1000;
-        policy->max = clk_round_rate(armclk, policy->max * 1000) / 1000;
-        cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
-                                                policy->cpuinfo.max_freq);
-        return 0;
-}
-static unsigned int davinci_getspeed(unsigned int cpu)
-{
-        if (cpu)
-                return 0;
-        return clk_get_rate(cpufreq.armclk) / 1000;
-}
-static int davinci_target(struct cpufreq_policy *policy,
-                                unsigned int target_freq, unsigned int relation)
-{
-        int ret = 0;
-        unsigned int idx;
-        struct cpufreq_freqs freqs;
-        struct davinci_cpufreq_config *pdata = cpufreq.dev->platform_data;
-        struct clk *armclk = cpufreq.armclk;
-        /*
-         * Ensure desired rate is within allowed range.  Some govenors
-         * (ondemand) will just pass target_freq=0 to get the minimum.
-         */
-        if (target_freq < policy->cpuinfo.min_freq)
-                target_freq = policy->cpuinfo.min_freq;
-        if (target_freq > policy->cpuinfo.max_freq)
-                target_freq = policy->cpuinfo.max_freq;
-        freqs.old = davinci_getspeed(0);
-        freqs.new = clk_round_rate(armclk, target_freq * 1000) / 1000;
-        freqs.cpu = 0;
-        if (freqs.old == freqs.new)
-                return ret;
-        dev_dbg(cpufreq.dev, "transition: %u --> %u\n", freqs.old, freqs.new);
-        ret = cpufreq_frequency_table_target(policy, pdata->freq_table,
-                                                freqs.new, relation, &idx);
-        if (ret)
-                return -EINVAL;
-        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-        /* if moving to higher frequency, up the voltage beforehand */
-        if (pdata->set_voltage && freqs.new > freqs.old) {
-                ret = pdata->set_voltage(idx);
-                if (ret)
-                        goto out;
-        }
-        ret = clk_set_rate(armclk, idx);
-        if (ret)
-                goto out;
-        if (cpufreq.asyncclk) {
-                ret = clk_set_rate(cpufreq.asyncclk, cpufreq.asyncrate);
-                if (ret)
-                        goto out;
-        }
-        /* if moving to lower freq, lower the voltage after lowering freq */
-        if (pdata->set_voltage && freqs.new < freqs.old)
-                pdata->set_voltage(idx);
-out:
-        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-        return ret;
-}
-static int davinci_cpu_init(struct cpufreq_policy *policy)
-{
-        int result = 0;
-        struct davinci_cpufreq_config *pdata = cpufreq.dev->platform_data;
-        struct cpufreq_frequency_table *freq_table = pdata->freq_table;
-        if (policy->cpu != 0)
-                return -EINVAL;
-        /* Finish platform specific initialization */
-        if (pdata->init) {
-                result = pdata->init();
-                if (result)
-                        return result;
-        }
-        policy->cur = policy->min = policy->max = davinci_getspeed(0);
-        if (freq_table) {
-                result = cpufreq_frequency_table_cpuinfo(policy, freq_table);
-                if (!result)
-                        cpufreq_frequency_table_get_attr(freq_table,
-                                                        policy->cpu);
-        } else {
-                policy->cpuinfo.min_freq = policy->min;
-                policy->cpuinfo.max_freq = policy->max;
-        }
-        policy->min = policy->cpuinfo.min_freq;
-        policy->max = policy->cpuinfo.max_freq;
-        policy->cur = davinci_getspeed(0);
-        /*
-         * Time measurement across the target() function yields ~1500-1800us
-         * time taken with no drivers on notification list.
-         * Setting the latency to 2000 us to accommodate addition of drivers
-         * to pre/post change notification list.
-         */
-        policy->cpuinfo.transition_latency = 2000 * 1000;
-        return 0;
-}
-static int davinci_cpu_exit(struct cpufreq_policy *policy)
-{
-        cpufreq_frequency_table_put_attr(policy->cpu);
-        return 0;
-}
-static struct freq_attr *davinci_cpufreq_attr[] = {
-        &cpufreq_freq_attr_scaling_available_freqs,
-        NULL,
-};
-static struct cpufreq_driver davinci_driver = {
-        .flags          = CPUFREQ_STICKY,
-        .verify         = davinci_verify_speed,
-        .target         = davinci_target,
-        .get            = davinci_getspeed,
-        .init           = davinci_cpu_init,
-        .exit           = davinci_cpu_exit,
-        .name           = "davinci",
-        .attr           = davinci_cpufreq_attr,
-};
-static int __init davinci_cpufreq_probe(struct platform_device *pdev)
-{
-        struct davinci_cpufreq_config *pdata = pdev->dev.platform_data;
-        struct clk *asyncclk;
-        if (!pdata)
-                return -EINVAL;
-        if (!pdata->freq_table)
-                return -EINVAL;
-        cpufreq.dev = &pdev->dev;
-        cpufreq.armclk = clk_get(NULL, "arm");
-        if (IS_ERR(cpufreq.armclk)) {
-                dev_err(cpufreq.dev, "Unable to get ARM clock\n");
-                return PTR_ERR(cpufreq.armclk);
-        }
-        asyncclk = clk_get(cpufreq.dev, "async");
-        if (!IS_ERR(asyncclk)) {
-                cpufreq.asyncclk = asyncclk;
-                cpufreq.asyncrate = clk_get_rate(asyncclk);
-        }
-        return cpufreq_register_driver(&davinci_driver);
-}
-static int __exit davinci_cpufreq_remove(struct platform_device *pdev)
-{
-        clk_put(cpufreq.armclk);
-        if (cpufreq.asyncclk)
-                clk_put(cpufreq.asyncclk);
-        return cpufreq_unregister_driver(&davinci_driver);
-}
-static struct platform_driver davinci_cpufreq_driver = {
-        .driver = {
-                .name    = "cpufreq-davinci",
-                .owner   = THIS_MODULE,
-        },
-        .remove = __exit_p(davinci_cpufreq_remove),
-};
-int __init davinci_cpufreq_init(void)
-{
-        return platform_driver_probe(&davinci_cpufreq_driver,
-                                                        davinci_cpufreq_probe);
-}
diff --git a/arch/arm/mach-davinci/cpuidle.c b/arch/arm/mach-davinci/cpuidle.c
index 5ac9e9384b15..36aef3a7dedb 100644
--- a/arch/arm/mach-davinci/cpuidle.c
+++ b/arch/arm/mach-davinci/cpuidle.c
@@ -25,7 +25,6 @@
 #define DAVINCI_CPUIDLE_MAX_STATES      2
-static DEFINE_PER_CPU(struct cpuidle_device, davinci_cpuidle_device);
 static void __iomem *ddr2_reg_base;
 static bool ddr2_pdown;
@@ -50,14 +49,10 @@ static void davinci_save_ddr_power(int enter, bool pdown)
 /* Actual code that puts the SoC in different idle states */
 static int davinci_enter_idle(struct cpuidle_device *dev,
-                                struct cpuidle_driver *drv,
+                              struct cpuidle_driver *drv, int index)
-                                                int index)
 {
        davinci_save_ddr_power(1, ddr2_pdown);
+        cpu_do_idle();
-        index = cpuidle_wrap_enter(dev, drv, index,
-                                arm_cpuidle_simple_enter);
        davinci_save_ddr_power(0, ddr2_pdown);
        return index;
@@ -66,7 +61,6 @@ static int davinci_enter_idle(struct cpuidle_device *dev,
 static struct cpuidle_driver davinci_idle_driver = {
        .name                   = "cpuidle-davinci",
        .owner                  = THIS_MODULE,
-        .en_core_tk_irqen       = 1,
        .states[0]              = ARM_CPUIDLE_WFI_STATE,
        .states[1]              = {
                .enter                  = davinci_enter_idle,
@@ -81,12 +75,8 @@ static struct cpuidle_driver davinci_idle_driver = {
 static int __init davinci_cpuidle_probe(struct platform_device *pdev)
 {
-        int ret;
-        struct cpuidle_device *device;
        struct davinci_cpuidle_config *pdata = pdev->dev.platform_data;
-        device = &per_cpu(davinci_cpuidle_device, smp_processor_id());
        if (!pdata) {
                dev_err(&pdev->dev, "cannot get platform data\n");
                return -ENOENT;
@@ -96,20 +86,7 @@ static int __init davinci_cpuidle_probe(struct platform_device *pdev)
        ddr2_pdown = pdata->ddr2_pdown;
-        ret = cpuidle_register_driver(&davinci_idle_driver);
+        return cpuidle_register(&davinci_idle_driver, NULL);
-        if (ret) {
-                dev_err(&pdev->dev, "failed to register driver\n");
-                return ret;
-        }
-        ret = cpuidle_register_device(device);
-        if (ret) {
-                dev_err(&pdev->dev, "failed to register device\n");
-                cpuidle_unregister_driver(&davinci_idle_driver);
-                return ret;
-        }
-        return 0;
 }
 static struct platform_driver davinci_cpuidle_driver = {
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index 12d544befcfa..1ab3df423dac 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -36,12 +36,19 @@
 #include <media/davinci/vpbe_osd.h>
 #define DAVINCI_SYSTEM_MODULE_BASE      0x01c40000
+#define SYSMOD_VDAC_CONFIG              0x2c
 #define SYSMOD_VIDCLKCTL                0x38
 #define SYSMOD_VPSS_CLKCTL              0x44
 #define SYSMOD_VDD3P3VPWDN              0x48
 #define SYSMOD_VSCLKDIS                 0x6c
 #define SYSMOD_PUPDCTL1                 0x7c
+/* VPSS CLKCTL bit definitions */
+#define VPSS_MUXSEL_EXTCLK_ENABLE       BIT(1)
+#define VPSS_VENCCLKEN_ENABLE           BIT(3)
+#define VPSS_DACCLKEN_ENABLE            BIT(4)
+#define VPSS_PLLC2SYSCLK5_ENABLE        BIT(5)
 extern void __iomem *davinci_sysmod_base;
 #define DAVINCI_SYSMOD_VIRT(x)  (davinci_sysmod_base + (x))
 void davinci_map_sysmod(void);
@@ -74,7 +81,7 @@ void __init dm355_init(void);
 void dm355_init_spi0(unsigned chipselect_mask,
                const struct spi_board_info *info, unsigned len);
 void __init dm355_init_asp1(u32 evt_enable, struct snd_platform_data *pdata);
-void dm355_set_vpfe_config(struct vpfe_config *cfg);
+int dm355_init_video(struct vpfe_config *, struct vpbe_config *);
 /* DM365 function declarations */
 void __init dm365_init(void);
@@ -84,7 +91,7 @@ void __init dm365_init_ks(struct davinci_ks_platform_data *pdata);
 void __init dm365_init_rtc(void);
 void dm365_init_spi0(unsigned chipselect_mask,
                        const struct spi_board_info *info, unsigned len);
-void dm365_set_vpfe_config(struct vpfe_config *cfg);
+int dm365_init_video(struct vpfe_config *, struct vpbe_config *);
 /* DM644x function declarations */
 void __init dm644x_init(void);
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index b49c3b77d55e..bf9a9d4ad9f5 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -35,6 +35,8 @@
 #include "asp.h"
 #define DM355_UART2_BASE        (IO_PHYS + 0x206000)
+#define DM355_OSD_BASE          (IO_PHYS + 0x70200)
+#define DM355_VENC_BASE         (IO_PHYS + 0x70400)
 /*
 * Device specific clocks
@@ -345,8 +347,8 @@ static struct clk_lookup dm355_clks[] = {
        CLK(NULL, "pll1_aux", &pll1_aux_clk),
        CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp),
        CLK(NULL, "vpss_dac", &vpss_dac_clk),
-        CLK(NULL, "vpss_master", &vpss_master_clk),
+        CLK("vpss", "master", &vpss_master_clk),
-        CLK(NULL, "vpss_slave", &vpss_slave_clk),
+        CLK("vpss", "slave", &vpss_slave_clk),
        CLK(NULL, "clkout1", &clkout1_clk),
        CLK(NULL, "clkout2", &clkout2_clk),
        CLK(NULL, "pll2", &pll2_clk),
@@ -744,11 +746,146 @@ static struct platform_device vpfe_capture_dev = {
        },
 };
-void dm355_set_vpfe_config(struct vpfe_config *cfg)
+static struct resource dm355_osd_resources[] = {
+        {
+                .start  = DM355_OSD_BASE,
+                .end    = DM355_OSD_BASE + 0x17f,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+static struct platform_device dm355_osd_dev = {
+        .name           = DM355_VPBE_OSD_SUBDEV_NAME,
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(dm355_osd_resources),
+        .resource       = dm355_osd_resources,
+        .dev            = {
+                .dma_mask               = &vpfe_capture_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+};
+static struct resource dm355_venc_resources[] = {
+        {
+                .start  = IRQ_VENCINT,
+                .end    = IRQ_VENCINT,
+                .flags  = IORESOURCE_IRQ,
+        },
+        /* venc registers io space */
+        {
+                .start  = DM355_VENC_BASE,
+                .end    = DM355_VENC_BASE + 0x17f,
+                .flags  = IORESOURCE_MEM,
+        },
+        /* VDAC config register io space */
+        {
+                .start  = DAVINCI_SYSTEM_MODULE_BASE + SYSMOD_VDAC_CONFIG,
+                .end    = DAVINCI_SYSTEM_MODULE_BASE + SYSMOD_VDAC_CONFIG + 3,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+static struct resource dm355_v4l2_disp_resources[] = {
+        {
+                .start  = IRQ_VENCINT,
+                .end    = IRQ_VENCINT,
+                .flags  = IORESOURCE_IRQ,
+        },
+        /* venc registers io space */
+        {
+                .start  = DM355_VENC_BASE,
+                .end    = DM355_VENC_BASE + 0x17f,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+static int dm355_vpbe_setup_pinmux(enum v4l2_mbus_pixelcode if_type,
+                            int field)
+{
+        switch (if_type) {
+        case V4L2_MBUS_FMT_SGRBG8_1X8:
+                davinci_cfg_reg(DM355_VOUT_FIELD_G70);
+                break;
+        case V4L2_MBUS_FMT_YUYV10_1X20:
+                if (field)
+                        davinci_cfg_reg(DM355_VOUT_FIELD);
+                else
+                        davinci_cfg_reg(DM355_VOUT_FIELD_G70);
+                break;
+        default:
+                return -EINVAL;
+        }
+        davinci_cfg_reg(DM355_VOUT_COUTL_EN);
+        davinci_cfg_reg(DM355_VOUT_COUTH_EN);
+        return 0;
+}
+static int dm355_venc_setup_clock(enum vpbe_enc_timings_type type,
+                                   unsigned int pclock)
 {
-        vpfe_capture_dev.dev.platform_data = cfg;
+        void __iomem *vpss_clk_ctrl_reg;
+        vpss_clk_ctrl_reg = DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL);
+        switch (type) {
+        case VPBE_ENC_STD:
+                writel(VPSS_DACCLKEN_ENABLE | VPSS_VENCCLKEN_ENABLE,
+                       vpss_clk_ctrl_reg);
+                break;
+        case VPBE_ENC_DV_TIMINGS:
+                if (pclock > 27000000)
+                        /*
+                         * For HD, use external clock source since we cannot
+                         * support HD mode with internal clocks.
+                         */
+                        writel(VPSS_MUXSEL_EXTCLK_ENABLE, vpss_clk_ctrl_reg);
+                break;
+        default:
+                return -EINVAL;
+        }
+        return 0;
 }
+static struct platform_device dm355_vpbe_display = {
+        .name           = "vpbe-v4l2",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(dm355_v4l2_disp_resources),
+        .resource       = dm355_v4l2_disp_resources,
+        .dev            = {
+                .dma_mask               = &vpfe_capture_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+};
+struct venc_platform_data dm355_venc_pdata = {
+        .setup_pinmux   = dm355_vpbe_setup_pinmux,
+        .setup_clock    = dm355_venc_setup_clock,
+};
+static struct platform_device dm355_venc_dev = {
+        .name           = DM355_VPBE_VENC_SUBDEV_NAME,
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(dm355_venc_resources),
+        .resource       = dm355_venc_resources,
+        .dev            = {
+                .dma_mask               = &vpfe_capture_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                .platform_data          = (void *)&dm355_venc_pdata,
+        },
+};
+static struct platform_device dm355_vpbe_dev = {
+        .name           = "vpbe_controller",
+        .id             = -1,
+        .dev            = {
+                .dma_mask               = &vpfe_capture_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+};
 /*----------------------------------------------------------------------*/
 static struct map_desc dm355_io_desc[] = {
@@ -868,19 +1005,36 @@ void __init dm355_init(void)
        davinci_map_sysmod();
 }
+int __init dm355_init_video(struct vpfe_config *vpfe_cfg,
+                                struct vpbe_config *vpbe_cfg)
+{
+        if (vpfe_cfg || vpbe_cfg)
+                platform_device_register(&dm355_vpss_device);
+        if (vpfe_cfg) {
+                vpfe_capture_dev.dev.platform_data = vpfe_cfg;
+                platform_device_register(&dm355_ccdc_dev);
+                platform_device_register(&vpfe_capture_dev);
+        }
+        if (vpbe_cfg) {
+                dm355_vpbe_dev.dev.platform_data = vpbe_cfg;
+                platform_device_register(&dm355_osd_dev);
+                platform_device_register(&dm355_venc_dev);
+                platform_device_register(&dm355_vpbe_dev);
+                platform_device_register(&dm355_vpbe_display);
+        }
+        return 0;
+}
 static int __init dm355_init_devices(void)
 {
        if (!cpu_is_davinci_dm355())
                return 0;
-        /* Add ccdc clock aliases */
-        clk_add_alias("master", dm355_ccdc_dev.name, "vpss_master", NULL);
-        clk_add_alias("slave", dm355_ccdc_dev.name, "vpss_master", NULL);
        davinci_cfg_reg(DM355_INT_EDMA_CC);
        platform_device_register(&dm355_edma_device);
-        platform_device_register(&dm355_vpss_device);
-        platform_device_register(&dm355_ccdc_dev);
-        platform_device_register(&vpfe_capture_dev);
        return 0;
 }
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 6c3980540be0..ff771ceac3f1 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -39,16 +39,13 @@
 #include "asp.h"
 #define DM365_REF_FREQ          24000000        /* 24 MHz on the DM365 EVM */
-/* Base of key scan register bank */
-#define DM365_KEYSCAN_BASE              0x01c69400
 #define DM365_RTC_BASE                  0x01c69000
+#define DM365_KEYSCAN_BASE              0x01c69400
+#define DM365_OSD_BASE                  0x01c71c00
+#define DM365_VENC_BASE                 0x01c71e00
 #define DAVINCI_DM365_VC_BASE           0x01d0c000
 #define DAVINCI_DMA_VC_TX               2
 #define DAVINCI_DMA_VC_RX               3
 #define DM365_EMAC_BASE                 0x01d07000
 #define DM365_EMAC_MDIO_BASE            (DM365_EMAC_BASE + 0x4000)
 #define DM365_EMAC_CNTRL_OFFSET         0x0000
@@ -257,6 +254,12 @@ static struct clk vpss_master_clk = {
        .flags          = CLK_PSC,
 };
+static struct clk vpss_slave_clk = {
+        .name           = "vpss_slave",
+        .parent         = &pll1_sysclk5,
+        .lpsc           = DAVINCI_LPSC_VPSSSLV,
+};
 static struct clk arm_clk = {
        .name           = "arm_clk",
        .parent         = &pll2_sysclk2,
@@ -449,7 +452,8 @@ static struct clk_lookup dm365_clks[] = {
        CLK(NULL, "pll2_sysclk8", &pll2_sysclk8),
        CLK(NULL, "pll2_sysclk9", &pll2_sysclk9),
        CLK(NULL, "vpss_dac", &vpss_dac_clk),
-        CLK(NULL, "vpss_master", &vpss_master_clk),
+        CLK("vpss", "master", &vpss_master_clk),
+        CLK("vpss", "slave", &vpss_slave_clk),
        CLK(NULL, "arm", &arm_clk),
        CLK(NULL, "uart0", &uart0_clk),
        CLK(NULL, "uart1", &uart1_clk),
@@ -1226,6 +1230,173 @@ static struct platform_device dm365_isif_dev = {
        },
 };
+static struct resource dm365_osd_resources[] = {
+        {
+                .start = DM365_OSD_BASE,
+                .end   = DM365_OSD_BASE + 0xff,
+                .flags = IORESOURCE_MEM,
+        },
+};
+static u64 dm365_video_dma_mask = DMA_BIT_MASK(32);
+static struct platform_device dm365_osd_dev = {
+        .name           = DM365_VPBE_OSD_SUBDEV_NAME,
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(dm365_osd_resources),
+        .resource       = dm365_osd_resources,
+        .dev            = {
+                .dma_mask               = &dm365_video_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+};
+static struct resource dm365_venc_resources[] = {
+        {
+                .start = IRQ_VENCINT,
+                .end   = IRQ_VENCINT,
+                .flags = IORESOURCE_IRQ,
+        },
+        /* venc registers io space */
+        {
+                .start = DM365_VENC_BASE,
+                .end   = DM365_VENC_BASE + 0x177,
+                .flags = IORESOURCE_MEM,
+        },
+        /* vdaccfg registers io space */
+        {
+                .start = DAVINCI_SYSTEM_MODULE_BASE + SYSMOD_VDAC_CONFIG,
+                .end   = DAVINCI_SYSTEM_MODULE_BASE + SYSMOD_VDAC_CONFIG + 3,
+                .flags = IORESOURCE_MEM,
+        },
+};
+static struct resource dm365_v4l2_disp_resources[] = {
+        {
+                .start = IRQ_VENCINT,
+                .end   = IRQ_VENCINT,
+                .flags = IORESOURCE_IRQ,
+        },
+        /* venc registers io space */
+        {
+                .start = DM365_VENC_BASE,
+                .end   = DM365_VENC_BASE + 0x177,
+                .flags = IORESOURCE_MEM,
+        },
+};
+static int dm365_vpbe_setup_pinmux(enum v4l2_mbus_pixelcode if_type,
+                            int field)
+{
+        switch (if_type) {
+        case V4L2_MBUS_FMT_SGRBG8_1X8:
+                davinci_cfg_reg(DM365_VOUT_FIELD_G81);
+                davinci_cfg_reg(DM365_VOUT_COUTL_EN);
+                davinci_cfg_reg(DM365_VOUT_COUTH_EN);
+                break;
+        case V4L2_MBUS_FMT_YUYV10_1X20:
+                if (field)
+                        davinci_cfg_reg(DM365_VOUT_FIELD);
+                else
+                        davinci_cfg_reg(DM365_VOUT_FIELD_G81);
+                davinci_cfg_reg(DM365_VOUT_COUTL_EN);
+                davinci_cfg_reg(DM365_VOUT_COUTH_EN);
+                break;
+        default:
+                return -EINVAL;
+        }
+        return 0;
+}
+static int dm365_venc_setup_clock(enum vpbe_enc_timings_type type,
+                                  unsigned int pclock)
+{
+        void __iomem *vpss_clkctl_reg;
+        u32 val;
+        vpss_clkctl_reg = DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL);
+        switch (type) {
+        case VPBE_ENC_STD:
+                val = VPSS_VENCCLKEN_ENABLE | VPSS_DACCLKEN_ENABLE;
+                break;
+        case VPBE_ENC_DV_TIMINGS:
+                if (pclock <= 27000000) {
+                        val = VPSS_VENCCLKEN_ENABLE | VPSS_DACCLKEN_ENABLE;
+                } else {
+                        /* set sysclk4 to output 74.25 MHz from pll1 */
+                        val = VPSS_PLLC2SYSCLK5_ENABLE | VPSS_DACCLKEN_ENABLE |
+                              VPSS_VENCCLKEN_ENABLE;
+                }
+                break;
+        default:
+                return -EINVAL;
+        }
+        writel(val, vpss_clkctl_reg);
+        return 0;
+}
+static struct platform_device dm365_vpbe_display = {
+        .name           = "vpbe-v4l2",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(dm365_v4l2_disp_resources),
+        .resource       = dm365_v4l2_disp_resources,
+        .dev            = {
+                .dma_mask               = &dm365_video_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+};
+struct venc_platform_data dm365_venc_pdata = {
+        .setup_pinmux   = dm365_vpbe_setup_pinmux,
+        .setup_clock    = dm365_venc_setup_clock,
+};
+static struct platform_device dm365_venc_dev = {
+        .name           = DM365_VPBE_VENC_SUBDEV_NAME,
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(dm365_venc_resources),
+        .resource       = dm365_venc_resources,
+        .dev            = {
+                .dma_mask               = &dm365_video_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+                .platform_data          = (void *)&dm365_venc_pdata,
+        },
+};
+static struct platform_device dm365_vpbe_dev = {
+        .name           = "vpbe_controller",
+        .id             = -1,
+        .dev            = {
+                .dma_mask               = &dm365_video_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+};
+int __init dm365_init_video(struct vpfe_config *vpfe_cfg,
+                                struct vpbe_config *vpbe_cfg)
+{
+        if (vpfe_cfg || vpbe_cfg)
+                platform_device_register(&dm365_vpss_device);
+        if (vpfe_cfg) {
+                vpfe_capture_dev.dev.platform_data = vpfe_cfg;
+                platform_device_register(&dm365_isif_dev);
+                platform_device_register(&vpfe_capture_dev);
+        }
+        if (vpbe_cfg) {
+                dm365_vpbe_dev.dev.platform_data = vpbe_cfg;
+                platform_device_register(&dm365_osd_dev);
+                platform_device_register(&dm365_venc_dev);
+                platform_device_register(&dm365_vpbe_dev);
+                platform_device_register(&dm365_vpbe_display);
+        }
+        return 0;
+}
 static int __init dm365_init_devices(void)
 {
        if (!cpu_is_davinci_dm365())
@@ -1239,16 +1410,6 @@ static int __init dm365_init_devices(void)
        clk_add_alias(NULL, dev_name(&dm365_mdio_device.dev),
                      NULL, &dm365_emac_device.dev);
-        /* Add isif clock alias */
-        clk_add_alias("master", dm365_isif_dev.name, "vpss_master", NULL);
-        platform_device_register(&dm365_vpss_device);
-        platform_device_register(&dm365_isif_dev);
-        platform_device_register(&vpfe_capture_dev);
        return 0;
 }
 postcore_initcall(dm365_init_devices);
-void dm365_set_vpfe_config(struct vpfe_config *cfg)
-{
-       vpfe_capture_dev.dev.platform_data = cfg;
-}
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index db1dd92e00af..c2a9273330bf 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -300,8 +300,8 @@ static struct clk_lookup dm644x_clks[] = {
        CLK(NULL, "dsp", &dsp_clk),
        CLK(NULL, "arm", &arm_clk),
        CLK(NULL, "vicp", &vicp_clk),
-        CLK(NULL, "vpss_master", &vpss_master_clk),
+        CLK("vpss", "master", &vpss_master_clk),
-        CLK(NULL, "vpss_slave", &vpss_slave_clk),
+        CLK("vpss", "slave", &vpss_slave_clk),
        CLK(NULL, "arm", &arm_clk),
        CLK(NULL, "uart0", &uart0_clk),
        CLK(NULL, "uart1", &uart1_clk),
@@ -706,7 +706,7 @@ static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type,
                v |= DM644X_VPSS_DACCLKEN;
                writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
                break;
-        case VPBE_ENC_CUSTOM_TIMINGS:
+        case VPBE_ENC_DV_TIMINGS:
                if (pclock <= 27000000) {
                        v |= DM644X_VPSS_DACCLKEN;
                        writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
@@ -901,11 +901,6 @@ int __init dm644x_init_video(struct vpfe_config *vpfe_cfg,
                dm644x_vpfe_dev.dev.platform_data = vpfe_cfg;
                platform_device_register(&dm644x_ccdc_dev);
                platform_device_register(&dm644x_vpfe_dev);
-                /* Add ccdc clock aliases */
-                clk_add_alias("master", dm644x_ccdc_dev.name,
-                              "vpss_master", NULL);
-                clk_add_alias("slave", dm644x_ccdc_dev.name,
-                              "vpss_slave", NULL);
        }
        if (vpbe_cfg) {
diff --git a/arch/arm/mach-davinci/pm_domain.c b/arch/arm/mach-davinci/pm_domain.c
index c90250e3bef8..6b98413cebd6 100644
--- a/arch/arm/mach-davinci/pm_domain.c
+++ b/arch/arm/mach-davinci/pm_domain.c
@@ -53,7 +53,7 @@ static struct dev_pm_domain davinci_pm_domain = {
 static struct pm_clk_notifier_block platform_bus_notifier = {
        .pm_domain = &davinci_pm_domain,
-        .con_ids = { "fck", NULL, },
+        .con_ids = { "fck", "master", "slave", NULL },
 };
 static int __init davinci_pm_runtime_init(void)
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 0a6c127f834c..42378fb90167 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -72,10 +72,12 @@ config SOC_EXYNOS5440
        bool "SAMSUNG EXYNOS5440"
        default y
        depends on ARCH_EXYNOS5
+        select ARCH_HAS_OPP
        select ARM_ARCH_TIMER
        select AUTO_ZRELADDR
        select PINCTRL
        select PINCTRL_EXYNOS5440
+        select PM_OPP
        help
          Enable EXYNOS5440 SoC support
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index fcfe0251aa3e..498a7a23e260 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -58,7 +58,6 @@ static DEFINE_PER_CPU(struct cpuidle_device, exynos4_cpuidle_device);
 static struct cpuidle_driver exynos4_idle_driver = {
        .name                   = "exynos4_idle",
        .owner                  = THIS_MODULE,
-        .en_core_tk_irqen       = 1,
 };
 /* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index 497fcb793dc1..d28c7fbaba2d 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -97,6 +97,19 @@ static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
 static struct regulator_consumer_supply max8952_consumer =
        REGULATOR_SUPPLY("vdd_arm", NULL);
+static struct regulator_init_data universal_max8952_reg_data = {
+        .constraints    = {
+                .name           = "VARM_1.2V",
+                .min_uV         = 770000,
+                .max_uV         = 1400000,
+                .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
+                .always_on      = 1,
+                .boot_on        = 1,
+        },
+        .num_consumer_supplies  = 1,
+        .consumer_supplies      = &max8952_consumer,
+};
 static struct max8952_platform_data universal_max8952_pdata __initdata = {
        .gpio_vid0      = EXYNOS4_GPX0(3),
        .gpio_vid1      = EXYNOS4_GPX0(4),
@@ -105,19 +118,7 @@ static struct max8952_platform_data universal_max8952_pdata __initdata = {
        .dvs_mode       = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
        .sync_freq      = 0, /* default: fastest */
        .ramp_speed     = 0, /* default: fastest */
+        .reg_data       = &universal_max8952_reg_data,
-        .reg_data       = {
-                .constraints    = {
-                        .name           = "VARM_1.2V",
-                        .min_uV         = 770000,
-                        .max_uV         = 1400000,
-                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
-                        .always_on      = 1,
-                        .boot_on        = 1,
-                },
-                .num_consumer_supplies  = 1,
-                .consumer_supplies      = &max8952_consumer,
-        },
 };
 static struct regulator_consumer_supply lp3974_buck1_consumer =
diff --git a/arch/arm/mach-exynos/setup-usb-phy.c b/arch/arm/mach-exynos/setup-usb-phy.c
index b81cc569a8dd..6af40662a449 100644
--- a/arch/arm/mach-exynos/setup-usb-phy.c
+++ b/arch/arm/mach-exynos/setup-usb-phy.c
@@ -204,9 +204,9 @@ static int exynos4210_usb_phy1_exit(struct platform_device *pdev)
 int s5p_usb_phy_init(struct platform_device *pdev, int type)
 {
-        if (type == S5P_USB_PHY_DEVICE)
+        if (type == USB_PHY_TYPE_DEVICE)
                return exynos4210_usb_phy0_init(pdev);
-        else if (type == S5P_USB_PHY_HOST)
+        else if (type == USB_PHY_TYPE_HOST)
                return exynos4210_usb_phy1_init(pdev);
        return -EINVAL;
@@ -214,9 +214,9 @@ int s5p_usb_phy_init(struct platform_device *pdev, int type)
 int s5p_usb_phy_exit(struct platform_device *pdev, int type)
 {
-        if (type == S5P_USB_PHY_DEVICE)
+        if (type == USB_PHY_TYPE_DEVICE)
                return exynos4210_usb_phy0_exit(pdev);
-        else if (type == S5P_USB_PHY_HOST)
+        else if (type == USB_PHY_TYPE_HOST)
                return exynos4210_usb_phy1_exit(pdev);
        return -EINVAL;
diff --git a/arch/arm/mach-gemini/idle.c b/arch/arm/mach-gemini/idle.c
index 92bbd6bb600a..87dff4f5059e 100644
--- a/arch/arm/mach-gemini/idle.c
+++ b/arch/arm/mach-gemini/idle.c
@@ -13,9 +13,11 @@ static void gemini_idle(void)
         * will never wakeup... Acctualy it is not very good to enable
         * interrupts first since scheduler can miss a tick, but there is
         * no other way around this. Platforms that needs it for power saving
-         * should call enable_hlt() in init code, since by default it is
+         * should enable it in init code, since by default it is
         * disabled.
         */
+        /* FIXME: Enabling interrupts here is racy! */
        local_irq_enable();
        cpu_do_idle();
 }
diff --git a/arch/arm/mach-gemini/irq.c b/arch/arm/mach-gemini/irq.c
index 30bef116691e..44f50dcb616d 100644
--- a/arch/arm/mach-gemini/irq.c
+++ b/arch/arm/mach-gemini/irq.c
@@ -15,6 +15,8 @@
 #include <linux/stddef.h>
 #include <linux/list.h>
 #include <linux/sched.h>
+#include <linux/cpu.h>
 #include <asm/irq.h>
 #include <asm/mach/irq.h>
 #include <asm/system_misc.h>
@@ -77,7 +79,7 @@ void __init gemini_init_irq(void)
         * Disable the idle handler by default since it is buggy
         * For more info see arch/arm/mach-gemini/idle.c
         */
-        disable_hlt();
+        cpu_idle_poll_ctrl(true);
        request_resource(&iomem_resource, &irq_resource);
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 23555b0c08a9..fbe60a145344 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -29,7 +29,7 @@ obj-$(CONFIG_MXC_USE_EPIT) += epit.o
 obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o
 ifeq ($(CONFIG_CPU_IDLE),y)
-obj-y += cpuidle.o
+obj-$(CONFIG_SOC_IMX5) += cpuidle-imx5.o
 obj-$(CONFIG_SOC_IMX6Q) += cpuidle-imx6q.o
 endif
diff --git a/arch/arm/mach-imx/avic.c b/arch/arm/mach-imx/avic.c
index 49c87e7aa817..e163ec7a8441 100644
--- a/arch/arm/mach-imx/avic.c
+++ b/arch/arm/mach-imx/avic.c
@@ -51,7 +51,7 @@
 #define AVIC_NUM_IRQS 64
-void __iomem *avic_base;
+static void __iomem *avic_base;
 static struct irq_domain *domain;
 #ifdef CONFIG_MXC_IRQ_PRIOR
diff --git a/arch/arm/mach-imx/clk-busy.c b/arch/arm/mach-imx/clk-busy.c
index 85b728cc27ab..4bb1bc419b79 100644
--- a/arch/arm/mach-imx/clk-busy.c
+++ b/arch/arm/mach-imx/clk-busy.c
@@ -147,7 +147,7 @@ static int clk_busy_mux_set_parent(struct clk_hw *hw, u8 index)
        return ret;
 }
-struct clk_ops clk_busy_mux_ops = {
+static struct clk_ops clk_busy_mux_ops = {
        .get_parent = clk_busy_mux_get_parent,
        .set_parent = clk_busy_mux_set_parent,
 };
diff --git a/arch/arm/mach-imx/clk-gate2.c b/arch/arm/mach-imx/clk-gate2.c
index cc49c7ae186e..a63e415609a8 100644
--- a/arch/arm/mach-imx/clk-gate2.c
+++ b/arch/arm/mach-imx/clk-gate2.c
@@ -15,6 +15,7 @@
 #include <linux/io.h>
 #include <linux/err.h>
 #include <linux/string.h>
+#include "clk.h"
 /**
 * DOC: basic gatable clock which can gate and ungate it's ouput
diff --git a/arch/arm/mach-imx/clk-pllv1.c b/arch/arm/mach-imx/clk-pllv1.c
index abff350ba24c..c1eaee346954 100644
--- a/arch/arm/mach-imx/clk-pllv1.c
+++ b/arch/arm/mach-imx/clk-pllv1.c
@@ -78,7 +78,7 @@ static unsigned long clk_pllv1_recalc_rate(struct clk_hw *hw,
        return ll;
 }
-struct clk_ops clk_pllv1_ops = {
+static struct clk_ops clk_pllv1_ops = {
        .recalc_rate = clk_pllv1_recalc_rate,
 };
diff --git a/arch/arm/mach-imx/clk-pllv2.c b/arch/arm/mach-imx/clk-pllv2.c
index 0440379e3628..20889d59b44d 100644
--- a/arch/arm/mach-imx/clk-pllv2.c
+++ b/arch/arm/mach-imx/clk-pllv2.c
@@ -229,7 +229,7 @@ static void clk_pllv2_unprepare(struct clk_hw *hw)
        __raw_writel(reg, pllbase + MXC_PLL_DP_CTL);
 }
-struct clk_ops clk_pllv2_ops = {
+static struct clk_ops clk_pllv2_ops = {
        .prepare = clk_pllv2_prepare,
        .unprepare = clk_pllv2_unprepare,
        .recalc_rate = clk_pllv2_recalc_rate,
diff --git a/arch/arm/mach-imx/clk.c b/arch/arm/mach-imx/clk.c
index f5e8be8e7f11..37e884ed1cd4 100644
--- a/arch/arm/mach-imx/clk.c
+++ b/arch/arm/mach-imx/clk.c
@@ -1,3 +1,4 @@
 #include <linux/spinlock.h>
+#include "clk.h"
 DEFINE_SPINLOCK(imx_ccm_lock);
diff --git a/arch/arm/mach-imx/cpu-imx5.c b/arch/arm/mach-imx/cpu-imx5.c
index d7ce72252a4e..c1c99a72c6a1 100644
--- a/arch/arm/mach-imx/cpu-imx5.c
+++ b/arch/arm/mach-imx/cpu-imx5.c
@@ -18,6 +18,7 @@
 #include <linux/io.h>
 #include "hardware.h"
+#include "common.h"
 static int mx5_cpu_rev = -1;
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index 03fcbd082593..e70e3acbf9bd 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -3,6 +3,7 @@
 #include <linux/io.h>
 #include "hardware.h"
+#include "common.h"
 unsigned int __mxc_cpu_type;
 EXPORT_SYMBOL(__mxc_cpu_type);
diff --git a/arch/arm/mach-imx/cpuidle-imx5.c b/arch/arm/mach-imx/cpuidle-imx5.c
new file mode 100644
index 000000000000..5a47e3c6172f
--- /dev/null
+++ b/arch/arm/mach-imx/cpuidle-imx5.c
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2012 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/cpuidle.h>
+#include <linux/module.h>
+#include <asm/system_misc.h>
+static int imx5_cpuidle_enter(struct cpuidle_device *dev,
+                              struct cpuidle_driver *drv, int index)
+{
+        arm_pm_idle();
+        return index;
+}
+static struct cpuidle_driver imx5_cpuidle_driver = {
+        .name             = "imx5_cpuidle",
+        .owner            = THIS_MODULE,
+        .states[0] = {
+                .enter            = imx5_cpuidle_enter,
+                .exit_latency     = 2,
+                .target_residency = 1,
+                .flags            = CPUIDLE_FLAG_TIME_VALID,
+                .name             = "IMX5 SRPG",
+                .desc             = "CPU state retained,powered off",
+        },
+        .state_count = 1,
+};
+int __init imx5_cpuidle_init(void)
+{
+        return cpuidle_register(&imx5_cpuidle_driver, NULL);
+}
diff --git a/arch/arm/mach-imx/cpuidle-imx6q.c b/arch/arm/mach-imx/cpuidle-imx6q.c
index d533e2695f0e..23ddfb693b2d 100644
--- a/arch/arm/mach-imx/cpuidle-imx6q.c
+++ b/arch/arm/mach-imx/cpuidle-imx6q.c
@@ -6,7 +6,6 @@
 * published by the Free Software Foundation.
 */
-#include <linux/clockchips.h>
 #include <linux/cpuidle.h>
 #include <linux/module.h>
 #include <asm/cpuidle.h>
@@ -21,10 +20,6 @@ static DEFINE_SPINLOCK(master_lock);
 static int imx6q_enter_wait(struct cpuidle_device *dev,
                            struct cpuidle_driver *drv, int index)
 {
-        int cpu = dev->cpu;
-        clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
        if (atomic_inc_return(&master) == num_online_cpus()) {
                /*
                 * With this lock, we prevent other cpu to exit and enter
@@ -43,26 +38,13 @@ idle:
        cpu_do_idle();
 done:
        atomic_dec(&master);
-        clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
        return index;
 }
-/*
- * For each cpu, setup the broadcast timer because local timer
- * stops for the states other than WFI.
- */
-static void imx6q_setup_broadcast_timer(void *arg)
-{
-        int cpu = smp_processor_id();
-        clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ON, &cpu);
-}
 static struct cpuidle_driver imx6q_cpuidle_driver = {
        .name = "imx6q_cpuidle",
        .owner = THIS_MODULE,
-        .en_core_tk_irqen = 1,
        .states = {
                /* WFI */
                ARM_CPUIDLE_WFI_STATE,
@@ -70,7 +52,8 @@ static struct cpuidle_driver imx6q_cpuidle_driver = {
                {
                        .exit_latency = 50,
                        .target_residency = 75,
-                        .flags = CPUIDLE_FLAG_TIME_VALID,
+                        .flags = CPUIDLE_FLAG_TIME_VALID |
+                                 CPUIDLE_FLAG_TIMER_STOP,
                        .enter = imx6q_enter_wait,
                        .name = "WAIT",
                        .desc = "Clock off",
@@ -88,8 +71,5 @@ int __init imx6q_cpuidle_init(void)
        /* Set chicken bit to get a reliable WAIT mode support */
        imx6q_set_chicken_bit();
-        /* Configure the broadcast timer on each cpu */
+        return cpuidle_register(&imx6q_cpuidle_driver, NULL);
-        on_each_cpu(imx6q_setup_broadcast_timer, NULL, 1);
-        return imx_cpuidle_init(&imx6q_cpuidle_driver);
 }
diff --git a/arch/arm/mach-imx/cpuidle.c b/arch/arm/mach-imx/cpuidle.c
deleted file mode 100644
index d4cb511a44a8..000000000000
--- a/arch/arm/mach-imx/cpuidle.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * Copyright 2012 Freescale Semiconductor, Inc.
- * Copyright 2012 Linaro Ltd.
- *
- * The code contained herein is licensed under the GNU General Public
- * License. You may obtain a copy of the GNU General Public License
- * Version 2 or later at the following locations:
- *
- * http://www.opensource.org/licenses/gpl-license.html
- * http://www.gnu.org/copyleft/gpl.html
- */
-#include <linux/cpuidle.h>
-#include <linux/err.h>
-#include <linux/hrtimer.h>
-#include <linux/io.h>
-#include <linux/kernel.h>
-#include <linux/slab.h>
-static struct cpuidle_device __percpu * imx_cpuidle_devices;
-static void __init imx_cpuidle_devices_uninit(void)
-{
-        int cpu_id;
-        struct cpuidle_device *dev;
-        for_each_possible_cpu(cpu_id) {
-                dev = per_cpu_ptr(imx_cpuidle_devices, cpu_id);
-                cpuidle_unregister_device(dev);
-        }
-        free_percpu(imx_cpuidle_devices);
-}
-int __init imx_cpuidle_init(struct cpuidle_driver *drv)
-{
-        struct cpuidle_device *dev;
-        int cpu_id, ret;
-        if (drv->state_count > CPUIDLE_STATE_MAX) {
-                pr_err("%s: state_count exceeds maximum\n", __func__);
-                return -EINVAL;
-        }
-        ret = cpuidle_register_driver(drv);
-        if (ret) {
-                pr_err("%s: Failed to register cpuidle driver with error: %d\n",
-                         __func__, ret);
-                return ret;
-        }
-        imx_cpuidle_devices = alloc_percpu(struct cpuidle_device);
-        if (imx_cpuidle_devices == NULL) {
-                ret = -ENOMEM;
-                goto unregister_drv;
-        }
-        /* initialize state data for each cpuidle_device */
-        for_each_possible_cpu(cpu_id) {
-                dev = per_cpu_ptr(imx_cpuidle_devices, cpu_id);
-                dev->cpu = cpu_id;
-                dev->state_count = drv->state_count;
-                ret = cpuidle_register_device(dev);
-                if (ret) {
-                        pr_err("%s: Failed to register cpu %u, error: %d\n",
-                                __func__, cpu_id, ret);
-                        goto uninit;
-                }
-        }
-        return 0;
-uninit:
-        imx_cpuidle_devices_uninit();
-unregister_drv:
-        cpuidle_unregister_driver(drv);
-        return ret;
-}
diff --git a/arch/arm/mach-imx/cpuidle.h b/arch/arm/mach-imx/cpuidle.h
index e092d1359d94..786f98ecc145 100644
--- a/arch/arm/mach-imx/cpuidle.h
+++ b/arch/arm/mach-imx/cpuidle.h
@@ -10,18 +10,16 @@
 * http://www.gnu.org/copyleft/gpl.html
 */
-#include <linux/cpuidle.h>
 #ifdef CONFIG_CPU_IDLE
-extern int imx_cpuidle_init(struct cpuidle_driver *drv);
+extern int imx5_cpuidle_init(void);
 extern int imx6q_cpuidle_init(void);
 #else
-static inline int imx_cpuidle_init(struct cpuidle_driver *drv)
+static inline int imx5_cpuidle_init(void)
 {
-        return -ENODEV;
+        return 0;
 }
 static inline int imx6q_cpuidle_init(void)
 {
-        return -ENODEV;
+        return 0;
 }
 #endif
diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
index b4c70028d359..b2f08bfbbdd3 100644
--- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
+++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
@@ -46,7 +46,7 @@ static const int eukrea_mbimx27_pins[] __initconst = {
        PE10_PF_UART3_CTS,
        PE11_PF_UART3_RTS,
        /* UART4 */
-#if !defined(MACH_EUKREA_CPUIMX27_USEUART4)
+#if !defined(CONFIG_MACH_EUKREA_CPUIMX27_USEUART4)
        PB26_AF_UART4_RTS,
        PB28_AF_UART4_TXD,
        PB29_AF_UART4_CTS,
@@ -306,7 +306,7 @@ void __init eukrea_mbimx27_baseboard_init(void)
        imx27_add_imx_uart1(&uart_pdata);
        imx27_add_imx_uart2(&uart_pdata);
-#if !defined(MACH_EUKREA_CPUIMX27_USEUART4)
+#if !defined(CONFIG_MACH_EUKREA_CPUIMX27_USEUART4)
        imx27_add_imx_uart3(&uart_pdata);
 #endif
diff --git a/arch/arm/mach-imx/gpc.c b/arch/arm/mach-imx/gpc.c
index a96ccc7f5012..02b61cdf39b9 100644
--- a/arch/arm/mach-imx/gpc.c
+++ b/arch/arm/mach-imx/gpc.c
@@ -16,6 +16,7 @@
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
 #include <linux/irqchip/arm-gic.h>
+#include "common.h"
 #define GPC_IMR1                0x008
 #define GPC_PGC_CPU_PDN         0x2a0
diff --git a/arch/arm/mach-imx/iomux-imx31.c b/arch/arm/mach-imx/iomux-imx31.c
index cabefbc5e7c1..7c66805d2cc0 100644
--- a/arch/arm/mach-imx/iomux-imx31.c
+++ b/arch/arm/mach-imx/iomux-imx31.c
@@ -40,7 +40,7 @@ static DEFINE_SPINLOCK(gpio_mux_lock);
 #define IOMUX_REG_MASK (IOMUX_PADNUM_MASK & ~0x3)
-unsigned long mxc_pin_alloc_map[NB_PORTS * 32 / BITS_PER_LONG];
+static unsigned long mxc_pin_alloc_map[NB_PORTS * 32 / BITS_PER_LONG];
 /*
 * set the mode for a IOMUX pin.
 */
diff --git a/arch/arm/mach-imx/irq-common.c b/arch/arm/mach-imx/irq-common.c
index b6e11458e5ae..4b34f52dc46b 100644
--- a/arch/arm/mach-imx/irq-common.c
+++ b/arch/arm/mach-imx/irq-common.c
@@ -21,25 +21,6 @@
 #include "irq-common.h"
-int imx_irq_set_priority(unsigned char irq, unsigned char prio)
-{
-        struct irq_chip_generic *gc;
-        struct mxc_extra_irq *exirq;
-        int ret;
-        ret = -ENOSYS;
-        gc = irq_get_chip_data(irq);
-        if (gc && gc->private) {
-                exirq = gc->private;
-                if (exirq->set_priority)
-                        ret = exirq->set_priority(irq, prio);
-        }
-        return ret;
-}
-EXPORT_SYMBOL(imx_irq_set_priority);
 int mxc_set_irq_fiq(unsigned int irq, unsigned int type)
 {
        struct irq_chip_generic *gc;
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c
index 146559311bd2..ea50870bda80 100644
--- a/arch/arm/mach-imx/mach-cpuimx27.c
+++ b/arch/arm/mach-imx/mach-cpuimx27.c
@@ -48,7 +48,7 @@ static const int eukrea_cpuimx27_pins[] __initconst = {
        PE14_PF_UART1_CTS,
        PE15_PF_UART1_RTS,
        /* UART4 */
-#if defined(MACH_EUKREA_CPUIMX27_USEUART4)
+#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USEUART4)
        PB26_AF_UART4_RTS,
        PB28_AF_UART4_TXD,
        PB29_AF_UART4_CTS,
@@ -272,7 +272,7 @@ static void __init eukrea_cpuimx27_init(void)
        /* SDHC2 can be used for Wifi */
        imx27_add_mxc_mmc(1, NULL);
 #endif
-#if defined(MACH_EUKREA_CPUIMX27_USEUART4)
+#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USEUART4)
        /* in which case UART4 is also used for Bluetooth */
        imx27_add_imx_uart3(&uart_pdata);
 #endif
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index b59ddcb57c78..99502eeefdf7 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -72,7 +72,7 @@ static int imx6q_revision(void)
        }
 }
-void imx6q_restart(char mode, const char *cmd)
+static void imx6q_restart(char mode, const char *cmd)
 {
        struct device_node *np;
        void __iomem *wdog_base;
@@ -255,7 +255,7 @@ put_node:
        of_node_put(np);
 }
-struct platform_device imx6q_cpufreq_pdev = {
+static struct platform_device imx6q_cpufreq_pdev = {
        .name = "imx6q-cpufreq",
 };
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index cefa047c4053..e0e69a682174 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -82,7 +82,7 @@ static void __iomem *imx3_ioremap_caller(unsigned long phys_addr, size_t size,
        return __arm_ioremap_caller(phys_addr, size, mtype, caller);
 }
-void __init imx3_init_l2x0(void)
+static void __init imx3_init_l2x0(void)
 {
 #ifdef CONFIG_CACHE_L2X0
        void __iomem *l2x0_base;
diff --git a/arch/arm/mach-imx/pm-imx5.c b/arch/arm/mach-imx/pm-imx5.c
index f67fd7ee8127..82e79c658eb2 100644
--- a/arch/arm/mach-imx/pm-imx5.c
+++ b/arch/arm/mach-imx/pm-imx5.c
@@ -149,33 +149,6 @@ static void imx5_pm_idle(void)
        imx5_cpu_do_idle();
 }
-static int imx5_cpuidle_enter(struct cpuidle_device *dev,
-                                struct cpuidle_driver *drv, int idx)
-{
-        int ret;
-        ret = imx5_cpu_do_idle();
-        if (ret < 0)
-                return ret;
-        return idx;
-}
-static struct cpuidle_driver imx5_cpuidle_driver = {
-        .name                   = "imx5_cpuidle",
-        .owner                  = THIS_MODULE,
-        .en_core_tk_irqen       = 1,
-        .states[0]      = {
-                .enter                  = imx5_cpuidle_enter,
-                .exit_latency           = 2,
-                .target_residency       = 1,
-                .flags                  = CPUIDLE_FLAG_TIME_VALID,
-                .name                   = "IMX5 SRPG",
-                .desc                   = "CPU state retained,powered off",
-        },
-        .state_count            = 1,
-};
 static int __init imx5_pm_common_init(void)
 {
        int ret;
@@ -193,8 +166,7 @@ static int __init imx5_pm_common_init(void)
        /* Set the registers to the default cpu idle state. */
        mx5_cpu_lp_set(IMX5_DEFAULT_CPU_IDLE_STATE);
-        imx_cpuidle_init(&imx5_cpuidle_driver);
+        return imx5_cpuidle_init();
-        return 0;
 }
 void __init imx51_pm_init(void)
diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c
index 09a742f8c7ab..324731c2a441 100644
--- a/arch/arm/mach-imx/src.c
+++ b/arch/arm/mach-imx/src.c
@@ -16,6 +16,7 @@
 #include <linux/of_address.h>
 #include <linux/smp.h>
 #include <asm/smp_plat.h>
+#include "common.h"
 #define SRC_SCR                         0x000
 #define SRC_GPR1                        0x020
diff --git a/arch/arm/mach-imx/tzic.c b/arch/arm/mach-imx/tzic.c
index 9721161f208f..8183178d5aa3 100644
--- a/arch/arm/mach-imx/tzic.c
+++ b/arch/arm/mach-imx/tzic.c
@@ -49,7 +49,7 @@
 #define TZIC_SWINT      0x0F00  /* Software Interrupt Rigger Register */
 #define TZIC_ID0        0x0FD0  /* Indentification Register 0 */
-void __iomem *tzic_base; /* Used as irq controller base in entry-macro.S */
+static void __iomem *tzic_base;
 static struct irq_domain *domain;
 #define TZIC_NUM_IRQS 128
diff --git a/arch/arm/mach-integrator/Makefile b/arch/arm/mach-integrator/Makefile
index 5521d18bf19a..d14d6b76f4c2 100644
--- a/arch/arm/mach-integrator/Makefile
+++ b/arch/arm/mach-integrator/Makefile
@@ -9,5 +9,4 @@ obj-$(CONFIG_ARCH_INTEGRATOR_AP)	+= integrator_ap.o
 obj-$(CONFIG_ARCH_INTEGRATOR_CP)        += integrator_cp.o
 obj-$(CONFIG_PCI)                       += pci_v3.o pci.o
-obj-$(CONFIG_CPU_FREQ_INTEGRATOR)       += cpu.o
 obj-$(CONFIG_INTEGRATOR_IMPD1)          += impd1.o
diff --git a/arch/arm/mach-integrator/cpu.c b/arch/arm/mach-integrator/cpu.c
deleted file mode 100644
index 590c192cdf4d..000000000000
--- a/arch/arm/mach-integrator/cpu.c
+++ /dev/null
@@ -1,224 +0,0 @@
-/*
- *  linux/arch/arm/mach-integrator/cpu.c
- *
- *  Copyright (C) 2001-2002 Deep Blue Solutions Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * CPU support functions
- */
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/cpufreq.h>
-#include <linux/sched.h>
-#include <linux/smp.h>
-#include <linux/init.h>
-#include <linux/io.h>
-#include <mach/hardware.h>
-#include <mach/platform.h>
-#include <asm/mach-types.h>
-#include <asm/hardware/icst.h>
-static struct cpufreq_driver integrator_driver;
-#define CM_ID   __io_address(INTEGRATOR_HDR_ID)
-#define CM_OSC  __io_address(INTEGRATOR_HDR_OSC)
-#define CM_STAT __io_address(INTEGRATOR_HDR_STAT)
-#define CM_LOCK __io_address(INTEGRATOR_HDR_LOCK)
-static const struct icst_params lclk_params = {
-        .ref            = 24000000,
-        .vco_max        = ICST525_VCO_MAX_5V,
-        .vco_min        = ICST525_VCO_MIN,
-        .vd_min         = 8,
-        .vd_max         = 132,
-        .rd_min         = 24,
-        .rd_max         = 24,
-        .s2div          = icst525_s2div,
-        .idx2s          = icst525_idx2s,
-};
-static const struct icst_params cclk_params = {
-        .ref            = 24000000,
-        .vco_max        = ICST525_VCO_MAX_5V,
-        .vco_min        = ICST525_VCO_MIN,
-        .vd_min         = 12,
-        .vd_max         = 160,
-        .rd_min         = 24,
-        .rd_max         = 24,
-        .s2div          = icst525_s2div,
-        .idx2s          = icst525_idx2s,
-};
-/*
- * Validate the speed policy.
- */
-static int integrator_verify_policy(struct cpufreq_policy *policy)
-{
-        struct icst_vco vco;
-        cpufreq_verify_within_limits(policy, 
-                                     policy->cpuinfo.min_freq, 
-                                     policy->cpuinfo.max_freq);
-        vco = icst_hz_to_vco(&cclk_params, policy->max * 1000);
-        policy->max = icst_hz(&cclk_params, vco) / 1000;
-        vco = icst_hz_to_vco(&cclk_params, policy->min * 1000);
-        policy->min = icst_hz(&cclk_params, vco) / 1000;
-        cpufreq_verify_within_limits(policy, 
-                                     policy->cpuinfo.min_freq, 
-                                     policy->cpuinfo.max_freq);
-        return 0;
-}
-static int integrator_set_target(struct cpufreq_policy *policy,
-                                 unsigned int target_freq,
-                                 unsigned int relation)
-{
-        cpumask_t cpus_allowed;
-        int cpu = policy->cpu;
-        struct icst_vco vco;
-        struct cpufreq_freqs freqs;
-        u_int cm_osc;
-        /*
-         * Save this threads cpus_allowed mask.
-         */
-        cpus_allowed = current->cpus_allowed;
-        /*
-         * Bind to the specified CPU.  When this call returns,
-         * we should be running on the right CPU.
-         */
-        set_cpus_allowed(current, cpumask_of_cpu(cpu));
-        BUG_ON(cpu != smp_processor_id());
-        /* get current setting */
-        cm_osc = __raw_readl(CM_OSC);
-        if (machine_is_integrator()) {
-                vco.s = (cm_osc >> 8) & 7;
-        } else if (machine_is_cintegrator()) {
-                vco.s = 1;
-        }
-        vco.v = cm_osc & 255;
-        vco.r = 22;
-        freqs.old = icst_hz(&cclk_params, vco) / 1000;
-        /* icst_hz_to_vco rounds down -- so we need the next
-         * larger freq in case of CPUFREQ_RELATION_L.
-         */
-        if (relation == CPUFREQ_RELATION_L)
-                target_freq += 999;
-        if (target_freq > policy->max)
-                target_freq = policy->max;
-        vco = icst_hz_to_vco(&cclk_params, target_freq * 1000);
-        freqs.new = icst_hz(&cclk_params, vco) / 1000;
-        freqs.cpu = policy->cpu;
-        if (freqs.old == freqs.new) {
-                set_cpus_allowed(current, cpus_allowed);
-                return 0;
-        }
-        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-        cm_osc = __raw_readl(CM_OSC);
-        if (machine_is_integrator()) {
-                cm_osc &= 0xfffff800;
-                cm_osc |= vco.s << 8;
-        } else if (machine_is_cintegrator()) {
-                cm_osc &= 0xffffff00;
-        }
-        cm_osc |= vco.v;
-        __raw_writel(0xa05f, CM_LOCK);
-        __raw_writel(cm_osc, CM_OSC);
-        __raw_writel(0, CM_LOCK);
-        /*
-         * Restore the CPUs allowed mask.
-         */
-        set_cpus_allowed(current, cpus_allowed);
-        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-        return 0;
-}
-static unsigned int integrator_get(unsigned int cpu)
-{
-        cpumask_t cpus_allowed;
-        unsigned int current_freq;
-        u_int cm_osc;
-        struct icst_vco vco;
-        cpus_allowed = current->cpus_allowed;
-        set_cpus_allowed(current, cpumask_of_cpu(cpu));
-        BUG_ON(cpu != smp_processor_id());
-        /* detect memory etc. */
-        cm_osc = __raw_readl(CM_OSC);
-        if (machine_is_integrator()) {
-                vco.s = (cm_osc >> 8) & 7;
-        } else {
-                vco.s = 1;
-        }
-        vco.v = cm_osc & 255;
-        vco.r = 22;
-        current_freq = icst_hz(&cclk_params, vco) / 1000; /* current freq */
-        set_cpus_allowed(current, cpus_allowed);
-        return current_freq;
-}
-static int integrator_cpufreq_init(struct cpufreq_policy *policy)
-{
-        /* set default policy and cpuinfo */
-        policy->cpuinfo.max_freq = 160000;
-        policy->cpuinfo.min_freq = 12000;
-        policy->cpuinfo.transition_latency = 1000000; /* 1 ms, assumed */
-        policy->cur = policy->min = policy->max = integrator_get(policy->cpu);
-        return 0;
-}
-static struct cpufreq_driver integrator_driver = {
-        .verify         = integrator_verify_policy,
-        .target         = integrator_set_target,
-        .get            = integrator_get,
-        .init           = integrator_cpufreq_init,
-        .name           = "integrator",
-};
-static int __init integrator_cpu_init(void)
-{
-        return cpufreq_register_driver(&integrator_driver);
-}
-static void __exit integrator_cpu_exit(void)
-{
-        cpufreq_unregister_driver(&integrator_driver);
-}
-MODULE_AUTHOR ("Russell M. King");
-MODULE_DESCRIPTION ("cpufreq driver for ARM Integrator CPUs");
-MODULE_LICENSE ("GPL");
-module_init(integrator_cpu_init);
-module_exit(integrator_cpu_exit);
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index 1dbeb7c99d58..6600cff6bd92 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -29,6 +29,7 @@
 #include <linux/io.h>
 #include <linux/export.h>
 #include <linux/gpio.h>
+#include <linux/cpu.h>
 #include <mach/udc.h>
 #include <mach/hardware.h>
@@ -239,7 +240,7 @@ void __init ixp4xx_init_irq(void)
         * ixp4xx does not implement the XScale PWRMODE register
         * so it must not call cpu_do_idle().
         */
-        disable_hlt();
+        cpu_idle_poll_ctrl(true);
        /* Route all sources to IRQ instead of FIQ */
        *IXP4XX_ICLR = 0x0;
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index 9f64d5632e07..76901f4ce611 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -223,13 +223,7 @@ static struct pxa27x_keypad_platform_data aspenite_keypad_info __initdata = {
 };
 #if defined(CONFIG_USB_EHCI_MV)
-static char *pxa168_sph_clock_name[] = {
-        [0] = "PXA168-USBCLK",
-};
 static struct mv_usb_platform_data pxa168_sph_pdata = {
-        .clknum         = 1,
-        .clkname        = pxa168_sph_clock_name,
        .mode           = MV_USB_MODE_HOST,
        .phy_init       = pxa_usb_phy_init,
        .phy_deinit     = pxa_usb_phy_deinit,
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index 22a9058f9f4d..6528a5fa6a26 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -162,13 +162,7 @@ static struct i2c_board_info ttc_dkb_i2c_info[] = {
 #ifdef CONFIG_USB_SUPPORT
 #if defined(CONFIG_USB_MV_UDC) || defined(CONFIG_USB_EHCI_MV_U2O)
-static char *pxa910_usb_clock_name[] = {
-        [0] = "U2OCLK",
-};
 static struct mv_usb_platform_data ttc_usb_pdata = {
-        .clknum         = 1,
-        .clkname        = pxa910_usb_clock_name,
        .vbus           = NULL,
        .mode           = MV_USB_MODE_OTG,
        .otg_force_a_bus_req = 1,
diff --git a/arch/arm/mach-msm/include/mach/uncompress.h b/arch/arm/mach-msm/include/mach/uncompress.h
index fa97a10d8695..94324870fb04 100644
--- a/arch/arm/mach-msm/include/mach/uncompress.h
+++ b/arch/arm/mach-msm/include/mach/uncompress.h
@@ -37,7 +37,7 @@ static void putc(int c)
         * Wait for TX_READY to be set; but skip it if we have a
         * TX underrun.
         */
-        if (UART_DM_SR & 0x08)
+        if (!(UART_DM_SR & 0x08))
                while (!(UART_DM_ISR & 0x80))
                        cpu_relax();
diff --git a/arch/arm/mach-msm/last_radio_log.c b/arch/arm/mach-msm/last_radio_log.c
index 1e243f46a969..7777767ee89a 100644
--- a/arch/arm/mach-msm/last_radio_log.c
+++ b/arch/arm/mach-msm/last_radio_log.c
@@ -31,20 +31,8 @@ extern void *smem_item(unsigned id, unsigned *size);
 static ssize_t last_radio_log_read(struct file *file, char __user *buf,
                        size_t len, loff_t *offset)
 {
-        loff_t pos = *offset;
+        return simple_read_from_buffer(buf, len, offset,
-        ssize_t count;
+                                radio_log_base, radio_log_size);
-        if (pos >= radio_log_size)
-                return 0;
-        count = min(len, (size_t)(radio_log_size - pos));
-        if (copy_to_user(buf, radio_log_base + pos, count)) {
-                pr_err("%s: copy to user failed\n", __func__);
-                return -EFAULT;
-        }
-        *offset += count;
-        return count;
 }
 static struct file_operations last_radio_log_fops = {
@@ -67,7 +55,8 @@ void msm_init_last_radio_log(struct module *owner)
                return;
        }
-        entry = create_proc_entry("last_radio_log", S_IFREG | S_IRUGO, NULL);
+        entry = proc_create("last_radio_log", S_IRUGO, NULL,
+                                &last_radio_log_fops);
        if (!entry) {
                pr_err("%s: could not create proc entry for radio log\n",
                                __func__);
@@ -77,7 +66,6 @@ void msm_init_last_radio_log(struct module *owner)
        pr_err("%s: last radio log is %d bytes long\n", __func__,
                radio_log_size);
        last_radio_log_fops.owner = owner;
-        entry->proc_fops = &last_radio_log_fops;
        entry->size = radio_log_size;
 }
 EXPORT_SYMBOL(msm_init_last_radio_log);
diff --git a/arch/arm/mach-mvebu/irq-armada-370-xp.c b/arch/arm/mach-mvebu/irq-armada-370-xp.c
index d5970f5a1e8d..830139a3e2ba 100644
--- a/arch/arm/mach-mvebu/irq-armada-370-xp.c
+++ b/arch/arm/mach-mvebu/irq-armada-370-xp.c
@@ -57,7 +57,7 @@ static struct irq_domain *armada_370_xp_mpic_domain;
 /*
 * In SMP mode:
 * For shared global interrupts, mask/unmask global enable bit
- * For CPU interrtups, mask/unmask the calling CPU's bit
+ * For CPU interrupts, mask/unmask the calling CPU's bit
 */
 static void armada_370_xp_irq_mask(struct irq_data *d)
 {
diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig
index 903da8eb886c..cdd05f2e67ee 100644
--- a/arch/arm/mach-omap1/Kconfig
+++ b/arch/arm/mach-omap1/Kconfig
@@ -55,12 +55,6 @@ config MACH_OMAP_H3
          TI OMAP 1710 H3 board support. Say Y here if you have such
          a board.
-config MACH_OMAP_HTCWIZARD
-        bool "HTC Wizard"
-        depends on ARCH_OMAP850
-        help
-          HTC Wizard smartphone support (AKA QTEK 9100, ...)
 config MACH_HERALD
        bool "HTC Herald"
        depends on ARCH_OMAP850
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c
index 7a7690ab6cb8..dd712f109738 100644
--- a/arch/arm/mach-omap1/pm.c
+++ b/arch/arm/mach-omap1/pm.c
@@ -37,12 +37,14 @@
 #include <linux/suspend.h>
 #include <linux/sched.h>
-#include <linux/proc_fs.h>
+#include <linux/debugfs.h>
+#include <linux/seq_file.h>
 #include <linux/interrupt.h>
 #include <linux/sysfs.h>
 #include <linux/module.h>
 #include <linux/io.h>
 #include <linux/atomic.h>
+#include <linux/cpu.h>
 #include <asm/fncpy.h>
 #include <asm/system_misc.h>
@@ -422,23 +424,12 @@ void omap1_pm_suspend(void)
                omap_rev());
 }
-#if defined(DEBUG) && defined(CONFIG_PROC_FS)
+#ifdef CONFIG_DEBUG_FS
-static int g_read_completed;
 /*
 * Read system PM registers for debugging
 */
-static int omap_pm_read_proc(
+static int omap_pm_debug_show(struct seq_file *m, void *v)
-        char *page_buffer,
-        char **my_first_byte,
-        off_t virtual_start,
-        int length,
-        int *eof,
-        void *data)
 {
-        int my_buffer_offset = 0;
-        char * const my_base = page_buffer;
        ARM_SAVE(ARM_CKCTL);
        ARM_SAVE(ARM_IDLECT1);
        ARM_SAVE(ARM_IDLECT2);
@@ -479,10 +470,7 @@ static int omap_pm_read_proc(
                MPUI1610_SAVE(EMIFS_CONFIG);
        }
-        if (virtual_start == 0) {
+        seq_printf(m,
-                g_read_completed = 0;
-                my_buffer_offset += sprintf(my_base + my_buffer_offset,
                   "ARM_CKCTL_REG:            0x%-8x     \n"
                   "ARM_IDLECT1_REG:          0x%-8x     \n"
                   "ARM_IDLECT2_REG:          0x%-8x     \n"
@@ -512,8 +500,8 @@ static int omap_pm_read_proc(
                   ULPD_SHOW(ULPD_STATUS_REQ),
                   ULPD_SHOW(ULPD_POWER_CTRL));
-                if (cpu_is_omap7xx()) {
+        if (cpu_is_omap7xx()) {
-                        my_buffer_offset += sprintf(my_base + my_buffer_offset,
+                seq_printf(m,
                           "MPUI7XX_CTRL_REG         0x%-8x \n"
                           "MPUI7XX_DSP_STATUS_REG:      0x%-8x \n"
                           "MPUI7XX_DSP_BOOT_CONFIG_REG: 0x%-8x \n"
@@ -526,8 +514,8 @@ static int omap_pm_read_proc(
                           MPUI7XX_SHOW(MPUI_DSP_API_CONFIG),
                           MPUI7XX_SHOW(EMIFF_SDRAM_CONFIG),
                           MPUI7XX_SHOW(EMIFS_CONFIG));
-                } else if (cpu_is_omap15xx()) {
+        } else if (cpu_is_omap15xx()) {
-                        my_buffer_offset += sprintf(my_base + my_buffer_offset,
+                seq_printf(m,
                           "MPUI1510_CTRL_REG             0x%-8x \n"
                           "MPUI1510_DSP_STATUS_REG:      0x%-8x \n"
                           "MPUI1510_DSP_BOOT_CONFIG_REG: 0x%-8x \n"
@@ -540,8 +528,8 @@ static int omap_pm_read_proc(
                           MPUI1510_SHOW(MPUI_DSP_API_CONFIG),
                           MPUI1510_SHOW(EMIFF_SDRAM_CONFIG),
                           MPUI1510_SHOW(EMIFS_CONFIG));
-                } else if (cpu_is_omap16xx()) {
+        } else if (cpu_is_omap16xx()) {
-                        my_buffer_offset += sprintf(my_base + my_buffer_offset,
+                seq_printf(m,
                           "MPUI1610_CTRL_REG             0x%-8x \n"
                           "MPUI1610_DSP_STATUS_REG:      0x%-8x \n"
                           "MPUI1610_DSP_BOOT_CONFIG_REG: 0x%-8x \n"
@@ -554,28 +542,37 @@ static int omap_pm_read_proc(
                           MPUI1610_SHOW(MPUI_DSP_API_CONFIG),
                           MPUI1610_SHOW(EMIFF_SDRAM_CONFIG),
                           MPUI1610_SHOW(EMIFS_CONFIG));
-                }
-                g_read_completed++;
-        } else if (g_read_completed >= 1) {
-                 *eof = 1;
-                 return 0;
        }
-        g_read_completed++;
-        *my_first_byte = page_buffer;
+        return 0;
-        return  my_buffer_offset;
 }
-static void omap_pm_init_proc(void)
+static int omap_pm_debug_open(struct inode *inode, struct file *file)
 {
-        /* XXX Appears to leak memory */
+        return single_open(file, omap_pm_debug_show,
-        create_proc_read_entry("driver/omap_pm",
+                                &inode->i_private);
-                               S_IWUSR | S_IRUGO, NULL,
-                               omap_pm_read_proc, NULL);
 }
-#endif /* DEBUG && CONFIG_PROC_FS */
+static const struct file_operations omap_pm_debug_fops = {
+        .open           = omap_pm_debug_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = seq_release,
+};
+static void omap_pm_init_debugfs(void)
+{
+        struct dentry *d;
+        d = debugfs_create_dir("pm_debug", NULL);
+        if (!d)
+                return;
+        (void) debugfs_create_file("omap_pm", S_IWUSR | S_IRUGO,
+                                        d, NULL, &omap_pm_debug_fops);
+}
+#endif /* CONFIG_DEBUG_FS */
 /*
 *      omap_pm_prepare - Do preliminary suspend work.
@@ -584,8 +581,7 @@ static void omap_pm_init_proc(void)
 static int omap_pm_prepare(void)
 {
        /* We cannot sleep in idle until we have resumed */
-        disable_hlt();
+        cpu_idle_poll_ctrl(true);
        return 0;
 }
@@ -621,7 +617,7 @@ static int omap_pm_enter(suspend_state_t state)
 static void omap_pm_finish(void)
 {
-        enable_hlt();
+        cpu_idle_poll_ctrl(false);
 }
@@ -701,8 +697,8 @@ static int __init omap_pm_init(void)
        suspend_set_ops(&omap_pm_ops);
-#if defined(DEBUG) && defined(CONFIG_PROC_FS)
+#ifdef CONFIG_DEBUG_FS
-        omap_pm_init_proc();
+        omap_pm_init_debugfs();
 #endif
 #ifdef CONFIG_OMAP_32K_TIMER
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 8111cd9ff3e5..4dc34ae6a857 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -55,6 +55,7 @@ config SOC_HAS_REALTIME_COUNTER
 config ARCH_OMAP2
        bool "TI OMAP2"
        depends on ARCH_OMAP2PLUS
+        depends on ARCH_MULTI_V6
        default y
        select CPU_V6
        select MULTI_IRQ_HANDLER
@@ -64,6 +65,7 @@ config ARCH_OMAP2
 config ARCH_OMAP3
        bool "TI OMAP3"
        depends on ARCH_OMAP2PLUS
+        depends on ARCH_MULTI_V7
        default y
        select ARCH_HAS_OPP
        select ARM_CPU_SUSPEND if PM
@@ -80,6 +82,7 @@ config ARCH_OMAP4
        bool "TI OMAP4"
        default y
        depends on ARCH_OMAP2PLUS
+        depends on ARCH_MULTI_V7
        select ARCH_HAS_OPP
        select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
        select ARM_CPU_SUSPEND if PM
@@ -99,6 +102,7 @@ config ARCH_OMAP4
 config SOC_OMAP5
        bool "TI OMAP5"
+        depends on ARCH_MULTI_V7
        select ARM_CPU_SUSPEND if PM
        select ARM_GIC
        select CPU_V7
@@ -135,6 +139,7 @@ config SOC_TI81XX
 config SOC_AM33XX
        bool "AM33XX support"
+        depends on ARCH_MULTI_V7
        default y
        select ARM_CPU_SUSPEND if PM
        select CPU_V7
@@ -408,7 +413,7 @@ config OMAP3_SDRC_AC_TIMING
 config OMAP4_ERRATA_I688
        bool "OMAP4 errata: Async Bridge Corruption"
-        depends on ARCH_OMAP4 && !ARCH_MULTIPLATFORM
+        depends on (ARCH_OMAP4 || SOC_OMAP5) && !ARCH_MULTIPLATFORM
        select ARCH_HAS_BARRIERS
        help
          If a data is stalled inside asynchronous bridge because of back
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index a3e0aaa4886b..cb0596b631cf 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -166,7 +166,7 @@ static void __init sdp2430_display_init(void)
        omap_display_init(&sdp2430_dss_data);
 }
-#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91x_MODULE)
+#if IS_ENABLED(CONFIG_SMC91X)
 static struct omap_smc91x_platform_data board_smc91x_data = {
        .cs             = 5,
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 812c829fa46f..5b4ec51c385f 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -246,7 +246,7 @@ static u32 is_gpmc_muxed(void)
                return 0;
 }
-#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91x_MODULE)
+#if IS_ENABLED(CONFIG_SMC91X)
 static struct omap_smc91x_platform_data board_smc91x_data = {
        .cs             = 1,
diff --git a/arch/arm/mach-omap2/cclock33xx_data.c b/arch/arm/mach-omap2/cclock33xx_data.c
index dcc5bf57a263..332c6d3e55a9 100644
--- a/arch/arm/mach-omap2/cclock33xx_data.c
+++ b/arch/arm/mach-omap2/cclock33xx_data.c
@@ -947,6 +947,14 @@ int __init am33xx_clk_init(void)
        clk_set_parent(&timer3_fck, &sys_clkin_ck);
        clk_set_parent(&timer6_fck, &sys_clkin_ck);
+        /*
+         * The On-Chip 32K RC Osc clock is not an accurate clock-source as per
+         * the design/spec, so as a result, for example, timer which supposed
+         * to get expired @60Sec, but will expire somewhere ~@40Sec, which is
+         * not expected by any use-case, so change WDT1 clock source to PRCM
+         * 32KHz clock.
+         */
+        clk_set_parent(&wdt1_fck, &clkdiv32k_ick);
        return 0;
 }
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index d6ba13e1c540..14522d077c88 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -249,7 +249,6 @@ extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
 extern int omap4_finish_suspend(unsigned long cpu_state);
 extern void omap4_cpu_resume(void);
 extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
-extern u32 omap4_mpuss_read_prev_context_state(void);
 #else
 static inline int omap4_enter_lowpower(unsigned int cpu,
                                        unsigned int power_state)
@@ -277,10 +276,6 @@ static inline int omap4_finish_suspend(unsigned long cpu_state)
 static inline void omap4_cpu_resume(void)
 {}
-static inline u32 omap4_mpuss_read_prev_context_state(void)
-{
-        return 0;
-}
 #endif
 struct omap_sdrc_params;
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index 06f567faf993..e18709d3b95d 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -26,6 +26,7 @@
 #include <linux/cpuidle.h>
 #include <linux/export.h>
 #include <linux/cpu_pm.h>
+#include <asm/cpuidle.h>
 #include "powerdomain.h"
 #include "clockdomain.h"
@@ -99,11 +100,15 @@ static struct omap3_idle_statedata omap3_idle_data[] = {
        },
 };
-/* Private functions */
+/**
+ * omap3_enter_idle - Programs OMAP3 to enter the specified state
-static int __omap3_enter_idle(struct cpuidle_device *dev,
+ * @dev: cpuidle device
-                                struct cpuidle_driver *drv,
+ * @drv: cpuidle driver
-                                int index)
+ * @index: the index of state to be entered
+ */
+static int omap3_enter_idle(struct cpuidle_device *dev,
+                            struct cpuidle_driver *drv,
+                            int index)
 {
        struct omap3_idle_statedata *cx = &omap3_idle_data[index];
@@ -146,22 +151,6 @@ return_sleep_time:
 }
 /**
- * omap3_enter_idle - Programs OMAP3 to enter the specified state
- * @dev: cpuidle device
- * @drv: cpuidle driver
- * @index: the index of state to be entered
- *
- * Called from the CPUidle framework to program the device to the
- * specified target state selected by the governor.
- */
-static inline int omap3_enter_idle(struct cpuidle_device *dev,
-                                struct cpuidle_driver *drv,
-                                int index)
-{
-        return cpuidle_wrap_enter(dev, drv, index, __omap3_enter_idle);
-}
-/**
 * next_valid_state - Find next valid C-state
 * @dev: cpuidle device
 * @drv: cpuidle driver
@@ -268,11 +257,9 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev,
        return ret;
 }
-static DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev);
 static struct cpuidle_driver omap3_idle_driver = {
-        .name =         "omap3_idle",
+        .name             = "omap3_idle",
-        .owner =        THIS_MODULE,
+        .owner            = THIS_MODULE,
        .states = {
                {
                        .enter            = omap3_enter_idle_bm,
@@ -345,8 +332,6 @@ static struct cpuidle_driver omap3_idle_driver = {
 */
 int __init omap3_idle_init(void)
 {
-        struct cpuidle_device *dev;
        mpu_pd = pwrdm_lookup("mpu_pwrdm");
        core_pd = pwrdm_lookup("core_pwrdm");
        per_pd = pwrdm_lookup("per_pwrdm");
@@ -355,16 +340,5 @@ int __init omap3_idle_init(void)
        if (!mpu_pd || !core_pd || !per_pd || !cam_pd)
                return -ENODEV;
-        cpuidle_register_driver(&omap3_idle_driver);
+        return cpuidle_register(&omap3_idle_driver, NULL);
-        dev = &per_cpu(omap3_idle_dev, smp_processor_id());
-        dev->cpu = 0;
-        if (cpuidle_register_device(dev)) {
-                printk(KERN_ERR "%s: CPUidle register device failed\n",
-                       __func__);
-                return -EIO;
-        }
-        return 0;
 }
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c
index 9de47a70628f..c443f2e97e10 100644
--- a/arch/arm/mach-omap2/cpuidle44xx.c
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -1,7 +1,7 @@
 /*
- * OMAP4 CPU idle Routines
+ * OMAP4+ CPU idle Routines
 *
- * Copyright (C) 2011 Texas Instruments, Inc.
+ * Copyright (C) 2011-2013 Texas Instruments, Inc.
 * Santosh Shilimkar <santosh.shilimkar@ti.com>
 * Rajendra Nayak <rnayak@ti.com>
 *
@@ -14,8 +14,8 @@
 #include <linux/cpuidle.h>
 #include <linux/cpu_pm.h>
 #include <linux/export.h>
-#include <linux/clockchips.h>
+#include <asm/cpuidle.h>
 #include <asm/proc-fns.h>
 #include "common.h"
@@ -24,13 +24,13 @@
 #include "clockdomain.h"
 /* Machine specific information */
-struct omap4_idle_statedata {
+struct idle_statedata {
        u32 cpu_state;
        u32 mpu_logic_state;
        u32 mpu_state;
 };
-static struct omap4_idle_statedata omap4_idle_data[] = {
+static struct idle_statedata omap4_idle_data[] = {
        {
                .cpu_state = PWRDM_POWER_ON,
                .mpu_state = PWRDM_POWER_ON,
@@ -53,11 +53,12 @@ static struct clockdomain *cpu_clkdm[NR_CPUS];
 static atomic_t abort_barrier;
 static bool cpu_done[NR_CPUS];
+static struct idle_statedata *state_ptr = &omap4_idle_data[0];
 /* Private functions */
 /**
- * omap4_enter_idle_coupled_[simple/coupled] - OMAP4 cpuidle entry functions
+ * omap_enter_idle_[simple/coupled] - OMAP4PLUS cpuidle entry functions
 * @dev: cpuidle device
 * @drv: cpuidle driver
 * @index: the index of state to be entered
@@ -66,7 +67,7 @@ static bool cpu_done[NR_CPUS];
 * specified low power state selected by the governor.
 * Returns the amount of time spent in the low power state.
 */
-static int omap4_enter_idle_simple(struct cpuidle_device *dev,
+static int omap_enter_idle_simple(struct cpuidle_device *dev,
                        struct cpuidle_driver *drv,
                        int index)
 {
@@ -74,12 +75,11 @@ static int omap4_enter_idle_simple(struct cpuidle_device *dev,
        return index;
 }
-static int omap4_enter_idle_coupled(struct cpuidle_device *dev,
+static int omap_enter_idle_coupled(struct cpuidle_device *dev,
                        struct cpuidle_driver *drv,
                        int index)
 {
-        struct omap4_idle_statedata *cx = &omap4_idle_data[index];
+        struct idle_statedata *cx = state_ptr + index;
-        int cpu_id = smp_processor_id();
        /*
         * CPU0 has to wait and stay ON until CPU1 is OFF state.
@@ -104,8 +104,6 @@ static int omap4_enter_idle_coupled(struct cpuidle_device *dev,
                }
        }
-        clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu_id);
        /*
         * Call idle CPU PM enter notifier chain so that
         * VFP and per CPU interrupt context is saved.
@@ -145,11 +143,10 @@ static int omap4_enter_idle_coupled(struct cpuidle_device *dev,
         * Call idle CPU cluster PM exit notifier chain
         * to restore GIC and wakeupgen context.
         */
-        if (omap4_mpuss_read_prev_context_state())
+        if ((cx->mpu_state == PWRDM_POWER_RET) &&
+                (cx->mpu_logic_state == PWRDM_POWER_OFF))
                cpu_cluster_pm_exit();
-        clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu_id);
 fail:
        cpuidle_coupled_parallel_barrier(dev, &abort_barrier);
        cpu_done[dev->cpu] = false;
@@ -157,49 +154,38 @@ fail:
        return index;
 }
-/*
- * For each cpu, setup the broadcast timer because local timers
- * stops for the states above C1.
- */
-static void omap_setup_broadcast_timer(void *arg)
-{
-        int cpu = smp_processor_id();
-        clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ON, &cpu);
-}
-static DEFINE_PER_CPU(struct cpuidle_device, omap4_idle_dev);
 static struct cpuidle_driver omap4_idle_driver = {
        .name                           = "omap4_idle",
        .owner                          = THIS_MODULE,
-        .en_core_tk_irqen               = 1,
        .states = {
                {
                        /* C1 - CPU0 ON + CPU1 ON + MPU ON */
                        .exit_latency = 2 + 2,
                        .target_residency = 5,
                        .flags = CPUIDLE_FLAG_TIME_VALID,
-                        .enter = omap4_enter_idle_simple,
+                        .enter = omap_enter_idle_simple,
                        .name = "C1",
-                        .desc = "MPUSS ON"
+                        .desc = "CPUx ON, MPUSS ON"
                },
                {
                        /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */
                        .exit_latency = 328 + 440,
                        .target_residency = 960,
-                        .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED,
+                        .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED |
-                        .enter = omap4_enter_idle_coupled,
+                                 CPUIDLE_FLAG_TIMER_STOP,
+                        .enter = omap_enter_idle_coupled,
                        .name = "C2",
-                        .desc = "MPUSS CSWR",
+                        .desc = "CPUx OFF, MPUSS CSWR",
                },
                {
                        /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */
                        .exit_latency = 460 + 518,
                        .target_residency = 1100,
-                        .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED,
+                        .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED |
-                        .enter = omap4_enter_idle_coupled,
+                                 CPUIDLE_FLAG_TIMER_STOP,
+                        .enter = omap_enter_idle_coupled,
                        .name = "C3",
-                        .desc = "MPUSS OSWR",
+                        .desc = "CPUx OFF, MPUSS OSWR",
                },
        },
        .state_count = ARRAY_SIZE(omap4_idle_data),
@@ -209,16 +195,13 @@ static struct cpuidle_driver omap4_idle_driver = {
 /* Public functions */
 /**
- * omap4_idle_init - Init routine for OMAP4 idle
+ * omap4_idle_init - Init routine for OMAP4+ idle
 *
- * Registers the OMAP4 specific cpuidle driver to the cpuidle
+ * Registers the OMAP4+ specific cpuidle driver to the cpuidle
 * framework with the valid set of states.
 */
 int __init omap4_idle_init(void)
 {
-        struct cpuidle_device *dev;
-        unsigned int cpu_id = 0;
        mpu_pd = pwrdm_lookup("mpu_pwrdm");
        cpu_pd[0] = pwrdm_lookup("cpu0_pwrdm");
        cpu_pd[1] = pwrdm_lookup("cpu1_pwrdm");
@@ -230,22 +213,5 @@ int __init omap4_idle_init(void)
        if (!cpu_clkdm[0] || !cpu_clkdm[1])
                return -ENODEV;
-        /* Configure the broadcast timer on each cpu */
+        return cpuidle_register(&omap4_idle_driver, cpu_online_mask);
-        on_each_cpu(omap_setup_broadcast_timer, NULL, 1);
-        for_each_cpu(cpu_id, cpu_online_mask) {
-                dev = &per_cpu(omap4_idle_dev, cpu_id);
-                dev->cpu = cpu_id;
-#ifdef CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED
-                dev->coupled_cpus = *cpu_online_mask;
-#endif
-                cpuidle_register_driver(&omap4_idle_driver);
-                if (cpuidle_register_device(dev)) {
-                        pr_err("%s: CPUidle register failed\n", __func__);
-                        return -EIO;
-                }
-        }
-        return 0;
 }
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index 3aed4b0b9563..3a0296cfcace 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -307,10 +307,10 @@ static int omap3_noncore_dpll_program(struct clk_hw_omap *clk, u16 freqsel)
        _omap3_noncore_dpll_bypass(clk);
        /*
-         * Set jitter correction. No jitter correction for OMAP4 and 3630
+         * Set jitter correction. Jitter correction applicable for OMAP343X
-         * since freqsel field is no longer present
+         * only since freqsel field is no longer present on other devices.
         */
-        if (!soc_is_am33xx() && !cpu_is_omap44xx() && !cpu_is_omap3630()) {
+        if (cpu_is_omap343x()) {
                v = __raw_readl(dd->control_reg);
                v &= ~dd->freqsel_mask;
                v |= freqsel << __ffs(dd->freqsel_mask);
@@ -480,29 +480,30 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
        if (!dd)
                return -EINVAL;
-        __clk_prepare(dd->clk_bypass);
-        clk_enable(dd->clk_bypass);
-        __clk_prepare(dd->clk_ref);
-        clk_enable(dd->clk_ref);
        if (__clk_get_rate(dd->clk_bypass) == rate &&
            (dd->modes & (1 << DPLL_LOW_POWER_BYPASS))) {
                pr_debug("%s: %s: set rate: entering bypass.\n",
                         __func__, __clk_get_name(hw->clk));
+                __clk_prepare(dd->clk_bypass);
+                clk_enable(dd->clk_bypass);
                ret = _omap3_noncore_dpll_bypass(clk);
                if (!ret)
                        new_parent = dd->clk_bypass;
+                clk_disable(dd->clk_bypass);
+                __clk_unprepare(dd->clk_bypass);
        } else {
+                __clk_prepare(dd->clk_ref);
+                clk_enable(dd->clk_ref);
                if (dd->last_rounded_rate != rate)
                        rate = __clk_round_rate(hw->clk, rate);
                if (dd->last_rounded_rate == 0)
                        return -EINVAL;
-                /* No freqsel on AM335x, OMAP4 and OMAP3630 */
+                /* Freqsel is available only on OMAP343X devices */
-                if (!soc_is_am33xx() && !cpu_is_omap44xx() &&
+                if (cpu_is_omap343x()) {
-                    !cpu_is_omap3630()) {
                        freqsel = _omap3_dpll_compute_freqsel(clk,
                                                dd->last_rounded_n);
                        WARN_ON(!freqsel);
@@ -514,6 +515,8 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
                ret = omap3_noncore_dpll_program(clk, freqsel);
                if (!ret)
                        new_parent = dd->clk_ref;
+                clk_disable(dd->clk_ref);
+                __clk_unprepare(dd->clk_ref);
        }
        /*
        * FIXME - this is all wrong.  common code handles reparenting and
@@ -525,11 +528,6 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
        if (!ret)
                __clk_reparent(hw->clk, new_parent);
-        clk_disable(dd->clk_ref);
-        __clk_unprepare(dd->clk_ref);
-        clk_disable(dd->clk_bypass);
-        __clk_unprepare(dd->clk_bypass);
        return 0;
 }
diff --git a/arch/arm/mach-omap2/dsp.c b/arch/arm/mach-omap2/dsp.c
index b155500e84a8..b8208b4b1bd9 100644
--- a/arch/arm/mach-omap2/dsp.c
+++ b/arch/arm/mach-omap2/dsp.c
@@ -26,7 +26,7 @@
 #include "control.h"
 #include "cm2xxx_3xxx.h"
 #include "prm2xxx_3xxx.h"
-#ifdef CONFIG_BRIDGE_DVFS
+#ifdef CONFIG_TIDSPBRIDGE_DVFS
 #include "omap-pm.h"
 #endif
@@ -35,7 +35,7 @@
 static struct platform_device *omap_dsp_pdev;
 static struct omap_dsp_platform_data omap_dsp_pdata __initdata = {
-#ifdef CONFIG_BRIDGE_DVFS
+#ifdef CONFIG_TIDSPBRIDGE_DVFS
        .dsp_set_min_opp = omap_pm_dsp_set_min_opp,
        .dsp_get_opp = omap_pm_dsp_get_opp,
        .cpu_set_freq = omap_pm_cpu_set_freq,
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 8a68f1ec66b9..ff0bc9e51aa7 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -529,22 +529,28 @@ void __init omap5xxx_check_revision(void)
        case 0xb942:
                switch (rev) {
                case 0:
-                default:
                        omap_revision = OMAP5430_REV_ES1_0;
+                        break;
+                case 1:
+                default:
+                        omap_revision = OMAP5430_REV_ES2_0;
                }
                break;
        case 0xb998:
                switch (rev) {
                case 0:
-                default:
                        omap_revision = OMAP5432_REV_ES1_0;
+                        break;
+                case 1:
+                default:
+                        omap_revision = OMAP5432_REV_ES2_0;
                }
                break;
        default:
                /* Unknown default to latest silicon rev as default*/
-                omap_revision = OMAP5430_REV_ES1_0;
+                omap_revision = OMAP5430_REV_ES2_0;
        }
        pr_info("OMAP%04x ES%d.0\n",
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 5c445ca1e271..e210fa830f8d 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -277,6 +277,14 @@ static struct map_desc omap54xx_io_desc[] __initdata = {
                .length         = L4_PER_54XX_SIZE,
                .type           = MT_DEVICE,
        },
+#ifdef CONFIG_OMAP4_ERRATA_I688
+        {
+                .virtual        = OMAP4_SRAM_VA,
+                .pfn            = __phys_to_pfn(OMAP4_SRAM_PA),
+                .length         = PAGE_SIZE,
+                .type           = MT_MEMORY_SO,
+        },
+#endif
 };
 #endif
@@ -329,6 +337,7 @@ void __init omap4_map_io(void)
 void __init omap5_map_io(void)
 {
        iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc));
+        omap_barriers_init();
 }
 #endif
 /*
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index 8bcb64bcdcdb..e80327b6c81f 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -139,20 +139,6 @@ static inline void cpu_clear_prev_logic_pwrst(unsigned int cpu_id)
        }
 }
-/**
- * omap4_mpuss_read_prev_context_state:
- * Function returns the MPUSS previous context state
- */
-u32 omap4_mpuss_read_prev_context_state(void)
-{
-        u32 reg;
-        reg = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
-                OMAP4430_PRM_MPU_INST, OMAP4_RM_MPU_MPU_CONTEXT_OFFSET);
-        reg &= OMAP4430_LOSTCONTEXT_DFF_MASK;
-        return reg;
-}
 /*
 * Store the CPU cluster state for L2X0 low power operations.
 */
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 20bf3c754bfd..13b27ffaf45e 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -241,15 +241,21 @@ void __iomem *omap4_get_sar_ram_base(void)
 */
 static int __init omap4_sar_ram_init(void)
 {
+        unsigned long sar_base;
        /*
         * To avoid code running on other OMAPs in
         * multi-omap builds
         */
-        if (!cpu_is_omap44xx())
+        if (cpu_is_omap44xx())
+                sar_base = OMAP44XX_SAR_RAM_BASE;
+        else if (soc_is_omap54xx())
+                sar_base = OMAP54XX_SAR_RAM_BASE;
+        else
                return -ENOMEM;
        /* Static mapping, never released */
-        sar_ram_base = ioremap(OMAP44XX_SAR_RAM_BASE, SZ_16K);
+        sar_ram_base = ioremap(sar_base, SZ_16K);
        if (WARN_ON(!sar_ram_base))
                return -ENOMEM;
diff --git a/arch/arm/mach-omap2/omap4-sar-layout.h b/arch/arm/mach-omap2/omap4-sar-layout.h
index 6822d0a7324f..792b1069f724 100644
--- a/arch/arm/mach-omap2/omap4-sar-layout.h
+++ b/arch/arm/mach-omap2/omap4-sar-layout.h
@@ -48,13 +48,13 @@
 #define SAR_BACKUP_STATUS_WAKEUPGEN             0x10
 /* WakeUpGen save restore offset from OMAP54XX_SAR_RAM_BASE */
-#define OMAP5_WAKEUPGENENB_OFFSET_CPU0          (SAR_BANK3_OFFSET + 0x8d4)
+#define OMAP5_WAKEUPGENENB_OFFSET_CPU0          (SAR_BANK3_OFFSET + 0x9dc)
-#define OMAP5_WAKEUPGENENB_SECURE_OFFSET_CPU0   (SAR_BANK3_OFFSET + 0x8e8)
+#define OMAP5_WAKEUPGENENB_SECURE_OFFSET_CPU0   (SAR_BANK3_OFFSET + 0x9f0)
-#define OMAP5_WAKEUPGENENB_OFFSET_CPU1          (SAR_BANK3_OFFSET + 0x8fc)
+#define OMAP5_WAKEUPGENENB_OFFSET_CPU1          (SAR_BANK3_OFFSET + 0xa04)
-#define OMAP5_WAKEUPGENENB_SECURE_OFFSET_CPU1   (SAR_BANK3_OFFSET + 0x910)
+#define OMAP5_WAKEUPGENENB_SECURE_OFFSET_CPU1   (SAR_BANK3_OFFSET + 0xa18)
-#define OMAP5_AUXCOREBOOT0_OFFSET               (SAR_BANK3_OFFSET + 0x924)
+#define OMAP5_AUXCOREBOOT0_OFFSET               (SAR_BANK3_OFFSET + 0xa2c)
-#define OMAP5_AUXCOREBOOT1_OFFSET               (SAR_BANK3_OFFSET + 0x928)
+#define OMAP5_AUXCOREBOOT1_OFFSET               (SAR_BANK3_OFFSET + 0x930)
-#define OMAP5_AMBA_IF_MODE_OFFSET               (SAR_BANK3_OFFSET + 0x92c)
+#define OMAP5_AMBA_IF_MODE_OFFSET               (SAR_BANK3_OFFSET + 0xa34)
 #define OMAP5_SAR_BACKUP_STATUS_OFFSET          (SAR_BANK3_OFFSET + 0x800)
 #endif
diff --git a/arch/arm/mach-omap2/omap54xx.h b/arch/arm/mach-omap2/omap54xx.h
index a2582bb3cab3..a086ba15868b 100644
--- a/arch/arm/mach-omap2/omap54xx.h
+++ b/arch/arm/mach-omap2/omap54xx.h
@@ -28,5 +28,6 @@
 #define OMAP54XX_PRCM_MPU_BASE          0x48243000
 #define OMAP54XX_SCM_BASE               0x4a002000
 #define OMAP54XX_CTRL_BASE              0x4a002800
+#define OMAP54XX_SAR_RAM_BASE           0x4ae26000
 #endif /* __ASM_SOC_OMAP555554XX_H */
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index a202a4785104..9553c9907d40 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -138,6 +138,7 @@
 #include <linux/spinlock.h>
 #include <linux/slab.h>
 #include <linux/bootmem.h>
+#include <linux/cpu.h>
 #include <asm/system_misc.h>
@@ -610,8 +611,6 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
        /* XXX test pwrdm_get_wken for this hwmod's subsystem */
-        oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
        return 0;
 }
@@ -645,8 +644,6 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
        /* XXX test pwrdm_get_wken for this hwmod's subsystem */
-        oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
        return 0;
 }
@@ -2157,7 +2154,7 @@ static int _enable(struct omap_hwmod *oh)
        if (soc_ops.enable_module)
                soc_ops.enable_module(oh);
        if (oh->flags & HWMOD_BLOCK_WFI)
-                disable_hlt();
+                cpu_idle_poll_ctrl(true);
        if (soc_ops.update_context_lost)
                soc_ops.update_context_lost(oh);
@@ -2221,7 +2218,7 @@ static int _idle(struct omap_hwmod *oh)
        _del_initiator_dep(oh, mpu_oh);
        if (oh->flags & HWMOD_BLOCK_WFI)
-                enable_hlt();
+                cpu_idle_poll_ctrl(false);
        if (soc_ops.disable_module)
                soc_ops.disable_module(oh);
@@ -2331,7 +2328,7 @@ static int _shutdown(struct omap_hwmod *oh)
                _del_initiator_dep(oh, mpu_oh);
                /* XXX what about the other system initiators here? dma, dsp */
                if (oh->flags & HWMOD_BLOCK_WFI)
-                        enable_hlt();
+                        cpu_idle_poll_ctrl(false);
                if (soc_ops.disable_module)
                        soc_ops.disable_module(oh);
                _disable_clocks(oh);
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index d5dc935f6060..fe5962921f07 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -482,15 +482,13 @@ struct omap_hwmod_omap4_prcm {
 * These are for internal use only and are managed by the omap_hwmod code.
 *
 * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module
- * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP
 * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached
 * _HWMOD_SKIP_ENABLE: set if hwmod enabled during init (HWMOD_INIT_NO_IDLE) -
 *     causes the first call to _enable() to only update the pinmux
 */
 #define _HWMOD_NO_MPU_PORT                      (1 << 0)
-#define _HWMOD_WAKEUP_ENABLED                   (1 << 1)
+#define _HWMOD_SYSCONFIG_LOADED                 (1 << 1)
-#define _HWMOD_SYSCONFIG_LOADED                 (1 << 2)
+#define _HWMOD_SKIP_ENABLE                      (1 << 2)
-#define _HWMOD_SKIP_ENABLE                      (1 << 3)
 /*
 * omap_hwmod._state definitions
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 26eee4a556ad..31bea1ce3de1 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -28,6 +28,7 @@
 #include "prm-regbits-33xx.h"
 #include "i2c.h"
 #include "mmc.h"
+#include "wd_timer.h"
 /*
 * IP blocks
@@ -2087,8 +2088,21 @@ static struct omap_hwmod am33xx_uart6_hwmod = {
 };
 /* 'wd_timer' class */
+static struct omap_hwmod_class_sysconfig wdt_sysc = {
+        .rev_offs       = 0x0,
+        .sysc_offs      = 0x10,
+        .syss_offs      = 0x14,
+        .sysc_flags     = (SYSC_HAS_EMUFREE | SYSC_HAS_SIDLEMODE |
+                        SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
+        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+                        SIDLE_SMART_WKUP),
+        .sysc_fields    = &omap_hwmod_sysc_type1,
+};
 static struct omap_hwmod_class am33xx_wd_timer_hwmod_class = {
        .name           = "wd_timer",
+        .sysc           = &wdt_sysc,
+        .pre_shutdown   = &omap2_wd_timer_disable,
 };
 /*
@@ -2099,6 +2113,7 @@ static struct omap_hwmod am33xx_wd_timer1_hwmod = {
        .name           = "wd_timer2",
        .class          = &am33xx_wd_timer_hwmod_class,
        .clkdm_name     = "l4_wkup_clkdm",
+        .flags          = HWMOD_SWSUP_SIDLE,
        .main_clk       = "wdt1_fck",
        .prcm           = {
                .omap4  = {
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 673a4c1d1d76..e742118fcfd2 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -218,7 +218,7 @@ static int omap_pm_enter(suspend_state_t suspend_state)
 static int omap_pm_begin(suspend_state_t state)
 {
-        disable_hlt();
+        cpu_idle_poll_ctrl(true);
        if (cpu_is_omap34xx())
                omap_prcm_irq_prepare();
        return 0;
@@ -226,8 +226,7 @@ static int omap_pm_begin(suspend_state_t state)
 static void omap_pm_end(void)
 {
-        enable_hlt();
+        cpu_idle_poll_ctrl(false);
-        return;
 }
 static void omap_pm_finish(void)
@@ -265,6 +264,12 @@ static void __init omap4_init_voltages(void)
        omap2_set_init_voltage("iva", "dpll_iva_m5x2_ck", "iva");
 }
+static inline void omap_init_cpufreq(void)
+{
+        struct platform_device_info devinfo = { .name = "omap-cpufreq", };
+        platform_device_register_full(&devinfo);
+}
 static int __init omap2_common_pm_init(void)
 {
        if (!of_have_populated_dt())
@@ -294,6 +299,9 @@ int __init omap2_common_pm_late_init(void)
                /* Smartreflex device init */
                omap_devinit_smartreflex();
+                /* cpufreq dummy device instantiation */
+                omap_init_cpufreq();
        }
 #ifdef CONFIG_SUSPEND
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
index 5ba6d888d6ff..a251f87fa2a2 100644
--- a/arch/arm/mach-omap2/pm44xx.c
+++ b/arch/arm/mach-omap2/pm44xx.c
@@ -126,8 +126,8 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
 * omap_default_idle - OMAP4 default ilde routine.'
 *
 * Implements OMAP4 memory, IO ordering requirements which can't be addressed
- * with default cpu_do_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and
+ * with default cpu_do_idle() hook. Used by all CPUs with !CONFIG_CPU_IDLE and
- * by secondary CPU with CONFIG_CPUIDLE.
+ * by secondary CPU with CONFIG_CPU_IDLE.
 */
 static void omap_default_idle(void)
 {
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 8e61d80bf6b3..89cad4a605dd 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -52,7 +52,6 @@ enum {
 #define ALREADYACTIVE_SWITCH            0
 #define FORCEWAKEUP_SWITCH              1
 #define LOWPOWERSTATE_SWITCH            2
-#define ERROR_SWITCH                    3
 /* pwrdm_list contains all registered struct powerdomains */
 static LIST_HEAD(pwrdm_list);
@@ -233,10 +232,7 @@ static u8 _pwrdm_save_clkdm_state_and_activate(struct powerdomain *pwrdm,
 {
        u8 sleep_switch;
-        if (curr_pwrst < 0) {
+        if (curr_pwrst < PWRDM_POWER_ON) {
-                WARN_ON(1);
-                sleep_switch = ERROR_SWITCH;
-        } else if (curr_pwrst < PWRDM_POWER_ON) {
                if (curr_pwrst > pwrst &&
                    pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE &&
                    arch_pwrdm->pwrdm_set_lowpwrstchange) {
@@ -1091,7 +1087,8 @@ int pwrdm_post_transition(struct powerdomain *pwrdm)
 */
 int omap_set_pwrdm_state(struct powerdomain *pwrdm, u8 pwrst)
 {
-        u8 curr_pwrst, next_pwrst, sleep_switch;
+        u8 next_pwrst, sleep_switch;
+        int curr_pwrst;
        int ret = 0;
        bool hwsup = false;
@@ -1107,16 +1104,17 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u8 pwrst)
        pwrdm_lock(pwrdm);
        curr_pwrst = pwrdm_read_pwrst(pwrdm);
+        if (curr_pwrst < 0) {
+                ret = -EINVAL;
+                goto osps_out;
+        }
        next_pwrst = pwrdm_read_next_pwrst(pwrdm);
        if (curr_pwrst == pwrst && next_pwrst == pwrst)
                goto osps_out;
        sleep_switch = _pwrdm_save_clkdm_state_and_activate(pwrdm, curr_pwrst,
                                                            pwrst, &hwsup);
-        if (sleep_switch == ERROR_SWITCH) {
-                ret = -EINVAL;
-                goto osps_out;
-        }
        ret = pwrdm_set_next_pwrst(pwrdm, pwrst);
        if (ret)
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index d35f98aabf7a..415c7e0c9393 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -81,13 +81,13 @@ static struct prm_reset_src_map omap44xx_prm_reset_src_map[] = {
 /* Read a register in a CM/PRM instance in the PRM module */
 u32 omap4_prm_read_inst_reg(s16 inst, u16 reg)
 {
-        return __raw_readl(OMAP44XX_PRM_REGADDR(inst, reg));
+        return __raw_readl(prm_base + inst + reg);
 }
 /* Write into a register in a CM/PRM instance in the PRM module */
 void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 reg)
 {
-        __raw_writel(val, OMAP44XX_PRM_REGADDR(inst, reg));
+        __raw_writel(val, prm_base + inst + reg);
 }
 /* Read-modify-write a register in a PRM module. Caller must lock */
@@ -650,7 +650,7 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
 int __init omap44xx_prm_init(void)
 {
-        if (!cpu_is_omap44xx())
+        if (!cpu_is_omap44xx() && !soc_is_omap54xx())
                return 0;
        return prm_register(&omap44xx_prm_ll_data);
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index c62116bbc760..18fdeeb3a44a 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -413,7 +413,9 @@ IS_OMAP_TYPE(3430, 0x3430)
 #define OMAP54XX_CLASS          0x54000054
 #define OMAP5430_REV_ES1_0      (OMAP54XX_CLASS | (0x30 << 16) | (0x10 << 8))
+#define OMAP5430_REV_ES2_0      (OMAP54XX_CLASS | (0x30 << 16) | (0x20 << 8))
 #define OMAP5432_REV_ES1_0      (OMAP54XX_CLASS | (0x32 << 16) | (0x10 << 8))
+#define OMAP5432_REV_ES2_0      (OMAP54XX_CLASS | (0x32 << 16) | (0x20 << 8))
 void omap2xxx_check_revision(void);
 void omap3xxx_check_revision(void);
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index ee7a6bf67c9e..ea6ea9aab092 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -62,6 +62,7 @@
 #define OMAP2_MPU_SOURCE        "sys_ck"
 #define OMAP3_MPU_SOURCE        OMAP2_MPU_SOURCE
 #define OMAP4_MPU_SOURCE        "sys_clkin_ck"
+#define OMAP5_MPU_SOURCE        "sys_clkin"
 #define OMAP2_32K_SOURCE        "func_32k_ck"
 #define OMAP3_32K_SOURCE        "omap_32k_fck"
 #define OMAP4_32K_SOURCE        "sys_32k_ck"
@@ -487,7 +488,7 @@ static void __init realtime_counter_init(void)
                pr_err("%s: ioremap failed\n", __func__);
                return;
        }
-        sys_clk = clk_get(NULL, "sys_clkin_ck");
+        sys_clk = clk_get(NULL, OMAP5_MPU_SOURCE);
        if (IS_ERR(sys_clk)) {
                pr_err("%s: failed to get system clock handle\n", __func__);
                iounmap(base);
@@ -620,7 +621,7 @@ void __init omap4_local_timer_init(void)
 #ifdef CONFIG_SOC_OMAP5
 OMAP_SYS_32K_TIMER_INIT(5, 1, OMAP4_32K_SOURCE, "ti,timer-alwon",
-                        2, OMAP4_MPU_SOURCE);
+                        2, OMAP5_MPU_SOURCE);
 void __init omap5_realtime_timer_init(void)
 {
        int err;
diff --git a/arch/arm/mach-orion5x/board-dt.c b/arch/arm/mach-orion5x/board-dt.c
index 35a8014529ca..94fbb815680c 100644
--- a/arch/arm/mach-orion5x/board-dt.c
+++ b/arch/arm/mach-orion5x/board-dt.c
@@ -14,6 +14,7 @@
 #include <linux/init.h>
 #include <linux/of.h>
 #include <linux/of_platform.h>
+#include <linux/cpu.h>
 #include <asm/system_misc.h>
 #include <asm/mach/arch.h>
 #include <mach/orion5x.h>
@@ -52,7 +53,7 @@ static void __init orion5x_dt_init(void)
         */
        if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) {
                printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n");
-                disable_hlt();
+                cpu_idle_poll_ctrl(true);
        }
        if (of_machine_is_compatible("lacie,ethernet-disk-mini-v2"))
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index d068f1431c40..2075bf8e3d90 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -19,6 +19,7 @@
 #include <linux/ata_platform.h>
 #include <linux/delay.h>
 #include <linux/clk-provider.h>
+#include <linux/cpu.h>
 #include <net/dsa.h>
 #include <asm/page.h>
 #include <asm/setup.h>
@@ -293,7 +294,7 @@ void __init orion5x_init(void)
         */
        if (dev == MV88F5281_DEV_ID && rev == MV88F5281_REV_D0) {
                printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n");
-                disable_hlt();
+                cpu_idle_poll_ctrl(true);
        }
        /*
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 12c500558387..648867a8caa8 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -7,12 +7,6 @@ obj-y				+= clock.o devices.o generic.o irq.o \
                                   time.o reset.o
 obj-$(CONFIG_PM)                += pm.o sleep.o standby.o
-ifeq ($(CONFIG_CPU_FREQ),y)
-obj-$(CONFIG_PXA25x)            += cpufreq-pxa2xx.o
-obj-$(CONFIG_PXA27x)            += cpufreq-pxa2xx.o
-obj-$(CONFIG_PXA3xx)            += cpufreq-pxa3xx.o
-endif
 # Generic drivers that other drivers may depend upon
 # SoC-specific code
diff --git a/arch/arm/mach-pxa/cpufreq-pxa2xx.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
deleted file mode 100644
index 6a7aeab42f6c..000000000000
--- a/arch/arm/mach-pxa/cpufreq-pxa2xx.c
+++ /dev/null
@@ -1,494 +0,0 @@
-/*
- *  linux/arch/arm/mach-pxa/cpufreq-pxa2xx.c
- *
- *  Copyright (C) 2002,2003 Intrinsyc Software
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
- * History:
- *   31-Jul-2002 : Initial version [FB]
- *   29-Jan-2003 : added PXA255 support [FB]
- *   20-Apr-2003 : ported to v2.5 (Dustin McIntire, Sensoria Corp.)
- *
- * Note:
- *   This driver may change the memory bus clock rate, but will not do any
- *   platform specific access timing changes... for example if you have flash
- *   memory connected to CS0, you will need to register a platform specific
- *   notifier which will adjust the memory access strobes to maintain a
- *   minimum strobe width.
- *
- */
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/sched.h>
-#include <linux/init.h>
-#include <linux/cpufreq.h>
-#include <linux/err.h>
-#include <linux/regulator/consumer.h>
-#include <linux/io.h>
-#include <mach/pxa2xx-regs.h>
-#include <mach/smemc.h>
-#ifdef DEBUG
-static unsigned int freq_debug;
-module_param(freq_debug, uint, 0);
-MODULE_PARM_DESC(freq_debug, "Set the debug messages to on=1/off=0");
-#else
-#define freq_debug  0
-#endif
-static struct regulator *vcc_core;
-static unsigned int pxa27x_maxfreq;
-module_param(pxa27x_maxfreq, uint, 0);
-MODULE_PARM_DESC(pxa27x_maxfreq, "Set the pxa27x maxfreq in MHz"
-                 "(typically 624=>pxa270, 416=>pxa271, 520=>pxa272)");
-typedef struct {
-        unsigned int khz;
-        unsigned int membus;
-        unsigned int cccr;
-        unsigned int div2;
-        unsigned int cclkcfg;
-        int vmin;
-        int vmax;
-} pxa_freqs_t;
-/* Define the refresh period in mSec for the SDRAM and the number of rows */
-#define SDRAM_TREF      64      /* standard 64ms SDRAM */
-static unsigned int sdram_rows;
-#define CCLKCFG_TURBO           0x1
-#define CCLKCFG_FCS             0x2
-#define CCLKCFG_HALFTURBO       0x4
-#define CCLKCFG_FASTBUS         0x8
-#define MDREFR_DB2_MASK         (MDREFR_K2DB2 | MDREFR_K1DB2)
-#define MDREFR_DRI_MASK         0xFFF
-#define MDCNFG_DRAC2(mdcnfg) (((mdcnfg) >> 21) & 0x3)
-#define MDCNFG_DRAC0(mdcnfg) (((mdcnfg) >> 5) & 0x3)
-/*
- * PXA255 definitions
- */
-/* Use the run mode frequencies for the CPUFREQ_POLICY_PERFORMANCE policy */
-#define CCLKCFG                 CCLKCFG_TURBO | CCLKCFG_FCS
-static pxa_freqs_t pxa255_run_freqs[] =
-{
-        /* CPU   MEMBUS  CCCR  DIV2 CCLKCFG                run  turbo PXbus SDRAM */
-        { 99500,  99500, 0x121, 1,  CCLKCFG, -1, -1},   /*  99,   99,   50,   50  */
-        {132700, 132700, 0x123, 1,  CCLKCFG, -1, -1},   /* 133,  133,   66,   66  */
-        {199100,  99500, 0x141, 0,  CCLKCFG, -1, -1},   /* 199,  199,   99,   99  */
-        {265400, 132700, 0x143, 1,  CCLKCFG, -1, -1},   /* 265,  265,  133,   66  */
-        {331800, 165900, 0x145, 1,  CCLKCFG, -1, -1},   /* 331,  331,  166,   83  */
-        {398100,  99500, 0x161, 0,  CCLKCFG, -1, -1},   /* 398,  398,  196,   99  */
-};
-/* Use the turbo mode frequencies for the CPUFREQ_POLICY_POWERSAVE policy */
-static pxa_freqs_t pxa255_turbo_freqs[] =
-{
-        /* CPU   MEMBUS  CCCR  DIV2 CCLKCFG        run  turbo PXbus SDRAM */
-        { 99500, 99500,  0x121, 1,  CCLKCFG, -1, -1},   /*  99,   99,   50,   50  */
-        {199100, 99500,  0x221, 0,  CCLKCFG, -1, -1},   /*  99,  199,   50,   99  */
-        {298500, 99500,  0x321, 0,  CCLKCFG, -1, -1},   /*  99,  287,   50,   99  */
-        {298600, 99500,  0x1c1, 0,  CCLKCFG, -1, -1},   /* 199,  287,   99,   99  */
-        {398100, 99500,  0x241, 0,  CCLKCFG, -1, -1},   /* 199,  398,   99,   99  */
-};
-#define NUM_PXA25x_RUN_FREQS ARRAY_SIZE(pxa255_run_freqs)
-#define NUM_PXA25x_TURBO_FREQS ARRAY_SIZE(pxa255_turbo_freqs)
-static struct cpufreq_frequency_table
-        pxa255_run_freq_table[NUM_PXA25x_RUN_FREQS+1];
-static struct cpufreq_frequency_table
-        pxa255_turbo_freq_table[NUM_PXA25x_TURBO_FREQS+1];
-static unsigned int pxa255_turbo_table;
-module_param(pxa255_turbo_table, uint, 0);
-MODULE_PARM_DESC(pxa255_turbo_table, "Selects the frequency table (0 = run table, !0 = turbo table)");
-/*
- * PXA270 definitions
- *
- * For the PXA27x:
- * Control variables are A, L, 2N for CCCR; B, HT, T for CLKCFG.
- *
- * A = 0 => memory controller clock from table 3-7,
- * A = 1 => memory controller clock = system bus clock
- * Run mode frequency   = 13 MHz * L
- * Turbo mode frequency = 13 MHz * L * N
- * System bus frequency = 13 MHz * L / (B + 1)
- *
- * In CCCR:
- * A = 1
- * L = 16         oscillator to run mode ratio
- * 2N = 6         2 * (turbo mode to run mode ratio)
- *
- * In CCLKCFG:
- * B = 1          Fast bus mode
- * HT = 0         Half-Turbo mode
- * T = 1          Turbo mode
- *
- * For now, just support some of the combinations in table 3-7 of
- * PXA27x Processor Family Developer's Manual to simplify frequency
- * change sequences.
- */
-#define PXA27x_CCCR(A, L, N2) (A << 25 | N2 << 7 | L)
-#define CCLKCFG2(B, HT, T) \
-  (CCLKCFG_FCS | \
-   ((B)  ? CCLKCFG_FASTBUS : 0) | \
-   ((HT) ? CCLKCFG_HALFTURBO : 0) | \
-   ((T)  ? CCLKCFG_TURBO : 0))
-static pxa_freqs_t pxa27x_freqs[] = {
-        {104000, 104000, PXA27x_CCCR(1,  8, 2), 0, CCLKCFG2(1, 0, 1),  900000, 1705000 },
-        {156000, 104000, PXA27x_CCCR(1,  8, 3), 0, CCLKCFG2(1, 0, 1), 1000000, 1705000 },
-        {208000, 208000, PXA27x_CCCR(0, 16, 2), 1, CCLKCFG2(0, 0, 1), 1180000, 1705000 },
-        {312000, 208000, PXA27x_CCCR(1, 16, 3), 1, CCLKCFG2(1, 0, 1), 1250000, 1705000 },
-        {416000, 208000, PXA27x_CCCR(1, 16, 4), 1, CCLKCFG2(1, 0, 1), 1350000, 1705000 },
-        {520000, 208000, PXA27x_CCCR(1, 16, 5), 1, CCLKCFG2(1, 0, 1), 1450000, 1705000 },
-        {624000, 208000, PXA27x_CCCR(1, 16, 6), 1, CCLKCFG2(1, 0, 1), 1550000, 1705000 }
-};
-#define NUM_PXA27x_FREQS ARRAY_SIZE(pxa27x_freqs)
-static struct cpufreq_frequency_table
-        pxa27x_freq_table[NUM_PXA27x_FREQS+1];
-extern unsigned get_clk_frequency_khz(int info);
-#ifdef CONFIG_REGULATOR
-static int pxa_cpufreq_change_voltage(pxa_freqs_t *pxa_freq)
-{
-        int ret = 0;
-        int vmin, vmax;
-        if (!cpu_is_pxa27x())
-                return 0;
-        vmin = pxa_freq->vmin;
-        vmax = pxa_freq->vmax;
-        if ((vmin == -1) || (vmax == -1))
-                return 0;
-        ret = regulator_set_voltage(vcc_core, vmin, vmax);
-        if (ret)
-                pr_err("cpufreq: Failed to set vcc_core in [%dmV..%dmV]\n",
-                       vmin, vmax);
-        return ret;
-}
-static __init void pxa_cpufreq_init_voltages(void)
-{
-        vcc_core = regulator_get(NULL, "vcc_core");
-        if (IS_ERR(vcc_core)) {
-                pr_info("cpufreq: Didn't find vcc_core regulator\n");
-                vcc_core = NULL;
-        } else {
-                pr_info("cpufreq: Found vcc_core regulator\n");
-        }
-}
-#else
-static int pxa_cpufreq_change_voltage(pxa_freqs_t *pxa_freq)
-{
-        return 0;
-}
-static __init void pxa_cpufreq_init_voltages(void) { }
-#endif
-static void find_freq_tables(struct cpufreq_frequency_table **freq_table,
-                             pxa_freqs_t **pxa_freqs)
-{
-        if (cpu_is_pxa25x()) {
-                if (!pxa255_turbo_table) {
-                        *pxa_freqs = pxa255_run_freqs;
-                        *freq_table = pxa255_run_freq_table;
-                } else {
-                        *pxa_freqs = pxa255_turbo_freqs;
-                        *freq_table = pxa255_turbo_freq_table;
-                }
-        }
-        if (cpu_is_pxa27x()) {
-                *pxa_freqs = pxa27x_freqs;
-                *freq_table = pxa27x_freq_table;
-        }
-}
-static void pxa27x_guess_max_freq(void)
-{
-        if (!pxa27x_maxfreq) {
-                pxa27x_maxfreq = 416000;
-                printk(KERN_INFO "PXA CPU 27x max frequency not defined "
-                       "(pxa27x_maxfreq), assuming pxa271 with %dkHz maxfreq\n",
-                       pxa27x_maxfreq);
-        } else {
-                pxa27x_maxfreq *= 1000;
-        }
-}
-static void init_sdram_rows(void)
-{
-        uint32_t mdcnfg = __raw_readl(MDCNFG);
-        unsigned int drac2 = 0, drac0 = 0;
-        if (mdcnfg & (MDCNFG_DE2 | MDCNFG_DE3))
-                drac2 = MDCNFG_DRAC2(mdcnfg);
-        if (mdcnfg & (MDCNFG_DE0 | MDCNFG_DE1))
-                drac0 = MDCNFG_DRAC0(mdcnfg);
-        sdram_rows = 1 << (11 + max(drac0, drac2));
-}
-static u32 mdrefr_dri(unsigned int freq)
-{
-        u32 interval = freq * SDRAM_TREF / sdram_rows;
-        return (interval - (cpu_is_pxa27x() ? 31 : 0)) / 32;
-}
-/* find a valid frequency point */
-static int pxa_verify_policy(struct cpufreq_policy *policy)
-{
-        struct cpufreq_frequency_table *pxa_freqs_table;
-        pxa_freqs_t *pxa_freqs;
-        int ret;
-        find_freq_tables(&pxa_freqs_table, &pxa_freqs);
-        ret = cpufreq_frequency_table_verify(policy, pxa_freqs_table);
-        if (freq_debug)
-                pr_debug("Verified CPU policy: %dKhz min to %dKhz max\n",
-                         policy->min, policy->max);
-        return ret;
-}
-static unsigned int pxa_cpufreq_get(unsigned int cpu)
-{
-        return get_clk_frequency_khz(0);
-}
-static int pxa_set_target(struct cpufreq_policy *policy,
-                          unsigned int target_freq,
-                          unsigned int relation)
-{
-        struct cpufreq_frequency_table *pxa_freqs_table;
-        pxa_freqs_t *pxa_freq_settings;
-        struct cpufreq_freqs freqs;
-        unsigned int idx;
-        unsigned long flags;
-        unsigned int new_freq_cpu, new_freq_mem;
-        unsigned int unused, preset_mdrefr, postset_mdrefr, cclkcfg;
-        int ret = 0;
-        /* Get the current policy */
-        find_freq_tables(&pxa_freqs_table, &pxa_freq_settings);
-        /* Lookup the next frequency */
-        if (cpufreq_frequency_table_target(policy, pxa_freqs_table,
-                                           target_freq, relation, &idx)) {
-                return -EINVAL;
-        }
-        new_freq_cpu = pxa_freq_settings[idx].khz;
-        new_freq_mem = pxa_freq_settings[idx].membus;
-        freqs.old = policy->cur;
-        freqs.new = new_freq_cpu;
-        freqs.cpu = policy->cpu;
-        if (freq_debug)
-                pr_debug("Changing CPU frequency to %d Mhz, (SDRAM %d Mhz)\n",
-                         freqs.new / 1000, (pxa_freq_settings[idx].div2) ?
-                         (new_freq_mem / 2000) : (new_freq_mem / 1000));
-        if (vcc_core && freqs.new > freqs.old)
-                ret = pxa_cpufreq_change_voltage(&pxa_freq_settings[idx]);
-        if (ret)
-                return ret;
-        /*
-         * Tell everyone what we're about to do...
-         * you should add a notify client with any platform specific
-         * Vcc changing capability
-         */
-        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-        /* Calculate the next MDREFR.  If we're slowing down the SDRAM clock
-         * we need to preset the smaller DRI before the change.  If we're
-         * speeding up we need to set the larger DRI value after the change.
-         */
-        preset_mdrefr = postset_mdrefr = __raw_readl(MDREFR);
-        if ((preset_mdrefr & MDREFR_DRI_MASK) > mdrefr_dri(new_freq_mem)) {
-                preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK);
-                preset_mdrefr |= mdrefr_dri(new_freq_mem);
-        }
-        postset_mdrefr =
-                (postset_mdrefr & ~MDREFR_DRI_MASK) | mdrefr_dri(new_freq_mem);
-        /* If we're dividing the memory clock by two for the SDRAM clock, this
-         * must be set prior to the change.  Clearing the divide must be done
-         * after the change.
-         */
-        if (pxa_freq_settings[idx].div2) {
-                preset_mdrefr  |= MDREFR_DB2_MASK;
-                postset_mdrefr |= MDREFR_DB2_MASK;
-        } else {
-                postset_mdrefr &= ~MDREFR_DB2_MASK;
-        }
-        local_irq_save(flags);
-        /* Set new the CCCR and prepare CCLKCFG */
-        CCCR = pxa_freq_settings[idx].cccr;
-        cclkcfg = pxa_freq_settings[idx].cclkcfg;
-        asm volatile("                                                  \n\
-                ldr     r4, [%1]                /* load MDREFR */       \n\
-                b       2f                                              \n\
-                .align  5                                               \n\
-1:                                                                      \n\
-                str     %3, [%1]                /* preset the MDREFR */ \n\
-                mcr     p14, 0, %2, c6, c0, 0   /* set CCLKCFG[FCS] */  \n\
-                str     %4, [%1]                /* postset the MDREFR */ \n\
-                                                                        \n\
-                b       3f                                              \n\
-2:              b       1b                                              \n\
-3:              nop                                                     \n\
-          "
-                     : "=&r" (unused)
-                     : "r" (MDREFR), "r" (cclkcfg),
-                       "r" (preset_mdrefr), "r" (postset_mdrefr)
-                     : "r4", "r5");
-        local_irq_restore(flags);
-        /*
-         * Tell everyone what we've just done...
-         * you should add a notify client with any platform specific
-         * SDRAM refresh timer adjustments
-         */
-        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-        /*
-         * Even if voltage setting fails, we don't report it, as the frequency
-         * change succeeded. The voltage reduction is not a critical failure,
-         * only power savings will suffer from this.
-         *
-         * Note: if the voltage change fails, and a return value is returned, a
-         * bug is triggered (seems a deadlock). Should anybody find out where,
-         * the "return 0" should become a "return ret".
-         */
-        if (vcc_core && freqs.new < freqs.old)
-                ret = pxa_cpufreq_change_voltage(&pxa_freq_settings[idx]);
-        return 0;
-}
-static int pxa_cpufreq_init(struct cpufreq_policy *policy)
-{
-        int i;
-        unsigned int freq;
-        struct cpufreq_frequency_table *pxa255_freq_table;
-        pxa_freqs_t *pxa255_freqs;
-        /* try to guess pxa27x cpu */
-        if (cpu_is_pxa27x())
-                pxa27x_guess_max_freq();
-        pxa_cpufreq_init_voltages();
-        init_sdram_rows();
-        /* set default policy and cpuinfo */
-        policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
-        policy->cur = get_clk_frequency_khz(0);    /* current freq */
-        policy->min = policy->max = policy->cur;
-        /* Generate pxa25x the run cpufreq_frequency_table struct */
-        for (i = 0; i < NUM_PXA25x_RUN_FREQS; i++) {
-                pxa255_run_freq_table[i].frequency = pxa255_run_freqs[i].khz;
-                pxa255_run_freq_table[i].index = i;
-        }
-        pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END;
-        /* Generate pxa25x the turbo cpufreq_frequency_table struct */
-        for (i = 0; i < NUM_PXA25x_TURBO_FREQS; i++) {
-                pxa255_turbo_freq_table[i].frequency =
-                        pxa255_turbo_freqs[i].khz;
-                pxa255_turbo_freq_table[i].index = i;
-        }
-        pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END;
-        pxa255_turbo_table = !!pxa255_turbo_table;
-        /* Generate the pxa27x cpufreq_frequency_table struct */
-        for (i = 0; i < NUM_PXA27x_FREQS; i++) {
-                freq = pxa27x_freqs[i].khz;
-                if (freq > pxa27x_maxfreq)
-                        break;
-                pxa27x_freq_table[i].frequency = freq;
-                pxa27x_freq_table[i].index = i;
-        }
-        pxa27x_freq_table[i].index = i;
-        pxa27x_freq_table[i].frequency = CPUFREQ_TABLE_END;
-        /*
-         * Set the policy's minimum and maximum frequencies from the tables
-         * just constructed.  This sets cpuinfo.mxx_freq, min and max.
-         */
-        if (cpu_is_pxa25x()) {
-                find_freq_tables(&pxa255_freq_table, &pxa255_freqs);
-                pr_info("PXA255 cpufreq using %s frequency table\n",
-                        pxa255_turbo_table ? "turbo" : "run");
-                cpufreq_frequency_table_cpuinfo(policy, pxa255_freq_table);
-        }
-        else if (cpu_is_pxa27x())
-                cpufreq_frequency_table_cpuinfo(policy, pxa27x_freq_table);
-        printk(KERN_INFO "PXA CPU frequency change support initialized\n");
-        return 0;
-}
-static struct cpufreq_driver pxa_cpufreq_driver = {
-        .verify = pxa_verify_policy,
-        .target = pxa_set_target,
-        .init   = pxa_cpufreq_init,
-        .get    = pxa_cpufreq_get,
-        .name   = "PXA2xx",
-};
-static int __init pxa_cpu_init(void)
-{
-        int ret = -ENODEV;
-        if (cpu_is_pxa25x() || cpu_is_pxa27x())
-                ret = cpufreq_register_driver(&pxa_cpufreq_driver);
-        return ret;
-}
-static void __exit pxa_cpu_exit(void)
-{
-        cpufreq_unregister_driver(&pxa_cpufreq_driver);
-}
-MODULE_AUTHOR("Intrinsyc Software Inc.");
-MODULE_DESCRIPTION("CPU frequency changing driver for the PXA architecture");
-MODULE_LICENSE("GPL");
-module_init(pxa_cpu_init);
-module_exit(pxa_cpu_exit);
diff --git a/arch/arm/mach-pxa/cpufreq-pxa3xx.c b/arch/arm/mach-pxa/cpufreq-pxa3xx.c
deleted file mode 100644
index b85b4ab7aac6..000000000000
--- a/arch/arm/mach-pxa/cpufreq-pxa3xx.c
+++ /dev/null
@@ -1,258 +0,0 @@
-/*
- * linux/arch/arm/mach-pxa/cpufreq-pxa3xx.c
- *
- * Copyright (C) 2008 Marvell International Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/sched.h>
-#include <linux/init.h>
-#include <linux/cpufreq.h>
-#include <linux/slab.h>
-#include <linux/io.h>
-#include <mach/pxa3xx-regs.h>
-#include "generic.h"
-#define HSS_104M        (0)
-#define HSS_156M        (1)
-#define HSS_208M        (2)
-#define HSS_312M        (3)
-#define SMCFS_78M       (0)
-#define SMCFS_104M      (2)
-#define SMCFS_208M      (5)
-#define SFLFS_104M      (0)
-#define SFLFS_156M      (1)
-#define SFLFS_208M      (2)
-#define SFLFS_312M      (3)
-#define XSPCLK_156M     (0)
-#define XSPCLK_NONE     (3)
-#define DMCFS_26M       (0)
-#define DMCFS_260M      (3)
-struct pxa3xx_freq_info {
-        unsigned int cpufreq_mhz;
-        unsigned int core_xl : 5;
-        unsigned int core_xn : 3;
-        unsigned int hss : 2;
-        unsigned int dmcfs : 2;
-        unsigned int smcfs : 3;
-        unsigned int sflfs : 2;
-        unsigned int df_clkdiv : 3;
-        int     vcc_core;       /* in mV */
-        int     vcc_sram;       /* in mV */
-};
-#define OP(cpufreq, _xl, _xn, _hss, _dmc, _smc, _sfl, _dfi, vcore, vsram) \
-{                                                                       \
-        .cpufreq_mhz    = cpufreq,                                      \
-        .core_xl        = _xl,                                          \
-        .core_xn        = _xn,                                          \
-        .hss            = HSS_##_hss##M,                                \
-        .dmcfs          = DMCFS_##_dmc##M,                              \
-        .smcfs          = SMCFS_##_smc##M,                              \
-        .sflfs          = SFLFS_##_sfl##M,                              \
-        .df_clkdiv      = _dfi,                                         \
-        .vcc_core       = vcore,                                        \
-        .vcc_sram       = vsram,                                        \
-}
-static struct pxa3xx_freq_info pxa300_freqs[] = {
-        /*  CPU XL XN  HSS DMEM SMEM SRAM DFI VCC_CORE VCC_SRAM */
-        OP(104,  8, 1, 104, 260,  78, 104, 3, 1000, 1100), /* 104MHz */
-        OP(208, 16, 1, 104, 260, 104, 156, 2, 1000, 1100), /* 208MHz */
-        OP(416, 16, 2, 156, 260, 104, 208, 2, 1100, 1200), /* 416MHz */
-        OP(624, 24, 2, 208, 260, 208, 312, 3, 1375, 1400), /* 624MHz */
-};
-static struct pxa3xx_freq_info pxa320_freqs[] = {
-        /*  CPU XL XN  HSS DMEM SMEM SRAM DFI VCC_CORE VCC_SRAM */
-        OP(104,  8, 1, 104, 260,  78, 104, 3, 1000, 1100), /* 104MHz */
-        OP(208, 16, 1, 104, 260, 104, 156, 2, 1000, 1100), /* 208MHz */
-        OP(416, 16, 2, 156, 260, 104, 208, 2, 1100, 1200), /* 416MHz */
-        OP(624, 24, 2, 208, 260, 208, 312, 3, 1375, 1400), /* 624MHz */
-        OP(806, 31, 2, 208, 260, 208, 312, 3, 1400, 1400), /* 806MHz */
-};
-static unsigned int pxa3xx_freqs_num;
-static struct pxa3xx_freq_info *pxa3xx_freqs;
-static struct cpufreq_frequency_table *pxa3xx_freqs_table;
-static int setup_freqs_table(struct cpufreq_policy *policy,
-                             struct pxa3xx_freq_info *freqs, int num)
-{
-        struct cpufreq_frequency_table *table;
-        int i;
-        table = kzalloc((num + 1) * sizeof(*table), GFP_KERNEL);
-        if (table == NULL)
-                return -ENOMEM;
-        for (i = 0; i < num; i++) {
-                table[i].index = i;
-                table[i].frequency = freqs[i].cpufreq_mhz * 1000;
-        }
-        table[num].index = i;
-        table[num].frequency = CPUFREQ_TABLE_END;
-        pxa3xx_freqs = freqs;
-        pxa3xx_freqs_num = num;
-        pxa3xx_freqs_table = table;
-        return cpufreq_frequency_table_cpuinfo(policy, table);
-}
-static void __update_core_freq(struct pxa3xx_freq_info *info)
-{
-        uint32_t mask = ACCR_XN_MASK | ACCR_XL_MASK;
-        uint32_t accr = ACCR;
-        uint32_t xclkcfg;
-        accr &= ~(ACCR_XN_MASK | ACCR_XL_MASK | ACCR_XSPCLK_MASK);
-        accr |= ACCR_XN(info->core_xn) | ACCR_XL(info->core_xl);
-        /* No clock until core PLL is re-locked */
-        accr |= ACCR_XSPCLK(XSPCLK_NONE);
-        xclkcfg = (info->core_xn == 2) ? 0x3 : 0x2;     /* turbo bit */
-        ACCR = accr;
-        __asm__("mcr p14, 0, %0, c6, c0, 0\n" : : "r"(xclkcfg));
-        while ((ACSR & mask) != (accr & mask))
-                cpu_relax();
-}
-static void __update_bus_freq(struct pxa3xx_freq_info *info)
-{
-        uint32_t mask;
-        uint32_t accr = ACCR;
-        mask = ACCR_SMCFS_MASK | ACCR_SFLFS_MASK | ACCR_HSS_MASK |
-                ACCR_DMCFS_MASK;
-        accr &= ~mask;
-        accr |= ACCR_SMCFS(info->smcfs) | ACCR_SFLFS(info->sflfs) |
-                ACCR_HSS(info->hss) | ACCR_DMCFS(info->dmcfs);
-        ACCR = accr;
-        while ((ACSR & mask) != (accr & mask))
-                cpu_relax();
-}
-static int pxa3xx_cpufreq_verify(struct cpufreq_policy *policy)
-{
-        return cpufreq_frequency_table_verify(policy, pxa3xx_freqs_table);
-}
-static unsigned int pxa3xx_cpufreq_get(unsigned int cpu)
-{
-        return pxa3xx_get_clk_frequency_khz(0);
-}
-static int pxa3xx_cpufreq_set(struct cpufreq_policy *policy,
-                              unsigned int target_freq,
-                              unsigned int relation)
-{
-        struct pxa3xx_freq_info *next;
-        struct cpufreq_freqs freqs;
-        unsigned long flags;
-        int idx;
-        if (policy->cpu != 0)
-                return -EINVAL;
-        /* Lookup the next frequency */
-        if (cpufreq_frequency_table_target(policy, pxa3xx_freqs_table,
-                                target_freq, relation, &idx))
-                return -EINVAL;
-        next = &pxa3xx_freqs[idx];
-        freqs.old = policy->cur;
-        freqs.new = next->cpufreq_mhz * 1000;
-        freqs.cpu = policy->cpu;
-        pr_debug("CPU frequency from %d MHz to %d MHz%s\n",
-                        freqs.old / 1000, freqs.new / 1000,
-                        (freqs.old == freqs.new) ? " (skipped)" : "");
-        if (freqs.old == target_freq)
-                return 0;
-        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-        local_irq_save(flags);
-        __update_core_freq(next);
-        __update_bus_freq(next);
-        local_irq_restore(flags);
-        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-        return 0;
-}
-static int pxa3xx_cpufreq_init(struct cpufreq_policy *policy)
-{
-        int ret = -EINVAL;
-        /* set default policy and cpuinfo */
-        policy->cpuinfo.min_freq = 104000;
-        policy->cpuinfo.max_freq = (cpu_is_pxa320()) ? 806000 : 624000;
-        policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
-        policy->max = pxa3xx_get_clk_frequency_khz(0);
-        policy->cur = policy->min = policy->max;
-        if (cpu_is_pxa300() || cpu_is_pxa310())
-                ret = setup_freqs_table(policy, ARRAY_AND_SIZE(pxa300_freqs));
-        if (cpu_is_pxa320())
-                ret = setup_freqs_table(policy, ARRAY_AND_SIZE(pxa320_freqs));
-        if (ret) {
-                pr_err("failed to setup frequency table\n");
-                return ret;
-        }
-        pr_info("CPUFREQ support for PXA3xx initialized\n");
-        return 0;
-}
-static struct cpufreq_driver pxa3xx_cpufreq_driver = {
-        .verify         = pxa3xx_cpufreq_verify,
-        .target         = pxa3xx_cpufreq_set,
-        .init           = pxa3xx_cpufreq_init,
-        .get            = pxa3xx_cpufreq_get,
-        .name           = "pxa3xx-cpufreq",
-};
-static int __init cpufreq_init(void)
-{
-        if (cpu_is_pxa3xx())
-                return cpufreq_register_driver(&pxa3xx_cpufreq_driver);
-        return 0;
-}
-module_init(cpufreq_init);
-static void __exit cpufreq_exit(void)
-{
-        cpufreq_unregister_driver(&pxa3xx_cpufreq_driver);
-}
-module_exit(cpufreq_exit);
-MODULE_DESCRIPTION("CPU frequency scaling driver for PXA3xx");
-MODULE_LICENSE("GPL");
diff --git a/arch/arm/mach-pxa/include/mach/generic.h b/arch/arm/mach-pxa/include/mach/generic.h
new file mode 100644
index 000000000000..665542e0c9e2
--- /dev/null
+++ b/arch/arm/mach-pxa/include/mach/generic.h
@@ -0,0 +1 @@
+#include "../../generic.h"
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2440.c b/arch/arm/mach-s3c24xx/clock-s3c2440.c
index 04b87ec92537..1069b5680826 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2440.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2440.c
@@ -123,6 +123,11 @@ static struct clk s3c2440_clk_ac97 = {
        .ctrlbit        = S3C2440_CLKCON_AC97,
 };
+#define S3C24XX_VA_UART0      (S3C_VA_UART)
+#define S3C24XX_VA_UART1      (S3C_VA_UART + 0x4000 )
+#define S3C24XX_VA_UART2      (S3C_VA_UART + 0x8000 )
+#define S3C24XX_VA_UART3      (S3C_VA_UART + 0xC000 )
 static unsigned long  s3c2440_fclk_n_getrate(struct clk *clk)
 {
        unsigned long ucon0, ucon1, ucon2, divisor;
diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c
index d97533d21ac4..c157103ed8eb 100644
--- a/arch/arm/mach-s3c24xx/common.c
+++ b/arch/arm/mach-s3c24xx/common.c
@@ -236,6 +236,11 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
 /* Serial port registrations */
+#define S3C2410_PA_UART0      (S3C24XX_PA_UART)
+#define S3C2410_PA_UART1      (S3C24XX_PA_UART + 0x4000 )
+#define S3C2410_PA_UART2      (S3C24XX_PA_UART + 0x8000 )
+#define S3C2443_PA_UART3      (S3C24XX_PA_UART + 0xC000 )
 static struct resource s3c2410_uart0_resource[] = {
        [0] = DEFINE_RES_MEM(S3C2410_PA_UART0, SZ_16K),
        [1] = DEFINE_RES_NAMED(IRQ_S3CUART_RX0, \
diff --git a/arch/arm/mach-s3c24xx/cpufreq.c b/arch/arm/mach-s3c24xx/cpufreq.c
index 5f181e733eee..3c0e78ede0da 100644
--- a/arch/arm/mach-s3c24xx/cpufreq.c
+++ b/arch/arm/mach-s3c24xx/cpufreq.c
@@ -204,7 +204,6 @@ static int s3c_cpufreq_settarget(struct cpufreq_policy *policy,
        freqs.old = cpu_cur.freq;
        freqs.new = cpu_new.freq;
-        freqs.freqs.cpu = 0;
        freqs.freqs.old = cpu_cur.freq.armclk / 1000;
        freqs.freqs.new = cpu_new.freq.armclk / 1000;
@@ -218,9 +217,7 @@ static int s3c_cpufreq_settarget(struct cpufreq_policy *policy,
        s3c_cpufreq_updateclk(clk_pclk, cpu_new.freq.pclk);
        /* start the frequency change */
+        cpufreq_notify_transition(policy, &freqs.freqs, CPUFREQ_PRECHANGE);
-        if (policy)
-                cpufreq_notify_transition(&freqs.freqs, CPUFREQ_PRECHANGE);
        /* If hclk is staying the same, then we do not need to
         * re-write the IO or the refresh timings whilst we are changing
@@ -264,8 +261,7 @@ static int s3c_cpufreq_settarget(struct cpufreq_policy *policy,
        local_irq_restore(flags);
        /* notify everyone we've done this */
-        if (policy)
+        cpufreq_notify_transition(policy, &freqs.freqs, CPUFREQ_POSTCHANGE);
-                cpufreq_notify_transition(&freqs.freqs, CPUFREQ_POSTCHANGE);
        s3c_freq_dbg("%s: finished\n", __func__);
        return 0;
diff --git a/arch/arm/mach-s3c64xx/cpuidle.c b/arch/arm/mach-s3c64xx/cpuidle.c
index ead5fab0dbb5..3c8ab07c2012 100644
--- a/arch/arm/mach-s3c64xx/cpuidle.c
+++ b/arch/arm/mach-s3c64xx/cpuidle.c
@@ -40,12 +40,9 @@ static int s3c64xx_enter_idle(struct cpuidle_device *dev,
        return index;
 }
-static DEFINE_PER_CPU(struct cpuidle_device, s3c64xx_cpuidle_device);
 static struct cpuidle_driver s3c64xx_cpuidle_driver = {
        .name   = "s3c64xx_cpuidle",
        .owner  = THIS_MODULE,
-        .en_core_tk_irqen = 1,
        .states = {
                {
                        .enter            = s3c64xx_enter_idle,
@@ -61,16 +58,6 @@ static struct cpuidle_driver s3c64xx_cpuidle_driver = {
 static int __init s3c64xx_init_cpuidle(void)
 {
-        int ret;
+        return cpuidle_register(&s3c64xx_cpuidle_driver, NULL);
-        cpuidle_register_driver(&s3c64xx_cpuidle_driver);
-        ret = cpuidle_register_device(&s3c64xx_cpuidle_device);
-        if (ret) {
-                pr_err("Failed to register cpuidle device: %d\n", ret);
-                return ret;
-        }
-        return 0;
 }
 device_initcall(s3c64xx_init_cpuidle);
diff --git a/arch/arm/mach-s3c64xx/setup-usb-phy.c b/arch/arm/mach-s3c64xx/setup-usb-phy.c
index c8174d95339b..ca960bda02fd 100644
--- a/arch/arm/mach-s3c64xx/setup-usb-phy.c
+++ b/arch/arm/mach-s3c64xx/setup-usb-phy.c
@@ -76,7 +76,7 @@ static int s3c_usb_otgphy_exit(struct platform_device *pdev)
 int s5p_usb_phy_init(struct platform_device *pdev, int type)
 {
-        if (type == S5P_USB_PHY_DEVICE)
+        if (type == USB_PHY_TYPE_DEVICE)
                return s3c_usb_otgphy_init(pdev);
        return -EINVAL;
@@ -84,7 +84,7 @@ int s5p_usb_phy_init(struct platform_device *pdev, int type)
 int s5p_usb_phy_exit(struct platform_device *pdev, int type)
 {
-        if (type == S5P_USB_PHY_DEVICE)
+        if (type == USB_PHY_TYPE_DEVICE)
                return s3c_usb_otgphy_exit(pdev);
        return -EINVAL;
diff --git a/arch/arm/mach-s5pv210/setup-usb-phy.c b/arch/arm/mach-s5pv210/setup-usb-phy.c
index 356a0900af03..b2ee5333f89c 100644
--- a/arch/arm/mach-s5pv210/setup-usb-phy.c
+++ b/arch/arm/mach-s5pv210/setup-usb-phy.c
@@ -80,7 +80,7 @@ static int s5pv210_usb_otgphy_exit(struct platform_device *pdev)
 int s5p_usb_phy_init(struct platform_device *pdev, int type)
 {
-        if (type == S5P_USB_PHY_DEVICE)
+        if (type == USB_PHY_TYPE_DEVICE)
                return s5pv210_usb_otgphy_init(pdev);
        return -EINVAL;
@@ -88,7 +88,7 @@ int s5p_usb_phy_init(struct platform_device *pdev, int type)
 int s5p_usb_phy_exit(struct platform_device *pdev, int type)
 {
-        if (type == S5P_USB_PHY_DEVICE)
+        if (type == USB_PHY_TYPE_DEVICE)
                return s5pv210_usb_otgphy_exit(pdev);
        return -EINVAL;
diff --git a/arch/arm/mach-sa1100/Kconfig b/arch/arm/mach-sa1100/Kconfig
index ca14dbdcfb22..04f9784ff0ed 100644
--- a/arch/arm/mach-sa1100/Kconfig
+++ b/arch/arm/mach-sa1100/Kconfig
@@ -4,7 +4,7 @@ menu "SA11x0 Implementations"
 config SA1100_ASSABET
        bool "Assabet"
-        select CPU_FREQ_SA1110
+        select ARM_SA1110_CPUFREQ
        help
          Say Y here if you are using the Intel(R) StrongARM(R) SA-1110
          Microprocessor Development Board (also known as the Assabet).
@@ -20,7 +20,7 @@ config ASSABET_NEPONSET
 config SA1100_CERF
        bool "CerfBoard"
-        select CPU_FREQ_SA1110
+        select ARM_SA1110_CPUFREQ
        help
          The Intrinsyc CerfBoard is based on the StrongARM 1110 (Discontinued).
          More information is available at:
@@ -47,7 +47,7 @@ endchoice
 config SA1100_COLLIE
        bool "Sharp Zaurus SL5500"
-        # FIXME: select CPU_FREQ_SA11x0
+        # FIXME: select ARM_SA11x0_CPUFREQ
        select SHARP_LOCOMO
        select SHARP_PARAM
        select SHARP_SCOOP
@@ -56,7 +56,7 @@ config SA1100_COLLIE
 config SA1100_H3100
        bool "Compaq iPAQ H3100"
-        select CPU_FREQ_SA1110
+        select ARM_SA1110_CPUFREQ
        select HTC_EGPIO
        help
          Say Y here if you intend to run this kernel on the Compaq iPAQ
@@ -67,7 +67,7 @@ config SA1100_H3100
 config SA1100_H3600
        bool "Compaq iPAQ H3600/H3700"
-        select CPU_FREQ_SA1110
+        select ARM_SA1110_CPUFREQ
        select HTC_EGPIO
        help
          Say Y here if you intend to run this kernel on the Compaq iPAQ
@@ -78,7 +78,7 @@ config SA1100_H3600
 config SA1100_BADGE4
        bool "HP Labs BadgePAD 4"
-        select CPU_FREQ_SA1100
+        select ARM_SA1100_CPUFREQ
        select SA1111
        help
          Say Y here if you want to build a kernel for the HP Laboratories
@@ -86,7 +86,7 @@ config SA1100_BADGE4
 config SA1100_JORNADA720
        bool "HP Jornada 720"
-        # FIXME: select CPU_FREQ_SA11x0
+        # FIXME: select ARM_SA11x0_CPUFREQ
        select SA1111
        help
          Say Y here if you want to build a kernel for the HP Jornada 720
@@ -105,14 +105,14 @@ config SA1100_JORNADA720_SSP
 config SA1100_HACKKIT
        bool "HackKit Core CPU Board"
-        select CPU_FREQ_SA1100
+        select ARM_SA1100_CPUFREQ
        help
          Say Y here to support the HackKit Core CPU Board
          <http://hackkit.eletztrick.de>;
 config SA1100_LART
        bool "LART"
-        select CPU_FREQ_SA1100
+        select ARM_SA1100_CPUFREQ
        help
          Say Y here if you are using the Linux Advanced Radio Terminal
          (also known as the LART).  See <http://www.lartmaker.nl/> for
@@ -120,7 +120,7 @@ config SA1100_LART
 config SA1100_NANOENGINE
        bool "nanoEngine"
-        select CPU_FREQ_SA1110
+        select ARM_SA1110_CPUFREQ
        select PCI
        select PCI_NANOENGINE
        help
@@ -130,7 +130,7 @@ config SA1100_NANOENGINE
 config SA1100_PLEB
        bool "PLEB"
-        select CPU_FREQ_SA1100
+        select ARM_SA1100_CPUFREQ
        help
          Say Y here if you are using version 1 of the Portable Linux
          Embedded Board (also known as PLEB).
@@ -139,7 +139,7 @@ config SA1100_PLEB
 config SA1100_SHANNON
        bool "Shannon"
-        select CPU_FREQ_SA1100
+        select ARM_SA1100_CPUFREQ
        help
          The Shannon (also known as a Tuxscreen, and also as a IS2630) was a
          limited edition webphone produced by Philips. The Shannon is a SA1100
@@ -148,7 +148,7 @@ config SA1100_SHANNON
 config SA1100_SIMPAD
        bool "Simpad"
-        select CPU_FREQ_SA1110
+        select ARM_SA1110_CPUFREQ
        help
          The SIEMENS webpad SIMpad is based on the StrongARM 1110. There
          are two different versions CL4 and SL4. CL4 has 32MB RAM and 16MB
diff --git a/arch/arm/mach-sa1100/Makefile b/arch/arm/mach-sa1100/Makefile
index 1aed9e70465d..2732eef48966 100644
--- a/arch/arm/mach-sa1100/Makefile
+++ b/arch/arm/mach-sa1100/Makefile
@@ -8,9 +8,6 @@ obj-m :=
 obj-n :=
 obj-  :=
-obj-$(CONFIG_CPU_FREQ_SA1100)           += cpu-sa1100.o
-obj-$(CONFIG_CPU_FREQ_SA1110)           += cpu-sa1110.o
 # Specific board support
 obj-$(CONFIG_SA1100_ASSABET)            += assabet.o
 obj-$(CONFIG_ASSABET_NEPONSET)          += neponset.o
diff --git a/arch/arm/mach-sa1100/cpu-sa1100.c b/arch/arm/mach-sa1100/cpu-sa1100.c
deleted file mode 100644
index e8f4d1e19233..000000000000
--- a/arch/arm/mach-sa1100/cpu-sa1100.c
+++ /dev/null
@@ -1,249 +0,0 @@
-/*
- * cpu-sa1100.c: clock scaling for the SA1100
- *
- * Copyright (C) 2000 2001, The Delft University of Technology
- *
- * Authors:
- * - Johan Pouwelse (J.A.Pouwelse@its.tudelft.nl): initial version
- * - Erik Mouw (J.A.K.Mouw@its.tudelft.nl):
- *   - major rewrite for linux-2.3.99
- *   - rewritten for the more generic power management scheme in
- *     linux-2.4.5-rmk1
- *
- * This software has been developed while working on the LART
- * computing board (http://www.lartmaker.nl/), which is
- * sponsored by the Mobile Multi-media Communications
- * (http://www.mobimedia.org/) and Ubiquitous Communications
- * (http://www.ubicom.tudelft.nl/) projects.
- *
- * The authors can be reached at:
- *
- *  Erik Mouw
- *  Information and Communication Theory Group
- *  Faculty of Information Technology and Systems
- *  Delft University of Technology
- *  P.O. Box 5031
- *  2600 GA Delft
- *  The Netherlands
- *
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
- *
- * Theory of operations
- * ====================
- *
- * Clock scaling can be used to lower the power consumption of the CPU
- * core. This will give you a somewhat longer running time.
- *
- * The SA-1100 has a single register to change the core clock speed:
- *
- *   PPCR      0x90020014    PLL config
- *
- * However, the DRAM timings are closely related to the core clock
- * speed, so we need to change these, too. The used registers are:
- *
- *   MDCNFG    0xA0000000    DRAM config
- *   MDCAS0    0xA0000004    Access waveform
- *   MDCAS1    0xA0000008    Access waveform
- *   MDCAS2    0xA000000C    Access waveform
- *
- * Care must be taken to change the DRAM parameters the correct way,
- * because otherwise the DRAM becomes unusable and the kernel will
- * crash.
- *
- * The simple solution to avoid a kernel crash is to put the actual
- * clock change in ROM and jump to that code from the kernel. The main
- * disadvantage is that the ROM has to be modified, which is not
- * possible on all SA-1100 platforms. Another disadvantage is that
- * jumping to ROM makes clock switching unnecessary complicated.
- *
- * The idea behind this driver is that the memory configuration can be
- * changed while running from DRAM (even with interrupts turned on!)
- * as long as all re-configuration steps yield a valid DRAM
- * configuration. The advantages are clear: it will run on all SA-1100
- * platforms, and the code is very simple.
- *
- * If you really want to understand what is going on in
- * sa1100_update_dram_timings(), you'll have to read sections 8.2,
- * 9.5.7.3, and 10.2 from the "Intel StrongARM SA-1100 Microprocessor
- * Developers Manual" (available for free from Intel).
- *
- */
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/cpufreq.h>
-#include <linux/io.h>
-#include <asm/cputype.h>
-#include <mach/hardware.h>
-#include "generic.h"
-struct sa1100_dram_regs {
-        int speed;
-        u32 mdcnfg;
-        u32 mdcas0;
-        u32 mdcas1;
-        u32 mdcas2;
-};
-static struct cpufreq_driver sa1100_driver;
-static struct sa1100_dram_regs sa1100_dram_settings[] = {
-        /*speed,     mdcnfg,     mdcas0,     mdcas1,     mdcas2,   clock freq */
-        { 59000, 0x00dc88a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/*  59.0 MHz */
-        { 73700, 0x011490a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/*  73.7 MHz */
-        { 88500, 0x014e90a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/*  88.5 MHz */
-        {103200, 0x01889923, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 103.2 MHz */
-        {118000, 0x01c29923, 0x9999998f, 0xfffffff9, 0xffffffff},/* 118.0 MHz */
-        {132700, 0x01fb2123, 0x9999998f, 0xfffffff9, 0xffffffff},/* 132.7 MHz */
-        {147500, 0x02352123, 0x3333330f, 0xfffffff3, 0xffffffff},/* 147.5 MHz */
-        {162200, 0x026b29a3, 0x38e38e1f, 0xfff8e38e, 0xffffffff},/* 162.2 MHz */
-        {176900, 0x02a329a3, 0x71c71c1f, 0xfff1c71c, 0xffffffff},/* 176.9 MHz */
-        {191700, 0x02dd31a3, 0xe38e383f, 0xffe38e38, 0xffffffff},/* 191.7 MHz */
-        {206400, 0x03153223, 0xc71c703f, 0xffc71c71, 0xffffffff},/* 206.4 MHz */
-        {221200, 0x034fba23, 0xc71c703f, 0xffc71c71, 0xffffffff},/* 221.2 MHz */
-        {235900, 0x03853a23, 0xe1e1e07f, 0xe1e1e1e1, 0xffffffe1},/* 235.9 MHz */
-        {250700, 0x03bf3aa3, 0xc3c3c07f, 0xc3c3c3c3, 0xffffffc3},/* 250.7 MHz */
-        {265400, 0x03f7c2a3, 0xc3c3c07f, 0xc3c3c3c3, 0xffffffc3},/* 265.4 MHz */
-        {280200, 0x0431c2a3, 0x878780ff, 0x87878787, 0xffffff87},/* 280.2 MHz */
-        { 0, 0, 0, 0, 0 } /* last entry */
-};
-static void sa1100_update_dram_timings(int current_speed, int new_speed)
-{
-        struct sa1100_dram_regs *settings = sa1100_dram_settings;
-        /* find speed */
-        while (settings->speed != 0) {
-                if (new_speed == settings->speed)
-                        break;
-                settings++;
-        }
-        if (settings->speed == 0) {
-                panic("%s: couldn't find dram setting for speed %d\n",
-                      __func__, new_speed);
-        }
-        /* No risk, no fun: run with interrupts on! */
-        if (new_speed > current_speed) {
-                /* We're going FASTER, so first relax the memory
-                 * timings before changing the core frequency
-                 */
-                /* Half the memory access clock */
-                MDCNFG |= MDCNFG_CDB2;
-                /* The order of these statements IS important, keep 8
-                 * pulses!!
-                 */
-                MDCAS2 = settings->mdcas2;
-                MDCAS1 = settings->mdcas1;
-                MDCAS0 = settings->mdcas0;
-                MDCNFG = settings->mdcnfg;
-        } else {
-                /* We're going SLOWER: first decrease the core
-                 * frequency and then tighten the memory settings.
-                 */
-                /* Half the memory access clock */
-                MDCNFG |= MDCNFG_CDB2;
-                /* The order of these statements IS important, keep 8
-                 * pulses!!
-                 */
-                MDCAS0 = settings->mdcas0;
-                MDCAS1 = settings->mdcas1;
-                MDCAS2 = settings->mdcas2;
-                MDCNFG = settings->mdcnfg;
-        }
-}
-static int sa1100_target(struct cpufreq_policy *policy,
-                         unsigned int target_freq,
-                         unsigned int relation)
-{
-        unsigned int cur = sa11x0_getspeed(0);
-        unsigned int new_ppcr;
-        struct cpufreq_freqs freqs;
-        new_ppcr = sa11x0_freq_to_ppcr(target_freq);
-        switch (relation) {
-        case CPUFREQ_RELATION_L:
-                if (sa11x0_ppcr_to_freq(new_ppcr) > policy->max)
-                        new_ppcr--;
-                break;
-        case CPUFREQ_RELATION_H:
-                if ((sa11x0_ppcr_to_freq(new_ppcr) > target_freq) &&
-                    (sa11x0_ppcr_to_freq(new_ppcr - 1) >= policy->min))
-                        new_ppcr--;
-                break;
-        }
-        freqs.old = cur;
-        freqs.new = sa11x0_ppcr_to_freq(new_ppcr);
-        freqs.cpu = 0;
-        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-        if (freqs.new > cur)
-                sa1100_update_dram_timings(cur, freqs.new);
-        PPCR = new_ppcr;
-        if (freqs.new < cur)
-                sa1100_update_dram_timings(cur, freqs.new);
-        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-        return 0;
-}
-static int __init sa1100_cpu_init(struct cpufreq_policy *policy)
-{
-        if (policy->cpu != 0)
-                return -EINVAL;
-        policy->cur = policy->min = policy->max = sa11x0_getspeed(0);
-        policy->cpuinfo.min_freq = 59000;
-        policy->cpuinfo.max_freq = 287000;
-        policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
-        return 0;
-}
-static struct cpufreq_driver sa1100_driver __refdata = {
-        .flags          = CPUFREQ_STICKY,
-        .verify         = sa11x0_verify_speed,
-        .target         = sa1100_target,
-        .get            = sa11x0_getspeed,
-        .init           = sa1100_cpu_init,
-        .name           = "sa1100",
-};
-static int __init sa1100_dram_init(void)
-{
-        if (cpu_is_sa1100())
-                return cpufreq_register_driver(&sa1100_driver);
-        else
-                return -ENODEV;
-}
-arch_initcall(sa1100_dram_init);
diff --git a/arch/arm/mach-sa1100/cpu-sa1110.c b/arch/arm/mach-sa1100/cpu-sa1110.c
deleted file mode 100644
index 48c45b0c92bb..000000000000
--- a/arch/arm/mach-sa1100/cpu-sa1110.c
+++ /dev/null
@@ -1,408 +0,0 @@
-/*
- *  linux/arch/arm/mach-sa1100/cpu-sa1110.c
- *
- *  Copyright (C) 2001 Russell King
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Note: there are two erratas that apply to the SA1110 here:
- *  7 - SDRAM auto-power-up failure (rev A0)
- * 13 - Corruption of internal register reads/writes following
- *      SDRAM reads (rev A0, B0, B1)
- *
- * We ignore rev. A0 and B0 devices; I don't think they're worth supporting.
- *
- * The SDRAM type can be passed on the command line as cpu_sa1110.sdram=type
- */
-#include <linux/cpufreq.h>
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/io.h>
-#include <linux/kernel.h>
-#include <linux/moduleparam.h>
-#include <linux/types.h>
-#include <asm/cputype.h>
-#include <asm/mach-types.h>
-#include <mach/hardware.h>
-#include "generic.h"
-#undef DEBUG
-struct sdram_params {
-        const char name[20];
-        u_char  rows;           /* bits                          */
-        u_char  cas_latency;    /* cycles                        */
-        u_char  tck;            /* clock cycle time (ns)         */
-        u_char  trcd;           /* activate to r/w (ns)          */
-        u_char  trp;            /* precharge to activate (ns)    */
-        u_char  twr;            /* write recovery time (ns)      */
-        u_short refresh;        /* refresh time for array (us)   */
-};
-struct sdram_info {
-        u_int   mdcnfg;
-        u_int   mdrefr;
-        u_int   mdcas[3];
-};
-static struct sdram_params sdram_tbl[] __initdata = {
-        {       /* Toshiba TC59SM716 CL2 */
-                .name           = "TC59SM716-CL2",
-                .rows           = 12,
-                .tck            = 10,
-                .trcd           = 20,
-                .trp            = 20,
-                .twr            = 10,
-                .refresh        = 64000,
-                .cas_latency    = 2,
-        }, {    /* Toshiba TC59SM716 CL3 */
-                .name           = "TC59SM716-CL3",
-                .rows           = 12,
-                .tck            = 8,
-                .trcd           = 20,
-                .trp            = 20,
-                .twr            = 8,
-                .refresh        = 64000,
-                .cas_latency    = 3,
-        }, {    /* Samsung K4S641632D TC75 */
-                .name           = "K4S641632D",
-                .rows           = 14,
-                .tck            = 9,
-                .trcd           = 27,
-                .trp            = 20,
-                .twr            = 9,
-                .refresh        = 64000,
-                .cas_latency    = 3,
-        }, {    /* Samsung K4S281632B-1H */
-                .name           = "K4S281632B-1H",
-                .rows           = 12,
-                .tck            = 10,
-                .trp            = 20,
-                .twr            = 10,
-                .refresh        = 64000,
-                .cas_latency    = 3,
-        }, {    /* Samsung KM416S4030CT */
-                .name           = "KM416S4030CT",
-                .rows           = 13,
-                .tck            = 8,
-                .trcd           = 24,   /* 3 CLKs */
-                .trp            = 24,   /* 3 CLKs */
-                .twr            = 16,   /* Trdl: 2 CLKs */
-                .refresh        = 64000,
-                .cas_latency    = 3,
-        }, {    /* Winbond W982516AH75L CL3 */
-                .name           = "W982516AH75L",
-                .rows           = 16,
-                .tck            = 8,
-                .trcd           = 20,
-                .trp            = 20,
-                .twr            = 8,
-                .refresh        = 64000,
-                .cas_latency    = 3,
-        }, {    /* Micron MT48LC8M16A2TG-75 */
-                .name           = "MT48LC8M16A2TG-75",
-                .rows           = 12,
-                .tck            = 8,
-                .trcd           = 20,
-                .trp            = 20,
-                .twr            = 8,
-                .refresh        = 64000,
-                .cas_latency    = 3,
-        },
-};
-static struct sdram_params sdram_params;
-/*
- * Given a period in ns and frequency in khz, calculate the number of
- * cycles of frequency in period.  Note that we round up to the next
- * cycle, even if we are only slightly over.
- */
-static inline u_int ns_to_cycles(u_int ns, u_int khz)
-{
-        return (ns * khz + 999999) / 1000000;
-}
-/*
- * Create the MDCAS register bit pattern.
- */
-static inline void set_mdcas(u_int *mdcas, int delayed, u_int rcd)
-{
-        u_int shift;
-        rcd = 2 * rcd - 1;
-        shift = delayed + 1 + rcd;
-        mdcas[0]  = (1 << rcd) - 1;
-        mdcas[0] |= 0x55555555 << shift;
-        mdcas[1]  = mdcas[2] = 0x55555555 << (shift & 1);
-}
-static void
-sdram_calculate_timing(struct sdram_info *sd, u_int cpu_khz,
-                       struct sdram_params *sdram)
-{
-        u_int mem_khz, sd_khz, trp, twr;
-        mem_khz = cpu_khz / 2;
-        sd_khz = mem_khz;
-        /*
-         * If SDCLK would invalidate the SDRAM timings,
-         * run SDCLK at half speed.
-         *
-         * CPU steppings prior to B2 must either run the memory at
-         * half speed or use delayed read latching (errata 13).
-         */
-        if ((ns_to_cycles(sdram->tck, sd_khz) > 1) ||
-            (CPU_REVISION < CPU_SA1110_B2 && sd_khz < 62000))
-                sd_khz /= 2;
-        sd->mdcnfg = MDCNFG & 0x007f007f;
-        twr = ns_to_cycles(sdram->twr, mem_khz);
-        /* trp should always be >1 */
-        trp = ns_to_cycles(sdram->trp, mem_khz) - 1;
-        if (trp < 1)
-                trp = 1;
-        sd->mdcnfg |= trp << 8;
-        sd->mdcnfg |= trp << 24;
-        sd->mdcnfg |= sdram->cas_latency << 12;
-        sd->mdcnfg |= sdram->cas_latency << 28;
-        sd->mdcnfg |= twr << 14;
-        sd->mdcnfg |= twr << 30;
-        sd->mdrefr = MDREFR & 0xffbffff0;
-        sd->mdrefr |= 7;
-        if (sd_khz != mem_khz)
-                sd->mdrefr |= MDREFR_K1DB2;
-        /* initial number of '1's in MDCAS + 1 */
-        set_mdcas(sd->mdcas, sd_khz >= 62000,
-                ns_to_cycles(sdram->trcd, mem_khz));
-#ifdef DEBUG
-        printk(KERN_DEBUG "MDCNFG: %08x MDREFR: %08x MDCAS0: %08x MDCAS1: %08x MDCAS2: %08x\n",
-                sd->mdcnfg, sd->mdrefr, sd->mdcas[0], sd->mdcas[1],
-                sd->mdcas[2]);
-#endif
-}
-/*
- * Set the SDRAM refresh rate.
- */
-static inline void sdram_set_refresh(u_int dri)
-{
-        MDREFR = (MDREFR & 0xffff000f) | (dri << 4);
-        (void) MDREFR;
-}
-/*
- * Update the refresh period.  We do this such that we always refresh
- * the SDRAMs within their permissible period.  The refresh period is
- * always a multiple of the memory clock (fixed at cpu_clock / 2).
- *
- * FIXME: we don't currently take account of burst accesses here,
- * but neither do Intels DM nor Angel.
- */
-static void
-sdram_update_refresh(u_int cpu_khz, struct sdram_params *sdram)
-{
-        u_int ns_row = (sdram->refresh * 1000) >> sdram->rows;
-        u_int dri = ns_to_cycles(ns_row, cpu_khz / 2) / 32;
-#ifdef DEBUG
-        mdelay(250);
-        printk(KERN_DEBUG "new dri value = %d\n", dri);
-#endif
-        sdram_set_refresh(dri);
-}
-/*
- * Ok, set the CPU frequency.
- */
-static int sa1110_target(struct cpufreq_policy *policy,
-                         unsigned int target_freq,
-                         unsigned int relation)
-{
-        struct sdram_params *sdram = &sdram_params;
-        struct cpufreq_freqs freqs;
-        struct sdram_info sd;
-        unsigned long flags;
-        unsigned int ppcr, unused;
-        switch (relation) {
-        case CPUFREQ_RELATION_L:
-                ppcr = sa11x0_freq_to_ppcr(target_freq);
-                if (sa11x0_ppcr_to_freq(ppcr) > policy->max)
-                        ppcr--;
-                break;
-        case CPUFREQ_RELATION_H:
-                ppcr = sa11x0_freq_to_ppcr(target_freq);
-                if (ppcr && (sa11x0_ppcr_to_freq(ppcr) > target_freq) &&
-                    (sa11x0_ppcr_to_freq(ppcr-1) >= policy->min))
-                        ppcr--;
-                break;
-        default:
-                return -EINVAL;
-        }
-        freqs.old = sa11x0_getspeed(0);
-        freqs.new = sa11x0_ppcr_to_freq(ppcr);
-        freqs.cpu = 0;
-        sdram_calculate_timing(&sd, freqs.new, sdram);
-#if 0
-        /*
-         * These values are wrong according to the SA1110 documentation
-         * and errata, but they seem to work.  Need to get a storage
-         * scope on to the SDRAM signals to work out why.
-         */
-        if (policy->max < 147500) {
-                sd.mdrefr |= MDREFR_K1DB2;
-                sd.mdcas[0] = 0xaaaaaa7f;
-        } else {
-                sd.mdrefr &= ~MDREFR_K1DB2;
-                sd.mdcas[0] = 0xaaaaaa9f;
-        }
-        sd.mdcas[1] = 0xaaaaaaaa;
-        sd.mdcas[2] = 0xaaaaaaaa;
-#endif
-        cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-        /*
-         * The clock could be going away for some time.  Set the SDRAMs
-         * to refresh rapidly (every 64 memory clock cycles).  To get
-         * through the whole array, we need to wait 262144 mclk cycles.
-         * We wait 20ms to be safe.
-         */
-        sdram_set_refresh(2);
-        if (!irqs_disabled())
-                msleep(20);
-        else
-                mdelay(20);
-        /*
-         * Reprogram the DRAM timings with interrupts disabled, and
-         * ensure that we are doing this within a complete cache line.
-         * This means that we won't access SDRAM for the duration of
-         * the programming.
-         */
-        local_irq_save(flags);
-        asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
-        udelay(10);
-        __asm__ __volatile__("\n\
-                b       2f                                      \n\
-                .align  5                                       \n\
-1:              str     %3, [%1, #0]            @ MDCNFG        \n\
-                str     %4, [%1, #28]           @ MDREFR        \n\
-                str     %5, [%1, #4]            @ MDCAS0        \n\
-                str     %6, [%1, #8]            @ MDCAS1        \n\
-                str     %7, [%1, #12]           @ MDCAS2        \n\
-                str     %8, [%2, #0]            @ PPCR          \n\
-                ldr     %0, [%1, #0]                            \n\
-                b       3f                                      \n\
-2:              b       1b                                      \n\
-3:              nop                                             \n\
-                nop"
-                : "=&r" (unused)
-                : "r" (&MDCNFG), "r" (&PPCR), "0" (sd.mdcnfg),
-                  "r" (sd.mdrefr), "r" (sd.mdcas[0]),
-                  "r" (sd.mdcas[1]), "r" (sd.mdcas[2]), "r" (ppcr));
-        local_irq_restore(flags);
-        /*
-         * Now, return the SDRAM refresh back to normal.
-         */
-        sdram_update_refresh(freqs.new, sdram);
-        cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-        return 0;
-}
-static int __init sa1110_cpu_init(struct cpufreq_policy *policy)
-{
-        if (policy->cpu != 0)
-                return -EINVAL;
-        policy->cur = policy->min = policy->max = sa11x0_getspeed(0);
-        policy->cpuinfo.min_freq = 59000;
-        policy->cpuinfo.max_freq = 287000;
-        policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
-        return 0;
-}
-/* sa1110_driver needs __refdata because it must remain after init registers
- * it with cpufreq_register_driver() */
-static struct cpufreq_driver sa1110_driver __refdata = {
-        .flags          = CPUFREQ_STICKY,
-        .verify         = sa11x0_verify_speed,
-        .target         = sa1110_target,
-        .get            = sa11x0_getspeed,
-        .init           = sa1110_cpu_init,
-        .name           = "sa1110",
-};
-static struct sdram_params *sa1110_find_sdram(const char *name)
-{
-        struct sdram_params *sdram;
-        for (sdram = sdram_tbl; sdram < sdram_tbl + ARRAY_SIZE(sdram_tbl);
-             sdram++)
-                if (strcmp(name, sdram->name) == 0)
-                        return sdram;
-        return NULL;
-}
-static char sdram_name[16];
-static int __init sa1110_clk_init(void)
-{
-        struct sdram_params *sdram;
-        const char *name = sdram_name;
-        if (!cpu_is_sa1110())
-                return -ENODEV;
-        if (!name[0]) {
-                if (machine_is_assabet())
-                        name = "TC59SM716-CL3";
-                if (machine_is_pt_system3())
-                        name = "K4S641632D";
-                if (machine_is_h3100())
-                        name = "KM416S4030CT";
-                if (machine_is_jornada720())
-                        name = "K4S281632B-1H";
-                if (machine_is_nanoengine())
-                        name = "MT48LC8M16A2TG-75";
-        }
-        sdram = sa1110_find_sdram(name);
-        if (sdram) {
-                printk(KERN_DEBUG "SDRAM: tck: %d trcd: %d trp: %d"
-                        " twr: %d refresh: %d cas_latency: %d\n",
-                        sdram->tck, sdram->trcd, sdram->trp,
-                        sdram->twr, sdram->refresh, sdram->cas_latency);
-                memcpy(&sdram_params, sdram, sizeof(sdram_params));
-                return cpufreq_register_driver(&sa1110_driver);
-        }
-        return 0;
-}
-module_param_string(sdram, sdram_name, sizeof(sdram_name), 0);
-arch_initcall(sa1110_clk_init);
diff --git a/arch/arm/mach-sa1100/include/mach/generic.h b/arch/arm/mach-sa1100/include/mach/generic.h
new file mode 100644
index 000000000000..665542e0c9e2
--- /dev/null
+++ b/arch/arm/mach-sa1100/include/mach/generic.h
@@ -0,0 +1 @@
+#include "../../generic.h"
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c
index b63dec848195..153555724988 100644
--- a/arch/arm/mach-shark/core.c
+++ b/arch/arm/mach-shark/core.c
@@ -10,6 +10,7 @@
 #include <linux/sched.h>
 #include <linux/serial_8250.h>
 #include <linux/io.h>
+#include <linux/cpu.h>
 #include <asm/setup.h>
 #include <asm/mach-types.h>
@@ -130,7 +131,7 @@ static void __init shark_timer_init(void)
 static void shark_init_early(void)
 {
-        disable_hlt();
+        cpu_idle_poll_ctrl(true);
 }
 MACHINE_START(SHARK, "Shark")
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index f2ec0777cfbe..881e5c0e41dd 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -24,6 +24,7 @@
 #include <linux/err.h>
 #include <linux/kernel.h>
 #include <linux/input.h>
+#include <linux/platform_data/st1232_pdata.h>
 #include <linux/irq.h>
 #include <linux/platform_device.h>
 #include <linux/gpio.h>
@@ -169,7 +170,7 @@ static int usbhsf_get_id(struct platform_device *pdev)
        return USBHS_GADGET;
 }
-static void usbhsf_power_ctrl(struct platform_device *pdev,
+static int usbhsf_power_ctrl(struct platform_device *pdev,
                              void __iomem *base, int enable)
 {
        struct usbhsf_private *priv = usbhsf_get_priv(pdev);
@@ -223,6 +224,8 @@ static void usbhsf_power_ctrl(struct platform_device *pdev,
                clk_disable(priv->pci);         /* usb work around */
                clk_disable(priv->usb24);       /* usb work around */
        }
+        return 0;
 }
 static int usbhsf_get_vbus(struct platform_device *pdev)
@@ -239,7 +242,7 @@ static irqreturn_t usbhsf_interrupt(int irq, void *data)
        return IRQ_HANDLED;
 }
-static void usbhsf_hardware_exit(struct platform_device *pdev)
+static int usbhsf_hardware_exit(struct platform_device *pdev)
 {
        struct usbhsf_private *priv = usbhsf_get_priv(pdev);
@@ -264,6 +267,8 @@ static void usbhsf_hardware_exit(struct platform_device *pdev)
        priv->usbh_base = NULL;
        free_irq(IRQ7, pdev);
+        return 0;
 }
 static int usbhsf_hardware_init(struct platform_device *pdev)
@@ -878,10 +883,15 @@ static struct platform_device i2c_gpio_device = {
 };
 /* I2C */
+static struct st1232_pdata st1232_i2c0_pdata = {
+        .reset_gpio = 166,
+};
 static struct i2c_board_info i2c0_devices[] = {
        {
                I2C_BOARD_INFO("st1232-ts", 0x55),
                .irq = evt2irq(0x0340),
+                .platform_data = &st1232_i2c0_pdata,
        },
        {
                I2C_BOARD_INFO("wm8978", 0x1a),
@@ -1005,7 +1015,6 @@ static void __init eva_init(void)
        /* Touchscreen */
        gpio_request(GPIO_FN_IRQ10,     NULL); /* TP_INT */
-        gpio_request_one(GPIO_PORT166, GPIOF_OUT_INIT_HIGH, NULL); /* TP_RST_B */
        /* GETHER */
        gpio_request(GPIO_FN_ET_CRS,            NULL);
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
index 7f3a6b7e7b7c..a385f570bbfc 100644
--- a/arch/arm/mach-shmobile/board-kzm9g.c
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -155,12 +155,14 @@ static int usbhs_get_vbus(struct platform_device *pdev)
        return !((1 << 7) & __raw_readw(priv->cr2));
 }
-static void usbhs_phy_reset(struct platform_device *pdev)
+static int usbhs_phy_reset(struct platform_device *pdev)
 {
        struct usbhs_private *priv = usbhs_get_priv(pdev);
        /* init phy */
        __raw_writew(0x8a0a, priv->cr2);
+        return 0;
 }
 static int usbhs_get_id(struct platform_device *pdev)
@@ -202,7 +204,7 @@ static int usbhs_hardware_init(struct platform_device *pdev)
        return 0;
 }
-static void usbhs_hardware_exit(struct platform_device *pdev)
+static int usbhs_hardware_exit(struct platform_device *pdev)
 {
        struct usbhs_private *priv = usbhs_get_priv(pdev);
@@ -210,6 +212,8 @@ static void usbhs_hardware_exit(struct platform_device *pdev)
        __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->phy);
        free_irq(IRQ15, pdev);
+        return 0;
 }
 static u32 usbhs_pipe_cfg[] = {
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index db968a585ff0..979237c18dad 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -596,12 +596,14 @@ static int usbhs_get_vbus(struct platform_device *pdev)
        return usbhs_is_connected(usbhs_get_priv(pdev));
 }
-static void usbhs_phy_reset(struct platform_device *pdev)
+static int usbhs_phy_reset(struct platform_device *pdev)
 {
        struct usbhs_private *priv = usbhs_get_priv(pdev);
        /* init phy */
        __raw_writew(0x8a0a, priv->usbcrcaddr);
+        return 0;
 }
 static int usbhs0_get_id(struct platform_device *pdev)
@@ -628,11 +630,13 @@ static int usbhs0_hardware_init(struct platform_device *pdev)
        return 0;
 }
-static void usbhs0_hardware_exit(struct platform_device *pdev)
+static int usbhs0_hardware_exit(struct platform_device *pdev)
 {
        struct usbhs_private *priv = usbhs_get_priv(pdev);
        cancel_delayed_work_sync(&priv->work);
+        return 0;
 }
 static struct usbhs_private usbhs0_private = {
@@ -735,7 +739,7 @@ static int usbhs1_hardware_init(struct platform_device *pdev)
        return 0;
 }
-static void usbhs1_hardware_exit(struct platform_device *pdev)
+static int usbhs1_hardware_exit(struct platform_device *pdev)
 {
        struct usbhs_private *priv = usbhs_get_priv(pdev);
@@ -743,6 +747,8 @@ static void usbhs1_hardware_exit(struct platform_device *pdev)
        __raw_writew(USB_PHY_MODE | USB_PHY_INT_CLR, priv->usbphyaddr);
        free_irq(IRQ8, pdev);
+        return 0;
 }
 static int usbhs1_get_id(struct platform_device *pdev)
diff --git a/arch/arm/mach-shmobile/cpuidle.c b/arch/arm/mach-shmobile/cpuidle.c
index 9e050268cde4..0afeb5c7061c 100644
--- a/arch/arm/mach-shmobile/cpuidle.c
+++ b/arch/arm/mach-shmobile/cpuidle.c
@@ -16,39 +16,22 @@
 #include <asm/cpuidle.h>
 #include <asm/io.h>
-int shmobile_enter_wfi(struct cpuidle_device *dev, struct cpuidle_driver *drv,
-                       int index)
-{
-        cpu_do_idle();
-        return 0;
-}
-static struct cpuidle_device shmobile_cpuidle_dev;
 static struct cpuidle_driver shmobile_cpuidle_default_driver = {
        .name                   = "shmobile_cpuidle",
        .owner                  = THIS_MODULE,
-        .en_core_tk_irqen       = 1,
        .states[0]              = ARM_CPUIDLE_WFI_STATE,
-        .states[0].enter        = shmobile_enter_wfi,
        .safe_state_index       = 0, /* C1 */
        .state_count            = 1,
 };
 static struct cpuidle_driver *cpuidle_drv = &shmobile_cpuidle_default_driver;
-void shmobile_cpuidle_set_driver(struct cpuidle_driver *drv)
+void __init shmobile_cpuidle_set_driver(struct cpuidle_driver *drv)
 {
        cpuidle_drv = drv;
 }
-int shmobile_cpuidle_init(void)
+int __init shmobile_cpuidle_init(void)
 {
-        struct cpuidle_device *dev = &shmobile_cpuidle_dev;
+        return cpuidle_register(cpuidle_drv, NULL);
-        cpuidle_register_driver(cpuidle_drv);
-        dev->state_count = cpuidle_drv->state_count;
-        cpuidle_register_device(dev);
-        return 0;
 }
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index e48606d8a2be..362f9b2d2c02 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -13,9 +13,6 @@ extern int shmobile_clk_init(void);
 extern void shmobile_handle_irq_intc(struct pt_regs *);
 extern struct platform_suspend_ops shmobile_suspend_ops;
 struct cpuidle_driver;
-struct cpuidle_device;
-extern int shmobile_enter_wfi(struct cpuidle_device *dev,
-                              struct cpuidle_driver *drv, int index);
 extern void shmobile_cpuidle_set_driver(struct cpuidle_driver *drv);
 extern void sh7372_init_irq(void);
diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c
index a0826a48dd08..dec9293bb90d 100644
--- a/arch/arm/mach-shmobile/pm-sh7372.c
+++ b/arch/arm/mach-shmobile/pm-sh7372.c
@@ -410,11 +410,9 @@ static int sh7372_enter_a4s(struct cpuidle_device *dev,
 static struct cpuidle_driver sh7372_cpuidle_driver = {
        .name                   = "sh7372_cpuidle",
        .owner                  = THIS_MODULE,
-        .en_core_tk_irqen       = 1,
        .state_count            = 5,
        .safe_state_index       = 0, /* C1 */
        .states[0] = ARM_CPUIDLE_WFI_STATE,
-        .states[0].enter = shmobile_enter_wfi,
        .states[1] = {
                .name = "C2",
                .desc = "Core Standby Mode",
@@ -450,12 +448,12 @@ static struct cpuidle_driver sh7372_cpuidle_driver = {
        },
 };
-static void sh7372_cpuidle_init(void)
+static void __init sh7372_cpuidle_init(void)
 {
        shmobile_cpuidle_set_driver(&sh7372_cpuidle_driver);
 }
 #else
-static void sh7372_cpuidle_init(void) {}
+static void __init sh7372_cpuidle_init(void) {}
 #endif
 #ifdef CONFIG_SUSPEND
diff --git a/arch/arm/mach-shmobile/suspend.c b/arch/arm/mach-shmobile/suspend.c
index 47d83f7a70b6..5d92b5dd486b 100644
--- a/arch/arm/mach-shmobile/suspend.c
+++ b/arch/arm/mach-shmobile/suspend.c
@@ -12,6 +12,8 @@
 #include <linux/suspend.h>
 #include <linux/module.h>
 #include <linux/err.h>
+#include <linux/cpu.h>
 #include <asm/io.h>
 #include <asm/system_misc.h>
@@ -23,13 +25,13 @@ static int shmobile_suspend_default_enter(suspend_state_t suspend_state)
 static int shmobile_suspend_begin(suspend_state_t state)
 {
-        disable_hlt();
+        cpu_idle_poll_ctrl(true);
        return 0;
 }
 static void shmobile_suspend_end(void)
 {
-        enable_hlt();
+        cpu_idle_poll_ctrl(false);
 }
 struct platform_suspend_ops shmobile_suspend_ops = {
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index d1c4893894ce..dbc653ea851c 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -18,8 +18,8 @@ config ARCH_TEGRA_2x_SOC
        select PL310_ERRATA_727915 if CACHE_L2X0
        select PL310_ERRATA_769419 if CACHE_L2X0
        select USB_ARCH_HAS_EHCI if USB_SUPPORT
-        select USB_ULPI if USB
+        select USB_ULPI if USB_PHY
-        select USB_ULPI_VIEWPORT if USB_SUPPORT
+        select USB_ULPI_VIEWPORT if USB_PHY
        help
          Support for NVIDIA Tegra AP20 and T20 processors, based on the
          ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
@@ -37,8 +37,8 @@ config ARCH_TEGRA_3x_SOC
        select PINCTRL_TEGRA30
        select PL310_ERRATA_769419 if CACHE_L2X0
        select USB_ARCH_HAS_EHCI if USB_SUPPORT
-        select USB_ULPI if USB
+        select USB_ULPI if USB_PHY
-        select USB_ULPI_VIEWPORT if USB_SUPPORT
+        select USB_ULPI_VIEWPORT if USB_PHY
        help
          Support for NVIDIA Tegra T30 processor family, based on the
          ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 92703f955a37..c1970005f805 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -25,7 +25,6 @@ obj-$(CONFIG_ARCH_TEGRA_3x_SOC)		+= cpuidle-tegra30.o
 endif
 obj-$(CONFIG_SMP)                       += platsmp.o headsmp.o
 obj-$(CONFIG_HOTPLUG_CPU)               += hotplug.o
-obj-$(CONFIG_CPU_FREQ)                  += cpu-tegra.o
 obj-$(CONFIG_TEGRA_PCI)                 += pcie.o
 ifeq ($(CONFIG_CPU_IDLE),y)
diff --git a/arch/arm/mach-tegra/cpu-tegra.c b/arch/arm/mach-tegra/cpu-tegra.c
deleted file mode 100644
index e3d6e15ff188..000000000000
--- a/arch/arm/mach-tegra/cpu-tegra.c
+++ /dev/null
@@ -1,293 +0,0 @@
-/*
- * arch/arm/mach-tegra/cpu-tegra.c
- *
- * Copyright (C) 2010 Google, Inc.
- *
- * Author:
- *      Colin Cross <ccross@google.com>
- *      Based on arch/arm/plat-omap/cpu-omap.c, (C) 2005 Nokia Corporation
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- */
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/sched.h>
-#include <linux/cpufreq.h>
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/suspend.h>
-/* Frequency table index must be sequential starting at 0 */
-static struct cpufreq_frequency_table freq_table[] = {
-        { 0, 216000 },
-        { 1, 312000 },
-        { 2, 456000 },
-        { 3, 608000 },
-        { 4, 760000 },
-        { 5, 816000 },
-        { 6, 912000 },
-        { 7, 1000000 },
-        { 8, CPUFREQ_TABLE_END },
-};
-#define NUM_CPUS        2
-static struct clk *cpu_clk;
-static struct clk *pll_x_clk;
-static struct clk *pll_p_clk;
-static struct clk *emc_clk;
-static unsigned long target_cpu_speed[NUM_CPUS];
-static DEFINE_MUTEX(tegra_cpu_lock);
-static bool is_suspended;
-static int tegra_verify_speed(struct cpufreq_policy *policy)
-{
-        return cpufreq_frequency_table_verify(policy, freq_table);
-}
-static unsigned int tegra_getspeed(unsigned int cpu)
-{
-        unsigned long rate;
-        if (cpu >= NUM_CPUS)
-                return 0;
-        rate = clk_get_rate(cpu_clk) / 1000;
-        return rate;
-}
-static int tegra_cpu_clk_set_rate(unsigned long rate)
-{
-        int ret;
-        /*
-         * Take an extra reference to the main pll so it doesn't turn
-         * off when we move the cpu off of it
-         */
-        clk_prepare_enable(pll_x_clk);
-        ret = clk_set_parent(cpu_clk, pll_p_clk);
-        if (ret) {
-                pr_err("Failed to switch cpu to clock pll_p\n");
-                goto out;
-        }
-        if (rate == clk_get_rate(pll_p_clk))
-                goto out;
-        ret = clk_set_rate(pll_x_clk, rate);
-        if (ret) {
-                pr_err("Failed to change pll_x to %lu\n", rate);
-                goto out;
-        }
-        ret = clk_set_parent(cpu_clk, pll_x_clk);
-        if (ret) {
-                pr_err("Failed to switch cpu to clock pll_x\n");
-                goto out;
-        }
-out:
-        clk_disable_unprepare(pll_x_clk);
-        return ret;
-}
-static int tegra_update_cpu_speed(unsigned long rate)
-{
-        int ret = 0;
-        struct cpufreq_freqs freqs;
-        freqs.old = tegra_getspeed(0);
-        freqs.new = rate;
-        if (freqs.old == freqs.new)
-                return ret;
-        /*
-         * Vote on memory bus frequency based on cpu frequency
-         * This sets the minimum frequency, display or avp may request higher
-         */
-        if (rate >= 816000)
-                clk_set_rate(emc_clk, 600000000); /* cpu 816 MHz, emc max */
-        else if (rate >= 456000)
-                clk_set_rate(emc_clk, 300000000); /* cpu 456 MHz, emc 150Mhz */
-        else
-                clk_set_rate(emc_clk, 100000000);  /* emc 50Mhz */
-        for_each_online_cpu(freqs.cpu)
-                cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
-#ifdef CONFIG_CPU_FREQ_DEBUG
-        printk(KERN_DEBUG "cpufreq-tegra: transition: %u --> %u\n",
-               freqs.old, freqs.new);
-#endif
-        ret = tegra_cpu_clk_set_rate(freqs.new * 1000);
-        if (ret) {
-                pr_err("cpu-tegra: Failed to set cpu frequency to %d kHz\n",
-                        freqs.new);
-                return ret;
-        }
-        for_each_online_cpu(freqs.cpu)
-                cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
-        return 0;
-}
-static unsigned long tegra_cpu_highest_speed(void)
-{
-        unsigned long rate = 0;
-        int i;
-        for_each_online_cpu(i)
-                rate = max(rate, target_cpu_speed[i]);
-        return rate;
-}
-static int tegra_target(struct cpufreq_policy *policy,
-                       unsigned int target_freq,
-                       unsigned int relation)
-{
-        unsigned int idx;
-        unsigned int freq;
-        int ret = 0;
-        mutex_lock(&tegra_cpu_lock);
-        if (is_suspended) {
-                ret = -EBUSY;
-                goto out;
-        }
-        cpufreq_frequency_table_target(policy, freq_table, target_freq,
-                relation, &idx);
-        freq = freq_table[idx].frequency;
-        target_cpu_speed[policy->cpu] = freq;
-        ret = tegra_update_cpu_speed(tegra_cpu_highest_speed());
-out:
-        mutex_unlock(&tegra_cpu_lock);
-        return ret;
-}
-static int tegra_pm_notify(struct notifier_block *nb, unsigned long event,
-        void *dummy)
-{
-        mutex_lock(&tegra_cpu_lock);
-        if (event == PM_SUSPEND_PREPARE) {
-                is_suspended = true;
-                pr_info("Tegra cpufreq suspend: setting frequency to %d kHz\n",
-                        freq_table[0].frequency);
-                tegra_update_cpu_speed(freq_table[0].frequency);
-        } else if (event == PM_POST_SUSPEND) {
-                is_suspended = false;
-        }
-        mutex_unlock(&tegra_cpu_lock);
-        return NOTIFY_OK;
-}
-static struct notifier_block tegra_cpu_pm_notifier = {
-        .notifier_call = tegra_pm_notify,
-};
-static int tegra_cpu_init(struct cpufreq_policy *policy)
-{
-        if (policy->cpu >= NUM_CPUS)
-                return -EINVAL;
-        clk_prepare_enable(emc_clk);
-        clk_prepare_enable(cpu_clk);
-        cpufreq_frequency_table_cpuinfo(policy, freq_table);
-        cpufreq_frequency_table_get_attr(freq_table, policy->cpu);
-        policy->cur = tegra_getspeed(policy->cpu);
-        target_cpu_speed[policy->cpu] = policy->cur;
-        /* FIXME: what's the actual transition time? */
-        policy->cpuinfo.transition_latency = 300 * 1000;
-        cpumask_copy(policy->cpus, cpu_possible_mask);
-        if (policy->cpu == 0)
-                register_pm_notifier(&tegra_cpu_pm_notifier);
-        return 0;
-}
-static int tegra_cpu_exit(struct cpufreq_policy *policy)
-{
-        cpufreq_frequency_table_cpuinfo(policy, freq_table);
-        clk_disable_unprepare(emc_clk);
-        return 0;
-}
-static struct freq_attr *tegra_cpufreq_attr[] = {
-        &cpufreq_freq_attr_scaling_available_freqs,
-        NULL,
-};
-static struct cpufreq_driver tegra_cpufreq_driver = {
-        .verify         = tegra_verify_speed,
-        .target         = tegra_target,
-        .get            = tegra_getspeed,
-        .init           = tegra_cpu_init,
-        .exit           = tegra_cpu_exit,
-        .name           = "tegra",
-        .attr           = tegra_cpufreq_attr,
-};
-static int __init tegra_cpufreq_init(void)
-{
-        cpu_clk = clk_get_sys(NULL, "cpu");
-        if (IS_ERR(cpu_clk))
-                return PTR_ERR(cpu_clk);
-        pll_x_clk = clk_get_sys(NULL, "pll_x");
-        if (IS_ERR(pll_x_clk))
-                return PTR_ERR(pll_x_clk);
-        pll_p_clk = clk_get_sys(NULL, "pll_p_cclk");
-        if (IS_ERR(pll_p_clk))
-                return PTR_ERR(pll_p_clk);
-        emc_clk = clk_get_sys("cpu", "emc");
-        if (IS_ERR(emc_clk)) {
-                clk_put(cpu_clk);
-                return PTR_ERR(emc_clk);
-        }
-        return cpufreq_register_driver(&tegra_cpufreq_driver);
-}
-static void __exit tegra_cpufreq_exit(void)
-{
-        cpufreq_unregister_driver(&tegra_cpufreq_driver);
-        clk_put(emc_clk);
-        clk_put(cpu_clk);
-}
-MODULE_AUTHOR("Colin Cross <ccross@android.com>");
-MODULE_DESCRIPTION("cpufreq driver for Nvidia Tegra2");
-MODULE_LICENSE("GPL");
-module_init(tegra_cpufreq_init);
-module_exit(tegra_cpufreq_exit);
diff --git a/arch/arm/mach-tegra/cpuidle-tegra114.c b/arch/arm/mach-tegra/cpuidle-tegra114.c
index 0f4e8c483b34..1d1c6023f4a2 100644
--- a/arch/arm/mach-tegra/cpuidle-tegra114.c
+++ b/arch/arm/mach-tegra/cpuidle-tegra114.c
@@ -23,39 +23,13 @@
 static struct cpuidle_driver tegra_idle_driver = {
        .name = "tegra_idle",
        .owner = THIS_MODULE,
-        .en_core_tk_irqen = 1,
        .state_count = 1,
        .states = {
                [0] = ARM_CPUIDLE_WFI_STATE_PWR(600),
        },
 };
-static DEFINE_PER_CPU(struct cpuidle_device, tegra_idle_device);
 int __init tegra114_cpuidle_init(void)
 {
-        int ret;
+        return cpuidle_register(&tegra_idle_driver, NULL);
-        unsigned int cpu;
-        struct cpuidle_device *dev;
-        struct cpuidle_driver *drv = &tegra_idle_driver;
-        ret = cpuidle_register_driver(&tegra_idle_driver);
-        if (ret) {
-                pr_err("CPUidle driver registration failed\n");
-                return ret;
-        }
-        for_each_possible_cpu(cpu) {
-                dev = &per_cpu(tegra_idle_device, cpu);
-                dev->cpu = cpu;
-                dev->state_count = drv->state_count;
-                ret = cpuidle_register_device(dev);
-                if (ret) {
-                        pr_err("CPU%u: CPUidle device registration failed\n",
-                                cpu);
-                        return ret;
-                }
-        }
-        return 0;
 }
diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c
index 825ced4f7a40..590ec25855dd 100644
--- a/arch/arm/mach-tegra/cpuidle-tegra20.c
+++ b/arch/arm/mach-tegra/cpuidle-tegra20.c
@@ -43,32 +43,33 @@ static atomic_t abort_barrier;
 static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev,
                                    struct cpuidle_driver *drv,
                                    int index);
+#define TEGRA20_MAX_STATES 2
+#else
+#define TEGRA20_MAX_STATES 1
 #endif
-static struct cpuidle_state tegra_idle_states[] = {
-        [0] = ARM_CPUIDLE_WFI_STATE_PWR(600),
-#ifdef CONFIG_PM_SLEEP
-        [1] = {
-                .enter                  = tegra20_idle_lp2_coupled,
-                .exit_latency           = 5000,
-                .target_residency       = 10000,
-                .power_usage            = 0,
-                .flags                  = CPUIDLE_FLAG_TIME_VALID |
-                                          CPUIDLE_FLAG_COUPLED,
-                .name                   = "powered-down",
-                .desc                   = "CPU power gated",
-        },
-#endif
-};
 static struct cpuidle_driver tegra_idle_driver = {
        .name = "tegra_idle",
        .owner = THIS_MODULE,
-        .en_core_tk_irqen = 1,
+        .states = {
+                ARM_CPUIDLE_WFI_STATE_PWR(600),
+#ifdef CONFIG_PM_SLEEP
+                {
+                        .enter            = tegra20_idle_lp2_coupled,
+                        .exit_latency     = 5000,
+                        .target_residency = 10000,
+                        .power_usage      = 0,
+                        .flags            = CPUIDLE_FLAG_TIME_VALID |
+                        CPUIDLE_FLAG_COUPLED,
+                        .name             = "powered-down",
+                        .desc             = "CPU power gated",
+                },
+#endif
+        },
+        .state_count = TEGRA20_MAX_STATES,
+        .safe_state_index = 0,
 };
-static DEFINE_PER_CPU(struct cpuidle_device, tegra_idle_device);
 #ifdef CONFIG_PM_SLEEP
 #ifdef CONFIG_SMP
 static void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
@@ -217,39 +218,8 @@ static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev,
 int __init tegra20_cpuidle_init(void)
 {
-        int ret;
-        unsigned int cpu;
-        struct cpuidle_device *dev;
-        struct cpuidle_driver *drv = &tegra_idle_driver;
 #ifdef CONFIG_PM_SLEEP
        tegra_tear_down_cpu = tegra20_tear_down_cpu;
 #endif
+        return cpuidle_register(&tegra_idle_driver, cpu_possible_mask);
-        drv->state_count = ARRAY_SIZE(tegra_idle_states);
-        memcpy(drv->states, tegra_idle_states,
-                        drv->state_count * sizeof(drv->states[0]));
-        ret = cpuidle_register_driver(&tegra_idle_driver);
-        if (ret) {
-                pr_err("CPUidle driver registration failed\n");
-                return ret;
-        }
-        for_each_possible_cpu(cpu) {
-                dev = &per_cpu(tegra_idle_device, cpu);
-                dev->cpu = cpu;
-#ifdef CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED
-                dev->coupled_cpus = *cpu_possible_mask;
-#endif
-                dev->state_count = drv->state_count;
-                ret = cpuidle_register_device(dev);
-                if (ret) {
-                        pr_err("CPU%u: CPUidle device registration failed\n",
-                                cpu);
-                        return ret;
-                }
-        }
-        return 0;
 }
diff --git a/arch/arm/mach-tegra/cpuidle-tegra30.c b/arch/arm/mach-tegra/cpuidle-tegra30.c
index 80445ed33d95..9387daeeadc8 100644
--- a/arch/arm/mach-tegra/cpuidle-tegra30.c
+++ b/arch/arm/mach-tegra/cpuidle-tegra30.c
@@ -43,7 +43,6 @@ static int tegra30_idle_lp2(struct cpuidle_device *dev,
 static struct cpuidle_driver tegra_idle_driver = {
        .name = "tegra_idle",
        .owner = THIS_MODULE,
-        .en_core_tk_irqen = 1,
 #ifdef CONFIG_PM_SLEEP
        .state_count = 2,
 #else
@@ -65,8 +64,6 @@ static struct cpuidle_driver tegra_idle_driver = {
        },
 };
-static DEFINE_PER_CPU(struct cpuidle_device, tegra_idle_device);
 #ifdef CONFIG_PM_SLEEP
 static bool tegra30_cpu_cluster_power_down(struct cpuidle_device *dev,
                                           struct cpuidle_driver *drv,
@@ -153,32 +150,8 @@ static int tegra30_idle_lp2(struct cpuidle_device *dev,
 int __init tegra30_cpuidle_init(void)
 {
-        int ret;
-        unsigned int cpu;
-        struct cpuidle_device *dev;
-        struct cpuidle_driver *drv = &tegra_idle_driver;
 #ifdef CONFIG_PM_SLEEP
        tegra_tear_down_cpu = tegra30_tear_down_cpu;
 #endif
+        return cpuidle_register(&tegra_idle_driver, NULL);
-        ret = cpuidle_register_driver(&tegra_idle_driver);
-        if (ret) {
-                pr_err("CPUidle driver registration failed\n");
-                return ret;
-        }
-        for_each_possible_cpu(cpu) {
-                dev = &per_cpu(tegra_idle_device, cpu);
-                dev->cpu = cpu;
-                dev->state_count = drv->state_count;
-                ret = cpuidle_register_device(dev);
-                if (ret) {
-                        pr_err("CPU%u: CPUidle device registration failed\n",
-                                cpu);
-                        return ret;
-                }
-        }
-        return 0;
 }
diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c
index acacbe8d1afc..891fb70d0aa7 100644
--- a/arch/arm/mach-tegra/pm.c
+++ b/arch/arm/mach-tegra/pm.c
@@ -162,6 +162,11 @@ bool tegra_set_cpu_in_lp2(int phy_cpu_id)
        return last_cpu;
 }
+int tegra_cpu_do_idle(void)
+{
+        return cpu_do_idle();
+}
 static int tegra_sleep_cpu(unsigned long v2p)
 {
        setup_mm_for_reboot();
diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S
index 1676aba5e7b8..e6de88a2ea06 100644
--- a/arch/arm/mach-tegra/reset-handler.S
+++ b/arch/arm/mach-tegra/reset-handler.S
@@ -44,6 +44,7 @@ ENTRY(tegra_resume)
        cpu_id  r0
        cmp     r0, #0                          @ CPU0?
+ THUMB( it      ne )
        bne     cpu_resume                      @ no
 #ifdef CONFIG_ARCH_TEGRA_3x_SOC
diff --git a/arch/arm/mach-tegra/sleep-tegra20.S b/arch/arm/mach-tegra/sleep-tegra20.S
index 9f6bfafdd512..e3f2417c420e 100644
--- a/arch/arm/mach-tegra/sleep-tegra20.S
+++ b/arch/arm/mach-tegra/sleep-tegra20.S
@@ -197,7 +197,7 @@ ENTRY(tegra20_sleep_cpu_secondary_finish)
        mov     r3, #CPU_RESETTABLE
        str     r3, [r0]
-        bl      cpu_do_idle
+        bl      tegra_cpu_do_idle
        /*
         * cpu may be reset while in wfi, which will return through
diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S
index 63a15bd9b653..d29dfcce948d 100644
--- a/arch/arm/mach-tegra/sleep-tegra30.S
+++ b/arch/arm/mach-tegra/sleep-tegra30.S
@@ -66,7 +66,9 @@ ENTRY(tegra30_cpu_shutdown)
                FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG | \
                FLOW_CTRL_CSR_ENABLE
        mov     r4, #(1 << 4)
-        orr     r12, r12, r4, lsl r3
+ ARM(   orr     r12, r12, r4, lsl r3    )
+ THUMB( lsl     r4, r4, r3              )
+ THUMB( orr     r12, r12, r4            )
        str     r12, [r1]
        /* Halt this CPU. */
diff --git a/arch/arm/mach-tegra/sleep.h b/arch/arm/mach-tegra/sleep.h
index 970ebd5138b9..2080fb12ce26 100644
--- a/arch/arm/mach-tegra/sleep.h
+++ b/arch/arm/mach-tegra/sleep.h
@@ -92,7 +92,7 @@
 #ifdef CONFIG_CACHE_L2X0
 .macro l2_cache_resume, tmp1, tmp2, tmp3, phys_l2x0_saved_regs
-        adr     \tmp1, \phys_l2x0_saved_regs
+        W(adr)  \tmp1, \phys_l2x0_saved_regs
        ldr     \tmp1, [\tmp1]
        ldr     \tmp2, [\tmp1, #L2X0_R_PHY_BASE]
        ldr     \tmp3, [\tmp2, #L2X0_CTRL]
diff --git a/arch/arm/mach-u300/include/mach/u300-regs.h b/arch/arm/mach-u300/include/mach/u300-regs.h
index 1e49d901f2c9..0320495efc4d 100644
--- a/arch/arm/mach-u300/include/mach/u300-regs.h
+++ b/arch/arm/mach-u300/include/mach/u300-regs.h
@@ -95,7 +95,7 @@
 #define U300_SPI_BASE                   (U300_FAST_PER_PHYS_BASE+0x6000)
 /* Fast UART1 on U335 only */
-#define U300_UART1_BASE                 (U300_SLOW_PER_PHYS_BASE+0x7000)
+#define U300_UART1_BASE                 (U300_FAST_PER_PHYS_BASE+0x7000)
 /*
 * SLOW peripherals
diff --git a/arch/arm/mach-ux500/board-mop500-regulators.c b/arch/arm/mach-ux500/board-mop500-regulators.c
index 2a17bc506cff..33c353bc1c4a 100644
--- a/arch/arm/mach-ux500/board-mop500-regulators.c
+++ b/arch/arm/mach-ux500/board-mop500-regulators.c
@@ -5,6 +5,7 @@
 *
 * Authors: Sundar Iyer <sundar.iyer@stericsson.com>
 *          Bengt Jonsson <bengt.g.jonsson@stericsson.com>
+ *          Daniel Willerud <daniel.willerud@stericsson.com>
 *
 * MOP500 board specific initialization for regulators
 */
@@ -12,6 +13,7 @@
 #include <linux/regulator/machine.h>
 #include <linux/regulator/ab8500.h>
 #include "board-mop500-regulators.h"
+#include "id.h"
 static struct regulator_consumer_supply gpio_en_3v3_consumers[] = {
       REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
@@ -28,6 +30,20 @@ struct regulator_init_data gpio_en_3v3_regulator = {
       .consumer_supplies = gpio_en_3v3_consumers,
 };
+static struct regulator_consumer_supply sdi0_reg_consumers[] = {
+        REGULATOR_SUPPLY("vqmmc", "sdi0"),
+};
+struct regulator_init_data sdi0_reg_init_data = {
+        .constraints = {
+                .min_uV         = 1800000,
+                .max_uV         = 2900000,
+                .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE|REGULATOR_CHANGE_STATUS,
+        },
+        .num_consumer_supplies  = ARRAY_SIZE(sdi0_reg_consumers),
+        .consumer_supplies      = sdi0_reg_consumers,
+};
 /*
 * TPS61052 regulator
 */
@@ -53,21 +69,37 @@ struct regulator_init_data tps61052_regulator = {
 };
 static struct regulator_consumer_supply ab8500_vaux1_consumers[] = {
-        /* External displays, connector on board 2v5 power supply */
+        /* Main display, u8500 R3 uib */
-        REGULATOR_SUPPLY("vaux12v5", "mcde.0"),
+        REGULATOR_SUPPLY("vddi", "mcde_disp_sony_acx424akp.0"),
+        /* Main display, u8500 uib and ST uib */
+        REGULATOR_SUPPLY("vdd1", "samsung_s6d16d0.0"),
+        /* Secondary display, ST uib */
+        REGULATOR_SUPPLY("vdd1", "samsung_s6d16d0.1"),
        /* SFH7741 proximity sensor */
        REGULATOR_SUPPLY("vcc", "gpio-keys.0"),
        /* BH1780GLS ambient light sensor */
        REGULATOR_SUPPLY("vcc", "2-0029"),
        /* lsm303dlh accelerometer */
-        REGULATOR_SUPPLY("vdd", "3-0018"),
+        REGULATOR_SUPPLY("vdd", "2-0018"),
+        /* lsm303dlhc accelerometer */
+        REGULATOR_SUPPLY("vdd", "2-0019"),
        /* lsm303dlh magnetometer */
-        REGULATOR_SUPPLY("vdd", "3-001e"),
+        REGULATOR_SUPPLY("vdd", "2-001e"),
        /* Rohm BU21013 Touchscreen devices */
        REGULATOR_SUPPLY("avdd", "3-005c"),
        REGULATOR_SUPPLY("avdd", "3-005d"),
        /* Synaptics RMI4 Touchscreen device */
        REGULATOR_SUPPLY("vdd", "3-004b"),
+        /* L3G4200D Gyroscope device */
+        REGULATOR_SUPPLY("vdd", "2-0068"),
+        /* Ambient light sensor device */
+        REGULATOR_SUPPLY("vdd", "3-0029"),
+        /* Pressure sensor device */
+        REGULATOR_SUPPLY("vdd", "2-005c"),
+        /* Cypress TrueTouch Touchscreen device */
+        REGULATOR_SUPPLY("vcpin", "spi8.0"),
+        /* Camera device */
+        REGULATOR_SUPPLY("vaux12v5", "mmio_camera"),
 };
 static struct regulator_consumer_supply ab8500_vaux2_consumers[] = {
@@ -75,18 +107,50 @@ static struct regulator_consumer_supply ab8500_vaux2_consumers[] = {
        REGULATOR_SUPPLY("vmmc", "sdi4"),
        /* AB8500 audio codec */
        REGULATOR_SUPPLY("vcc-N2158", "ab8500-codec.0"),
+        /* AB8500 accessory detect 1 */
+        REGULATOR_SUPPLY("vcc-N2158", "ab8500-acc-det.0"),
+        /* AB8500 Tv-out device */
+        REGULATOR_SUPPLY("vcc-N2158", "mcde_tv_ab8500.4"),
+        /* AV8100 HDMI device */
+        REGULATOR_SUPPLY("vcc-N2158", "av8100_hdmi.3"),
 };
 static struct regulator_consumer_supply ab8500_vaux3_consumers[] = {
+        REGULATOR_SUPPLY("v-SD-STM", "stm"),
        /* External MMC slot power */
        REGULATOR_SUPPLY("vmmc", "sdi0"),
 };
+static struct regulator_consumer_supply ab8505_vaux4_consumers[] = {
+};
+static struct regulator_consumer_supply ab8505_vaux5_consumers[] = {
+};
+static struct regulator_consumer_supply ab8505_vaux6_consumers[] = {
+};
+static struct regulator_consumer_supply ab8505_vaux8_consumers[] = {
+        /* AB8500 audio codec device */
+        REGULATOR_SUPPLY("v-aux8", NULL),
+};
+static struct regulator_consumer_supply ab8505_vadc_consumers[] = {
+        /* Internal general-purpose ADC */
+        REGULATOR_SUPPLY("vddadc", "ab8500-gpadc.0"),
+        /* ADC for charger */
+        REGULATOR_SUPPLY("vddadc", "ab8500-charger.0"),
+};
 static struct regulator_consumer_supply ab8500_vtvout_consumers[] = {
        /* TV-out DENC supply */
        REGULATOR_SUPPLY("vtvout", "ab8500-denc.0"),
        /* Internal general-purpose ADC */
        REGULATOR_SUPPLY("vddadc", "ab8500-gpadc.0"),
+        /* ADC for charger */
+        REGULATOR_SUPPLY("vddadc", "ab8500-charger.0"),
+        /* AB8500 Tv-out device */
+        REGULATOR_SUPPLY("vtvout", "mcde_tv_ab8500.4"),
 };
 static struct regulator_consumer_supply ab8500_vaud_consumers[] = {
@@ -114,77 +178,90 @@ static struct regulator_consumer_supply ab8500_vintcore_consumers[] = {
        REGULATOR_SUPPLY("v-intcore", NULL),
        /* USB Transceiver */
        REGULATOR_SUPPLY("vddulpivio18", "ab8500-usb.0"),
+        /* Handled by abx500 clk driver */
+        REGULATOR_SUPPLY("v-intcore", "abx500-clk.0"),
+};
+static struct regulator_consumer_supply ab8505_usb_consumers[] = {
+        /* HS USB OTG physical interface */
+        REGULATOR_SUPPLY("v-ape", NULL),
 };
 static struct regulator_consumer_supply ab8500_vana_consumers[] = {
-        /* External displays, connector on board, 1v8 power supply */
+        /* DB8500 DSI */
-        REGULATOR_SUPPLY("vsmps2", "mcde.0"),
+        REGULATOR_SUPPLY("vdddsi1v2", "mcde"),
+        REGULATOR_SUPPLY("vdddsi1v2", "b2r2_core"),
+        REGULATOR_SUPPLY("vdddsi1v2", "b2r2_1_core"),
+        REGULATOR_SUPPLY("vdddsi1v2", "dsilink.0"),
+        REGULATOR_SUPPLY("vdddsi1v2", "dsilink.1"),
+        REGULATOR_SUPPLY("vdddsi1v2", "dsilink.2"),
+        /* DB8500 CSI */
+        REGULATOR_SUPPLY("vddcsi1v2", "mmio_camera"),
 };
 /* ab8500 regulator register initialization */
-struct ab8500_regulator_reg_init
+static struct ab8500_regulator_reg_init ab8500_reg_init[] = {
-ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
        /*
         * VanaRequestCtrl          = HP/LP depending on VxRequest
         * VextSupply1RequestCtrl   = HP/LP depending on VxRequest
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL2, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL2,       0xf0, 0x00),
        /*
         * VextSupply2RequestCtrl   = HP/LP depending on VxRequest
         * VextSupply3RequestCtrl   = HP/LP depending on VxRequest
         * Vaux1RequestCtrl         = HP/LP depending on VxRequest
         * Vaux2RequestCtrl         = HP/LP depending on VxRequest
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL3, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL3,       0xff, 0x00),
        /*
         * Vaux3RequestCtrl         = HP/LP depending on VxRequest
         * SwHPReq                  = Control through SWValid disabled
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL4, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL4,       0x07, 0x00),
        /*
         * VanaSysClkReq1HPValid    = disabled
         * Vaux1SysClkReq1HPValid   = disabled
         * Vaux2SysClkReq1HPValid   = disabled
         * Vaux3SysClkReq1HPValid   = disabled
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID1, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID1, 0xe8, 0x00),
        /*
         * VextSupply1SysClkReq1HPValid = disabled
         * VextSupply2SysClkReq1HPValid = disabled
         * VextSupply3SysClkReq1HPValid = SysClkReq1 controlled
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID2, 0x40),
+        INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID2, 0x70, 0x40),
        /*
         * VanaHwHPReq1Valid        = disabled
         * Vaux1HwHPreq1Valid       = disabled
         * Vaux2HwHPReq1Valid       = disabled
         * Vaux3HwHPReqValid        = disabled
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID1, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID1,     0xe8, 0x00),
        /*
         * VextSupply1HwHPReq1Valid = disabled
         * VextSupply2HwHPReq1Valid = disabled
         * VextSupply3HwHPReq1Valid = disabled
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID2, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID2,     0x07, 0x00),
        /*
         * VanaHwHPReq2Valid        = disabled
         * Vaux1HwHPReq2Valid       = disabled
         * Vaux2HwHPReq2Valid       = disabled
         * Vaux3HwHPReq2Valid       = disabled
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID1, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID1,     0xe8, 0x00),
        /*
         * VextSupply1HwHPReq2Valid = disabled
         * VextSupply2HwHPReq2Valid = disabled
         * VextSupply3HwHPReq2Valid = HWReq2 controlled
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID2, 0x04),
+        INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID2,     0x07, 0x04),
        /*
         * VanaSwHPReqValid         = disabled
         * Vaux1SwHPReqValid        = disabled
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID1, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID1,      0xa0, 0x00),
        /*
         * Vaux2SwHPReqValid        = disabled
         * Vaux3SwHPReqValid        = disabled
@@ -192,7 +269,7 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
         * VextSupply2SwHPReqValid  = disabled
         * VextSupply3SwHPReqValid  = disabled
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID2, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID2,      0x1f, 0x00),
        /*
         * SysClkReq2Valid1         = SysClkReq2 controlled
         * SysClkReq3Valid1         = disabled
@@ -202,7 +279,7 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
         * SysClkReq7Valid1         = disabled
         * SysClkReq8Valid1         = disabled
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID1, 0x2a),
+        INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID1,    0xfe, 0x2a),
        /*
         * SysClkReq2Valid2         = disabled
         * SysClkReq3Valid2         = disabled
@@ -212,7 +289,7 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
         * SysClkReq7Valid2         = disabled
         * SysClkReq8Valid2         = disabled
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID2, 0x20),
+        INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID2,    0xfe, 0x20),
        /*
         * VTVoutEna                = disabled
         * Vintcore12Ena            = disabled
@@ -220,66 +297,62 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
         * Vintcore12LP             = inactive (HP)
         * VTVoutLP                 = inactive (HP)
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUMISC1, 0x10),
+        INIT_REGULATOR_REGISTER(AB8500_REGUMISC1,              0xfe, 0x10),
        /*
         * VaudioEna                = disabled
         * VdmicEna                 = disabled
         * Vamic1Ena                = disabled
         * Vamic2Ena                = disabled
         */
-        INIT_REGULATOR_REGISTER(AB8500_VAUDIOSUPPLY, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_VAUDIOSUPPLY,           0x1e, 0x00),
        /*
         * Vamic1_dzout             = high-Z when Vamic1 is disabled
         * Vamic2_dzout             = high-Z when Vamic2 is disabled
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUCTRL1VAMIC, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUCTRL1VAMIC,         0x03, 0x00),
        /*
-         * VPll                     = Hw controlled
+         * VPll                     = Hw controlled (NOTE! PRCMU bits)
         * VanaRegu                 = force off
         */
-        INIT_REGULATOR_REGISTER(AB8500_VPLLVANAREGU, 0x02),
+        INIT_REGULATOR_REGISTER(AB8500_VPLLVANAREGU,           0x0f, 0x02),
        /*
         * VrefDDREna               = disabled
         * VrefDDRSleepMode         = inactive (no pulldown)
         */
-        INIT_REGULATOR_REGISTER(AB8500_VREFDDR, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_VREFDDR,                0x03, 0x00),
        /*
-         * VextSupply1Regu          = HW control
+         * VextSupply1Regu          = force LP
-         * VextSupply2Regu          = HW control
+         * VextSupply2Regu          = force OFF
-         * VextSupply3Regu          = HW control
+         * VextSupply3Regu          = force HP (-> STBB2=LP and TPS=LP)
         * ExtSupply2Bypass         = ExtSupply12LPn ball is 0 when Ena is 0
         * ExtSupply3Bypass         = ExtSupply3LPn ball is 0 when Ena is 0
         */
-        INIT_REGULATOR_REGISTER(AB8500_EXTSUPPLYREGU, 0x2a),
+        INIT_REGULATOR_REGISTER(AB8500_EXTSUPPLYREGU,          0xff, 0x13),
        /*
         * Vaux1Regu                = force HP
         * Vaux2Regu                = force off
         */
-        INIT_REGULATOR_REGISTER(AB8500_VAUX12REGU, 0x01),
+        INIT_REGULATOR_REGISTER(AB8500_VAUX12REGU,             0x0f, 0x01),
-        /*
-         * Vaux3regu                = force off
-         */
-        INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3REGU, 0x00),
        /*
-         * Vsmps1                   = 1.15V
+         * Vaux3Regu                = force off
         */
-        INIT_REGULATOR_REGISTER(AB8500_VSMPS1SEL1, 0x24),
+        INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3REGU,          0x03, 0x00),
        /*
-         * Vaux1Sel                 = 2.5 V
+         * Vaux1Sel                 = 2.8 V
         */
-        INIT_REGULATOR_REGISTER(AB8500_VAUX1SEL, 0x08),
+        INIT_REGULATOR_REGISTER(AB8500_VAUX1SEL,               0x0f, 0x0C),
        /*
         * Vaux2Sel                 = 2.9 V
         */
-        INIT_REGULATOR_REGISTER(AB8500_VAUX2SEL, 0x0d),
+        INIT_REGULATOR_REGISTER(AB8500_VAUX2SEL,               0x0f, 0x0d),
        /*
         * Vaux3Sel                 = 2.91 V
         */
-        INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3SEL, 0x07),
+        INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3SEL,           0x07, 0x07),
        /*
         * VextSupply12LP           = disabled (no LP)
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUCTRL2SPARE, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUCTRL2SPARE,         0x01, 0x00),
        /*
         * Vaux1Disch               = short discharge time
         * Vaux2Disch               = short discharge time
@@ -288,33 +361,26 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
         * VTVoutDisch              = short discharge time
         * VaudioDisch              = short discharge time
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH,          0xfc, 0x00),
        /*
         * VanaDisch                = short discharge time
         * VdmicPullDownEna         = pulldown disabled when Vdmic is disabled
         * VdmicDisch               = short discharge time
         */
-        INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH2, 0x00),
+        INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH2,         0x16, 0x00),
 };
 /* AB8500 regulators */
-struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
+static struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
        /* supplies to the display/camera */
        [AB8500_LDO_AUX1] = {
                .constraints = {
                        .name = "V-DISPLAY",
-                        .min_uV = 2500000,
+                        .min_uV = 2800000,
-                        .max_uV = 2900000,
+                        .max_uV = 3300000,
                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
                                          REGULATOR_CHANGE_STATUS,
                        .boot_on = 1, /* display is on at boot */
-                        /*
-                         * This voltage cannot be disabled right now because
-                         * it is somehow affecting the external MMC
-                         * functionality, though that typically will use
-                         * AUX3.
-                         */
-                        .always_on = 1,
                },
                .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers),
                .consumer_supplies = ab8500_vaux1_consumers,
@@ -326,7 +392,10 @@ struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
                        .min_uV = 1100000,
                        .max_uV = 3300000,
                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
-                                          REGULATOR_CHANGE_STATUS,
+                                          REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_MODE,
+                        .valid_modes_mask = REGULATOR_MODE_NORMAL |
+                                            REGULATOR_MODE_IDLE,
                },
                .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux2_consumers),
                .consumer_supplies = ab8500_vaux2_consumers,
@@ -338,7 +407,10 @@ struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
                        .min_uV = 1100000,
                        .max_uV = 3300000,
                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
-                                          REGULATOR_CHANGE_STATUS,
+                                          REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_MODE,
+                        .valid_modes_mask = REGULATOR_MODE_NORMAL |
+                                            REGULATOR_MODE_IDLE,
                },
                .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux3_consumers),
                .consumer_supplies = ab8500_vaux3_consumers,
@@ -392,18 +464,614 @@ struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
        [AB8500_LDO_INTCORE] = {
                .constraints = {
                        .name = "V-INTCORE",
-                        .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+                        .min_uV = 1250000,
+                        .max_uV = 1350000,
+                        .input_uV = 1800000,
+                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+                                          REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_MODE |
+                                          REGULATOR_CHANGE_DRMS,
+                        .valid_modes_mask = REGULATOR_MODE_NORMAL |
+                                            REGULATOR_MODE_IDLE,
                },
                .num_consumer_supplies = ARRAY_SIZE(ab8500_vintcore_consumers),
                .consumer_supplies = ab8500_vintcore_consumers,
        },
-        /* supply for U8500 CSI/DSI, VANA LDO */
+        /* supply for U8500 CSI-DSI, VANA LDO */
        [AB8500_LDO_ANA] = {
                .constraints = {
-                        .name = "V-CSI/DSI",
+                        .name = "V-CSI-DSI",
                        .valid_ops_mask = REGULATOR_CHANGE_STATUS,
                },
                .num_consumer_supplies = ARRAY_SIZE(ab8500_vana_consumers),
                .consumer_supplies = ab8500_vana_consumers,
        },
 };
+/* supply for VextSupply3 */
+static struct regulator_consumer_supply ab8500_ext_supply3_consumers[] = {
+        /* SIM supply for 3 V SIM cards */
+        REGULATOR_SUPPLY("vinvsim", "sim-detect.0"),
+};
+/* extended configuration for VextSupply2, only used for HREFP_V20 boards */
+static struct ab8500_ext_regulator_cfg ab8500_ext_supply2 = {
+        .hwreq = true,
+};
+/*
+ * AB8500 external regulators
+ */
+static struct regulator_init_data ab8500_ext_regulators[] = {
+        /* fixed Vbat supplies VSMPS1_EXT_1V8 */
+        [AB8500_EXT_SUPPLY1] = {
+                .constraints = {
+                        .name = "ab8500-ext-supply1",
+                        .min_uV = 1800000,
+                        .max_uV = 1800000,
+                        .initial_mode = REGULATOR_MODE_IDLE,
+                        .boot_on = 1,
+                        .always_on = 1,
+                },
+        },
+        /* fixed Vbat supplies VSMPS2_EXT_1V36 and VSMPS5_EXT_1V15 */
+        [AB8500_EXT_SUPPLY2] = {
+                .constraints = {
+                        .name = "ab8500-ext-supply2",
+                        .min_uV = 1360000,
+                        .max_uV = 1360000,
+                },
+        },
+        /* fixed Vbat supplies VSMPS3_EXT_3V4 and VSMPS4_EXT_3V4 */
+        [AB8500_EXT_SUPPLY3] = {
+                .constraints = {
+                        .name = "ab8500-ext-supply3",
+                        .min_uV = 3400000,
+                        .max_uV = 3400000,
+                        .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+                        .boot_on = 1,
+                },
+                .num_consumer_supplies =
+                        ARRAY_SIZE(ab8500_ext_supply3_consumers),
+                .consumer_supplies = ab8500_ext_supply3_consumers,
+        },
+};
+/* ab8505 regulator register initialization */
+static struct ab8500_regulator_reg_init ab8505_reg_init[] = {
+        /*
+         * VarmRequestCtrl
+         * VsmpsCRequestCtrl
+         * VsmpsARequestCtrl
+         * VsmpsBRequestCtrl
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL1,       0x00, 0x00),
+        /*
+         * VsafeRequestCtrl
+         * VpllRequestCtrl
+         * VanaRequestCtrl          = HP/LP depending on VxRequest
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL2,       0x30, 0x00),
+        /*
+         * Vaux1RequestCtrl         = HP/LP depending on VxRequest
+         * Vaux2RequestCtrl         = HP/LP depending on VxRequest
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL3,       0xf0, 0x00),
+        /*
+         * Vaux3RequestCtrl         = HP/LP depending on VxRequest
+         * SwHPReq                  = Control through SWValid disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL4,       0x07, 0x00),
+        /*
+         * VsmpsASysClkReq1HPValid
+         * VsmpsBSysClkReq1HPValid
+         * VsafeSysClkReq1HPValid
+         * VanaSysClkReq1HPValid    = disabled
+         * VpllSysClkReq1HPValid
+         * Vaux1SysClkReq1HPValid   = disabled
+         * Vaux2SysClkReq1HPValid   = disabled
+         * Vaux3SysClkReq1HPValid   = disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQ1HPVALID1, 0xe8, 0x00),
+        /*
+         * VsmpsCSysClkReq1HPValid
+         * VarmSysClkReq1HPValid
+         * VbbSysClkReq1HPValid
+         * VsmpsMSysClkReq1HPValid
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQ1HPVALID2, 0x00, 0x00),
+        /*
+         * VsmpsAHwHPReq1Valid
+         * VsmpsBHwHPReq1Valid
+         * VsafeHwHPReq1Valid
+         * VanaHwHPReq1Valid        = disabled
+         * VpllHwHPReq1Valid
+         * Vaux1HwHPreq1Valid       = disabled
+         * Vaux2HwHPReq1Valid       = disabled
+         * Vaux3HwHPReqValid        = disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ1VALID1,     0xe8, 0x00),
+        /*
+         * VsmpsMHwHPReq1Valid
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ1VALID2,     0x00, 0x00),
+        /*
+         * VsmpsAHwHPReq2Valid
+         * VsmpsBHwHPReq2Valid
+         * VsafeHwHPReq2Valid
+         * VanaHwHPReq2Valid        = disabled
+         * VpllHwHPReq2Valid
+         * Vaux1HwHPReq2Valid       = disabled
+         * Vaux2HwHPReq2Valid       = disabled
+         * Vaux3HwHPReq2Valid       = disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ2VALID1,     0xe8, 0x00),
+        /*
+         * VsmpsMHwHPReq2Valid
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ2VALID2,     0x00, 0x00),
+        /**
+         * VsmpsCSwHPReqValid
+         * VarmSwHPReqValid
+         * VsmpsASwHPReqValid
+         * VsmpsBSwHPReqValid
+         * VsafeSwHPReqValid
+         * VanaSwHPReqValid
+         * VanaSwHPReqValid         = disabled
+         * VpllSwHPReqValid
+         * Vaux1SwHPReqValid        = disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUSWHPREQVALID1,      0xa0, 0x00),
+        /*
+         * Vaux2SwHPReqValid        = disabled
+         * Vaux3SwHPReqValid        = disabled
+         * VsmpsMSwHPReqValid
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUSWHPREQVALID2,      0x03, 0x00),
+        /*
+         * SysClkReq2Valid1         = SysClkReq2 controlled
+         * SysClkReq3Valid1         = disabled
+         * SysClkReq4Valid1         = SysClkReq4 controlled
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQVALID1,    0x0e, 0x0a),
+        /*
+         * SysClkReq2Valid2         = disabled
+         * SysClkReq3Valid2         = disabled
+         * SysClkReq4Valid2         = disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQVALID2,    0x0e, 0x00),
+        /*
+         * Vaux4SwHPReqValid
+         * Vaux4HwHPReq2Valid
+         * Vaux4HwHPReq1Valid
+         * Vaux4SysClkReq1HPValid
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUVAUX4REQVALID,    0x00, 0x00),
+        /*
+         * VadcEna                  = disabled
+         * VintCore12Ena            = disabled
+         * VintCore12Sel            = 1.25 V
+         * VintCore12LP             = inactive (HP)
+         * VadcLP                   = inactive (HP)
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUMISC1,              0xfe, 0x10),
+        /*
+         * VaudioEna                = disabled
+         * Vaux8Ena                 = disabled
+         * Vamic1Ena                = disabled
+         * Vamic2Ena                = disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VAUDIOSUPPLY,           0x1e, 0x00),
+        /*
+         * Vamic1_dzout             = high-Z when Vamic1 is disabled
+         * Vamic2_dzout             = high-Z when Vamic2 is disabled
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUCTRL1VAMIC,         0x03, 0x00),
+        /*
+         * VsmpsARegu
+         * VsmpsASelCtrl
+         * VsmpsAAutoMode
+         * VsmpsAPWMMode
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VSMPSAREGU,    0x00, 0x00),
+        /*
+         * VsmpsBRegu
+         * VsmpsBSelCtrl
+         * VsmpsBAutoMode
+         * VsmpsBPWMMode
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VSMPSBREGU,    0x00, 0x00),
+        /*
+         * VsafeRegu
+         * VsafeSelCtrl
+         * VsafeAutoMode
+         * VsafePWMMode
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VSAFEREGU,    0x00, 0x00),
+        /*
+         * VPll                     = Hw controlled (NOTE! PRCMU bits)
+         * VanaRegu                 = force off
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VPLLVANAREGU,           0x0f, 0x02),
+        /*
+         * VextSupply1Regu          = force OFF (OTP_ExtSupply12LPnPolarity 1)
+         * VextSupply2Regu          = force OFF (OTP_ExtSupply12LPnPolarity 1)
+         * VextSupply3Regu          = force OFF (OTP_ExtSupply3LPnPolarity 0)
+         * ExtSupply2Bypass         = ExtSupply12LPn ball is 0 when Ena is 0
+         * ExtSupply3Bypass         = ExtSupply3LPn ball is 0 when Ena is 0
+         */
+        INIT_REGULATOR_REGISTER(AB8505_EXTSUPPLYREGU,          0xff, 0x30),
+        /*
+         * Vaux1Regu                = force HP
+         * Vaux2Regu                = force off
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VAUX12REGU,             0x0f, 0x01),
+        /*
+         * Vaux3Regu                = force off
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VRF1VAUX3REGU,          0x03, 0x00),
+        /*
+         * VsmpsASel1
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL1,    0x00, 0x00),
+        /*
+         * VsmpsASel2
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL2,    0x00, 0x00),
+        /*
+         * VsmpsASel3
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL3,    0x00, 0x00),
+        /*
+         * VsmpsBSel1
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL1,    0x00, 0x00),
+        /*
+         * VsmpsBSel2
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL2,    0x00, 0x00),
+        /*
+         * VsmpsBSel3
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL3,    0x00, 0x00),
+        /*
+         * VsafeSel1
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VSAFESEL1,    0x00, 0x00),
+        /*
+         * VsafeSel2
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VSAFESEL2,    0x00, 0x00),
+        /*
+         * VsafeSel3
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VSAFESEL3,    0x00, 0x00),
+        /*
+         * Vaux1Sel                 = 2.8 V
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VAUX1SEL,               0x0f, 0x0C),
+        /*
+         * Vaux2Sel                 = 2.9 V
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VAUX2SEL,               0x0f, 0x0d),
+        /*
+         * Vaux3Sel                 = 2.91 V
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VRF1VAUX3SEL,           0x07, 0x07),
+        /*
+         * Vaux4RequestCtrl
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VAUX4REQCTRL,    0x00, 0x00),
+        /*
+         * Vaux4Regu
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VAUX4REGU,    0x00, 0x00),
+        /*
+         * Vaux4Sel
+         */
+        INIT_REGULATOR_REGISTER(AB8505_VAUX4SEL,    0x00, 0x00),
+        /*
+         * Vaux1Disch               = short discharge time
+         * Vaux2Disch               = short discharge time
+         * Vaux3Disch               = short discharge time
+         * Vintcore12Disch          = short discharge time
+         * VTVoutDisch              = short discharge time
+         * VaudioDisch              = short discharge time
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH,          0xfc, 0x00),
+        /*
+         * VanaDisch                = short discharge time
+         * Vaux8PullDownEna         = pulldown disabled when Vaux8 is disabled
+         * Vaux8Disch               = short discharge time
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH2,         0x16, 0x00),
+        /*
+         * Vaux4Disch               = short discharge time
+         */
+        INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH3,         0x01, 0x00),
+        /*
+         * Vaux5Sel
+         * Vaux5LP
+         * Vaux5Ena
+         * Vaux5Disch
+         * Vaux5DisSfst
+         * Vaux5DisPulld
+         */
+        INIT_REGULATOR_REGISTER(AB8505_CTRLVAUX5,              0x00, 0x00),
+        /*
+         * Vaux6Sel
+         * Vaux6LP
+         * Vaux6Ena
+         * Vaux6DisPulld
+         */
+        INIT_REGULATOR_REGISTER(AB8505_CTRLVAUX6,              0x00, 0x00),
+};
+struct regulator_init_data ab8505_regulators[AB8505_NUM_REGULATORS] = {
+        /* supplies to the display/camera */
+        [AB8505_LDO_AUX1] = {
+                .constraints = {
+                        .name = "V-DISPLAY",
+                        .min_uV = 2800000,
+                        .max_uV = 3300000,
+                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+                                          REGULATOR_CHANGE_STATUS,
+                        .boot_on = 1, /* display is on at boot */
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers),
+                .consumer_supplies = ab8500_vaux1_consumers,
+        },
+        /* supplies to the on-board eMMC */
+        [AB8505_LDO_AUX2] = {
+                .constraints = {
+                        .name = "V-eMMC1",
+                        .min_uV = 1100000,
+                        .max_uV = 3300000,
+                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+                                          REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_MODE,
+                        .valid_modes_mask = REGULATOR_MODE_NORMAL |
+                                            REGULATOR_MODE_IDLE,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux2_consumers),
+                .consumer_supplies = ab8500_vaux2_consumers,
+        },
+        /* supply for VAUX3, supplies to SDcard slots */
+        [AB8505_LDO_AUX3] = {
+                .constraints = {
+                        .name = "V-MMC-SD",
+                        .min_uV = 1100000,
+                        .max_uV = 3300000,
+                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+                                          REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_MODE,
+                        .valid_modes_mask = REGULATOR_MODE_NORMAL |
+                                            REGULATOR_MODE_IDLE,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux3_consumers),
+                .consumer_supplies = ab8500_vaux3_consumers,
+        },
+        /* supply for VAUX4, supplies to NFC and standalone secure element */
+        [AB8505_LDO_AUX4] = {
+                .constraints = {
+                        .name = "V-NFC-SE",
+                        .min_uV = 1100000,
+                        .max_uV = 3300000,
+                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+                                          REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_MODE,
+                        .valid_modes_mask = REGULATOR_MODE_NORMAL |
+                                            REGULATOR_MODE_IDLE,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux4_consumers),
+                .consumer_supplies = ab8505_vaux4_consumers,
+        },
+        /* supply for VAUX5, supplies to TBD */
+        [AB8505_LDO_AUX5] = {
+                .constraints = {
+                        .name = "V-AUX5",
+                        .min_uV = 1050000,
+                        .max_uV = 2790000,
+                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+                                          REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_MODE,
+                        .valid_modes_mask = REGULATOR_MODE_NORMAL |
+                                            REGULATOR_MODE_IDLE,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux5_consumers),
+                .consumer_supplies = ab8505_vaux5_consumers,
+        },
+        /* supply for VAUX6, supplies to TBD */
+        [AB8505_LDO_AUX6] = {
+                .constraints = {
+                        .name = "V-AUX6",
+                        .min_uV = 1050000,
+                        .max_uV = 2790000,
+                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+                                          REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_MODE,
+                        .valid_modes_mask = REGULATOR_MODE_NORMAL |
+                                            REGULATOR_MODE_IDLE,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux6_consumers),
+                .consumer_supplies = ab8505_vaux6_consumers,
+        },
+        /* supply for gpadc, ADC LDO */
+        [AB8505_LDO_ADC] = {
+                .constraints = {
+                        .name = "V-ADC",
+                        .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8505_vadc_consumers),
+                .consumer_supplies = ab8505_vadc_consumers,
+        },
+        /* supply for ab8500-vaudio, VAUDIO LDO */
+        [AB8505_LDO_AUDIO] = {
+                .constraints = {
+                        .name = "V-AUD",
+                        .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8500_vaud_consumers),
+                .consumer_supplies = ab8500_vaud_consumers,
+        },
+        /* supply for v-anamic1 VAMic1-LDO */
+        [AB8505_LDO_ANAMIC1] = {
+                .constraints = {
+                        .name = "V-AMIC1",
+                        .valid_ops_mask = REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_MODE,
+                        .valid_modes_mask = REGULATOR_MODE_NORMAL |
+                                            REGULATOR_MODE_IDLE,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic1_consumers),
+                .consumer_supplies = ab8500_vamic1_consumers,
+        },
+        /* supply for v-amic2, VAMIC2 LDO, reuse constants for AMIC1 */
+        [AB8505_LDO_ANAMIC2] = {
+                .constraints = {
+                        .name = "V-AMIC2",
+                        .valid_ops_mask = REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_MODE,
+                        .valid_modes_mask = REGULATOR_MODE_NORMAL |
+                                            REGULATOR_MODE_IDLE,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic2_consumers),
+                .consumer_supplies = ab8500_vamic2_consumers,
+        },
+        /* supply for v-aux8, VAUX8 LDO */
+        [AB8505_LDO_AUX8] = {
+                .constraints = {
+                        .name = "V-AUX8",
+                        .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux8_consumers),
+                .consumer_supplies = ab8505_vaux8_consumers,
+        },
+        /* supply for v-intcore12, VINTCORE12 LDO */
+        [AB8505_LDO_INTCORE] = {
+                .constraints = {
+                        .name = "V-INTCORE",
+                        .min_uV = 1250000,
+                        .max_uV = 1350000,
+                        .input_uV = 1800000,
+                        .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
+                                          REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_MODE |
+                                          REGULATOR_CHANGE_DRMS,
+                        .valid_modes_mask = REGULATOR_MODE_NORMAL |
+                                            REGULATOR_MODE_IDLE,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8500_vintcore_consumers),
+                .consumer_supplies = ab8500_vintcore_consumers,
+        },
+        /* supply for LDO USB */
+        [AB8505_LDO_USB] = {
+                .constraints = {
+                        .name = "V-USB",
+                        .valid_ops_mask = REGULATOR_CHANGE_STATUS |
+                                          REGULATOR_CHANGE_MODE,
+                        .valid_modes_mask = REGULATOR_MODE_NORMAL |
+                                            REGULATOR_MODE_IDLE,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8505_usb_consumers),
+                .consumer_supplies = ab8505_usb_consumers,
+        },
+        /* supply for U8500 CSI-DSI, VANA LDO */
+        [AB8505_LDO_ANA] = {
+                .constraints = {
+                        .name = "V-CSI-DSI",
+                        .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+                },
+                .num_consumer_supplies = ARRAY_SIZE(ab8500_vana_consumers),
+                .consumer_supplies = ab8500_vana_consumers,
+        },
+};
+struct ab8500_regulator_platform_data ab8500_regulator_plat_data = {
+        .reg_init               = ab8500_reg_init,
+        .num_reg_init           = ARRAY_SIZE(ab8500_reg_init),
+        .regulator              = ab8500_regulators,
+        .num_regulator          = ARRAY_SIZE(ab8500_regulators),
+        .ext_regulator          = ab8500_ext_regulators,
+        .num_ext_regulator      = ARRAY_SIZE(ab8500_ext_regulators),
+};
+/* Use the AB8500 init settings for AB8505 as they are the same right now */
+struct ab8500_regulator_platform_data ab8505_regulator_plat_data = {
+        .reg_init               = ab8505_reg_init,
+        .num_reg_init           = ARRAY_SIZE(ab8505_reg_init),
+        .regulator              = ab8505_regulators,
+        .num_regulator          = ARRAY_SIZE(ab8505_regulators),
+};
+static void ab8500_modify_reg_init(int id, u8 mask, u8 value)
+{
+        int i;
+        if (cpu_is_u8520()) {
+                for (i = ARRAY_SIZE(ab8505_reg_init) - 1; i >= 0; i--) {
+                        if (ab8505_reg_init[i].id == id) {
+                                u8 initval = ab8505_reg_init[i].value;
+                                initval = (initval & ~mask) | (value & mask);
+                                ab8505_reg_init[i].value = initval;
+                                BUG_ON(mask & ~ab8505_reg_init[i].mask);
+                                return;
+                        }
+                }
+        } else {
+                for (i = ARRAY_SIZE(ab8500_reg_init) - 1; i >= 0; i--) {
+                        if (ab8500_reg_init[i].id == id) {
+                                u8 initval = ab8500_reg_init[i].value;
+                                initval = (initval & ~mask) | (value & mask);
+                                ab8500_reg_init[i].value = initval;
+                                BUG_ON(mask & ~ab8500_reg_init[i].mask);
+                                return;
+                        }
+                }
+        }
+        BUG_ON(1);
+}
+void mop500_regulator_init(void)
+{
+        struct regulator_init_data *regulator;
+        /*
+         * Temporarily turn on Vaux2 on 8520 machine
+         */
+        if (cpu_is_u8520()) {
+                /* Vaux2 initialized to be on */
+                ab8500_modify_reg_init(AB8505_VAUX12REGU, 0x0f, 0x05);
+        }
+        /*
+         * Handle AB8500_EXT_SUPPLY2 on HREFP_V20_V50 boards (do it for
+         * all HREFP_V20 boards)
+         */
+        if (cpu_is_u8500v20()) {
+                /* VextSupply2RequestCtrl =  HP/OFF depending on VxRequest */
+                ab8500_modify_reg_init(AB8500_REGUREQUESTCTRL3, 0x01, 0x01);
+                /* VextSupply2SysClkReq1HPValid = SysClkReq1 controlled */
+                ab8500_modify_reg_init(AB8500_REGUSYSCLKREQ1HPVALID2,
+                        0x20, 0x20);
+                /* VextSupply2 = force HP at initialization */
+                ab8500_modify_reg_init(AB8500_EXTSUPPLYREGU, 0x0c, 0x04);
+                /* enable VextSupply2 during platform active */
+                regulator = &ab8500_ext_regulators[AB8500_EXT_SUPPLY2];
+                regulator->constraints.always_on = 1;
+                /* disable VextSupply2 in suspend */
+                regulator = &ab8500_ext_regulators[AB8500_EXT_SUPPLY2];
+                regulator->constraints.state_mem.disabled = 1;
+                regulator->constraints.state_standby.disabled = 1;
+                /* enable VextSupply2 HW control (used in suspend) */
+                regulator->driver_data = (void *)&ab8500_ext_supply2;
+        }
+}
diff --git a/arch/arm/mach-ux500/board-mop500-regulators.h b/arch/arm/mach-ux500/board-mop500-regulators.h
index 78a0642a2206..039f5132c370 100644
--- a/arch/arm/mach-ux500/board-mop500-regulators.h
+++ b/arch/arm/mach-ux500/board-mop500-regulators.h
@@ -14,10 +14,12 @@
 #include <linux/regulator/machine.h>
 #include <linux/regulator/ab8500.h>
-extern struct ab8500_regulator_reg_init
+extern struct ab8500_regulator_platform_data ab8500_regulator_plat_data;
-ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS];
+extern struct ab8500_regulator_platform_data ab8505_regulator_plat_data;
-extern struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS];
 extern struct regulator_init_data tps61052_regulator;
 extern struct regulator_init_data gpio_en_3v3_regulator;
+extern struct regulator_init_data sdi0_reg_init_data;
+void mop500_regulator_init(void);
 #endif
diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c
index 7f2cb6c5e2c1..6db0740128de 100644
--- a/arch/arm/mach-ux500/board-mop500-sdi.c
+++ b/arch/arm/mach-ux500/board-mop500-sdi.c
@@ -31,35 +31,6 @@
 * SDI 0 (MicroSD slot)
 */
-/* GPIO pins used by the sdi0 level shifter */
-static int sdi0_en = -1;
-static int sdi0_vsel = -1;
-static int mop500_sdi0_ios_handler(struct device *dev, struct mmc_ios *ios)
-{
-        switch (ios->power_mode) {
-        case MMC_POWER_UP:
-        case MMC_POWER_ON:
-                /*
-                 * Level shifter voltage should depend on vdd to when deciding
-                 * on either 1.8V or 2.9V. Once the decision has been made the
-                 * level shifter must be disabled and re-enabled with a changed
-                 * select signal in order to switch the voltage. Since there is
-                 * no framework support yet for indicating 1.8V in vdd, use the
-                 * default 2.9V.
-                 */
-                gpio_direction_output(sdi0_vsel, 0);
-                gpio_direction_output(sdi0_en, 1);
-                break;
-        case MMC_POWER_OFF:
-                gpio_direction_output(sdi0_vsel, 0);
-                gpio_direction_output(sdi0_en, 0);
-                break;
-        }
-        return 0;
-}
 #ifdef CONFIG_STE_DMA40
 struct stedma40_chan_cfg mop500_sdi0_dma_cfg_rx = {
        .mode = STEDMA40_MODE_LOGICAL,
@@ -100,22 +71,6 @@ struct mmci_platform_data mop500_sdi0_data = {
 static void sdi0_configure(struct device *parent)
 {
-        int ret;
-        ret = gpio_request(sdi0_en, "level shifter enable");
-        if (!ret)
-                ret = gpio_request(sdi0_vsel,
-                                   "level shifter 1v8-3v select");
-        if (ret) {
-                pr_warning("unable to config sdi0 gpios for level shifter.\n");
-                return;
-        }
-        /* Select the default 2.9V and enable level shifter */
-        gpio_direction_output(sdi0_vsel, 0);
-        gpio_direction_output(sdi0_en, 1);
        /* Add the device, force v2 to subrevision 1 */
        db8500_add_sdi0(parent, &mop500_sdi0_data, U8500_SDI_V2_PERIPHID);
 }
@@ -123,8 +78,6 @@ static void sdi0_configure(struct device *parent)
 void mop500_sdi_tc35892_init(struct device *parent)
 {
        mop500_sdi0_data.gpio_cd = GPIO_SDMMC_CD;
-        sdi0_en = GPIO_SDMMC_EN;
-        sdi0_vsel = GPIO_SDMMC_1V8_3V_SEL;
        sdi0_configure(parent);
 }
@@ -263,8 +216,6 @@ void __init snowball_sdi_init(struct device *parent)
        /* External Micro SD slot */
        mop500_sdi0_data.gpio_cd = SNOWBALL_SDMMC_CD_GPIO;
        mop500_sdi0_data.cd_invert = true;
-        sdi0_en = SNOWBALL_SDMMC_EN_GPIO;
-        sdi0_vsel = SNOWBALL_SDMMC_1V8_3V_GPIO;
        sdi0_configure(parent);
 }
@@ -276,8 +227,6 @@ void __init hrefv60_sdi_init(struct device *parent)
        db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
        /* External Micro SD slot */
        mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO;
-        sdi0_en = HREFV60_SDMMC_EN_GPIO;
-        sdi0_vsel = HREFV60_SDMMC_1V8_3V_GPIO;
        sdi0_configure(parent);
        /* WLAN SDIO channel */
        db8500_add_sdi1(parent, &mop500_sdi1_data, U8500_SDI_V2_PERIPHID);
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 87d2d7b38ce9..574916b70b2e 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -25,6 +25,8 @@
 #include <linux/mfd/abx500/ab8500.h>
 #include <linux/regulator/ab8500.h>
 #include <linux/regulator/fixed.h>
+#include <linux/regulator/driver.h>
+#include <linux/regulator/gpio-regulator.h>
 #include <linux/mfd/tc3589x.h>
 #include <linux/mfd/tps6105x.h>
 #include <linux/mfd/abx500/ab8500-gpio.h>
@@ -90,6 +92,37 @@ static struct platform_device snowball_gpio_en_3v3_regulator_dev = {
       },
 };
+/* Dynamically populated. */
+static struct gpio sdi0_reg_gpios[] = {
+        { 0, GPIOF_OUT_INIT_LOW, "mmci_vsel" },
+};
+static struct gpio_regulator_state sdi0_reg_states[] = {
+        { .value = 2900000, .gpios = (0 << 0) },
+        { .value = 1800000, .gpios = (1 << 0) },
+};
+static struct gpio_regulator_config sdi0_reg_info = {
+        .supply_name            = "ext-mmc-level-shifter",
+        .gpios                  = sdi0_reg_gpios,
+        .nr_gpios               = ARRAY_SIZE(sdi0_reg_gpios),
+        .states                 = sdi0_reg_states,
+        .nr_states              = ARRAY_SIZE(sdi0_reg_states),
+        .type                   = REGULATOR_VOLTAGE,
+        .enable_high            = 1,
+        .enabled_at_boot        = 0,
+        .init_data              = &sdi0_reg_init_data,
+        .startup_delay          = 100,
+};
+static struct platform_device sdi0_regulator = {
+        .name = "gpio-regulator",
+        .id   = -1,
+        .dev  = {
+                .platform_data = &sdi0_reg_info,
+        },
+};
 static struct abx500_gpio_platform_data ab8500_gpio_pdata = {
        .gpio_base              = MOP500_AB8500_PIN_GPIO(1),
 };
@@ -199,10 +232,7 @@ static struct platform_device snowball_sbnet_dev = {
 struct ab8500_platform_data ab8500_platdata = {
        .irq_base       = MOP500_AB8500_IRQ_BASE,
-        .regulator_reg_init = ab8500_regulator_reg_init,
+        .regulator      = &ab8500_regulator_plat_data,
-        .num_regulator_reg_init = ARRAY_SIZE(ab8500_regulator_reg_init),
-        .regulator      = ab8500_regulators,
-        .num_regulator  = ARRAY_SIZE(ab8500_regulators),
        .gpio           = &ab8500_gpio_pdata,
        .codec          = &ab8500_codec_pdata,
 };
@@ -491,6 +521,7 @@ static struct hash_platform_data u8500_hash1_platform_data = {
 /* add any platform devices here - TODO */
 static struct platform_device *mop500_platform_devs[] __initdata = {
        &mop500_gpio_keys_device,
+        &sdi0_regulator,
 };
 #ifdef CONFIG_STE_DMA40
@@ -634,6 +665,7 @@ static struct platform_device *snowball_platform_devs[] __initdata = {
        &snowball_gpio_en_3v3_regulator_dev,
        &u8500_thsens_device,
        &u8500_cpufreq_cooling_device,
+        &sdi0_regulator,
 };
 static void __init mop500_init_machine(void)
@@ -645,6 +677,9 @@ static void __init mop500_init_machine(void)
        platform_device_register(&db8500_prcmu_device);
        mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
+        sdi0_reg_info.enable_gpio = GPIO_SDMMC_EN;
+        sdi0_reg_info.gpios[0].gpio = GPIO_SDMMC_1V8_3V_SEL;
        mop500_pinmaps_init();
        parent = u8500_init_devices(&ab8500_platdata);
@@ -678,6 +713,10 @@ static void __init snowball_init_machine(void)
        int i;
        platform_device_register(&db8500_prcmu_device);
+        sdi0_reg_info.enable_gpio = SNOWBALL_SDMMC_EN_GPIO;
+        sdi0_reg_info.gpios[0].gpio = SNOWBALL_SDMMC_1V8_3V_GPIO;
        snowball_pinmaps_init();
        parent = u8500_init_devices(&ab8500_platdata);
@@ -713,6 +752,9 @@ static void __init hrefv60_init_machine(void)
         */
        mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
+        sdi0_reg_info.enable_gpio = HREFV60_SDMMC_EN_GPIO;
+        sdi0_reg_info.gpios[0].gpio = HREFV60_SDMMC_1V8_3V_GPIO;
        hrefv60_pinmaps_init();
        parent = u8500_init_devices(&ab8500_platdata);
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index f1a581844372..5c6c2e633868 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -282,6 +282,7 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
        OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL),
        OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
                        &db8500_prcmu_pdata),
+        OF_DEV_AUXDATA("smsc,lan9115", 0x50000000, "smsc911x", NULL),
        /* Requires device name bindings. */
        OF_DEV_AUXDATA("stericsson,nmk-pinctrl", U8500_PRCMU_BASE,
                "pinctrl-db8500", NULL),
diff --git a/arch/arm/mach-ux500/cpuidle.c b/arch/arm/mach-ux500/cpuidle.c
index ce9149302cc3..488e07472d98 100644
--- a/arch/arm/mach-ux500/cpuidle.c
+++ b/arch/arm/mach-ux500/cpuidle.c
@@ -11,7 +11,6 @@
 #include <linux/module.h>
 #include <linux/cpuidle.h>
-#include <linux/clockchips.h>
 #include <linux/spinlock.h>
 #include <linux/atomic.h>
 #include <linux/smp.h>
@@ -22,7 +21,6 @@
 static atomic_t master = ATOMIC_INIT(0);
 static DEFINE_SPINLOCK(master_lock);
-static DEFINE_PER_CPU(struct cpuidle_device, ux500_cpuidle_device);
 static inline int ux500_enter_idle(struct cpuidle_device *dev,
                                   struct cpuidle_driver *drv, int index)
@@ -30,8 +28,6 @@ static inline int ux500_enter_idle(struct cpuidle_device *dev,
        int this_cpu = smp_processor_id();
        bool recouple = false;
-        clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &this_cpu);
        if (atomic_inc_return(&master) == num_online_cpus()) {
                /* With this lock, we prevent the other cpu to exit and enter
@@ -91,22 +87,20 @@ out:
                spin_unlock(&master_lock);
        }
-        clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &this_cpu);
        return index;
 }
 static struct cpuidle_driver ux500_idle_driver = {
        .name = "ux500_idle",
        .owner = THIS_MODULE,
-        .en_core_tk_irqen = 1,
        .states = {
                ARM_CPUIDLE_WFI_STATE,
                {
                        .enter            = ux500_enter_idle,
                        .exit_latency     = 70,
                        .target_residency = 260,
-                        .flags            = CPUIDLE_FLAG_TIME_VALID,
+                        .flags            = CPUIDLE_FLAG_TIME_VALID |
+                                            CPUIDLE_FLAG_TIMER_STOP,
                        .name             = "ApIdle",
                        .desc             = "ARM Retention",
                },
@@ -115,59 +109,13 @@ static struct cpuidle_driver ux500_idle_driver = {
        .state_count = 2,
 };
-/*
- * For each cpu, setup the broadcast timer because we will
- * need to migrate the timers for the states >= ApIdle.
- */
-static void ux500_setup_broadcast_timer(void *arg)
-{
-        int cpu = smp_processor_id();
-        clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ON, &cpu);
-}
 int __init ux500_idle_init(void)
 {
-        int ret, cpu;
-        struct cpuidle_device *device;
        /* Configure wake up reasons */
        prcmu_enable_wakeups(PRCMU_WAKEUP(ARM) | PRCMU_WAKEUP(RTC) |
                             PRCMU_WAKEUP(ABB));
-        /*
+        return cpuidle_register(&ux500_idle_driver, NULL);
-         * Configure the timer broadcast for each cpu, that must
-         * be done from the cpu context, so we use a smp cross
-         * call with 'on_each_cpu'.
-         */
-        on_each_cpu(ux500_setup_broadcast_timer, NULL, 1);
-        ret = cpuidle_register_driver(&ux500_idle_driver);
-        if (ret) {
-                printk(KERN_ERR "failed to register ux500 idle driver\n");
-                return ret;
-        }
-        for_each_online_cpu(cpu) {
-                device = &per_cpu(ux500_cpuidle_device, cpu);
-                device->cpu = cpu;
-                ret = cpuidle_register_device(device);
-                if (ret) {
-                        printk(KERN_ERR "Failed to register cpuidle "
-                               "device for cpu%d\n", cpu);
-                        goto out_unregister;
-                }
-        }
-out:
-        return ret;
-out_unregister:
-        for_each_online_cpu(cpu) {
-                device = &per_cpu(ux500_cpuidle_device, cpu);
-                cpuidle_unregister_device(device);
-        }
-        cpuidle_unregister_driver(&ux500_idle_driver);
-        goto out;
 }
 device_initcall(ux500_idle_init);
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
index 52d315b792c8..0f1c5e53fb27 100644
--- a/arch/arm/mach-vexpress/Kconfig
+++ b/arch/arm/mach-vexpress/Kconfig
@@ -17,6 +17,9 @@ config ARCH_VEXPRESS
        select NO_IOPORT
        select PLAT_VERSATILE
        select PLAT_VERSATILE_CLCD
+        select POWER_RESET
+        select POWER_RESET_VEXPRESS
+        select POWER_SUPPLY
        select REGULATOR_FIXED_VOLTAGE if REGULATOR
        select VEXPRESS_CONFIG
        help
diff --git a/arch/arm/mach-vexpress/Makefile b/arch/arm/mach-vexpress/Makefile
index 80b64971fbdd..42703e8b4d3b 100644
--- a/arch/arm/mach-vexpress/Makefile
+++ b/arch/arm/mach-vexpress/Makefile
@@ -4,7 +4,7 @@
 ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \
        -I$(srctree)/arch/arm/plat-versatile/include
-obj-y                                   := v2m.o reset.o
+obj-y                                   := v2m.o
 obj-$(CONFIG_ARCH_VEXPRESS_CA9X4)       += ct-ca9x4.o
 obj-$(CONFIG_SMP)                       += platsmp.o
 obj-$(CONFIG_HOTPLUG_CPU)               += hotplug.o
diff --git a/arch/arm/mach-vexpress/reset.c b/arch/arm/mach-vexpress/reset.c
deleted file mode 100644
index 465923aa3819..000000000000
--- a/arch/arm/mach-vexpress/reset.c
+++ /dev/null
@@ -1,141 +0,0 @@
-/*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * Copyright (C) 2012 ARM Limited
- */
-#include <linux/jiffies.h>
-#include <linux/of.h>
-#include <linux/of_device.h>
-#include <linux/platform_device.h>
-#include <linux/stat.h>
-#include <linux/vexpress.h>
-static void vexpress_reset_do(struct device *dev, const char *what)
-{
-        int err = -ENOENT;
-        struct vexpress_config_func *func =
-                        vexpress_config_func_get_by_dev(dev);
-        if (func) {
-                unsigned long timeout;
-                err = vexpress_config_write(func, 0, 0);
-                timeout = jiffies + HZ;
-                while (time_before(jiffies, timeout))
-                        cpu_relax();
-        }
-        dev_emerg(dev, "Unable to %s (%d)\n", what, err);
-}
-static struct device *vexpress_power_off_device;
-void vexpress_power_off(void)
-{
-        vexpress_reset_do(vexpress_power_off_device, "power off");
-}
-static struct device *vexpress_restart_device;
-void vexpress_restart(char str, const char *cmd)
-{
-        vexpress_reset_do(vexpress_restart_device, "restart");
-}
-static ssize_t vexpress_reset_active_show(struct device *dev,
-                struct device_attribute *attr, char *buf)
-{
-        return sprintf(buf, "%d\n", vexpress_restart_device == dev);
-}
-static ssize_t vexpress_reset_active_store(struct device *dev,
-                struct device_attribute *attr, const char *buf, size_t count)
-{
-        long value;
-        int err = kstrtol(buf, 0, &value);
-        if (!err && value)
-                vexpress_restart_device = dev;
-        return err ? err : count;
-}
-DEVICE_ATTR(active, S_IRUGO | S_IWUSR, vexpress_reset_active_show,
-                vexpress_reset_active_store);
-enum vexpress_reset_func { FUNC_RESET, FUNC_SHUTDOWN, FUNC_REBOOT };
-static struct of_device_id vexpress_reset_of_match[] = {
-        {
-                .compatible = "arm,vexpress-reset",
-                .data = (void *)FUNC_RESET,
-        }, {
-                .compatible = "arm,vexpress-shutdown",
-                .data = (void *)FUNC_SHUTDOWN
-        }, {
-                .compatible = "arm,vexpress-reboot",
-                .data = (void *)FUNC_REBOOT
-        },
-        {}
-};
-static int vexpress_reset_probe(struct platform_device *pdev)
-{
-        enum vexpress_reset_func func;
-        const struct of_device_id *match =
-                        of_match_device(vexpress_reset_of_match, &pdev->dev);
-        if (match)
-                func = (enum vexpress_reset_func)match->data;
-        else
-                func = pdev->id_entry->driver_data;
-        switch (func) {
-        case FUNC_SHUTDOWN:
-                vexpress_power_off_device = &pdev->dev;
-                break;
-        case FUNC_RESET:
-                if (!vexpress_restart_device)
-                        vexpress_restart_device = &pdev->dev;
-                device_create_file(&pdev->dev, &dev_attr_active);
-                break;
-        case FUNC_REBOOT:
-                vexpress_restart_device = &pdev->dev;
-                device_create_file(&pdev->dev, &dev_attr_active);
-                break;
-        };
-        return 0;
-}
-static const struct platform_device_id vexpress_reset_id_table[] = {
-        { .name = "vexpress-reset", .driver_data = FUNC_RESET, },
-        { .name = "vexpress-shutdown", .driver_data = FUNC_SHUTDOWN, },
-        { .name = "vexpress-reboot", .driver_data = FUNC_REBOOT, },
-        {}
-};
-static struct platform_driver vexpress_reset_driver = {
-        .probe = vexpress_reset_probe,
-        .driver = {
-                .name = "vexpress-reset",
-                .of_match_table = vexpress_reset_of_match,
-        },
-        .id_table = vexpress_reset_id_table,
-};
-static int __init vexpress_reset_init(void)
-{
-        return platform_driver_register(&vexpress_reset_driver);
-}
-device_initcall(vexpress_reset_init);
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index d0ad78998cb6..9366f37902d9 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -22,6 +22,8 @@
 #include <linux/regulator/fixed.h>
 #include <linux/regulator/machine.h>
 #include <linux/vexpress.h>
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
 #include <asm/arch_timer.h>
 #include <asm/mach-types.h>
@@ -361,8 +363,6 @@ static void __init v2m_init(void)
        for (i = 0; i < ARRAY_SIZE(v2m_amba_devs); i++)
                amba_device_register(v2m_amba_devs[i], &iomem_resource);
-        pm_power_off = vexpress_power_off;
        ct_desc->init_tile();
 }
@@ -374,7 +374,6 @@ MACHINE_START(VEXPRESS, "ARM-Versatile Express")
        .init_irq       = v2m_init_irq,
        .init_time      = v2m_timer_init,
        .init_machine   = v2m_init,
-        .restart        = vexpress_restart,
 MACHINE_END
 static struct map_desc v2m_rs1_io_desc __initdata = {
@@ -433,7 +432,7 @@ static void __init v2m_dt_timer_init(void)
 {
        struct device_node *node = NULL;
-        vexpress_clk_of_init();
+        of_clk_init(NULL);
        clocksource_of_init();
        do {
@@ -442,6 +441,10 @@ static void __init v2m_dt_timer_init(void)
        if (node) {
                pr_info("Using SP804 '%s' as a clock & events source\n",
                                node->full_name);
+                WARN_ON(clk_register_clkdev(of_clk_get_by_name(node,
+                                "timclken1"), "v2m-timer0", "sp804"));
+                WARN_ON(clk_register_clkdev(of_clk_get_by_name(node,
+                                "timclken2"), "v2m-timer1", "sp804"));
                v2m_sp804_init(of_iomap(node, 0),
                                irq_of_parse_and_map(node, 0));
        }
@@ -464,7 +467,6 @@ static void __init v2m_dt_init(void)
 {
        l2x0_of_init(0x00400000, 0xfe0fffff);
        of_platform_populate(NULL, v2m_dt_bus_match, NULL, NULL);
-        pm_power_off = vexpress_power_off;
 }
 static const char * const v2m_dt_match[] __initconst = {
@@ -481,5 +483,4 @@ DT_MACHINE_START(VEXPRESS_DT, "ARM-Versatile Express")
        .init_irq       = irqchip_init,
        .init_time      = v2m_dt_timer_init,
        .init_machine   = v2m_dt_init,
-        .restart        = vexpress_restart,
 MACHINE_END
diff --git a/arch/arm/mach-w90x900/dev.c b/arch/arm/mach-w90x900/dev.c
index 7abdb9645c5b..e65a80a1ac75 100644
--- a/arch/arm/mach-w90x900/dev.c
+++ b/arch/arm/mach-w90x900/dev.c
@@ -19,6 +19,7 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/slab.h>
+#include <linux/cpu.h>
 #include <linux/mtd/physmap.h>
 #include <linux/mtd/mtd.h>
@@ -531,7 +532,7 @@ static struct platform_device *nuc900_public_dev[] __initdata = {
 void __init nuc900_board_init(struct platform_device **device, int size)
 {
-        disable_hlt();
+        cpu_idle_poll_ctrl(true);
        platform_add_devices(device, size);
        platform_add_devices(nuc900_public_dev, ARRAY_SIZE(nuc900_public_dev));
        spi_register_board_info(nuc900_spi_board_info,
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 025d17328730..4045c4931a30 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -43,7 +43,7 @@ config CPU_ARM740T
        depends on !MMU
        select CPU_32v4T
        select CPU_ABRT_LV4T
-        select CPU_CACHE_V3     # although the core is v4t
+        select CPU_CACHE_V4
        select CPU_CP15_MPU
        select CPU_PABRT_LEGACY
        help
@@ -469,9 +469,6 @@ config CPU_PABRT_V7
        bool
 # The cache model
-config CPU_CACHE_V3
-        bool
 config CPU_CACHE_V4
        bool
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
index 4e333fa2756f..9e51be96f635 100644
--- a/arch/arm/mm/Makefile
+++ b/arch/arm/mm/Makefile
@@ -33,7 +33,6 @@ obj-$(CONFIG_CPU_PABRT_LEGACY)	+= pabort-legacy.o
 obj-$(CONFIG_CPU_PABRT_V6)      += pabort-v6.o
 obj-$(CONFIG_CPU_PABRT_V7)      += pabort-v7.o
-obj-$(CONFIG_CPU_CACHE_V3)      += cache-v3.o
 obj-$(CONFIG_CPU_CACHE_V4)      += cache-v4.o
 obj-$(CONFIG_CPU_CACHE_V4WT)    += cache-v4wt.o
 obj-$(CONFIG_CPU_CACHE_V4WB)    += cache-v4wb.o
diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c
index dd3d59122cc3..48bc3c0a87ce 100644
--- a/arch/arm/mm/cache-feroceon-l2.c
+++ b/arch/arm/mm/cache-feroceon-l2.c
@@ -343,6 +343,7 @@ void __init feroceon_l2_init(int __l2_wt_override)
        outer_cache.inv_range = feroceon_l2_inv_range;
        outer_cache.clean_range = feroceon_l2_clean_range;
        outer_cache.flush_range = feroceon_l2_flush_range;
+        outer_cache.inv_all = l2_inv_all;
        enable_l2();
diff --git a/arch/arm/mm/cache-v3.S b/arch/arm/mm/cache-v3.S
deleted file mode 100644
index 8a3fadece8d3..000000000000
--- a/arch/arm/mm/cache-v3.S
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- *  linux/arch/arm/mm/cache-v3.S
- *
- *  Copyright (C) 1997-2002 Russell king
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/linkage.h>
-#include <linux/init.h>
-#include <asm/page.h>
-#include "proc-macros.S"
-/*
- *      flush_icache_all()
- *
- *      Unconditionally clean and invalidate the entire icache.
- */
-ENTRY(v3_flush_icache_all)
-        mov     pc, lr
-ENDPROC(v3_flush_icache_all)
-/*
- *      flush_user_cache_all()
- *
- *      Invalidate all cache entries in a particular address
- *      space.
- *
- *      - mm    - mm_struct describing address space
- */
-ENTRY(v3_flush_user_cache_all)
-        /* FALLTHROUGH */
-/*
- *      flush_kern_cache_all()
- *
- *      Clean and invalidate the entire cache.
- */
-ENTRY(v3_flush_kern_cache_all)
-        /* FALLTHROUGH */
-/*
- *      flush_user_cache_range(start, end, flags)
- *
- *      Invalidate a range of cache entries in the specified
- *      address space.
- *
- *      - start - start address (may not be aligned)
- *      - end   - end address (exclusive, may not be aligned)
- *      - flags - vma_area_struct flags describing address space
- */
-ENTRY(v3_flush_user_cache_range)
-        mov     ip, #0
-        mcreq   p15, 0, ip, c7, c0, 0           @ flush ID cache
-        mov     pc, lr
-/*
- *      coherent_kern_range(start, end)
- *
- *      Ensure coherency between the Icache and the Dcache in the
- *      region described by start.  If you have non-snooping
- *      Harvard caches, you need to implement this function.
- *
- *      - start  - virtual start address
- *      - end    - virtual end address
- */
-ENTRY(v3_coherent_kern_range)
-        /* FALLTHROUGH */
-/*
- *      coherent_user_range(start, end)
- *
- *      Ensure coherency between the Icache and the Dcache in the
- *      region described by start.  If you have non-snooping
- *      Harvard caches, you need to implement this function.
- *
- *      - start  - virtual start address
- *      - end    - virtual end address
- */
-ENTRY(v3_coherent_user_range)
-        mov     r0, #0
-        mov     pc, lr
-/*
- *      flush_kern_dcache_area(void *page, size_t size)
- *
- *      Ensure no D cache aliasing occurs, either with itself or
- *      the I cache
- *
- *      - addr  - kernel address
- *      - size  - region size
- */
-ENTRY(v3_flush_kern_dcache_area)
-        /* FALLTHROUGH */
-/*
- *      dma_flush_range(start, end)
- *
- *      Clean and invalidate the specified virtual address range.
- *
- *      - start  - virtual start address
- *      - end    - virtual end address
- */
-ENTRY(v3_dma_flush_range)
-        mov     r0, #0
-        mcr     p15, 0, r0, c7, c0, 0           @ flush ID cache
-        mov     pc, lr
-/*
- *      dma_unmap_area(start, size, dir)
- *      - start - kernel virtual start address
- *      - size  - size of region
- *      - dir   - DMA direction
- */
-ENTRY(v3_dma_unmap_area)
-        teq     r2, #DMA_TO_DEVICE
-        bne     v3_dma_flush_range
-        /* FALLTHROUGH */
-/*
- *      dma_map_area(start, size, dir)
- *      - start - kernel virtual start address
- *      - size  - size of region
- *      - dir   - DMA direction
- */
-ENTRY(v3_dma_map_area)
-        mov     pc, lr
-ENDPROC(v3_dma_unmap_area)
-ENDPROC(v3_dma_map_area)
-        .globl  v3_flush_kern_cache_louis
-        .equ    v3_flush_kern_cache_louis, v3_flush_kern_cache_all
-        __INITDATA
-        @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
-        define_cache_functions v3
diff --git a/arch/arm/mm/cache-v4.S b/arch/arm/mm/cache-v4.S
index 43e5d77be677..a7ba68f59f0c 100644
--- a/arch/arm/mm/cache-v4.S
+++ b/arch/arm/mm/cache-v4.S
@@ -58,7 +58,7 @@ ENTRY(v4_flush_kern_cache_all)
 ENTRY(v4_flush_user_cache_range)
 #ifdef CONFIG_CPU_CP15
        mov     ip, #0
-        mcreq   p15, 0, ip, c7, c7, 0           @ flush ID cache
+        mcr     p15, 0, ip, c7, c7, 0           @ flush ID cache
        mov     pc, lr
 #else
        /* FALLTHROUGH */
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index ad722f1208a5..9a5cdc01fcdf 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -99,6 +99,9 @@ void show_mem(unsigned int filter)
        printk("Mem-info:\n");
        show_free_areas(filter);
+        if (filter & SHOW_MEM_FILTER_PAGE_COUNT)
+                return;
        for_each_bank (i, mi) {
                struct membank *bank = &mi->bank[i];
                unsigned int pfn1, pfn2;
@@ -424,24 +427,6 @@ void __init bootmem_init(void)
        max_pfn = max_high - PHYS_PFN_OFFSET;
 }
-static inline int free_area(unsigned long pfn, unsigned long end, char *s)
-{
-        unsigned int pages = 0, size = (end - pfn) << (PAGE_SHIFT - 10);
-        for (; pfn < end; pfn++) {
-                struct page *page = pfn_to_page(pfn);
-                ClearPageReserved(page);
-                init_page_count(page);
-                __free_page(page);
-                pages++;
-        }
-        if (size && s)
-                printk(KERN_INFO "Freeing %s memory: %dK\n", s, size);
-        return pages;
-}
 /*
 * Poison init memory with an undefined instruction (ARM) or a branch to an
 * undefined instruction (Thumb).
@@ -534,6 +519,14 @@ static void __init free_unused_memmap(struct meminfo *mi)
 #endif
 }
+#ifdef CONFIG_HIGHMEM
+static inline void free_area_high(unsigned long pfn, unsigned long end)
+{
+        for (; pfn < end; pfn++)
+                free_highmem_page(pfn_to_page(pfn));
+}
+#endif
 static void __init free_highpages(void)
 {
 #ifdef CONFIG_HIGHMEM
@@ -569,8 +562,7 @@ static void __init free_highpages(void)
                        if (res_end > end)
                                res_end = end;
                        if (res_start != start)
-                                totalhigh_pages += free_area(start, res_start,
+                                free_area_high(start, res_start);
-                                                             NULL);
                        start = res_end;
                        if (start == end)
                                break;
@@ -578,9 +570,8 @@ static void __init free_highpages(void)
                /* And now free anything which remains */
                if (start < end)
-                        totalhigh_pages += free_area(start, end, NULL);
+                        free_area_high(start, end);
        }
-        totalram_pages += totalhigh_pages;
 #endif
 }
@@ -609,8 +600,7 @@ void __init mem_init(void)
 #ifdef CONFIG_SA1111
        /* now that our DMA memory is actually so designated, we can free it */
-        totalram_pages += free_area(PHYS_PFN_OFFSET,
+        free_reserved_area(__va(PHYS_PFN_OFFSET), swapper_pg_dir, 0, NULL);
-                                    __phys_to_pfn(__pa(swapper_pg_dir)), NULL);
 #endif
        free_highpages();
@@ -738,16 +728,12 @@ void free_initmem(void)
        extern char __tcm_start, __tcm_end;
        poison_init_mem(&__tcm_start, &__tcm_end - &__tcm_start);
-        totalram_pages += free_area(__phys_to_pfn(__pa(&__tcm_start)),
+        free_reserved_area(&__tcm_start, &__tcm_end, 0, "TCM link");
-                                    __phys_to_pfn(__pa(&__tcm_end)),
-                                    "TCM link");
 #endif
        poison_init_mem(__init_begin, __init_end - __init_begin);
        if (!machine_is_integrator() && !machine_is_cintegrator())
-                totalram_pages += free_area(__phys_to_pfn(__pa(__init_begin)),
+                free_initmem_default(0);
-                                            __phys_to_pfn(__pa(__init_end)),
-                                            "init");
 }
 #ifdef CONFIG_BLK_DEV_INITRD
@@ -758,9 +744,7 @@ void free_initrd_mem(unsigned long start, unsigned long end)
 {
        if (!keep_initrd) {
                poison_init_mem((void *)start, PAGE_ALIGN(end) - start);
-                totalram_pages += free_area(__phys_to_pfn(__pa(start)),
+                free_reserved_area(start, end, 0, "initrd");
-                                            __phys_to_pfn(__pa(end)),
-                                            "initrd");
        }
 }
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 78978945492a..a84ff763ac39 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -34,6 +34,7 @@
 #include <asm/mach/pci.h>
 #include "mm.h"
+#include "tcm.h"
 /*
 * empty_zero_page is a special page that is used for
@@ -1277,6 +1278,7 @@ void __init paging_init(struct machine_desc *mdesc)
        dma_contiguous_remap();
        devicemaps_init(mdesc);
        kmap_init();
+        tcm_init();
        top_pmd = pmd_off_k(0xffff0000);
diff --git a/arch/arm/mm/proc-arm740.S b/arch/arm/mm/proc-arm740.S
index dc5de5d53f20..fde2d2a794cf 100644
--- a/arch/arm/mm/proc-arm740.S
+++ b/arch/arm/mm/proc-arm740.S
@@ -77,24 +77,27 @@ __arm740_setup:
        mcr     p15, 0, r0, c6, c0              @ set area 0, default
        ldr     r0, =(CONFIG_DRAM_BASE & 0xFFFFF000) @ base[31:12] of RAM
-        ldr     r1, =(CONFIG_DRAM_SIZE >> 12)   @ size of RAM (must be >= 4KB)
+        ldr     r3, =(CONFIG_DRAM_SIZE >> 12)   @ size of RAM (must be >= 4KB)
-        mov     r2, #10                         @ 11 is the minimum (4KB)
+        mov     r4, #10                         @ 11 is the minimum (4KB)
-1:      add     r2, r2, #1                      @ area size *= 2
+1:      add     r4, r4, #1                      @ area size *= 2
-        mov     r1, r1, lsr #1
+        movs    r3, r3, lsr #1
        bne     1b                              @ count not zero r-shift
-        orr     r0, r0, r2, lsl #1              @ the area register value
+        orr     r0, r0, r4, lsl #1              @ the area register value
        orr     r0, r0, #1                      @ set enable bit
        mcr     p15, 0, r0, c6, c1              @ set area 1, RAM
        ldr     r0, =(CONFIG_FLASH_MEM_BASE & 0xFFFFF000) @ base[31:12] of FLASH
-        ldr     r1, =(CONFIG_FLASH_SIZE >> 12)  @ size of FLASH (must be >= 4KB)
+        ldr     r3, =(CONFIG_FLASH_SIZE >> 12)  @ size of FLASH (must be >= 4KB)
-        mov     r2, #10                         @ 11 is the minimum (4KB)
+        cmp     r3, #0
-1:      add     r2, r2, #1                      @ area size *= 2
+        moveq   r0, #0
-        mov     r1, r1, lsr #1
+        beq     2f
+        mov     r4, #10                         @ 11 is the minimum (4KB)
+1:      add     r4, r4, #1                      @ area size *= 2
+        movs    r3, r3, lsr #1
        bne     1b                              @ count not zero r-shift
-        orr     r0, r0, r2, lsl #1              @ the area register value
+        orr     r0, r0, r4, lsl #1              @ the area register value
        orr     r0, r0, #1                      @ set enable bit
-        mcr     p15, 0, r0, c6, c2              @ set area 2, ROM/FLASH
+2:      mcr     p15, 0, r0, c6, c2              @ set area 2, ROM/FLASH
        mov     r0, #0x06
        mcr     p15, 0, r0, c2, c0              @ Region 1&2 cacheable
@@ -137,13 +140,14 @@ __arm740_proc_info:
        .long   0x41807400
        .long   0xfffffff0
        .long   0
+        .long   0
        b       __arm740_setup
        .long   cpu_arch_name
        .long   cpu_elf_name
-        .long   HWCAP_SWP | HWCAP_HALF | HWCAP_26BIT
+        .long   HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB | HWCAP_26BIT
        .long   cpu_arm740_name
        .long   arm740_processor_functions
        .long   0
        .long   0
-        .long   v3_cache_fns                    @ cache model
+        .long   v4_cache_fns                    @ cache model
        .size   __arm740_proc_info, . - __arm740_proc_info
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 2c3b9421ab5e..2556cf1c2da1 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -387,7 +387,7 @@ ENTRY(cpu_arm920_set_pte_ext)
 /* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
 .globl  cpu_arm920_suspend_size
 .equ    cpu_arm920_suspend_size, 4 * 3
-#ifdef CONFIG_PM_SLEEP
+#ifdef CONFIG_ARM_CPU_SUSPEND
 ENTRY(cpu_arm920_do_suspend)
        stmfd   sp!, {r4 - r6, lr}
        mrc     p15, 0, r4, c13, c0, 0  @ PID
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index f1803f7e2972..344c8a548cc0 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -402,7 +402,7 @@ ENTRY(cpu_arm926_set_pte_ext)
 /* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
 .globl  cpu_arm926_suspend_size
 .equ    cpu_arm926_suspend_size, 4 * 3
-#ifdef CONFIG_PM_SLEEP
+#ifdef CONFIG_ARM_CPU_SUSPEND
 ENTRY(cpu_arm926_do_suspend)
        stmfd   sp!, {r4 - r6, lr}
        mrc     p15, 0, r4, c13, c0, 0  @ PID
diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S
index 82f9cdc751d6..0b60dd3d742a 100644
--- a/arch/arm/mm/proc-mohawk.S
+++ b/arch/arm/mm/proc-mohawk.S
@@ -350,7 +350,7 @@ ENTRY(cpu_mohawk_set_pte_ext)
 .globl  cpu_mohawk_suspend_size
 .equ    cpu_mohawk_suspend_size, 4 * 6
-#ifdef CONFIG_PM_SLEEP
+#ifdef CONFIG_ARM_CPU_SUSPEND
 ENTRY(cpu_mohawk_do_suspend)
        stmfd   sp!, {r4 - r9, lr}
        mrc     p14, 0, r4, c6, c0, 0   @ clock configuration, for turbo mode
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S
index 3aa0da11fd84..d92dfd081429 100644
--- a/arch/arm/mm/proc-sa1100.S
+++ b/arch/arm/mm/proc-sa1100.S
@@ -172,7 +172,7 @@ ENTRY(cpu_sa1100_set_pte_ext)
 .globl  cpu_sa1100_suspend_size
 .equ    cpu_sa1100_suspend_size, 4 * 3
-#ifdef CONFIG_PM_SLEEP
+#ifdef CONFIG_ARM_CPU_SUSPEND
 ENTRY(cpu_sa1100_do_suspend)
        stmfd   sp!, {r4 - r6, lr}
        mrc     p15, 0, r4, c3, c0, 0           @ domain ID
diff --git a/arch/arm/mm/proc-syms.c b/arch/arm/mm/proc-syms.c
index 3e6210b4d6d4..054b491ff764 100644
--- a/arch/arm/mm/proc-syms.c
+++ b/arch/arm/mm/proc-syms.c
@@ -17,7 +17,9 @@
 #ifndef MULTI_CPU
 EXPORT_SYMBOL(cpu_dcache_clean_area);
+#ifdef CONFIG_MMU
 EXPORT_SYMBOL(cpu_set_pte_ext);
+#endif
 #else
 EXPORT_SYMBOL(processor);
 #endif
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index bcaaa8de9325..5c07ee4fe3eb 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -138,7 +138,7 @@ ENTRY(cpu_v6_set_pte_ext)
 /* Suspend/resume support: taken from arch/arm/mach-s3c64xx/sleep.S */
 .globl  cpu_v6_suspend_size
 .equ    cpu_v6_suspend_size, 4 * 6
-#ifdef CONFIG_PM_SLEEP
+#ifdef CONFIG_ARM_CPU_SUSPEND
 ENTRY(cpu_v6_do_suspend)
        stmfd   sp!, {r4 - r9, lr}
        mrc     p15, 0, r4, c13, c0, 0  @ FCSE/PID
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index eb93d6487f35..e8efd83b6f25 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -413,7 +413,7 @@ ENTRY(cpu_xsc3_set_pte_ext)
 .globl  cpu_xsc3_suspend_size
 .equ    cpu_xsc3_suspend_size, 4 * 6
-#ifdef CONFIG_PM_SLEEP
+#ifdef CONFIG_ARM_CPU_SUSPEND
 ENTRY(cpu_xsc3_do_suspend)
        stmfd   sp!, {r4 - r9, lr}
        mrc     p14, 0, r4, c6, c0, 0   @ clock configuration, for turbo mode
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S
index 25510361aa18..e766f889bfd6 100644
--- a/arch/arm/mm/proc-xscale.S
+++ b/arch/arm/mm/proc-xscale.S
@@ -528,7 +528,7 @@ ENTRY(cpu_xscale_set_pte_ext)
 .globl  cpu_xscale_suspend_size
 .equ    cpu_xscale_suspend_size, 4 * 6
-#ifdef CONFIG_PM_SLEEP
+#ifdef CONFIG_ARM_CPU_SUSPEND
 ENTRY(cpu_xscale_do_suspend)
        stmfd   sp!, {r4 - r9, lr}
        mrc     p14, 0, r4, c6, c0, 0   @ clock configuration, for turbo mode
diff --git a/arch/arm/kernel/tcm.h b/arch/arm/mm/tcm.h
index 8015ad434a40..8015ad434a40 100644
--- a/arch/arm/kernel/tcm.h
+++ b/arch/arm/mm/tcm.h
diff --git a/arch/arm/net/bpf_jit_32.c b/arch/arm/net/bpf_jit_32.c
index a0bd8a755bdf..1a643ee8e082 100644
--- a/arch/arm/net/bpf_jit_32.c
+++ b/arch/arm/net/bpf_jit_32.c
@@ -918,9 +918,8 @@ void bpf_jit_compile(struct sk_filter *fp)
 #endif
        if (bpf_jit_enable > 1)
-                print_hex_dump(KERN_INFO, "BPF JIT code: ",
+                /* there are 2 passes here */
-                               DUMP_PREFIX_ADDRESS, 16, 4, ctx.target,
+                bpf_jit_dump(fp->len, alloc_size, 2, ctx.target);
-                               alloc_size, false);
        fp->bpf_func = (void *)ctx.target;
 out:
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
index 2d4b6414609f..251f827271e9 100644
--- a/arch/arm/plat-orion/common.c
+++ b/arch/arm/plat-orion/common.c
@@ -238,6 +238,7 @@ static __init void ge_complete(
        struct mv643xx_eth_shared_platform_data *orion_ge_shared_data,
        struct resource *orion_ge_resource, unsigned long irq,
        struct platform_device *orion_ge_shared,
+        struct platform_device *orion_ge_mvmdio,
        struct mv643xx_eth_platform_data *eth_data,
        struct platform_device *orion_ge)
 {
@@ -247,6 +248,8 @@ static __init void ge_complete(
        orion_ge->dev.platform_data = eth_data;
        platform_device_register(orion_ge_shared);
+        if (orion_ge_mvmdio)
+                platform_device_register(orion_ge_mvmdio);
        platform_device_register(orion_ge);
 }
@@ -258,8 +261,6 @@ struct mv643xx_eth_shared_platform_data orion_ge00_shared_data;
 static struct resource orion_ge00_shared_resources[] = {
        {
                .name   = "ge00 base",
-        }, {
-                .name   = "ge00 err irq",
        },
 };
@@ -271,6 +272,19 @@ static struct platform_device orion_ge00_shared = {
        },
 };
+static struct resource orion_ge_mvmdio_resources[] = {
+        {
+                .name   = "ge00 mvmdio base",
+        }, {
+                .name   = "ge00 mvmdio err irq",
+        },
+};
+static struct platform_device orion_ge_mvmdio = {
+        .name           = "orion-mdio",
+        .id             = -1,
+};
 static struct resource orion_ge00_resources[] = {
        {
                .name   = "ge00 irq",
@@ -295,26 +309,25 @@ void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
                            unsigned int tx_csum_limit)
 {
        fill_resources(&orion_ge00_shared, orion_ge00_shared_resources,
-                       mapbase + 0x2000, SZ_16K - 1, irq_err);
+                       mapbase + 0x2000, SZ_16K - 1, NO_IRQ);
+        fill_resources(&orion_ge_mvmdio, orion_ge_mvmdio_resources,
+                        mapbase + 0x2004, 0x84 - 1, irq_err);
        orion_ge00_shared_data.tx_csum_limit = tx_csum_limit;
        ge_complete(&orion_ge00_shared_data,
                    orion_ge00_resources, irq, &orion_ge00_shared,
+                    &orion_ge_mvmdio,
                    eth_data, &orion_ge00);
 }
 /*****************************************************************************
 * GE01
 ****************************************************************************/
-struct mv643xx_eth_shared_platform_data orion_ge01_shared_data = {
+struct mv643xx_eth_shared_platform_data orion_ge01_shared_data;
-        .shared_smi     = &orion_ge00_shared,
-};
 static struct resource orion_ge01_shared_resources[] = {
        {
                .name   = "ge01 base",
-        }, {
+        }
-                .name   = "ge01 err irq",
-        },
 };
 static struct platform_device orion_ge01_shared = {
@@ -349,26 +362,23 @@ void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
                            unsigned int tx_csum_limit)
 {
        fill_resources(&orion_ge01_shared, orion_ge01_shared_resources,
-                       mapbase + 0x2000, SZ_16K - 1, irq_err);
+                       mapbase + 0x2000, SZ_16K - 1, NO_IRQ);
        orion_ge01_shared_data.tx_csum_limit = tx_csum_limit;
        ge_complete(&orion_ge01_shared_data,
                    orion_ge01_resources, irq, &orion_ge01_shared,
+                    NULL,
                    eth_data, &orion_ge01);
 }
 /*****************************************************************************
 * GE10
 ****************************************************************************/
-struct mv643xx_eth_shared_platform_data orion_ge10_shared_data = {
+struct mv643xx_eth_shared_platform_data orion_ge10_shared_data;
-        .shared_smi     = &orion_ge00_shared,
-};
 static struct resource orion_ge10_shared_resources[] = {
        {
                .name   = "ge10 base",
-        }, {
+        }
-                .name   = "ge10 err irq",
-        },
 };
 static struct platform_device orion_ge10_shared = {
@@ -402,24 +412,21 @@ void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data,
                            unsigned long irq_err)
 {
        fill_resources(&orion_ge10_shared, orion_ge10_shared_resources,
-                       mapbase + 0x2000, SZ_16K - 1, irq_err);
+                       mapbase + 0x2000, SZ_16K - 1, NO_IRQ);
        ge_complete(&orion_ge10_shared_data,
                    orion_ge10_resources, irq, &orion_ge10_shared,
+                    NULL,
                    eth_data, &orion_ge10);
 }
 /*****************************************************************************
 * GE11
 ****************************************************************************/
-struct mv643xx_eth_shared_platform_data orion_ge11_shared_data = {
+struct mv643xx_eth_shared_platform_data orion_ge11_shared_data;
-        .shared_smi     = &orion_ge00_shared,
-};
 static struct resource orion_ge11_shared_resources[] = {
        {
                .name   = "ge11 base",
-        }, {
-                .name   = "ge11 err irq",
        },
 };
@@ -454,9 +461,10 @@ void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data,
                            unsigned long irq_err)
 {
        fill_resources(&orion_ge11_shared, orion_ge11_shared_resources,
-                       mapbase + 0x2000, SZ_16K - 1, irq_err);
+                       mapbase + 0x2000, SZ_16K - 1, NO_IRQ);
        ge_complete(&orion_ge11_shared_data,
                    orion_ge11_resources, irq, &orion_ge11_shared,
+                    NULL,
                    eth_data, &orion_ge11);
 }
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 51afedda9ab6..03db14d8ace9 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -10,6 +10,7 @@
 * published by the Free Software Foundation.
 */
+#include <linux/amba/pl330.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
 #include <linux/interrupt.h>
@@ -1552,6 +1553,9 @@ void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
        pd.num_cs = num_cs;
        pd.src_clk_nr = src_clk_nr;
        pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
+#ifdef CONFIG_PL330_DMA
+        pd.filter = pl330_filter;
+#endif
        s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
 }
@@ -1590,6 +1594,9 @@ void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
        pd.num_cs = num_cs;
        pd.src_clk_nr = src_clk_nr;
        pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
+#ifdef CONFIG_PL330_DMA
+        pd.filter = pl330_filter;
+#endif
        s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
 }
@@ -1628,6 +1635,9 @@ void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
        pd.num_cs = num_cs;
        pd.src_clk_nr = src_clk_nr;
        pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
+#ifdef CONFIG_PL330_DMA
+        pd.filter = pl330_filter;
+#endif
        s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
 }
diff --git a/arch/arm/plat-samsung/include/plat/fb.h b/arch/arm/plat-samsung/include/plat/fb.h
index b885322717a1..9ae507270785 100644
--- a/arch/arm/plat-samsung/include/plat/fb.h
+++ b/arch/arm/plat-samsung/include/plat/fb.h
@@ -15,55 +15,7 @@
 #ifndef __PLAT_S3C_FB_H
 #define __PLAT_S3C_FB_H __FILE__
-/* S3C_FB_MAX_WIN
+#include <linux/platform_data/video_s3c.h>
- * Set to the maximum number of windows that any of the supported hardware
- * can use. Since the platform data uses this for an array size, having it
- * set to the maximum of any version of the hardware can do is safe.
- */
-#define S3C_FB_MAX_WIN  (5)
-/**
- * struct s3c_fb_pd_win - per window setup data
- * @xres     : The window X size.
- * @yres     : The window Y size.
- * @virtual_x: The virtual X size.
- * @virtual_y: The virtual Y size.
- */
-struct s3c_fb_pd_win {
-        unsigned short          default_bpp;
-        unsigned short          max_bpp;
-        unsigned short          xres;
-        unsigned short          yres;
-        unsigned short          virtual_x;
-        unsigned short          virtual_y;
-};
-/**
- * struct s3c_fb_platdata -  S3C driver platform specific information
- * @setup_gpio: Setup the external GPIO pins to the right state to transfer
- *              the data from the display system to the connected display
- *              device.
- * @vidcon0: The base vidcon0 values to control the panel data format.
- * @vidcon1: The base vidcon1 values to control the panel data output.
- * @vtiming: Video timing when connected to a RGB type panel.
- * @win: The setup data for each hardware window, or NULL for unused.
- * @display_mode: The LCD output display mode.
- *
- * The platform data supplies the video driver with all the information
- * it requires to work with the display(s) attached to the machine. It
- * controls the initial mode, the number of display windows (0 is always
- * the base framebuffer) that are initialised etc.
- *
- */
-struct s3c_fb_platdata {
-        void    (*setup_gpio)(void);
-        struct s3c_fb_pd_win    *win[S3C_FB_MAX_WIN];
-        struct fb_videomode     *vtiming;
-        u32                      vidcon0;
-        u32                      vidcon1;
-};
 /**
 * s3c_fb_set_platdata() - Setup the FB device with platform data.
diff --git a/arch/arm/plat-samsung/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h
index 29c26a818842..f05f2afa440d 100644
--- a/arch/arm/plat-samsung/include/plat/regs-serial.h
+++ b/arch/arm/plat-samsung/include/plat/regs-serial.h
@@ -1,281 +1 @@
-/* arch/arm/plat-samsung/include/plat/regs-serial.h
+#include <linux/serial_s3c.h>
- *
- *  From linux/include/asm-arm/hardware/serial_s3c2410.h
- *
- *  Internal header file for Samsung S3C2410 serial ports (UART0-2)
- *
- *  Copyright (C) 2002 Shane Nay (shane@minirl.com)
- *
- *  Additional defines, Copyright 2003 Simtec Electronics (linux@simtec.co.uk)
- *
- *  Adapted from:
- *
- *  Internal header file for MX1ADS serial ports (UART1 & 2)
- *
- *  Copyright (C) 2002 Shane Nay (shane@minirl.com)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-*/
-#ifndef __ASM_ARM_REGS_SERIAL_H
-#define __ASM_ARM_REGS_SERIAL_H
-#define S3C24XX_VA_UART0      (S3C_VA_UART)
-#define S3C24XX_VA_UART1      (S3C_VA_UART + 0x4000 )
-#define S3C24XX_VA_UART2      (S3C_VA_UART + 0x8000 )
-#define S3C24XX_VA_UART3      (S3C_VA_UART + 0xC000 )
-#define S3C2410_PA_UART0      (S3C24XX_PA_UART)
-#define S3C2410_PA_UART1      (S3C24XX_PA_UART + 0x4000 )
-#define S3C2410_PA_UART2      (S3C24XX_PA_UART + 0x8000 )
-#define S3C2443_PA_UART3      (S3C24XX_PA_UART + 0xC000 )
-#define S3C2410_URXH      (0x24)
-#define S3C2410_UTXH      (0x20)
-#define S3C2410_ULCON     (0x00)
-#define S3C2410_UCON      (0x04)
-#define S3C2410_UFCON     (0x08)
-#define S3C2410_UMCON     (0x0C)
-#define S3C2410_UBRDIV    (0x28)
-#define S3C2410_UTRSTAT   (0x10)
-#define S3C2410_UERSTAT   (0x14)
-#define S3C2410_UFSTAT    (0x18)
-#define S3C2410_UMSTAT    (0x1C)
-#define S3C2410_LCON_CFGMASK      ((0xF<<3)|(0x3))
-#define S3C2410_LCON_CS5          (0x0)
-#define S3C2410_LCON_CS6          (0x1)
-#define S3C2410_LCON_CS7          (0x2)
-#define S3C2410_LCON_CS8          (0x3)
-#define S3C2410_LCON_CSMASK       (0x3)
-#define S3C2410_LCON_PNONE        (0x0)
-#define S3C2410_LCON_PEVEN        (0x5 << 3)
-#define S3C2410_LCON_PODD         (0x4 << 3)
-#define S3C2410_LCON_PMASK        (0x7 << 3)
-#define S3C2410_LCON_STOPB        (1<<2)
-#define S3C2410_LCON_IRM          (1<<6)
-#define S3C2440_UCON_CLKMASK      (3<<10)
-#define S3C2440_UCON_CLKSHIFT     (10)
-#define S3C2440_UCON_PCLK         (0<<10)
-#define S3C2440_UCON_UCLK         (1<<10)
-#define S3C2440_UCON_PCLK2        (2<<10)
-#define S3C2440_UCON_FCLK         (3<<10)
-#define S3C2443_UCON_EPLL         (3<<10)
-#define S3C6400_UCON_CLKMASK    (3<<10)
-#define S3C6400_UCON_CLKSHIFT   (10)
-#define S3C6400_UCON_PCLK       (0<<10)
-#define S3C6400_UCON_PCLK2      (2<<10)
-#define S3C6400_UCON_UCLK0      (1<<10)
-#define S3C6400_UCON_UCLK1      (3<<10)
-#define S3C2440_UCON2_FCLK_EN     (1<<15)
-#define S3C2440_UCON0_DIVMASK     (15 << 12)
-#define S3C2440_UCON1_DIVMASK     (15 << 12)
-#define S3C2440_UCON2_DIVMASK     (7 << 12)
-#define S3C2440_UCON_DIVSHIFT     (12)
-#define S3C2412_UCON_CLKMASK    (3<<10)
-#define S3C2412_UCON_CLKSHIFT   (10)
-#define S3C2412_UCON_UCLK       (1<<10)
-#define S3C2412_UCON_USYSCLK    (3<<10)
-#define S3C2412_UCON_PCLK       (0<<10)
-#define S3C2412_UCON_PCLK2      (2<<10)
-#define S3C2410_UCON_CLKMASK    (1 << 10)
-#define S3C2410_UCON_CLKSHIFT   (10)
-#define S3C2410_UCON_UCLK         (1<<10)
-#define S3C2410_UCON_SBREAK       (1<<4)
-#define S3C2410_UCON_TXILEVEL     (1<<9)
-#define S3C2410_UCON_RXILEVEL     (1<<8)
-#define S3C2410_UCON_TXIRQMODE    (1<<2)
-#define S3C2410_UCON_RXIRQMODE    (1<<0)
-#define S3C2410_UCON_RXFIFO_TOI   (1<<7)
-#define S3C2443_UCON_RXERR_IRQEN  (1<<6)
-#define S3C2443_UCON_LOOPBACK     (1<<5)
-#define S3C2410_UCON_DEFAULT      (S3C2410_UCON_TXILEVEL  | \
-                                   S3C2410_UCON_RXILEVEL  | \
-                                   S3C2410_UCON_TXIRQMODE | \
-                                   S3C2410_UCON_RXIRQMODE | \
-                                   S3C2410_UCON_RXFIFO_TOI)
-#define S3C2410_UFCON_FIFOMODE    (1<<0)
-#define S3C2410_UFCON_TXTRIG0     (0<<6)
-#define S3C2410_UFCON_RXTRIG8     (1<<4)
-#define S3C2410_UFCON_RXTRIG12    (2<<4)
-/* S3C2440 FIFO trigger levels */
-#define S3C2440_UFCON_RXTRIG1     (0<<4)
-#define S3C2440_UFCON_RXTRIG8     (1<<4)
-#define S3C2440_UFCON_RXTRIG16    (2<<4)
-#define S3C2440_UFCON_RXTRIG32    (3<<4)
-#define S3C2440_UFCON_TXTRIG0     (0<<6)
-#define S3C2440_UFCON_TXTRIG16    (1<<6)
-#define S3C2440_UFCON_TXTRIG32    (2<<6)
-#define S3C2440_UFCON_TXTRIG48    (3<<6)
-#define S3C2410_UFCON_RESETBOTH   (3<<1)
-#define S3C2410_UFCON_RESETTX     (1<<2)
-#define S3C2410_UFCON_RESETRX     (1<<1)
-#define S3C2410_UFCON_DEFAULT     (S3C2410_UFCON_FIFOMODE | \
-                                   S3C2410_UFCON_TXTRIG0  | \
-                                   S3C2410_UFCON_RXTRIG8 )
-#define S3C2410_UMCOM_AFC         (1<<4)
-#define S3C2410_UMCOM_RTS_LOW     (1<<0)
-#define S3C2412_UMCON_AFC_63    (0<<5)          /* same as s3c2443 */
-#define S3C2412_UMCON_AFC_56    (1<<5)
-#define S3C2412_UMCON_AFC_48    (2<<5)
-#define S3C2412_UMCON_AFC_40    (3<<5)
-#define S3C2412_UMCON_AFC_32    (4<<5)
-#define S3C2412_UMCON_AFC_24    (5<<5)
-#define S3C2412_UMCON_AFC_16    (6<<5)
-#define S3C2412_UMCON_AFC_8     (7<<5)
-#define S3C2410_UFSTAT_TXFULL     (1<<9)
-#define S3C2410_UFSTAT_RXFULL     (1<<8)
-#define S3C2410_UFSTAT_TXMASK     (15<<4)
-#define S3C2410_UFSTAT_TXSHIFT    (4)
-#define S3C2410_UFSTAT_RXMASK     (15<<0)
-#define S3C2410_UFSTAT_RXSHIFT    (0)
-/* UFSTAT S3C2443 same as S3C2440 */
-#define S3C2440_UFSTAT_TXFULL     (1<<14)
-#define S3C2440_UFSTAT_RXFULL     (1<<6)
-#define S3C2440_UFSTAT_TXSHIFT    (8)
-#define S3C2440_UFSTAT_RXSHIFT    (0)
-#define S3C2440_UFSTAT_TXMASK     (63<<8)
-#define S3C2440_UFSTAT_RXMASK     (63)
-#define S3C2410_UTRSTAT_TXE       (1<<2)
-#define S3C2410_UTRSTAT_TXFE      (1<<1)
-#define S3C2410_UTRSTAT_RXDR      (1<<0)
-#define S3C2410_UERSTAT_OVERRUN   (1<<0)
-#define S3C2410_UERSTAT_FRAME     (1<<2)
-#define S3C2410_UERSTAT_BREAK     (1<<3)
-#define S3C2443_UERSTAT_PARITY    (1<<1)
-#define S3C2410_UERSTAT_ANY       (S3C2410_UERSTAT_OVERRUN | \
-                                   S3C2410_UERSTAT_FRAME | \
-                                   S3C2410_UERSTAT_BREAK)
-#define S3C2410_UMSTAT_CTS        (1<<0)
-#define S3C2410_UMSTAT_DeltaCTS   (1<<2)
-#define S3C2443_DIVSLOT           (0x2C)
-/* S3C64XX interrupt registers. */
-#define S3C64XX_UINTP           0x30
-#define S3C64XX_UINTSP          0x34
-#define S3C64XX_UINTM           0x38
-#define S3C64XX_UINTM_RXD       (0)
-#define S3C64XX_UINTM_TXD       (2)
-#define S3C64XX_UINTM_RXD_MSK   (1 << S3C64XX_UINTM_RXD)
-#define S3C64XX_UINTM_TXD_MSK   (1 << S3C64XX_UINTM_TXD)
-/* Following are specific to S5PV210 */
-#define S5PV210_UCON_CLKMASK    (1<<10)
-#define S5PV210_UCON_CLKSHIFT   (10)
-#define S5PV210_UCON_PCLK       (0<<10)
-#define S5PV210_UCON_UCLK       (1<<10)
-#define S5PV210_UFCON_TXTRIG0   (0<<8)
-#define S5PV210_UFCON_TXTRIG4   (1<<8)
-#define S5PV210_UFCON_TXTRIG8   (2<<8)
-#define S5PV210_UFCON_TXTRIG16  (3<<8)
-#define S5PV210_UFCON_TXTRIG32  (4<<8)
-#define S5PV210_UFCON_TXTRIG64  (5<<8)
-#define S5PV210_UFCON_TXTRIG128 (6<<8)
-#define S5PV210_UFCON_TXTRIG256 (7<<8)
-#define S5PV210_UFCON_RXTRIG1   (0<<4)
-#define S5PV210_UFCON_RXTRIG4   (1<<4)
-#define S5PV210_UFCON_RXTRIG8   (2<<4)
-#define S5PV210_UFCON_RXTRIG16  (3<<4)
-#define S5PV210_UFCON_RXTRIG32  (4<<4)
-#define S5PV210_UFCON_RXTRIG64  (5<<4)
-#define S5PV210_UFCON_RXTRIG128 (6<<4)
-#define S5PV210_UFCON_RXTRIG256 (7<<4)
-#define S5PV210_UFSTAT_TXFULL   (1<<24)
-#define S5PV210_UFSTAT_RXFULL   (1<<8)
-#define S5PV210_UFSTAT_TXMASK   (255<<16)
-#define S5PV210_UFSTAT_TXSHIFT  (16)
-#define S5PV210_UFSTAT_RXMASK   (255<<0)
-#define S5PV210_UFSTAT_RXSHIFT  (0)
-#define S3C2410_UCON_CLKSEL0    (1 << 0)
-#define S3C2410_UCON_CLKSEL1    (1 << 1)
-#define S3C2410_UCON_CLKSEL2    (1 << 2)
-#define S3C2410_UCON_CLKSEL3    (1 << 3)
-/* Default values for s5pv210 UCON and UFCON uart registers */
-#define S5PV210_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |        \
-                                 S3C2410_UCON_RXILEVEL |        \
-                                 S3C2410_UCON_TXIRQMODE |       \
-                                 S3C2410_UCON_RXIRQMODE |       \
-                                 S3C2410_UCON_RXFIFO_TOI |      \
-                                 S3C2443_UCON_RXERR_IRQEN)
-#define S5PV210_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |       \
-                                 S5PV210_UFCON_TXTRIG4 |        \
-                                 S5PV210_UFCON_RXTRIG4)
-#ifndef __ASSEMBLY__
-/* configuration structure for per-machine configurations for the
- * serial port
- *
- * the pointer is setup by the machine specific initialisation from the
- * arch/arm/mach-s3c2410/ directory.
-*/
-struct s3c2410_uartcfg {
-        unsigned char      hwport;       /* hardware port number */
-        unsigned char      unused;
-        unsigned short     flags;
-        upf_t              uart_flags;   /* default uart flags */
-        unsigned int       clk_sel;
-        unsigned int       has_fracval;
-        unsigned long      ucon;         /* value of ucon for port */
-        unsigned long      ulcon;        /* value of ulcon for port */
-        unsigned long      ufcon;        /* value of ufcon for port */
-};
-/* s3c24xx_uart_devs
- *
- * this is exported from the core as we cannot use driver_register(),
- * or platform_add_device() before the console_initcall()
-*/
-extern struct platform_device *s3c24xx_uart_devs[4];
-#endif /* __ASSEMBLY__ */
-#endif /* __ASM_ARM_REGS_SERIAL_H */
diff --git a/arch/arm/plat-samsung/include/plat/usb-phy.h b/arch/arm/plat-samsung/include/plat/usb-phy.h
index 959bcdb03a25..ab34dfadb7f9 100644
--- a/arch/arm/plat-samsung/include/plat/usb-phy.h
+++ b/arch/arm/plat-samsung/include/plat/usb-phy.h
@@ -11,10 +11,7 @@
 #ifndef __PLAT_SAMSUNG_USB_PHY_H
 #define __PLAT_SAMSUNG_USB_PHY_H __FILE__
-enum s5p_usb_phy_type {
+#include <linux/usb/samsung_usb_phy.h>
-        S5P_USB_PHY_DEVICE,
-        S5P_USB_PHY_HOST,
-};
 extern int s5p_usb_phy_init(struct platform_device *pdev, int type);
 extern int s5p_usb_phy_exit(struct platform_device *pdev, int type);